Merge tag 'xilinx-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot...
[platform/kernel/u-boot.git] / drivers / net / phy / phy.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Generic PHY Management code
4  *
5  * Copyright 2011 Freescale Semiconductor, Inc.
6  * author Andy Fleming
7  *
8  * Based loosely off of Linux's PHY Lib
9  */
10 #include <common.h>
11 #include <console.h>
12 #include <dm.h>
13 #include <malloc.h>
14 #include <net.h>
15 #include <command.h>
16 #include <miiphy.h>
17 #include <phy.h>
18 #include <errno.h>
19 #include <linux/err.h>
20 #include <linux/compiler.h>
21
22 DECLARE_GLOBAL_DATA_PTR;
23
24 /* Generic PHY support and helper functions */
25
26 /**
27  * genphy_config_advert - sanitize and advertise auto-negotiation parameters
28  * @phydev: target phy_device struct
29  *
30  * Description: Writes MII_ADVERTISE with the appropriate values,
31  *   after sanitizing the values to make sure we only advertise
32  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
33  *   hasn't changed, and > 0 if it has changed.
34  */
35 static int genphy_config_advert(struct phy_device *phydev)
36 {
37         u32 advertise;
38         int oldadv, adv, bmsr;
39         int err, changed = 0;
40
41         /* Only allow advertising what this PHY supports */
42         phydev->advertising &= phydev->supported;
43         advertise = phydev->advertising;
44
45         /* Setup standard advertisement */
46         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
47         oldadv = adv;
48
49         if (adv < 0)
50                 return adv;
51
52         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
53                  ADVERTISE_PAUSE_ASYM);
54         if (advertise & ADVERTISED_10baseT_Half)
55                 adv |= ADVERTISE_10HALF;
56         if (advertise & ADVERTISED_10baseT_Full)
57                 adv |= ADVERTISE_10FULL;
58         if (advertise & ADVERTISED_100baseT_Half)
59                 adv |= ADVERTISE_100HALF;
60         if (advertise & ADVERTISED_100baseT_Full)
61                 adv |= ADVERTISE_100FULL;
62         if (advertise & ADVERTISED_Pause)
63                 adv |= ADVERTISE_PAUSE_CAP;
64         if (advertise & ADVERTISED_Asym_Pause)
65                 adv |= ADVERTISE_PAUSE_ASYM;
66         if (advertise & ADVERTISED_1000baseX_Half)
67                 adv |= ADVERTISE_1000XHALF;
68         if (advertise & ADVERTISED_1000baseX_Full)
69                 adv |= ADVERTISE_1000XFULL;
70
71         if (adv != oldadv) {
72                 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
73
74                 if (err < 0)
75                         return err;
76                 changed = 1;
77         }
78
79         bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
80         if (bmsr < 0)
81                 return bmsr;
82
83         /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
84          * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
85          * logical 1.
86          */
87         if (!(bmsr & BMSR_ESTATEN))
88                 return changed;
89
90         /* Configure gigabit if it's supported */
91         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
92         oldadv = adv;
93
94         if (adv < 0)
95                 return adv;
96
97         adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
98
99         if (phydev->supported & (SUPPORTED_1000baseT_Half |
100                                 SUPPORTED_1000baseT_Full)) {
101                 if (advertise & SUPPORTED_1000baseT_Half)
102                         adv |= ADVERTISE_1000HALF;
103                 if (advertise & SUPPORTED_1000baseT_Full)
104                         adv |= ADVERTISE_1000FULL;
105         }
106
107         if (adv != oldadv)
108                 changed = 1;
109
110         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
111         if (err < 0)
112                 return err;
113
114         return changed;
115 }
116
117 /**
118  * genphy_setup_forced - configures/forces speed/duplex from @phydev
119  * @phydev: target phy_device struct
120  *
121  * Description: Configures MII_BMCR to force speed/duplex
122  *   to the values in phydev. Assumes that the values are valid.
123  */
124 static int genphy_setup_forced(struct phy_device *phydev)
125 {
126         int err;
127         int ctl = BMCR_ANRESTART;
128
129         phydev->pause = 0;
130         phydev->asym_pause = 0;
131
132         if (phydev->speed == SPEED_1000)
133                 ctl |= BMCR_SPEED1000;
134         else if (phydev->speed == SPEED_100)
135                 ctl |= BMCR_SPEED100;
136
137         if (phydev->duplex == DUPLEX_FULL)
138                 ctl |= BMCR_FULLDPLX;
139
140         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
141
142         return err;
143 }
144
145 /**
146  * genphy_restart_aneg - Enable and Restart Autonegotiation
147  * @phydev: target phy_device struct
148  */
149 int genphy_restart_aneg(struct phy_device *phydev)
150 {
151         int ctl;
152
153         ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
154
155         if (ctl < 0)
156                 return ctl;
157
158         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
159
160         /* Don't isolate the PHY if we're negotiating */
161         ctl &= ~(BMCR_ISOLATE);
162
163         ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
164
165         return ctl;
166 }
167
168 /**
169  * genphy_config_aneg - restart auto-negotiation or write BMCR
170  * @phydev: target phy_device struct
171  *
172  * Description: If auto-negotiation is enabled, we configure the
173  *   advertising, and then restart auto-negotiation.  If it is not
174  *   enabled, then we write the BMCR.
175  */
176 int genphy_config_aneg(struct phy_device *phydev)
177 {
178         int result;
179
180         if (phydev->autoneg != AUTONEG_ENABLE)
181                 return genphy_setup_forced(phydev);
182
183         result = genphy_config_advert(phydev);
184
185         if (result < 0) /* error */
186                 return result;
187
188         if (result == 0) {
189                 /*
190                  * Advertisment hasn't changed, but maybe aneg was never on to
191                  * begin with?  Or maybe phy was isolated?
192                  */
193                 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
194
195                 if (ctl < 0)
196                         return ctl;
197
198                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
199                         result = 1; /* do restart aneg */
200         }
201
202         /*
203          * Only restart aneg if we are advertising something different
204          * than we were before.
205          */
206         if (result > 0)
207                 result = genphy_restart_aneg(phydev);
208
209         return result;
210 }
211
212 /**
213  * genphy_update_link - update link status in @phydev
214  * @phydev: target phy_device struct
215  *
216  * Description: Update the value in phydev->link to reflect the
217  *   current link value.  In order to do this, we need to read
218  *   the status register twice, keeping the second value.
219  */
220 int genphy_update_link(struct phy_device *phydev)
221 {
222         unsigned int mii_reg;
223
224         /*
225          * Wait if the link is up, and autonegotiation is in progress
226          * (ie - we're capable and it's not done)
227          */
228         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
229
230         /*
231          * If we already saw the link up, and it hasn't gone down, then
232          * we don't need to wait for autoneg again
233          */
234         if (phydev->link && mii_reg & BMSR_LSTATUS)
235                 return 0;
236
237         if ((phydev->autoneg == AUTONEG_ENABLE) &&
238             !(mii_reg & BMSR_ANEGCOMPLETE)) {
239                 int i = 0;
240
241                 printf("%s Waiting for PHY auto negotiation to complete",
242                        phydev->dev->name);
243                 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
244                         /*
245                          * Timeout reached ?
246                          */
247                         if (i > PHY_ANEG_TIMEOUT) {
248                                 printf(" TIMEOUT !\n");
249                                 phydev->link = 0;
250                                 return -ETIMEDOUT;
251                         }
252
253                         if (ctrlc()) {
254                                 puts("user interrupt!\n");
255                                 phydev->link = 0;
256                                 return -EINTR;
257                         }
258
259                         if ((i++ % 500) == 0)
260                                 printf(".");
261
262                         udelay(1000);   /* 1 ms */
263                         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
264                 }
265                 printf(" done\n");
266                 phydev->link = 1;
267         } else {
268                 /* Read the link a second time to clear the latched state */
269                 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
270
271                 if (mii_reg & BMSR_LSTATUS)
272                         phydev->link = 1;
273                 else
274                         phydev->link = 0;
275         }
276
277         return 0;
278 }
279
280 /*
281  * Generic function which updates the speed and duplex.  If
282  * autonegotiation is enabled, it uses the AND of the link
283  * partner's advertised capabilities and our advertised
284  * capabilities.  If autonegotiation is disabled, we use the
285  * appropriate bits in the control register.
286  *
287  * Stolen from Linux's mii.c and phy_device.c
288  */
289 int genphy_parse_link(struct phy_device *phydev)
290 {
291         int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
292
293         /* We're using autonegotiation */
294         if (phydev->autoneg == AUTONEG_ENABLE) {
295                 u32 lpa = 0;
296                 int gblpa = 0;
297                 u32 estatus = 0;
298
299                 /* Check for gigabit capability */
300                 if (phydev->supported & (SUPPORTED_1000baseT_Full |
301                                         SUPPORTED_1000baseT_Half)) {
302                         /* We want a list of states supported by
303                          * both PHYs in the link
304                          */
305                         gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
306                         if (gblpa < 0) {
307                                 debug("Could not read MII_STAT1000. ");
308                                 debug("Ignoring gigabit capability\n");
309                                 gblpa = 0;
310                         }
311                         gblpa &= phy_read(phydev,
312                                         MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313                 }
314
315                 /* Set the baseline so we only have to set them
316                  * if they're different
317                  */
318                 phydev->speed = SPEED_10;
319                 phydev->duplex = DUPLEX_HALF;
320
321                 /* Check the gigabit fields */
322                 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323                         phydev->speed = SPEED_1000;
324
325                         if (gblpa & PHY_1000BTSR_1000FD)
326                                 phydev->duplex = DUPLEX_FULL;
327
328                         /* We're done! */
329                         return 0;
330                 }
331
332                 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333                 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334
335                 if (lpa & (LPA_100FULL | LPA_100HALF)) {
336                         phydev->speed = SPEED_100;
337
338                         if (lpa & LPA_100FULL)
339                                 phydev->duplex = DUPLEX_FULL;
340
341                 } else if (lpa & LPA_10FULL) {
342                         phydev->duplex = DUPLEX_FULL;
343                 }
344
345                 /*
346                  * Extended status may indicate that the PHY supports
347                  * 1000BASE-T/X even though the 1000BASE-T registers
348                  * are missing. In this case we can't tell whether the
349                  * peer also supports it, so we only check extended
350                  * status if the 1000BASE-T registers are actually
351                  * missing.
352                  */
353                 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
354                         estatus = phy_read(phydev, MDIO_DEVAD_NONE,
355                                            MII_ESTATUS);
356
357                 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
358                                 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
359                         phydev->speed = SPEED_1000;
360                         if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
361                                 phydev->duplex = DUPLEX_FULL;
362                 }
363
364         } else {
365                 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
366
367                 phydev->speed = SPEED_10;
368                 phydev->duplex = DUPLEX_HALF;
369
370                 if (bmcr & BMCR_FULLDPLX)
371                         phydev->duplex = DUPLEX_FULL;
372
373                 if (bmcr & BMCR_SPEED1000)
374                         phydev->speed = SPEED_1000;
375                 else if (bmcr & BMCR_SPEED100)
376                         phydev->speed = SPEED_100;
377         }
378
379         return 0;
380 }
381
382 int genphy_config(struct phy_device *phydev)
383 {
384         int val;
385         u32 features;
386
387         features = (SUPPORTED_TP | SUPPORTED_MII
388                         | SUPPORTED_AUI | SUPPORTED_FIBRE |
389                         SUPPORTED_BNC);
390
391         /* Do we support autonegotiation? */
392         val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
393
394         if (val < 0)
395                 return val;
396
397         if (val & BMSR_ANEGCAPABLE)
398                 features |= SUPPORTED_Autoneg;
399
400         if (val & BMSR_100FULL)
401                 features |= SUPPORTED_100baseT_Full;
402         if (val & BMSR_100HALF)
403                 features |= SUPPORTED_100baseT_Half;
404         if (val & BMSR_10FULL)
405                 features |= SUPPORTED_10baseT_Full;
406         if (val & BMSR_10HALF)
407                 features |= SUPPORTED_10baseT_Half;
408
409         if (val & BMSR_ESTATEN) {
410                 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
411
412                 if (val < 0)
413                         return val;
414
415                 if (val & ESTATUS_1000_TFULL)
416                         features |= SUPPORTED_1000baseT_Full;
417                 if (val & ESTATUS_1000_THALF)
418                         features |= SUPPORTED_1000baseT_Half;
419                 if (val & ESTATUS_1000_XFULL)
420                         features |= SUPPORTED_1000baseX_Full;
421                 if (val & ESTATUS_1000_XHALF)
422                         features |= SUPPORTED_1000baseX_Half;
423         }
424
425         phydev->supported &= features;
426         phydev->advertising &= features;
427
428         genphy_config_aneg(phydev);
429
430         return 0;
431 }
432
433 int genphy_startup(struct phy_device *phydev)
434 {
435         int ret;
436
437         ret = genphy_update_link(phydev);
438         if (ret)
439                 return ret;
440
441         return genphy_parse_link(phydev);
442 }
443
444 int genphy_shutdown(struct phy_device *phydev)
445 {
446         return 0;
447 }
448
449 static struct phy_driver genphy_driver = {
450         .uid            = 0xffffffff,
451         .mask           = 0xffffffff,
452         .name           = "Generic PHY",
453         .features       = PHY_GBIT_FEATURES | SUPPORTED_MII |
454                           SUPPORTED_AUI | SUPPORTED_FIBRE |
455                           SUPPORTED_BNC,
456         .config         = genphy_config,
457         .startup        = genphy_startup,
458         .shutdown       = genphy_shutdown,
459 };
460
461 int genphy_init(void)
462 {
463         return phy_register(&genphy_driver);
464 }
465
466 static LIST_HEAD(phy_drivers);
467
468 int phy_init(void)
469 {
470 #ifdef CONFIG_NEEDS_MANUAL_RELOC
471         /*
472          * The pointers inside phy_drivers also needs to be updated incase of
473          * manual reloc, without which these points to some invalid
474          * pre reloc address and leads to invalid accesses, hangs.
475          */
476         struct list_head *head = &phy_drivers;
477
478         head->next = (void *)head->next + gd->reloc_off;
479         head->prev = (void *)head->prev + gd->reloc_off;
480 #endif
481
482 #ifdef CONFIG_B53_SWITCH
483         phy_b53_init();
484 #endif
485 #ifdef CONFIG_MV88E61XX_SWITCH
486         phy_mv88e61xx_init();
487 #endif
488 #ifdef CONFIG_PHY_AQUANTIA
489         phy_aquantia_init();
490 #endif
491 #ifdef CONFIG_PHY_ATHEROS
492         phy_atheros_init();
493 #endif
494 #ifdef CONFIG_PHY_BROADCOM
495         phy_broadcom_init();
496 #endif
497 #ifdef CONFIG_PHY_CORTINA
498         phy_cortina_init();
499 #endif
500 #ifdef CONFIG_PHY_DAVICOM
501         phy_davicom_init();
502 #endif
503 #ifdef CONFIG_PHY_ET1011C
504         phy_et1011c_init();
505 #endif
506 #ifdef CONFIG_PHY_LXT
507         phy_lxt_init();
508 #endif
509 #ifdef CONFIG_PHY_MARVELL
510         phy_marvell_init();
511 #endif
512 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
513         phy_micrel_ksz8xxx_init();
514 #endif
515 #ifdef CONFIG_PHY_MICREL_KSZ90X1
516         phy_micrel_ksz90x1_init();
517 #endif
518 #ifdef CONFIG_PHY_MESON_GXL
519         phy_meson_gxl_init();
520 #endif
521 #ifdef CONFIG_PHY_NATSEMI
522         phy_natsemi_init();
523 #endif
524 #ifdef CONFIG_PHY_REALTEK
525         phy_realtek_init();
526 #endif
527 #ifdef CONFIG_PHY_SMSC
528         phy_smsc_init();
529 #endif
530 #ifdef CONFIG_PHY_TERANETICS
531         phy_teranetics_init();
532 #endif
533 #ifdef CONFIG_PHY_TI
534         phy_ti_init();
535 #endif
536 #ifdef CONFIG_PHY_VITESSE
537         phy_vitesse_init();
538 #endif
539 #ifdef CONFIG_PHY_XILINX
540         phy_xilinx_init();
541 #endif
542 #ifdef CONFIG_PHY_MSCC
543         phy_mscc_init();
544 #endif
545 #ifdef CONFIG_PHY_FIXED
546         phy_fixed_init();
547 #endif
548 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
549         phy_xilinx_gmii2rgmii_init();
550 #endif
551         genphy_init();
552
553         return 0;
554 }
555
556 int phy_register(struct phy_driver *drv)
557 {
558         INIT_LIST_HEAD(&drv->list);
559         list_add_tail(&drv->list, &phy_drivers);
560
561 #ifdef CONFIG_NEEDS_MANUAL_RELOC
562         if (drv->probe)
563                 drv->probe += gd->reloc_off;
564         if (drv->config)
565                 drv->config += gd->reloc_off;
566         if (drv->startup)
567                 drv->startup += gd->reloc_off;
568         if (drv->shutdown)
569                 drv->shutdown += gd->reloc_off;
570         if (drv->readext)
571                 drv->readext += gd->reloc_off;
572         if (drv->writeext)
573                 drv->writeext += gd->reloc_off;
574         if (drv->read_mmd)
575                 drv->read_mmd += gd->reloc_off;
576         if (drv->write_mmd)
577                 drv->write_mmd += gd->reloc_off;
578 #endif
579         return 0;
580 }
581
582 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
583 {
584         /* The default values for phydev->supported are provided by the PHY
585          * driver "features" member, we want to reset to sane defaults first
586          * before supporting higher speeds.
587          */
588         phydev->supported &= PHY_DEFAULT_FEATURES;
589
590         switch (max_speed) {
591         default:
592                 return -ENOTSUPP;
593         case SPEED_1000:
594                 phydev->supported |= PHY_1000BT_FEATURES;
595                 /* fall through */
596         case SPEED_100:
597                 phydev->supported |= PHY_100BT_FEATURES;
598                 /* fall through */
599         case SPEED_10:
600                 phydev->supported |= PHY_10BT_FEATURES;
601         }
602
603         return 0;
604 }
605
606 static int phy_probe(struct phy_device *phydev)
607 {
608         int err = 0;
609
610         phydev->advertising = phydev->drv->features;
611         phydev->supported = phydev->drv->features;
612
613         phydev->mmds = phydev->drv->mmds;
614
615         if (phydev->drv->probe)
616                 err = phydev->drv->probe(phydev);
617
618         return err;
619 }
620
621 static struct phy_driver *generic_for_interface(phy_interface_t interface)
622 {
623 #ifdef CONFIG_PHYLIB_10G
624         if (is_10g_interface(interface))
625                 return &gen10g_driver;
626 #endif
627
628         return &genphy_driver;
629 }
630
631 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
632                                          phy_interface_t interface)
633 {
634         struct list_head *entry;
635         int phy_id = phydev->phy_id;
636         struct phy_driver *drv = NULL;
637
638         list_for_each(entry, &phy_drivers) {
639                 drv = list_entry(entry, struct phy_driver, list);
640                 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
641                         return drv;
642         }
643
644         /* If we made it here, there's no driver for this PHY */
645         return generic_for_interface(interface);
646 }
647
648 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
649                                             u32 phy_id, bool is_c45,
650                                             phy_interface_t interface)
651 {
652         struct phy_device *dev;
653
654         /*
655          * We allocate the device, and initialize the
656          * default values
657          */
658         dev = malloc(sizeof(*dev));
659         if (!dev) {
660                 printf("Failed to allocate PHY device for %s:%d\n",
661                        bus->name, addr);
662                 return NULL;
663         }
664
665         memset(dev, 0, sizeof(*dev));
666
667         dev->duplex = -1;
668         dev->link = 0;
669         dev->interface = interface;
670
671 #ifdef CONFIG_DM_ETH
672         dev->node = ofnode_null();
673 #endif
674
675         dev->autoneg = AUTONEG_ENABLE;
676
677         dev->addr = addr;
678         dev->phy_id = phy_id;
679         dev->is_c45 = is_c45;
680         dev->bus = bus;
681
682         dev->drv = get_phy_driver(dev, interface);
683
684         if (phy_probe(dev)) {
685                 printf("%s, PHY probe failed\n", __func__);
686                 return NULL;
687         }
688
689         if (addr >= 0 && addr < PHY_MAX_ADDR)
690                 bus->phymap[addr] = dev;
691
692         return dev;
693 }
694
695 /**
696  * get_phy_id - reads the specified addr for its ID.
697  * @bus: the target MII bus
698  * @addr: PHY address on the MII bus
699  * @phy_id: where to store the ID retrieved.
700  *
701  * Description: Reads the ID registers of the PHY at @addr on the
702  *   @bus, stores it in @phy_id and returns zero on success.
703  */
704 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
705 {
706         int phy_reg;
707
708         /*
709          * Grab the bits from PHYIR1, and put them
710          * in the upper half
711          */
712         phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
713
714         if (phy_reg < 0)
715                 return -EIO;
716
717         *phy_id = (phy_reg & 0xffff) << 16;
718
719         /* Grab the bits from PHYIR2, and put them in the lower half */
720         phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
721
722         if (phy_reg < 0)
723                 return -EIO;
724
725         *phy_id |= (phy_reg & 0xffff);
726
727         return 0;
728 }
729
730 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
731                                              uint phy_mask, int devad,
732                                              phy_interface_t interface)
733 {
734         u32 phy_id = 0xffffffff;
735         bool is_c45;
736
737         while (phy_mask) {
738                 int addr = ffs(phy_mask) - 1;
739                 int r = get_phy_id(bus, addr, devad, &phy_id);
740
741                 /*
742                  * If the PHY ID is flat 0 we ignore it.  There are C45 PHYs
743                  * that return all 0s for C22 reads (like Aquantia AQR112) and
744                  * there are C22 PHYs that return all 0s for C45 reads (like
745                  * Atheros AR8035).
746                  */
747                 if (r == 0 && phy_id == 0)
748                         goto next;
749
750                 /* If the PHY ID is mostly f's, we didn't find anything */
751                 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
752                         is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
753                         return phy_device_create(bus, addr, phy_id, is_c45,
754                                                  interface);
755                 }
756 next:
757                 phy_mask &= ~(1 << addr);
758         }
759         return NULL;
760 }
761
762 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
763                                                   uint phy_mask,
764                                                   phy_interface_t interface)
765 {
766         /* If we have one, return the existing device, with new interface */
767         while (phy_mask) {
768                 int addr = ffs(phy_mask) - 1;
769
770                 if (bus->phymap[addr]) {
771                         bus->phymap[addr]->interface = interface;
772                         return bus->phymap[addr];
773                 }
774                 phy_mask &= ~(1 << addr);
775         }
776         return NULL;
777 }
778
779 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
780                                                  uint phy_mask,
781                                                  phy_interface_t interface)
782 {
783         int i;
784         struct phy_device *phydev;
785
786         phydev = search_for_existing_phy(bus, phy_mask, interface);
787         if (phydev)
788                 return phydev;
789         /* Try Standard (ie Clause 22) access */
790         /* Otherwise we have to try Clause 45 */
791         for (i = 0; i < 5; i++) {
792                 phydev = create_phy_by_mask(bus, phy_mask,
793                                             i ? i : MDIO_DEVAD_NONE, interface);
794                 if (IS_ERR(phydev))
795                         return NULL;
796                 if (phydev)
797                         return phydev;
798         }
799
800         debug("\n%s PHY: ", bus->name);
801         while (phy_mask) {
802                 int addr = ffs(phy_mask) - 1;
803
804                 debug("%d ", addr);
805                 phy_mask &= ~(1 << addr);
806         }
807         debug("not found\n");
808
809         return NULL;
810 }
811
812 /**
813  * get_phy_device - reads the specified PHY device and returns its
814  *                  @phy_device struct
815  * @bus: the target MII bus
816  * @addr: PHY address on the MII bus
817  *
818  * Description: Reads the ID registers of the PHY at @addr on the
819  *   @bus, then allocates and returns the phy_device to represent it.
820  */
821 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
822                                          phy_interface_t interface)
823 {
824         return get_phy_device_by_mask(bus, 1 << addr, interface);
825 }
826
827 int phy_reset(struct phy_device *phydev)
828 {
829         int reg;
830         int timeout = 500;
831         int devad = MDIO_DEVAD_NONE;
832
833         if (phydev->flags & PHY_FLAG_BROKEN_RESET)
834                 return 0;
835
836 #ifdef CONFIG_PHYLIB_10G
837         /* If it's 10G, we need to issue reset through one of the MMDs */
838         if (is_10g_interface(phydev->interface)) {
839                 if (!phydev->mmds)
840                         gen10g_discover_mmds(phydev);
841
842                 devad = ffs(phydev->mmds) - 1;
843         }
844 #endif
845
846         if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
847                 debug("PHY reset failed\n");
848                 return -1;
849         }
850
851 #ifdef CONFIG_PHY_RESET_DELAY
852         udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
853 #endif
854         /*
855          * Poll the control register for the reset bit to go to 0 (it is
856          * auto-clearing).  This should happen within 0.5 seconds per the
857          * IEEE spec.
858          */
859         reg = phy_read(phydev, devad, MII_BMCR);
860         while ((reg & BMCR_RESET) && timeout--) {
861                 reg = phy_read(phydev, devad, MII_BMCR);
862
863                 if (reg < 0) {
864                         debug("PHY status read failed\n");
865                         return -1;
866                 }
867                 udelay(1000);
868         }
869
870         if (reg & BMCR_RESET) {
871                 puts("PHY reset timed out\n");
872                 return -1;
873         }
874
875         return 0;
876 }
877
878 int miiphy_reset(const char *devname, unsigned char addr)
879 {
880         struct mii_dev *bus = miiphy_get_dev_by_name(devname);
881         struct phy_device *phydev;
882
883         /*
884          * miiphy_reset was only used on standard PHYs, so we'll fake it here.
885          * If later code tries to connect with the right interface, this will
886          * be corrected by get_phy_device in phy_connect()
887          */
888         phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
889
890         return phy_reset(phydev);
891 }
892
893 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
894                                     phy_interface_t interface)
895 {
896         /* Reset the bus */
897         if (bus->reset) {
898                 bus->reset(bus);
899
900                 /* Wait 15ms to make sure the PHY has come out of hard reset */
901                 mdelay(15);
902         }
903
904         return get_phy_device_by_mask(bus, phy_mask, interface);
905 }
906
907 #ifdef CONFIG_DM_ETH
908 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
909 #else
910 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
911 #endif
912 {
913         /* Soft Reset the PHY */
914         phy_reset(phydev);
915         if (phydev->dev && phydev->dev != dev) {
916                 printf("%s:%d is connected to %s.  Reconnecting to %s\n",
917                        phydev->bus->name, phydev->addr,
918                        phydev->dev->name, dev->name);
919         }
920         phydev->dev = dev;
921         debug("%s connected to %s\n", dev->name, phydev->drv->name);
922 }
923
924 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
925 #ifdef CONFIG_DM_ETH
926 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
927                                                  struct udevice *dev,
928                                                  phy_interface_t interface)
929 #else
930 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
931                                                  struct eth_device *dev,
932                                                  phy_interface_t interface)
933 #endif
934 {
935         struct phy_device *phydev = NULL;
936         int sn = dev_of_offset(dev);
937         int off;
938
939         while (sn > 0) {
940                 off = fdt_node_offset_by_compatible(gd->fdt_blob, sn,
941                                                     "xlnx,gmii-to-rgmii-1.0");
942                 if (off > 0) {
943                         phydev = phy_device_create(bus, off,
944                                                    PHY_GMII2RGMII_ID, false,
945                                                    interface);
946                         break;
947                 }
948                 if (off == -FDT_ERR_NOTFOUND)
949                         sn = fdt_first_subnode(gd->fdt_blob, sn);
950                 else
951                         printf("%s: Error finding compat string:%d\n",
952                                __func__, off);
953         }
954
955         return phydev;
956 }
957 #endif
958
959 #ifdef CONFIG_PHY_FIXED
960 #ifdef CONFIG_DM_ETH
961 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
962                                             struct udevice *dev,
963                                             phy_interface_t interface)
964 #else
965 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
966                                             struct eth_device *dev,
967                                             phy_interface_t interface)
968 #endif
969 {
970         struct phy_device *phydev = NULL;
971         int sn;
972         const char *name;
973
974         sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
975         while (sn > 0) {
976                 name = fdt_get_name(gd->fdt_blob, sn, NULL);
977                 if (name && strcmp(name, "fixed-link") == 0) {
978                         phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
979                                                    interface);
980                         break;
981                 }
982                 sn = fdt_next_subnode(gd->fdt_blob, sn);
983         }
984
985         return phydev;
986 }
987 #endif
988
989 #ifdef CONFIG_DM_ETH
990 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
991                                struct udevice *dev,
992                                phy_interface_t interface)
993 #else
994 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
995                                struct eth_device *dev,
996                                phy_interface_t interface)
997 #endif
998 {
999         struct phy_device *phydev = NULL;
1000         uint mask = (addr > 0) ? (1 << addr) : 0xffffffff;
1001
1002 #ifdef CONFIG_PHY_FIXED
1003         phydev = phy_connect_fixed(bus, dev, interface);
1004 #endif
1005 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
1006         if (!phydev)
1007                 phydev = phy_connect_gmii2rgmii(bus, dev, interface);
1008 #endif
1009
1010         if (!phydev)
1011                 phydev = phy_find_by_mask(bus, mask, interface);
1012
1013         if (phydev)
1014                 phy_connect_dev(phydev, dev);
1015         else
1016                 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
1017         return phydev;
1018 }
1019
1020 /*
1021  * Start the PHY.  Returns 0 on success, or a negative error code.
1022  */
1023 int phy_startup(struct phy_device *phydev)
1024 {
1025         if (phydev->drv->startup)
1026                 return phydev->drv->startup(phydev);
1027
1028         return 0;
1029 }
1030
1031 __weak int board_phy_config(struct phy_device *phydev)
1032 {
1033         if (phydev->drv->config)
1034                 return phydev->drv->config(phydev);
1035         return 0;
1036 }
1037
1038 int phy_config(struct phy_device *phydev)
1039 {
1040         /* Invoke an optional board-specific helper */
1041         return board_phy_config(phydev);
1042 }
1043
1044 int phy_shutdown(struct phy_device *phydev)
1045 {
1046         if (phydev->drv->shutdown)
1047                 phydev->drv->shutdown(phydev);
1048
1049         return 0;
1050 }
1051
1052 int phy_get_interface_by_name(const char *str)
1053 {
1054         int i;
1055
1056         for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1057                 if (!strcmp(str, phy_interface_strings[i]))
1058                         return i;
1059         }
1060
1061         return -1;
1062 }