am335x: baltos: Enable DM_SPI
[platform/kernel/u-boot.git] / drivers / net / phy / phy.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Generic PHY Management code
4  *
5  * Copyright 2011 Freescale Semiconductor, Inc.
6  * author Andy Fleming
7  *
8  * Based loosely off of Linux's PHY Lib
9  */
10 #include <common.h>
11 #include <console.h>
12 #include <dm.h>
13 #include <log.h>
14 #include <malloc.h>
15 #include <net.h>
16 #include <command.h>
17 #include <miiphy.h>
18 #include <phy.h>
19 #include <errno.h>
20 #include <linux/bitops.h>
21 #include <linux/delay.h>
22 #include <linux/err.h>
23 #include <linux/compiler.h>
24
25 DECLARE_GLOBAL_DATA_PTR;
26
27 /* Generic PHY support and helper functions */
28
29 /**
30  * genphy_config_advert - sanitize and advertise auto-negotiation parameters
31  * @phydev: target phy_device struct
32  *
33  * Description: Writes MII_ADVERTISE with the appropriate values,
34  *   after sanitizing the values to make sure we only advertise
35  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
36  *   hasn't changed, and > 0 if it has changed.
37  */
38 static int genphy_config_advert(struct phy_device *phydev)
39 {
40         u32 advertise;
41         int oldadv, adv, bmsr;
42         int err, changed = 0;
43
44         /* Only allow advertising what this PHY supports */
45         phydev->advertising &= phydev->supported;
46         advertise = phydev->advertising;
47
48         /* Setup standard advertisement */
49         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
50         oldadv = adv;
51
52         if (adv < 0)
53                 return adv;
54
55         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
56                  ADVERTISE_PAUSE_ASYM);
57         if (advertise & ADVERTISED_10baseT_Half)
58                 adv |= ADVERTISE_10HALF;
59         if (advertise & ADVERTISED_10baseT_Full)
60                 adv |= ADVERTISE_10FULL;
61         if (advertise & ADVERTISED_100baseT_Half)
62                 adv |= ADVERTISE_100HALF;
63         if (advertise & ADVERTISED_100baseT_Full)
64                 adv |= ADVERTISE_100FULL;
65         if (advertise & ADVERTISED_Pause)
66                 adv |= ADVERTISE_PAUSE_CAP;
67         if (advertise & ADVERTISED_Asym_Pause)
68                 adv |= ADVERTISE_PAUSE_ASYM;
69         if (advertise & ADVERTISED_1000baseX_Half)
70                 adv |= ADVERTISE_1000XHALF;
71         if (advertise & ADVERTISED_1000baseX_Full)
72                 adv |= ADVERTISE_1000XFULL;
73
74         if (adv != oldadv) {
75                 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
76
77                 if (err < 0)
78                         return err;
79                 changed = 1;
80         }
81
82         bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
83         if (bmsr < 0)
84                 return bmsr;
85
86         /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
87          * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
88          * logical 1.
89          */
90         if (!(bmsr & BMSR_ESTATEN))
91                 return changed;
92
93         /* Configure gigabit if it's supported */
94         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
95         oldadv = adv;
96
97         if (adv < 0)
98                 return adv;
99
100         adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
101
102         if (phydev->supported & (SUPPORTED_1000baseT_Half |
103                                 SUPPORTED_1000baseT_Full)) {
104                 if (advertise & SUPPORTED_1000baseT_Half)
105                         adv |= ADVERTISE_1000HALF;
106                 if (advertise & SUPPORTED_1000baseT_Full)
107                         adv |= ADVERTISE_1000FULL;
108         }
109
110         if (adv != oldadv)
111                 changed = 1;
112
113         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
114         if (err < 0)
115                 return err;
116
117         return changed;
118 }
119
120 /**
121  * genphy_setup_forced - configures/forces speed/duplex from @phydev
122  * @phydev: target phy_device struct
123  *
124  * Description: Configures MII_BMCR to force speed/duplex
125  *   to the values in phydev. Assumes that the values are valid.
126  */
127 static int genphy_setup_forced(struct phy_device *phydev)
128 {
129         int err;
130         int ctl = BMCR_ANRESTART;
131
132         phydev->pause = 0;
133         phydev->asym_pause = 0;
134
135         if (phydev->speed == SPEED_1000)
136                 ctl |= BMCR_SPEED1000;
137         else if (phydev->speed == SPEED_100)
138                 ctl |= BMCR_SPEED100;
139
140         if (phydev->duplex == DUPLEX_FULL)
141                 ctl |= BMCR_FULLDPLX;
142
143         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
144
145         return err;
146 }
147
148 /**
149  * genphy_restart_aneg - Enable and Restart Autonegotiation
150  * @phydev: target phy_device struct
151  */
152 int genphy_restart_aneg(struct phy_device *phydev)
153 {
154         int ctl;
155
156         ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
157
158         if (ctl < 0)
159                 return ctl;
160
161         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
162
163         /* Don't isolate the PHY if we're negotiating */
164         ctl &= ~(BMCR_ISOLATE);
165
166         ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
167
168         return ctl;
169 }
170
171 /**
172  * genphy_config_aneg - restart auto-negotiation or write BMCR
173  * @phydev: target phy_device struct
174  *
175  * Description: If auto-negotiation is enabled, we configure the
176  *   advertising, and then restart auto-negotiation.  If it is not
177  *   enabled, then we write the BMCR.
178  */
179 int genphy_config_aneg(struct phy_device *phydev)
180 {
181         int result;
182
183         if (phydev->autoneg != AUTONEG_ENABLE)
184                 return genphy_setup_forced(phydev);
185
186         result = genphy_config_advert(phydev);
187
188         if (result < 0) /* error */
189                 return result;
190
191         if (result == 0) {
192                 /*
193                  * Advertisment hasn't changed, but maybe aneg was never on to
194                  * begin with?  Or maybe phy was isolated?
195                  */
196                 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
197
198                 if (ctl < 0)
199                         return ctl;
200
201                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
202                         result = 1; /* do restart aneg */
203         }
204
205         /*
206          * Only restart aneg if we are advertising something different
207          * than we were before.
208          */
209         if (result > 0)
210                 result = genphy_restart_aneg(phydev);
211
212         return result;
213 }
214
215 /**
216  * genphy_update_link - update link status in @phydev
217  * @phydev: target phy_device struct
218  *
219  * Description: Update the value in phydev->link to reflect the
220  *   current link value.  In order to do this, we need to read
221  *   the status register twice, keeping the second value.
222  */
223 int genphy_update_link(struct phy_device *phydev)
224 {
225         unsigned int mii_reg;
226
227         /*
228          * Wait if the link is up, and autonegotiation is in progress
229          * (ie - we're capable and it's not done)
230          */
231         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
232
233         /*
234          * If we already saw the link up, and it hasn't gone down, then
235          * we don't need to wait for autoneg again
236          */
237         if (phydev->link && mii_reg & BMSR_LSTATUS)
238                 return 0;
239
240         if ((phydev->autoneg == AUTONEG_ENABLE) &&
241             !(mii_reg & BMSR_ANEGCOMPLETE)) {
242                 int i = 0;
243
244                 printf("%s Waiting for PHY auto negotiation to complete",
245                        phydev->dev->name);
246                 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
247                         /*
248                          * Timeout reached ?
249                          */
250                         if (i > (PHY_ANEG_TIMEOUT / 50)) {
251                                 printf(" TIMEOUT !\n");
252                                 phydev->link = 0;
253                                 return -ETIMEDOUT;
254                         }
255
256                         if (ctrlc()) {
257                                 puts("user interrupt!\n");
258                                 phydev->link = 0;
259                                 return -EINTR;
260                         }
261
262                         if ((i++ % 10) == 0)
263                                 printf(".");
264
265                         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
266                         mdelay(50);     /* 50 ms */
267                 }
268                 printf(" done\n");
269                 phydev->link = 1;
270         } else {
271                 /* Read the link a second time to clear the latched state */
272                 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
273
274                 if (mii_reg & BMSR_LSTATUS)
275                         phydev->link = 1;
276                 else
277                         phydev->link = 0;
278         }
279
280         return 0;
281 }
282
283 /*
284  * Generic function which updates the speed and duplex.  If
285  * autonegotiation is enabled, it uses the AND of the link
286  * partner's advertised capabilities and our advertised
287  * capabilities.  If autonegotiation is disabled, we use the
288  * appropriate bits in the control register.
289  *
290  * Stolen from Linux's mii.c and phy_device.c
291  */
292 int genphy_parse_link(struct phy_device *phydev)
293 {
294         int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
295
296         /* We're using autonegotiation */
297         if (phydev->autoneg == AUTONEG_ENABLE) {
298                 u32 lpa = 0;
299                 int gblpa = 0;
300                 u32 estatus = 0;
301
302                 /* Check for gigabit capability */
303                 if (phydev->supported & (SUPPORTED_1000baseT_Full |
304                                         SUPPORTED_1000baseT_Half)) {
305                         /* We want a list of states supported by
306                          * both PHYs in the link
307                          */
308                         gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
309                         if (gblpa < 0) {
310                                 debug("Could not read MII_STAT1000. ");
311                                 debug("Ignoring gigabit capability\n");
312                                 gblpa = 0;
313                         }
314                         gblpa &= phy_read(phydev,
315                                         MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
316                 }
317
318                 /* Set the baseline so we only have to set them
319                  * if they're different
320                  */
321                 phydev->speed = SPEED_10;
322                 phydev->duplex = DUPLEX_HALF;
323
324                 /* Check the gigabit fields */
325                 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
326                         phydev->speed = SPEED_1000;
327
328                         if (gblpa & PHY_1000BTSR_1000FD)
329                                 phydev->duplex = DUPLEX_FULL;
330
331                         /* We're done! */
332                         return 0;
333                 }
334
335                 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
336                 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
337
338                 if (lpa & (LPA_100FULL | LPA_100HALF)) {
339                         phydev->speed = SPEED_100;
340
341                         if (lpa & LPA_100FULL)
342                                 phydev->duplex = DUPLEX_FULL;
343
344                 } else if (lpa & LPA_10FULL) {
345                         phydev->duplex = DUPLEX_FULL;
346                 }
347
348                 /*
349                  * Extended status may indicate that the PHY supports
350                  * 1000BASE-T/X even though the 1000BASE-T registers
351                  * are missing. In this case we can't tell whether the
352                  * peer also supports it, so we only check extended
353                  * status if the 1000BASE-T registers are actually
354                  * missing.
355                  */
356                 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
357                         estatus = phy_read(phydev, MDIO_DEVAD_NONE,
358                                            MII_ESTATUS);
359
360                 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
361                                 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
362                         phydev->speed = SPEED_1000;
363                         if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
364                                 phydev->duplex = DUPLEX_FULL;
365                 }
366
367         } else {
368                 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
369
370                 phydev->speed = SPEED_10;
371                 phydev->duplex = DUPLEX_HALF;
372
373                 if (bmcr & BMCR_FULLDPLX)
374                         phydev->duplex = DUPLEX_FULL;
375
376                 if (bmcr & BMCR_SPEED1000)
377                         phydev->speed = SPEED_1000;
378                 else if (bmcr & BMCR_SPEED100)
379                         phydev->speed = SPEED_100;
380         }
381
382         return 0;
383 }
384
385 int genphy_config(struct phy_device *phydev)
386 {
387         int val;
388         u32 features;
389
390         features = (SUPPORTED_TP | SUPPORTED_MII
391                         | SUPPORTED_AUI | SUPPORTED_FIBRE |
392                         SUPPORTED_BNC);
393
394         /* Do we support autonegotiation? */
395         val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
396
397         if (val < 0)
398                 return val;
399
400         if (val & BMSR_ANEGCAPABLE)
401                 features |= SUPPORTED_Autoneg;
402
403         if (val & BMSR_100FULL)
404                 features |= SUPPORTED_100baseT_Full;
405         if (val & BMSR_100HALF)
406                 features |= SUPPORTED_100baseT_Half;
407         if (val & BMSR_10FULL)
408                 features |= SUPPORTED_10baseT_Full;
409         if (val & BMSR_10HALF)
410                 features |= SUPPORTED_10baseT_Half;
411
412         if (val & BMSR_ESTATEN) {
413                 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
414
415                 if (val < 0)
416                         return val;
417
418                 if (val & ESTATUS_1000_TFULL)
419                         features |= SUPPORTED_1000baseT_Full;
420                 if (val & ESTATUS_1000_THALF)
421                         features |= SUPPORTED_1000baseT_Half;
422                 if (val & ESTATUS_1000_XFULL)
423                         features |= SUPPORTED_1000baseX_Full;
424                 if (val & ESTATUS_1000_XHALF)
425                         features |= SUPPORTED_1000baseX_Half;
426         }
427
428         phydev->supported &= features;
429         phydev->advertising &= features;
430
431         genphy_config_aneg(phydev);
432
433         return 0;
434 }
435
436 int genphy_startup(struct phy_device *phydev)
437 {
438         int ret;
439
440         ret = genphy_update_link(phydev);
441         if (ret)
442                 return ret;
443
444         return genphy_parse_link(phydev);
445 }
446
447 int genphy_shutdown(struct phy_device *phydev)
448 {
449         return 0;
450 }
451
452 static struct phy_driver genphy_driver = {
453         .uid            = 0xffffffff,
454         .mask           = 0xffffffff,
455         .name           = "Generic PHY",
456         .features       = PHY_GBIT_FEATURES | SUPPORTED_MII |
457                           SUPPORTED_AUI | SUPPORTED_FIBRE |
458                           SUPPORTED_BNC,
459         .config         = genphy_config,
460         .startup        = genphy_startup,
461         .shutdown       = genphy_shutdown,
462 };
463
464 int genphy_init(void)
465 {
466         return phy_register(&genphy_driver);
467 }
468
469 static LIST_HEAD(phy_drivers);
470
471 int phy_init(void)
472 {
473 #ifdef CONFIG_NEEDS_MANUAL_RELOC
474         /*
475          * The pointers inside phy_drivers also needs to be updated incase of
476          * manual reloc, without which these points to some invalid
477          * pre reloc address and leads to invalid accesses, hangs.
478          */
479         struct list_head *head = &phy_drivers;
480
481         head->next = (void *)head->next + gd->reloc_off;
482         head->prev = (void *)head->prev + gd->reloc_off;
483 #endif
484
485 #ifdef CONFIG_B53_SWITCH
486         phy_b53_init();
487 #endif
488 #ifdef CONFIG_MV88E61XX_SWITCH
489         phy_mv88e61xx_init();
490 #endif
491 #ifdef CONFIG_PHY_AQUANTIA
492         phy_aquantia_init();
493 #endif
494 #ifdef CONFIG_PHY_ATHEROS
495         phy_atheros_init();
496 #endif
497 #ifdef CONFIG_PHY_BROADCOM
498         phy_broadcom_init();
499 #endif
500 #ifdef CONFIG_PHY_CORTINA
501         phy_cortina_init();
502 #endif
503 #ifdef CONFIG_PHY_DAVICOM
504         phy_davicom_init();
505 #endif
506 #ifdef CONFIG_PHY_ET1011C
507         phy_et1011c_init();
508 #endif
509 #ifdef CONFIG_PHY_LXT
510         phy_lxt_init();
511 #endif
512 #ifdef CONFIG_PHY_MARVELL
513         phy_marvell_init();
514 #endif
515 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
516         phy_micrel_ksz8xxx_init();
517 #endif
518 #ifdef CONFIG_PHY_MICREL_KSZ90X1
519         phy_micrel_ksz90x1_init();
520 #endif
521 #ifdef CONFIG_PHY_MESON_GXL
522         phy_meson_gxl_init();
523 #endif
524 #ifdef CONFIG_PHY_NATSEMI
525         phy_natsemi_init();
526 #endif
527 #ifdef CONFIG_PHY_REALTEK
528         phy_realtek_init();
529 #endif
530 #ifdef CONFIG_PHY_SMSC
531         phy_smsc_init();
532 #endif
533 #ifdef CONFIG_PHY_TERANETICS
534         phy_teranetics_init();
535 #endif
536 #ifdef CONFIG_PHY_TI
537         phy_ti_init();
538 #endif
539 #ifdef CONFIG_PHY_VITESSE
540         phy_vitesse_init();
541 #endif
542 #ifdef CONFIG_PHY_XILINX
543         phy_xilinx_init();
544 #endif
545 #ifdef CONFIG_PHY_MSCC
546         phy_mscc_init();
547 #endif
548 #ifdef CONFIG_PHY_FIXED
549         phy_fixed_init();
550 #endif
551 #ifdef CONFIG_PHY_NCSI
552         phy_ncsi_init();
553 #endif
554 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
555         phy_xilinx_gmii2rgmii_init();
556 #endif
557         genphy_init();
558
559         return 0;
560 }
561
562 int phy_register(struct phy_driver *drv)
563 {
564         INIT_LIST_HEAD(&drv->list);
565         list_add_tail(&drv->list, &phy_drivers);
566
567 #ifdef CONFIG_NEEDS_MANUAL_RELOC
568         if (drv->probe)
569                 drv->probe += gd->reloc_off;
570         if (drv->config)
571                 drv->config += gd->reloc_off;
572         if (drv->startup)
573                 drv->startup += gd->reloc_off;
574         if (drv->shutdown)
575                 drv->shutdown += gd->reloc_off;
576         if (drv->readext)
577                 drv->readext += gd->reloc_off;
578         if (drv->writeext)
579                 drv->writeext += gd->reloc_off;
580         if (drv->read_mmd)
581                 drv->read_mmd += gd->reloc_off;
582         if (drv->write_mmd)
583                 drv->write_mmd += gd->reloc_off;
584 #endif
585         return 0;
586 }
587
588 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
589 {
590         /* The default values for phydev->supported are provided by the PHY
591          * driver "features" member, we want to reset to sane defaults first
592          * before supporting higher speeds.
593          */
594         phydev->supported &= PHY_DEFAULT_FEATURES;
595
596         switch (max_speed) {
597         default:
598                 return -ENOTSUPP;
599         case SPEED_1000:
600                 phydev->supported |= PHY_1000BT_FEATURES;
601                 /* fall through */
602         case SPEED_100:
603                 phydev->supported |= PHY_100BT_FEATURES;
604                 /* fall through */
605         case SPEED_10:
606                 phydev->supported |= PHY_10BT_FEATURES;
607         }
608
609         return 0;
610 }
611
612 static int phy_probe(struct phy_device *phydev)
613 {
614         int err = 0;
615
616         phydev->advertising = phydev->drv->features;
617         phydev->supported = phydev->drv->features;
618
619         phydev->mmds = phydev->drv->mmds;
620
621         if (phydev->drv->probe)
622                 err = phydev->drv->probe(phydev);
623
624         return err;
625 }
626
627 static struct phy_driver *generic_for_interface(phy_interface_t interface)
628 {
629 #ifdef CONFIG_PHYLIB_10G
630         if (is_10g_interface(interface))
631                 return &gen10g_driver;
632 #endif
633
634         return &genphy_driver;
635 }
636
637 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
638                                          phy_interface_t interface)
639 {
640         struct list_head *entry;
641         int phy_id = phydev->phy_id;
642         struct phy_driver *drv = NULL;
643
644         list_for_each(entry, &phy_drivers) {
645                 drv = list_entry(entry, struct phy_driver, list);
646                 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
647                         return drv;
648         }
649
650         /* If we made it here, there's no driver for this PHY */
651         return generic_for_interface(interface);
652 }
653
654 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
655                                             u32 phy_id, bool is_c45,
656                                             phy_interface_t interface)
657 {
658         struct phy_device *dev;
659
660         /*
661          * We allocate the device, and initialize the
662          * default values
663          */
664         dev = malloc(sizeof(*dev));
665         if (!dev) {
666                 printf("Failed to allocate PHY device for %s:%d\n",
667                        bus->name, addr);
668                 return NULL;
669         }
670
671         memset(dev, 0, sizeof(*dev));
672
673         dev->duplex = -1;
674         dev->link = 0;
675         dev->interface = interface;
676
677 #ifdef CONFIG_DM_ETH
678         dev->node = ofnode_null();
679 #endif
680
681         dev->autoneg = AUTONEG_ENABLE;
682
683         dev->addr = addr;
684         dev->phy_id = phy_id;
685         dev->is_c45 = is_c45;
686         dev->bus = bus;
687
688         dev->drv = get_phy_driver(dev, interface);
689
690         if (phy_probe(dev)) {
691                 printf("%s, PHY probe failed\n", __func__);
692                 return NULL;
693         }
694
695         if (addr >= 0 && addr < PHY_MAX_ADDR)
696                 bus->phymap[addr] = dev;
697
698         return dev;
699 }
700
701 /**
702  * get_phy_id - reads the specified addr for its ID.
703  * @bus: the target MII bus
704  * @addr: PHY address on the MII bus
705  * @phy_id: where to store the ID retrieved.
706  *
707  * Description: Reads the ID registers of the PHY at @addr on the
708  *   @bus, stores it in @phy_id and returns zero on success.
709  */
710 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
711 {
712         int phy_reg;
713
714         /*
715          * Grab the bits from PHYIR1, and put them
716          * in the upper half
717          */
718         phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
719
720         if (phy_reg < 0)
721                 return -EIO;
722
723         *phy_id = (phy_reg & 0xffff) << 16;
724
725         /* Grab the bits from PHYIR2, and put them in the lower half */
726         phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
727
728         if (phy_reg < 0)
729                 return -EIO;
730
731         *phy_id |= (phy_reg & 0xffff);
732
733         return 0;
734 }
735
736 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
737                                              uint phy_mask, int devad,
738                                              phy_interface_t interface)
739 {
740         u32 phy_id = 0xffffffff;
741         bool is_c45;
742
743         while (phy_mask) {
744                 int addr = ffs(phy_mask) - 1;
745                 int r = get_phy_id(bus, addr, devad, &phy_id);
746
747                 /*
748                  * If the PHY ID is flat 0 we ignore it.  There are C45 PHYs
749                  * that return all 0s for C22 reads (like Aquantia AQR112) and
750                  * there are C22 PHYs that return all 0s for C45 reads (like
751                  * Atheros AR8035).
752                  */
753                 if (r == 0 && phy_id == 0)
754                         goto next;
755
756                 /* If the PHY ID is mostly f's, we didn't find anything */
757                 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
758                         is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
759                         return phy_device_create(bus, addr, phy_id, is_c45,
760                                                  interface);
761                 }
762 next:
763                 phy_mask &= ~(1 << addr);
764         }
765         return NULL;
766 }
767
768 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
769                                                   uint phy_mask,
770                                                   phy_interface_t interface)
771 {
772         /* If we have one, return the existing device, with new interface */
773         while (phy_mask) {
774                 int addr = ffs(phy_mask) - 1;
775
776                 if (bus->phymap[addr]) {
777                         bus->phymap[addr]->interface = interface;
778                         return bus->phymap[addr];
779                 }
780                 phy_mask &= ~(1 << addr);
781         }
782         return NULL;
783 }
784
785 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
786                                                  uint phy_mask,
787                                                  phy_interface_t interface)
788 {
789         int i;
790         struct phy_device *phydev;
791
792         phydev = search_for_existing_phy(bus, phy_mask, interface);
793         if (phydev)
794                 return phydev;
795         /* Try Standard (ie Clause 22) access */
796         /* Otherwise we have to try Clause 45 */
797         for (i = 0; i < 5; i++) {
798                 phydev = create_phy_by_mask(bus, phy_mask,
799                                             i ? i : MDIO_DEVAD_NONE, interface);
800                 if (IS_ERR(phydev))
801                         return NULL;
802                 if (phydev)
803                         return phydev;
804         }
805
806         debug("\n%s PHY: ", bus->name);
807         while (phy_mask) {
808                 int addr = ffs(phy_mask) - 1;
809
810                 debug("%d ", addr);
811                 phy_mask &= ~(1 << addr);
812         }
813         debug("not found\n");
814
815         return NULL;
816 }
817
818 /**
819  * get_phy_device - reads the specified PHY device and returns its
820  *                  @phy_device struct
821  * @bus: the target MII bus
822  * @addr: PHY address on the MII bus
823  *
824  * Description: Reads the ID registers of the PHY at @addr on the
825  *   @bus, then allocates and returns the phy_device to represent it.
826  */
827 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
828                                          phy_interface_t interface)
829 {
830         return get_phy_device_by_mask(bus, 1 << addr, interface);
831 }
832
833 int phy_reset(struct phy_device *phydev)
834 {
835         int reg;
836         int timeout = 500;
837         int devad = MDIO_DEVAD_NONE;
838
839         if (phydev->flags & PHY_FLAG_BROKEN_RESET)
840                 return 0;
841
842 #ifdef CONFIG_PHYLIB_10G
843         /* If it's 10G, we need to issue reset through one of the MMDs */
844         if (is_10g_interface(phydev->interface)) {
845                 if (!phydev->mmds)
846                         gen10g_discover_mmds(phydev);
847
848                 devad = ffs(phydev->mmds) - 1;
849         }
850 #endif
851
852         if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
853                 debug("PHY reset failed\n");
854                 return -1;
855         }
856
857 #ifdef CONFIG_PHY_RESET_DELAY
858         udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
859 #endif
860         /*
861          * Poll the control register for the reset bit to go to 0 (it is
862          * auto-clearing).  This should happen within 0.5 seconds per the
863          * IEEE spec.
864          */
865         reg = phy_read(phydev, devad, MII_BMCR);
866         while ((reg & BMCR_RESET) && timeout--) {
867                 reg = phy_read(phydev, devad, MII_BMCR);
868
869                 if (reg < 0) {
870                         debug("PHY status read failed\n");
871                         return -1;
872                 }
873                 udelay(1000);
874         }
875
876         if (reg & BMCR_RESET) {
877                 puts("PHY reset timed out\n");
878                 return -1;
879         }
880
881         return 0;
882 }
883
884 int miiphy_reset(const char *devname, unsigned char addr)
885 {
886         struct mii_dev *bus = miiphy_get_dev_by_name(devname);
887         struct phy_device *phydev;
888
889         /*
890          * miiphy_reset was only used on standard PHYs, so we'll fake it here.
891          * If later code tries to connect with the right interface, this will
892          * be corrected by get_phy_device in phy_connect()
893          */
894         phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
895
896         return phy_reset(phydev);
897 }
898
899 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
900                                     phy_interface_t interface)
901 {
902         /* Reset the bus */
903         if (bus->reset) {
904                 bus->reset(bus);
905
906                 /* Wait 15ms to make sure the PHY has come out of hard reset */
907                 mdelay(15);
908         }
909
910         return get_phy_device_by_mask(bus, phy_mask, interface);
911 }
912
913 #ifdef CONFIG_DM_ETH
914 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
915 #else
916 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
917 #endif
918 {
919         /* Soft Reset the PHY */
920         phy_reset(phydev);
921         if (phydev->dev && phydev->dev != dev) {
922                 printf("%s:%d is connected to %s.  Reconnecting to %s\n",
923                        phydev->bus->name, phydev->addr,
924                        phydev->dev->name, dev->name);
925         }
926         phydev->dev = dev;
927         debug("%s connected to %s\n", dev->name, phydev->drv->name);
928 }
929
930 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
931 #ifdef CONFIG_DM_ETH
932 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
933                                                  struct udevice *dev,
934                                                  phy_interface_t interface)
935 #else
936 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
937                                                  struct eth_device *dev,
938                                                  phy_interface_t interface)
939 #endif
940 {
941         struct phy_device *phydev = NULL;
942         int sn = dev_of_offset(dev);
943         int off;
944
945         while (sn > 0) {
946                 off = fdt_node_offset_by_compatible(gd->fdt_blob, sn,
947                                                     "xlnx,gmii-to-rgmii-1.0");
948                 if (off > 0) {
949                         phydev = phy_device_create(bus, off,
950                                                    PHY_GMII2RGMII_ID, false,
951                                                    interface);
952                         break;
953                 }
954                 if (off == -FDT_ERR_NOTFOUND)
955                         sn = fdt_first_subnode(gd->fdt_blob, sn);
956                 else
957                         printf("%s: Error finding compat string:%d\n",
958                                __func__, off);
959         }
960
961         return phydev;
962 }
963 #endif
964
965 #ifdef CONFIG_PHY_FIXED
966 #ifdef CONFIG_DM_ETH
967 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
968                                             struct udevice *dev,
969                                             phy_interface_t interface)
970 #else
971 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
972                                             struct eth_device *dev,
973                                             phy_interface_t interface)
974 #endif
975 {
976         struct phy_device *phydev = NULL;
977         int sn;
978         const char *name;
979
980         sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
981         while (sn > 0) {
982                 name = fdt_get_name(gd->fdt_blob, sn, NULL);
983                 if (name && strcmp(name, "fixed-link") == 0) {
984                         phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
985                                                    interface);
986                         break;
987                 }
988                 sn = fdt_next_subnode(gd->fdt_blob, sn);
989         }
990
991         return phydev;
992 }
993 #endif
994
995 #ifdef CONFIG_DM_ETH
996 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
997                                struct udevice *dev,
998                                phy_interface_t interface)
999 #else
1000 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1001                                struct eth_device *dev,
1002                                phy_interface_t interface)
1003 #endif
1004 {
1005         struct phy_device *phydev = NULL;
1006         uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
1007
1008 #ifdef CONFIG_PHY_FIXED
1009         phydev = phy_connect_fixed(bus, dev, interface);
1010 #endif
1011
1012 #ifdef CONFIG_PHY_NCSI
1013         if (!phydev)
1014                 phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface);
1015 #endif
1016
1017 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
1018         if (!phydev)
1019                 phydev = phy_connect_gmii2rgmii(bus, dev, interface);
1020 #endif
1021
1022         if (!phydev)
1023                 phydev = phy_find_by_mask(bus, mask, interface);
1024
1025         if (phydev)
1026                 phy_connect_dev(phydev, dev);
1027         else
1028                 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
1029         return phydev;
1030 }
1031
1032 /*
1033  * Start the PHY.  Returns 0 on success, or a negative error code.
1034  */
1035 int phy_startup(struct phy_device *phydev)
1036 {
1037         if (phydev->drv->startup)
1038                 return phydev->drv->startup(phydev);
1039
1040         return 0;
1041 }
1042
1043 __weak int board_phy_config(struct phy_device *phydev)
1044 {
1045         if (phydev->drv->config)
1046                 return phydev->drv->config(phydev);
1047         return 0;
1048 }
1049
1050 int phy_config(struct phy_device *phydev)
1051 {
1052         /* Invoke an optional board-specific helper */
1053         return board_phy_config(phydev);
1054 }
1055
1056 int phy_shutdown(struct phy_device *phydev)
1057 {
1058         if (phydev->drv->shutdown)
1059                 phydev->drv->shutdown(phydev);
1060
1061         return 0;
1062 }
1063
1064 int phy_get_interface_by_name(const char *str)
1065 {
1066         int i;
1067
1068         for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1069                 if (!strcmp(str, phy_interface_strings[i]))
1070                         return i;
1071         }
1072
1073         return -1;
1074 }