travis: Move keystone 3 (k3) boards into the k2 job
[platform/kernel/u-boot.git] / drivers / net / phy / phy.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Generic PHY Management code
4  *
5  * Copyright 2011 Freescale Semiconductor, Inc.
6  * author Andy Fleming
7  *
8  * Based loosely off of Linux's PHY Lib
9  */
10 #include <common.h>
11 #include <console.h>
12 #include <dm.h>
13 #include <malloc.h>
14 #include <net.h>
15 #include <command.h>
16 #include <miiphy.h>
17 #include <phy.h>
18 #include <errno.h>
19 #include <linux/err.h>
20 #include <linux/compiler.h>
21
22 DECLARE_GLOBAL_DATA_PTR;
23
24 /* Generic PHY support and helper functions */
25
26 /**
27  * genphy_config_advert - sanitize and advertise auto-negotiation parameters
28  * @phydev: target phy_device struct
29  *
30  * Description: Writes MII_ADVERTISE with the appropriate values,
31  *   after sanitizing the values to make sure we only advertise
32  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
33  *   hasn't changed, and > 0 if it has changed.
34  */
35 static int genphy_config_advert(struct phy_device *phydev)
36 {
37         u32 advertise;
38         int oldadv, adv, bmsr;
39         int err, changed = 0;
40
41         /* Only allow advertising what this PHY supports */
42         phydev->advertising &= phydev->supported;
43         advertise = phydev->advertising;
44
45         /* Setup standard advertisement */
46         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
47         oldadv = adv;
48
49         if (adv < 0)
50                 return adv;
51
52         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
53                  ADVERTISE_PAUSE_ASYM);
54         if (advertise & ADVERTISED_10baseT_Half)
55                 adv |= ADVERTISE_10HALF;
56         if (advertise & ADVERTISED_10baseT_Full)
57                 adv |= ADVERTISE_10FULL;
58         if (advertise & ADVERTISED_100baseT_Half)
59                 adv |= ADVERTISE_100HALF;
60         if (advertise & ADVERTISED_100baseT_Full)
61                 adv |= ADVERTISE_100FULL;
62         if (advertise & ADVERTISED_Pause)
63                 adv |= ADVERTISE_PAUSE_CAP;
64         if (advertise & ADVERTISED_Asym_Pause)
65                 adv |= ADVERTISE_PAUSE_ASYM;
66         if (advertise & ADVERTISED_1000baseX_Half)
67                 adv |= ADVERTISE_1000XHALF;
68         if (advertise & ADVERTISED_1000baseX_Full)
69                 adv |= ADVERTISE_1000XFULL;
70
71         if (adv != oldadv) {
72                 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
73
74                 if (err < 0)
75                         return err;
76                 changed = 1;
77         }
78
79         bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
80         if (bmsr < 0)
81                 return bmsr;
82
83         /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
84          * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
85          * logical 1.
86          */
87         if (!(bmsr & BMSR_ESTATEN))
88                 return changed;
89
90         /* Configure gigabit if it's supported */
91         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
92         oldadv = adv;
93
94         if (adv < 0)
95                 return adv;
96
97         adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
98
99         if (phydev->supported & (SUPPORTED_1000baseT_Half |
100                                 SUPPORTED_1000baseT_Full)) {
101                 if (advertise & SUPPORTED_1000baseT_Half)
102                         adv |= ADVERTISE_1000HALF;
103                 if (advertise & SUPPORTED_1000baseT_Full)
104                         adv |= ADVERTISE_1000FULL;
105         }
106
107         if (adv != oldadv)
108                 changed = 1;
109
110         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
111         if (err < 0)
112                 return err;
113
114         return changed;
115 }
116
117 /**
118  * genphy_setup_forced - configures/forces speed/duplex from @phydev
119  * @phydev: target phy_device struct
120  *
121  * Description: Configures MII_BMCR to force speed/duplex
122  *   to the values in phydev. Assumes that the values are valid.
123  */
124 static int genphy_setup_forced(struct phy_device *phydev)
125 {
126         int err;
127         int ctl = BMCR_ANRESTART;
128
129         phydev->pause = 0;
130         phydev->asym_pause = 0;
131
132         if (phydev->speed == SPEED_1000)
133                 ctl |= BMCR_SPEED1000;
134         else if (phydev->speed == SPEED_100)
135                 ctl |= BMCR_SPEED100;
136
137         if (phydev->duplex == DUPLEX_FULL)
138                 ctl |= BMCR_FULLDPLX;
139
140         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
141
142         return err;
143 }
144
145 /**
146  * genphy_restart_aneg - Enable and Restart Autonegotiation
147  * @phydev: target phy_device struct
148  */
149 int genphy_restart_aneg(struct phy_device *phydev)
150 {
151         int ctl;
152
153         ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
154
155         if (ctl < 0)
156                 return ctl;
157
158         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
159
160         /* Don't isolate the PHY if we're negotiating */
161         ctl &= ~(BMCR_ISOLATE);
162
163         ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
164
165         return ctl;
166 }
167
168 /**
169  * genphy_config_aneg - restart auto-negotiation or write BMCR
170  * @phydev: target phy_device struct
171  *
172  * Description: If auto-negotiation is enabled, we configure the
173  *   advertising, and then restart auto-negotiation.  If it is not
174  *   enabled, then we write the BMCR.
175  */
176 int genphy_config_aneg(struct phy_device *phydev)
177 {
178         int result;
179
180         if (phydev->autoneg != AUTONEG_ENABLE)
181                 return genphy_setup_forced(phydev);
182
183         result = genphy_config_advert(phydev);
184
185         if (result < 0) /* error */
186                 return result;
187
188         if (result == 0) {
189                 /*
190                  * Advertisment hasn't changed, but maybe aneg was never on to
191                  * begin with?  Or maybe phy was isolated?
192                  */
193                 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
194
195                 if (ctl < 0)
196                         return ctl;
197
198                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
199                         result = 1; /* do restart aneg */
200         }
201
202         /*
203          * Only restart aneg if we are advertising something different
204          * than we were before.
205          */
206         if (result > 0)
207                 result = genphy_restart_aneg(phydev);
208
209         return result;
210 }
211
212 /**
213  * genphy_update_link - update link status in @phydev
214  * @phydev: target phy_device struct
215  *
216  * Description: Update the value in phydev->link to reflect the
217  *   current link value.  In order to do this, we need to read
218  *   the status register twice, keeping the second value.
219  */
220 int genphy_update_link(struct phy_device *phydev)
221 {
222         unsigned int mii_reg;
223
224         /*
225          * Wait if the link is up, and autonegotiation is in progress
226          * (ie - we're capable and it's not done)
227          */
228         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
229
230         /*
231          * If we already saw the link up, and it hasn't gone down, then
232          * we don't need to wait for autoneg again
233          */
234         if (phydev->link && mii_reg & BMSR_LSTATUS)
235                 return 0;
236
237         if ((phydev->autoneg == AUTONEG_ENABLE) &&
238             !(mii_reg & BMSR_ANEGCOMPLETE)) {
239                 int i = 0;
240
241                 printf("%s Waiting for PHY auto negotiation to complete",
242                        phydev->dev->name);
243                 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
244                         /*
245                          * Timeout reached ?
246                          */
247                         if (i > PHY_ANEG_TIMEOUT) {
248                                 printf(" TIMEOUT !\n");
249                                 phydev->link = 0;
250                                 return -ETIMEDOUT;
251                         }
252
253                         if (ctrlc()) {
254                                 puts("user interrupt!\n");
255                                 phydev->link = 0;
256                                 return -EINTR;
257                         }
258
259                         if ((i++ % 500) == 0)
260                                 printf(".");
261
262                         udelay(1000);   /* 1 ms */
263                         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
264                 }
265                 printf(" done\n");
266                 phydev->link = 1;
267         } else {
268                 /* Read the link a second time to clear the latched state */
269                 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
270
271                 if (mii_reg & BMSR_LSTATUS)
272                         phydev->link = 1;
273                 else
274                         phydev->link = 0;
275         }
276
277         return 0;
278 }
279
280 /*
281  * Generic function which updates the speed and duplex.  If
282  * autonegotiation is enabled, it uses the AND of the link
283  * partner's advertised capabilities and our advertised
284  * capabilities.  If autonegotiation is disabled, we use the
285  * appropriate bits in the control register.
286  *
287  * Stolen from Linux's mii.c and phy_device.c
288  */
289 int genphy_parse_link(struct phy_device *phydev)
290 {
291         int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
292
293         /* We're using autonegotiation */
294         if (phydev->autoneg == AUTONEG_ENABLE) {
295                 u32 lpa = 0;
296                 int gblpa = 0;
297                 u32 estatus = 0;
298
299                 /* Check for gigabit capability */
300                 if (phydev->supported & (SUPPORTED_1000baseT_Full |
301                                         SUPPORTED_1000baseT_Half)) {
302                         /* We want a list of states supported by
303                          * both PHYs in the link
304                          */
305                         gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
306                         if (gblpa < 0) {
307                                 debug("Could not read MII_STAT1000. ");
308                                 debug("Ignoring gigabit capability\n");
309                                 gblpa = 0;
310                         }
311                         gblpa &= phy_read(phydev,
312                                         MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313                 }
314
315                 /* Set the baseline so we only have to set them
316                  * if they're different
317                  */
318                 phydev->speed = SPEED_10;
319                 phydev->duplex = DUPLEX_HALF;
320
321                 /* Check the gigabit fields */
322                 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323                         phydev->speed = SPEED_1000;
324
325                         if (gblpa & PHY_1000BTSR_1000FD)
326                                 phydev->duplex = DUPLEX_FULL;
327
328                         /* We're done! */
329                         return 0;
330                 }
331
332                 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333                 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334
335                 if (lpa & (LPA_100FULL | LPA_100HALF)) {
336                         phydev->speed = SPEED_100;
337
338                         if (lpa & LPA_100FULL)
339                                 phydev->duplex = DUPLEX_FULL;
340
341                 } else if (lpa & LPA_10FULL) {
342                         phydev->duplex = DUPLEX_FULL;
343                 }
344
345                 /*
346                  * Extended status may indicate that the PHY supports
347                  * 1000BASE-T/X even though the 1000BASE-T registers
348                  * are missing. In this case we can't tell whether the
349                  * peer also supports it, so we only check extended
350                  * status if the 1000BASE-T registers are actually
351                  * missing.
352                  */
353                 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
354                         estatus = phy_read(phydev, MDIO_DEVAD_NONE,
355                                            MII_ESTATUS);
356
357                 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
358                                 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
359                         phydev->speed = SPEED_1000;
360                         if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
361                                 phydev->duplex = DUPLEX_FULL;
362                 }
363
364         } else {
365                 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
366
367                 phydev->speed = SPEED_10;
368                 phydev->duplex = DUPLEX_HALF;
369
370                 if (bmcr & BMCR_FULLDPLX)
371                         phydev->duplex = DUPLEX_FULL;
372
373                 if (bmcr & BMCR_SPEED1000)
374                         phydev->speed = SPEED_1000;
375                 else if (bmcr & BMCR_SPEED100)
376                         phydev->speed = SPEED_100;
377         }
378
379         return 0;
380 }
381
382 int genphy_config(struct phy_device *phydev)
383 {
384         int val;
385         u32 features;
386
387         features = (SUPPORTED_TP | SUPPORTED_MII
388                         | SUPPORTED_AUI | SUPPORTED_FIBRE |
389                         SUPPORTED_BNC);
390
391         /* Do we support autonegotiation? */
392         val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
393
394         if (val < 0)
395                 return val;
396
397         if (val & BMSR_ANEGCAPABLE)
398                 features |= SUPPORTED_Autoneg;
399
400         if (val & BMSR_100FULL)
401                 features |= SUPPORTED_100baseT_Full;
402         if (val & BMSR_100HALF)
403                 features |= SUPPORTED_100baseT_Half;
404         if (val & BMSR_10FULL)
405                 features |= SUPPORTED_10baseT_Full;
406         if (val & BMSR_10HALF)
407                 features |= SUPPORTED_10baseT_Half;
408
409         if (val & BMSR_ESTATEN) {
410                 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
411
412                 if (val < 0)
413                         return val;
414
415                 if (val & ESTATUS_1000_TFULL)
416                         features |= SUPPORTED_1000baseT_Full;
417                 if (val & ESTATUS_1000_THALF)
418                         features |= SUPPORTED_1000baseT_Half;
419                 if (val & ESTATUS_1000_XFULL)
420                         features |= SUPPORTED_1000baseX_Full;
421                 if (val & ESTATUS_1000_XHALF)
422                         features |= SUPPORTED_1000baseX_Half;
423         }
424
425         phydev->supported &= features;
426         phydev->advertising &= features;
427
428         genphy_config_aneg(phydev);
429
430         return 0;
431 }
432
433 int genphy_startup(struct phy_device *phydev)
434 {
435         int ret;
436
437         ret = genphy_update_link(phydev);
438         if (ret)
439                 return ret;
440
441         return genphy_parse_link(phydev);
442 }
443
444 int genphy_shutdown(struct phy_device *phydev)
445 {
446         return 0;
447 }
448
449 static struct phy_driver genphy_driver = {
450         .uid            = 0xffffffff,
451         .mask           = 0xffffffff,
452         .name           = "Generic PHY",
453         .features       = PHY_GBIT_FEATURES | SUPPORTED_MII |
454                           SUPPORTED_AUI | SUPPORTED_FIBRE |
455                           SUPPORTED_BNC,
456         .config         = genphy_config,
457         .startup        = genphy_startup,
458         .shutdown       = genphy_shutdown,
459 };
460
461 static LIST_HEAD(phy_drivers);
462
463 int phy_init(void)
464 {
465 #ifdef CONFIG_NEEDS_MANUAL_RELOC
466         /*
467          * The pointers inside phy_drivers also needs to be updated incase of
468          * manual reloc, without which these points to some invalid
469          * pre reloc address and leads to invalid accesses, hangs.
470          */
471         struct list_head *head = &phy_drivers;
472
473         head->next = (void *)head->next + gd->reloc_off;
474         head->prev = (void *)head->prev + gd->reloc_off;
475 #endif
476
477 #ifdef CONFIG_B53_SWITCH
478         phy_b53_init();
479 #endif
480 #ifdef CONFIG_MV88E61XX_SWITCH
481         phy_mv88e61xx_init();
482 #endif
483 #ifdef CONFIG_PHY_AQUANTIA
484         phy_aquantia_init();
485 #endif
486 #ifdef CONFIG_PHY_ATHEROS
487         phy_atheros_init();
488 #endif
489 #ifdef CONFIG_PHY_BROADCOM
490         phy_broadcom_init();
491 #endif
492 #ifdef CONFIG_PHY_CORTINA
493         phy_cortina_init();
494 #endif
495 #ifdef CONFIG_PHY_DAVICOM
496         phy_davicom_init();
497 #endif
498 #ifdef CONFIG_PHY_ET1011C
499         phy_et1011c_init();
500 #endif
501 #ifdef CONFIG_PHY_LXT
502         phy_lxt_init();
503 #endif
504 #ifdef CONFIG_PHY_MARVELL
505         phy_marvell_init();
506 #endif
507 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
508         phy_micrel_ksz8xxx_init();
509 #endif
510 #ifdef CONFIG_PHY_MICREL_KSZ90X1
511         phy_micrel_ksz90x1_init();
512 #endif
513 #ifdef CONFIG_PHY_MESON_GXL
514         phy_meson_gxl_init();
515 #endif
516 #ifdef CONFIG_PHY_NATSEMI
517         phy_natsemi_init();
518 #endif
519 #ifdef CONFIG_PHY_REALTEK
520         phy_realtek_init();
521 #endif
522 #ifdef CONFIG_PHY_SMSC
523         phy_smsc_init();
524 #endif
525 #ifdef CONFIG_PHY_TERANETICS
526         phy_teranetics_init();
527 #endif
528 #ifdef CONFIG_PHY_TI
529         phy_ti_init();
530 #endif
531 #ifdef CONFIG_PHY_VITESSE
532         phy_vitesse_init();
533 #endif
534 #ifdef CONFIG_PHY_XILINX
535         phy_xilinx_init();
536 #endif
537 #ifdef CONFIG_PHY_MSCC
538         phy_mscc_init();
539 #endif
540 #ifdef CONFIG_PHY_FIXED
541         phy_fixed_init();
542 #endif
543         return 0;
544 }
545
546 int phy_register(struct phy_driver *drv)
547 {
548         INIT_LIST_HEAD(&drv->list);
549         list_add_tail(&drv->list, &phy_drivers);
550
551 #ifdef CONFIG_NEEDS_MANUAL_RELOC
552         if (drv->probe)
553                 drv->probe += gd->reloc_off;
554         if (drv->config)
555                 drv->config += gd->reloc_off;
556         if (drv->startup)
557                 drv->startup += gd->reloc_off;
558         if (drv->shutdown)
559                 drv->shutdown += gd->reloc_off;
560         if (drv->readext)
561                 drv->readext += gd->reloc_off;
562         if (drv->writeext)
563                 drv->writeext += gd->reloc_off;
564         if (drv->read_mmd)
565                 drv->read_mmd += gd->reloc_off;
566         if (drv->write_mmd)
567                 drv->write_mmd += gd->reloc_off;
568 #endif
569         return 0;
570 }
571
572 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
573 {
574         /* The default values for phydev->supported are provided by the PHY
575          * driver "features" member, we want to reset to sane defaults first
576          * before supporting higher speeds.
577          */
578         phydev->supported &= PHY_DEFAULT_FEATURES;
579
580         switch (max_speed) {
581         default:
582                 return -ENOTSUPP;
583         case SPEED_1000:
584                 phydev->supported |= PHY_1000BT_FEATURES;
585                 /* fall through */
586         case SPEED_100:
587                 phydev->supported |= PHY_100BT_FEATURES;
588                 /* fall through */
589         case SPEED_10:
590                 phydev->supported |= PHY_10BT_FEATURES;
591         }
592
593         return 0;
594 }
595
596 static int phy_probe(struct phy_device *phydev)
597 {
598         int err = 0;
599
600         phydev->advertising = phydev->drv->features;
601         phydev->supported = phydev->drv->features;
602
603         phydev->mmds = phydev->drv->mmds;
604
605         if (phydev->drv->probe)
606                 err = phydev->drv->probe(phydev);
607
608         return err;
609 }
610
611 static struct phy_driver *generic_for_interface(phy_interface_t interface)
612 {
613 #ifdef CONFIG_PHYLIB_10G
614         if (is_10g_interface(interface))
615                 return &gen10g_driver;
616 #endif
617
618         return &genphy_driver;
619 }
620
621 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
622                                          phy_interface_t interface)
623 {
624         struct list_head *entry;
625         int phy_id = phydev->phy_id;
626         struct phy_driver *drv = NULL;
627
628         list_for_each(entry, &phy_drivers) {
629                 drv = list_entry(entry, struct phy_driver, list);
630                 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
631                         return drv;
632         }
633
634         /* If we made it here, there's no driver for this PHY */
635         return generic_for_interface(interface);
636 }
637
638 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
639                                             u32 phy_id, bool is_c45,
640                                             phy_interface_t interface)
641 {
642         struct phy_device *dev;
643
644         /*
645          * We allocate the device, and initialize the
646          * default values
647          */
648         dev = malloc(sizeof(*dev));
649         if (!dev) {
650                 printf("Failed to allocate PHY device for %s:%d\n",
651                        bus->name, addr);
652                 return NULL;
653         }
654
655         memset(dev, 0, sizeof(*dev));
656
657         dev->duplex = -1;
658         dev->link = 0;
659         dev->interface = interface;
660
661 #ifdef CONFIG_DM_ETH
662         dev->node = ofnode_null();
663 #endif
664
665         dev->autoneg = AUTONEG_ENABLE;
666
667         dev->addr = addr;
668         dev->phy_id = phy_id;
669         dev->is_c45 = is_c45;
670         dev->bus = bus;
671
672         dev->drv = get_phy_driver(dev, interface);
673
674         if (phy_probe(dev)) {
675                 printf("%s, PHY probe failed\n", __func__);
676                 return NULL;
677         }
678
679         if (addr >= 0 && addr < PHY_MAX_ADDR)
680                 bus->phymap[addr] = dev;
681
682         return dev;
683 }
684
685 /**
686  * get_phy_id - reads the specified addr for its ID.
687  * @bus: the target MII bus
688  * @addr: PHY address on the MII bus
689  * @phy_id: where to store the ID retrieved.
690  *
691  * Description: Reads the ID registers of the PHY at @addr on the
692  *   @bus, stores it in @phy_id and returns zero on success.
693  */
694 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
695 {
696         int phy_reg;
697
698         /*
699          * Grab the bits from PHYIR1, and put them
700          * in the upper half
701          */
702         phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
703
704         if (phy_reg < 0)
705                 return -EIO;
706
707         *phy_id = (phy_reg & 0xffff) << 16;
708
709         /* Grab the bits from PHYIR2, and put them in the lower half */
710         phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
711
712         if (phy_reg < 0)
713                 return -EIO;
714
715         *phy_id |= (phy_reg & 0xffff);
716
717         return 0;
718 }
719
720 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
721                                              uint phy_mask, int devad,
722                                              phy_interface_t interface)
723 {
724         u32 phy_id = 0xffffffff;
725         bool is_c45;
726
727         while (phy_mask) {
728                 int addr = ffs(phy_mask) - 1;
729                 int r = get_phy_id(bus, addr, devad, &phy_id);
730
731                 /*
732                  * If the PHY ID is flat 0 we ignore it.  There are C45 PHYs
733                  * that return all 0s for C22 reads (like Aquantia AQR112) and
734                  * there are C22 PHYs that return all 0s for C45 reads (like
735                  * Atheros AR8035).
736                  */
737                 if (r == 0 && phy_id == 0)
738                         goto next;
739
740                 /* If the PHY ID is mostly f's, we didn't find anything */
741                 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
742                         is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
743                         return phy_device_create(bus, addr, phy_id, is_c45,
744                                                  interface);
745                 }
746 next:
747                 phy_mask &= ~(1 << addr);
748         }
749         return NULL;
750 }
751
752 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
753                                                   uint phy_mask,
754                                                   phy_interface_t interface)
755 {
756         /* If we have one, return the existing device, with new interface */
757         while (phy_mask) {
758                 int addr = ffs(phy_mask) - 1;
759
760                 if (bus->phymap[addr]) {
761                         bus->phymap[addr]->interface = interface;
762                         return bus->phymap[addr];
763                 }
764                 phy_mask &= ~(1 << addr);
765         }
766         return NULL;
767 }
768
769 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
770                                                  uint phy_mask,
771                                                  phy_interface_t interface)
772 {
773         int i;
774         struct phy_device *phydev;
775
776         phydev = search_for_existing_phy(bus, phy_mask, interface);
777         if (phydev)
778                 return phydev;
779         /* Try Standard (ie Clause 22) access */
780         /* Otherwise we have to try Clause 45 */
781         for (i = 0; i < 5; i++) {
782                 phydev = create_phy_by_mask(bus, phy_mask,
783                                             i ? i : MDIO_DEVAD_NONE, interface);
784                 if (IS_ERR(phydev))
785                         return NULL;
786                 if (phydev)
787                         return phydev;
788         }
789
790         debug("\n%s PHY: ", bus->name);
791         while (phy_mask) {
792                 int addr = ffs(phy_mask) - 1;
793
794                 debug("%d ", addr);
795                 phy_mask &= ~(1 << addr);
796         }
797         debug("not found\n");
798
799         return NULL;
800 }
801
802 /**
803  * get_phy_device - reads the specified PHY device and returns its
804  *                  @phy_device struct
805  * @bus: the target MII bus
806  * @addr: PHY address on the MII bus
807  *
808  * Description: Reads the ID registers of the PHY at @addr on the
809  *   @bus, then allocates and returns the phy_device to represent it.
810  */
811 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
812                                          phy_interface_t interface)
813 {
814         return get_phy_device_by_mask(bus, 1 << addr, interface);
815 }
816
817 int phy_reset(struct phy_device *phydev)
818 {
819         int reg;
820         int timeout = 500;
821         int devad = MDIO_DEVAD_NONE;
822
823         if (phydev->flags & PHY_FLAG_BROKEN_RESET)
824                 return 0;
825
826 #ifdef CONFIG_PHYLIB_10G
827         /* If it's 10G, we need to issue reset through one of the MMDs */
828         if (is_10g_interface(phydev->interface)) {
829                 if (!phydev->mmds)
830                         gen10g_discover_mmds(phydev);
831
832                 devad = ffs(phydev->mmds) - 1;
833         }
834 #endif
835
836         if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
837                 debug("PHY reset failed\n");
838                 return -1;
839         }
840
841 #ifdef CONFIG_PHY_RESET_DELAY
842         udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
843 #endif
844         /*
845          * Poll the control register for the reset bit to go to 0 (it is
846          * auto-clearing).  This should happen within 0.5 seconds per the
847          * IEEE spec.
848          */
849         reg = phy_read(phydev, devad, MII_BMCR);
850         while ((reg & BMCR_RESET) && timeout--) {
851                 reg = phy_read(phydev, devad, MII_BMCR);
852
853                 if (reg < 0) {
854                         debug("PHY status read failed\n");
855                         return -1;
856                 }
857                 udelay(1000);
858         }
859
860         if (reg & BMCR_RESET) {
861                 puts("PHY reset timed out\n");
862                 return -1;
863         }
864
865         return 0;
866 }
867
868 int miiphy_reset(const char *devname, unsigned char addr)
869 {
870         struct mii_dev *bus = miiphy_get_dev_by_name(devname);
871         struct phy_device *phydev;
872
873         /*
874          * miiphy_reset was only used on standard PHYs, so we'll fake it here.
875          * If later code tries to connect with the right interface, this will
876          * be corrected by get_phy_device in phy_connect()
877          */
878         phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
879
880         return phy_reset(phydev);
881 }
882
883 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
884                                     phy_interface_t interface)
885 {
886         /* Reset the bus */
887         if (bus->reset) {
888                 bus->reset(bus);
889
890                 /* Wait 15ms to make sure the PHY has come out of hard reset */
891                 mdelay(15);
892         }
893
894         return get_phy_device_by_mask(bus, phy_mask, interface);
895 }
896
897 #ifdef CONFIG_DM_ETH
898 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
899 #else
900 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
901 #endif
902 {
903         /* Soft Reset the PHY */
904         phy_reset(phydev);
905         if (phydev->dev && phydev->dev != dev) {
906                 printf("%s:%d is connected to %s.  Reconnecting to %s\n",
907                        phydev->bus->name, phydev->addr,
908                        phydev->dev->name, dev->name);
909         }
910         phydev->dev = dev;
911         debug("%s connected to %s\n", dev->name, phydev->drv->name);
912 }
913
914 #ifdef CONFIG_PHY_FIXED
915 #ifdef CONFIG_DM_ETH
916 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
917                                             struct udevice *dev,
918                                             phy_interface_t interface)
919 #else
920 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
921                                             struct eth_device *dev,
922                                             phy_interface_t interface)
923 #endif
924 {
925         struct phy_device *phydev = NULL;
926         int sn;
927         const char *name;
928
929         sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
930         while (sn > 0) {
931                 name = fdt_get_name(gd->fdt_blob, sn, NULL);
932                 if (name && strcmp(name, "fixed-link") == 0) {
933                         phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
934                                                    interface);
935                         break;
936                 }
937                 sn = fdt_next_subnode(gd->fdt_blob, sn);
938         }
939
940         return phydev;
941 }
942 #endif
943
944 #ifdef CONFIG_DM_ETH
945 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
946                                struct udevice *dev,
947                                phy_interface_t interface)
948 #else
949 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
950                                struct eth_device *dev,
951                                phy_interface_t interface)
952 #endif
953 {
954         struct phy_device *phydev = NULL;
955         uint mask = (addr > 0) ? (1 << addr) : 0xffffffff;
956
957 #ifdef CONFIG_PHY_FIXED
958         phydev = phy_connect_fixed(bus, dev, interface);
959 #endif
960
961         if (!phydev)
962                 phydev = phy_find_by_mask(bus, mask, interface);
963
964         if (phydev)
965                 phy_connect_dev(phydev, dev);
966         else
967                 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
968         return phydev;
969 }
970
971 /*
972  * Start the PHY.  Returns 0 on success, or a negative error code.
973  */
974 int phy_startup(struct phy_device *phydev)
975 {
976         if (phydev->drv->startup)
977                 return phydev->drv->startup(phydev);
978
979         return 0;
980 }
981
982 __weak int board_phy_config(struct phy_device *phydev)
983 {
984         if (phydev->drv->config)
985                 return phydev->drv->config(phydev);
986         return 0;
987 }
988
989 int phy_config(struct phy_device *phydev)
990 {
991         /* Invoke an optional board-specific helper */
992         return board_phy_config(phydev);
993 }
994
995 int phy_shutdown(struct phy_device *phydev)
996 {
997         if (phydev->drv->shutdown)
998                 phydev->drv->shutdown(phydev);
999
1000         return 0;
1001 }
1002
1003 int phy_get_interface_by_name(const char *str)
1004 {
1005         int i;
1006
1007         for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1008                 if (!strcmp(str, phy_interface_strings[i]))
1009                         return i;
1010         }
1011
1012         return -1;
1013 }