1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic PHY Management code
5 * Copyright 2011 Freescale Semiconductor, Inc.
8 * Based loosely off of Linux's PHY Lib
20 #include <asm/global_data.h>
21 #include <dm/of_extra.h>
22 #include <linux/bitops.h>
23 #include <linux/delay.h>
24 #include <linux/err.h>
25 #include <linux/compiler.h>
27 DECLARE_GLOBAL_DATA_PTR;
29 /* Generic PHY support and helper functions */
32 * genphy_config_advert - sanitize and advertise auto-negotiation parameters
33 * @phydev: target phy_device struct
35 * Description: Writes MII_ADVERTISE with the appropriate values,
36 * after sanitizing the values to make sure we only advertise
37 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
38 * hasn't changed, and > 0 if it has changed.
40 static int genphy_config_advert(struct phy_device *phydev)
43 int oldadv, adv, bmsr;
46 /* Only allow advertising what this PHY supports */
47 phydev->advertising &= phydev->supported;
48 advertise = phydev->advertising;
50 /* Setup standard advertisement */
51 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
57 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
58 ADVERTISE_PAUSE_ASYM);
59 if (advertise & ADVERTISED_10baseT_Half)
60 adv |= ADVERTISE_10HALF;
61 if (advertise & ADVERTISED_10baseT_Full)
62 adv |= ADVERTISE_10FULL;
63 if (advertise & ADVERTISED_100baseT_Half)
64 adv |= ADVERTISE_100HALF;
65 if (advertise & ADVERTISED_100baseT_Full)
66 adv |= ADVERTISE_100FULL;
67 if (advertise & ADVERTISED_Pause)
68 adv |= ADVERTISE_PAUSE_CAP;
69 if (advertise & ADVERTISED_Asym_Pause)
70 adv |= ADVERTISE_PAUSE_ASYM;
71 if (advertise & ADVERTISED_1000baseX_Half)
72 adv |= ADVERTISE_1000XHALF;
73 if (advertise & ADVERTISED_1000baseX_Full)
74 adv |= ADVERTISE_1000XFULL;
77 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
84 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
88 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
89 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
92 if (!(bmsr & BMSR_ESTATEN))
95 /* Configure gigabit if it's supported */
96 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
102 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
104 if (phydev->supported & (SUPPORTED_1000baseT_Half |
105 SUPPORTED_1000baseT_Full)) {
106 if (advertise & SUPPORTED_1000baseT_Half)
107 adv |= ADVERTISE_1000HALF;
108 if (advertise & SUPPORTED_1000baseT_Full)
109 adv |= ADVERTISE_1000FULL;
115 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
123 * genphy_setup_forced - configures/forces speed/duplex from @phydev
124 * @phydev: target phy_device struct
126 * Description: Configures MII_BMCR to force speed/duplex
127 * to the values in phydev. Assumes that the values are valid.
129 static int genphy_setup_forced(struct phy_device *phydev)
132 int ctl = BMCR_ANRESTART;
135 phydev->asym_pause = 0;
137 if (phydev->speed == SPEED_1000)
138 ctl |= BMCR_SPEED1000;
139 else if (phydev->speed == SPEED_100)
140 ctl |= BMCR_SPEED100;
142 if (phydev->duplex == DUPLEX_FULL)
143 ctl |= BMCR_FULLDPLX;
145 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
151 * genphy_restart_aneg - Enable and Restart Autonegotiation
152 * @phydev: target phy_device struct
154 int genphy_restart_aneg(struct phy_device *phydev)
158 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
163 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
165 /* Don't isolate the PHY if we're negotiating */
166 ctl &= ~(BMCR_ISOLATE);
168 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
174 * genphy_config_aneg - restart auto-negotiation or write BMCR
175 * @phydev: target phy_device struct
177 * Description: If auto-negotiation is enabled, we configure the
178 * advertising, and then restart auto-negotiation. If it is not
179 * enabled, then we write the BMCR.
181 int genphy_config_aneg(struct phy_device *phydev)
185 if (phydev->autoneg != AUTONEG_ENABLE)
186 return genphy_setup_forced(phydev);
188 result = genphy_config_advert(phydev);
190 if (result < 0) /* error */
195 * Advertisment hasn't changed, but maybe aneg was never on to
196 * begin with? Or maybe phy was isolated?
198 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
203 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
204 result = 1; /* do restart aneg */
208 * Only restart aneg if we are advertising something different
209 * than we were before.
212 result = genphy_restart_aneg(phydev);
218 * genphy_update_link - update link status in @phydev
219 * @phydev: target phy_device struct
221 * Description: Update the value in phydev->link to reflect the
222 * current link value. In order to do this, we need to read
223 * the status register twice, keeping the second value.
225 int genphy_update_link(struct phy_device *phydev)
227 unsigned int mii_reg;
230 * Wait if the link is up, and autonegotiation is in progress
231 * (ie - we're capable and it's not done)
233 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
236 * If we already saw the link up, and it hasn't gone down, then
237 * we don't need to wait for autoneg again
239 if (phydev->link && mii_reg & BMSR_LSTATUS)
242 if ((phydev->autoneg == AUTONEG_ENABLE) &&
243 !(mii_reg & BMSR_ANEGCOMPLETE)) {
246 printf("%s Waiting for PHY auto negotiation to complete",
248 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
252 if (i > (PHY_ANEG_TIMEOUT / 50)) {
253 printf(" TIMEOUT !\n");
259 puts("user interrupt!\n");
267 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
268 mdelay(50); /* 50 ms */
273 /* Read the link a second time to clear the latched state */
274 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
276 if (mii_reg & BMSR_LSTATUS)
286 * Generic function which updates the speed and duplex. If
287 * autonegotiation is enabled, it uses the AND of the link
288 * partner's advertised capabilities and our advertised
289 * capabilities. If autonegotiation is disabled, we use the
290 * appropriate bits in the control register.
292 * Stolen from Linux's mii.c and phy_device.c
294 int genphy_parse_link(struct phy_device *phydev)
296 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
298 /* We're using autonegotiation */
299 if (phydev->autoneg == AUTONEG_ENABLE) {
304 /* Check for gigabit capability */
305 if (phydev->supported & (SUPPORTED_1000baseT_Full |
306 SUPPORTED_1000baseT_Half)) {
307 /* We want a list of states supported by
308 * both PHYs in the link
310 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
312 debug("Could not read MII_STAT1000. ");
313 debug("Ignoring gigabit capability\n");
316 gblpa &= phy_read(phydev,
317 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
320 /* Set the baseline so we only have to set them
321 * if they're different
323 phydev->speed = SPEED_10;
324 phydev->duplex = DUPLEX_HALF;
326 /* Check the gigabit fields */
327 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
328 phydev->speed = SPEED_1000;
330 if (gblpa & PHY_1000BTSR_1000FD)
331 phydev->duplex = DUPLEX_FULL;
337 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
338 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
340 if (lpa & (LPA_100FULL | LPA_100HALF)) {
341 phydev->speed = SPEED_100;
343 if (lpa & LPA_100FULL)
344 phydev->duplex = DUPLEX_FULL;
346 } else if (lpa & LPA_10FULL) {
347 phydev->duplex = DUPLEX_FULL;
351 * Extended status may indicate that the PHY supports
352 * 1000BASE-T/X even though the 1000BASE-T registers
353 * are missing. In this case we can't tell whether the
354 * peer also supports it, so we only check extended
355 * status if the 1000BASE-T registers are actually
358 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
359 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
362 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
363 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
364 phydev->speed = SPEED_1000;
365 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
366 phydev->duplex = DUPLEX_FULL;
370 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
372 phydev->speed = SPEED_10;
373 phydev->duplex = DUPLEX_HALF;
375 if (bmcr & BMCR_FULLDPLX)
376 phydev->duplex = DUPLEX_FULL;
378 if (bmcr & BMCR_SPEED1000)
379 phydev->speed = SPEED_1000;
380 else if (bmcr & BMCR_SPEED100)
381 phydev->speed = SPEED_100;
387 int genphy_config(struct phy_device *phydev)
392 features = (SUPPORTED_TP | SUPPORTED_MII
393 | SUPPORTED_AUI | SUPPORTED_FIBRE |
396 /* Do we support autonegotiation? */
397 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
402 if (val & BMSR_ANEGCAPABLE)
403 features |= SUPPORTED_Autoneg;
405 if (val & BMSR_100FULL)
406 features |= SUPPORTED_100baseT_Full;
407 if (val & BMSR_100HALF)
408 features |= SUPPORTED_100baseT_Half;
409 if (val & BMSR_10FULL)
410 features |= SUPPORTED_10baseT_Full;
411 if (val & BMSR_10HALF)
412 features |= SUPPORTED_10baseT_Half;
414 if (val & BMSR_ESTATEN) {
415 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
420 if (val & ESTATUS_1000_TFULL)
421 features |= SUPPORTED_1000baseT_Full;
422 if (val & ESTATUS_1000_THALF)
423 features |= SUPPORTED_1000baseT_Half;
424 if (val & ESTATUS_1000_XFULL)
425 features |= SUPPORTED_1000baseX_Full;
426 if (val & ESTATUS_1000_XHALF)
427 features |= SUPPORTED_1000baseX_Half;
430 phydev->supported &= features;
431 phydev->advertising &= features;
433 genphy_config_aneg(phydev);
438 int genphy_startup(struct phy_device *phydev)
442 ret = genphy_update_link(phydev);
446 return genphy_parse_link(phydev);
449 int genphy_shutdown(struct phy_device *phydev)
454 static struct phy_driver genphy_driver = {
457 .name = "Generic PHY",
458 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
459 SUPPORTED_AUI | SUPPORTED_FIBRE |
461 .config = genphy_config,
462 .startup = genphy_startup,
463 .shutdown = genphy_shutdown,
466 static int genphy_init(void)
468 return phy_register(&genphy_driver);
471 static LIST_HEAD(phy_drivers);
475 #ifdef CONFIG_NEEDS_MANUAL_RELOC
477 * The pointers inside phy_drivers also needs to be updated incase of
478 * manual reloc, without which these points to some invalid
479 * pre reloc address and leads to invalid accesses, hangs.
481 struct list_head *head = &phy_drivers;
483 head->next = (void *)head->next + gd->reloc_off;
484 head->prev = (void *)head->prev + gd->reloc_off;
487 #ifdef CONFIG_B53_SWITCH
490 #ifdef CONFIG_MV88E61XX_SWITCH
491 phy_mv88e61xx_init();
493 #ifdef CONFIG_PHY_AQUANTIA
496 #ifdef CONFIG_PHY_ATHEROS
499 #ifdef CONFIG_PHY_BROADCOM
502 #ifdef CONFIG_PHY_CORTINA
505 #ifdef CONFIG_PHY_CORTINA_ACCESS
506 phy_cortina_access_init();
508 #ifdef CONFIG_PHY_DAVICOM
511 #ifdef CONFIG_PHY_ET1011C
514 #ifdef CONFIG_PHY_LXT
517 #ifdef CONFIG_PHY_MARVELL
520 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
521 phy_micrel_ksz8xxx_init();
523 #ifdef CONFIG_PHY_MICREL_KSZ90X1
524 phy_micrel_ksz90x1_init();
526 #ifdef CONFIG_PHY_MESON_GXL
527 phy_meson_gxl_init();
529 #ifdef CONFIG_PHY_NATSEMI
532 #ifdef CONFIG_NXP_C45_TJA11XX_PHY
533 phy_nxp_c45_tja11xx_init();
535 #ifdef CONFIG_PHY_REALTEK
538 #ifdef CONFIG_PHY_SMSC
541 #ifdef CONFIG_PHY_TERANETICS
542 phy_teranetics_init();
547 #ifdef CONFIG_PHY_VITESSE
550 #ifdef CONFIG_PHY_XILINX
553 #ifdef CONFIG_PHY_MSCC
556 #ifdef CONFIG_PHY_FIXED
559 #ifdef CONFIG_PHY_NCSI
562 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
563 phy_xilinx_gmii2rgmii_init();
570 int phy_register(struct phy_driver *drv)
572 INIT_LIST_HEAD(&drv->list);
573 list_add_tail(&drv->list, &phy_drivers);
575 #ifdef CONFIG_NEEDS_MANUAL_RELOC
577 drv->probe += gd->reloc_off;
579 drv->config += gd->reloc_off;
581 drv->startup += gd->reloc_off;
583 drv->shutdown += gd->reloc_off;
585 drv->readext += gd->reloc_off;
587 drv->writeext += gd->reloc_off;
589 drv->read_mmd += gd->reloc_off;
591 drv->write_mmd += gd->reloc_off;
596 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
598 /* The default values for phydev->supported are provided by the PHY
599 * driver "features" member, we want to reset to sane defaults first
600 * before supporting higher speeds.
602 phydev->supported &= PHY_DEFAULT_FEATURES;
608 phydev->supported |= PHY_1000BT_FEATURES;
611 phydev->supported |= PHY_100BT_FEATURES;
614 phydev->supported |= PHY_10BT_FEATURES;
620 static int phy_probe(struct phy_device *phydev)
624 phydev->advertising = phydev->drv->features;
625 phydev->supported = phydev->drv->features;
627 phydev->mmds = phydev->drv->mmds;
629 if (phydev->drv->probe)
630 err = phydev->drv->probe(phydev);
635 static struct phy_driver *generic_for_interface(phy_interface_t interface)
637 #ifdef CONFIG_PHYLIB_10G
638 if (is_10g_interface(interface))
639 return &gen10g_driver;
642 return &genphy_driver;
645 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
646 phy_interface_t interface)
648 struct list_head *entry;
649 int phy_id = phydev->phy_id;
650 struct phy_driver *drv = NULL;
652 list_for_each(entry, &phy_drivers) {
653 drv = list_entry(entry, struct phy_driver, list);
654 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
658 /* If we made it here, there's no driver for this PHY */
659 return generic_for_interface(interface);
662 struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
663 u32 phy_id, bool is_c45,
664 phy_interface_t interface)
666 struct phy_device *dev;
669 * We allocate the device, and initialize the
672 dev = malloc(sizeof(*dev));
674 printf("Failed to allocate PHY device for %s:%d\n",
675 bus ? bus->name : "(null bus)", addr);
679 memset(dev, 0, sizeof(*dev));
683 dev->interface = interface;
686 dev->node = ofnode_null();
689 dev->autoneg = AUTONEG_ENABLE;
692 dev->phy_id = phy_id;
693 dev->is_c45 = is_c45;
696 dev->drv = get_phy_driver(dev, interface);
698 if (phy_probe(dev)) {
699 printf("%s, PHY probe failed\n", __func__);
703 if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
704 bus->phymap[addr] = dev;
710 * get_phy_id - reads the specified addr for its ID.
711 * @bus: the target MII bus
712 * @addr: PHY address on the MII bus
713 * @phy_id: where to store the ID retrieved.
715 * Description: Reads the ID registers of the PHY at @addr on the
716 * @bus, stores it in @phy_id and returns zero on success.
718 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
723 * Grab the bits from PHYIR1, and put them
726 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
731 *phy_id = (phy_reg & 0xffff) << 16;
733 /* Grab the bits from PHYIR2, and put them in the lower half */
734 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
739 *phy_id |= (phy_reg & 0xffff);
744 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
745 uint phy_mask, int devad,
746 phy_interface_t interface)
748 u32 phy_id = 0xffffffff;
752 int addr = ffs(phy_mask) - 1;
753 int r = get_phy_id(bus, addr, devad, &phy_id);
756 * If the PHY ID is flat 0 we ignore it. There are C45 PHYs
757 * that return all 0s for C22 reads (like Aquantia AQR112) and
758 * there are C22 PHYs that return all 0s for C45 reads (like
761 if (r == 0 && phy_id == 0)
764 /* If the PHY ID is mostly f's, we didn't find anything */
765 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
766 is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
767 return phy_device_create(bus, addr, phy_id, is_c45,
771 phy_mask &= ~(1 << addr);
776 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
778 phy_interface_t interface)
780 /* If we have one, return the existing device, with new interface */
782 int addr = ffs(phy_mask) - 1;
784 if (bus->phymap[addr]) {
785 bus->phymap[addr]->interface = interface;
786 return bus->phymap[addr];
788 phy_mask &= ~(1 << addr);
793 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
795 phy_interface_t interface)
797 struct phy_device *phydev;
810 devad_cnt = sizeof(devad)/sizeof(int);
811 phydev = search_for_existing_phy(bus, phy_mask, interface);
814 /* try different access clauses */
815 for (i = 0; i < devad_cnt; i++) {
816 phydev = create_phy_by_mask(bus, phy_mask,
817 devad[i], interface);
824 debug("\n%s PHY: ", bus->name);
826 int addr = ffs(phy_mask) - 1;
829 phy_mask &= ~(1 << addr);
831 debug("not found\n");
837 * get_phy_device - reads the specified PHY device and returns its
839 * @bus: the target MII bus
840 * @addr: PHY address on the MII bus
842 * Description: Reads the ID registers of the PHY at @addr on the
843 * @bus, then allocates and returns the phy_device to represent it.
845 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
846 phy_interface_t interface)
848 return get_phy_device_by_mask(bus, 1 << addr, interface);
851 int phy_reset(struct phy_device *phydev)
855 int devad = MDIO_DEVAD_NONE;
857 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
860 #ifdef CONFIG_PHYLIB_10G
861 /* If it's 10G, we need to issue reset through one of the MMDs */
862 if (is_10g_interface(phydev->interface)) {
864 gen10g_discover_mmds(phydev);
866 devad = ffs(phydev->mmds) - 1;
870 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
871 debug("PHY reset failed\n");
875 #if CONFIG_PHY_RESET_DELAY > 0
876 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
879 * Poll the control register for the reset bit to go to 0 (it is
880 * auto-clearing). This should happen within 0.5 seconds per the
883 reg = phy_read(phydev, devad, MII_BMCR);
884 while ((reg & BMCR_RESET) && timeout--) {
885 reg = phy_read(phydev, devad, MII_BMCR);
888 debug("PHY status read failed\n");
894 if (reg & BMCR_RESET) {
895 puts("PHY reset timed out\n");
902 int miiphy_reset(const char *devname, unsigned char addr)
904 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
905 struct phy_device *phydev;
908 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
909 * If later code tries to connect with the right interface, this will
910 * be corrected by get_phy_device in phy_connect()
912 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
914 return phy_reset(phydev);
917 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
918 phy_interface_t interface)
924 /* Wait 15ms to make sure the PHY has come out of hard reset */
928 return get_phy_device_by_mask(bus, phy_mask, interface);
932 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
934 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
937 /* Soft Reset the PHY */
939 if (phydev->dev && phydev->dev != dev) {
940 printf("%s:%d is connected to %s. Reconnecting to %s\n",
941 phydev->bus->name, phydev->addr,
942 phydev->dev->name, dev->name);
945 debug("%s connected to %s\n", dev->name, phydev->drv->name);
948 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
949 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
951 phy_interface_t interface)
953 struct phy_device *phydev = NULL;
956 ofnode_for_each_subnode(node, dev_ofnode(dev)) {
957 node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0");
958 if (ofnode_valid(node)) {
959 phydev = phy_device_create(bus, 0,
960 PHY_GMII2RGMII_ID, false,
967 node = ofnode_first_subnode(node);
974 #ifdef CONFIG_PHY_FIXED
976 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
977 * @node: OF node for the container of the fixed-link node
979 * Description: Creates a struct phy_device based on a fixed-link of_node
980 * description. Can be used without phy_connect by drivers which do not expose
981 * a UCLASS_ETH udevice.
983 struct phy_device *fixed_phy_create(ofnode node)
985 phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
986 struct phy_device *phydev;
990 if_str = ofnode_read_string(node, "phy-mode");
992 if_str = ofnode_read_string(node, "phy-interface-type");
995 interface = phy_get_interface_by_name(if_str);
998 subnode = ofnode_find_subnode(node, "fixed-link");
999 if (!ofnode_valid(subnode)) {
1003 phydev = phy_device_create(NULL, 0, PHY_FIXED_ID, false, interface);
1005 phydev->node = subnode;
1010 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
1011 struct udevice *dev,
1012 phy_interface_t interface)
1014 ofnode node = dev_ofnode(dev), subnode;
1015 struct phy_device *phydev = NULL;
1017 if (ofnode_phy_is_fixed_link(node, &subnode)) {
1018 phydev = phy_device_create(bus, 0, PHY_FIXED_ID,
1021 phydev->node = subnode;
1028 #ifdef CONFIG_DM_ETH
1029 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1030 struct udevice *dev,
1031 phy_interface_t interface)
1033 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1034 struct eth_device *dev,
1035 phy_interface_t interface)
1038 struct phy_device *phydev = NULL;
1039 uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
1041 #ifdef CONFIG_PHY_FIXED
1042 phydev = phy_connect_fixed(bus, dev, interface);
1045 #ifdef CONFIG_PHY_NCSI
1047 phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface);
1050 #ifdef CONFIG_PHY_ETHERNET_ID
1052 phydev = phy_connect_phy_id(bus, dev, addr, interface);
1055 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
1057 phydev = phy_connect_gmii2rgmii(bus, dev, interface);
1061 phydev = phy_find_by_mask(bus, mask, interface);
1064 phy_connect_dev(phydev, dev);
1066 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
1071 * Start the PHY. Returns 0 on success, or a negative error code.
1073 int phy_startup(struct phy_device *phydev)
1075 if (phydev->drv->startup)
1076 return phydev->drv->startup(phydev);
1081 __weak int board_phy_config(struct phy_device *phydev)
1083 if (phydev->drv->config)
1084 return phydev->drv->config(phydev);
1088 int phy_config(struct phy_device *phydev)
1090 /* Invoke an optional board-specific helper */
1091 return board_phy_config(phydev);
1094 int phy_shutdown(struct phy_device *phydev)
1096 if (phydev->drv->shutdown)
1097 phydev->drv->shutdown(phydev);
1102 int phy_get_interface_by_name(const char *str)
1106 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1107 if (!strcmp(str, phy_interface_strings[i]))
1115 * phy_modify - Convenience function for modifying a given PHY register
1116 * @phydev: the phy_device struct
1117 * @devad: The MMD to read from
1118 * @regnum: register number to write
1119 * @mask: bit mask of bits to clear
1120 * @set: new value of bits set in mask to write to @regnum
1122 int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
1127 ret = phy_read(phydev, devad, regnum);
1131 return phy_write(phydev, devad, regnum, (ret & ~mask) | set);