drivers/net/phy/phy.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Generic PHY Management code
   4  *
   5  * Copyright 2011 Freescale Semiconductor, Inc.
   6  * author Andy Fleming
   7  *
   8  * Based loosely off of Linux's PHY Lib
   9  */
  10 #include <common.h>
  11 #include <console.h>
  12 #include <dm.h>
  13 #include <log.h>
  14 #include <malloc.h>
  15 #include <net.h>
  16 #include <command.h>
  17 #include <miiphy.h>
  18 #include <phy.h>
  19 #include <errno.h>
  20 #include <asm/global_data.h>
  21 #include <dm/of_extra.h>
  22 #include <linux/bitops.h>
  23 #include <linux/delay.h>
  24 #include <linux/err.h>
  25 #include <linux/compiler.h>
  26
  27 DECLARE_GLOBAL_DATA_PTR;
  28
  29 /* Generic PHY support and helper functions */
  30
  31 /**
  32  * genphy_config_advert - sanitize and advertise auto-negotiation parameters
  33  * @phydev: target phy_device struct
  34  *
  35  * Description: Writes MII_ADVERTISE with the appropriate values,
  36  *   after sanitizing the values to make sure we only advertise
  37  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
  38  *   hasn't changed, and > 0 if it has changed.
  39  */
  40 static int genphy_config_advert(struct phy_device *phydev)
  41 {
  42         u32 advertise;
  43         int oldadv, adv, bmsr;
  44         int err, changed = 0;
  45
  46         /* Only allow advertising what this PHY supports */
  47         phydev->advertising &= phydev->supported;
  48         advertise = phydev->advertising;
  49
  50         /* Setup standard advertisement */
  51         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  52         oldadv = adv;
  53
  54         if (adv < 0)
  55                 return adv;
  56
  57         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  58                  ADVERTISE_PAUSE_ASYM);
  59         if (advertise & ADVERTISED_10baseT_Half)
  60                 adv |= ADVERTISE_10HALF;
  61         if (advertise & ADVERTISED_10baseT_Full)
  62                 adv |= ADVERTISE_10FULL;
  63         if (advertise & ADVERTISED_100baseT_Half)
  64                 adv |= ADVERTISE_100HALF;
  65         if (advertise & ADVERTISED_100baseT_Full)
  66                 adv |= ADVERTISE_100FULL;
  67         if (advertise & ADVERTISED_Pause)
  68                 adv |= ADVERTISE_PAUSE_CAP;
  69         if (advertise & ADVERTISED_Asym_Pause)
  70                 adv |= ADVERTISE_PAUSE_ASYM;
  71         if (advertise & ADVERTISED_1000baseX_Half)
  72                 adv |= ADVERTISE_1000XHALF;
  73         if (advertise & ADVERTISED_1000baseX_Full)
  74                 adv |= ADVERTISE_1000XFULL;
  75
  76         if (adv != oldadv) {
  77                 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  78
  79                 if (err < 0)
  80                         return err;
  81                 changed = 1;
  82         }
  83
  84         bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  85         if (bmsr < 0)
  86                 return bmsr;
  87
  88         /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
  89          * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
  90          * logical 1.
  91          */
  92         if (!(bmsr & BMSR_ESTATEN))
  93                 return changed;
  94
  95         /* Configure gigabit if it's supported */
  96         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  97         oldadv = adv;
  98
  99         if (adv < 0)
 100                 return adv;
 101
 102         adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 103
 104         if (phydev->supported & (SUPPORTED_1000baseT_Half |
 105                                 SUPPORTED_1000baseT_Full)) {
 106                 if (advertise & SUPPORTED_1000baseT_Half)
 107                         adv |= ADVERTISE_1000HALF;
 108                 if (advertise & SUPPORTED_1000baseT_Full)
 109                         adv |= ADVERTISE_1000FULL;
 110         }
 111
 112         if (adv != oldadv)
 113                 changed = 1;
 114
 115         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
 116         if (err < 0)
 117                 return err;
 118
 119         return changed;
 120 }
 121
 122 /**
 123  * genphy_setup_forced - configures/forces speed/duplex from @phydev
 124  * @phydev: target phy_device struct
 125  *
 126  * Description: Configures MII_BMCR to force speed/duplex
 127  *   to the values in phydev. Assumes that the values are valid.
 128  */
 129 static int genphy_setup_forced(struct phy_device *phydev)
 130 {
 131         int err;
 132         int ctl = BMCR_ANRESTART;
 133
 134         phydev->pause = 0;
 135         phydev->asym_pause = 0;
 136
 137         if (phydev->speed == SPEED_1000)
 138                 ctl |= BMCR_SPEED1000;
 139         else if (phydev->speed == SPEED_100)
 140                 ctl |= BMCR_SPEED100;
 141
 142         if (phydev->duplex == DUPLEX_FULL)
 143                 ctl |= BMCR_FULLDPLX;
 144
 145         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
 146
 147         return err;
 148 }
 149
 150 /**
 151  * genphy_restart_aneg - Enable and Restart Autonegotiation
 152  * @phydev: target phy_device struct
 153  */
 154 int genphy_restart_aneg(struct phy_device *phydev)
 155 {
 156         int ctl;
 157
 158         ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
 159
 160         if (ctl < 0)
 161                 return ctl;
 162
 163         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
 164
 165         /* Don't isolate the PHY if we're negotiating */
 166         ctl &= ~(BMCR_ISOLATE);
 167
 168         ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
 169
 170         return ctl;
 171 }
 172
 173 /**
 174  * genphy_config_aneg - restart auto-negotiation or write BMCR
 175  * @phydev: target phy_device struct
 176  *
 177  * Description: If auto-negotiation is enabled, we configure the
 178  *   advertising, and then restart auto-negotiation.  If it is not
 179  *   enabled, then we write the BMCR.
 180  */
 181 int genphy_config_aneg(struct phy_device *phydev)
 182 {
 183         int result;
 184
 185         if (phydev->autoneg != AUTONEG_ENABLE)
 186                 return genphy_setup_forced(phydev);
 187
 188         result = genphy_config_advert(phydev);
 189
 190         if (result < 0) /* error */
 191                 return result;
 192
 193         if (result == 0) {
 194                 /*
 195                  * Advertisment hasn't changed, but maybe aneg was never on to
 196                  * begin with?  Or maybe phy was isolated?
 197                  */
 198                 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
 199
 200                 if (ctl < 0)
 201                         return ctl;
 202
 203                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
 204                         result = 1; /* do restart aneg */
 205         }
 206
 207         /*
 208          * Only restart aneg if we are advertising something different
 209          * than we were before.
 210          */
 211         if (result > 0)
 212                 result = genphy_restart_aneg(phydev);
 213
 214         return result;
 215 }
 216
 217 /**
 218  * genphy_update_link - update link status in @phydev
 219  * @phydev: target phy_device struct
 220  *
 221  * Description: Update the value in phydev->link to reflect the
 222  *   current link value.  In order to do this, we need to read
 223  *   the status register twice, keeping the second value.
 224  */
 225 int genphy_update_link(struct phy_device *phydev)
 226 {
 227         unsigned int mii_reg;
 228
 229         /*
 230          * Wait if the link is up, and autonegotiation is in progress
 231          * (ie - we're capable and it's not done)
 232          */
 233         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 234
 235         /*
 236          * If we already saw the link up, and it hasn't gone down, then
 237          * we don't need to wait for autoneg again
 238          */
 239         if (phydev->link && mii_reg & BMSR_LSTATUS)
 240                 return 0;
 241
 242         if ((phydev->autoneg == AUTONEG_ENABLE) &&
 243             !(mii_reg & BMSR_ANEGCOMPLETE)) {
 244                 int i = 0;
 245
 246                 printf("%s Waiting for PHY auto negotiation to complete",
 247                        phydev->dev->name);
 248                 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
 249                         /*
 250                          * Timeout reached ?
 251                          */
 252                         if (i > (PHY_ANEG_TIMEOUT / 50)) {
 253                                 printf(" TIMEOUT !\n");
 254                                 phydev->link = 0;
 255                                 return -ETIMEDOUT;
 256                         }
 257
 258                         if (ctrlc()) {
 259                                 puts("user interrupt!\n");
 260                                 phydev->link = 0;
 261                                 return -EINTR;
 262                         }
 263
 264                         if ((i++ % 10) == 0)
 265                                 printf(".");
 266
 267                         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 268                         mdelay(50);     /* 50 ms */
 269                 }
 270                 printf(" done\n");
 271                 phydev->link = 1;
 272         } else {
 273                 /* Read the link a second time to clear the latched state */
 274                 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 275
 276                 if (mii_reg & BMSR_LSTATUS)
 277                         phydev->link = 1;
 278                 else
 279                         phydev->link = 0;
 280         }
 281
 282         return 0;
 283 }
 284
 285 /*
 286  * Generic function which updates the speed and duplex.  If
 287  * autonegotiation is enabled, it uses the AND of the link
 288  * partner's advertised capabilities and our advertised
 289  * capabilities.  If autonegotiation is disabled, we use the
 290  * appropriate bits in the control register.
 291  *
 292  * Stolen from Linux's mii.c and phy_device.c
 293  */
 294 int genphy_parse_link(struct phy_device *phydev)
 295 {
 296         int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 297
 298         /* We're using autonegotiation */
 299         if (phydev->autoneg == AUTONEG_ENABLE) {
 300                 u32 lpa = 0;
 301                 int gblpa = 0;
 302                 u32 estatus = 0;
 303
 304                 /* Check for gigabit capability */
 305                 if (phydev->supported & (SUPPORTED_1000baseT_Full |
 306                                         SUPPORTED_1000baseT_Half)) {
 307                         /* We want a list of states supported by
 308                          * both PHYs in the link
 309                          */
 310                         gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
 311                         if (gblpa < 0) {
 312                                 debug("Could not read MII_STAT1000. ");
 313                                 debug("Ignoring gigabit capability\n");
 314                                 gblpa = 0;
 315                         }
 316                         gblpa &= phy_read(phydev,
 317                                         MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
 318                 }
 319
 320                 /* Set the baseline so we only have to set them
 321                  * if they're different
 322                  */
 323                 phydev->speed = SPEED_10;
 324                 phydev->duplex = DUPLEX_HALF;
 325
 326                 /* Check the gigabit fields */
 327                 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
 328                         phydev->speed = SPEED_1000;
 329
 330                         if (gblpa & PHY_1000BTSR_1000FD)
 331                                 phydev->duplex = DUPLEX_FULL;
 332
 333                         /* We're done! */
 334                         return 0;
 335                 }
 336
 337                 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
 338                 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
 339
 340                 if (lpa & (LPA_100FULL | LPA_100HALF)) {
 341                         phydev->speed = SPEED_100;
 342
 343                         if (lpa & LPA_100FULL)
 344                                 phydev->duplex = DUPLEX_FULL;
 345
 346                 } else if (lpa & LPA_10FULL) {
 347                         phydev->duplex = DUPLEX_FULL;
 348                 }
 349
 350                 /*
 351                  * Extended status may indicate that the PHY supports
 352                  * 1000BASE-T/X even though the 1000BASE-T registers
 353                  * are missing. In this case we can't tell whether the
 354                  * peer also supports it, so we only check extended
 355                  * status if the 1000BASE-T registers are actually
 356                  * missing.
 357                  */
 358                 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
 359                         estatus = phy_read(phydev, MDIO_DEVAD_NONE,
 360                                            MII_ESTATUS);
 361
 362                 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
 363                                 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
 364                         phydev->speed = SPEED_1000;
 365                         if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
 366                                 phydev->duplex = DUPLEX_FULL;
 367                 }
 368
 369         } else {
 370                 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
 371
 372                 phydev->speed = SPEED_10;
 373                 phydev->duplex = DUPLEX_HALF;
 374
 375                 if (bmcr & BMCR_FULLDPLX)
 376                         phydev->duplex = DUPLEX_FULL;
 377
 378                 if (bmcr & BMCR_SPEED1000)
 379                         phydev->speed = SPEED_1000;
 380                 else if (bmcr & BMCR_SPEED100)
 381                         phydev->speed = SPEED_100;
 382         }
 383
 384         return 0;
 385 }
 386
 387 int genphy_config(struct phy_device *phydev)
 388 {
 389         int val;
 390         u32 features;
 391
 392         features = (SUPPORTED_TP | SUPPORTED_MII
 393                         | SUPPORTED_AUI | SUPPORTED_FIBRE |
 394                         SUPPORTED_BNC);
 395
 396         /* Do we support autonegotiation? */
 397         val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 398
 399         if (val < 0)
 400                 return val;
 401
 402         if (val & BMSR_ANEGCAPABLE)
 403                 features |= SUPPORTED_Autoneg;
 404
 405         if (val & BMSR_100FULL)
 406                 features |= SUPPORTED_100baseT_Full;
 407         if (val & BMSR_100HALF)
 408                 features |= SUPPORTED_100baseT_Half;
 409         if (val & BMSR_10FULL)
 410                 features |= SUPPORTED_10baseT_Full;
 411         if (val & BMSR_10HALF)
 412                 features |= SUPPORTED_10baseT_Half;
 413
 414         if (val & BMSR_ESTATEN) {
 415                 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
 416
 417                 if (val < 0)
 418                         return val;
 419
 420                 if (val & ESTATUS_1000_TFULL)
 421                         features |= SUPPORTED_1000baseT_Full;
 422                 if (val & ESTATUS_1000_THALF)
 423                         features |= SUPPORTED_1000baseT_Half;
 424                 if (val & ESTATUS_1000_XFULL)
 425                         features |= SUPPORTED_1000baseX_Full;
 426                 if (val & ESTATUS_1000_XHALF)
 427                         features |= SUPPORTED_1000baseX_Half;
 428         }
 429
 430         phydev->supported &= features;
 431         phydev->advertising &= features;
 432
 433         genphy_config_aneg(phydev);
 434
 435         return 0;
 436 }
 437
 438 int genphy_startup(struct phy_device *phydev)
 439 {
 440         int ret;
 441
 442         ret = genphy_update_link(phydev);
 443         if (ret)
 444                 return ret;
 445
 446         return genphy_parse_link(phydev);
 447 }
 448
 449 int genphy_shutdown(struct phy_device *phydev)
 450 {
 451         return 0;
 452 }
 453
 454 static struct phy_driver genphy_driver = {
 455         .uid            = 0xffffffff,
 456         .mask           = 0xffffffff,
 457         .name           = "Generic PHY",
 458         .features       = PHY_GBIT_FEATURES | SUPPORTED_MII |
 459                           SUPPORTED_AUI | SUPPORTED_FIBRE |
 460                           SUPPORTED_BNC,
 461         .config         = genphy_config,
 462         .startup        = genphy_startup,
 463         .shutdown       = genphy_shutdown,
 464 };
 465
 466 static int genphy_init(void)
 467 {
 468         return phy_register(&genphy_driver);
 469 }
 470
 471 static LIST_HEAD(phy_drivers);
 472
 473 int phy_init(void)
 474 {
 475 #ifdef CONFIG_NEEDS_MANUAL_RELOC
 476         /*
 477          * The pointers inside phy_drivers also needs to be updated incase of
 478          * manual reloc, without which these points to some invalid
 479          * pre reloc address and leads to invalid accesses, hangs.
 480          */
 481         struct list_head *head = &phy_drivers;
 482
 483         head->next = (void *)head->next + gd->reloc_off;
 484         head->prev = (void *)head->prev + gd->reloc_off;
 485 #endif
 486
 487 #ifdef CONFIG_B53_SWITCH
 488         phy_b53_init();
 489 #endif
 490 #ifdef CONFIG_MV88E61XX_SWITCH
 491         phy_mv88e61xx_init();
 492 #endif
 493 #ifdef CONFIG_PHY_ADIN
 494         phy_adin_init();
 495 #endif
 496 #ifdef CONFIG_PHY_AQUANTIA
 497         phy_aquantia_init();
 498 #endif
 499 #ifdef CONFIG_PHY_ATHEROS
 500         phy_atheros_init();
 501 #endif
 502 #ifdef CONFIG_PHY_BROADCOM
 503         phy_broadcom_init();
 504 #endif
 505 #ifdef CONFIG_PHY_CORTINA
 506         phy_cortina_init();
 507 #endif
 508 #ifdef CONFIG_PHY_CORTINA_ACCESS
 509         phy_cortina_access_init();
 510 #endif
 511 #ifdef CONFIG_PHY_DAVICOM
 512         phy_davicom_init();
 513 #endif
 514 #ifdef CONFIG_PHY_ET1011C
 515         phy_et1011c_init();
 516 #endif
 517 #ifdef CONFIG_PHY_LXT
 518         phy_lxt_init();
 519 #endif
 520 #ifdef CONFIG_PHY_MARVELL
 521         phy_marvell_init();
 522 #endif
 523 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
 524         phy_micrel_ksz8xxx_init();
 525 #endif
 526 #ifdef CONFIG_PHY_MICREL_KSZ90X1
 527         phy_micrel_ksz90x1_init();
 528 #endif
 529 #ifdef CONFIG_PHY_MESON_GXL
 530         phy_meson_gxl_init();
 531 #endif
 532 #ifdef CONFIG_PHY_NATSEMI
 533         phy_natsemi_init();
 534 #endif
 535 #ifdef CONFIG_NXP_C45_TJA11XX_PHY
 536         phy_nxp_c45_tja11xx_init();
 537 #endif
 538 #ifdef CONFIG_PHY_NXP_TJA11XX
 539         phy_nxp_tja11xx_init();
 540 #endif
 541 #ifdef CONFIG_PHY_REALTEK
 542         phy_realtek_init();
 543 #endif
 544 #ifdef CONFIG_PHY_SMSC
 545         phy_smsc_init();
 546 #endif
 547 #ifdef CONFIG_PHY_TERANETICS
 548         phy_teranetics_init();
 549 #endif
 550 #ifdef CONFIG_PHY_TI
 551         phy_ti_init();
 552 #endif
 553 #ifdef CONFIG_PHY_VITESSE
 554         phy_vitesse_init();
 555 #endif
 556 #ifdef CONFIG_PHY_XILINX
 557         phy_xilinx_init();
 558 #endif
 559 #ifdef CONFIG_PHY_MSCC
 560         phy_mscc_init();
 561 #endif
 562 #ifdef CONFIG_PHY_FIXED
 563         phy_fixed_init();
 564 #endif
 565 #ifdef CONFIG_PHY_NCSI
 566         phy_ncsi_init();
 567 #endif
 568 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
 569         phy_xilinx_gmii2rgmii_init();
 570 #endif
 571         genphy_init();
 572
 573         return 0;
 574 }
 575
 576 int phy_register(struct phy_driver *drv)
 577 {
 578         INIT_LIST_HEAD(&drv->list);
 579         list_add_tail(&drv->list, &phy_drivers);
 580
 581 #ifdef CONFIG_NEEDS_MANUAL_RELOC
 582         if (drv->probe)
 583                 drv->probe += gd->reloc_off;
 584         if (drv->config)
 585                 drv->config += gd->reloc_off;
 586         if (drv->startup)
 587                 drv->startup += gd->reloc_off;
 588         if (drv->shutdown)
 589                 drv->shutdown += gd->reloc_off;
 590         if (drv->readext)
 591                 drv->readext += gd->reloc_off;
 592         if (drv->writeext)
 593                 drv->writeext += gd->reloc_off;
 594         if (drv->read_mmd)
 595                 drv->read_mmd += gd->reloc_off;
 596         if (drv->write_mmd)
 597                 drv->write_mmd += gd->reloc_off;
 598 #endif
 599         return 0;
 600 }
 601
 602 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
 603 {
 604         /* The default values for phydev->supported are provided by the PHY
 605          * driver "features" member, we want to reset to sane defaults first
 606          * before supporting higher speeds.
 607          */
 608         phydev->supported &= PHY_DEFAULT_FEATURES;
 609
 610         switch (max_speed) {
 611         default:
 612                 return -ENOTSUPP;
 613         case SPEED_1000:
 614                 phydev->supported |= PHY_1000BT_FEATURES;
 615                 /* fall through */
 616         case SPEED_100:
 617                 phydev->supported |= PHY_100BT_FEATURES;
 618                 /* fall through */
 619         case SPEED_10:
 620                 phydev->supported |= PHY_10BT_FEATURES;
 621         }
 622
 623         return 0;
 624 }
 625
 626 static int phy_probe(struct phy_device *phydev)
 627 {
 628         int err = 0;
 629
 630         phydev->advertising = phydev->drv->features;
 631         phydev->supported = phydev->drv->features;
 632
 633         phydev->mmds = phydev->drv->mmds;
 634
 635         if (phydev->drv->probe)
 636                 err = phydev->drv->probe(phydev);
 637
 638         return err;
 639 }
 640
 641 static struct phy_driver *generic_for_phy(struct phy_device *phydev)
 642 {
 643 #ifdef CONFIG_PHYLIB_10G
 644         if (phydev->is_c45)
 645                 return &gen10g_driver;
 646 #endif
 647
 648         return &genphy_driver;
 649 }
 650
 651 static struct phy_driver *get_phy_driver(struct phy_device *phydev)
 652 {
 653         struct list_head *entry;
 654         int phy_id = phydev->phy_id;
 655         struct phy_driver *drv = NULL;
 656
 657         list_for_each(entry, &phy_drivers) {
 658                 drv = list_entry(entry, struct phy_driver, list);
 659                 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
 660                         return drv;
 661         }
 662
 663         /* If we made it here, there's no driver for this PHY */
 664         return generic_for_phy(phydev);
 665 }
 666
 667 struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
 668                                      u32 phy_id, bool is_c45)
 669 {
 670         struct phy_device *dev;
 671
 672         /*
 673          * We allocate the device, and initialize the
 674          * default values
 675          */
 676         dev = malloc(sizeof(*dev));
 677         if (!dev) {
 678                 printf("Failed to allocate PHY device for %s:%d\n",
 679                        bus ? bus->name : "(null bus)", addr);
 680                 return NULL;
 681         }
 682
 683         memset(dev, 0, sizeof(*dev));
 684
 685         dev->duplex = -1;
 686         dev->link = 0;
 687         dev->interface = PHY_INTERFACE_MODE_NA;
 688
 689 #ifdef CONFIG_DM_ETH
 690         dev->node = ofnode_null();
 691 #endif
 692
 693         dev->autoneg = AUTONEG_ENABLE;
 694
 695         dev->addr = addr;
 696         dev->phy_id = phy_id;
 697         dev->is_c45 = is_c45;
 698         dev->bus = bus;
 699
 700         dev->drv = get_phy_driver(dev);
 701
 702         if (phy_probe(dev)) {
 703                 printf("%s, PHY probe failed\n", __func__);
 704                 return NULL;
 705         }
 706
 707         if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
 708                 bus->phymap[addr] = dev;
 709
 710         return dev;
 711 }
 712
 713 /**
 714  * get_phy_id - reads the specified addr for its ID.
 715  * @bus: the target MII bus
 716  * @addr: PHY address on the MII bus
 717  * @phy_id: where to store the ID retrieved.
 718  *
 719  * Description: Reads the ID registers of the PHY at @addr on the
 720  *   @bus, stores it in @phy_id and returns zero on success.
 721  */
 722 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
 723 {
 724         int phy_reg;
 725
 726         /*
 727          * Grab the bits from PHYIR1, and put them
 728          * in the upper half
 729          */
 730         phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
 731
 732         if (phy_reg < 0)
 733                 return -EIO;
 734
 735         *phy_id = (phy_reg & 0xffff) << 16;
 736
 737         /* Grab the bits from PHYIR2, and put them in the lower half */
 738         phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
 739
 740         if (phy_reg < 0)
 741                 return -EIO;
 742
 743         *phy_id |= (phy_reg & 0xffff);
 744
 745         return 0;
 746 }
 747
 748 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
 749                                              uint phy_mask, int devad)
 750 {
 751         u32 phy_id = 0xffffffff;
 752         bool is_c45;
 753
 754         while (phy_mask) {
 755                 int addr = ffs(phy_mask) - 1;
 756                 int r = get_phy_id(bus, addr, devad, &phy_id);
 757
 758                 /*
 759                  * If the PHY ID is flat 0 we ignore it.  There are C45 PHYs
 760                  * that return all 0s for C22 reads (like Aquantia AQR112) and
 761                  * there are C22 PHYs that return all 0s for C45 reads (like
 762                  * Atheros AR8035).
 763                  */
 764                 if (r == 0 && phy_id == 0)
 765                         goto next;
 766
 767                 /* If the PHY ID is mostly f's, we didn't find anything */
 768                 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
 769                         is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
 770                         return phy_device_create(bus, addr, phy_id, is_c45);
 771                 }
 772 next:
 773                 phy_mask &= ~(1 << addr);
 774         }
 775         return NULL;
 776 }
 777
 778 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
 779                                                   uint phy_mask)
 780 {
 781         /* If we have one, return the existing device, with new interface */
 782         while (phy_mask) {
 783                 int addr = ffs(phy_mask) - 1;
 784
 785                 if (bus->phymap[addr])
 786                         return bus->phymap[addr];
 787
 788                 phy_mask &= ~(1 << addr);
 789         }
 790         return NULL;
 791 }
 792
 793 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
 794                                                  uint phy_mask)
 795 {
 796         struct phy_device *phydev;
 797         int devad[] = {
 798                 /* Clause-22 */
 799                 MDIO_DEVAD_NONE,
 800                 /* Clause-45 */
 801                 MDIO_MMD_PMAPMD,
 802                 MDIO_MMD_WIS,
 803                 MDIO_MMD_PCS,
 804                 MDIO_MMD_PHYXS,
 805                 MDIO_MMD_VEND1,
 806         };
 807         int i, devad_cnt;
 808
 809         devad_cnt = sizeof(devad)/sizeof(int);
 810         phydev = search_for_existing_phy(bus, phy_mask);
 811         if (phydev)
 812                 return phydev;
 813         /* try different access clauses  */
 814         for (i = 0; i < devad_cnt; i++) {
 815                 phydev = create_phy_by_mask(bus, phy_mask, devad[i]);
 816                 if (IS_ERR(phydev))
 817                         return NULL;
 818                 if (phydev)
 819                         return phydev;
 820         }
 821
 822         debug("\n%s PHY: ", bus->name);
 823         while (phy_mask) {
 824                 int addr = ffs(phy_mask) - 1;
 825
 826                 debug("%d ", addr);
 827                 phy_mask &= ~(1 << addr);
 828         }
 829         debug("not found\n");
 830
 831         return NULL;
 832 }
 833
 834 /**
 835  * get_phy_device - reads the specified PHY device and returns its
 836  *                  @phy_device struct
 837  * @bus: the target MII bus
 838  * @addr: PHY address on the MII bus
 839  *
 840  * Description: Reads the ID registers of the PHY at @addr on the
 841  *   @bus, then allocates and returns the phy_device to represent it.
 842  */
 843 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr)
 844 {
 845         return get_phy_device_by_mask(bus, 1 << addr);
 846 }
 847
 848 int phy_reset(struct phy_device *phydev)
 849 {
 850         int reg;
 851         int timeout = 500;
 852         int devad = MDIO_DEVAD_NONE;
 853
 854         if (phydev->flags & PHY_FLAG_BROKEN_RESET)
 855                 return 0;
 856
 857 #ifdef CONFIG_PHYLIB_10G
 858         /* If it's 10G, we need to issue reset through one of the MMDs */
 859         if (phydev->is_c45) {
 860                 if (!phydev->mmds)
 861                         gen10g_discover_mmds(phydev);
 862
 863                 devad = ffs(phydev->mmds) - 1;
 864         }
 865 #endif
 866
 867         if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
 868                 debug("PHY reset failed\n");
 869                 return -1;
 870         }
 871
 872 #if CONFIG_PHY_RESET_DELAY > 0
 873         udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
 874 #endif
 875         /*
 876          * Poll the control register for the reset bit to go to 0 (it is
 877          * auto-clearing).  This should happen within 0.5 seconds per the
 878          * IEEE spec.
 879          */
 880         reg = phy_read(phydev, devad, MII_BMCR);
 881         while ((reg & BMCR_RESET) && timeout--) {
 882                 reg = phy_read(phydev, devad, MII_BMCR);
 883
 884                 if (reg < 0) {
 885                         debug("PHY status read failed\n");
 886                         return -1;
 887                 }
 888                 udelay(1000);
 889         }
 890
 891         if (reg & BMCR_RESET) {
 892                 puts("PHY reset timed out\n");
 893                 return -1;
 894         }
 895
 896         return 0;
 897 }
 898
 899 int miiphy_reset(const char *devname, unsigned char addr)
 900 {
 901         struct mii_dev *bus = miiphy_get_dev_by_name(devname);
 902         struct phy_device *phydev;
 903
 904         phydev = get_phy_device(bus, addr);
 905
 906         return phy_reset(phydev);
 907 }
 908
 909 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask)
 910 {
 911         /* Reset the bus */
 912         if (bus->reset) {
 913                 bus->reset(bus);
 914
 915                 /* Wait 15ms to make sure the PHY has come out of hard reset */
 916                 mdelay(15);
 917         }
 918
 919         return get_phy_device_by_mask(bus, phy_mask);
 920 }
 921
 922 #ifdef CONFIG_DM_ETH
 923 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev,
 924                      phy_interface_t interface)
 925 #else
 926 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev,
 927                      phy_interface_t interface)
 928 #endif
 929 {
 930         /* Soft Reset the PHY */
 931         phy_reset(phydev);
 932         if (phydev->dev && phydev->dev != dev) {
 933                 printf("%s:%d is connected to %s.  Reconnecting to %s\n",
 934                        phydev->bus->name, phydev->addr,
 935                        phydev->dev->name, dev->name);
 936         }
 937         phydev->dev = dev;
 938         phydev->interface = interface;
 939         debug("%s connected to %s mode %s\n", dev->name, phydev->drv->name,
 940               phy_string_for_interface(interface));
 941 }
 942
 943 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
 944 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
 945                                                  struct udevice *dev)
 946 {
 947         struct phy_device *phydev = NULL;
 948         ofnode node;
 949
 950         ofnode_for_each_subnode(node, dev_ofnode(dev)) {
 951                 node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0");
 952                 if (ofnode_valid(node)) {
 953                         phydev = phy_device_create(bus, 0,
 954                                                    PHY_GMII2RGMII_ID, false);
 955                         if (phydev)
 956                                 phydev->node = node;
 957                         break;
 958                 }
 959
 960                 node = ofnode_first_subnode(node);
 961         }
 962
 963         return phydev;
 964 }
 965 #endif
 966
 967 #ifdef CONFIG_PHY_FIXED
 968 /**
 969  * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
 970  * @node: OF node for the container of the fixed-link node
 971  *
 972  * Description: Creates a struct phy_device based on a fixed-link of_node
 973  * description. Can be used without phy_connect by drivers which do not expose
 974  * a UCLASS_ETH udevice.
 975  */
 976 struct phy_device *fixed_phy_create(ofnode node)
 977 {
 978         struct phy_device *phydev;
 979         ofnode subnode;
 980
 981         subnode = ofnode_find_subnode(node, "fixed-link");
 982         if (!ofnode_valid(subnode)) {
 983                 return NULL;
 984         }
 985
 986         phydev = phy_device_create(NULL, 0, PHY_FIXED_ID, false);
 987         if (phydev)
 988                 phydev->node = subnode;
 989
 990         phydev->interface = ofnode_read_phy_mode(node);
 991
 992         return phydev;
 993 }
 994
 995 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
 996                                             struct udevice *dev)
 997 {
 998         ofnode node = dev_ofnode(dev), subnode;
 999         struct phy_device *phydev = NULL;
1000
1001         if (ofnode_phy_is_fixed_link(node, &subnode)) {
1002                 phydev = phy_device_create(bus, 0, PHY_FIXED_ID, false);
1003                 if (phydev)
1004                         phydev->node = subnode;
1005         }
1006
1007         return phydev;
1008 }
1009 #endif
1010
1011 #ifdef CONFIG_DM_ETH
1012 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1013                                struct udevice *dev,
1014                                phy_interface_t interface)
1015 #else
1016 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1017                                struct eth_device *dev,
1018                                phy_interface_t interface)
1019 #endif
1020 {
1021         struct phy_device *phydev = NULL;
1022         uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
1023
1024 #ifdef CONFIG_PHY_FIXED
1025         phydev = phy_connect_fixed(bus, dev);
1026 #endif
1027
1028 #ifdef CONFIG_PHY_NCSI
1029         if (!phydev)
1030                 phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false);
1031 #endif
1032
1033 #ifdef CONFIG_PHY_ETHERNET_ID
1034         if (!phydev)
1035                 phydev = phy_connect_phy_id(bus, dev, addr);
1036 #endif
1037
1038 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
1039         if (!phydev)
1040                 phydev = phy_connect_gmii2rgmii(bus, dev);
1041 #endif
1042
1043         if (!phydev)
1044                 phydev = phy_find_by_mask(bus, mask);
1045
1046         if (phydev)
1047                 phy_connect_dev(phydev, dev, interface);
1048         else
1049                 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
1050         return phydev;
1051 }
1052
1053 /*
1054  * Start the PHY.  Returns 0 on success, or a negative error code.
1055  */
1056 int phy_startup(struct phy_device *phydev)
1057 {
1058         if (phydev->drv->startup)
1059                 return phydev->drv->startup(phydev);
1060
1061         return 0;
1062 }
1063
1064 __weak int board_phy_config(struct phy_device *phydev)
1065 {
1066         if (phydev->drv->config)
1067                 return phydev->drv->config(phydev);
1068         return 0;
1069 }
1070
1071 int phy_config(struct phy_device *phydev)
1072 {
1073         /* Invoke an optional board-specific helper */
1074         return board_phy_config(phydev);
1075 }
1076
1077 int phy_shutdown(struct phy_device *phydev)
1078 {
1079         if (phydev->drv->shutdown)
1080                 phydev->drv->shutdown(phydev);
1081
1082         return 0;
1083 }
1084
1085 /**
1086  * phy_modify - Convenience function for modifying a given PHY register
1087  * @phydev: the phy_device struct
1088  * @devad: The MMD to read from
1089  * @regnum: register number to write
1090  * @mask: bit mask of bits to clear
1091  * @set: new value of bits set in mask to write to @regnum
1092  */
1093 int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
1094                u16 set)
1095 {
1096         int ret;
1097
1098         ret = phy_read(phydev, devad, regnum);
1099         if (ret < 0)
1100                 return ret;
1101
1102         return phy_write(phydev, devad, regnum, (ret & ~mask) | set);
1103 }