1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
3 * Microsemi Ocelot Switch driver
5 * Copyright (c) 2018 Microsemi Corporation
8 #ifndef _MSCC_OCELOT_MACSEC_H_
9 #define _MSCC_OCELOT_MACSEC_H_
11 #define MSCC_MS_MAX_FLOWS 16
13 #define CONTROL_TYPE_EGRESS 0x6
14 #define CONTROL_TYPE_INGRESS 0xf
15 #define CONTROL_IV0 BIT(5)
16 #define CONTROL_IV1 BIT(6)
17 #define CONTROL_IV2 BIT(7)
18 #define CONTROL_UPDATE_SEQ BIT(13)
19 #define CONTROL_IV_IN_SEQ BIT(14)
20 #define CONTROL_ENCRYPT_AUTH BIT(15)
21 #define CONTROL_KEY_IN_CTX BIT(16)
22 #define CONTROL_CRYPTO_ALG(x) ((x) << 17)
23 #define CTRYPTO_ALG_AES_CTR_128 0x5
24 #define CTRYPTO_ALG_AES_CTR_192 0x6
25 #define CTRYPTO_ALG_AES_CTR_256 0x7
26 #define CONTROL_DIGEST_TYPE(x) ((x) << 21)
27 #define CONTROL_AUTH_ALG(x) ((x) << 23)
28 #define AUTH_ALG_AES_GHAS 0x4
29 #define CONTROL_AN(x) ((x) << 26)
30 #define CONTROL_SEQ_TYPE(x) ((x) << 28)
31 #define CONTROL_SEQ_MASK BIT(30)
32 #define CONTROL_CONTEXT_ID BIT(31)
34 enum mscc_macsec_destination_ports {
35 MSCC_MS_PORT_COMMON = 0,
36 MSCC_MS_PORT_RSVD = 1,
37 MSCC_MS_PORT_CONTROLLED = 2,
38 MSCC_MS_PORT_UNCONTROLLED = 3,
41 enum mscc_macsec_drop_actions {
42 MSCC_MS_ACTION_BYPASS_CRC = 0,
43 MSCC_MS_ACTION_BYPASS_BAD = 1,
44 MSCC_MS_ACTION_DROP = 2,
45 MSCC_MS_ACTION_BYPASS = 3,
48 enum mscc_macsec_flow_types {
49 MSCC_MS_FLOW_BYPASS = 0,
50 MSCC_MS_FLOW_DROP = 1,
51 MSCC_MS_FLOW_INGRESS = 2,
52 MSCC_MS_FLOW_EGRESS = 3,
55 enum mscc_macsec_validate_levels {
56 MSCC_MS_VALIDATE_DISABLED = 0,
57 MSCC_MS_VALIDATE_CHECK = 1,
58 MSCC_MS_VALIDATE_STRICT = 2,
61 #define MSCC_MS_XFORM_REC(x, y) (((x) << 5) + (y))
62 #define MSCC_MS_ENA_CFG 0x800
63 #define MSCC_MS_FC_CFG 0x804
64 #define MSCC_MS_SAM_MAC_SA_MATCH_LO(x) (0x1000 + ((x) << 4))
65 #define MSCC_MS_SAM_MAC_SA_MATCH_HI(x) (0x1001 + ((x) << 4))
66 #define MSCC_MS_SAM_MISC_MATCH(x) (0x1004 + ((x) << 4))
67 #define MSCC_MS_SAM_MATCH_SCI_LO(x) (0x1005 + ((x) << 4))
68 #define MSCC_MS_SAM_MATCH_SCI_HI(x) (0x1006 + ((x) << 4))
69 #define MSCC_MS_SAM_MASK(x) (0x1007 + ((x) << 4))
70 #define MSCC_MS_SAM_ENTRY_SET1 0x1808
71 #define MSCC_MS_SAM_ENTRY_CLEAR1 0x180c
72 #define MSCC_MS_SAM_FLOW_CTRL(x) (0x1c00 + (x))
73 #define MSCC_MS_SAM_CP_TAG 0x1e40
74 #define MSCC_MS_SAM_NM_FLOW_NCP 0x1e51
75 #define MSCC_MS_SAM_NM_FLOW_CP 0x1e52
76 #define MSCC_MS_MISC_CONTROL 0x1e5f
77 #define MSCC_MS_COUNT_CONTROL 0x3204
78 #define MSCC_MS_PARAMS2_IG_CC_CONTROL 0x3a10
79 #define MSCC_MS_PARAMS2_IG_CP_TAG 0x3a14
80 #define MSCC_MS_VLAN_MTU_CHECK(x) (0x3c40 + (x))
81 #define MSCC_MS_NON_VLAN_MTU_CHECK 0x3c48
82 #define MSCC_MS_PP_CTRL 0x3c4b
83 #define MSCC_MS_STATUS_CONTEXT_CTRL 0x3d02
84 #define MSCC_MS_INTR_CTRL_STATUS 0x3d04
85 #define MSCC_MS_BLOCK_CTX_UPDATE 0x3d0c
86 #define MSCC_MS_AIC_CTRL 0x3e02
89 #define MSCC_MS_ENA_CFG_CLK_ENA BIT(0)
90 #define MSCC_MS_ENA_CFG_SW_RST BIT(1)
91 #define MSCC_MS_ENA_CFG_MACSEC_BYPASS_ENA BIT(8)
92 #define MSCC_MS_ENA_CFG_MACSEC_ENA BIT(9)
93 #define MSCC_MS_ENA_CFG_MACSEC_SPEED_MODE(x) ((x) << 10)
94 #define MSCC_MS_ENA_CFG_MACSEC_SPEED_MODE_M GENMASK(12, 10)
97 #define MSCC_MS_FC_CFG_FCBUF_ENA BIT(0)
98 #define MSCC_MS_FC_CFG_USE_PKT_EXPANSION_INDICATION BIT(1)
99 #define MSCC_MS_FC_CFG_LOW_THRESH(x) ((x) << 4)
100 #define MSCC_MS_FC_CFG_LOW_THRESH_M GENMASK(7, 4)
101 #define MSCC_MS_FC_CFG_HIGH_THRESH(x) ((x) << 8)
102 #define MSCC_MS_FC_CFG_HIGH_THRESH_M GENMASK(11, 8)
103 #define MSCC_MS_FC_CFG_LOW_BYTES_VAL(x) ((x) << 12)
104 #define MSCC_MS_FC_CFG_LOW_BYTES_VAL_M GENMASK(14, 12)
105 #define MSCC_MS_FC_CFG_HIGH_BYTES_VAL(x) ((x) << 16)
106 #define MSCC_MS_FC_CFG_HIGH_BYTES_VAL_M GENMASK(18, 16)
108 /* MSCC_MS_SAM_MAC_SA_MATCH_HI */
109 #define MSCC_MS_SAM_MAC_SA_MATCH_HI_ETYPE(x) ((x) << 16)
110 #define MSCC_MS_SAM_MAC_SA_MATCH_HI_ETYPE_M GENMASK(31, 16)
112 /* MACSEC_SAM_MISC_MATCH */
113 #define MSCC_MS_SAM_MISC_MATCH_VLAN_VALID BIT(0)
114 #define MSCC_MS_SAM_MISC_MATCH_QINQ_FOUND BIT(1)
115 #define MSCC_MS_SAM_MISC_MATCH_STAG_VALID BIT(2)
116 #define MSCC_MS_SAM_MISC_MATCH_QTAG_VALID BIT(3)
117 #define MSCC_MS_SAM_MISC_MATCH_VLAN_UP(x) ((x) << 4)
118 #define MSCC_MS_SAM_MISC_MATCH_VLAN_UP_M GENMASK(6, 4)
119 #define MSCC_MS_SAM_MISC_MATCH_CONTROL_PACKET BIT(7)
120 #define MSCC_MS_SAM_MISC_MATCH_UNTAGGED BIT(8)
121 #define MSCC_MS_SAM_MISC_MATCH_TAGGED BIT(9)
122 #define MSCC_MS_SAM_MISC_MATCH_BAD_TAG BIT(10)
123 #define MSCC_MS_SAM_MISC_MATCH_KAY_TAG BIT(11)
124 #define MSCC_MS_SAM_MISC_MATCH_SOURCE_PORT(x) ((x) << 12)
125 #define MSCC_MS_SAM_MISC_MATCH_SOURCE_PORT_M GENMASK(13, 12)
126 #define MSCC_MS_SAM_MISC_MATCH_PRIORITY(x) ((x) << 16)
127 #define MSCC_MS_SAM_MISC_MATCH_PRIORITY_M GENMASK(19, 16)
128 #define MSCC_MS_SAM_MISC_MATCH_AN(x) ((x) << 24)
129 #define MSCC_MS_SAM_MISC_MATCH_TCI(x) ((x) << 26)
131 /* MACSEC_SAM_MASK */
132 #define MSCC_MS_SAM_MASK_MAC_SA_MASK(x) (x)
133 #define MSCC_MS_SAM_MASK_MAC_SA_MASK_M GENMASK(5, 0)
134 #define MSCC_MS_SAM_MASK_MAC_DA_MASK(x) ((x) << 6)
135 #define MSCC_MS_SAM_MASK_MAC_DA_MASK_M GENMASK(11, 6)
136 #define MSCC_MS_SAM_MASK_MAC_ETYPE_MASK BIT(12)
137 #define MSCC_MS_SAM_MASK_VLAN_VLD_MASK BIT(13)
138 #define MSCC_MS_SAM_MASK_QINQ_FOUND_MASK BIT(14)
139 #define MSCC_MS_SAM_MASK_STAG_VLD_MASK BIT(15)
140 #define MSCC_MS_SAM_MASK_QTAG_VLD_MASK BIT(16)
141 #define MSCC_MS_SAM_MASK_VLAN_UP_MASK BIT(17)
142 #define MSCC_MS_SAM_MASK_VLAN_ID_MASK BIT(18)
143 #define MSCC_MS_SAM_MASK_SOURCE_PORT_MASK BIT(19)
144 #define MSCC_MS_SAM_MASK_CTL_PACKET_MASK BIT(20)
145 #define MSCC_MS_SAM_MASK_VLAN_UP_INNER_MASK BIT(21)
146 #define MSCC_MS_SAM_MASK_VLAN_ID_INNER_MASK BIT(22)
147 #define MSCC_MS_SAM_MASK_SCI_MASK BIT(23)
148 #define MSCC_MS_SAM_MASK_AN_MASK(x) ((x) << 24)
149 #define MSCC_MS_SAM_MASK_TCI_MASK(x) ((x) << 26)
151 /* MACSEC_SAM_FLOW_CTRL_EGR */
152 #define MSCC_MS_SAM_FLOW_CTRL_FLOW_TYPE(x) (x)
153 #define MSCC_MS_SAM_FLOW_CTRL_FLOW_TYPE_M GENMASK(1, 0)
154 #define MSCC_MS_SAM_FLOW_CTRL_DEST_PORT(x) ((x) << 2)
155 #define MSCC_MS_SAM_FLOW_CTRL_DEST_PORT_M GENMASK(3, 2)
156 #define MSCC_MS_SAM_FLOW_CTRL_RESV_4 BIT(4)
157 #define MSCC_MS_SAM_FLOW_CTRL_FLOW_CRYPT_AUTH BIT(5)
158 #define MSCC_MS_SAM_FLOW_CTRL_DROP_ACTION(x) ((x) << 6)
159 #define MSCC_MS_SAM_FLOW_CTRL_DROP_ACTION_M GENMASK(7, 6)
160 #define MSCC_MS_SAM_FLOW_CTRL_RESV_15_TO_8(x) ((x) << 8)
161 #define MSCC_MS_SAM_FLOW_CTRL_RESV_15_TO_8_M GENMASK(15, 8)
162 #define MSCC_MS_SAM_FLOW_CTRL_PROTECT_FRAME BIT(16)
163 #define MSCC_MS_SAM_FLOW_CTRL_REPLAY_PROTECT BIT(16)
164 #define MSCC_MS_SAM_FLOW_CTRL_SA_IN_USE BIT(17)
165 #define MSCC_MS_SAM_FLOW_CTRL_INCLUDE_SCI BIT(18)
166 #define MSCC_MS_SAM_FLOW_CTRL_USE_ES BIT(19)
167 #define MSCC_MS_SAM_FLOW_CTRL_USE_SCB BIT(20)
168 #define MSCC_MS_SAM_FLOW_CTRL_VALIDATE_FRAMES(x) ((x) << 19)
169 #define MSCC_MS_SAM_FLOW_CTRL_TAG_BYPASS_SIZE(x) ((x) << 21)
170 #define MSCC_MS_SAM_FLOW_CTRL_TAG_BYPASS_SIZE_M GENMASK(22, 21)
171 #define MSCC_MS_SAM_FLOW_CTRL_RESV_23 BIT(23)
172 #define MSCC_MS_SAM_FLOW_CTRL_CONFIDENTIALITY_OFFSET(x) ((x) << 24)
173 #define MSCC_MS_SAM_FLOW_CTRL_CONFIDENTIALITY_OFFSET_M GENMASK(30, 24)
174 #define MSCC_MS_SAM_FLOW_CTRL_CONF_PROTECT BIT(31)
176 /* MACSEC_SAM_CP_TAG */
177 #define MSCC_MS_SAM_CP_TAG_MAP_TBL(x) (x)
178 #define MSCC_MS_SAM_CP_TAG_MAP_TBL_M GENMASK(23, 0)
179 #define MSCC_MS_SAM_CP_TAG_DEF_UP(x) ((x) << 24)
180 #define MSCC_MS_SAM_CP_TAG_DEF_UP_M GENMASK(26, 24)
181 #define MSCC_MS_SAM_CP_TAG_STAG_UP_EN BIT(27)
182 #define MSCC_MS_SAM_CP_TAG_QTAG_UP_EN BIT(28)
183 #define MSCC_MS_SAM_CP_TAG_PARSE_QINQ BIT(29)
184 #define MSCC_MS_SAM_CP_TAG_PARSE_STAG BIT(30)
185 #define MSCC_MS_SAM_CP_TAG_PARSE_QTAG BIT(31)
187 /* MACSEC_SAM_NM_FLOW_NCP */
188 #define MSCC_MS_SAM_NM_FLOW_NCP_UNTAGGED_FLOW_TYPE(x) (x)
189 #define MSCC_MS_SAM_NM_FLOW_NCP_UNTAGGED_DEST_PORT(x) ((x) << 2)
190 #define MSCC_MS_SAM_NM_FLOW_NCP_UNTAGGED_DROP_ACTION(x) ((x) << 6)
191 #define MSCC_MS_SAM_NM_FLOW_NCP_TAGGED_FLOW_TYPE(x) ((x) << 8)
192 #define MSCC_MS_SAM_NM_FLOW_NCP_TAGGED_DEST_PORT(x) ((x) << 10)
193 #define MSCC_MS_SAM_NM_FLOW_NCP_TAGGED_DROP_ACTION(x) ((x) << 14)
194 #define MSCC_MS_SAM_NM_FLOW_NCP_BADTAG_FLOW_TYPE(x) ((x) << 16)
195 #define MSCC_MS_SAM_NM_FLOW_NCP_BADTAG_DEST_PORT(x) ((x) << 18)
196 #define MSCC_MS_SAM_NM_FLOW_NCP_BADTAG_DROP_ACTION(x) ((x) << 22)
197 #define MSCC_MS_SAM_NM_FLOW_NCP_KAY_FLOW_TYPE(x) ((x) << 24)
198 #define MSCC_MS_SAM_NM_FLOW_NCP_KAY_DEST_PORT(x) ((x) << 26)
199 #define MSCC_MS_SAM_NM_FLOW_NCP_KAY_DROP_ACTION(x) ((x) << 30)
201 /* MACSEC_SAM_NM_FLOW_CP */
202 #define MSCC_MS_SAM_NM_FLOW_CP_UNTAGGED_FLOW_TYPE(x) (x)
203 #define MSCC_MS_SAM_NM_FLOW_CP_UNTAGGED_DEST_PORT(x) ((x) << 2)
204 #define MSCC_MS_SAM_NM_FLOW_CP_UNTAGGED_DROP_ACTION(x) ((x) << 6)
205 #define MSCC_MS_SAM_NM_FLOW_CP_TAGGED_FLOW_TYPE(x) ((x) << 8)
206 #define MSCC_MS_SAM_NM_FLOW_CP_TAGGED_DEST_PORT(x) ((x) << 10)
207 #define MSCC_MS_SAM_NM_FLOW_CP_TAGGED_DROP_ACTION(x) ((x) << 14)
208 #define MSCC_MS_SAM_NM_FLOW_CP_BADTAG_FLOW_TYPE(x) ((x) << 16)
209 #define MSCC_MS_SAM_NM_FLOW_CP_BADTAG_DEST_PORT(x) ((x) << 18)
210 #define MSCC_MS_SAM_NM_FLOW_CP_BADTAG_DROP_ACTION(x) ((x) << 22)
211 #define MSCC_MS_SAM_NM_FLOW_CP_KAY_FLOW_TYPE(x) ((x) << 24)
212 #define MSCC_MS_SAM_NM_FLOW_CP_KAY_DEST_PORT(x) ((x) << 26)
213 #define MSCC_MS_SAM_NM_FLOW_CP_KAY_DROP_ACTION(x) ((x) << 30)
215 /* MACSEC_MISC_CONTROL */
216 #define MSCC_MS_MISC_CONTROL_MC_LATENCY_FIX(x) (x)
217 #define MSCC_MS_MISC_CONTROL_MC_LATENCY_FIX_M GENMASK(5, 0)
218 #define MSCC_MS_MISC_CONTROL_STATIC_BYPASS BIT(8)
219 #define MSCC_MS_MISC_CONTROL_NM_MACSEC_EN BIT(9)
220 #define MSCC_MS_MISC_CONTROL_VALIDATE_FRAMES(x) ((x) << 10)
221 #define MSCC_MS_MISC_CONTROL_VALIDATE_FRAMES_M GENMASK(11, 10)
222 #define MSCC_MS_MISC_CONTROL_XFORM_REC_SIZE(x) ((x) << 24)
223 #define MSCC_MS_MISC_CONTROL_XFORM_REC_SIZE_M GENMASK(25, 24)
225 /* MACSEC_COUNT_CONTROL */
226 #define MSCC_MS_COUNT_CONTROL_RESET_ALL BIT(0)
227 #define MSCC_MS_COUNT_CONTROL_DEBUG_ACCESS BIT(1)
228 #define MSCC_MS_COUNT_CONTROL_SATURATE_CNTRS BIT(2)
229 #define MSCC_MS_COUNT_CONTROL_AUTO_CNTR_RESET BIT(3)
231 /* MACSEC_PARAMS2_IG_CC_CONTROL */
232 #define MSCC_MS_PARAMS2_IG_CC_CONTROL_NON_MATCH_CTRL_ACT BIT(14)
233 #define MSCC_MS_PARAMS2_IG_CC_CONTROL_NON_MATCH_ACT BIT(15)
235 /* MACSEC_PARAMS2_IG_CP_TAG */
236 #define MSCC_MS_PARAMS2_IG_CP_TAG_MAP_TBL(x) (x)
237 #define MSCC_MS_PARAMS2_IG_CP_TAG_MAP_TBL_M GENMASK(23, 0)
238 #define MSCC_MS_PARAMS2_IG_CP_TAG_DEF_UP(x) ((x) << 24)
239 #define MSCC_MS_PARAMS2_IG_CP_TAG_DEF_UP_M GENMASK(26, 24)
240 #define MSCC_MS_PARAMS2_IG_CP_TAG_STAG_UP_EN BIT(27)
241 #define MSCC_MS_PARAMS2_IG_CP_TAG_QTAG_UP_EN BIT(28)
242 #define MSCC_MS_PARAMS2_IG_CP_TAG_PARSE_QINQ BIT(29)
243 #define MSCC_MS_PARAMS2_IG_CP_TAG_PARSE_STAG BIT(30)
244 #define MSCC_MS_PARAMS2_IG_CP_TAG_PARSE_QTAG BIT(31)
246 /* MACSEC_VLAN_MTU_CHECK */
247 #define MSCC_MS_VLAN_MTU_CHECK_MTU_COMPARE(x) (x)
248 #define MSCC_MS_VLAN_MTU_CHECK_MTU_COMPARE_M GENMASK(14, 0)
249 #define MSCC_MS_VLAN_MTU_CHECK_MTU_COMP_DROP BIT(15)
251 /* MACSEC_NON_VLAN_MTU_CHECK */
252 #define MSCC_MS_NON_VLAN_MTU_CHECK_NV_MTU_COMPARE(x) (x)
253 #define MSCC_MS_NON_VLAN_MTU_CHECK_NV_MTU_COMPARE_M GENMASK(14, 0)
254 #define MSCC_MS_NON_VLAN_MTU_CHECK_NV_MTU_COMP_DROP BIT(15)
257 #define MSCC_MS_PP_CTRL_MACSEC_OCTET_INCR_MODE BIT(0)
259 /* MACSEC_INTR_CTRL_STATUS */
260 #define MSCC_MS_INTR_CTRL_STATUS_INTR_CLR_STATUS(x) (x)
261 #define MSCC_MS_INTR_CTRL_STATUS_INTR_CLR_STATUS_M GENMASK(15, 0)
262 #define MSCC_MS_INTR_CTRL_STATUS_INTR_ENABLE(x) ((x) << 16)
263 #define MSCC_MS_INTR_CTRL_STATUS_INTR_ENABLE_M GENMASK(31, 16)
264 #define MACSEC_INTR_CTRL_STATUS_ROLLOVER BIT(5)