drivers/net/phy/micrel.c

   1 /*
   2  * drivers/net/phy/micrel.c
   3  *
   4  * Driver for Micrel PHYs
   5  *
   6  * Author: David J. Choi
   7  *
   8  * Copyright (c) 2010 Micrel, Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  * Support : ksz9021 1000/100/10 phy from Micrel
  16  *              ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/phy.h>
  22 #include <linux/micrel_phy.h>
  23
  24 /* general Interrupt control/status reg in vendor specific block. */
  25 #define MII_KSZPHY_INTCS                        0x1B
  26 #define KSZPHY_INTCS_JABBER                     (1 << 15)
  27 #define KSZPHY_INTCS_RECEIVE_ERR                (1 << 14)
  28 #define KSZPHY_INTCS_PAGE_RECEIVE               (1 << 13)
  29 #define KSZPHY_INTCS_PARELLEL                   (1 << 12)
  30 #define KSZPHY_INTCS_LINK_PARTNER_ACK           (1 << 11)
  31 #define KSZPHY_INTCS_LINK_DOWN                  (1 << 10)
  32 #define KSZPHY_INTCS_REMOTE_FAULT               (1 << 9)
  33 #define KSZPHY_INTCS_LINK_UP                    (1 << 8)
  34 #define KSZPHY_INTCS_ALL                        (KSZPHY_INTCS_LINK_UP |\
  35                                                 KSZPHY_INTCS_LINK_DOWN)
  36
  37 /* general PHY control reg in vendor specific block. */
  38 #define MII_KSZPHY_CTRL                 0x1F
  39 /* bitmap of PHY register to set interrupt mode */
  40 #define KSZPHY_CTRL_INT_ACTIVE_HIGH             (1 << 9)
  41 #define KSZ9021_CTRL_INT_ACTIVE_HIGH            (1 << 14)
  42 #define KS8737_CTRL_INT_ACTIVE_HIGH             (1 << 14)
  43 #define KSZ8051_RMII_50MHZ_CLK                  (1 << 7)
  44
  45 static int kszphy_ack_interrupt(struct phy_device *phydev)
  46 {
  47         /* bit[7..0] int status, which is a read and clear register. */
  48         int rc;
  49
  50         rc = phy_read(phydev, MII_KSZPHY_INTCS);
  51
  52         return (rc < 0) ? rc : 0;
  53 }
  54
  55 static int kszphy_set_interrupt(struct phy_device *phydev)
  56 {
  57         int temp;
  58         temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ?
  59                 KSZPHY_INTCS_ALL : 0;
  60         return phy_write(phydev, MII_KSZPHY_INTCS, temp);
  61 }
  62
  63 static int kszphy_config_intr(struct phy_device *phydev)
  64 {
  65         int temp, rc;
  66
  67         /* set the interrupt pin active low */
  68         temp = phy_read(phydev, MII_KSZPHY_CTRL);
  69         temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH;
  70         phy_write(phydev, MII_KSZPHY_CTRL, temp);
  71         rc = kszphy_set_interrupt(phydev);
  72         return rc < 0 ? rc : 0;
  73 }
  74
  75 static int ksz9021_config_intr(struct phy_device *phydev)
  76 {
  77         int temp, rc;
  78
  79         /* set the interrupt pin active low */
  80         temp = phy_read(phydev, MII_KSZPHY_CTRL);
  81         temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH;
  82         phy_write(phydev, MII_KSZPHY_CTRL, temp);
  83         rc = kszphy_set_interrupt(phydev);
  84         return rc < 0 ? rc : 0;
  85 }
  86
  87 static int ks8737_config_intr(struct phy_device *phydev)
  88 {
  89         int temp, rc;
  90
  91         /* set the interrupt pin active low */
  92         temp = phy_read(phydev, MII_KSZPHY_CTRL);
  93         temp &= ~KS8737_CTRL_INT_ACTIVE_HIGH;
  94         phy_write(phydev, MII_KSZPHY_CTRL, temp);
  95         rc = kszphy_set_interrupt(phydev);
  96         return rc < 0 ? rc : 0;
  97 }
  98
  99 static int kszphy_config_init(struct phy_device *phydev)
 100 {
 101         return 0;
 102 }
 103
 104 static int ks8051_config_init(struct phy_device *phydev)
 105 {
 106         int regval;
 107
 108         if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {
 109                 regval = phy_read(phydev, MII_KSZPHY_CTRL);
 110                 regval |= KSZ8051_RMII_50MHZ_CLK;
 111                 phy_write(phydev, MII_KSZPHY_CTRL, regval);
 112         }
 113
 114         return 0;
 115 }
 116
 117 static struct phy_driver ksphy_driver[] = {
 118 {
 119         .phy_id         = PHY_ID_KS8737,
 120         .phy_id_mask    = 0x00fffff0,
 121         .name           = "Micrel KS8737",
 122         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
 123         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 124         .config_init    = kszphy_config_init,
 125         .config_aneg    = genphy_config_aneg,
 126         .read_status    = genphy_read_status,
 127         .ack_interrupt  = kszphy_ack_interrupt,
 128         .config_intr    = ks8737_config_intr,
 129         .driver         = { .owner = THIS_MODULE,},
 130 }, {
 131         .phy_id         = PHY_ID_KS8041,
 132         .phy_id_mask    = 0x00fffff0,
 133         .name           = "Micrel KS8041",
 134         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause
 135                                 | SUPPORTED_Asym_Pause),
 136         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 137         .config_init    = kszphy_config_init,
 138         .config_aneg    = genphy_config_aneg,
 139         .read_status    = genphy_read_status,
 140         .ack_interrupt  = kszphy_ack_interrupt,
 141         .config_intr    = kszphy_config_intr,
 142         .driver         = { .owner = THIS_MODULE,},
 143 }, {
 144         .phy_id         = PHY_ID_KS8051,
 145         .phy_id_mask    = 0x00fffff0,
 146         .name           = "Micrel KS8051",
 147         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause
 148                                 | SUPPORTED_Asym_Pause),
 149         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 150         .config_init    = ks8051_config_init,
 151         .config_aneg    = genphy_config_aneg,
 152         .read_status    = genphy_read_status,
 153         .ack_interrupt  = kszphy_ack_interrupt,
 154         .config_intr    = kszphy_config_intr,
 155         .driver         = { .owner = THIS_MODULE,},
 156 }, {
 157         .phy_id         = PHY_ID_KS8001,
 158         .name           = "Micrel KS8001 or KS8721",
 159         .phy_id_mask    = 0x00ffffff,
 160         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
 161         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 162         .config_init    = kszphy_config_init,
 163         .config_aneg    = genphy_config_aneg,
 164         .read_status    = genphy_read_status,
 165         .ack_interrupt  = kszphy_ack_interrupt,
 166         .config_intr    = kszphy_config_intr,
 167         .driver         = { .owner = THIS_MODULE,},
 168 }, {
 169         .phy_id         = PHY_ID_KSZ9021,
 170         .phy_id_mask    = 0x000ffffe,
 171         .name           = "Micrel KSZ9021 Gigabit PHY",
 172         .features       = (PHY_GBIT_FEATURES | SUPPORTED_Pause
 173                                 | SUPPORTED_Asym_Pause),
 174         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 175         .config_init    = kszphy_config_init,
 176         .config_aneg    = genphy_config_aneg,
 177         .read_status    = genphy_read_status,
 178         .ack_interrupt  = kszphy_ack_interrupt,
 179         .config_intr    = ksz9021_config_intr,
 180         .driver         = { .owner = THIS_MODULE, },
 181 } };
 182
 183 static int __init ksphy_init(void)
 184 {
 185         return phy_drivers_register(ksphy_driver,
 186                 ARRAY_SIZE(ksphy_driver));
 187 }
 188
 189 static void __exit ksphy_exit(void)
 190 {
 191         phy_drivers_unregister(ksphy_driver,
 192                 ARRAY_SIZE(ksphy_driver));
 193 }
 194
 195 module_init(ksphy_init);
 196 module_exit(ksphy_exit);
 197
 198 MODULE_DESCRIPTION("Micrel PHY driver");
 199 MODULE_AUTHOR("David J. Choi");
 200 MODULE_LICENSE("GPL");
 201
 202 static struct mdio_device_id __maybe_unused micrel_tbl[] = {
 203         { PHY_ID_KSZ9021, 0x000ffffe },
 204         { PHY_ID_KS8001, 0x00ffffff },
 205         { PHY_ID_KS8737, 0x00fffff0 },
 206         { PHY_ID_KS8041, 0x00fffff0 },
 207         { PHY_ID_KS8051, 0x00fffff0 },
 208         { }
 209 };
 210
 211 MODULE_DEVICE_TABLE(mdio, micrel_tbl);