drivers/net/phy/aquantia.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Aquantia PHY drivers
   4  *
   5  * Copyright 2014 Freescale Semiconductor, Inc.
   6  */
   7 #include <config.h>
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <phy.h>
  11
  12 #define AQUNTIA_10G_CTL         0x20
  13 #define AQUNTIA_VENDOR_P1       0xc400
  14
  15 #define AQUNTIA_SPEED_LSB_MASK  0x2000
  16 #define AQUNTIA_SPEED_MSB_MASK  0x40
  17
  18 int aquantia_config(struct phy_device *phydev)
  19 {
  20         u32 val = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR);
  21
  22         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  23                 /* 1000BASE-T mode */
  24                 phydev->advertising = SUPPORTED_1000baseT_Full;
  25                 phydev->supported = phydev->advertising;
  26
  27                 val = (val & ~AQUNTIA_SPEED_LSB_MASK) | AQUNTIA_SPEED_MSB_MASK;
  28                 phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, val);
  29         } else if (phydev->interface == PHY_INTERFACE_MODE_XGMII) {
  30                 /* 10GBASE-T mode */
  31                 phydev->advertising = SUPPORTED_10000baseT_Full;
  32                 phydev->supported = phydev->advertising;
  33
  34                 if (!(val & AQUNTIA_SPEED_LSB_MASK) ||
  35                     !(val & AQUNTIA_SPEED_MSB_MASK))
  36                         phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR,
  37                                   AQUNTIA_SPEED_LSB_MASK |
  38                                   AQUNTIA_SPEED_MSB_MASK);
  39         } else if (phydev->interface == PHY_INTERFACE_MODE_SGMII_2500) {
  40                 /* 2.5GBASE-T mode */
  41                 phydev->advertising = SUPPORTED_1000baseT_Full;
  42                 phydev->supported = phydev->advertising;
  43
  44                 phy_write(phydev, MDIO_MMD_AN, AQUNTIA_10G_CTL, 1);
  45                 phy_write(phydev, MDIO_MMD_AN, AQUNTIA_VENDOR_P1, 0x9440);
  46         } else if (phydev->interface == PHY_INTERFACE_MODE_MII) {
  47                 /* 100BASE-TX mode */
  48                 phydev->advertising = SUPPORTED_100baseT_Full;
  49                 phydev->supported = phydev->advertising;
  50
  51                 val = (val & ~AQUNTIA_SPEED_MSB_MASK) | AQUNTIA_SPEED_LSB_MASK;
  52                 phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, val);
  53         }
  54         return 0;
  55 }
  56
  57 int aquantia_startup(struct phy_device *phydev)
  58 {
  59         u32 reg, speed;
  60         int i = 0;
  61
  62         phydev->duplex = DUPLEX_FULL;
  63
  64         /* if the AN is still in progress, wait till timeout. */
  65         phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
  66         reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
  67         if (!(reg & MDIO_AN_STAT1_COMPLETE)) {
  68                 printf("%s Waiting for PHY auto negotiation to complete",
  69                        phydev->dev->name);
  70                 do {
  71                         udelay(1000);
  72                         reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
  73                         if ((i++ % 500) == 0)
  74                                 printf(".");
  75                 } while (!(reg & MDIO_AN_STAT1_COMPLETE) &&
  76                          i < (4 * PHY_ANEG_TIMEOUT));
  77
  78                 if (i > PHY_ANEG_TIMEOUT)
  79                         printf(" TIMEOUT !\n");
  80         }
  81
  82         /* Read twice because link state is latched and a
  83          * read moves the current state into the register */
  84         phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
  85         reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
  86         if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS))
  87                 phydev->link = 0;
  88         else
  89                 phydev->link = 1;
  90
  91         speed = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR);
  92         if (speed & AQUNTIA_SPEED_MSB_MASK) {
  93                 if (speed & AQUNTIA_SPEED_LSB_MASK)
  94                         phydev->speed = SPEED_10000;
  95                 else
  96                         phydev->speed = SPEED_1000;
  97         } else {
  98                 if (speed & AQUNTIA_SPEED_LSB_MASK)
  99                         phydev->speed = SPEED_100;
 100                 else
 101                         phydev->speed = SPEED_10;
 102         }
 103
 104         return 0;
 105 }
 106
 107 struct phy_driver aq1202_driver = {
 108         .name = "Aquantia AQ1202",
 109         .uid = 0x3a1b445,
 110         .mask = 0xfffffff0,
 111         .features = PHY_10G_FEATURES,
 112         .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
 113                         MDIO_MMD_PHYXS | MDIO_MMD_AN |
 114                         MDIO_MMD_VEND1),
 115         .config = &aquantia_config,
 116         .startup = &aquantia_startup,
 117         .shutdown = &gen10g_shutdown,
 118 };
 119
 120 struct phy_driver aq2104_driver = {
 121         .name = "Aquantia AQ2104",
 122         .uid = 0x3a1b460,
 123         .mask = 0xfffffff0,
 124         .features = PHY_10G_FEATURES,
 125         .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
 126                         MDIO_MMD_PHYXS | MDIO_MMD_AN |
 127                         MDIO_MMD_VEND1),
 128         .config = &aquantia_config,
 129         .startup = &aquantia_startup,
 130         .shutdown = &gen10g_shutdown,
 131 };
 132
 133 struct phy_driver aqr105_driver = {
 134         .name = "Aquantia AQR105",
 135         .uid = 0x3a1b4a2,
 136         .mask = 0xfffffff0,
 137         .features = PHY_10G_FEATURES,
 138         .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
 139                         MDIO_MMD_PHYXS | MDIO_MMD_AN |
 140                         MDIO_MMD_VEND1),
 141         .config = &aquantia_config,
 142         .startup = &aquantia_startup,
 143         .shutdown = &gen10g_shutdown,
 144 };
 145
 146 struct phy_driver aqr106_driver = {
 147         .name = "Aquantia AQR106",
 148         .uid = 0x3a1b4d0,
 149         .mask = 0xfffffff0,
 150         .features = PHY_10G_FEATURES,
 151         .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
 152                         MDIO_MMD_PHYXS | MDIO_MMD_AN |
 153                         MDIO_MMD_VEND1),
 154         .config = &aquantia_config,
 155         .startup = &aquantia_startup,
 156         .shutdown = &gen10g_shutdown,
 157 };
 158
 159 struct phy_driver aqr107_driver = {
 160         .name = "Aquantia AQR107",
 161         .uid = 0x3a1b4e0,
 162         .mask = 0xfffffff0,
 163         .features = PHY_10G_FEATURES,
 164         .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
 165                         MDIO_MMD_PHYXS | MDIO_MMD_AN |
 166                         MDIO_MMD_VEND1),
 167         .config = &aquantia_config,
 168         .startup = &aquantia_startup,
 169         .shutdown = &gen10g_shutdown,
 170 };
 171
 172 struct phy_driver aqr405_driver = {
 173         .name = "Aquantia AQR405",
 174         .uid = 0x3a1b4b2,
 175         .mask = 0xfffffff0,
 176         .features = PHY_10G_FEATURES,
 177         .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS|
 178                  MDIO_MMD_PHYXS | MDIO_MMD_AN |
 179                  MDIO_MMD_VEND1),
 180         .config = &aquantia_config,
 181         .startup = &aquantia_startup,
 182         .shutdown = &gen10g_shutdown,
 183 };
 184
 185 int phy_aquantia_init(void)
 186 {
 187         phy_register(&aq1202_driver);
 188         phy_register(&aq2104_driver);
 189         phy_register(&aqr105_driver);
 190         phy_register(&aqr106_driver);
 191         phy_register(&aqr107_driver);
 192         phy_register(&aqr405_driver);
 193
 194         return 0;
 195 }