3 bool "Bit-banged ethernet MII management channel support"
5 config BITBANGMII_MULTI
6 bool "Enable the multi bus support"
9 config MV88E6352_SWITCH
10 bool "Marvell 88E6352 switch support"
13 bool "Ethernet PHY (physical media interface) support"
16 Enable Ethernet PHY (physical media interface) support.
20 config PHY_ADDR_ENABLE
21 bool "Limit phy address"
22 default y if ARCH_SUNXI
24 Select this if you want to control which phy address is used
29 default 1 if ARCH_SUNXI
32 The address of PHY on MII bus. Usually in range of 0 to 31.
36 bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
38 Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
39 This currently supports BCM53125 and similar models.
48 hex "Bitmask of PHY ports"
52 config MV88E61XX_SWITCH
53 bool "Marvell MV88E61xx Ethernet switch PHY support."
57 config MV88E61XX_CPU_PORT
60 config MV88E61XX_PHY_PORTS
61 hex "Bitmask of PHY Ports"
63 config MV88E61XX_FIXED_PORTS
64 hex "Bitmask of PHYless serdes Ports"
67 These are ports without PHYs that may be wired directly to other
70 endif # MV88E61XX_SWITCH
73 bool "Generic 10G PHY support"
76 bool "Analog Devices Industrial Ethernet PHYs"
78 Add support for configuring RGMII on Analog Devices ADIN PHYs.
80 menuconfig PHY_AQUANTIA
81 bool "Aquantia Ethernet PHYs support"
85 config PHY_AQUANTIA_UPLOAD_FW
86 bool "Aquantia firmware loading support"
87 depends on PHY_AQUANTIA
89 Aquantia PHYs use firmware which can be either loaded automatically
90 from storage directly attached to the phy or loaded by the boot loader
91 via MDIO commands. The firmware is loaded from a file, specified by
92 the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options.
94 config PHY_AQUANTIA_FW_PART
95 string "Aquantia firmware partition"
96 depends on PHY_AQUANTIA_UPLOAD_FW
98 Partition containing the firmware file.
100 config PHY_AQUANTIA_FW_NAME
101 string "Aquantia firmware filename"
102 depends on PHY_AQUANTIA_UPLOAD_FW
107 bool "Atheros Ethernet PHYs support"
109 config SPL_PHY_ATHEROS
110 bool "Atheros Ethernet PHYs support (SPL)"
113 bool "Broadcom Ethernet PHYs support"
116 bool "Cortina Ethernet PHYs support"
118 config SYS_CORTINA_NO_FW_UPLOAD
119 bool "Cortina firmware loading support"
120 depends on PHY_CORTINA
122 Cortina phy has provision to store phy firmware in attached dedicated
123 EEPROM. And boards designed with such EEPROM does not require firmware
127 prompt "Location of the Cortina firmware"
128 default SYS_CORTINA_FW_IN_NOR
129 depends on PHY_CORTINA
131 config SYS_CORTINA_FW_IN_MMC
132 bool "Cortina firmware in MMC"
134 config SYS_CORTINA_FW_IN_NAND
135 bool "Cortina firmware in NAND flash"
137 config SYS_CORTINA_FW_IN_NOR
138 bool "Cortina firmware in NOR flash"
140 config SYS_CORTINA_FW_IN_REMOTE
141 bool "Cortina firmware in remote device"
143 config SYS_CORTINA_FW_IN_SPIFLASH
144 bool "Cortina firmware in SPI flash"
148 config CORTINA_FW_ADDR
149 hex "Cortina Firmware Address"
150 depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
153 config CORTINA_FW_LENGTH
154 hex "Cortina Firmware Length"
155 depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
158 config PHY_CORTINA_ACCESS
159 bool "Cortina Access Ethernet PHYs support"
161 depends on CORTINA_NI_ENET
163 Cortina Access Ethernet PHYs init process
166 bool "Davicom Ethernet PHYs support"
169 bool "LSI TruePHY ET1011C support"
172 bool "LXT971 Ethernet PHY support"
175 bool "Marvell Ethernet PHYs support"
177 config PHY_MARVELL_10G
178 bool "Marvell Alaska 10Gbit PHYs"
180 Support for the Marvell Alaska MV88X3310 and compatible PHYs.
183 bool "Amlogic Meson GXL Internal PHY support"
186 bool "Micrel Ethernet PHYs support"
188 Enable support for the GbE PHYs manufactured by Micrel (now
189 a part of Microchip). This includes drivers for the KSZ804, KSZ8031,
190 KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx
191 family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel
192 KSZ90x1 family support" is selected).
196 config PHY_MICREL_KSZ9021
198 select PHY_MICREL_KSZ90X1
200 config PHY_MICREL_KSZ9031
202 select PHY_MICREL_KSZ90X1
204 config PHY_MICREL_KSZ90X1
205 bool "Micrel KSZ90x1 family support"
208 Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
209 enabled, the extended register read/write for KSZ90x1 PHYs
210 is supported through the 'mdio' command and any RGMII signal
211 delays configured in the device tree will be applied to the
212 PHY during initialization.
214 config PHY_MICREL_KSZ8XXX
215 bool "Micrel KSZ8xxx family support"
217 Enable support for the 8000 series 10/100 PHYs manufactured by Micrel
218 (now a part of Microchip). This includes drivers for the KSZ804,
219 KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
224 tristate "Motorcomm PHYs"
226 Enables support for Motorcomm network PHYs.
227 Currently supports the YT8531 Gigabit Ethernet PHYs.
230 bool "Microsemi Corp Ethernet PHYs support"
233 bool "National Semiconductor Ethernet PHYs support"
235 config PHY_NXP_C45_TJA11XX
236 tristate "NXP C45 TJA11XX PHYs"
238 Enable support for NXP C45 TJA11XX PHYs.
239 Currently supports only the TJA1103 PHY.
241 config PHY_NXP_TJA11XX
242 bool "NXP TJA11XX Ethernet PHYs support"
244 Currently supports the NXP TJA1100 and TJA1101 PHY.
247 bool "Realtek Ethernet PHYs support"
249 config RTL8211X_PHY_FORCE_MASTER
250 bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
251 depends on PHY_REALTEK
253 Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
254 This can work around link stability and data corruption issues on gigabit
255 links which can occur in slave mode on certain PHYs, e.g. on the
258 Please note that two directly connected devices (i.e. via crossover cable)
259 will not be able to establish a link between each other if they both force
260 master mode. Multiple devices forcing master mode when connected by a
261 network switch do not pose a problem as the switch configures its affected
262 ports into slave mode.
264 This option only affects gigabit links. If you must establish a direct
265 connection between two devices which both force master mode, try forcing
266 the link speed to 100MBit/s.
270 config RTL8211F_PHY_FORCE_EEE_RXC_ON
271 bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
272 depends on PHY_REALTEK
274 The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
275 transitions to/from a lower power consumption level (Low Power Idle
276 mode) based on link utilization. When no packets are being
277 transmitted, the system goes to Low Power Idle mode to save power.
279 Under particular circumstances this setting can cause issues where
280 the PHY is unable to transmit or receive any packet when in LPI mode.
281 The problem is caused when the PHY is configured to stop receiving
282 the xMII clock while it is signaling LPI. For some PHYs the bit
283 configuring this behavior is set by the Linux kernel, causing the
284 issue in U-Boot on reboot if the PHY retains the register value.
286 Default n, which means that the PHY state is not changed. To work
287 around the issues, change this setting to y.
289 config RTL8201F_PHY_S700_RMII_TIMINGS
290 bool "Ethernet PHY RTL8201F: adjust RMII Tx Interface timings"
291 depends on PHY_REALTEK
293 This provides an option to configure specific timing requirements (needed
294 for proper PHY operations) for the PHY module present on ACTION SEMI S700
295 based cubieboard7. Exact timing requiremnets seems to be SoC specific
296 (and it's undocumented) that comes from vendor code itself.
299 bool "Microchip(SMSC) Ethernet PHYs support"
301 config PHY_TERANETICS
302 bool "Teranetics Ethernet PHYs support"
305 bool "Texas Instruments Ethernet PHYs support"
307 Adds PHY registration support for TI PHYs.
309 config PHY_TI_DP83867
311 bool "Texas Instruments Ethernet DP83867 PHY support"
313 Adds support for the TI DP83867 1Gbit PHY.
315 config PHY_TI_DP83869
317 bool "Texas Instruments Ethernet DP83869 PHY support"
319 Adds support for the TI DP83869 1Gbit PHY.
321 config PHY_TI_GENERIC
323 bool "Texas Instruments Generic Ethernet PHYs support"
325 Adds support for Generic TI PHYs that don't need special handling but
326 the PHY name is associated with a PHY ID.
329 bool "Vitesse Ethernet PHYs support"
332 bool "Xilinx Ethernet PHYs support"
334 config PHY_XILINX_GMII2RGMII
335 bool "Xilinx GMII to RGMII Ethernet PHYs support"
337 This adds support for Xilinx GMII to RGMII IP core. This IP acts
338 as bridge between MAC connected over GMII and external phy that
339 is connected over RGMII interface.
342 bool "Intel XWAY PHY support"
344 This adds support for the Intel XWAY (formerly Lantiq) Gbe PHYs.
346 config PHY_ETHERNET_ID
347 bool "Read ethernet PHY id"
349 default y if ZYNQ_GEM
351 Enable this config to read ethernet phy id from the phy node of DT
352 and create a phy device using id.
355 bool "Fixed-Link PHY"
357 Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
358 connection (MII, RGMII, ...).
359 There is nothing like autoneogation and so
360 on, the link is always up with fixed speed and fixed duplex-setting.
361 More information: doc/device-tree-bindings/net/fixed-link.txt
364 bool "NC-SI based PHY"
369 bool "NXP mEMAC PHY support"
371 config SYS_MEMAC_LITTLE_ENDIAN
372 bool "mEMAC is access in little endian mode"
373 depends on FSL_MEMAC || FSL_LS_MDIO
375 config PHY_RESET_DELAY
376 int "Extra delay after reset before MII register access"
379 Some PHYs need extra delay after reset before any MII register access
380 is possible. For such PHY, set this option to the usec delay