3 bool "Bit-banged ethernet MII management channel support"
5 config MV88E6352_SWITCH
6 bool "Marvell 88E6352 switch support"
9 bool "Ethernet PHY (physical media interface) support"
12 Enable Ethernet PHY (physical media interface) support.
16 config PHY_ADDR_ENABLE
17 bool "Limit phy address"
18 default y if ARCH_SUNXI
20 Select this if you want to control which phy address is used
25 default 1 if ARCH_SUNXI
28 The address of PHY on MII bus. Usually in range of 0 to 31.
32 bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
34 Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
35 This currently supports BCM53125 and similar models.
44 hex "Bitmask of PHY ports"
48 config MV88E61XX_SWITCH
49 bool "Marvell MV88E61xx Ethernet switch PHY support."
53 config MV88E61XX_CPU_PORT
56 config MV88E61XX_PHY_PORTS
57 hex "Bitmask of PHY Ports"
59 config MV88E61XX_FIXED_PORTS
60 hex "Bitmask of PHYless serdes Ports"
62 endif # MV88E61XX_SWITCH
65 bool "Generic 10G PHY support"
67 menuconfig PHY_AQUANTIA
68 bool "Aquantia Ethernet PHYs support"
72 config PHY_AQUANTIA_UPLOAD_FW
73 bool "Aquantia firmware loading support"
75 depends on PHY_AQUANTIA
77 Aquantia PHYs use firmware which can be either loaded automatically
78 from storage directly attached to the phy or loaded by the boot loader
79 via MDIO commands. The firmware is loaded from a file, specified by
80 the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options.
82 config PHY_AQUANTIA_FW_PART
83 string "Aquantia firmware partition"
84 depends on PHY_AQUANTIA_UPLOAD_FW
86 Partition containing the firmware file.
88 config PHY_AQUANTIA_FW_NAME
89 string "Aquantia firmware filename"
90 depends on PHY_AQUANTIA_UPLOAD_FW
95 bool "Atheros Ethernet PHYs support"
98 bool "Broadcom Ethernet PHYs support"
101 bool "Cortina Ethernet PHYs support"
103 config SYS_CORTINA_NO_FW_UPLOAD
104 bool "Cortina firmware loading support"
106 depends on PHY_CORTINA
108 Cortina phy has provision to store phy firmware in attached dedicated
109 EEPROM. And boards designed with such EEPROM does not require firmware
113 prompt "Location of the Cortina firmware"
114 default SYS_CORTINA_FW_IN_NOR
115 depends on PHY_CORTINA
117 config SYS_CORTINA_FW_IN_MMC
118 bool "Cortina firmware in MMC"
120 config SYS_CORTINA_FW_IN_NAND
121 bool "Cortina firmware in NAND flash"
123 config SYS_CORTINA_FW_IN_NOR
124 bool "Cortina firmware in NOR flash"
126 config SYS_CORTINA_FW_IN_REMOTE
127 bool "Cortina firmware in remote device"
129 config SYS_CORTINA_FW_IN_SPIFLASH
130 bool "Cortina firmware in SPI flash"
134 config CORTINA_FW_ADDR
135 hex "Cortina Firmware Address"
136 depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
139 config CORTINA_FW_LENGTH
140 hex "Cortina Firmware Length"
141 depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
144 config PHY_CORTINA_ACCESS
145 bool "Cortina Access Ethernet PHYs support"
147 depends on CORTINA_NI_ENET
149 Cortina Access Ethernet PHYs init process
152 bool "Davicom Ethernet PHYs support"
155 bool "LSI TruePHY ET1011C support"
158 bool "LXT971 Ethernet PHY support"
161 bool "Marvell Ethernet PHYs support"
164 bool "Amlogic Meson GXL Internal PHY support"
167 bool "Micrel Ethernet PHYs support"
169 Enable support for the GbE PHYs manufactured by Micrel (now
170 a part of Microchip). This includes drivers for the KSZ804, KSZ8031,
171 KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx
172 family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel
173 KSZ90x1 family support" is selected).
177 config PHY_MICREL_KSZ9021
179 select PHY_MICREL_KSZ90X1
181 config PHY_MICREL_KSZ9031
183 select PHY_MICREL_KSZ90X1
185 config PHY_MICREL_KSZ90X1
186 bool "Micrel KSZ90x1 family support"
189 Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
190 enabled, the extended register read/write for KSZ90x1 PHYs
191 is supported through the 'mdio' command and any RGMII signal
192 delays configured in the device tree will be applied to the
193 PHY during initialization.
195 config PHY_MICREL_KSZ8XXX
196 bool "Micrel KSZ8xxx family support"
198 Enable support for the 8000 series 10/100 PHYs manufactured by Micrel
199 (now a part of Microchip). This includes drivers for the KSZ804,
200 KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
205 bool "Microsemi Corp Ethernet PHYs support"
208 bool "National Semiconductor Ethernet PHYs support"
210 config PHY_NXP_C45_TJA11XX
211 tristate "NXP C45 TJA11XX PHYs"
213 Enable support for NXP C45 TJA11XX PHYs.
214 Currently supports only the TJA1103 PHY.
217 bool "Realtek Ethernet PHYs support"
219 config RTL8211E_PINE64_GIGABIT_FIX
220 bool "Fix gigabit throughput on some Pine64+ models"
221 depends on PHY_REALTEK
223 Configure the Realtek RTL8211E found on some Pine64+ models differently to
224 fix throughput on Gigabit links, turning off all internal delays in the
225 process. The settings that this touches are not documented in the CONFREG
226 section of the RTL8211E datasheet, but come from Realtek by way of the
227 Pine64 engineering team.
229 config RTL8211X_PHY_FORCE_MASTER
230 bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
231 depends on PHY_REALTEK
233 Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
234 This can work around link stability and data corruption issues on gigabit
235 links which can occur in slave mode on certain PHYs, e.g. on the
238 Please note that two directly connected devices (i.e. via crossover cable)
239 will not be able to establish a link between each other if they both force
240 master mode. Multiple devices forcing master mode when connected by a
241 network switch do not pose a problem as the switch configures its affected
242 ports into slave mode.
244 This option only affects gigabit links. If you must establish a direct
245 connection between two devices which both force master mode, try forcing
246 the link speed to 100MBit/s.
250 config RTL8211F_PHY_FORCE_EEE_RXC_ON
251 bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
252 depends on PHY_REALTEK
255 The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
256 transitions to/from a lower power consumption level (Low Power Idle
257 mode) based on link utilization. When no packets are being
258 transmitted, the system goes to Low Power Idle mode to save power.
260 Under particular circumstances this setting can cause issues where
261 the PHY is unable to transmit or receive any packet when in LPI mode.
262 The problem is caused when the PHY is configured to stop receiving
263 the xMII clock while it is signaling LPI. For some PHYs the bit
264 configuring this behavior is set by the Linux kernel, causing the
265 issue in U-Boot on reboot if the PHY retains the register value.
267 Default n, which means that the PHY state is not changed. To work
268 around the issues, change this setting to y.
270 config RTL8201F_PHY_S700_RMII_TIMINGS
271 bool "Ethernet PHY RTL8201F: adjust RMII Tx Interface timings"
272 depends on PHY_REALTEK
274 This provides an option to configure specific timing requirements (needed
275 for proper PHY operations) for the PHY module present on ACTION SEMI S700
276 based cubieboard7. Exact timing requiremnets seems to be SoC specific
277 (and it's undocumented) that comes from vendor code itself.
280 bool "Microchip(SMSC) Ethernet PHYs support"
282 config PHY_TERANETICS
283 bool "Teranetics Ethernet PHYs support"
286 bool "Texas Instruments Ethernet PHYs support"
288 Adds PHY registration support for TI PHYs.
290 config PHY_TI_DP83867
292 bool "Texas Instruments Ethernet DP83867 PHY support"
294 Adds support for the TI DP83867 1Gbit PHY.
296 config PHY_TI_GENERIC
298 bool "Texas Instruments Generic Ethernet PHYs support"
300 Adds support for Generic TI PHYs that don't need special handling but
301 the PHY name is associated with a PHY ID.
304 bool "Vitesse Ethernet PHYs support"
307 bool "Xilinx Ethernet PHYs support"
309 config PHY_XILINX_GMII2RGMII
310 bool "Xilinx GMII to RGMII Ethernet PHYs support"
313 This adds support for Xilinx GMII to RGMII IP core. This IP acts
314 as bridge between MAC connected over GMII and external phy that
315 is connected over RGMII interface.
318 bool "Fixed-Link PHY"
321 Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
322 connection (MII, RGMII, ...).
323 There is nothing like autoneogation and so
324 on, the link is always up with fixed speed and fixed duplex-setting.
325 More information: doc/device-tree-bindings/net/fixed-link.txt
328 bool "NC-SI based PHY"