3 bool "Bit-banged ethernet MII management channel support"
5 config BITBANGMII_MULTI
6 bool "Enable the multi bus support"
9 config MV88E6352_SWITCH
10 bool "Marvell 88E6352 switch support"
13 bool "Ethernet PHY (physical media interface) support"
16 Enable Ethernet PHY (physical media interface) support.
20 config PHY_ADDR_ENABLE
21 bool "Limit phy address"
22 default y if ARCH_SUNXI
24 Select this if you want to control which phy address is used
29 default 1 if ARCH_SUNXI
32 The address of PHY on MII bus. Usually in range of 0 to 31.
36 bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
38 Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
39 This currently supports BCM53125 and similar models.
48 hex "Bitmask of PHY ports"
52 config MV88E61XX_SWITCH
53 bool "Marvell MV88E61xx Ethernet switch PHY support."
57 config MV88E61XX_CPU_PORT
60 config MV88E61XX_PHY_PORTS
61 hex "Bitmask of PHY Ports"
63 config MV88E61XX_FIXED_PORTS
64 hex "Bitmask of PHYless serdes Ports"
66 endif # MV88E61XX_SWITCH
69 bool "Generic 10G PHY support"
72 bool "Analog Devices Industrial Ethernet PHYs"
74 Add support for configuring RGMII on Analog Devices ADIN PHYs.
76 menuconfig PHY_AQUANTIA
77 bool "Aquantia Ethernet PHYs support"
81 config PHY_AQUANTIA_UPLOAD_FW
82 bool "Aquantia firmware loading support"
83 depends on PHY_AQUANTIA
85 Aquantia PHYs use firmware which can be either loaded automatically
86 from storage directly attached to the phy or loaded by the boot loader
87 via MDIO commands. The firmware is loaded from a file, specified by
88 the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options.
90 config PHY_AQUANTIA_FW_PART
91 string "Aquantia firmware partition"
92 depends on PHY_AQUANTIA_UPLOAD_FW
94 Partition containing the firmware file.
96 config PHY_AQUANTIA_FW_NAME
97 string "Aquantia firmware filename"
98 depends on PHY_AQUANTIA_UPLOAD_FW
103 bool "Atheros Ethernet PHYs support"
106 bool "Broadcom Ethernet PHYs support"
109 bool "Cortina Ethernet PHYs support"
111 config SYS_CORTINA_NO_FW_UPLOAD
112 bool "Cortina firmware loading support"
113 depends on PHY_CORTINA
115 Cortina phy has provision to store phy firmware in attached dedicated
116 EEPROM. And boards designed with such EEPROM does not require firmware
120 prompt "Location of the Cortina firmware"
121 default SYS_CORTINA_FW_IN_NOR
122 depends on PHY_CORTINA
124 config SYS_CORTINA_FW_IN_MMC
125 bool "Cortina firmware in MMC"
127 config SYS_CORTINA_FW_IN_NAND
128 bool "Cortina firmware in NAND flash"
130 config SYS_CORTINA_FW_IN_NOR
131 bool "Cortina firmware in NOR flash"
133 config SYS_CORTINA_FW_IN_REMOTE
134 bool "Cortina firmware in remote device"
136 config SYS_CORTINA_FW_IN_SPIFLASH
137 bool "Cortina firmware in SPI flash"
141 config CORTINA_FW_ADDR
142 hex "Cortina Firmware Address"
143 depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
146 config CORTINA_FW_LENGTH
147 hex "Cortina Firmware Length"
148 depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
151 config PHY_CORTINA_ACCESS
152 bool "Cortina Access Ethernet PHYs support"
154 depends on CORTINA_NI_ENET
156 Cortina Access Ethernet PHYs init process
159 bool "Davicom Ethernet PHYs support"
162 bool "LSI TruePHY ET1011C support"
165 bool "LXT971 Ethernet PHY support"
168 bool "Marvell Ethernet PHYs support"
171 bool "Amlogic Meson GXL Internal PHY support"
174 bool "Micrel Ethernet PHYs support"
176 Enable support for the GbE PHYs manufactured by Micrel (now
177 a part of Microchip). This includes drivers for the KSZ804, KSZ8031,
178 KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx
179 family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel
180 KSZ90x1 family support" is selected).
184 config PHY_MICREL_KSZ9021
186 select PHY_MICREL_KSZ90X1
188 config PHY_MICREL_KSZ9031
190 select PHY_MICREL_KSZ90X1
192 config PHY_MICREL_KSZ90X1
193 bool "Micrel KSZ90x1 family support"
196 Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
197 enabled, the extended register read/write for KSZ90x1 PHYs
198 is supported through the 'mdio' command and any RGMII signal
199 delays configured in the device tree will be applied to the
200 PHY during initialization.
202 config PHY_MICREL_KSZ8XXX
203 bool "Micrel KSZ8xxx family support"
205 Enable support for the 8000 series 10/100 PHYs manufactured by Micrel
206 (now a part of Microchip). This includes drivers for the KSZ804,
207 KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
212 bool "Microsemi Corp Ethernet PHYs support"
215 bool "National Semiconductor Ethernet PHYs support"
217 config PHY_NXP_C45_TJA11XX
218 tristate "NXP C45 TJA11XX PHYs"
220 Enable support for NXP C45 TJA11XX PHYs.
221 Currently supports only the TJA1103 PHY.
223 config PHY_NXP_TJA11XX
224 bool "NXP TJA11XX Ethernet PHYs support"
226 Currently supports the NXP TJA1100 and TJA1101 PHY.
229 bool "Realtek Ethernet PHYs support"
231 config RTL8211X_PHY_FORCE_MASTER
232 bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
233 depends on PHY_REALTEK
235 Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
236 This can work around link stability and data corruption issues on gigabit
237 links which can occur in slave mode on certain PHYs, e.g. on the
240 Please note that two directly connected devices (i.e. via crossover cable)
241 will not be able to establish a link between each other if they both force
242 master mode. Multiple devices forcing master mode when connected by a
243 network switch do not pose a problem as the switch configures its affected
244 ports into slave mode.
246 This option only affects gigabit links. If you must establish a direct
247 connection between two devices which both force master mode, try forcing
248 the link speed to 100MBit/s.
252 config RTL8211F_PHY_FORCE_EEE_RXC_ON
253 bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
254 depends on PHY_REALTEK
256 The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
257 transitions to/from a lower power consumption level (Low Power Idle
258 mode) based on link utilization. When no packets are being
259 transmitted, the system goes to Low Power Idle mode to save power.
261 Under particular circumstances this setting can cause issues where
262 the PHY is unable to transmit or receive any packet when in LPI mode.
263 The problem is caused when the PHY is configured to stop receiving
264 the xMII clock while it is signaling LPI. For some PHYs the bit
265 configuring this behavior is set by the Linux kernel, causing the
266 issue in U-Boot on reboot if the PHY retains the register value.
268 Default n, which means that the PHY state is not changed. To work
269 around the issues, change this setting to y.
271 config RTL8201F_PHY_S700_RMII_TIMINGS
272 bool "Ethernet PHY RTL8201F: adjust RMII Tx Interface timings"
273 depends on PHY_REALTEK
275 This provides an option to configure specific timing requirements (needed
276 for proper PHY operations) for the PHY module present on ACTION SEMI S700
277 based cubieboard7. Exact timing requiremnets seems to be SoC specific
278 (and it's undocumented) that comes from vendor code itself.
281 bool "Microchip(SMSC) Ethernet PHYs support"
283 config PHY_TERANETICS
284 bool "Teranetics Ethernet PHYs support"
287 bool "Texas Instruments Ethernet PHYs support"
289 Adds PHY registration support for TI PHYs.
291 config PHY_TI_DP83867
293 bool "Texas Instruments Ethernet DP83867 PHY support"
295 Adds support for the TI DP83867 1Gbit PHY.
297 config PHY_TI_DP83869
299 bool "Texas Instruments Ethernet DP83869 PHY support"
301 Adds support for the TI DP83869 1Gbit PHY.
303 config PHY_TI_GENERIC
305 bool "Texas Instruments Generic Ethernet PHYs support"
307 Adds support for Generic TI PHYs that don't need special handling but
308 the PHY name is associated with a PHY ID.
311 bool "Vitesse Ethernet PHYs support"
314 bool "Xilinx Ethernet PHYs support"
316 config PHY_XILINX_GMII2RGMII
317 bool "Xilinx GMII to RGMII Ethernet PHYs support"
320 This adds support for Xilinx GMII to RGMII IP core. This IP acts
321 as bridge between MAC connected over GMII and external phy that
322 is connected over RGMII interface.
324 config PHY_ETHERNET_ID
325 bool "Read ethernet PHY id"
327 default y if ZYNQ_GEM
329 Enable this config to read ethernet phy id from the phy node of DT
330 and create a phy device using id.
333 bool "Fixed-Link PHY"
336 Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
337 connection (MII, RGMII, ...).
338 There is nothing like autoneogation and so
339 on, the link is always up with fixed speed and fixed duplex-setting.
340 More information: doc/device-tree-bindings/net/fixed-link.txt
343 bool "NC-SI based PHY"
348 config PHY_RESET_DELAY
349 int "Extra delay after reset before MII register access"
352 Some PHYs need extra delay after reset before any MII register access
353 is possible. For such PHY, set this option to the usec delay