1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2015-2016 Freescale Semiconductor, Inc.
11 #include <dm/platform_data/pfe_dm_eth.h>
13 #include <linux/delay.h>
14 #include <net/pfe_eth/pfe_eth.h>
15 #include <net/pfe_eth/pfe_mdio.h>
17 struct gemac_s gem_info[] = {
18 /* PORT_0 configuration */
21 .gemac_speed = PFE_MAC_SPEED_1000M,
22 .gemac_duplex = DUPLEX_FULL,
25 .phy_address = CONFIG_PFE_EMAC1_PHY_ADDR,
26 .phy_mode = PHY_INTERFACE_MODE_SGMII,
28 /* PORT_1 configuration */
31 .gemac_speed = PFE_MAC_SPEED_1000M,
32 .gemac_duplex = DUPLEX_FULL,
35 .phy_address = CONFIG_PFE_EMAC2_PHY_ADDR,
36 .phy_mode = PHY_INTERFACE_MODE_RGMII_TXID,
40 static inline void pfe_gemac_enable(void *gemac_base)
42 writel(readl(gemac_base + EMAC_ECNTRL_REG) |
43 EMAC_ECNTRL_ETHER_EN, gemac_base + EMAC_ECNTRL_REG);
46 static inline void pfe_gemac_disable(void *gemac_base)
48 writel(readl(gemac_base + EMAC_ECNTRL_REG) &
49 ~EMAC_ECNTRL_ETHER_EN, gemac_base + EMAC_ECNTRL_REG);
52 static inline void pfe_gemac_set_speed(void *gemac_base, u32 speed)
54 struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
55 u32 ecr = readl(gemac_base + EMAC_ECNTRL_REG) & ~EMAC_ECNTRL_SPEED;
56 u32 rcr = readl(gemac_base + EMAC_RCNTRL_REG) & ~EMAC_RCNTRL_RMII_10T;
57 u32 rgmii_pcr = in_be32(&scfg->rgmiipcr) &
58 ~(SCFG_RGMIIPCR_SETSP_1000M | SCFG_RGMIIPCR_SETSP_10M);
60 if (speed == _1000BASET) {
61 ecr |= EMAC_ECNTRL_SPEED;
62 rgmii_pcr |= SCFG_RGMIIPCR_SETSP_1000M;
63 } else if (speed != _100BASET) {
64 rcr |= EMAC_RCNTRL_RMII_10T;
65 rgmii_pcr |= SCFG_RGMIIPCR_SETSP_10M;
68 writel(ecr, gemac_base + EMAC_ECNTRL_REG);
69 out_be32(&scfg->rgmiipcr, rgmii_pcr | SCFG_RGMIIPCR_SETFD);
71 /* remove loop back */
72 rcr &= ~EMAC_RCNTRL_LOOP;
73 /* enable flow control */
74 rcr |= EMAC_RCNTRL_FCE;
77 rcr |= EMAC_RCNTRL_MII_MODE;
79 writel(rcr, gemac_base + EMAC_RCNTRL_REG);
81 /* Enable Tx full duplex */
82 writel(readl(gemac_base + EMAC_TCNTRL_REG) | EMAC_TCNTRL_FDEN,
83 gemac_base + EMAC_TCNTRL_REG);
86 static int pfe_eth_write_hwaddr(struct udevice *dev)
88 struct pfe_eth_dev *priv = dev_get_priv(dev);
89 struct gemac_s *gem = priv->gem;
90 struct eth_pdata *pdata = dev_get_platdata(dev);
91 uchar *mac = pdata->enetaddr;
93 writel((mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3],
94 gem->gemac_base + EMAC_PHY_ADDR_LOW);
95 writel((mac[4] << 24) + (mac[5] << 16) + 0x8808, gem->gemac_base +
100 /** Stops or Disables GEMAC pointing to this eth iface.
102 * @param[in] edev Pointer to eth device structure.
106 static inline void pfe_eth_stop(struct udevice *dev)
108 struct pfe_eth_dev *priv = dev_get_priv(dev);
110 pfe_gemac_disable(priv->gem->gemac_base);
112 gpi_disable(priv->gem->egpi_base);
115 static int pfe_eth_start(struct udevice *dev)
117 struct pfe_eth_dev *priv = dev_get_priv(dev);
118 struct gemac_s *gem = priv->gem;
121 /* set ethernet mac address */
122 pfe_eth_write_hwaddr(dev);
124 writel(EMAC_TFWR, gem->gemac_base + EMAC_TFWR_STR_FWD);
125 writel(EMAC_RX_SECTION_FULL_32, gem->gemac_base + EMAC_RX_SECTIOM_FULL);
126 writel(EMAC_TRUNC_FL_16K, gem->gemac_base + EMAC_TRUNC_FL);
127 writel(EMAC_TX_SECTION_EMPTY_30, gem->gemac_base
128 + EMAC_TX_SECTION_EMPTY);
129 writel(EMAC_MIBC_NO_CLR_NO_DIS, gem->gemac_base
130 + EMAC_MIB_CTRL_STS_REG);
133 /* Start up the PHY */
134 if (phy_startup(priv->phydev)) {
135 printf("Could not initialize PHY %s\n",
136 priv->phydev->dev->name);
139 speed = priv->phydev->speed;
140 printf("Speed detected %x\n", speed);
141 if (priv->phydev->duplex == DUPLEX_HALF) {
142 printf("Half duplex not supported\n");
147 pfe_gemac_set_speed(gem->gemac_base, speed);
150 gpi_enable(gem->egpi_base);
153 pfe_gemac_enable(gem->gemac_base);
158 static int pfe_eth_send(struct udevice *dev, void *packet, int length)
160 struct pfe_eth_dev *priv = (struct pfe_eth_dev *)dev->priv;
165 rc = pfe_send(priv->gemac_port, packet, length);
168 printf("Tx Queue full\n");
180 printf("Tx timeout, send failed\n");
187 static int pfe_eth_recv(struct udevice *dev, int flags, uchar **packetp)
189 struct pfe_eth_dev *priv = dev_get_priv(dev);
194 len = pfe_recv(&pkt_buf, &phy_port);
197 return -EAGAIN; /* no packet in rx */
201 debug("Rx pkt: pkt_buf(0x%p), phy_port(%d), len(%d)\n", pkt_buf,
203 if (phy_port != priv->gemac_port) {
204 printf("Rx pkt not on expected port\n");
213 static int pfe_eth_probe(struct udevice *dev)
215 struct pfe_eth_dev *priv = dev_get_priv(dev);
216 struct pfe_ddr_address *pfe_addr;
217 struct pfe_eth_pdata *pdata = dev_get_platdata(dev);
219 static int init_done;
222 pfe_addr = (struct pfe_ddr_address *)malloc(sizeof
223 (struct pfe_ddr_address));
227 pfe_addr->ddr_pfe_baseaddr =
228 (void *)pdata->pfe_ddr_addr.ddr_pfe_baseaddr;
229 pfe_addr->ddr_pfe_phys_baseaddr =
230 (unsigned long)pdata->pfe_ddr_addr.ddr_pfe_phys_baseaddr;
232 debug("ddr_pfe_baseaddr: %p, ddr_pfe_phys_baseaddr: %08x\n",
233 pfe_addr->ddr_pfe_baseaddr,
234 (u32)pfe_addr->ddr_pfe_phys_baseaddr);
236 ret = pfe_drv_init(pfe_addr);
240 init_pfe_scfg_dcfg_regs();
244 priv->gemac_port = pdata->pfe_eth_pdata_mac.phy_interface;
245 priv->gem = &gem_info[priv->gemac_port];
248 switch (priv->gemac_port) {
251 priv->gem->gemac_base = EMAC1_BASE_ADDR;
252 priv->gem->egpi_base = EGPI1_BASE_ADDR;
255 priv->gem->gemac_base = EMAC2_BASE_ADDR;
256 priv->gem->egpi_base = EGPI2_BASE_ADDR;
260 ret = pfe_eth_board_init(dev);
264 #if defined(CONFIG_PHYLIB)
265 ret = pfe_phy_configure(priv, pdata->pfe_eth_pdata_mac.phy_interface,
266 gem_info[priv->gemac_port].phy_address);
271 static int pfe_eth_bind(struct udevice *dev)
273 struct pfe_eth_pdata *pdata = dev_get_platdata(dev);
276 sprintf(name, "pfe_eth%u", pdata->pfe_eth_pdata_mac.phy_interface);
278 return device_set_name(dev, name);
281 static const struct eth_ops pfe_eth_ops = {
282 .start = pfe_eth_start,
283 .send = pfe_eth_send,
284 .recv = pfe_eth_recv,
285 .free_pkt = pfe_eth_free_pkt,
286 .stop = pfe_eth_stop,
287 .write_hwaddr = pfe_eth_write_hwaddr,
290 U_BOOT_DRIVER(pfe_eth) = {
293 .bind = pfe_eth_bind,
294 .probe = pfe_eth_probe,
295 .remove = pfe_eth_remove,
297 .priv_auto_alloc_size = sizeof(struct pfe_eth_dev),
298 .platdata_auto_alloc_size = sizeof(struct pfe_eth_pdata)