2 * @file IxParityENAcc.h
4 * @author Intel Corporation
7 * @brief This file contains the public API for the IXP400 Parity Error
8 * Notifier access component.
11 * IXP400 SW Release version 2.0
13 * -- Copyright Notice --
16 * Copyright 2001-2005, Intel Corporation.
17 * All rights reserved.
20 * SPDX-License-Identifier: BSD-3-Clause
22 * -- End of Copyright Notice --
26 * @defgroup IxParityENAcc IXP400 Parity Error Notifier (IxParityENAcc) API
28 * @brief The public API for the Parity Error Notifier
33 #ifndef IXPARITYENACC_H
34 #define IXPARITYENACC_H
41 * #defines for function return types, etc.
45 * @ingroup IxParityENAcc
47 * @enum IxParityENAccStatus
49 * @brief The status as returend from the API
51 typedef enum /**< IxParityENAccStatus */
53 IX_PARITYENACC_SUCCESS = IX_SUCCESS, /**< The request is successful */
54 IX_PARITYENACC_INVALID_PARAMETERS, /**< Invalid or NULL parameters passed */
55 IX_PARITYENACC_NOT_INITIALISED, /**< Access layer has not been initialised before accessing the APIs */
56 IX_PARITYENACC_ALREADY_INITIALISED, /**< Access layer has already been initialised */
57 IX_PARITYENACC_OPERATION_FAILED, /**< Operation did not succeed due to hardware failure */
58 IX_PARITYENACC_NO_PARITY /**< No parity condition exits or has already been cleared */
59 } IxParityENAccStatus;
62 * @ingroup IxParityENAcc
64 * @enum IxParityENAccParityType
66 * @brief Odd or Even Parity Type
68 typedef enum /**< IxParityENAccParityType */
70 IX_PARITYENACC_EVEN_PARITY, /**< Even Parity */
71 IX_PARITYENACC_ODD_PARITY /**< Odd Parity */
72 } IxParityENAccParityType;
75 * @ingroup IxParityENAcc
77 * @enum IxParityENAccConfigOption
79 * @brief The parity error enable/disable configuration option
81 typedef enum /**< IxParityENAccConfigOption */
83 IX_PARITYENACC_DISABLE, /**< Disable parity error detection */
84 IX_PARITYENACC_ENABLE /**< Enable parity error detection */
85 } IxParityENAccConfigOption;
88 * @ingroup IxParityENAcc
90 * @struct IxParityENAccNpeConfig
92 * @brief NPE parity detection is to be enabled/disabled
94 typedef struct /**< IxParityENAccNpeConfig */
96 IxParityENAccConfigOption ideEnabled; /**< NPE IMem, DMem and External */
97 IxParityENAccParityType parityOddEven; /**< Parity - Odd or Even */
98 } IxParityENAccNpeConfig ;
102 * @ingroup IxParityENAcc
104 * @struct IxParityENAccMcuConfig
106 * @brief MCU pairty detection is to be enabled/disabled
108 typedef struct /**< IxParityENAccMcuConfig */
110 IxParityENAccConfigOption singlebitDetectEnabled; /**< Single-bit parity error detection */
111 IxParityENAccConfigOption singlebitCorrectionEnabled; /**< Single-bit parity error correction */
112 IxParityENAccConfigOption multibitDetectionEnabled; /**< Multi-bit parity error detection */
113 } IxParityENAccMcuConfig ;
117 * @ingroup IxParityENAcc
119 * @struct IxParityENAccEbcConfig
121 * @brief Expansion Bus Controller parity detection is to be enabled or disabled
123 * Note: All the Chip Select(s) and External Masters will have the same parity
125 typedef struct /**< IxParityENAccEbcConfig */
127 IxParityENAccConfigOption ebcCs0Enabled; /**< Expansion Bus Controller - Chip Select 0 */
128 IxParityENAccConfigOption ebcCs1Enabled; /**< Expansion Bus Controller - Chip Select 1 */
129 IxParityENAccConfigOption ebcCs2Enabled; /**< Expansion Bus Controller - Chip Select 2 */
130 IxParityENAccConfigOption ebcCs3Enabled; /**< Expansion Bus Controller - Chip Select 3 */
131 IxParityENAccConfigOption ebcCs4Enabled; /**< Expansion Bus Controller - Chip Select 4 */
132 IxParityENAccConfigOption ebcCs5Enabled; /**< Expansion Bus Controller - Chip Select 5 */
133 IxParityENAccConfigOption ebcCs6Enabled; /**< Expansion Bus Controller - Chip Select 6 */
134 IxParityENAccConfigOption ebcCs7Enabled; /**< Expansion Bus Controller - Chip Select 7 */
135 IxParityENAccConfigOption ebcExtMstEnabled; /**< External Master on Expansion bus */
136 IxParityENAccParityType parityOddEven; /**< Parity - Odd or Even */
137 } IxParityENAccEbcConfig ;
140 * @ingroup IxParityENAcc
142 * @struct IxParityENAccHWParityConfig
144 * @brief Parity error configuration of the Hardware Blocks
146 typedef struct /**< IxParityENAccHWParityConfig */
148 IxParityENAccNpeConfig npeAConfig; /**< NPE A parity detection is to be enabled/disabled */
149 IxParityENAccNpeConfig npeBConfig; /**< NPE B parity detection is to be enabled/disabled */
150 IxParityENAccNpeConfig npeCConfig; /**< NPE C parity detection is to be enabled/disabled */
151 IxParityENAccMcuConfig mcuConfig; /**< MCU pairty detection is to be enabled/disabled */
152 IxParityENAccConfigOption swcpEnabled; /**< SWCP parity detection is to be enabled */
153 IxParityENAccConfigOption aqmEnabled; /**< AQM parity detection is to be enabled */
154 IxParityENAccEbcConfig ebcConfig; /**< Expansion Bus Controller parity detection is to be enabled/disabled */
155 } IxParityENAccHWParityConfig;
159 * @ingroup IxParityENAcc
161 * @struct IxParityENAccNpeParityErrorStats
163 * @brief NPE parity error statistics
165 typedef struct /* IxParityENAccNpeParityErrorStats */
167 UINT32 parityErrorsIMem; /**< Parity errors in Instruction Memory */
168 UINT32 parityErrorsDMem; /**< Parity errors in Data Memory */
169 UINT32 parityErrorsExternal; /**< Parity errors in NPE External Entities */
170 } IxParityENAccNpeParityErrorStats;
173 * @ingroup IxParityENAcc
175 * @struct IxParityENAccMcuParityErrorStats
177 * @brief DDR Memory Control Unit parity error statistics
179 * Note: There could be two outstanding parity errors at any given time whose address
180 * details captured. If there is no room for the new interrupt then it would be treated
181 * as overflow parity condition.
183 typedef struct /* IxParityENAccMcuParityErrorStats */
185 UINT32 parityErrorsSingleBit; /**< Parity errors of the type Single-Bit */
186 UINT32 parityErrorsMultiBit; /**< Parity errors of the type Multi-Bit */
187 UINT32 parityErrorsOverflow; /**< Parity errors when more than two parity errors occured */
188 } IxParityENAccMcuParityErrorStats;
191 * @ingroup IxParityENAcc
193 * @struct IxParityENAccEbcParityErrorStats
195 * @brief Expansion Bus Controller parity error statistics
197 typedef struct /* IxParityENAccEbcParityErrorStats */
199 UINT32 parityErrorsInbound; /**< Odd bit parity errors on inbound transfers */
200 UINT32 parityErrorsOutbound; /**< Odd bit parity errors on outbound transfers */
201 } IxParityENAccEbcParityErrorStats;
205 * @ingroup IxParityENAcc
207 * @struct IxParityENAccParityErrorStats
209 * @brief Parity Error Statistics for the all the hardware blocks
211 typedef struct /**< IxParityENAccParityErrorStats */
213 IxParityENAccNpeParityErrorStats npeStats; /**< NPE parity error statistics */
214 IxParityENAccMcuParityErrorStats mcuStats; /**< MCU parity error statistics */
215 IxParityENAccEbcParityErrorStats ebcStats; /**< EBC parity error statistics */
216 UINT32 swcpStats; /**< SWCP parity error statistics */
217 UINT32 aqmStats; /**< AQM parity error statistics */
218 } IxParityENAccParityErrorStats;
222 * @ingroup IxParityENAcc
224 * @enum IxParityENAccParityErrorSource
226 * @brief The source of the parity error notification
228 typedef enum /**< IxParityENAccParityErrorSource */
230 IX_PARITYENACC_NPE_A_IMEM, /**< NPE A - Instruction memory */
231 IX_PARITYENACC_NPE_A_DMEM, /**< NPE A - Data memory */
232 IX_PARITYENACC_NPE_A_EXT, /**< NPE A - External Entity*/
233 IX_PARITYENACC_NPE_B_IMEM, /**< NPE B - Instruction memory */
234 IX_PARITYENACC_NPE_B_DMEM, /**< NPE B - Data memory */
235 IX_PARITYENACC_NPE_B_EXT, /**< NPE B - External Entity*/
236 IX_PARITYENACC_NPE_C_IMEM, /**< NPE C - Instruction memory */
237 IX_PARITYENACC_NPE_C_DMEM, /**< NPE C - Data memory */
238 IX_PARITYENACC_NPE_C_EXT, /**< NPE C - External Entity*/
239 IX_PARITYENACC_SWCP, /**< SWCP */
240 IX_PARITYENACC_AQM, /**< AQM */
241 IX_PARITYENACC_MCU_SBIT, /**< DDR Memory Controller Unit - Single bit parity */
242 IX_PARITYENACC_MCU_MBIT, /**< DDR Memory Controller Unit - Multi bit parity */
243 IX_PARITYENACC_MCU_OVERFLOW, /**< DDR Memory Controller Unit - Parity errors in excess of two */
244 IX_PARITYENACC_EBC_CS, /**< Expansion Bus Controller - Chip Select */
245 IX_PARITYENACC_EBC_EXTMST /**< Expansion Bus Controller - External Master */
246 } IxParityENAccParityErrorSource;
249 * @ingroup IxParityENAcc
251 * @enum IxParityENAccParityErrorAccess
253 * @brief The type of access resulting in parity error
255 typedef enum /**< IxParityENAccParityErrorAccess */
257 IX_PARITYENACC_READ, /**< Read Access */
258 IX_PARITYENACC_WRITE /**< Write Access */
259 } IxParityENAccParityErrorAccess;
262 * @ingroup IxParityENAcc
264 * @typedef IxParityENAccParityErrorAddress
266 * @brief The memory location which has parity error
268 typedef UINT32 IxParityENAccParityErrorAddress;
271 * @ingroup IxParityENAcc
273 * @typedef IxParityENAccParityErrorData
275 * @brief The data read from the memory location which has parity error
277 typedef UINT32 IxParityENAccParityErrorData;
280 * @ingroup IxParityENAcc
282 * @enum IxParityENAccParityErrorRequester
284 * @brief The requester interface through which the SDRAM memory access
285 * resulted in the parity error.
287 typedef enum /**< IxParityENAccParityErrorRequester */
289 IX_PARITYENACC_MPI, /**< Direct Memory Port Interface */
290 IX_PARITYENACC_AHB_BUS /**< South or North AHB Bus */
291 } IxParityENAccParityErrorRequester;
294 * @ingroup IxParityENAcc
296 * @enum IxParityENAccAHBErrorMaster
298 * @brief The Master on the AHB bus interface whose transaction might have
299 * resulted in the parity error notification to XScale.
301 typedef enum /**< IxParityENAccAHBErrorMaster */
303 IX_PARITYENACC_AHBN_MST_NPE_A, /**< NPE - A */
304 IX_PARITYENACC_AHBN_MST_NPE_B, /**< NPE - B */
305 IX_PARITYENACC_AHBN_MST_NPE_C, /**< NPE - C */
306 IX_PARITYENACC_AHBS_MST_XSCALE, /**< XScale Bus Interface Unit */
307 IX_PARITYENACC_AHBS_MST_PBC, /**< PCI Bus Controller */
308 IX_PARITYENACC_AHBS_MST_EBC, /**< Expansion Bus Controller */
309 IX_PARITYENACC_AHBS_MST_AHB_BRIDGE, /**< AHB Bridge */
310 IX_PARITYENACC_AHBS_MST_USBH /**< USB Host Controller */
311 } IxParityENAccAHBErrorMaster;
314 * @ingroup IxParityENAcc
316 * @enum IxParityENAccAHBErrorSlave
318 * @brief The Slave on the AHB bus interface whose transaction might have
319 * resulted in the parity error notification to XScale.
321 typedef enum /**< IxParityENAccAHBErrorSlave */
323 IX_PARITYENACC_AHBN_SLV_MCU, /**< Memory Control Unit */
324 IX_PARITYENACC_AHBN_SLV_AHB_BRIDGE, /**< AHB Bridge */
325 IX_PARITYENACC_AHBS_SLV_MCU, /**< XScale Bus Interface Unit */
326 IX_PARITYENACC_AHBS_SLV_APB_BRIDGE, /**< APB Bridge */
327 IX_PARITYENACC_AHBS_SLV_AQM, /**< AQM */
328 IX_PARITYENACC_AHBS_SLV_RSA, /**< RSA (Crypto Bus) */
329 IX_PARITYENACC_AHBS_SLV_PBC, /**< PCI Bus Controller */
330 IX_PARITYENACC_AHBS_SLV_EBC, /**< Expansion Bus Controller */
331 IX_PARITYENACC_AHBS_SLV_USBH /**< USB Host Controller */
332 } IxParityENAccAHBErrorSlave;
335 * @ingroup IxParityENAcc
337 * @struct IxParityENAccAHBErrorTransaction
339 * @brief The Master and Slave on the AHB bus interface whose transaction might
340 * have resulted in the parity error notification to XScale.
342 * NOTE: This information may be used in the data abort exception handler
343 * to differentiate between the XScale and non-XScale access to the SDRAM
346 typedef struct /**< IxParityENAccAHBErrorTransaction */
348 IxParityENAccAHBErrorMaster ahbErrorMaster; /**< Master on AHB bus */
349 IxParityENAccAHBErrorSlave ahbErrorSlave; /**< Slave on AHB bus */
350 } IxParityENAccAHBErrorTransaction;
353 * @ingroup IxParityENAcc
355 * @struct IxParityENAccParityErrorContextMessage
357 * @brief Parity Error Context Message
359 typedef struct /**< IxParityENAccParityErrorContextMessage */
361 IxParityENAccParityErrorSource pecParitySource; /**< Source info of parity error */
362 IxParityENAccParityErrorAccess pecAccessType; /**< Read or Write Access
363 Read - NPE, SWCP, AQM, DDR MCU,
364 Exp Bus Ctrlr (Outbound)
366 Exp Bus Ctrlr (Inbound
367 i.e., External Master) */
368 IxParityENAccParityErrorAddress pecAddress; /**< Address faulty location
369 Valid only for AQM, DDR MCU,
371 IxParityENAccParityErrorData pecData; /**< Data read from the faulty location
372 Valid only for AQM and DDR MCU
373 For DDR MCU it is the bit location
374 of the Single-bit parity */
375 IxParityENAccParityErrorRequester pecRequester; /**< Requester of SDRAM memory access
376 Valid only for the DDR MCU */
377 IxParityENAccAHBErrorTransaction ahbErrorTran; /**< Master and Slave information on the
378 last AHB Error Transaction */
379 } IxParityENAccParityErrorContextMessage;
382 * @ingroup IxParityENAcc
384 * @typedef IxParityENAccCallback
386 * @brief This prototype shows the format of a callback function.
388 * The callback will be used to notify the parity error to the client application.
389 * The callback will be registered by @ref ixParityENAccCallbackRegister.
391 * It will be called from an ISR when a parity error is detected and thus
392 * needs to follow the interrupt callable function conventions.
395 typedef void (*IxParityENAccCallback) (void);
399 * Prototypes for interface functions.
403 * @ingroup IxParityENAcc
405 * @fn IxParityENAccStatus ixParityENAccInit(void)
407 * @brief This function will initialise the IxParityENAcc component.
409 * This function will initialise the IxParityENAcc component. It should only be
410 * called once, prior to using the IxParityENAcc component.
412 * <OL><LI>It initialises the internal data structures, registers the ISR that
413 * will be triggered when a parity error occurs in IXP4xx silicon.</LI></OL>
415 * @li Re-entrant : No
416 * @li ISR Callable : No
418 * @return @li IX_PARITYENACC_SUCCESS - Initialization is successful
419 * @li IX_PARITYENACC_ALREADY_INITIALISED - The access layer has already
421 * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because the
422 * operation didn't succeed on the hardware. Refer to error trace/log
426 PUBLIC IxParityENAccStatus ixParityENAccInit(void);
429 * @ingroup IxParityENAcc
431 * @fn IxParityENAccStatus ixParityENAccCallbackRegister (
432 IxParityENAccCallback parityErrNfyCallBack)
434 * @brief This function will register a new callback with IxParityENAcc component.
435 * It can also reregister a new callback replacing the old callback.
437 * @param parityErrNfyCallBack [in] - This parameter will specify the call-back
438 * function supplied by the client application.
440 * This interface registers the user application supplied call-back handler with
441 * the parity error handling access component after the init.
443 * The callback function will be called from an ISR that will be triggered by the
444 * parity error in the IXP400 silicon.
446 * The following actions will be performed by this function:
447 * <OL><LI>Check for the prior initialisation of the module before registering or
448 * re-registering of the callback.
449 * Check for parity error detection disabled before re-registration of the callback.
452 * @li Re-entrant : No
453 * @li ISR Callable : No
455 * @return @li IX_PARITYENACC_SUCCESS - The parameters check passed and the
456 * registration is successful.
457 * @li IX_PARITYENACC_INVALID_PARAMETERS - Request failed due to NULL
459 * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because the
460 * parity error detection not yet disabled.
461 * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior to
462 * the initialisation of the access layer.
465 PUBLIC IxParityENAccStatus ixParityENAccCallbackRegister (
466 IxParityENAccCallback parityErrNfyCallBack);
469 * @ingroup IxParityENAcc
471 * @fn IxParityENAccStatus ixParityENAccParityDetectionConfigure (
472 const IxParityENAccHWParityConfig *hwParityConfig)
474 * @brief This interface allows the client application to enable the parity
475 * error detection on the underlying hardware block.
477 * @param hwParityConfig [in] - Hardware blocks for which the parity error
478 * detection is to be enabled or disabled.
480 * The client application allocates and provides the reference to the buffer.
482 * It will also verify whether the specific hardware block is functional or not.
484 * NOTE: Failure in enabling or disabling of one or more components result in
485 * trace message but still returns IX_PARITYENACC_SUCCESS. Refer to the function
486 * @ref ixParityENAccParityDetectionQuery on how to verify the failures while
487 * enabling/disabling paritys error detection.
489 * It shall be invoked after the Init and CallbackRegister functions but before
490 * any other function of the IxParityENAcc layer.
492 * @li Re-entrant : No
493 * @li ISR Callable : No
495 * @return @li IX_PARITYENACC_SUCCESS - The parameters check passed and the
496 * request to enable/disable is successful.
497 * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to
498 * NULL parameter supplied.
499 * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because the
500 * operation didn't succeed on the hardware.
501 * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior to
502 * the initialisation of the access layer.
505 PUBLIC IxParityENAccStatus ixParityENAccParityDetectionConfigure (
506 const IxParityENAccHWParityConfig *hwParityConfig);
509 * @ingroup IxParityENAcc
511 * @fn IxParityENAccStatus ixParityENAccParityDetectionQuery (
512 IxParityENAccHWParityConfig * const hwParityConfig)
514 * @brief This interface allows the client application to determine the
515 * status of the parity error detection on the specified hardware blocks
517 * @param hwParityConfig [out] - Hardware blocks whose parity error detection
518 * has been enabled or disabled.
520 * The client application allocates and provides the reference to the buffer.
522 * This interface can be used immediately after the interface @ref
523 * ixParityENAccParityDetectionConfigure to see on which of the hardware blocks
524 * the parity error detection has either been enabled or disabled based on the
525 * client application request.
527 * @li Re-entrant : No
528 * @li ISR Callable : No
530 * @return @li IX_PARITYENACC_SUCCESS - The parameters check passed and the
531 * request to query on whether the hardware parity error detection
532 * is enabled or disabled is successful.
533 * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to
534 * NULL parameter or invalid values supplied.
535 * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior
536 * to the initialisation of the access layer.
539 PUBLIC IxParityENAccStatus ixParityENAccParityDetectionQuery(
540 IxParityENAccHWParityConfig * const hwParityConfig);
543 * @ingroup IxParityENAcc
545 * @fn IxParityENAccStatus ixParityENAccParityErrorContextGet(
546 IxParityENAccParityErrorContextMessage * const pecMessage)
548 * @brief This interface allows the client application to determine the
549 * status of the parity error context on hardware block for which the
550 * current parity error interrupt triggered.
552 * @param pecMessage [out] - The parity error context information of the
553 * parity interrupt currently being process.
555 * The client application allocates and provides the reference to the buffer.
557 * Refer to the data structure @ref IxParityENAccParityErrorContextMessage
560 * The routine will will fetch the parity error context in the following
561 * priority, if multiple parity errors observed.
564 * 0 - MCU (Multi-bit and single-bit in that order)
572 * NOTE: The information provided in the @ref IxParityENAccAHBErrorTransaction
573 * may be of help for the client application to decide on the course of action
574 * to take. This info is taken from the Performance Monitoring Unit register
575 * which records most recent error observed on the AHB bus. This information
576 * might have been overwritten by some other error by the time it is retrieved.
579 * @li Re-entrant : No
580 * @li ISR Callable : Yes
582 * @return @li IX_PARITYENACC_SUCCESS-The parameters check passed and the
583 * request to get the parity error context information is successful.
584 * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to
585 * NULL parameter is passed
586 * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because
587 * the operation didn't succeed on the hardware.
588 * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior
589 * to the initialisation of the access layer.
590 * @li IX_PARITYENACC_NO_PARITY - No parity condition exits or has
591 * already been cleared
594 PUBLIC IxParityENAccStatus ixParityENAccParityErrorContextGet(
595 IxParityENAccParityErrorContextMessage * const pecMessage);
598 * @ingroup IxParityENAcc
600 * @fn IxParityENAccStatus ixParityENAccParityErrorInterruptClear (
601 const IxParityENAccParityErrorContextMessage *pecMessage)
603 * @brief This interface helps the client application to clear off the
604 * interrupt condition on the hardware block identified in the parity
605 * error context message. Please refer to the table below as the operation
606 * varies depending on the interrupt source.
608 * @param pecMessage [in] - The parity error context information of the
609 * hardware block whose parity error interrupt condition is to disabled.
611 * The client application allocates and provides the reference to the buffer.
614 * ****************************************************************************
615 * Following actions will be taken during the interrupt clear for respective
618 * Parity Source Actions taken during Interrupt clear
619 * ------------- -------------------------------------------------------
620 * NPE-A Interrupt will be masked off at the interrupt controller
621 * so that it will not trigger continuously.
622 * Client application has to take appropriate action and
623 * re-configure the parity error detection subsequently.
624 * The client application will not be notified of further
625 * interrupts, until the re-configuration is done using
626 * @ref ixParityENAccParityDetectionConfigure.
628 * NPE-B Interrupt will be masked off at the interrupt controller
629 * so that it will not trigger continuously.
630 * Client application has to take appropriate action and
631 * re-configure the parity error detection subsequently.
632 * The client application will not be notified of further
633 * interrupts, until the re-configuration is done using
634 * @ref ixParityENAccParityDetectionConfigure.
636 * NPE-C Interrupt will be masked off at the interrupt controller
637 * Client application has to take appropriate action and
638 * re-configure the parity error detection subsequently.
639 * The client application will not be notified of further
640 * interrupts, until the re-configuration is done using
641 * @ref ixParityENAccParityDetectionConfigure.
643 * SWCP Interrupt will be masked off at the interrupt controller.
644 * Client application has to take appropriate action and
645 * re-configure the parity error detection subsequently.
646 * The client application will not be notified of further
647 * interrupts, until the re-configuration is done using
648 * @ref ixParityENAccParityDetectionConfigure.
650 * AQM Interrupt will be masked off at the interrupt controller.
651 * Client application has to take appropriate action and
652 * re-configure the parity error detection subsequently.
653 * The client application will not be notified of further
654 * interrupts, until the re-configuration is done using
655 * @ref ixParityENAccParityDetectionConfigure.
657 * MCU Parity interrupt condition is cleared at the SDRAM MCU for
661 * 3. Overflow condition i.e., more than two parity conditions
663 * Note that single-parity errors do not result in data abort
664 * and not all data aborts caused by multi-bit parity error.
666 * EXP Parity interrupt condition is cleared at the expansion bus
667 * controller for the following:
668 * 1. External master initiated Inbound write
669 * 2. Internal master (IXP400) initiated Outbound read
670 * ****************************************************************************
672 * @li Re-entrant : No
673 * @li ISR Callable : No
675 * @return @li IX_PARITYENACC_SUCCESS-The parameters check passed and the request
676 * to clear the parity error interrupt condition is successful.
677 * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to
678 * NULL parameters have been passed or contents have been
679 * supplied with invalid values.
680 * @li IX_PARITYENACC_OPERATION_FAILED - The request failed because
681 * the operation didn't succeed on the hardware.
682 * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior
683 * to the initialisation of the access layer.
686 PUBLIC IxParityENAccStatus ixParityENAccParityErrorInterruptClear (
687 const IxParityENAccParityErrorContextMessage *pecMessage);
690 * @ingroup IxParityENAcc
692 * @fn IxParityENAccStatus ixParityENAccStatsGet (
693 IxParityENAccParityErrorStats * const ixParityErrorStats)
695 * @brief This interface allows the client application to retrieve parity
696 * error statistics for all the hardware blocks
698 * @param ixParityErrorStats - [out] The statistics for all the hardware blocks.
700 * The client application allocates and provides the reference to the buffer.
702 * @li Re-entrant : No
703 * @li ISR Callable : Yes
705 * @return @li IX_PARITYENACC_SUCCESS-The parameters check passed and the
706 * request to retrieve parity error statistics for the hardware
707 * block is successful.
708 * @li IX_PARITYENACC_INVALID_PARAMETERS-The request failed due to a
709 * NULL parameter passed.
710 * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested prior
711 * to the initialisation of the access layer.
714 PUBLIC IxParityENAccStatus ixParityENAccStatsGet (
715 IxParityENAccParityErrorStats * const ixParityErrorStats);
718 * @ingroup IxParityENAcc
720 * @fn IxParityENAccStatus ixParityENAccStatsShow (void)
722 * @brief This interface allows the client application to print all the
723 * parity error statistics.
725 * @li Re-entrant : No
726 * @li ISR Callable : No
728 * @return @li IX_PARITYENACC_SUCCESS - The request to show the pairty
729 * error statistics is successful.
730 * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested
731 * prior to the initialisation of the access layer.
734 PUBLIC IxParityENAccStatus ixParityENAccStatsShow (void);
737 * @ingroup IxParityENAcc
739 * @fn IxParityENAccStatus ixParityENAccStatsReset (void)
741 * @brief This interface allows the client application to reset all the
742 * parity error statistics.
744 * @li Re-entrant : No
745 * @li ISR Callable : No
747 * @return @li IX_PARITYENACC_SUCCESS - The request to reset the parity
748 * error statistics is successful.
749 * @li IX_PARITYENACC_NOT_INITIALISED - The operation requested
750 * prior to the initialisation of the access layer.
753 PUBLIC IxParityENAccStatus ixParityENAccStatsReset (void);
755 #endif /* IXPARITYENACC_H */
756 #endif /* __ixp46X */
759 * @} defgroup IxParityENAcc