2 * @file IxEthAccDataPlane_p.h
4 * @author Intel Corporation
7 * @brief Internal Header file for IXP425 Ethernet Access component.
13 * IXP400 SW Release version 2.0
15 * -- Copyright Notice --
18 * Copyright 2001-2005, Intel Corporation.
19 * All rights reserved.
22 * SPDX-License-Identifier: BSD-3-Clause
24 * -- End of Copyright Notice --
29 #ifndef IxEthAccDataPlane_p_H
30 #define IxEthAccDataPlane_p_H
36 * @addtogroup IxEthAccPri
40 /* typedefs global to this file*/
46 }IxEthAccDataPlaneQList;
50 * @struct IxEthAccDataPlaneStats
51 * @brief Statistics data structure associated with the data plane
58 UINT32 unchainedTxMBufs;
59 UINT32 chainedTxMBufs;
60 UINT32 unchainedTxDoneMBufs;
61 UINT32 chainedTxDoneMBufs;
62 UINT32 unchainedRxMBufs;
63 UINT32 chainedRxMBufs;
64 UINT32 unchainedRxFreeMBufs;
65 UINT32 chainedRxFreeMBufs;
66 UINT32 rxCallbackCounter;
67 UINT32 rxCallbackBurstRead;
68 UINT32 txDoneCallbackCounter;
69 UINT32 unexpectedError;
70 } IxEthAccDataPlaneStats;
73 * @fn ixEthAccMbufFromSwQ
74 * @brief used during disable steps to convert mbufs from
75 * swq format, ready to be pushed into hw queues for NPE,
76 * back into XScale format
78 IX_OSAL_MBUF *ixEthAccMbufFromSwQ(IX_OSAL_MBUF *mbuf);
81 * @fn ixEthAccDataPlaneShow
82 * @brief Show function (for data plane statistics
84 void ixEthAccDataPlaneShow(void);
87 * lock dataplane when atomic operation is required
89 #define IX_ETH_ACC_DATA_PLANE_LOCK(arg) arg = ixOsalIrqLock();
90 #define IX_ETH_ACC_DATA_PLANE_UNLOCK(arg) ixOsalIrqUnlock(arg);
95 #define IX_ETHACC_NE_SHARED(mBufPtr) \
96 ((IxEthAccNe *)&((mBufPtr)->ix_ne))
100 #define IX_ETHACC_NE_NEXT(mBufPtr) (mBufPtr)->ix_ne.reserved[0]
102 /* tm - wrong!! len and pkt_len are in the second word - #define IX_ETHACC_NE_LEN(mBufPtr) (mBufPtr)->ix_ne.reserved[3] */
103 #define IX_ETHACC_NE_LEN(mBufPtr) (mBufPtr)->ix_ne.reserved[1]
105 #define IX_ETHACC_NE_DATA(mBufPtr)(mBufPtr)->ix_ne.reserved[2]
109 #define IX_ETHACC_NE_NEXT(mBufPtr) \
110 IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_next
112 #define IX_ETHACC_NE_LEN(mBufPtr) \
113 IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_lengths
115 #define IX_ETHACC_NE_DATA(mBufPtr) \
116 IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_data
120 * Use MBUF next pointer field to chain data.
122 #define IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER(mbuf) (mbuf)->ix_ctrl.ix_chain
126 #define IX_ETH_ACC_DATAPLANE_IS_Q_EMPTY(mbuf_list) ((mbuf_list.pHead) == NULL)
129 #define IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_HEAD(mbuf_list,mbuf_to_add) \
132 IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
133 IX_ETH_ACC_STATS_INC(ixEthAccDataStats.addToSwQ); \
134 if ( (mbuf_list.pHead) != NULL ) \
136 (IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add))) = (mbuf_list.pHead);\
137 (mbuf_list.pHead) = (mbuf_to_add); \
140 (mbuf_list.pTail) = (mbuf_list.pHead) = (mbuf_to_add); \
141 IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
143 IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
147 #define IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_TAIL(mbuf_list,mbuf_to_add) \
150 IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
151 IX_ETH_ACC_STATS_INC(ixEthAccDataStats.addToSwQ); \
152 if ( (mbuf_list.pHead) == NULL ) \
154 (mbuf_list.pHead) = mbuf_to_add; \
155 IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
158 IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_list.pTail)) = (mbuf_to_add); \
159 IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \
161 (mbuf_list.pTail) = mbuf_to_add; \
162 IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
166 #define IX_ETH_ACC_DATAPLANE_REMOVE_MBUF_FROM_Q_HEAD(mbuf_list,mbuf_to_rem) \
169 IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \
170 if ( (mbuf_list.pHead) != NULL ) \
172 IX_ETH_ACC_STATS_INC(ixEthAccDataStats.removeFromSwQ); \
173 (mbuf_to_rem) = (mbuf_list.pHead) ; \
174 (mbuf_list.pHead) = (IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_rem)));\
177 (mbuf_to_rem) = NULL; \
179 IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \
184 * @brief message handler QManager entries for NPE id => port ID conversion (NPE_B => 0, NPE_C => 1)
186 #define IX_ETH_ACC_PORT_TO_NPE_ID(port) \
187 ixEthAccPortData[(port)].npeId
189 #define IX_ETH_ACC_NPE_TO_PORT_ID(npe) ((npe == 0 ? 2 : (npe == 1 ? 0 : ( npe == 2 ? 1 : -1 ))))
191 #define IX_ETH_ACC_PORT_TO_TX_Q_ID(port) \
192 ixEthAccPortData[(port)].ixEthAccTxData.txQueue
194 #define IX_ETH_ACC_PORT_TO_RX_FREE_Q_ID(port) \
195 ixEthAccPortData[(port)].ixEthAccRxData.rxFreeQueue
197 #define IX_ETH_ACC_PORT_TO_TX_Q_SOURCE(port) (port == IX_ETH_PORT_1 ? IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE : (port == IX_ETH_PORT_2 ? IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE : IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE))
199 #define IX_ETH_ACC_PORT_TO_RX_FREE_Q_SOURCE(port) (port == IX_ETH_PORT_1 ? IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE : (port == IX_ETH_PORT_2 ? IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE : IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE ))
201 /* Flush the mbufs chain and all data pointed to by the mbuf */
204 #define IX_ETH_ACC_STATS_INC(x) (x++)
206 #define IX_ETH_ACC_STATS_INC(x)
209 #define IX_ETH_ACC_MAX_TX_FRAMES_TO_SUBMIT 128
211 void ixEthRxFrameQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
212 void ixEthRxMultiBufferQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
213 void ixEthTxFrameDoneQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId);
215 #endif /* IxEthAccDataPlane_p_H */