4 * @date 15 October 2002
6 * @brief API of the IXP400 DMA Access Driver Component (IxDma)
10 * IXP400 SW Release version 2.0
12 * -- Copyright Notice --
15 * Copyright 2001-2005, Intel Corporation.
16 * All rights reserved.
19 * SPDX-License-Identifier: BSD-3-Clause
21 * -- End of Copyright Notice --
24 /*---------------------------------------------------------------------
25 Doxygen group definitions
26 ---------------------------------------------------------------------*/
34 * @defgroup IxDmaTypes IXP400 DMA Types (IxDmaTypes)
35 * @brief The common set of types used in the DMA component
41 * @enum IxDmaReturnStatus
42 * @brief Dma return status definitions
46 IX_DMA_SUCCESS = IX_SUCCESS, /**< DMA Transfer Success */
47 IX_DMA_FAIL = IX_FAIL, /**< DMA Transfer Fail */
48 IX_DMA_INVALID_TRANSFER_WIDTH, /**< Invalid transfer width */
49 IX_DMA_INVALID_TRANSFER_LENGTH, /**< Invalid transfer length */
50 IX_DMA_INVALID_TRANSFER_MODE, /**< Invalid transfer mode */
51 IX_DMA_INVALID_ADDRESS_MODE, /**< Invalid address mode */
52 IX_DMA_REQUEST_FIFO_FULL /**< DMA request queue is full */
57 * @enum IxDmaTransferMode
58 * @brief Dma transfer mode definitions
59 * @note Copy and byte swap, and copy and reverse modes only support multiples of word data length.
63 IX_DMA_COPY_CLEAR = 0, /**< copy and clear source*/
64 IX_DMA_COPY, /**< copy */
65 IX_DMA_COPY_BYTE_SWAP, /**< copy and byte swap (endian) */
66 IX_DMA_COPY_REVERSE, /**< copy and reverse */
67 IX_DMA_TRANSFER_MODE_INVALID /**< Invalid transfer mode */
72 * @enum IxDmaAddressingMode
73 * @brief Dma addressing mode definitions
74 * @note Fixed source address to fixed destination address addressing mode is not supported.
78 IX_DMA_INC_SRC_INC_DST = 0, /**< Incremental source address to incremental destination address */
79 IX_DMA_INC_SRC_FIX_DST, /**< Incremental source address to incremental destination address */
80 IX_DMA_FIX_SRC_INC_DST, /**< Incremental source address to incremental destination address */
81 IX_DMA_FIX_SRC_FIX_DST, /**< Incremental source address to incremental destination address */
82 IX_DMA_ADDRESSING_MODE_INVALID /**< Invalid Addressing Mode */
83 } IxDmaAddressingMode;
87 * @enum IxDmaTransferWidth
88 * @brief Dma transfer width definitions
89 * @Note Fixed addresses (either source or destination) do not support burst transfer width.
93 IX_DMA_32_SRC_32_DST = 0, /**< 32-bit src to 32-bit dst */
94 IX_DMA_32_SRC_16_DST, /**< 32-bit src to 16-bit dst */
95 IX_DMA_32_SRC_8_DST, /**< 32-bit src to 8-bit dst */
96 IX_DMA_16_SRC_32_DST, /**< 16-bit src to 32-bit dst */
97 IX_DMA_16_SRC_16_DST, /**< 16-bit src to 16-bit dst */
98 IX_DMA_16_SRC_8_DST, /**< 16-bit src to 8-bit dst */
99 IX_DMA_8_SRC_32_DST, /**< 8-bit src to 32-bit dst */
100 IX_DMA_8_SRC_16_DST, /**< 8-bit src to 16-bit dst */
101 IX_DMA_8_SRC_8_DST, /**< 8-bit src to 8-bit dst */
102 IX_DMA_8_SRC_BURST_DST, /**< 8-bit src to burst dst - Not supported for fixed destination address */
103 IX_DMA_16_SRC_BURST_DST, /**< 16-bit src to burst dst - Not supported for fixed destination address */
104 IX_DMA_32_SRC_BURST_DST, /**< 32-bit src to burst dst - Not supported for fixed destination address */
105 IX_DMA_BURST_SRC_8_DST, /**< burst src to 8-bit dst - Not supported for fixed source address */
106 IX_DMA_BURST_SRC_16_DST, /**< burst src to 16-bit dst - Not supported for fixed source address */
107 IX_DMA_BURST_SRC_32_DST, /**< burst src to 32-bit dst - Not supported for fixed source address*/
108 IX_DMA_BURST_SRC_BURST_DST, /**< burst src to burst dst - Not supported for fixed source and destination address
110 IX_DMA_TRANSFER_WIDTH_INVALID /**< Invalid transfer width */
111 } IxDmaTransferWidth;
114 * @ingroup IxDmaTypes
116 * @brief NpeId numbers to identify NPE A, B or C
120 IX_DMA_NPEID_NPEA = 0, /**< Identifies NPE A */
121 IX_DMA_NPEID_NPEB, /**< Identifies NPE B */
122 IX_DMA_NPEID_NPEC, /**< Identifies NPE C */
123 IX_DMA_NPEID_MAX /**< Total Number of NPEs */
127 * @defgroup IxDmaAcc IXP400 DMA Access Driver (IxDmaAcc) API
129 * @brief The public API for the IXP400 IxDmaAcc component
136 * @brief DMA Request Id type
138 typedef UINT32 IxDmaAccRequestId;
142 * @def IX_DMA_REQUEST_FULL
143 * @brief DMA request queue is full
144 * This constant is a return value used to tell the user that the IxDmaAcc
148 #define IX_DMA_REQUEST_FULL 16
152 * @brief DMA completion notification
153 * This function is called to notify a client that the DMA has been completed
154 * @param status @ref IxDmaReturnStatus [out] - reporting to client
157 typedef void (*IxDmaAccDmaCompleteCallback) (IxDmaReturnStatus status);
162 * @fn ixDmaAccInit(IxNpeDlNpeId npeId)
164 * @brief Initialise the DMA Access component
165 * This function will initialise the DMA Access component internals
166 * @param npeId @ref IxNpeDlNpeId [in] - NPE to use for Dma Transfer
167 * @return @li IX_SUCCESS succesfully initialised the component
168 * @return @li IX_FAIL Initialisation failed for some unspecified
172 ixDmaAccInit(IxNpeDlNpeId npeId);
177 * @fn ixDmaAccDmaTransfer(
178 IxDmaAccDmaCompleteCallback callback,
180 UINT32 DestinationAddr,
181 UINT16 TransferLength,
182 IxDmaTransferMode TransferMode,
183 IxDmaAddressingMode AddressingMode,
184 IxDmaTransferWidth TransferWidth)
186 * @brief Perform DMA transfer
187 * This function will perform DMA transfer between devices within the
189 * @note The following are restrictions for IxDmaAccDmaTransfer:
190 * @li The function is non re-entrant.
191 * @li The function assumes host devices are operating in big-endian mode.
192 * @li Fixed address does not suport burst transfer width
193 * @li Fixed source address to fixed destinatiom address mode is not suported
194 * @li The incrementing source address for expansion bus will not support a burst transfer width and copy and clear mode
196 * @param callback @ref IxDmaAccDmaCompleteCallback [in] - function pointer to be stored and called when the DMA transfer is completed. This cannot be NULL.
197 * @param SourceAddr UINT32 [in] - Starting address of DMA source. Must be a valid IXP400 memory map address.
198 * @param DestinationAddr UINT32 [in] - Starting address of DMA destination. Must be a valid IXP400 memory map address.
199 * @param TransferLength UINT16 [in] - The size of DMA data transfer. The range must be from 1-64Kbyte
200 * @param TransferMode @ref IxDmaTransferMode [in] - The DMA transfer mode
201 * @param AddressingMode @ref IxDmaAddressingMode [in] - The DMA addressing mode
202 * @param TransferWidth @ref IxDmaTransferWidth [in] - The DMA transfer width
204 * @return @li IX_DMA_SUCCESS Notification that the DMA request is succesful
205 * @return @li IX_DMA_FAIL IxDmaAcc not yet initialised or some internal error has occured
206 * @return @li IX_DMA_INVALID_TRANSFER_WIDTH Transfer width is nit valid
207 * @return @li IX_DMA_INVALID_TRANSFER_LENGTH Transfer length outside of valid range
208 * @return @li IX_DMA_INVALID_TRANSFER_MODE Transfer Mode not valid
209 * @return @li IX_DMA_REQUEST_FIFO_FULL IxDmaAcc request queue is full
211 PUBLIC IxDmaReturnStatus
213 IxDmaAccDmaCompleteCallback callback,
215 UINT32 DestinationAddr,
216 UINT16 TransferLength,
217 IxDmaTransferMode TransferMode,
218 IxDmaAddressingMode AddressingMode,
219 IxDmaTransferWidth TransferWidth);
223 * @fn ixDmaAccShow(void)
225 * @brief Display some component information for debug purposes
226 * Show some internal operation information relating to the DMA service.
227 * At a minimum the following will show.
228 * - the number of the DMA pend (in queue)
235 #endif /* IXDMAACC_H */