2 * Copyright (C) 2005-2006 Atmel Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * The u-boot networking stack is a little weird. It seems like the
22 * networking core allocates receive buffers up front without any
23 * regard to the hardware that's supposed to actually receive those
26 * The MACB receives packets into 128-byte receive buffers, so the
27 * buffers allocated by the core isn't very practical to use. We'll
28 * allocate our own, but we need one such buffer in case a packet
29 * wraps around the DMA ring so that we have to copy it.
31 * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific
32 * configuration header. This way, the core allocates one RX buffer
33 * and one TX buffer, each of which can hold a ethernet packet of
36 * For some reason, the networking core unconditionally specifies a
37 * 32-byte packet "alignment" (which really should be called
38 * "padding"). MACB shouldn't need that, but we'll refrain from any
39 * core modifications here...
46 #include <linux/mii.h>
48 #include <asm/dma-mapping.h>
49 #include <asm/arch/clk.h>
53 #define barrier() asm volatile("" ::: "memory")
55 #define CONFIG_SYS_MACB_RX_BUFFER_SIZE 4096
56 #define CONFIG_SYS_MACB_RX_RING_SIZE (CONFIG_SYS_MACB_RX_BUFFER_SIZE / 128)
57 #define CONFIG_SYS_MACB_TX_RING_SIZE 16
58 #define CONFIG_SYS_MACB_TX_TIMEOUT 1000
59 #define CONFIG_SYS_MACB_AUTONEG_TIMEOUT 5000000
61 struct macb_dma_desc {
66 #define RXADDR_USED 0x00000001
67 #define RXADDR_WRAP 0x00000002
69 #define RXBUF_FRMLEN_MASK 0x00000fff
70 #define RXBUF_FRAME_START 0x00004000
71 #define RXBUF_FRAME_END 0x00008000
72 #define RXBUF_TYPEID_MATCH 0x00400000
73 #define RXBUF_ADDR4_MATCH 0x00800000
74 #define RXBUF_ADDR3_MATCH 0x01000000
75 #define RXBUF_ADDR2_MATCH 0x02000000
76 #define RXBUF_ADDR1_MATCH 0x04000000
77 #define RXBUF_BROADCAST 0x80000000
79 #define TXBUF_FRMLEN_MASK 0x000007ff
80 #define TXBUF_FRAME_END 0x00008000
81 #define TXBUF_NOCRC 0x00010000
82 #define TXBUF_EXHAUSTED 0x08000000
83 #define TXBUF_UNDERRUN 0x10000000
84 #define TXBUF_MAXRETRY 0x20000000
85 #define TXBUF_WRAP 0x40000000
86 #define TXBUF_USED 0x80000000
97 struct macb_dma_desc *rx_ring;
98 struct macb_dma_desc *tx_ring;
100 unsigned long rx_buffer_dma;
101 unsigned long rx_ring_dma;
102 unsigned long tx_ring_dma;
104 const struct device *dev;
105 struct eth_device netdev;
106 unsigned short phy_addr;
108 #define to_macb(_nd) container_of(_nd, struct macb_device, netdev)
110 static void macb_mdio_write(struct macb_device *macb, u8 reg, u16 value)
112 unsigned long netctl;
113 unsigned long netstat;
116 netctl = macb_readl(macb, NCR);
117 netctl |= MACB_BIT(MPE);
118 macb_writel(macb, NCR, netctl);
120 frame = (MACB_BF(SOF, 1)
122 | MACB_BF(PHYA, macb->phy_addr)
125 | MACB_BF(DATA, value));
126 macb_writel(macb, MAN, frame);
129 netstat = macb_readl(macb, NSR);
130 } while (!(netstat & MACB_BIT(IDLE)));
132 netctl = macb_readl(macb, NCR);
133 netctl &= ~MACB_BIT(MPE);
134 macb_writel(macb, NCR, netctl);
137 static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
139 unsigned long netctl;
140 unsigned long netstat;
143 netctl = macb_readl(macb, NCR);
144 netctl |= MACB_BIT(MPE);
145 macb_writel(macb, NCR, netctl);
147 frame = (MACB_BF(SOF, 1)
149 | MACB_BF(PHYA, macb->phy_addr)
152 macb_writel(macb, MAN, frame);
155 netstat = macb_readl(macb, NSR);
156 } while (!(netstat & MACB_BIT(IDLE)));
158 frame = macb_readl(macb, MAN);
160 netctl = macb_readl(macb, NCR);
161 netctl &= ~MACB_BIT(MPE);
162 macb_writel(macb, NCR, netctl);
164 return MACB_BFEXT(DATA, frame);
167 #if defined(CONFIG_CMD_NET)
169 static int macb_send(struct eth_device *netdev, volatile void *packet,
172 struct macb_device *macb = to_macb(netdev);
173 unsigned long paddr, ctrl;
174 unsigned int tx_head = macb->tx_head;
177 paddr = dma_map_single(packet, length, DMA_TO_DEVICE);
179 ctrl = length & TXBUF_FRMLEN_MASK;
180 ctrl |= TXBUF_FRAME_END;
181 if (tx_head == (CONFIG_SYS_MACB_TX_RING_SIZE - 1)) {
187 macb->tx_ring[tx_head].ctrl = ctrl;
188 macb->tx_ring[tx_head].addr = paddr;
190 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
193 * I guess this is necessary because the networking core may
194 * re-use the transmit buffer as soon as we return...
196 for (i = 0; i <= CONFIG_SYS_MACB_TX_TIMEOUT; i++) {
198 ctrl = macb->tx_ring[tx_head].ctrl;
199 if (ctrl & TXBUF_USED)
204 dma_unmap_single(packet, length, paddr);
206 if (i <= CONFIG_SYS_MACB_TX_TIMEOUT) {
207 if (ctrl & TXBUF_UNDERRUN)
208 printf("%s: TX underrun\n", netdev->name);
209 if (ctrl & TXBUF_EXHAUSTED)
210 printf("%s: TX buffers exhausted in mid frame\n",
213 printf("%s: TX timeout\n", netdev->name);
216 /* No one cares anyway */
220 static void reclaim_rx_buffers(struct macb_device *macb,
221 unsigned int new_tail)
226 while (i > new_tail) {
227 macb->rx_ring[i].addr &= ~RXADDR_USED;
229 if (i > CONFIG_SYS_MACB_RX_RING_SIZE)
233 while (i < new_tail) {
234 macb->rx_ring[i].addr &= ~RXADDR_USED;
239 macb->rx_tail = new_tail;
242 static int macb_recv(struct eth_device *netdev)
244 struct macb_device *macb = to_macb(netdev);
245 unsigned int rx_tail = macb->rx_tail;
252 if (!(macb->rx_ring[rx_tail].addr & RXADDR_USED))
255 status = macb->rx_ring[rx_tail].ctrl;
256 if (status & RXBUF_FRAME_START) {
257 if (rx_tail != macb->rx_tail)
258 reclaim_rx_buffers(macb, rx_tail);
262 if (status & RXBUF_FRAME_END) {
263 buffer = macb->rx_buffer + 128 * macb->rx_tail;
264 length = status & RXBUF_FRMLEN_MASK;
266 unsigned int headlen, taillen;
268 headlen = 128 * (CONFIG_SYS_MACB_RX_RING_SIZE
270 taillen = length - headlen;
271 memcpy((void *)NetRxPackets[0],
273 memcpy((void *)NetRxPackets[0] + headlen,
274 macb->rx_buffer, taillen);
275 buffer = (void *)NetRxPackets[0];
278 NetReceive(buffer, length);
279 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE)
281 reclaim_rx_buffers(macb, rx_tail);
283 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE) {
294 static void macb_phy_reset(struct macb_device *macb)
296 struct eth_device *netdev = &macb->netdev;
300 adv = ADVERTISE_CSMA | ADVERTISE_ALL;
301 macb_mdio_write(macb, MII_ADVERTISE, adv);
302 printf("%s: Starting autonegotiation...\n", netdev->name);
303 macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
306 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
307 status = macb_mdio_read(macb, MII_BMSR);
308 if (status & BMSR_ANEGCOMPLETE)
313 if (status & BMSR_ANEGCOMPLETE)
314 printf("%s: Autonegotiation complete\n", netdev->name);
316 printf("%s: Autonegotiation timed out (status=0x%04x)\n",
317 netdev->name, status);
320 #ifdef CONFIG_MACB_SEARCH_PHY
321 static int macb_phy_find(struct macb_device *macb)
326 /* Search for PHY... */
327 for (i = 0; i < 32; i++) {
329 phy_id = macb_mdio_read(macb, MII_PHYSID1);
330 if (phy_id != 0xffff) {
331 printf("%s: PHY present at %d\n", macb->netdev.name, i);
336 /* PHY isn't up to snuff */
337 printf("%s: PHY not found", macb->netdev.name);
341 #endif /* CONFIG_MACB_SEARCH_PHY */
344 static int macb_phy_init(struct macb_device *macb)
346 struct eth_device *netdev = &macb->netdev;
348 u16 phy_id, status, adv, lpa;
349 int media, speed, duplex;
352 #ifdef CONFIG_MACB_SEARCH_PHY
353 /* Auto-detect phy_addr */
354 if (!macb_phy_find(macb)) {
357 #endif /* CONFIG_MACB_SEARCH_PHY */
359 /* Check if the PHY is up to snuff... */
360 phy_id = macb_mdio_read(macb, MII_PHYSID1);
361 if (phy_id == 0xffff) {
362 printf("%s: No PHY present\n", netdev->name);
366 status = macb_mdio_read(macb, MII_BMSR);
367 if (!(status & BMSR_LSTATUS)) {
368 /* Try to re-negotiate if we don't have link already. */
369 macb_phy_reset(macb);
371 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
372 status = macb_mdio_read(macb, MII_BMSR);
373 if (status & BMSR_LSTATUS)
379 if (!(status & BMSR_LSTATUS)) {
380 printf("%s: link down (status: 0x%04x)\n",
381 netdev->name, status);
384 adv = macb_mdio_read(macb, MII_ADVERTISE);
385 lpa = macb_mdio_read(macb, MII_LPA);
386 media = mii_nway_result(lpa & adv);
387 speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
389 duplex = (media & ADVERTISE_FULL) ? 1 : 0;
390 printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
392 speed ? "100" : "10",
393 duplex ? "full" : "half",
396 ncfgr = macb_readl(macb, NCFGR);
397 ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
399 ncfgr |= MACB_BIT(SPD);
401 ncfgr |= MACB_BIT(FD);
402 macb_writel(macb, NCFGR, ncfgr);
407 static int macb_init(struct eth_device *netdev, bd_t *bd)
409 struct macb_device *macb = to_macb(netdev);
416 * macb_halt should have been called at some point before now,
417 * so we'll assume the controller is idle.
420 /* initialize DMA descriptors */
421 paddr = macb->rx_buffer_dma;
422 for (i = 0; i < CONFIG_SYS_MACB_RX_RING_SIZE; i++) {
423 if (i == (CONFIG_SYS_MACB_RX_RING_SIZE - 1))
424 paddr |= RXADDR_WRAP;
425 macb->rx_ring[i].addr = paddr;
426 macb->rx_ring[i].ctrl = 0;
429 for (i = 0; i < CONFIG_SYS_MACB_TX_RING_SIZE; i++) {
430 macb->tx_ring[i].addr = 0;
431 if (i == (CONFIG_SYS_MACB_TX_RING_SIZE - 1))
432 macb->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP;
434 macb->tx_ring[i].ctrl = TXBUF_USED;
436 macb->rx_tail = macb->tx_head = macb->tx_tail = 0;
438 macb_writel(macb, RBQP, macb->rx_ring_dma);
439 macb_writel(macb, TBQP, macb->tx_ring_dma);
441 /* set hardware address */
442 hwaddr_bottom = cpu_to_le32(*((u32 *)netdev->enetaddr));
443 macb_writel(macb, SA1B, hwaddr_bottom);
444 hwaddr_top = cpu_to_le16(*((u16 *)(netdev->enetaddr + 4)));
445 macb_writel(macb, SA1T, hwaddr_top);
447 /* choose RMII or MII mode. This depends on the board */
449 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
450 defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
451 defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
452 macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
454 macb_writel(macb, USRIO, 0);
457 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
458 defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
459 defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
460 macb_writel(macb, USRIO, MACB_BIT(CLKEN));
462 macb_writel(macb, USRIO, MACB_BIT(MII));
464 #endif /* CONFIG_RMII */
466 if (!macb_phy_init(macb))
469 /* Enable TX and RX */
470 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE));
475 static void macb_halt(struct eth_device *netdev)
477 struct macb_device *macb = to_macb(netdev);
480 /* Halt the controller and wait for any ongoing transmission to end. */
481 ncr = macb_readl(macb, NCR);
482 ncr |= MACB_BIT(THALT);
483 macb_writel(macb, NCR, ncr);
486 tsr = macb_readl(macb, TSR);
487 } while (tsr & MACB_BIT(TGO));
489 /* Disable TX and RX, and clear statistics */
490 macb_writel(macb, NCR, MACB_BIT(CLRSTAT));
493 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
495 struct macb_device *macb;
496 struct eth_device *netdev;
497 unsigned long macb_hz;
500 macb = malloc(sizeof(struct macb_device));
502 printf("Error: Failed to allocate memory for MACB%d\n", id);
505 memset(macb, 0, sizeof(struct macb_device));
507 netdev = &macb->netdev;
509 macb->rx_buffer = dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE,
510 &macb->rx_buffer_dma);
511 macb->rx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE
512 * sizeof(struct macb_dma_desc),
514 macb->tx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE
515 * sizeof(struct macb_dma_desc),
519 macb->phy_addr = phy_addr;
521 sprintf(netdev->name, "macb%d", id);
522 netdev->init = macb_init;
523 netdev->halt = macb_halt;
524 netdev->send = macb_send;
525 netdev->recv = macb_recv;
528 * Do some basic initialization so that we at least can talk
531 macb_hz = get_macb_pclk_rate(id);
532 if (macb_hz < 20000000)
533 ncfgr = MACB_BF(CLK, MACB_CLK_DIV8);
534 else if (macb_hz < 40000000)
535 ncfgr = MACB_BF(CLK, MACB_CLK_DIV16);
536 else if (macb_hz < 80000000)
537 ncfgr = MACB_BF(CLK, MACB_CLK_DIV32);
539 ncfgr = MACB_BF(CLK, MACB_CLK_DIV64);
541 macb_writel(macb, NCFGR, ncfgr);
543 eth_register(netdev);
550 #if defined(CONFIG_CMD_MII)
552 int miiphy_read(unsigned char addr, unsigned char reg, unsigned short *value)
554 unsigned long netctl;
555 unsigned long netstat;
559 iflag = disable_interrupts();
560 netctl = macb_readl(&macb, EMACB_NCR);
561 netctl |= MACB_BIT(MPE);
562 macb_writel(&macb, EMACB_NCR, netctl);
566 frame = (MACB_BF(SOF, 1)
568 | MACB_BF(PHYA, addr)
571 macb_writel(&macb, EMACB_MAN, frame);
574 netstat = macb_readl(&macb, EMACB_NSR);
575 } while (!(netstat & MACB_BIT(IDLE)));
577 frame = macb_readl(&macb, EMACB_MAN);
578 *value = MACB_BFEXT(DATA, frame);
580 iflag = disable_interrupts();
581 netctl = macb_readl(&macb, EMACB_NCR);
582 netctl &= ~MACB_BIT(MPE);
583 macb_writel(&macb, EMACB_NCR, netctl);
590 int miiphy_write(unsigned char addr, unsigned char reg, unsigned short value)
592 unsigned long netctl;
593 unsigned long netstat;
597 iflag = disable_interrupts();
598 netctl = macb_readl(&macb, EMACB_NCR);
599 netctl |= MACB_BIT(MPE);
600 macb_writel(&macb, EMACB_NCR, netctl);
604 frame = (MACB_BF(SOF, 1)
606 | MACB_BF(PHYA, addr)
609 | MACB_BF(DATA, value));
610 macb_writel(&macb, EMACB_MAN, frame);
613 netstat = macb_readl(&macb, EMACB_NSR);
614 } while (!(netstat & MACB_BIT(IDLE)));
616 iflag = disable_interrupts();
617 netctl = macb_readl(&macb, EMACB_NCR);
618 netctl &= ~MACB_BIT(MPE);
619 macb_writel(&macb, EMACB_NCR, netctl);