2 * Copyright (C) 2005-2006 Atmel Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * The u-boot networking stack is a little weird. It seems like the
22 * networking core allocates receive buffers up front without any
23 * regard to the hardware that's supposed to actually receive those
26 * The MACB receives packets into 128-byte receive buffers, so the
27 * buffers allocated by the core isn't very practical to use. We'll
28 * allocate our own, but we need one such buffer in case a packet
29 * wraps around the DMA ring so that we have to copy it.
31 * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific
32 * configuration header. This way, the core allocates one RX buffer
33 * and one TX buffer, each of which can hold a ethernet packet of
36 * For some reason, the networking core unconditionally specifies a
37 * 32-byte packet "alignment" (which really should be called
38 * "padding"). MACB shouldn't need that, but we'll refrain from any
39 * core modifications here...
47 #include <linux/mii.h>
49 #include <asm/dma-mapping.h>
50 #include <asm/arch/clk.h>
54 #define barrier() asm volatile("" ::: "memory")
56 #define CONFIG_SYS_MACB_RX_BUFFER_SIZE 4096
57 #define CONFIG_SYS_MACB_RX_RING_SIZE (CONFIG_SYS_MACB_RX_BUFFER_SIZE / 128)
58 #define CONFIG_SYS_MACB_TX_RING_SIZE 16
59 #define CONFIG_SYS_MACB_TX_TIMEOUT 1000
60 #define CONFIG_SYS_MACB_AUTONEG_TIMEOUT 5000000
62 struct macb_dma_desc {
67 #define RXADDR_USED 0x00000001
68 #define RXADDR_WRAP 0x00000002
70 #define RXBUF_FRMLEN_MASK 0x00000fff
71 #define RXBUF_FRAME_START 0x00004000
72 #define RXBUF_FRAME_END 0x00008000
73 #define RXBUF_TYPEID_MATCH 0x00400000
74 #define RXBUF_ADDR4_MATCH 0x00800000
75 #define RXBUF_ADDR3_MATCH 0x01000000
76 #define RXBUF_ADDR2_MATCH 0x02000000
77 #define RXBUF_ADDR1_MATCH 0x04000000
78 #define RXBUF_BROADCAST 0x80000000
80 #define TXBUF_FRMLEN_MASK 0x000007ff
81 #define TXBUF_FRAME_END 0x00008000
82 #define TXBUF_NOCRC 0x00010000
83 #define TXBUF_EXHAUSTED 0x08000000
84 #define TXBUF_UNDERRUN 0x10000000
85 #define TXBUF_MAXRETRY 0x20000000
86 #define TXBUF_WRAP 0x40000000
87 #define TXBUF_USED 0x80000000
98 struct macb_dma_desc *rx_ring;
99 struct macb_dma_desc *tx_ring;
101 unsigned long rx_buffer_dma;
102 unsigned long rx_ring_dma;
103 unsigned long tx_ring_dma;
105 const struct device *dev;
106 struct eth_device netdev;
107 unsigned short phy_addr;
109 #define to_macb(_nd) container_of(_nd, struct macb_device, netdev)
111 static void macb_mdio_write(struct macb_device *macb, u8 reg, u16 value)
113 unsigned long netctl;
114 unsigned long netstat;
117 netctl = macb_readl(macb, NCR);
118 netctl |= MACB_BIT(MPE);
119 macb_writel(macb, NCR, netctl);
121 frame = (MACB_BF(SOF, 1)
123 | MACB_BF(PHYA, macb->phy_addr)
126 | MACB_BF(DATA, value));
127 macb_writel(macb, MAN, frame);
130 netstat = macb_readl(macb, NSR);
131 } while (!(netstat & MACB_BIT(IDLE)));
133 netctl = macb_readl(macb, NCR);
134 netctl &= ~MACB_BIT(MPE);
135 macb_writel(macb, NCR, netctl);
138 static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
140 unsigned long netctl;
141 unsigned long netstat;
144 netctl = macb_readl(macb, NCR);
145 netctl |= MACB_BIT(MPE);
146 macb_writel(macb, NCR, netctl);
148 frame = (MACB_BF(SOF, 1)
150 | MACB_BF(PHYA, macb->phy_addr)
153 macb_writel(macb, MAN, frame);
156 netstat = macb_readl(macb, NSR);
157 } while (!(netstat & MACB_BIT(IDLE)));
159 frame = macb_readl(macb, MAN);
161 netctl = macb_readl(macb, NCR);
162 netctl &= ~MACB_BIT(MPE);
163 macb_writel(macb, NCR, netctl);
165 return MACB_BFEXT(DATA, frame);
168 #if defined(CONFIG_CMD_MII)
170 int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
172 struct eth_device *dev = eth_get_dev_by_name(devname);
173 struct macb_device *macb = to_macb(dev);
175 if ( macb->phy_addr != phy_adr )
178 *value = macb_mdio_read(macb, reg);
183 int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
185 struct eth_device *dev = eth_get_dev_by_name(devname);
186 struct macb_device *macb = to_macb(dev);
188 if ( macb->phy_addr != phy_adr )
191 macb_mdio_write(macb, reg, value);
198 #if defined(CONFIG_CMD_NET)
200 static int macb_send(struct eth_device *netdev, volatile void *packet,
203 struct macb_device *macb = to_macb(netdev);
204 unsigned long paddr, ctrl;
205 unsigned int tx_head = macb->tx_head;
208 paddr = dma_map_single(packet, length, DMA_TO_DEVICE);
210 ctrl = length & TXBUF_FRMLEN_MASK;
211 ctrl |= TXBUF_FRAME_END;
212 if (tx_head == (CONFIG_SYS_MACB_TX_RING_SIZE - 1)) {
218 macb->tx_ring[tx_head].ctrl = ctrl;
219 macb->tx_ring[tx_head].addr = paddr;
221 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
224 * I guess this is necessary because the networking core may
225 * re-use the transmit buffer as soon as we return...
227 for (i = 0; i <= CONFIG_SYS_MACB_TX_TIMEOUT; i++) {
229 ctrl = macb->tx_ring[tx_head].ctrl;
230 if (ctrl & TXBUF_USED)
235 dma_unmap_single(packet, length, paddr);
237 if (i <= CONFIG_SYS_MACB_TX_TIMEOUT) {
238 if (ctrl & TXBUF_UNDERRUN)
239 printf("%s: TX underrun\n", netdev->name);
240 if (ctrl & TXBUF_EXHAUSTED)
241 printf("%s: TX buffers exhausted in mid frame\n",
244 printf("%s: TX timeout\n", netdev->name);
247 /* No one cares anyway */
251 static void reclaim_rx_buffers(struct macb_device *macb,
252 unsigned int new_tail)
257 while (i > new_tail) {
258 macb->rx_ring[i].addr &= ~RXADDR_USED;
260 if (i > CONFIG_SYS_MACB_RX_RING_SIZE)
264 while (i < new_tail) {
265 macb->rx_ring[i].addr &= ~RXADDR_USED;
270 macb->rx_tail = new_tail;
273 static int macb_recv(struct eth_device *netdev)
275 struct macb_device *macb = to_macb(netdev);
276 unsigned int rx_tail = macb->rx_tail;
283 if (!(macb->rx_ring[rx_tail].addr & RXADDR_USED))
286 status = macb->rx_ring[rx_tail].ctrl;
287 if (status & RXBUF_FRAME_START) {
288 if (rx_tail != macb->rx_tail)
289 reclaim_rx_buffers(macb, rx_tail);
293 if (status & RXBUF_FRAME_END) {
294 buffer = macb->rx_buffer + 128 * macb->rx_tail;
295 length = status & RXBUF_FRMLEN_MASK;
297 unsigned int headlen, taillen;
299 headlen = 128 * (CONFIG_SYS_MACB_RX_RING_SIZE
301 taillen = length - headlen;
302 memcpy((void *)NetRxPackets[0],
304 memcpy((void *)NetRxPackets[0] + headlen,
305 macb->rx_buffer, taillen);
306 buffer = (void *)NetRxPackets[0];
309 NetReceive(buffer, length);
310 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE)
312 reclaim_rx_buffers(macb, rx_tail);
314 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE) {
325 static void macb_phy_reset(struct macb_device *macb)
327 struct eth_device *netdev = &macb->netdev;
331 adv = ADVERTISE_CSMA | ADVERTISE_ALL;
332 macb_mdio_write(macb, MII_ADVERTISE, adv);
333 printf("%s: Starting autonegotiation...\n", netdev->name);
334 macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
337 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
338 status = macb_mdio_read(macb, MII_BMSR);
339 if (status & BMSR_ANEGCOMPLETE)
344 if (status & BMSR_ANEGCOMPLETE)
345 printf("%s: Autonegotiation complete\n", netdev->name);
347 printf("%s: Autonegotiation timed out (status=0x%04x)\n",
348 netdev->name, status);
351 #ifdef CONFIG_MACB_SEARCH_PHY
352 static int macb_phy_find(struct macb_device *macb)
357 /* Search for PHY... */
358 for (i = 0; i < 32; i++) {
360 phy_id = macb_mdio_read(macb, MII_PHYSID1);
361 if (phy_id != 0xffff) {
362 printf("%s: PHY present at %d\n", macb->netdev.name, i);
367 /* PHY isn't up to snuff */
368 printf("%s: PHY not found", macb->netdev.name);
372 #endif /* CONFIG_MACB_SEARCH_PHY */
375 static int macb_phy_init(struct macb_device *macb)
377 struct eth_device *netdev = &macb->netdev;
379 u16 phy_id, status, adv, lpa;
380 int media, speed, duplex;
383 #ifdef CONFIG_MACB_SEARCH_PHY
384 /* Auto-detect phy_addr */
385 if (!macb_phy_find(macb)) {
388 #endif /* CONFIG_MACB_SEARCH_PHY */
390 /* Check if the PHY is up to snuff... */
391 phy_id = macb_mdio_read(macb, MII_PHYSID1);
392 if (phy_id == 0xffff) {
393 printf("%s: No PHY present\n", netdev->name);
397 status = macb_mdio_read(macb, MII_BMSR);
398 if (!(status & BMSR_LSTATUS)) {
399 /* Try to re-negotiate if we don't have link already. */
400 macb_phy_reset(macb);
402 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
403 status = macb_mdio_read(macb, MII_BMSR);
404 if (status & BMSR_LSTATUS)
410 if (!(status & BMSR_LSTATUS)) {
411 printf("%s: link down (status: 0x%04x)\n",
412 netdev->name, status);
415 adv = macb_mdio_read(macb, MII_ADVERTISE);
416 lpa = macb_mdio_read(macb, MII_LPA);
417 media = mii_nway_result(lpa & adv);
418 speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
420 duplex = (media & ADVERTISE_FULL) ? 1 : 0;
421 printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
423 speed ? "100" : "10",
424 duplex ? "full" : "half",
427 ncfgr = macb_readl(macb, NCFGR);
428 ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
430 ncfgr |= MACB_BIT(SPD);
432 ncfgr |= MACB_BIT(FD);
433 macb_writel(macb, NCFGR, ncfgr);
438 static int macb_init(struct eth_device *netdev, bd_t *bd)
440 struct macb_device *macb = to_macb(netdev);
445 * macb_halt should have been called at some point before now,
446 * so we'll assume the controller is idle.
449 /* initialize DMA descriptors */
450 paddr = macb->rx_buffer_dma;
451 for (i = 0; i < CONFIG_SYS_MACB_RX_RING_SIZE; i++) {
452 if (i == (CONFIG_SYS_MACB_RX_RING_SIZE - 1))
453 paddr |= RXADDR_WRAP;
454 macb->rx_ring[i].addr = paddr;
455 macb->rx_ring[i].ctrl = 0;
458 for (i = 0; i < CONFIG_SYS_MACB_TX_RING_SIZE; i++) {
459 macb->tx_ring[i].addr = 0;
460 if (i == (CONFIG_SYS_MACB_TX_RING_SIZE - 1))
461 macb->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP;
463 macb->tx_ring[i].ctrl = TXBUF_USED;
465 macb->rx_tail = macb->tx_head = macb->tx_tail = 0;
467 macb_writel(macb, RBQP, macb->rx_ring_dma);
468 macb_writel(macb, TBQP, macb->tx_ring_dma);
470 /* choose RMII or MII mode. This depends on the board */
472 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
473 defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
474 defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
475 defined(CONFIG_AT91SAM9XE)
476 macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
478 macb_writel(macb, USRIO, 0);
481 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
482 defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
483 defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
484 defined(CONFIG_AT91SAM9XE)
485 macb_writel(macb, USRIO, MACB_BIT(CLKEN));
487 macb_writel(macb, USRIO, MACB_BIT(MII));
489 #endif /* CONFIG_RMII */
491 if (!macb_phy_init(macb))
494 /* Enable TX and RX */
495 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE));
500 static void macb_halt(struct eth_device *netdev)
502 struct macb_device *macb = to_macb(netdev);
505 /* Halt the controller and wait for any ongoing transmission to end. */
506 ncr = macb_readl(macb, NCR);
507 ncr |= MACB_BIT(THALT);
508 macb_writel(macb, NCR, ncr);
511 tsr = macb_readl(macb, TSR);
512 } while (tsr & MACB_BIT(TGO));
514 /* Disable TX and RX, and clear statistics */
515 macb_writel(macb, NCR, MACB_BIT(CLRSTAT));
518 static int macb_write_hwaddr(struct eth_device *dev)
520 struct macb_device *macb = to_macb(dev);
524 /* set hardware address */
525 hwaddr_bottom = dev->enetaddr[0] | dev->enetaddr[1] << 8 |
526 dev->enetaddr[2] << 16 | dev->enetaddr[3] << 24;
527 macb_writel(macb, SA1B, hwaddr_bottom);
528 hwaddr_top = dev->enetaddr[4] | dev->enetaddr[5] << 8;
529 macb_writel(macb, SA1T, hwaddr_top);
533 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
535 struct macb_device *macb;
536 struct eth_device *netdev;
537 unsigned long macb_hz;
540 macb = malloc(sizeof(struct macb_device));
542 printf("Error: Failed to allocate memory for MACB%d\n", id);
545 memset(macb, 0, sizeof(struct macb_device));
547 netdev = &macb->netdev;
549 macb->rx_buffer = dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE,
550 &macb->rx_buffer_dma);
551 macb->rx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE
552 * sizeof(struct macb_dma_desc),
554 macb->tx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE
555 * sizeof(struct macb_dma_desc),
559 macb->phy_addr = phy_addr;
561 sprintf(netdev->name, "macb%d", id);
562 netdev->init = macb_init;
563 netdev->halt = macb_halt;
564 netdev->send = macb_send;
565 netdev->recv = macb_recv;
566 netdev->write_hwaddr = macb_write_hwaddr;
569 * Do some basic initialization so that we at least can talk
572 macb_hz = get_macb_pclk_rate(id);
573 if (macb_hz < 20000000)
574 ncfgr = MACB_BF(CLK, MACB_CLK_DIV8);
575 else if (macb_hz < 40000000)
576 ncfgr = MACB_BF(CLK, MACB_CLK_DIV16);
577 else if (macb_hz < 80000000)
578 ncfgr = MACB_BF(CLK, MACB_CLK_DIV32);
580 ncfgr = MACB_BF(CLK, MACB_CLK_DIV64);
582 macb_writel(macb, NCFGR, ncfgr);
584 eth_register(netdev);
586 #if defined(CONFIG_CMD_MII)
587 miiphy_register(netdev->name, macb_miiphy_read, macb_miiphy_write);