1 /*******************************************************************************
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33 /* Local prototypes */
34 static u16 ixgb_shift_in_bits(struct ixgb_hw *hw);
36 static void ixgb_shift_out_bits(struct ixgb_hw *hw,
39 static void ixgb_standby_eeprom(struct ixgb_hw *hw);
41 static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw);
43 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
45 /******************************************************************************
46 * Raises the EEPROM's clock input.
48 * hw - Struct containing variables accessed by shared code
49 * eecd_reg - EECD's current value
50 *****************************************************************************/
52 ixgb_raise_clock(struct ixgb_hw *hw,
55 /* Raise the clock input to the EEPROM (by setting the SK bit), and then
56 * wait 50 microseconds.
58 *eecd_reg = *eecd_reg | IXGB_EECD_SK;
59 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
64 /******************************************************************************
65 * Lowers the EEPROM's clock input.
67 * hw - Struct containing variables accessed by shared code
68 * eecd_reg - EECD's current value
69 *****************************************************************************/
71 ixgb_lower_clock(struct ixgb_hw *hw,
74 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
75 * wait 50 microseconds.
77 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
78 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
83 /******************************************************************************
84 * Shift data bits out to the EEPROM.
86 * hw - Struct containing variables accessed by shared code
87 * data - data to send to the EEPROM
88 * count - number of bits to shift out
89 *****************************************************************************/
91 ixgb_shift_out_bits(struct ixgb_hw *hw,
98 /* We need to shift "count" bits out to the EEPROM. So, value in the
99 * "data" parameter will be shifted out to the EEPROM one bit at a time.
100 * In order to do this, "data" must be broken down into bits.
102 mask = 0x01 << (count - 1);
103 eecd_reg = IXGB_READ_REG(hw, EECD);
104 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
106 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
107 * and then raising and then lowering the clock (the SK bit controls
108 * the clock input to the EEPROM). A "0" is shifted out to the EEPROM
109 * by setting "DI" to "0" and then raising and then lowering the clock.
111 eecd_reg &= ~IXGB_EECD_DI;
114 eecd_reg |= IXGB_EECD_DI;
116 IXGB_WRITE_REG(hw, EECD, eecd_reg);
120 ixgb_raise_clock(hw, &eecd_reg);
121 ixgb_lower_clock(hw, &eecd_reg);
127 /* We leave the "DI" bit set to "0" when we leave this routine. */
128 eecd_reg &= ~IXGB_EECD_DI;
129 IXGB_WRITE_REG(hw, EECD, eecd_reg);
133 /******************************************************************************
134 * Shift data bits in from the EEPROM
136 * hw - Struct containing variables accessed by shared code
137 *****************************************************************************/
139 ixgb_shift_in_bits(struct ixgb_hw *hw)
145 /* In order to read a register from the EEPROM, we need to shift 16 bits
146 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
147 * the EEPROM (setting the SK bit), and then reading the value of the "DO"
148 * bit. During this "shifting in" process the "DI" bit should always be
152 eecd_reg = IXGB_READ_REG(hw, EECD);
154 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
157 for (i = 0; i < 16; i++) {
159 ixgb_raise_clock(hw, &eecd_reg);
161 eecd_reg = IXGB_READ_REG(hw, EECD);
163 eecd_reg &= ~(IXGB_EECD_DI);
164 if (eecd_reg & IXGB_EECD_DO)
167 ixgb_lower_clock(hw, &eecd_reg);
173 /******************************************************************************
174 * Prepares EEPROM for access
176 * hw - Struct containing variables accessed by shared code
178 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
179 * function should be called before issuing a command to the EEPROM.
180 *****************************************************************************/
182 ixgb_setup_eeprom(struct ixgb_hw *hw)
186 eecd_reg = IXGB_READ_REG(hw, EECD);
188 /* Clear SK and DI */
189 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
190 IXGB_WRITE_REG(hw, EECD, eecd_reg);
193 eecd_reg |= IXGB_EECD_CS;
194 IXGB_WRITE_REG(hw, EECD, eecd_reg);
198 /******************************************************************************
199 * Returns EEPROM to a "standby" state
201 * hw - Struct containing variables accessed by shared code
202 *****************************************************************************/
204 ixgb_standby_eeprom(struct ixgb_hw *hw)
208 eecd_reg = IXGB_READ_REG(hw, EECD);
210 /* Deselect EEPROM */
211 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
212 IXGB_WRITE_REG(hw, EECD, eecd_reg);
216 eecd_reg |= IXGB_EECD_SK;
217 IXGB_WRITE_REG(hw, EECD, eecd_reg);
221 eecd_reg |= IXGB_EECD_CS;
222 IXGB_WRITE_REG(hw, EECD, eecd_reg);
226 eecd_reg &= ~IXGB_EECD_SK;
227 IXGB_WRITE_REG(hw, EECD, eecd_reg);
232 /******************************************************************************
233 * Raises then lowers the EEPROM's clock pin
235 * hw - Struct containing variables accessed by shared code
236 *****************************************************************************/
238 ixgb_clock_eeprom(struct ixgb_hw *hw)
242 eecd_reg = IXGB_READ_REG(hw, EECD);
244 /* Rising edge of clock */
245 eecd_reg |= IXGB_EECD_SK;
246 IXGB_WRITE_REG(hw, EECD, eecd_reg);
249 /* Falling edge of clock */
250 eecd_reg &= ~IXGB_EECD_SK;
251 IXGB_WRITE_REG(hw, EECD, eecd_reg);
256 /******************************************************************************
257 * Terminates a command by lowering the EEPROM's chip select pin
259 * hw - Struct containing variables accessed by shared code
260 *****************************************************************************/
262 ixgb_cleanup_eeprom(struct ixgb_hw *hw)
266 eecd_reg = IXGB_READ_REG(hw, EECD);
268 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
270 IXGB_WRITE_REG(hw, EECD, eecd_reg);
272 ixgb_clock_eeprom(hw);
276 /******************************************************************************
277 * Waits for the EEPROM to finish the current command.
279 * hw - Struct containing variables accessed by shared code
281 * The command is done when the EEPROM's data out pin goes high.
284 * true: EEPROM data pin is high before timeout.
285 * false: Time expired.
286 *****************************************************************************/
288 ixgb_wait_eeprom_command(struct ixgb_hw *hw)
293 /* Toggle the CS line. This in effect tells to EEPROM to actually execute
294 * the command in question.
296 ixgb_standby_eeprom(hw);
298 /* Now read DO repeatedly until is high (equal to '1'). The EEPROM will
299 * signal that the command has been completed by raising the DO signal.
300 * If DO does not go high in 10 milliseconds, then error out.
302 for (i = 0; i < 200; i++) {
303 eecd_reg = IXGB_READ_REG(hw, EECD);
305 if (eecd_reg & IXGB_EECD_DO)
314 /******************************************************************************
315 * Verifies that the EEPROM has a valid checksum
317 * hw - Struct containing variables accessed by shared code
319 * Reads the first 64 16 bit words of the EEPROM and sums the values read.
320 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
324 * true: Checksum is valid
325 * false: Checksum is not valid.
326 *****************************************************************************/
328 ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
333 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
334 checksum += ixgb_read_eeprom(hw, i);
336 if (checksum == (u16) EEPROM_SUM)
342 /******************************************************************************
343 * Calculates the EEPROM checksum and writes it to the EEPROM
345 * hw - Struct containing variables accessed by shared code
347 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
348 * Writes the difference to word offset 63 of the EEPROM.
349 *****************************************************************************/
351 ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
356 for (i = 0; i < EEPROM_CHECKSUM_REG; i++)
357 checksum += ixgb_read_eeprom(hw, i);
359 checksum = (u16) EEPROM_SUM - checksum;
361 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
365 /******************************************************************************
366 * Writes a 16 bit word to a given offset in the EEPROM.
368 * hw - Struct containing variables accessed by shared code
369 * reg - offset within the EEPROM to be written to
370 * data - 16 bit word to be written to the EEPROM
372 * If ixgb_update_eeprom_checksum is not called after this function, the
373 * EEPROM will most likely contain an invalid checksum.
375 *****************************************************************************/
377 ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
379 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
381 /* Prepare the EEPROM for writing */
382 ixgb_setup_eeprom(hw);
384 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
385 * plus 4-bit dummy). This puts the EEPROM into write/erase mode.
387 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5);
388 ixgb_shift_out_bits(hw, 0, 4);
390 /* Prepare the EEPROM */
391 ixgb_standby_eeprom(hw);
393 /* Send the Write command (3-bit opcode + 6-bit addr) */
394 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3);
395 ixgb_shift_out_bits(hw, offset, 6);
398 ixgb_shift_out_bits(hw, data, 16);
400 ixgb_wait_eeprom_command(hw);
402 /* Recover from write */
403 ixgb_standby_eeprom(hw);
405 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
406 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase
409 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5);
410 ixgb_shift_out_bits(hw, 0, 4);
412 /* Done with writing */
413 ixgb_cleanup_eeprom(hw);
415 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
416 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
421 /******************************************************************************
422 * Reads a 16 bit word from the EEPROM.
424 * hw - Struct containing variables accessed by shared code
425 * offset - offset of 16 bit word in the EEPROM to read
428 * The 16-bit value read from the eeprom
429 *****************************************************************************/
431 ixgb_read_eeprom(struct ixgb_hw *hw,
436 /* Prepare the EEPROM for reading */
437 ixgb_setup_eeprom(hw);
439 /* Send the READ command (opcode + addr) */
440 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3);
442 * We have a 64 word EEPROM, there are 6 address bits
444 ixgb_shift_out_bits(hw, offset, 6);
447 data = ixgb_shift_in_bits(hw);
449 /* End this read operation */
450 ixgb_standby_eeprom(hw);
455 /******************************************************************************
456 * Reads eeprom and stores data in shared structure.
457 * Validates eeprom checksum and eeprom signature.
459 * hw - Struct containing variables accessed by shared code
462 * true: if eeprom read is successful
464 *****************************************************************************/
466 ixgb_get_eeprom_data(struct ixgb_hw *hw)
470 struct ixgb_ee_map_type *ee_map;
474 ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
476 pr_debug("Reading eeprom data\n");
477 for (i = 0; i < IXGB_EEPROM_SIZE ; i++) {
479 ee_data = ixgb_read_eeprom(hw, i);
481 hw->eeprom[i] = cpu_to_le16(ee_data);
484 if (checksum != (u16) EEPROM_SUM) {
485 pr_debug("Checksum invalid\n");
486 /* clear the init_ctrl_reg_1 to signify that the cache is
488 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
492 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
493 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
494 pr_debug("Signature invalid\n");
501 /******************************************************************************
502 * Local function to check if the eeprom signature is good
503 * If the eeprom signature is good, calls ixgb)get_eeprom_data.
505 * hw - Struct containing variables accessed by shared code
508 * true: eeprom signature was good and the eeprom read was successful
510 ******************************************************************************/
512 ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
514 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
516 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
517 == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
520 return ixgb_get_eeprom_data(hw);
524 /******************************************************************************
525 * return a word from the eeprom
527 * hw - Struct containing variables accessed by shared code
528 * index - Offset of eeprom word
531 * Word at indexed offset in eeprom, if valid, 0 otherwise.
532 ******************************************************************************/
534 ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
537 if ((index < IXGB_EEPROM_SIZE) &&
538 (ixgb_check_and_get_eeprom_data(hw) == true)) {
539 return(hw->eeprom[index]);
545 /******************************************************************************
546 * return the mac address from EEPROM
548 * hw - Struct containing variables accessed by shared code
549 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
552 ******************************************************************************/
554 ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
558 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
562 if (ixgb_check_and_get_eeprom_data(hw) == true) {
563 for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) {
564 mac_addr[i] = ee_map->mac_addr[i];
566 pr_debug("eeprom mac address = %pM\n", mac_addr);
571 /******************************************************************************
572 * return the Printed Board Assembly number from EEPROM
574 * hw - Struct containing variables accessed by shared code
577 * PBA number if EEPROM contents are valid, 0 otherwise
578 ******************************************************************************/
580 ixgb_get_ee_pba_number(struct ixgb_hw *hw)
582 if (ixgb_check_and_get_eeprom_data(hw) == true)
583 return (le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
584 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16));
590 /******************************************************************************
591 * return the Device Id from EEPROM
593 * hw - Struct containing variables accessed by shared code
596 * Device Id if EEPROM contents are valid, 0 otherwise
597 ******************************************************************************/
599 ixgb_get_ee_device_id(struct ixgb_hw *hw)
601 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
603 if (ixgb_check_and_get_eeprom_data(hw) == true)
604 return (le16_to_cpu(ee_map->device_id));