2 * linux/drivers/net/irda/pxaficp_ir.c
4 * Based on sa1100_ir.c by Russell King
6 * Changes copyright (C) 2003-2005 MontaVista Software, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor
15 #include <linux/dma-mapping.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
22 #include <linux/gpio.h>
23 #include <linux/slab.h>
25 #include <net/irda/irda.h>
26 #include <net/irda/irmod.h>
27 #include <net/irda/wrapper.h>
28 #include <net/irda/irda_device.h>
31 #include <mach/irda.h>
32 #include <mach/regs-ost.h>
33 #include <mach/regs-uart.h>
35 #define FICP __REG(0x40800000) /* Start of FICP area */
36 #define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */
37 #define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */
38 #define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */
39 #define ICDR __REG(0x4080000c) /* ICP Data Register */
40 #define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */
41 #define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */
43 #define ICCR0_AME (1 << 7) /* Address match enable */
44 #define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */
45 #define ICCR0_RIE (1 << 5) /* Receive FIFO interrupt enable */
46 #define ICCR0_RXE (1 << 4) /* Receive enable */
47 #define ICCR0_TXE (1 << 3) /* Transmit enable */
48 #define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */
49 #define ICCR0_LBM (1 << 1) /* Loopback mode */
50 #define ICCR0_ITR (1 << 0) /* IrDA transmission */
52 #define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
53 #define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
54 #define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
55 #define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
56 #define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
57 #define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
60 #define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
62 #define ICSR0_FRE (1 << 5) /* Framing error */
63 #define ICSR0_RFS (1 << 4) /* Receive FIFO service request */
64 #define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */
65 #define ICSR0_RAB (1 << 2) /* Receiver abort */
66 #define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */
67 #define ICSR0_EIF (1 << 0) /* End/Error in FIFO */
69 #define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */
70 #define ICSR1_CRE (1 << 5) /* CRC error */
71 #define ICSR1_EOF (1 << 4) /* End of frame */
72 #define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */
73 #define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */
74 #define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */
75 #define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */
77 #define IrSR_RXPL_NEG_IS_ZERO (1<<4)
78 #define IrSR_RXPL_POS_IS_ZERO 0x0
79 #define IrSR_TXPL_NEG_IS_ZERO (1<<3)
80 #define IrSR_TXPL_POS_IS_ZERO 0x0
81 #define IrSR_XMODE_PULSE_1_6 (1<<2)
82 #define IrSR_XMODE_PULSE_3_16 0x0
83 #define IrSR_RCVEIR_IR_MODE (1<<1)
84 #define IrSR_RCVEIR_UART_MODE 0x0
85 #define IrSR_XMITIR_IR_MODE (1<<0)
86 #define IrSR_XMITIR_UART_MODE 0x0
88 #define IrSR_IR_RECEIVE_ON (\
89 IrSR_RXPL_NEG_IS_ZERO | \
90 IrSR_TXPL_POS_IS_ZERO | \
91 IrSR_XMODE_PULSE_3_16 | \
92 IrSR_RCVEIR_IR_MODE | \
93 IrSR_XMITIR_UART_MODE)
95 #define IrSR_IR_TRANSMIT_ON (\
96 IrSR_RXPL_NEG_IS_ZERO | \
97 IrSR_TXPL_POS_IS_ZERO | \
98 IrSR_XMODE_PULSE_3_16 | \
99 IrSR_RCVEIR_UART_MODE | \
105 unsigned long last_oscr;
107 unsigned char *dma_rx_buff;
108 unsigned char *dma_tx_buff;
109 dma_addr_t dma_rx_buff_phy;
110 dma_addr_t dma_tx_buff_phy;
111 unsigned int dma_tx_buff_len;
118 struct irlap_cb *irlap;
125 struct pxaficp_platform_data *pdata;
131 static inline void pxa_irda_disable_clk(struct pxa_irda *si)
134 clk_disable_unprepare(si->cur_clk);
138 static inline void pxa_irda_enable_firclk(struct pxa_irda *si)
140 si->cur_clk = si->fir_clk;
141 clk_prepare_enable(si->fir_clk);
144 static inline void pxa_irda_enable_sirclk(struct pxa_irda *si)
146 si->cur_clk = si->sir_clk;
147 clk_prepare_enable(si->sir_clk);
151 #define IS_FIR(si) ((si)->speed >= 4000000)
152 #define IRDA_FRAME_SIZE_LIMIT 2047
154 inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si)
156 DCSR(si->rxdma) = DCSR_NODESC;
157 DSADR(si->rxdma) = __PREG(ICDR);
158 DTADR(si->rxdma) = si->dma_rx_buff_phy;
159 DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT;
160 DCSR(si->rxdma) |= DCSR_RUN;
163 inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si)
165 DCSR(si->txdma) = DCSR_NODESC;
166 DSADR(si->txdma) = si->dma_tx_buff_phy;
167 DTADR(si->txdma) = __PREG(ICDR);
168 DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len;
169 DCSR(si->txdma) |= DCSR_RUN;
173 * Set the IrDA communications mode.
175 static void pxa_irda_set_mode(struct pxa_irda *si, int mode)
177 if (si->pdata->transceiver_mode)
178 si->pdata->transceiver_mode(si->dev, mode);
180 if (gpio_is_valid(si->pdata->gpio_pwdown))
181 gpio_set_value(si->pdata->gpio_pwdown,
183 !si->pdata->gpio_pwdown_inverted);
184 pxa2xx_transceiver_mode(si->dev, mode);
189 * Set the IrDA communications speed.
191 static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
194 unsigned int divisor;
197 case 9600: case 19200: case 38400:
198 case 57600: case 115200:
200 /* refer to PXA250/210 Developer's Manual 10-7 */
201 /* BaudRate = 14.7456 MHz / (16*Divisor) */
202 divisor = 14745600 / (16 * speed);
204 local_irq_save(flags);
208 DCSR(si->rxdma) &= ~DCSR_RUN;
211 pxa_irda_disable_clk(si);
213 /* set board transceiver to SIR mode */
214 pxa_irda_set_mode(si, IR_SIRMODE);
216 /* enable the STUART clock */
217 pxa_irda_enable_sirclk(si);
220 /* disable STUART first */
223 /* access DLL & DLH */
225 STDLL = divisor & 0xff;
226 STDLH = divisor >> 8;
230 STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
231 STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
233 local_irq_restore(flags);
237 local_irq_save(flags);
242 pxa_irda_disable_clk(si);
244 /* disable FICP first */
247 /* set board transceiver to FIR mode */
248 pxa_irda_set_mode(si, IR_FIRMODE);
250 /* enable the FICP clock */
251 pxa_irda_enable_firclk(si);
254 pxa_irda_fir_dma_rx_start(si);
255 ICCR0 = ICCR0_ITR | ICCR0_RXE;
257 local_irq_restore(flags);
267 /* SIR interrupt service routine. */
268 static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id)
270 struct net_device *dev = dev_id;
271 struct pxa_irda *si = netdev_priv(dev);
276 switch (iir & 0x0F) {
277 case 0x06: /* Receiver Line Status */
279 while (lsr & LSR_FIFOE) {
281 if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) {
282 printk(KERN_DEBUG "pxa_ir: sir receiving error\n");
283 dev->stats.rx_errors++;
285 dev->stats.rx_frame_errors++;
287 dev->stats.rx_fifo_errors++;
289 dev->stats.rx_bytes++;
290 async_unwrap_char(dev, &dev->stats,
295 si->last_oscr = readl_relaxed(OSCR);
298 case 0x04: /* Received Data Available */
301 case 0x0C: /* Character Timeout Indication */
303 dev->stats.rx_bytes++;
304 async_unwrap_char(dev, &dev->stats, &si->rx_buff, STRBR);
305 } while (STLSR & LSR_DR);
306 si->last_oscr = readl_relaxed(OSCR);
309 case 0x02: /* Transmit FIFO Data Request */
310 while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) {
311 STTHR = *si->tx_buff.data++;
312 si->tx_buff.len -= 1;
315 if (si->tx_buff.len == 0) {
316 dev->stats.tx_packets++;
317 dev->stats.tx_bytes += si->tx_buff.data - si->tx_buff.head;
319 /* We need to ensure that the transmitter has finished. */
320 while ((STLSR & LSR_TEMT) == 0)
322 si->last_oscr = readl_relaxed(OSCR);
325 * Ok, we've finished transmitting. Now enable
326 * the receiver. Sometimes we get a receive IRQ
327 * immediately after a transmit...
330 pxa_irda_set_speed(si, si->newspeed);
333 /* enable IR Receiver, disable IR Transmitter */
334 STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
335 /* enable STUART and receive interrupts */
336 STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
339 netif_wake_queue(dev);
347 /* FIR Receive DMA interrupt handler */
348 static void pxa_irda_fir_dma_rx_irq(int channel, void *data)
350 int dcsr = DCSR(channel);
352 DCSR(channel) = dcsr & ~DCSR_RUN;
354 printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr);
357 /* FIR Transmit DMA interrupt handler */
358 static void pxa_irda_fir_dma_tx_irq(int channel, void *data)
360 struct net_device *dev = data;
361 struct pxa_irda *si = netdev_priv(dev);
364 dcsr = DCSR(channel);
365 DCSR(channel) = dcsr & ~DCSR_RUN;
367 if (dcsr & DCSR_ENDINTR) {
368 dev->stats.tx_packets++;
369 dev->stats.tx_bytes += si->dma_tx_buff_len;
371 dev->stats.tx_errors++;
374 while (ICSR1 & ICSR1_TBY)
376 si->last_oscr = readl_relaxed(OSCR);
379 * HACK: It looks like the TBY bit is dropped too soon.
380 * Without this delay things break.
385 pxa_irda_set_speed(si, si->newspeed);
391 pxa_irda_fir_dma_rx_start(si);
392 while ((ICSR1 & ICSR1_RNE) && i--)
394 ICCR0 = ICCR0_ITR | ICCR0_RXE;
397 printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
399 netif_wake_queue(dev);
402 /* EIF(Error in FIFO/End in Frame) handler for FIR */
403 static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0)
405 unsigned int len, stat, data;
407 /* Get the current data position. */
408 len = DTADR(si->rxdma) - si->dma_rx_buff_phy;
411 /* Read Status, and then Data. */
416 if (stat & (ICSR1_CRE | ICSR1_ROR)) {
417 dev->stats.rx_errors++;
418 if (stat & ICSR1_CRE) {
419 printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n");
420 dev->stats.rx_crc_errors++;
422 if (stat & ICSR1_ROR) {
423 printk(KERN_DEBUG "pxa_ir: fir receive overrun\n");
424 dev->stats.rx_over_errors++;
427 si->dma_rx_buff[len++] = data;
429 /* If we hit the end of frame, there's no point in continuing. */
430 if (stat & ICSR1_EOF)
432 } while (ICSR0 & ICSR0_EIF);
434 if (stat & ICSR1_EOF) {
438 if (icsr0 & ICSR0_FRE) {
439 printk(KERN_ERR "pxa_ir: dropping erroneous frame\n");
440 dev->stats.rx_dropped++;
444 skb = alloc_skb(len+1,GFP_ATOMIC);
446 printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n");
447 dev->stats.rx_dropped++;
451 /* Align IP header to 20 bytes */
453 skb_copy_to_linear_data(skb, si->dma_rx_buff, len);
456 /* Feed it to IrLAP */
458 skb_reset_mac_header(skb);
459 skb->protocol = htons(ETH_P_IRDA);
462 dev->stats.rx_packets++;
463 dev->stats.rx_bytes += len;
467 /* FIR interrupt handler */
468 static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id)
470 struct net_device *dev = dev_id;
471 struct pxa_irda *si = netdev_priv(dev);
475 DCSR(si->rxdma) &= ~DCSR_RUN;
476 si->last_oscr = readl_relaxed(OSCR);
479 if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) {
480 if (icsr0 & ICSR0_FRE) {
481 printk(KERN_DEBUG "pxa_ir: fir receive frame error\n");
482 dev->stats.rx_frame_errors++;
484 printk(KERN_DEBUG "pxa_ir: fir receive abort\n");
485 dev->stats.rx_errors++;
487 ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB);
490 if (icsr0 & ICSR0_EIF) {
491 /* An error in FIFO occurred, or there is a end of frame */
492 pxa_irda_fir_irq_eif(si, dev, icsr0);
496 pxa_irda_fir_dma_rx_start(si);
497 while ((ICSR1 & ICSR1_RNE) && i--)
499 ICCR0 = ICCR0_ITR | ICCR0_RXE;
502 printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
507 /* hard_xmit interface of irda device */
508 static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
510 struct pxa_irda *si = netdev_priv(dev);
511 int speed = irda_get_next_speed(skb);
514 * Does this packet contain a request to change the interface
515 * speed? If so, remember it until we complete the transmission
518 if (speed != si->speed && speed != -1)
519 si->newspeed = speed;
522 * If this is an empty frame, we can bypass a lot.
527 pxa_irda_set_speed(si, speed);
533 netif_stop_queue(dev);
536 si->tx_buff.data = si->tx_buff.head;
537 si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize);
539 /* Disable STUART interrupts and switch to transmit mode. */
541 STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6;
543 /* enable STUART and transmit interrupts */
544 STIER = IER_UUE | IER_TIE;
546 unsigned long mtt = irda_get_mtt(skb);
548 si->dma_tx_buff_len = skb->len;
549 skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len);
552 while ((unsigned)(readl_relaxed(OSCR) - si->last_oscr)/4 < mtt)
555 /* stop RX DMA, disable FICP */
556 DCSR(si->rxdma) &= ~DCSR_RUN;
559 pxa_irda_fir_dma_tx_start(si);
560 ICCR0 = ICCR0_ITR | ICCR0_TXE;
567 static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
569 struct if_irda_req *rq = (struct if_irda_req *)ifreq;
570 struct pxa_irda *si = netdev_priv(dev);
576 if (capable(CAP_NET_ADMIN)) {
578 * We are unable to set the speed if the
579 * device is not running.
581 if (netif_running(dev)) {
582 ret = pxa_irda_set_speed(si,
585 printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n");
593 if (capable(CAP_NET_ADMIN)) {
594 irda_device_set_media_busy(dev, TRUE);
601 rq->ifr_receiving = IS_FIR(si) ? 0
602 : si->rx_buff.state != OUTSIDE_FRAME;
613 static void pxa_irda_startup(struct pxa_irda *si)
615 /* Disable STUART interrupts */
617 /* enable STUART interrupt to the processor */
619 /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */
620 STLCR = LCR_WLS0 | LCR_WLS1;
621 /* enable FIFO, we use FIFO to improve performance */
622 STFCR = FCR_TRFIFOE | FCR_ITL_32;
626 /* configure FICP ICCR2 */
627 ICCR2 = ICCR2_TXP | ICCR2_TRIG_32;
630 DRCMR(17) = si->rxdma | DRCMR_MAPVLD;
631 DRCMR(18) = si->txdma | DRCMR_MAPVLD;
633 /* force SIR reinitialization */
635 pxa_irda_set_speed(si, 9600);
637 printk(KERN_DEBUG "pxa_ir: irda startup\n");
640 static void pxa_irda_shutdown(struct pxa_irda *si)
644 local_irq_save(flags);
646 /* disable STUART and interrupt */
648 /* disable STUART SIR mode */
652 DCSR(si->txdma) &= ~DCSR_RUN;
653 DCSR(si->rxdma) &= ~DCSR_RUN;
657 /* disable the STUART or FICP clocks */
658 pxa_irda_disable_clk(si);
663 local_irq_restore(flags);
665 /* power off board transceiver */
666 pxa_irda_set_mode(si, IR_OFF);
668 printk(KERN_DEBUG "pxa_ir: irda shutdown\n");
671 static int pxa_irda_start(struct net_device *dev)
673 struct pxa_irda *si = netdev_priv(dev);
678 err = request_irq(si->uart_irq, pxa_irda_sir_irq, 0, dev->name, dev);
682 err = request_irq(si->icp_irq, pxa_irda_fir_irq, 0, dev->name, dev);
687 * The interrupt must remain disabled for now.
689 disable_irq(si->uart_irq);
690 disable_irq(si->icp_irq);
693 si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev);
697 si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev);
702 si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
703 &si->dma_rx_buff_phy, GFP_KERNEL );
704 if (!si->dma_rx_buff)
705 goto err_dma_rx_buff;
707 si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
708 &si->dma_tx_buff_phy, GFP_KERNEL );
709 if (!si->dma_tx_buff)
710 goto err_dma_tx_buff;
712 /* Setup the serial port for the initial speed. */
713 pxa_irda_startup(si);
716 * Open a new IrLAP layer instance.
718 si->irlap = irlap_open(dev, &si->qos, "pxa");
724 * Now enable the interrupt and start the queue
726 enable_irq(si->uart_irq);
727 enable_irq(si->icp_irq);
728 netif_start_queue(dev);
730 printk(KERN_DEBUG "pxa_ir: irda driver opened\n");
735 pxa_irda_shutdown(si);
736 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
738 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
740 pxa_free_dma(si->txdma);
742 pxa_free_dma(si->rxdma);
744 free_irq(si->icp_irq, dev);
746 free_irq(si->uart_irq, dev);
752 static int pxa_irda_stop(struct net_device *dev)
754 struct pxa_irda *si = netdev_priv(dev);
756 netif_stop_queue(dev);
758 pxa_irda_shutdown(si);
762 irlap_close(si->irlap);
766 free_irq(si->uart_irq, dev);
767 free_irq(si->icp_irq, dev);
769 pxa_free_dma(si->rxdma);
770 pxa_free_dma(si->txdma);
773 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
775 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
777 printk(KERN_DEBUG "pxa_ir: irda driver closed\n");
781 static int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state)
783 struct net_device *dev = platform_get_drvdata(_dev);
786 if (dev && netif_running(dev)) {
787 si = netdev_priv(dev);
788 netif_device_detach(dev);
789 pxa_irda_shutdown(si);
795 static int pxa_irda_resume(struct platform_device *_dev)
797 struct net_device *dev = platform_get_drvdata(_dev);
800 if (dev && netif_running(dev)) {
801 si = netdev_priv(dev);
802 pxa_irda_startup(si);
803 netif_device_attach(dev);
804 netif_wake_queue(dev);
811 static int pxa_irda_init_iobuf(iobuff_t *io, int size)
813 io->head = kmalloc(size, GFP_KERNEL | GFP_DMA);
814 if (io->head != NULL) {
816 io->in_frame = FALSE;
817 io->state = OUTSIDE_FRAME;
820 return io->head ? 0 : -ENOMEM;
823 static const struct net_device_ops pxa_irda_netdev_ops = {
824 .ndo_open = pxa_irda_start,
825 .ndo_stop = pxa_irda_stop,
826 .ndo_start_xmit = pxa_irda_hard_xmit,
827 .ndo_do_ioctl = pxa_irda_ioctl,
830 static int pxa_irda_probe(struct platform_device *pdev)
832 struct net_device *dev;
834 unsigned int baudrate_mask;
837 if (!pdev->dev.platform_data)
840 err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY;
844 err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY;
848 dev = alloc_irdadev(sizeof(struct pxa_irda));
852 SET_NETDEV_DEV(dev, &pdev->dev);
853 si = netdev_priv(dev);
854 si->dev = &pdev->dev;
855 si->pdata = pdev->dev.platform_data;
857 si->uart_irq = platform_get_irq(pdev, 0);
858 si->icp_irq = platform_get_irq(pdev, 1);
860 si->sir_clk = clk_get(&pdev->dev, "UARTCLK");
861 si->fir_clk = clk_get(&pdev->dev, "FICPCLK");
862 if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) {
863 err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk);
868 * Initialise the SIR buffers
870 err = pxa_irda_init_iobuf(&si->rx_buff, 14384);
873 err = pxa_irda_init_iobuf(&si->tx_buff, 4000);
877 if (gpio_is_valid(si->pdata->gpio_pwdown)) {
878 err = gpio_request(si->pdata->gpio_pwdown, "IrDA switch");
881 err = gpio_direction_output(si->pdata->gpio_pwdown,
882 !si->pdata->gpio_pwdown_inverted);
884 gpio_free(si->pdata->gpio_pwdown);
889 if (si->pdata->startup) {
890 err = si->pdata->startup(si->dev);
895 if (gpio_is_valid(si->pdata->gpio_pwdown) && si->pdata->startup)
896 dev_warn(si->dev, "gpio_pwdown and startup() both defined!\n");
898 dev->netdev_ops = &pxa_irda_netdev_ops;
900 irda_init_max_qos_capabilies(&si->qos);
903 if (si->pdata->transceiver_cap & IR_SIRMODE)
904 baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
905 if (si->pdata->transceiver_cap & IR_FIRMODE)
906 baudrate_mask |= IR_4000000 << 8;
908 si->qos.baud_rate.bits &= baudrate_mask;
909 si->qos.min_turn_time.bits = 7; /* 1ms or more */
911 irda_qos_bits_to_value(&si->qos);
913 err = register_netdev(dev);
916 dev_set_drvdata(&pdev->dev, dev);
919 if (si->pdata->shutdown)
920 si->pdata->shutdown(si->dev);
922 kfree(si->tx_buff.head);
924 kfree(si->rx_buff.head);
926 if (si->sir_clk && !IS_ERR(si->sir_clk))
927 clk_put(si->sir_clk);
928 if (si->fir_clk && !IS_ERR(si->fir_clk))
929 clk_put(si->fir_clk);
932 release_mem_region(__PREG(FICP), 0x1c);
934 release_mem_region(__PREG(STUART), 0x24);
940 static int pxa_irda_remove(struct platform_device *_dev)
942 struct net_device *dev = platform_get_drvdata(_dev);
945 struct pxa_irda *si = netdev_priv(dev);
946 unregister_netdev(dev);
947 if (gpio_is_valid(si->pdata->gpio_pwdown))
948 gpio_free(si->pdata->gpio_pwdown);
949 if (si->pdata->shutdown)
950 si->pdata->shutdown(si->dev);
951 kfree(si->tx_buff.head);
952 kfree(si->rx_buff.head);
953 clk_put(si->fir_clk);
954 clk_put(si->sir_clk);
958 release_mem_region(__PREG(STUART), 0x24);
959 release_mem_region(__PREG(FICP), 0x1c);
964 static struct platform_driver pxa_ir_driver = {
967 .owner = THIS_MODULE,
969 .probe = pxa_irda_probe,
970 .remove = pxa_irda_remove,
971 .suspend = pxa_irda_suspend,
972 .resume = pxa_irda_resume,
975 module_platform_driver(pxa_ir_driver);
977 MODULE_LICENSE("GPL");
978 MODULE_ALIAS("platform:pxa2xx-ir");