1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (c) 2018 Synopsys, Inc. and/or its affiliates.
4 * stmmac TC Handling (HW only)
7 #include <net/pkt_cls.h>
8 #include <net/tc_act/tc_gact.h>
14 static void tc_fill_all_pass_entry(struct stmmac_tc_entry *entry)
16 memset(entry, 0, sizeof(*entry));
18 entry->is_last = true;
19 entry->is_frag = false;
22 entry->val.match_data = 0x0;
23 entry->val.match_en = 0x0;
25 entry->val.dma_ch_no = 0x0;
28 static struct stmmac_tc_entry *tc_find_entry(struct stmmac_priv *priv,
29 struct tc_cls_u32_offload *cls,
32 struct stmmac_tc_entry *entry, *first = NULL, *dup = NULL;
33 u32 loc = cls->knode.handle;
36 for (i = 0; i < priv->tc_entries_max; i++) {
37 entry = &priv->tc_entries[i];
38 if (!entry->in_use && !first && free)
40 if ((entry->handle == loc) && !free && !entry->is_frag)
51 memset(&first->val, 0, sizeof(first->val));
57 static int tc_fill_actions(struct stmmac_tc_entry *entry,
58 struct stmmac_tc_entry *frag,
59 struct tc_cls_u32_offload *cls)
61 struct stmmac_tc_entry *action_entry = entry;
62 const struct tc_action *act;
63 struct tcf_exts *exts;
66 exts = cls->knode.exts;
67 if (!tcf_exts_has_actions(exts))
72 tcf_exts_for_each_action(i, act, exts) {
74 if (is_tcf_gact_ok(act)) {
75 action_entry->val.af = 1;
79 if (is_tcf_gact_shot(act)) {
80 action_entry->val.rf = 1;
91 static int tc_fill_entry(struct stmmac_priv *priv,
92 struct tc_cls_u32_offload *cls)
94 struct stmmac_tc_entry *entry, *frag = NULL;
95 struct tc_u32_sel *sel = cls->knode.sel;
96 u32 off, data, mask, real_off, rem;
97 u32 prio = cls->common.prio << 16;
100 /* Only 1 match per entry */
101 if (sel->nkeys <= 0 || sel->nkeys > 1)
104 off = sel->keys[0].off << sel->offshift;
105 data = sel->keys[0].val;
106 mask = sel->keys[0].mask;
108 switch (ntohs(cls->common.protocol)) {
118 if (off > priv->tc_off_max)
124 entry = tc_find_entry(priv, cls, true);
129 frag = tc_find_entry(priv, cls, true);
135 entry->frag_ptr = frag;
136 entry->val.match_en = (mask << (rem * 8)) &
137 GENMASK(31, rem * 8);
138 entry->val.match_data = (data << (rem * 8)) &
139 GENMASK(31, rem * 8);
140 entry->val.frame_offset = real_off;
143 frag->val.match_en = (mask >> (rem * 8)) &
144 GENMASK(rem * 8 - 1, 0);
145 frag->val.match_data = (data >> (rem * 8)) &
146 GENMASK(rem * 8 - 1, 0);
147 frag->val.frame_offset = real_off + 1;
149 frag->is_frag = true;
151 entry->frag_ptr = NULL;
152 entry->val.match_en = mask;
153 entry->val.match_data = data;
154 entry->val.frame_offset = real_off;
158 ret = tc_fill_actions(entry, frag, cls);
166 frag->in_use = false;
167 entry->in_use = false;
171 static void tc_unfill_entry(struct stmmac_priv *priv,
172 struct tc_cls_u32_offload *cls)
174 struct stmmac_tc_entry *entry;
176 entry = tc_find_entry(priv, cls, false);
180 entry->in_use = false;
181 if (entry->frag_ptr) {
182 entry = entry->frag_ptr;
183 entry->is_frag = false;
184 entry->in_use = false;
188 static int tc_config_knode(struct stmmac_priv *priv,
189 struct tc_cls_u32_offload *cls)
193 ret = tc_fill_entry(priv, cls);
197 ret = stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries,
198 priv->tc_entries_max);
205 tc_unfill_entry(priv, cls);
209 static int tc_delete_knode(struct stmmac_priv *priv,
210 struct tc_cls_u32_offload *cls)
212 /* Set entry and fragments as not used */
213 tc_unfill_entry(priv, cls);
215 return stmmac_rxp_config(priv, priv->hw->pcsr, priv->tc_entries,
216 priv->tc_entries_max);
219 static int tc_setup_cls_u32(struct stmmac_priv *priv,
220 struct tc_cls_u32_offload *cls)
222 switch (cls->command) {
223 case TC_CLSU32_REPLACE_KNODE:
224 tc_unfill_entry(priv, cls);
226 case TC_CLSU32_NEW_KNODE:
227 return tc_config_knode(priv, cls);
228 case TC_CLSU32_DELETE_KNODE:
229 return tc_delete_knode(priv, cls);
235 static int tc_rfs_init(struct stmmac_priv *priv)
239 priv->rfs_entries_max[STMMAC_RFS_T_VLAN] = 8;
240 priv->rfs_entries_max[STMMAC_RFS_T_LLDP] = 1;
241 priv->rfs_entries_max[STMMAC_RFS_T_1588] = 1;
243 for (i = 0; i < STMMAC_RFS_T_MAX; i++)
244 priv->rfs_entries_total += priv->rfs_entries_max[i];
246 priv->rfs_entries = devm_kcalloc(priv->device,
247 priv->rfs_entries_total,
248 sizeof(*priv->rfs_entries),
250 if (!priv->rfs_entries)
253 dev_info(priv->device, "Enabled RFS Flow TC (entries=%d)\n",
254 priv->rfs_entries_total);
259 static int tc_init(struct stmmac_priv *priv)
261 struct dma_features *dma_cap = &priv->dma_cap;
265 if (dma_cap->l3l4fnum) {
266 priv->flow_entries_max = dma_cap->l3l4fnum;
267 priv->flow_entries = devm_kcalloc(priv->device,
269 sizeof(*priv->flow_entries),
271 if (!priv->flow_entries)
274 for (i = 0; i < priv->flow_entries_max; i++)
275 priv->flow_entries[i].idx = i;
277 dev_info(priv->device, "Enabled L3L4 Flow TC (entries=%d)\n",
278 priv->flow_entries_max);
281 ret = tc_rfs_init(priv);
285 if (!priv->plat->fpe_cfg) {
286 priv->plat->fpe_cfg = devm_kzalloc(priv->device,
287 sizeof(*priv->plat->fpe_cfg),
289 if (!priv->plat->fpe_cfg)
292 memset(priv->plat->fpe_cfg, 0, sizeof(*priv->plat->fpe_cfg));
295 /* Fail silently as we can still use remaining features, e.g. CBS */
296 if (!dma_cap->frpsel)
299 switch (dma_cap->frpbs) {
301 priv->tc_off_max = 64;
304 priv->tc_off_max = 128;
307 priv->tc_off_max = 256;
313 switch (dma_cap->frpes) {
327 /* Reserve one last filter which lets all pass */
328 priv->tc_entries_max = count;
329 priv->tc_entries = devm_kcalloc(priv->device,
330 count, sizeof(*priv->tc_entries), GFP_KERNEL);
331 if (!priv->tc_entries)
334 tc_fill_all_pass_entry(&priv->tc_entries[count - 1]);
336 dev_info(priv->device, "Enabling HW TC (entries=%d, max_off=%d)\n",
337 priv->tc_entries_max, priv->tc_off_max);
342 static int tc_setup_cbs(struct stmmac_priv *priv,
343 struct tc_cbs_qopt_offload *qopt)
345 u32 tx_queues_count = priv->plat->tx_queues_to_use;
346 u32 queue = qopt->queue;
352 /* Queue 0 is not AVB capable */
353 if (queue <= 0 || queue >= tx_queues_count)
355 if (!priv->dma_cap.av)
358 /* Port Transmit Rate and Speed Divider */
359 switch (priv->speed) {
362 speed_div = 10000000;
384 mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use;
385 if (mode_to_use == MTL_QUEUE_DCB && qopt->enable) {
386 ret = stmmac_dma_qmode(priv, priv->ioaddr, queue, MTL_QUEUE_AVB);
390 priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
391 } else if (!qopt->enable) {
392 ret = stmmac_dma_qmode(priv, priv->ioaddr, queue,
397 priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
400 /* Final adjustments for HW */
401 value = div_s64(qopt->idleslope * 1024ll * ptr, speed_div);
402 priv->plat->tx_queues_cfg[queue].idle_slope = value & GENMASK(31, 0);
404 value = div_s64(-qopt->sendslope * 1024ll * ptr, speed_div);
405 priv->plat->tx_queues_cfg[queue].send_slope = value & GENMASK(31, 0);
407 value = qopt->hicredit * 1024ll * 8;
408 priv->plat->tx_queues_cfg[queue].high_credit = value & GENMASK(31, 0);
410 value = qopt->locredit * 1024ll * 8;
411 priv->plat->tx_queues_cfg[queue].low_credit = value & GENMASK(31, 0);
413 ret = stmmac_config_cbs(priv, priv->hw,
414 priv->plat->tx_queues_cfg[queue].send_slope,
415 priv->plat->tx_queues_cfg[queue].idle_slope,
416 priv->plat->tx_queues_cfg[queue].high_credit,
417 priv->plat->tx_queues_cfg[queue].low_credit,
422 dev_info(priv->device, "CBS queue %d: send %d, idle %d, hi %d, lo %d\n",
423 queue, qopt->sendslope, qopt->idleslope,
424 qopt->hicredit, qopt->locredit);
428 static int tc_parse_flow_actions(struct stmmac_priv *priv,
429 struct flow_action *action,
430 struct stmmac_flow_entry *entry,
431 struct netlink_ext_ack *extack)
433 struct flow_action_entry *act;
436 if (!flow_action_has_entries(action))
439 if (!flow_action_basic_hw_stats_check(action, extack))
442 flow_action_for_each(i, act, action) {
444 case FLOW_ACTION_DROP:
445 entry->action |= STMMAC_FLOW_ACTION_DROP;
452 /* Nothing to do, maybe inverse filter ? */
456 #define ETHER_TYPE_FULL_MASK cpu_to_be16(~0)
458 static int tc_add_basic_flow(struct stmmac_priv *priv,
459 struct flow_cls_offload *cls,
460 struct stmmac_flow_entry *entry)
462 struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
463 struct flow_dissector *dissector = rule->match.dissector;
464 struct flow_match_basic match;
466 /* Nothing to do here */
467 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_BASIC))
470 flow_rule_match_basic(rule, &match);
472 entry->ip_proto = match.key->ip_proto;
476 static int tc_add_ip4_flow(struct stmmac_priv *priv,
477 struct flow_cls_offload *cls,
478 struct stmmac_flow_entry *entry)
480 struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
481 struct flow_dissector *dissector = rule->match.dissector;
482 bool inv = entry->action & STMMAC_FLOW_ACTION_DROP;
483 struct flow_match_ipv4_addrs match;
487 /* Nothing to do here */
488 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_IPV4_ADDRS))
491 flow_rule_match_ipv4_addrs(rule, &match);
492 hw_match = ntohl(match.key->src) & ntohl(match.mask->src);
494 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true,
495 false, true, inv, hw_match);
500 hw_match = ntohl(match.key->dst) & ntohl(match.mask->dst);
502 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true,
503 false, false, inv, hw_match);
511 static int tc_add_ports_flow(struct stmmac_priv *priv,
512 struct flow_cls_offload *cls,
513 struct stmmac_flow_entry *entry)
515 struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
516 struct flow_dissector *dissector = rule->match.dissector;
517 bool inv = entry->action & STMMAC_FLOW_ACTION_DROP;
518 struct flow_match_ports match;
523 /* Nothing to do here */
524 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_PORTS))
527 switch (entry->ip_proto) {
538 flow_rule_match_ports(rule, &match);
540 hw_match = ntohs(match.key->src) & ntohs(match.mask->src);
542 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true,
543 is_udp, true, inv, hw_match);
548 hw_match = ntohs(match.key->dst) & ntohs(match.mask->dst);
550 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true,
551 is_udp, false, inv, hw_match);
560 static struct stmmac_flow_entry *tc_find_flow(struct stmmac_priv *priv,
561 struct flow_cls_offload *cls,
566 for (i = 0; i < priv->flow_entries_max; i++) {
567 struct stmmac_flow_entry *entry = &priv->flow_entries[i];
569 if (entry->cookie == cls->cookie)
571 if (get_free && (entry->in_use == false))
579 int (*fn)(struct stmmac_priv *priv, struct flow_cls_offload *cls,
580 struct stmmac_flow_entry *entry);
581 } tc_flow_parsers[] = {
582 { .fn = tc_add_basic_flow },
583 { .fn = tc_add_ip4_flow },
584 { .fn = tc_add_ports_flow },
587 static int tc_add_flow(struct stmmac_priv *priv,
588 struct flow_cls_offload *cls)
590 struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false);
591 struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
595 entry = tc_find_flow(priv, cls, true);
600 ret = tc_parse_flow_actions(priv, &rule->action, entry,
605 for (i = 0; i < ARRAY_SIZE(tc_flow_parsers); i++) {
606 ret = tc_flow_parsers[i].fn(priv, cls, entry);
608 entry->in_use = true;
614 entry->cookie = cls->cookie;
618 static int tc_del_flow(struct stmmac_priv *priv,
619 struct flow_cls_offload *cls)
621 struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false);
624 if (!entry || !entry->in_use)
628 ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, false,
629 false, false, false, 0);
631 ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, false,
632 false, false, false, 0);
635 entry->in_use = false;
637 entry->is_l4 = false;
641 static struct stmmac_rfs_entry *tc_find_rfs(struct stmmac_priv *priv,
642 struct flow_cls_offload *cls,
647 for (i = 0; i < priv->rfs_entries_total; i++) {
648 struct stmmac_rfs_entry *entry = &priv->rfs_entries[i];
650 if (entry->cookie == cls->cookie)
652 if (get_free && entry->in_use == false)
659 #define VLAN_PRIO_FULL_MASK (0x07)
661 static int tc_add_vlan_flow(struct stmmac_priv *priv,
662 struct flow_cls_offload *cls)
664 struct stmmac_rfs_entry *entry = tc_find_rfs(priv, cls, false);
665 struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
666 struct flow_dissector *dissector = rule->match.dissector;
667 int tc = tc_classid_to_hwtc(priv->dev, cls->classid);
668 struct flow_match_vlan match;
671 entry = tc_find_rfs(priv, cls, true);
676 if (priv->rfs_entries_cnt[STMMAC_RFS_T_VLAN] >=
677 priv->rfs_entries_max[STMMAC_RFS_T_VLAN])
680 /* Nothing to do here */
681 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_VLAN))
685 netdev_err(priv->dev, "Invalid traffic class\n");
689 flow_rule_match_vlan(rule, &match);
691 if (match.mask->vlan_priority) {
694 if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
695 netdev_err(priv->dev, "Only full mask is supported for VLAN priority");
699 prio = BIT(match.key->vlan_priority);
700 stmmac_rx_queue_prio(priv, priv->hw, prio, tc);
702 entry->in_use = true;
703 entry->cookie = cls->cookie;
705 entry->type = STMMAC_RFS_T_VLAN;
706 priv->rfs_entries_cnt[STMMAC_RFS_T_VLAN]++;
712 static int tc_del_vlan_flow(struct stmmac_priv *priv,
713 struct flow_cls_offload *cls)
715 struct stmmac_rfs_entry *entry = tc_find_rfs(priv, cls, false);
717 if (!entry || !entry->in_use || entry->type != STMMAC_RFS_T_VLAN)
720 stmmac_rx_queue_prio(priv, priv->hw, 0, entry->tc);
722 entry->in_use = false;
727 priv->rfs_entries_cnt[STMMAC_RFS_T_VLAN]--;
732 static int tc_add_ethtype_flow(struct stmmac_priv *priv,
733 struct flow_cls_offload *cls)
735 struct stmmac_rfs_entry *entry = tc_find_rfs(priv, cls, false);
736 struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
737 struct flow_dissector *dissector = rule->match.dissector;
738 int tc = tc_classid_to_hwtc(priv->dev, cls->classid);
739 struct flow_match_basic match;
742 entry = tc_find_rfs(priv, cls, true);
747 /* Nothing to do here */
748 if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_BASIC))
752 netdev_err(priv->dev, "Invalid traffic class\n");
756 flow_rule_match_basic(rule, &match);
758 if (match.mask->n_proto) {
759 u16 etype = ntohs(match.key->n_proto);
761 if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
762 netdev_err(priv->dev, "Only full mask is supported for EthType filter");
767 if (priv->rfs_entries_cnt[STMMAC_RFS_T_LLDP] >=
768 priv->rfs_entries_max[STMMAC_RFS_T_LLDP])
771 entry->type = STMMAC_RFS_T_LLDP;
772 priv->rfs_entries_cnt[STMMAC_RFS_T_LLDP]++;
774 stmmac_rx_queue_routing(priv, priv->hw,
778 if (priv->rfs_entries_cnt[STMMAC_RFS_T_1588] >=
779 priv->rfs_entries_max[STMMAC_RFS_T_1588])
782 entry->type = STMMAC_RFS_T_1588;
783 priv->rfs_entries_cnt[STMMAC_RFS_T_1588]++;
785 stmmac_rx_queue_routing(priv, priv->hw,
789 netdev_err(priv->dev, "EthType(0x%x) is not supported", etype);
793 entry->in_use = true;
794 entry->cookie = cls->cookie;
796 entry->etype = etype;
804 static int tc_del_ethtype_flow(struct stmmac_priv *priv,
805 struct flow_cls_offload *cls)
807 struct stmmac_rfs_entry *entry = tc_find_rfs(priv, cls, false);
809 if (!entry || !entry->in_use ||
810 entry->type < STMMAC_RFS_T_LLDP ||
811 entry->type > STMMAC_RFS_T_1588)
814 switch (entry->etype) {
816 stmmac_rx_queue_routing(priv, priv->hw,
818 priv->rfs_entries_cnt[STMMAC_RFS_T_LLDP]--;
821 stmmac_rx_queue_routing(priv, priv->hw,
823 priv->rfs_entries_cnt[STMMAC_RFS_T_1588]--;
826 netdev_err(priv->dev, "EthType(0x%x) is not supported",
831 entry->in_use = false;
840 static int tc_add_flow_cls(struct stmmac_priv *priv,
841 struct flow_cls_offload *cls)
845 ret = tc_add_flow(priv, cls);
849 ret = tc_add_ethtype_flow(priv, cls);
853 return tc_add_vlan_flow(priv, cls);
856 static int tc_del_flow_cls(struct stmmac_priv *priv,
857 struct flow_cls_offload *cls)
861 ret = tc_del_flow(priv, cls);
865 ret = tc_del_ethtype_flow(priv, cls);
869 return tc_del_vlan_flow(priv, cls);
872 static int tc_setup_cls(struct stmmac_priv *priv,
873 struct flow_cls_offload *cls)
877 /* When RSS is enabled, the filtering will be bypassed */
878 if (priv->rss.enable)
881 switch (cls->command) {
882 case FLOW_CLS_REPLACE:
883 ret = tc_add_flow_cls(priv, cls);
885 case FLOW_CLS_DESTROY:
886 ret = tc_del_flow_cls(priv, cls);
895 struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time,
896 ktime_t current_time,
899 struct timespec64 time;
901 if (ktime_after(old_base_time, current_time)) {
902 time = ktime_to_timespec64(old_base_time);
907 n = div64_s64(ktime_sub_ns(current_time, old_base_time),
909 base_time = ktime_add_ns(old_base_time,
910 (n + 1) * cycle_time);
912 time = ktime_to_timespec64(base_time);
918 static int tc_setup_taprio(struct stmmac_priv *priv,
919 struct tc_taprio_qopt_offload *qopt)
921 u32 size, wid = priv->dma_cap.estwid, dep = priv->dma_cap.estdep;
922 struct plat_stmmacenet_data *plat = priv->plat;
923 struct timespec64 time, current_time, qopt_time;
924 ktime_t current_time_ns;
929 if (qopt->base_time < 0)
932 if (!priv->dma_cap.estsel)
969 if (qopt->cmd == TAPRIO_CMD_DESTROY)
971 else if (qopt->cmd != TAPRIO_CMD_REPLACE)
974 if (qopt->num_entries >= dep)
976 if (!qopt->cycle_time)
980 plat->est = devm_kzalloc(priv->device, sizeof(*plat->est),
985 mutex_init(&priv->plat->est->lock);
987 memset(plat->est, 0, sizeof(*plat->est));
990 size = qopt->num_entries;
992 mutex_lock(&priv->plat->est->lock);
993 priv->plat->est->gcl_size = size;
994 priv->plat->est->enable = qopt->cmd == TAPRIO_CMD_REPLACE;
995 mutex_unlock(&priv->plat->est->lock);
997 for (i = 0; i < size; i++) {
998 s64 delta_ns = qopt->entries[i].interval;
999 u32 gates = qopt->entries[i].gate_mask;
1001 if (delta_ns > GENMASK(wid, 0))
1003 if (gates > GENMASK(31 - wid, 0))
1006 switch (qopt->entries[i].command) {
1007 case TC_TAPRIO_CMD_SET_GATES:
1011 case TC_TAPRIO_CMD_SET_AND_HOLD:
1015 case TC_TAPRIO_CMD_SET_AND_RELEASE:
1023 priv->plat->est->gcl[i] = delta_ns | (gates << wid);
1026 mutex_lock(&priv->plat->est->lock);
1027 /* Adjust for real system time */
1028 priv->ptp_clock_ops.gettime64(&priv->ptp_clock_ops, ¤t_time);
1029 current_time_ns = timespec64_to_ktime(current_time);
1030 time = stmmac_calc_tas_basetime(qopt->base_time, current_time_ns,
1033 priv->plat->est->btr[0] = (u32)time.tv_nsec;
1034 priv->plat->est->btr[1] = (u32)time.tv_sec;
1036 qopt_time = ktime_to_timespec64(qopt->base_time);
1037 priv->plat->est->btr_reserve[0] = (u32)qopt_time.tv_nsec;
1038 priv->plat->est->btr_reserve[1] = (u32)qopt_time.tv_sec;
1040 ctr = qopt->cycle_time;
1041 priv->plat->est->ctr[0] = do_div(ctr, NSEC_PER_SEC);
1042 priv->plat->est->ctr[1] = (u32)ctr;
1044 if (fpe && !priv->dma_cap.fpesel) {
1045 mutex_unlock(&priv->plat->est->lock);
1049 /* Actual FPE register configuration will be done after FPE handshake
1052 priv->plat->fpe_cfg->enable = fpe;
1054 ret = stmmac_est_configure(priv, priv->ioaddr, priv->plat->est,
1055 priv->plat->clk_ptp_rate);
1056 mutex_unlock(&priv->plat->est->lock);
1058 netdev_err(priv->dev, "failed to configure EST\n");
1062 netdev_info(priv->dev, "configured EST\n");
1065 stmmac_fpe_handshake(priv, true);
1066 netdev_info(priv->dev, "start FPE handshake\n");
1072 if (priv->plat->est) {
1073 mutex_lock(&priv->plat->est->lock);
1074 priv->plat->est->enable = false;
1075 stmmac_est_configure(priv, priv->ioaddr, priv->plat->est,
1076 priv->plat->clk_ptp_rate);
1077 mutex_unlock(&priv->plat->est->lock);
1080 priv->plat->fpe_cfg->enable = false;
1081 stmmac_fpe_configure(priv, priv->ioaddr,
1082 priv->plat->fpe_cfg,
1083 priv->plat->tx_queues_to_use,
1084 priv->plat->rx_queues_to_use,
1086 netdev_info(priv->dev, "disabled FPE\n");
1088 stmmac_fpe_handshake(priv, false);
1089 netdev_info(priv->dev, "stop FPE handshake\n");
1094 static int tc_setup_etf(struct stmmac_priv *priv,
1095 struct tc_etf_qopt_offload *qopt)
1097 if (!priv->dma_cap.tbssel)
1099 if (qopt->queue >= priv->plat->tx_queues_to_use)
1101 if (!(priv->dma_conf.tx_queue[qopt->queue].tbs & STMMAC_TBS_AVAIL))
1105 priv->dma_conf.tx_queue[qopt->queue].tbs |= STMMAC_TBS_EN;
1107 priv->dma_conf.tx_queue[qopt->queue].tbs &= ~STMMAC_TBS_EN;
1109 netdev_info(priv->dev, "%s ETF for Queue %d\n",
1110 qopt->enable ? "enabled" : "disabled", qopt->queue);
1114 static int tc_query_caps(struct stmmac_priv *priv,
1115 struct tc_query_caps_base *base)
1117 switch (base->type) {
1118 case TC_SETUP_QDISC_TAPRIO: {
1119 struct tc_taprio_caps *caps = base->caps;
1121 if (!priv->dma_cap.estsel)
1124 caps->gate_mask_per_txq = true;
1133 const struct stmmac_tc_ops dwmac510_tc_ops = {
1135 .setup_cls_u32 = tc_setup_cls_u32,
1136 .setup_cbs = tc_setup_cbs,
1137 .setup_cls = tc_setup_cls,
1138 .setup_taprio = tc_setup_taprio,
1139 .setup_etf = tc_setup_etf,
1140 .query_caps = tc_query_caps,