drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*******************************************************************************
   3   This contains the functions to handle the platform driver.
   4
   5   Copyright (C) 2007-2011  STMicroelectronics Ltd
   6
   7
   8   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
   9 *******************************************************************************/
  10
  11 #include <linux/platform_device.h>
  12 #include <linux/pm_runtime.h>
  13 #include <linux/module.h>
  14 #include <linux/io.h>
  15 #include <linux/of.h>
  16 #include <linux/of_net.h>
  17 #include <linux/of_device.h>
  18 #include <linux/of_mdio.h>
  19
  20 #include "stmmac.h"
  21 #include "stmmac_platform.h"
  22
  23 #ifdef CONFIG_OF
  24
  25 /**
  26  * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
  27  * @dev: struct device of the platform device
  28  * @mcast_bins: Multicast filtering bins
  29  * Description:
  30  * this function validates the number of Multicast filtering bins specified
  31  * by the configuration through the device tree. The Synopsys GMAC supports
  32  * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
  33  * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
  34  * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
  35  * invalid and will cause the filtering algorithm to use Multicast
  36  * promiscuous mode.
  37  */
  38 static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)
  39 {
  40         int x = mcast_bins;
  41
  42         switch (x) {
  43         case HASH_TABLE_SIZE:
  44         case 128:
  45         case 256:
  46                 break;
  47         default:
  48                 x = 0;
  49                 dev_info(dev, "Hash table entries set to unexpected value %d\n",
  50                          mcast_bins);
  51                 break;
  52         }
  53         return x;
  54 }
  55
  56 /**
  57  * dwmac1000_validate_ucast_entries - validate the Unicast address entries
  58  * @dev: struct device of the platform device
  59  * @ucast_entries: number of Unicast address entries
  60  * Description:
  61  * This function validates the number of Unicast address entries supported
  62  * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
  63  * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
  64  * logic. This function validates a valid, supported configuration is
  65  * selected, and defaults to 1 Unicast address if an unsupported
  66  * configuration is selected.
  67  */
  68 static int dwmac1000_validate_ucast_entries(struct device *dev,
  69                                             int ucast_entries)
  70 {
  71         int x = ucast_entries;
  72
  73         switch (x) {
  74         case 1 ... 32:
  75         case 64:
  76         case 128:
  77                 break;
  78         default:
  79                 x = 1;
  80                 dev_info(dev, "Unicast table entries set to unexpected value %d\n",
  81                          ucast_entries);
  82                 break;
  83         }
  84         return x;
  85 }
  86
  87 /**
  88  * stmmac_axi_setup - parse DT parameters for programming the AXI register
  89  * @pdev: platform device
  90  * Description:
  91  * if required, from device-tree the AXI internal register can be tuned
  92  * by using platform parameters.
  93  */
  94 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
  95 {
  96         struct device_node *np;
  97         struct stmmac_axi *axi;
  98
  99         np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
 100         if (!np)
 101                 return NULL;
 102
 103         axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
 104         if (!axi) {
 105                 of_node_put(np);
 106                 return ERR_PTR(-ENOMEM);
 107         }
 108
 109         axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
 110         axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
 111         axi->axi_kbbe = of_property_read_bool(np, "snps,kbbe");
 112         axi->axi_fb = of_property_read_bool(np, "snps,fb");
 113         axi->axi_mb = of_property_read_bool(np, "snps,mb");
 114         axi->axi_rb =  of_property_read_bool(np, "snps,rb");
 115
 116         if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
 117                 axi->axi_wr_osr_lmt = 1;
 118         if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
 119                 axi->axi_rd_osr_lmt = 1;
 120         of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
 121         of_node_put(np);
 122
 123         return axi;
 124 }
 125
 126 /**
 127  * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
 128  * @pdev: platform device
 129  * @plat: enet data
 130  */
 131 static int stmmac_mtl_setup(struct platform_device *pdev,
 132                             struct plat_stmmacenet_data *plat)
 133 {
 134         struct device_node *q_node;
 135         struct device_node *rx_node;
 136         struct device_node *tx_node;
 137         u8 queue = 0;
 138         int ret = 0;
 139
 140         /* For backwards-compatibility with device trees that don't have any
 141          * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
 142          * to one RX and TX queues each.
 143          */
 144         plat->rx_queues_to_use = 1;
 145         plat->tx_queues_to_use = 1;
 146
 147         /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
 148          * to always set this, otherwise Queue will be classified as AVB
 149          * (because MTL_QUEUE_AVB = 0).
 150          */
 151         plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
 152         plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
 153
 154         rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
 155         if (!rx_node)
 156                 return ret;
 157
 158         tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
 159         if (!tx_node) {
 160                 of_node_put(rx_node);
 161                 return ret;
 162         }
 163
 164         /* Processing RX queues common config */
 165         if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
 166                                  &plat->rx_queues_to_use))
 167                 plat->rx_queues_to_use = 1;
 168
 169         if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
 170                 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
 171         else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
 172                 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
 173         else
 174                 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
 175
 176         /* Processing individual RX queue config */
 177         for_each_child_of_node(rx_node, q_node) {
 178                 if (queue >= plat->rx_queues_to_use)
 179                         break;
 180
 181                 if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
 182                         plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
 183                 else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
 184                         plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
 185                 else
 186                         plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
 187
 188                 if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
 189                                          &plat->rx_queues_cfg[queue].chan))
 190                         plat->rx_queues_cfg[queue].chan = queue;
 191                 /* TODO: Dynamic mapping to be included in the future */
 192
 193                 if (of_property_read_u32(q_node, "snps,priority",
 194                                         &plat->rx_queues_cfg[queue].prio)) {
 195                         plat->rx_queues_cfg[queue].prio = 0;
 196                         plat->rx_queues_cfg[queue].use_prio = false;
 197                 } else {
 198                         plat->rx_queues_cfg[queue].use_prio = true;
 199                 }
 200
 201                 /* RX queue specific packet type routing */
 202                 if (of_property_read_bool(q_node, "snps,route-avcp"))
 203                         plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
 204                 else if (of_property_read_bool(q_node, "snps,route-ptp"))
 205                         plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
 206                 else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
 207                         plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
 208                 else if (of_property_read_bool(q_node, "snps,route-up"))
 209                         plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
 210                 else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
 211                         plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
 212                 else
 213                         plat->rx_queues_cfg[queue].pkt_route = 0x0;
 214
 215                 queue++;
 216         }
 217         if (queue != plat->rx_queues_to_use) {
 218                 ret = -EINVAL;
 219                 dev_err(&pdev->dev, "Not all RX queues were configured\n");
 220                 goto out;
 221         }
 222
 223         /* Processing TX queues common config */
 224         if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
 225                                  &plat->tx_queues_to_use))
 226                 plat->tx_queues_to_use = 1;
 227
 228         if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
 229                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
 230         else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
 231                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
 232         else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
 233                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
 234         else
 235                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
 236
 237         queue = 0;
 238
 239         /* Processing individual TX queue config */
 240         for_each_child_of_node(tx_node, q_node) {
 241                 if (queue >= plat->tx_queues_to_use)
 242                         break;
 243
 244                 if (of_property_read_u32(q_node, "snps,weight",
 245                                          &plat->tx_queues_cfg[queue].weight))
 246                         plat->tx_queues_cfg[queue].weight = 0x10 + queue;
 247
 248                 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
 249                         plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
 250                 } else if (of_property_read_bool(q_node,
 251                                                  "snps,avb-algorithm")) {
 252                         plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
 253
 254                         /* Credit Base Shaper parameters used by AVB */
 255                         if (of_property_read_u32(q_node, "snps,send_slope",
 256                                 &plat->tx_queues_cfg[queue].send_slope))
 257                                 plat->tx_queues_cfg[queue].send_slope = 0x0;
 258                         if (of_property_read_u32(q_node, "snps,idle_slope",
 259                                 &plat->tx_queues_cfg[queue].idle_slope))
 260                                 plat->tx_queues_cfg[queue].idle_slope = 0x0;
 261                         if (of_property_read_u32(q_node, "snps,high_credit",
 262                                 &plat->tx_queues_cfg[queue].high_credit))
 263                                 plat->tx_queues_cfg[queue].high_credit = 0x0;
 264                         if (of_property_read_u32(q_node, "snps,low_credit",
 265                                 &plat->tx_queues_cfg[queue].low_credit))
 266                                 plat->tx_queues_cfg[queue].low_credit = 0x0;
 267                 } else {
 268                         plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
 269                 }
 270
 271                 if (of_property_read_u32(q_node, "snps,priority",
 272                                         &plat->tx_queues_cfg[queue].prio)) {
 273                         plat->tx_queues_cfg[queue].prio = 0;
 274                         plat->tx_queues_cfg[queue].use_prio = false;
 275                 } else {
 276                         plat->tx_queues_cfg[queue].use_prio = true;
 277                 }
 278
 279                 queue++;
 280         }
 281         if (queue != plat->tx_queues_to_use) {
 282                 ret = -EINVAL;
 283                 dev_err(&pdev->dev, "Not all TX queues were configured\n");
 284                 goto out;
 285         }
 286
 287 out:
 288         of_node_put(rx_node);
 289         of_node_put(tx_node);
 290         of_node_put(q_node);
 291
 292         return ret;
 293 }
 294
 295 /**
 296  * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
 297  * @plat: driver data platform structure
 298  * @np: device tree node
 299  * @dev: device pointer
 300  * Description:
 301  * The mdio bus will be allocated in case of a phy transceiver is on board;
 302  * it will be NULL if the fixed-link is configured.
 303  * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
 304  * in any case (for DSA, mdio must be registered even if fixed-link).
 305  * The table below sums the supported configurations:
 306  *      -------------------------------
 307  *      snps,phy-addr   |     Y
 308  *      -------------------------------
 309  *      phy-handle      |     Y
 310  *      -------------------------------
 311  *      fixed-link      |     N
 312  *      -------------------------------
 313  *      snps,dwmac-mdio |
 314  *        even if       |     Y
 315  *      fixed-link      |
 316  *      -------------------------------
 317  *
 318  * It returns 0 in case of success otherwise -ENODEV.
 319  */
 320 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
 321                          struct device_node *np, struct device *dev)
 322 {
 323         bool mdio = !of_phy_is_fixed_link(np);
 324         static const struct of_device_id need_mdio_ids[] = {
 325                 { .compatible = "snps,dwc-qos-ethernet-4.10" },
 326                 {},
 327         };
 328
 329         if (of_match_node(need_mdio_ids, np)) {
 330                 plat->mdio_node = of_get_child_by_name(np, "mdio");
 331         } else {
 332                 /**
 333                  * If snps,dwmac-mdio is passed from DT, always register
 334                  * the MDIO
 335                  */
 336                 for_each_child_of_node(np, plat->mdio_node) {
 337                         if (of_device_is_compatible(plat->mdio_node,
 338                                                     "snps,dwmac-mdio"))
 339                                 break;
 340                 }
 341         }
 342
 343         if (plat->mdio_node) {
 344                 dev_dbg(dev, "Found MDIO subnode\n");
 345                 mdio = true;
 346         }
 347
 348         if (mdio) {
 349                 plat->mdio_bus_data =
 350                         devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
 351                                      GFP_KERNEL);
 352                 if (!plat->mdio_bus_data)
 353                         return -ENOMEM;
 354
 355                 plat->mdio_bus_data->needs_reset = true;
 356         }
 357
 358         return 0;
 359 }
 360
 361 /**
 362  * stmmac_of_get_mac_mode - retrieves the interface of the MAC
 363  * @np: - device-tree node
 364  * Description:
 365  * Similar to `of_get_phy_mode()`, this function will retrieve (from
 366  * the device-tree) the interface mode on the MAC side. This assumes
 367  * that there is mode converter in-between the MAC & PHY
 368  * (e.g. GMII-to-RGMII).
 369  */
 370 static int stmmac_of_get_mac_mode(struct device_node *np)
 371 {
 372         const char *pm;
 373         int err, i;
 374
 375         err = of_property_read_string(np, "mac-mode", &pm);
 376         if (err < 0)
 377                 return err;
 378
 379         for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
 380                 if (!strcasecmp(pm, phy_modes(i)))
 381                         return i;
 382         }
 383
 384         return -ENODEV;
 385 }
 386
 387 /**
 388  * stmmac_probe_config_dt - parse device-tree driver parameters
 389  * @pdev: platform_device structure
 390  * @mac: MAC address to use
 391  * Description:
 392  * this function is to read the driver parameters from device-tree and
 393  * set some private fields that will be used by the main at runtime.
 394  */
 395 struct plat_stmmacenet_data *
 396 stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
 397 {
 398         struct device_node *np = pdev->dev.of_node;
 399         struct plat_stmmacenet_data *plat;
 400         struct stmmac_dma_cfg *dma_cfg;
 401         int phy_mode;
 402         void *ret;
 403         int rc;
 404
 405         plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
 406         if (!plat)
 407                 return ERR_PTR(-ENOMEM);
 408
 409         rc = of_get_mac_address(np, mac);
 410         if (rc) {
 411                 if (rc == -EPROBE_DEFER)
 412                         return ERR_PTR(rc);
 413
 414                 eth_zero_addr(mac);
 415         }
 416
 417         phy_mode = device_get_phy_mode(&pdev->dev);
 418         if (phy_mode < 0)
 419                 return ERR_PTR(phy_mode);
 420
 421         plat->phy_interface = phy_mode;
 422         plat->interface = stmmac_of_get_mac_mode(np);
 423         if (plat->interface < 0)
 424                 plat->interface = plat->phy_interface;
 425
 426         /* Some wrapper drivers still rely on phy_node. Let's save it while
 427          * they are not converted to phylink. */
 428         plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
 429
 430         /* PHYLINK automatically parses the phy-handle property */
 431         plat->phylink_node = np;
 432
 433         /* Get max speed of operation from device tree */
 434         of_property_read_u32(np, "max-speed", &plat->max_speed);
 435
 436         plat->bus_id = of_alias_get_id(np, "ethernet");
 437         if (plat->bus_id < 0)
 438                 plat->bus_id = 0;
 439
 440         /* Default to phy auto-detection */
 441         plat->phy_addr = -1;
 442
 443         /* Default to get clk_csr from stmmac_clk_csr_set(),
 444          * or get clk_csr from device tree.
 445          */
 446         plat->clk_csr = -1;
 447         if (of_property_read_u32(np, "snps,clk-csr", &plat->clk_csr))
 448                 of_property_read_u32(np, "clk_csr", &plat->clk_csr);
 449
 450         /* "snps,phy-addr" is not a standard property. Mark it as deprecated
 451          * and warn of its use. Remove this when phy node support is added.
 452          */
 453         if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
 454                 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
 455
 456         /* To Configure PHY by using all device-tree supported properties */
 457         rc = stmmac_dt_phy(plat, np, &pdev->dev);
 458         if (rc)
 459                 return ERR_PTR(rc);
 460
 461         of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
 462
 463         of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
 464
 465         plat->force_sf_dma_mode =
 466                 of_property_read_bool(np, "snps,force_sf_dma_mode");
 467
 468         plat->en_tx_lpi_clockgating =
 469                 of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
 470
 471         /* Set the maxmtu to a default of JUMBO_LEN in case the
 472          * parameter is not present in the device tree.
 473          */
 474         plat->maxmtu = JUMBO_LEN;
 475
 476         /* Set default value for multicast hash bins */
 477         plat->multicast_filter_bins = HASH_TABLE_SIZE;
 478
 479         /* Set default value for unicast filter entries */
 480         plat->unicast_filter_entries = 1;
 481
 482         /*
 483          * Currently only the properties needed on SPEAr600
 484          * are provided. All other properties should be added
 485          * once needed on other platforms.
 486          */
 487         if (of_device_is_compatible(np, "st,spear600-gmac") ||
 488                 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
 489                 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
 490                 of_device_is_compatible(np, "snps,dwmac")) {
 491                 /* Note that the max-frame-size parameter as defined in the
 492                  * ePAPR v1.1 spec is defined as max-frame-size, it's
 493                  * actually used as the IEEE definition of MAC Client
 494                  * data, or MTU. The ePAPR specification is confusing as
 495                  * the definition is max-frame-size, but usage examples
 496                  * are clearly MTUs
 497                  */
 498                 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
 499                 of_property_read_u32(np, "snps,multicast-filter-bins",
 500                                      &plat->multicast_filter_bins);
 501                 of_property_read_u32(np, "snps,perfect-filter-entries",
 502                                      &plat->unicast_filter_entries);
 503                 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
 504                                 &pdev->dev, plat->unicast_filter_entries);
 505                 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
 506                                 &pdev->dev, plat->multicast_filter_bins);
 507                 plat->has_gmac = 1;
 508                 plat->pmt = 1;
 509         }
 510
 511         if (of_device_is_compatible(np, "snps,dwmac-3.40a")) {
 512                 plat->has_gmac = 1;
 513                 plat->enh_desc = 1;
 514                 plat->tx_coe = 1;
 515                 plat->bugged_jumbo = 1;
 516                 plat->pmt = 1;
 517         }
 518
 519         if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
 520             of_device_is_compatible(np, "snps,dwmac-4.10a") ||
 521             of_device_is_compatible(np, "snps,dwmac-4.20a") ||
 522             of_device_is_compatible(np, "snps,dwmac-5.10a") ||
 523             of_device_is_compatible(np, "snps,dwmac-5.20")) {
 524                 plat->has_gmac4 = 1;
 525                 plat->has_gmac = 0;
 526                 plat->pmt = 1;
 527                 plat->tso_en = of_property_read_bool(np, "snps,tso");
 528         }
 529
 530         if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
 531                 of_device_is_compatible(np, "snps,dwmac-3.710")) {
 532                 plat->enh_desc = 1;
 533                 plat->bugged_jumbo = 1;
 534                 plat->force_sf_dma_mode = 1;
 535         }
 536
 537         if (of_device_is_compatible(np, "snps,dwxgmac")) {
 538                 plat->has_xgmac = 1;
 539                 plat->pmt = 1;
 540                 plat->tso_en = of_property_read_bool(np, "snps,tso");
 541         }
 542
 543         dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
 544                                GFP_KERNEL);
 545         if (!dma_cfg) {
 546                 stmmac_remove_config_dt(pdev, plat);
 547                 return ERR_PTR(-ENOMEM);
 548         }
 549         plat->dma_cfg = dma_cfg;
 550
 551         of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
 552         if (!dma_cfg->pbl)
 553                 dma_cfg->pbl = DEFAULT_DMA_PBL;
 554         of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
 555         of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
 556         dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
 557
 558         dma_cfg->aal = of_property_read_bool(np, "snps,aal");
 559         dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
 560         dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
 561
 562         plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
 563         if (plat->force_thresh_dma_mode && plat->force_sf_dma_mode) {
 564                 plat->force_sf_dma_mode = 0;
 565                 dev_warn(&pdev->dev,
 566                          "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
 567         }
 568
 569         of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
 570
 571         plat->axi = stmmac_axi_setup(pdev);
 572
 573         rc = stmmac_mtl_setup(pdev, plat);
 574         if (rc) {
 575                 stmmac_remove_config_dt(pdev, plat);
 576                 return ERR_PTR(rc);
 577         }
 578
 579         /* clock setup */
 580         if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
 581                 plat->stmmac_clk = devm_clk_get(&pdev->dev,
 582                                                 STMMAC_RESOURCE_NAME);
 583                 if (IS_ERR(plat->stmmac_clk)) {
 584                         dev_warn(&pdev->dev, "Cannot get CSR clock\n");
 585                         plat->stmmac_clk = NULL;
 586                 }
 587                 clk_prepare_enable(plat->stmmac_clk);
 588         }
 589
 590         plat->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
 591         if (IS_ERR(plat->pclk)) {
 592                 ret = plat->pclk;
 593                 goto error_pclk_get;
 594         }
 595         clk_prepare_enable(plat->pclk);
 596
 597         /* Fall-back to main clock in case of no PTP ref is passed */
 598         plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
 599         if (IS_ERR(plat->clk_ptp_ref)) {
 600                 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
 601                 plat->clk_ptp_ref = NULL;
 602                 dev_info(&pdev->dev, "PTP uses main clock\n");
 603         } else {
 604                 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
 605                 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
 606         }
 607
 608         plat->stmmac_rst = devm_reset_control_get_optional(&pdev->dev,
 609                                                            STMMAC_RESOURCE_NAME);
 610         if (IS_ERR(plat->stmmac_rst)) {
 611                 ret = plat->stmmac_rst;
 612                 goto error_hw_init;
 613         }
 614
 615         plat->stmmac_ahb_rst = devm_reset_control_get_optional_shared(
 616                                                         &pdev->dev, "ahb");
 617         if (IS_ERR(plat->stmmac_ahb_rst)) {
 618                 ret = plat->stmmac_ahb_rst;
 619                 goto error_hw_init;
 620         }
 621
 622         return plat;
 623
 624 error_hw_init:
 625         clk_disable_unprepare(plat->pclk);
 626 error_pclk_get:
 627         clk_disable_unprepare(plat->stmmac_clk);
 628
 629         return ret;
 630 }
 631
 632 /**
 633  * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
 634  * @pdev: platform_device structure
 635  * @plat: driver data platform structure
 636  *
 637  * Release resources claimed by stmmac_probe_config_dt().
 638  */
 639 void stmmac_remove_config_dt(struct platform_device *pdev,
 640                              struct plat_stmmacenet_data *plat)
 641 {
 642         clk_disable_unprepare(plat->stmmac_clk);
 643         clk_disable_unprepare(plat->pclk);
 644         of_node_put(plat->phy_node);
 645         of_node_put(plat->mdio_node);
 646 }
 647 #else
 648 struct plat_stmmacenet_data *
 649 stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
 650 {
 651         return ERR_PTR(-EINVAL);
 652 }
 653
 654 void stmmac_remove_config_dt(struct platform_device *pdev,
 655                              struct plat_stmmacenet_data *plat)
 656 {
 657 }
 658 #endif /* CONFIG_OF */
 659 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
 660 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
 661
 662 int stmmac_get_platform_resources(struct platform_device *pdev,
 663                                   struct stmmac_resources *stmmac_res)
 664 {
 665         memset(stmmac_res, 0, sizeof(*stmmac_res));
 666
 667         /* Get IRQ information early to have an ability to ask for deferred
 668          * probe if needed before we went too far with resource allocation.
 669          */
 670         stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
 671         if (stmmac_res->irq < 0)
 672                 return stmmac_res->irq;
 673
 674         /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
 675          * The external wake up irq can be passed through the platform code
 676          * named as "eth_wake_irq"
 677          *
 678          * In case the wake up interrupt is not passed from the platform
 679          * so the driver will continue to use the mac irq (ndev->irq)
 680          */
 681         stmmac_res->wol_irq =
 682                 platform_get_irq_byname_optional(pdev, "eth_wake_irq");
 683         if (stmmac_res->wol_irq < 0) {
 684                 if (stmmac_res->wol_irq == -EPROBE_DEFER)
 685                         return -EPROBE_DEFER;
 686                 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n");
 687                 stmmac_res->wol_irq = stmmac_res->irq;
 688         }
 689
 690         stmmac_res->lpi_irq =
 691                 platform_get_irq_byname_optional(pdev, "eth_lpi");
 692         if (stmmac_res->lpi_irq < 0) {
 693                 if (stmmac_res->lpi_irq == -EPROBE_DEFER)
 694                         return -EPROBE_DEFER;
 695                 dev_info(&pdev->dev, "IRQ eth_lpi not found\n");
 696         }
 697
 698         stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
 699
 700         return PTR_ERR_OR_ZERO(stmmac_res->addr);
 701 }
 702 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
 703
 704 /**
 705  * stmmac_pltfr_init
 706  * @pdev: pointer to the platform device
 707  * @plat: driver data platform structure
 708  * Description: Call the platform's init callback (if any) and propagate
 709  * the return value.
 710  */
 711 int stmmac_pltfr_init(struct platform_device *pdev,
 712                       struct plat_stmmacenet_data *plat)
 713 {
 714         int ret = 0;
 715
 716         if (plat->init)
 717                 ret = plat->init(pdev, plat->bsp_priv);
 718
 719         return ret;
 720 }
 721 EXPORT_SYMBOL_GPL(stmmac_pltfr_init);
 722
 723 /**
 724  * stmmac_pltfr_remove
 725  * @pdev: platform device pointer
 726  * Description: this function calls the main to free the net resources
 727  * and calls the platforms hook and release the resources (e.g. mem).
 728  */
 729 void stmmac_pltfr_remove(struct platform_device *pdev)
 730 {
 731         struct net_device *ndev = platform_get_drvdata(pdev);
 732         struct stmmac_priv *priv = netdev_priv(ndev);
 733         struct plat_stmmacenet_data *plat = priv->plat;
 734
 735         stmmac_dvr_remove(&pdev->dev);
 736
 737         if (plat->exit)
 738                 plat->exit(pdev, plat->bsp_priv);
 739
 740         stmmac_remove_config_dt(pdev, plat);
 741 }
 742 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
 743
 744 /**
 745  * stmmac_pltfr_suspend
 746  * @dev: device pointer
 747  * Description: this function is invoked when suspend the driver and it direcly
 748  * call the main suspend function and then, if required, on some platform, it
 749  * can call an exit helper.
 750  */
 751 static int __maybe_unused stmmac_pltfr_suspend(struct device *dev)
 752 {
 753         int ret;
 754         struct net_device *ndev = dev_get_drvdata(dev);
 755         struct stmmac_priv *priv = netdev_priv(ndev);
 756         struct platform_device *pdev = to_platform_device(dev);
 757
 758         ret = stmmac_suspend(dev);
 759         if (priv->plat->exit)
 760                 priv->plat->exit(pdev, priv->plat->bsp_priv);
 761
 762         return ret;
 763 }
 764
 765 /**
 766  * stmmac_pltfr_resume
 767  * @dev: device pointer
 768  * Description: this function is invoked when resume the driver before calling
 769  * the main resume function, on some platforms, it can call own init helper
 770  * if required.
 771  */
 772 static int __maybe_unused stmmac_pltfr_resume(struct device *dev)
 773 {
 774         struct net_device *ndev = dev_get_drvdata(dev);
 775         struct stmmac_priv *priv = netdev_priv(ndev);
 776         struct platform_device *pdev = to_platform_device(dev);
 777         int ret;
 778
 779         ret = stmmac_pltfr_init(pdev, priv->plat->bsp_priv);
 780         if (ret)
 781                 return ret;
 782
 783         return stmmac_resume(dev);
 784 }
 785
 786 static int __maybe_unused stmmac_runtime_suspend(struct device *dev)
 787 {
 788         struct net_device *ndev = dev_get_drvdata(dev);
 789         struct stmmac_priv *priv = netdev_priv(ndev);
 790
 791         stmmac_bus_clks_config(priv, false);
 792
 793         return 0;
 794 }
 795
 796 static int __maybe_unused stmmac_runtime_resume(struct device *dev)
 797 {
 798         struct net_device *ndev = dev_get_drvdata(dev);
 799         struct stmmac_priv *priv = netdev_priv(ndev);
 800
 801         return stmmac_bus_clks_config(priv, true);
 802 }
 803
 804 static int __maybe_unused stmmac_pltfr_noirq_suspend(struct device *dev)
 805 {
 806         struct net_device *ndev = dev_get_drvdata(dev);
 807         struct stmmac_priv *priv = netdev_priv(ndev);
 808         int ret;
 809
 810         if (!netif_running(ndev))
 811                 return 0;
 812
 813         if (!device_may_wakeup(priv->device) || !priv->plat->pmt) {
 814                 /* Disable clock in case of PWM is off */
 815                 clk_disable_unprepare(priv->plat->clk_ptp_ref);
 816
 817                 ret = pm_runtime_force_suspend(dev);
 818                 if (ret)
 819                         return ret;
 820         }
 821
 822         return 0;
 823 }
 824
 825 static int __maybe_unused stmmac_pltfr_noirq_resume(struct device *dev)
 826 {
 827         struct net_device *ndev = dev_get_drvdata(dev);
 828         struct stmmac_priv *priv = netdev_priv(ndev);
 829         int ret;
 830
 831         if (!netif_running(ndev))
 832                 return 0;
 833
 834         if (!device_may_wakeup(priv->device) || !priv->plat->pmt) {
 835                 /* enable the clk previously disabled */
 836                 ret = pm_runtime_force_resume(dev);
 837                 if (ret)
 838                         return ret;
 839
 840                 ret = clk_prepare_enable(priv->plat->clk_ptp_ref);
 841                 if (ret < 0) {
 842                         netdev_warn(priv->dev,
 843                                     "failed to enable PTP reference clock: %pe\n",
 844                                     ERR_PTR(ret));
 845                         return ret;
 846                 }
 847         }
 848
 849         return 0;
 850 }
 851
 852 const struct dev_pm_ops stmmac_pltfr_pm_ops = {
 853         SET_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_suspend, stmmac_pltfr_resume)
 854         SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL)
 855         SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_noirq_suspend, stmmac_pltfr_noirq_resume)
 856 };
 857 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
 858
 859 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
 860 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
 861 MODULE_LICENSE("GPL");