1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3 This contains the functions to handle the platform driver.
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
11 #include <linux/platform_device.h>
12 #include <linux/module.h>
15 #include <linux/of_net.h>
16 #include <linux/of_device.h>
17 #include <linux/of_mdio.h>
20 #include "stmmac_platform.h"
25 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
26 * @dev: struct device of the platform device
27 * @mcast_bins: Multicast filtering bins
29 * this function validates the number of Multicast filtering bins specified
30 * by the configuration through the device tree. The Synopsys GMAC supports
31 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
32 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
33 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
34 * invalid and will cause the filtering algorithm to use Multicast
37 static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)
48 dev_info(dev, "Hash table entries set to unexpected value %d\n",
56 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
57 * @dev: struct device of the platform device
58 * @ucast_entries: number of Unicast address entries
60 * This function validates the number of Unicast address entries supported
61 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
62 * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
63 * logic. This function validates a valid, supported configuration is
64 * selected, and defaults to 1 Unicast address if an unsupported
65 * configuration is selected.
67 static int dwmac1000_validate_ucast_entries(struct device *dev,
70 int x = ucast_entries;
79 dev_info(dev, "Unicast table entries set to unexpected value %d\n",
87 * stmmac_axi_setup - parse DT parameters for programming the AXI register
88 * @pdev: platform device
90 * if required, from device-tree the AXI internal register can be tuned
91 * by using platform parameters.
93 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
95 struct device_node *np;
96 struct stmmac_axi *axi;
98 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
102 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
105 return ERR_PTR(-ENOMEM);
108 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
109 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
110 axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
111 axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
112 axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
113 axi->axi_rb = of_property_read_bool(np, "snps,axi_rb");
115 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
116 axi->axi_wr_osr_lmt = 1;
117 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
118 axi->axi_rd_osr_lmt = 1;
119 of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
126 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
127 * @pdev: platform device
130 static int stmmac_mtl_setup(struct platform_device *pdev,
131 struct plat_stmmacenet_data *plat)
133 struct device_node *q_node;
134 struct device_node *rx_node;
135 struct device_node *tx_node;
139 /* For backwards-compatibility with device trees that don't have any
140 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
141 * to one RX and TX queues each.
143 plat->rx_queues_to_use = 1;
144 plat->tx_queues_to_use = 1;
146 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
147 * to always set this, otherwise Queue will be classified as AVB
148 * (because MTL_QUEUE_AVB = 0).
150 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
151 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
153 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
157 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
159 of_node_put(rx_node);
163 /* Processing RX queues common config */
164 if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
165 &plat->rx_queues_to_use))
166 plat->rx_queues_to_use = 1;
168 if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
169 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
170 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
171 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
173 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
175 /* Processing individual RX queue config */
176 for_each_child_of_node(rx_node, q_node) {
177 if (queue >= plat->rx_queues_to_use)
180 if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
181 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
182 else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
183 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
185 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
187 if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
188 &plat->rx_queues_cfg[queue].chan))
189 plat->rx_queues_cfg[queue].chan = queue;
190 /* TODO: Dynamic mapping to be included in the future */
192 if (of_property_read_u32(q_node, "snps,priority",
193 &plat->rx_queues_cfg[queue].prio)) {
194 plat->rx_queues_cfg[queue].prio = 0;
195 plat->rx_queues_cfg[queue].use_prio = false;
197 plat->rx_queues_cfg[queue].use_prio = true;
200 /* RX queue specific packet type routing */
201 if (of_property_read_bool(q_node, "snps,route-avcp"))
202 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
203 else if (of_property_read_bool(q_node, "snps,route-ptp"))
204 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
205 else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
206 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
207 else if (of_property_read_bool(q_node, "snps,route-up"))
208 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
209 else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
210 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
212 plat->rx_queues_cfg[queue].pkt_route = 0x0;
216 if (queue != plat->rx_queues_to_use) {
218 dev_err(&pdev->dev, "Not all RX queues were configured\n");
222 /* Processing TX queues common config */
223 if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
224 &plat->tx_queues_to_use))
225 plat->tx_queues_to_use = 1;
227 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
228 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
229 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
230 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
231 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
232 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
234 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
238 /* Processing individual TX queue config */
239 for_each_child_of_node(tx_node, q_node) {
240 if (queue >= plat->tx_queues_to_use)
243 if (of_property_read_u32(q_node, "snps,weight",
244 &plat->tx_queues_cfg[queue].weight))
245 plat->tx_queues_cfg[queue].weight = 0x10 + queue;
247 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
248 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
249 } else if (of_property_read_bool(q_node,
250 "snps,avb-algorithm")) {
251 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
253 /* Credit Base Shaper parameters used by AVB */
254 if (of_property_read_u32(q_node, "snps,send_slope",
255 &plat->tx_queues_cfg[queue].send_slope))
256 plat->tx_queues_cfg[queue].send_slope = 0x0;
257 if (of_property_read_u32(q_node, "snps,idle_slope",
258 &plat->tx_queues_cfg[queue].idle_slope))
259 plat->tx_queues_cfg[queue].idle_slope = 0x0;
260 if (of_property_read_u32(q_node, "snps,high_credit",
261 &plat->tx_queues_cfg[queue].high_credit))
262 plat->tx_queues_cfg[queue].high_credit = 0x0;
263 if (of_property_read_u32(q_node, "snps,low_credit",
264 &plat->tx_queues_cfg[queue].low_credit))
265 plat->tx_queues_cfg[queue].low_credit = 0x0;
267 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
270 if (of_property_read_u32(q_node, "snps,priority",
271 &plat->tx_queues_cfg[queue].prio)) {
272 plat->tx_queues_cfg[queue].prio = 0;
273 plat->tx_queues_cfg[queue].use_prio = false;
275 plat->tx_queues_cfg[queue].use_prio = true;
280 if (queue != plat->tx_queues_to_use) {
282 dev_err(&pdev->dev, "Not all TX queues were configured\n");
287 of_node_put(rx_node);
288 of_node_put(tx_node);
295 * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
296 * @plat: driver data platform structure
297 * @np: device tree node
298 * @dev: device pointer
300 * The mdio bus will be allocated in case of a phy transceiver is on board;
301 * it will be NULL if the fixed-link is configured.
302 * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
303 * in any case (for DSA, mdio must be registered even if fixed-link).
304 * The table below sums the supported configurations:
305 * -------------------------------
307 * -------------------------------
309 * -------------------------------
311 * -------------------------------
315 * -------------------------------
317 * It returns 0 in case of success otherwise -ENODEV.
319 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
320 struct device_node *np, struct device *dev)
322 bool mdio = !of_phy_is_fixed_link(np);
323 static const struct of_device_id need_mdio_ids[] = {
324 { .compatible = "snps,dwc-qos-ethernet-4.10" },
328 if (of_match_node(need_mdio_ids, np)) {
329 plat->mdio_node = of_get_child_by_name(np, "mdio");
332 * If snps,dwmac-mdio is passed from DT, always register
335 for_each_child_of_node(np, plat->mdio_node) {
336 if (of_device_is_compatible(plat->mdio_node,
342 if (plat->mdio_node) {
343 dev_dbg(dev, "Found MDIO subnode\n");
348 plat->mdio_bus_data =
349 devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
351 if (!plat->mdio_bus_data)
354 plat->mdio_bus_data->needs_reset = true;
361 * stmmac_of_get_mac_mode - retrieves the interface of the MAC
362 * @np: - device-tree node
364 * Similar to `of_get_phy_mode()`, this function will retrieve (from
365 * the device-tree) the interface mode on the MAC side. This assumes
366 * that there is mode converter in-between the MAC & PHY
367 * (e.g. GMII-to-RGMII).
369 static int stmmac_of_get_mac_mode(struct device_node *np)
374 err = of_property_read_string(np, "mac-mode", &pm);
378 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
379 if (!strcasecmp(pm, phy_modes(i)))
387 * stmmac_probe_config_dt - parse device-tree driver parameters
388 * @pdev: platform_device structure
389 * @mac: MAC address to use
391 * this function is to read the driver parameters from device-tree and
392 * set some private fields that will be used by the main at runtime.
394 struct plat_stmmacenet_data *
395 stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
397 struct device_node *np = pdev->dev.of_node;
398 struct plat_stmmacenet_data *plat;
399 struct stmmac_dma_cfg *dma_cfg;
403 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
405 return ERR_PTR(-ENOMEM);
407 rc = of_get_mac_address(np, mac);
409 if (rc == -EPROBE_DEFER)
415 plat->phy_interface = device_get_phy_mode(&pdev->dev);
416 if (plat->phy_interface < 0)
417 return ERR_PTR(plat->phy_interface);
419 plat->interface = stmmac_of_get_mac_mode(np);
420 if (plat->interface < 0)
421 plat->interface = plat->phy_interface;
423 /* Some wrapper drivers still rely on phy_node. Let's save it while
424 * they are not converted to phylink. */
425 plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
427 /* PHYLINK automatically parses the phy-handle property */
428 plat->phylink_node = np;
430 /* Get max speed of operation from device tree */
431 if (of_property_read_u32(np, "max-speed", &plat->max_speed))
432 plat->max_speed = -1;
434 plat->bus_id = of_alias_get_id(np, "ethernet");
435 if (plat->bus_id < 0)
438 /* Default to phy auto-detection */
441 /* Default to get clk_csr from stmmac_clk_crs_set(),
442 * or get clk_csr from device tree.
445 of_property_read_u32(np, "clk_csr", &plat->clk_csr);
447 /* "snps,phy-addr" is not a standard property. Mark it as deprecated
448 * and warn of its use. Remove this when phy node support is added.
450 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
451 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
453 /* To Configure PHY by using all device-tree supported properties */
454 rc = stmmac_dt_phy(plat, np, &pdev->dev);
458 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
460 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
462 plat->force_sf_dma_mode =
463 of_property_read_bool(np, "snps,force_sf_dma_mode");
465 plat->en_tx_lpi_clockgating =
466 of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
468 /* Set the maxmtu to a default of JUMBO_LEN in case the
469 * parameter is not present in the device tree.
471 plat->maxmtu = JUMBO_LEN;
473 /* Set default value for multicast hash bins */
474 plat->multicast_filter_bins = HASH_TABLE_SIZE;
476 /* Set default value for unicast filter entries */
477 plat->unicast_filter_entries = 1;
480 * Currently only the properties needed on SPEAr600
481 * are provided. All other properties should be added
482 * once needed on other platforms.
484 if (of_device_is_compatible(np, "st,spear600-gmac") ||
485 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
486 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
487 of_device_is_compatible(np, "snps,dwmac")) {
488 /* Note that the max-frame-size parameter as defined in the
489 * ePAPR v1.1 spec is defined as max-frame-size, it's
490 * actually used as the IEEE definition of MAC Client
491 * data, or MTU. The ePAPR specification is confusing as
492 * the definition is max-frame-size, but usage examples
495 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
496 of_property_read_u32(np, "snps,multicast-filter-bins",
497 &plat->multicast_filter_bins);
498 of_property_read_u32(np, "snps,perfect-filter-entries",
499 &plat->unicast_filter_entries);
500 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
501 &pdev->dev, plat->unicast_filter_entries);
502 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
503 &pdev->dev, plat->multicast_filter_bins);
508 if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
509 of_device_is_compatible(np, "snps,dwmac-4.10a") ||
510 of_device_is_compatible(np, "snps,dwmac-4.20a") ||
511 of_device_is_compatible(np, "snps,dwmac-5.10a")) {
515 plat->tso_en = of_property_read_bool(np, "snps,tso");
518 if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
519 of_device_is_compatible(np, "snps,dwmac-3.710")) {
521 plat->bugged_jumbo = 1;
522 plat->force_sf_dma_mode = 1;
525 if (of_device_is_compatible(np, "snps,dwxgmac")) {
528 plat->tso_en = of_property_read_bool(np, "snps,tso");
531 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
534 stmmac_remove_config_dt(pdev, plat);
535 return ERR_PTR(-ENOMEM);
537 plat->dma_cfg = dma_cfg;
539 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
541 dma_cfg->pbl = DEFAULT_DMA_PBL;
542 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
543 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
544 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
546 dma_cfg->aal = of_property_read_bool(np, "snps,aal");
547 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
548 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
550 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
551 if (plat->force_thresh_dma_mode) {
552 plat->force_sf_dma_mode = 0;
554 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
557 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
559 plat->axi = stmmac_axi_setup(pdev);
561 rc = stmmac_mtl_setup(pdev, plat);
563 stmmac_remove_config_dt(pdev, plat);
568 if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
569 plat->stmmac_clk = devm_clk_get(&pdev->dev,
570 STMMAC_RESOURCE_NAME);
571 if (IS_ERR(plat->stmmac_clk)) {
572 dev_warn(&pdev->dev, "Cannot get CSR clock\n");
573 plat->stmmac_clk = NULL;
575 clk_prepare_enable(plat->stmmac_clk);
578 plat->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
579 if (IS_ERR(plat->pclk)) {
583 clk_prepare_enable(plat->pclk);
585 /* Fall-back to main clock in case of no PTP ref is passed */
586 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
587 if (IS_ERR(plat->clk_ptp_ref)) {
588 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
589 plat->clk_ptp_ref = NULL;
590 dev_info(&pdev->dev, "PTP uses main clock\n");
592 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
593 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
596 plat->stmmac_rst = devm_reset_control_get_optional(&pdev->dev,
597 STMMAC_RESOURCE_NAME);
598 if (IS_ERR(plat->stmmac_rst)) {
599 ret = plat->stmmac_rst;
603 plat->stmmac_ahb_rst = devm_reset_control_get_optional_shared(
605 if (IS_ERR(plat->stmmac_ahb_rst)) {
606 ret = plat->stmmac_ahb_rst;
613 clk_disable_unprepare(plat->pclk);
615 clk_disable_unprepare(plat->stmmac_clk);
621 * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
622 * @pdev: platform_device structure
623 * @plat: driver data platform structure
625 * Release resources claimed by stmmac_probe_config_dt().
627 void stmmac_remove_config_dt(struct platform_device *pdev,
628 struct plat_stmmacenet_data *plat)
630 clk_disable_unprepare(plat->stmmac_clk);
631 clk_disable_unprepare(plat->pclk);
632 of_node_put(plat->phy_node);
633 of_node_put(plat->mdio_node);
636 struct plat_stmmacenet_data *
637 stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
639 return ERR_PTR(-EINVAL);
642 void stmmac_remove_config_dt(struct platform_device *pdev,
643 struct plat_stmmacenet_data *plat)
646 #endif /* CONFIG_OF */
647 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
648 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
650 int stmmac_get_platform_resources(struct platform_device *pdev,
651 struct stmmac_resources *stmmac_res)
653 memset(stmmac_res, 0, sizeof(*stmmac_res));
655 /* Get IRQ information early to have an ability to ask for deferred
656 * probe if needed before we went too far with resource allocation.
658 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
659 if (stmmac_res->irq < 0)
660 return stmmac_res->irq;
662 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
663 * The external wake up irq can be passed through the platform code
664 * named as "eth_wake_irq"
666 * In case the wake up interrupt is not passed from the platform
667 * so the driver will continue to use the mac irq (ndev->irq)
669 stmmac_res->wol_irq =
670 platform_get_irq_byname_optional(pdev, "eth_wake_irq");
671 if (stmmac_res->wol_irq < 0) {
672 if (stmmac_res->wol_irq == -EPROBE_DEFER)
673 return -EPROBE_DEFER;
674 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n");
675 stmmac_res->wol_irq = stmmac_res->irq;
678 stmmac_res->lpi_irq =
679 platform_get_irq_byname_optional(pdev, "eth_lpi");
680 if (stmmac_res->lpi_irq < 0) {
681 if (stmmac_res->lpi_irq == -EPROBE_DEFER)
682 return -EPROBE_DEFER;
683 dev_info(&pdev->dev, "IRQ eth_lpi not found\n");
686 stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
688 return PTR_ERR_OR_ZERO(stmmac_res->addr);
690 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
693 * stmmac_pltfr_remove
694 * @pdev: platform device pointer
695 * Description: this function calls the main to free the net resources
696 * and calls the platforms hook and release the resources (e.g. mem).
698 int stmmac_pltfr_remove(struct platform_device *pdev)
700 struct net_device *ndev = platform_get_drvdata(pdev);
701 struct stmmac_priv *priv = netdev_priv(ndev);
702 struct plat_stmmacenet_data *plat = priv->plat;
703 int ret = stmmac_dvr_remove(&pdev->dev);
706 plat->exit(pdev, plat->bsp_priv);
708 stmmac_remove_config_dt(pdev, plat);
712 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
715 * stmmac_pltfr_suspend
716 * @dev: device pointer
717 * Description: this function is invoked when suspend the driver and it direcly
718 * call the main suspend function and then, if required, on some platform, it
719 * can call an exit helper.
721 static int __maybe_unused stmmac_pltfr_suspend(struct device *dev)
724 struct net_device *ndev = dev_get_drvdata(dev);
725 struct stmmac_priv *priv = netdev_priv(ndev);
726 struct platform_device *pdev = to_platform_device(dev);
728 ret = stmmac_suspend(dev);
729 if (priv->plat->exit)
730 priv->plat->exit(pdev, priv->plat->bsp_priv);
736 * stmmac_pltfr_resume
737 * @dev: device pointer
738 * Description: this function is invoked when resume the driver before calling
739 * the main resume function, on some platforms, it can call own init helper
742 static int __maybe_unused stmmac_pltfr_resume(struct device *dev)
744 struct net_device *ndev = dev_get_drvdata(dev);
745 struct stmmac_priv *priv = netdev_priv(ndev);
746 struct platform_device *pdev = to_platform_device(dev);
748 if (priv->plat->init)
749 priv->plat->init(pdev, priv->plat->bsp_priv);
751 return stmmac_resume(dev);
754 static int __maybe_unused stmmac_runtime_suspend(struct device *dev)
756 struct net_device *ndev = dev_get_drvdata(dev);
757 struct stmmac_priv *priv = netdev_priv(ndev);
759 stmmac_bus_clks_config(priv, false);
764 static int __maybe_unused stmmac_runtime_resume(struct device *dev)
766 struct net_device *ndev = dev_get_drvdata(dev);
767 struct stmmac_priv *priv = netdev_priv(ndev);
769 return stmmac_bus_clks_config(priv, true);
772 const struct dev_pm_ops stmmac_pltfr_pm_ops = {
773 SET_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_suspend, stmmac_pltfr_resume)
774 SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL)
776 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
778 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
779 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
780 MODULE_LICENSE("GPL");