1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 ***************************************************************************
20 * Rewritten, heavily based on smsc911x simple driver by SMSC.
21 * Partly uses io macros from smc91x.c by Nicolas Pitre
24 * LAN9115, LAN9116, LAN9117, LAN9118
25 * LAN9215, LAN9216, LAN9217, LAN9218
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/crc32.h>
35 #include <linux/clk.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
64 #define SMSC_CHIPNAME "smsc911x"
65 #define SMSC_MDIONAME "smsc911x-mdio"
66 #define SMSC_DRV_VERSION "2008-10-21"
68 MODULE_LICENSE("GPL");
69 MODULE_VERSION(SMSC_DRV_VERSION);
70 MODULE_ALIAS("platform:smsc911x");
73 static int debug = 16;
78 module_param(debug, int, 0);
79 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
84 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
85 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
86 void (*rx_readfifo)(struct smsc911x_data *pdata,
87 unsigned int *buf, unsigned int wordcount);
88 void (*tx_writefifo)(struct smsc911x_data *pdata,
89 unsigned int *buf, unsigned int wordcount);
92 #define SMSC911X_NUM_SUPPLIES 2
94 struct smsc911x_data {
99 /* used to decide which workarounds apply */
100 unsigned int generation;
102 /* device configuration (copied from platform_data during probe) */
103 struct smsc911x_platform_config config;
105 /* This needs to be acquired before calling any of below:
106 * smsc911x_mac_read(), smsc911x_mac_write()
110 /* spinlock to ensure register accesses are serialised */
113 struct phy_device *phy_dev;
114 struct mii_bus *mii_bus;
115 int phy_irq[PHY_MAX_ADDR];
116 unsigned int using_extphy;
121 unsigned int gpio_setting;
122 unsigned int gpio_orig_setting;
123 struct net_device *dev;
124 struct napi_struct napi;
126 unsigned int software_irq_signal;
128 #ifdef USE_PHY_WORK_AROUND
129 #define MIN_PACKET_SIZE (64)
130 char loopback_tx_pkt[MIN_PACKET_SIZE];
131 char loopback_rx_pkt[MIN_PACKET_SIZE];
132 unsigned int resetcount;
135 /* Members for Multicast filter workaround */
136 unsigned int multicast_update_pending;
137 unsigned int set_bits_mask;
138 unsigned int clear_bits_mask;
142 /* register access functions */
143 const struct smsc911x_ops *ops;
146 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
152 /* Easy access to information */
153 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
155 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
157 if (pdata->config.flags & SMSC911X_USE_32BIT)
158 return readl(pdata->ioaddr + reg);
160 if (pdata->config.flags & SMSC911X_USE_16BIT)
161 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
162 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
169 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
171 if (pdata->config.flags & SMSC911X_USE_32BIT)
172 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
174 if (pdata->config.flags & SMSC911X_USE_16BIT)
175 return (readw(pdata->ioaddr +
176 __smsc_shift(pdata, reg)) & 0xFFFF) |
177 ((readw(pdata->ioaddr +
178 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
184 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
189 spin_lock_irqsave(&pdata->dev_lock, flags);
190 data = pdata->ops->reg_read(pdata, reg);
191 spin_unlock_irqrestore(&pdata->dev_lock, flags);
196 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
199 if (pdata->config.flags & SMSC911X_USE_32BIT) {
200 writel(val, pdata->ioaddr + reg);
204 if (pdata->config.flags & SMSC911X_USE_16BIT) {
205 writew(val & 0xFFFF, pdata->ioaddr + reg);
206 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
214 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
216 if (pdata->config.flags & SMSC911X_USE_32BIT) {
217 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
221 if (pdata->config.flags & SMSC911X_USE_16BIT) {
223 pdata->ioaddr + __smsc_shift(pdata, reg));
224 writew((val >> 16) & 0xFFFF,
225 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
232 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
237 spin_lock_irqsave(&pdata->dev_lock, flags);
238 pdata->ops->reg_write(pdata, reg, val);
239 spin_unlock_irqrestore(&pdata->dev_lock, flags);
242 /* Writes a packet to the TX_DATA_FIFO */
244 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
245 unsigned int wordcount)
249 spin_lock_irqsave(&pdata->dev_lock, flags);
251 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
253 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
258 if (pdata->config.flags & SMSC911X_USE_32BIT) {
259 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
263 if (pdata->config.flags & SMSC911X_USE_16BIT) {
265 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
271 spin_unlock_irqrestore(&pdata->dev_lock, flags);
274 /* Writes a packet to the TX_DATA_FIFO - shifted version */
276 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
277 unsigned int wordcount)
281 spin_lock_irqsave(&pdata->dev_lock, flags);
283 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
285 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
290 if (pdata->config.flags & SMSC911X_USE_32BIT) {
291 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
292 TX_DATA_FIFO), buf, wordcount);
296 if (pdata->config.flags & SMSC911X_USE_16BIT) {
298 __smsc911x_reg_write_shift(pdata,
299 TX_DATA_FIFO, *buf++);
305 spin_unlock_irqrestore(&pdata->dev_lock, flags);
308 /* Reads a packet out of the RX_DATA_FIFO */
310 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
311 unsigned int wordcount)
315 spin_lock_irqsave(&pdata->dev_lock, flags);
317 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
319 *buf++ = swab32(__smsc911x_reg_read(pdata,
324 if (pdata->config.flags & SMSC911X_USE_32BIT) {
325 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
329 if (pdata->config.flags & SMSC911X_USE_16BIT) {
331 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
337 spin_unlock_irqrestore(&pdata->dev_lock, flags);
340 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
342 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
343 unsigned int wordcount)
347 spin_lock_irqsave(&pdata->dev_lock, flags);
349 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
351 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
356 if (pdata->config.flags & SMSC911X_USE_32BIT) {
357 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
358 RX_DATA_FIFO), buf, wordcount);
362 if (pdata->config.flags & SMSC911X_USE_16BIT) {
364 *buf++ = __smsc911x_reg_read_shift(pdata,
371 spin_unlock_irqrestore(&pdata->dev_lock, flags);
375 * enable regulator and clock resources.
377 static int smsc911x_enable_resources(struct platform_device *pdev)
379 struct net_device *ndev = platform_get_drvdata(pdev);
380 struct smsc911x_data *pdata = netdev_priv(ndev);
383 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
386 netdev_err(ndev, "failed to enable regulators %d\n",
389 if (!IS_ERR(pdata->clk)) {
390 ret = clk_prepare_enable(pdata->clk);
392 netdev_err(ndev, "failed to enable clock %d\n", ret);
399 * disable resources, currently just regulators.
401 static int smsc911x_disable_resources(struct platform_device *pdev)
403 struct net_device *ndev = platform_get_drvdata(pdev);
404 struct smsc911x_data *pdata = netdev_priv(ndev);
407 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
410 if (!IS_ERR(pdata->clk))
411 clk_disable_unprepare(pdata->clk);
417 * Request resources, currently just regulators.
419 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
420 * these are not always-on we need to request regulators to be turned on
421 * before we can try to access the device registers.
423 static int smsc911x_request_resources(struct platform_device *pdev)
425 struct net_device *ndev = platform_get_drvdata(pdev);
426 struct smsc911x_data *pdata = netdev_priv(ndev);
429 /* Request regulators */
430 pdata->supplies[0].supply = "vdd33a";
431 pdata->supplies[1].supply = "vddvario";
432 ret = regulator_bulk_get(&pdev->dev,
433 ARRAY_SIZE(pdata->supplies),
436 netdev_err(ndev, "couldn't get regulators %d\n",
440 pdata->clk = clk_get(&pdev->dev, NULL);
441 if (IS_ERR(pdata->clk))
442 netdev_warn(ndev, "couldn't get clock %li\n", PTR_ERR(pdata->clk));
448 * Free resources, currently just regulators.
451 static void smsc911x_free_resources(struct platform_device *pdev)
453 struct net_device *ndev = platform_get_drvdata(pdev);
454 struct smsc911x_data *pdata = netdev_priv(ndev);
456 /* Free regulators */
457 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
461 if (!IS_ERR(pdata->clk)) {
467 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
468 * and smsc911x_mac_write, so assumes mac_lock is held */
469 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
474 SMSC_ASSERT_MAC_LOCK(pdata);
476 for (i = 0; i < 40; i++) {
477 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
478 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
481 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
482 "MAC_CSR_CMD: 0x%08X", val);
486 /* Fetches a MAC register value. Assumes mac_lock is acquired */
487 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
491 SMSC_ASSERT_MAC_LOCK(pdata);
493 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
494 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
495 SMSC_WARN(pdata, hw, "MAC busy at entry");
499 /* Send the MAC cmd */
500 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
501 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
503 /* Workaround for hardware read-after-write restriction */
504 temp = smsc911x_reg_read(pdata, BYTE_TEST);
506 /* Wait for the read to complete */
507 if (likely(smsc911x_mac_complete(pdata) == 0))
508 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
510 SMSC_WARN(pdata, hw, "MAC busy after read");
514 /* Set a mac register, mac_lock must be acquired before calling */
515 static void smsc911x_mac_write(struct smsc911x_data *pdata,
516 unsigned int offset, u32 val)
520 SMSC_ASSERT_MAC_LOCK(pdata);
522 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
523 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
525 "smsc911x_mac_write failed, MAC busy at entry");
529 /* Send data to write */
530 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
532 /* Write the actual data */
533 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
534 MAC_CSR_CMD_CSR_BUSY_));
536 /* Workaround for hardware read-after-write restriction */
537 temp = smsc911x_reg_read(pdata, BYTE_TEST);
539 /* Wait for the write to complete */
540 if (likely(smsc911x_mac_complete(pdata) == 0))
543 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
546 /* Get a phy register */
547 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
549 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
554 spin_lock_irqsave(&pdata->mac_lock, flags);
556 /* Confirm MII not busy */
557 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
558 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
563 /* Set the address, index & direction (read from PHY) */
564 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
565 smsc911x_mac_write(pdata, MII_ACC, addr);
567 /* Wait for read to complete w/ timeout */
568 for (i = 0; i < 100; i++)
569 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
570 reg = smsc911x_mac_read(pdata, MII_DATA);
574 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
578 spin_unlock_irqrestore(&pdata->mac_lock, flags);
582 /* Set a phy register */
583 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
586 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
591 spin_lock_irqsave(&pdata->mac_lock, flags);
593 /* Confirm MII not busy */
594 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
595 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
600 /* Put the data to write in the MAC */
601 smsc911x_mac_write(pdata, MII_DATA, val);
603 /* Set the address, index & direction (write to PHY) */
604 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
606 smsc911x_mac_write(pdata, MII_ACC, addr);
608 /* Wait for write to complete w/ timeout */
609 for (i = 0; i < 100; i++)
610 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
615 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
619 spin_unlock_irqrestore(&pdata->mac_lock, flags);
623 /* Switch to external phy. Assumes tx and rx are stopped. */
624 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
626 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
628 /* Disable phy clocks to the MAC */
629 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
630 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
631 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
632 udelay(10); /* Enough time for clocks to stop */
634 /* Switch to external phy */
635 hwcfg |= HW_CFG_EXT_PHY_EN_;
636 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
638 /* Enable phy clocks to the MAC */
639 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
640 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
641 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
642 udelay(10); /* Enough time for clocks to restart */
644 hwcfg |= HW_CFG_SMI_SEL_;
645 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
648 /* Autodetects and enables external phy if present on supported chips.
649 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
650 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
651 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
653 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
655 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
656 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
657 pdata->using_extphy = 0;
658 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
659 SMSC_TRACE(pdata, hw, "Forcing external PHY");
660 smsc911x_phy_enable_external(pdata);
661 pdata->using_extphy = 1;
662 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
663 SMSC_TRACE(pdata, hw,
664 "HW_CFG EXT_PHY_DET set, using external PHY");
665 smsc911x_phy_enable_external(pdata);
666 pdata->using_extphy = 1;
668 SMSC_TRACE(pdata, hw,
669 "HW_CFG EXT_PHY_DET clear, using internal PHY");
670 pdata->using_extphy = 0;
674 /* Fetches a tx status out of the status fifo */
675 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
677 unsigned int result =
678 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
681 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
686 /* Fetches the next rx status */
687 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
689 unsigned int result =
690 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
693 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
698 #ifdef USE_PHY_WORK_AROUND
699 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
706 for (tries = 0; tries < 10; tries++) {
707 unsigned int txcmd_a;
708 unsigned int txcmd_b;
710 unsigned int pktlength;
713 /* Zero-out rx packet memory */
714 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
716 /* Write tx packet to 118 */
717 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
718 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
719 txcmd_a |= MIN_PACKET_SIZE;
721 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
723 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
724 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
726 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
727 wrsz = MIN_PACKET_SIZE + 3;
728 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
731 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
733 /* Wait till transmit is done */
737 status = smsc911x_tx_get_txstatus(pdata);
738 } while ((i--) && (!status));
742 "Failed to transmit during loopback test");
745 if (status & TX_STS_ES_) {
747 "Transmit encountered errors during loopback test");
751 /* Wait till receive is done */
755 status = smsc911x_rx_get_rxstatus(pdata);
756 } while ((i--) && (!status));
760 "Failed to receive during loopback test");
763 if (status & RX_STS_ES_) {
765 "Receive encountered errors during loopback test");
769 pktlength = ((status & 0x3FFF0000UL) >> 16);
770 bufp = (ulong)pdata->loopback_rx_pkt;
771 rdsz = pktlength + 3;
772 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
775 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
777 if (pktlength != (MIN_PACKET_SIZE + 4)) {
778 SMSC_WARN(pdata, hw, "Unexpected packet size "
779 "during loop back test, size=%d, will retry",
784 for (j = 0; j < MIN_PACKET_SIZE; j++) {
785 if (pdata->loopback_tx_pkt[j]
786 != pdata->loopback_rx_pkt[j]) {
792 SMSC_TRACE(pdata, hw, "Successfully verified "
796 SMSC_WARN(pdata, hw, "Data mismatch "
797 "during loop back test, will retry");
805 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
807 struct phy_device *phy_dev = pdata->phy_dev;
809 unsigned int i = 100000;
812 BUG_ON(!phy_dev->bus);
814 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
815 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
818 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
820 } while ((i--) && (temp & BMCR_RESET));
822 if (temp & BMCR_RESET) {
823 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
826 /* Extra delay required because the phy may not be completed with
827 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
828 * enough delay but using 1ms here to be safe */
834 static int smsc911x_phy_loopbacktest(struct net_device *dev)
836 struct smsc911x_data *pdata = netdev_priv(dev);
837 struct phy_device *phy_dev = pdata->phy_dev;
842 /* Initialise tx packet using broadcast destination address */
843 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
845 /* Use incrementing source address */
846 for (i = 6; i < 12; i++)
847 pdata->loopback_tx_pkt[i] = (char)i;
849 /* Set length type field */
850 pdata->loopback_tx_pkt[12] = 0x00;
851 pdata->loopback_tx_pkt[13] = 0x00;
853 for (i = 14; i < MIN_PACKET_SIZE; i++)
854 pdata->loopback_tx_pkt[i] = (char)i;
856 val = smsc911x_reg_read(pdata, HW_CFG);
857 val &= HW_CFG_TX_FIF_SZ_;
859 smsc911x_reg_write(pdata, HW_CFG, val);
861 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
862 smsc911x_reg_write(pdata, RX_CFG,
863 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
865 for (i = 0; i < 10; i++) {
866 /* Set PHY to 10/FD, no ANEG, and loopback mode */
867 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
868 BMCR_LOOPBACK | BMCR_FULLDPLX);
870 /* Enable MAC tx/rx, FD */
871 spin_lock_irqsave(&pdata->mac_lock, flags);
872 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
873 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
874 spin_unlock_irqrestore(&pdata->mac_lock, flags);
876 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
883 spin_lock_irqsave(&pdata->mac_lock, flags);
884 smsc911x_mac_write(pdata, MAC_CR, 0);
885 spin_unlock_irqrestore(&pdata->mac_lock, flags);
887 smsc911x_phy_reset(pdata);
891 spin_lock_irqsave(&pdata->mac_lock, flags);
892 smsc911x_mac_write(pdata, MAC_CR, 0);
893 spin_unlock_irqrestore(&pdata->mac_lock, flags);
895 /* Cancel PHY loopback mode */
896 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
898 smsc911x_reg_write(pdata, TX_CFG, 0);
899 smsc911x_reg_write(pdata, RX_CFG, 0);
903 #endif /* USE_PHY_WORK_AROUND */
905 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
907 struct phy_device *phy_dev = pdata->phy_dev;
908 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
912 if (phy_dev->duplex == DUPLEX_FULL) {
913 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
914 u16 rmtadv = phy_read(phy_dev, MII_LPA);
915 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
917 if (cap & FLOW_CTRL_RX)
922 if (cap & FLOW_CTRL_TX)
927 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
928 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
929 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
931 SMSC_TRACE(pdata, hw, "half duplex");
936 spin_lock_irqsave(&pdata->mac_lock, flags);
937 smsc911x_mac_write(pdata, FLOW, flow);
938 spin_unlock_irqrestore(&pdata->mac_lock, flags);
940 smsc911x_reg_write(pdata, AFC_CFG, afc);
943 /* Update link mode if anything has changed. Called periodically when the
944 * PHY is in polling mode, even if nothing has changed. */
945 static void smsc911x_phy_adjust_link(struct net_device *dev)
947 struct smsc911x_data *pdata = netdev_priv(dev);
948 struct phy_device *phy_dev = pdata->phy_dev;
952 if (phy_dev->duplex != pdata->last_duplex) {
954 SMSC_TRACE(pdata, hw, "duplex state has changed");
956 spin_lock_irqsave(&pdata->mac_lock, flags);
957 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
958 if (phy_dev->duplex) {
959 SMSC_TRACE(pdata, hw,
960 "configuring for full duplex mode");
961 mac_cr |= MAC_CR_FDPX_;
963 SMSC_TRACE(pdata, hw,
964 "configuring for half duplex mode");
965 mac_cr &= ~MAC_CR_FDPX_;
967 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
968 spin_unlock_irqrestore(&pdata->mac_lock, flags);
970 smsc911x_phy_update_flowcontrol(pdata);
971 pdata->last_duplex = phy_dev->duplex;
974 carrier = netif_carrier_ok(dev);
975 if (carrier != pdata->last_carrier) {
976 SMSC_TRACE(pdata, hw, "carrier state has changed");
978 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
979 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
980 (!pdata->using_extphy)) {
981 /* Restore original GPIO configuration */
982 pdata->gpio_setting = pdata->gpio_orig_setting;
983 smsc911x_reg_write(pdata, GPIO_CFG,
984 pdata->gpio_setting);
987 SMSC_TRACE(pdata, hw, "configuring for no carrier");
988 /* Check global setting that LED1
989 * usage is 10/100 indicator */
990 pdata->gpio_setting = smsc911x_reg_read(pdata,
992 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
993 (!pdata->using_extphy)) {
994 /* Force 10/100 LED off, after saving
995 * original GPIO configuration */
996 pdata->gpio_orig_setting = pdata->gpio_setting;
998 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
999 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1000 | GPIO_CFG_GPIODIR0_
1001 | GPIO_CFG_GPIOD0_);
1002 smsc911x_reg_write(pdata, GPIO_CFG,
1003 pdata->gpio_setting);
1006 pdata->last_carrier = carrier;
1010 static int smsc911x_mii_probe(struct net_device *dev)
1012 struct smsc911x_data *pdata = netdev_priv(dev);
1013 struct phy_device *phydev = NULL;
1016 /* find the first phy */
1017 phydev = phy_find_first(pdata->mii_bus);
1019 netdev_err(dev, "no PHY found\n");
1023 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1024 phydev->addr, phydev->phy_id);
1026 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1027 pdata->config.phy_interface);
1030 netdev_err(dev, "Could not attach to PHY\n");
1035 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1036 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1038 /* mask with MAC supported features */
1039 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1040 SUPPORTED_Asym_Pause);
1041 phydev->advertising = phydev->supported;
1043 pdata->phy_dev = phydev;
1044 pdata->last_duplex = -1;
1045 pdata->last_carrier = -1;
1047 #ifdef USE_PHY_WORK_AROUND
1048 if (smsc911x_phy_loopbacktest(dev) < 0) {
1049 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1052 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1053 #endif /* USE_PHY_WORK_AROUND */
1055 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1059 static int smsc911x_mii_init(struct platform_device *pdev,
1060 struct net_device *dev)
1062 struct smsc911x_data *pdata = netdev_priv(dev);
1063 int err = -ENXIO, i;
1065 pdata->mii_bus = mdiobus_alloc();
1066 if (!pdata->mii_bus) {
1071 pdata->mii_bus->name = SMSC_MDIONAME;
1072 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1073 pdev->name, pdev->id);
1074 pdata->mii_bus->priv = pdata;
1075 pdata->mii_bus->read = smsc911x_mii_read;
1076 pdata->mii_bus->write = smsc911x_mii_write;
1077 pdata->mii_bus->irq = pdata->phy_irq;
1078 for (i = 0; i < PHY_MAX_ADDR; ++i)
1079 pdata->mii_bus->irq[i] = PHY_POLL;
1081 pdata->mii_bus->parent = &pdev->dev;
1083 switch (pdata->idrev & 0xFFFF0000) {
1088 /* External PHY supported, try to autodetect */
1089 smsc911x_phy_initialise_external(pdata);
1092 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1093 "using internal PHY");
1094 pdata->using_extphy = 0;
1098 if (!pdata->using_extphy) {
1099 /* Mask all PHYs except ID 1 (internal) */
1100 pdata->mii_bus->phy_mask = ~(1 << 1);
1103 if (mdiobus_register(pdata->mii_bus)) {
1104 SMSC_WARN(pdata, probe, "Error registering mii bus");
1105 goto err_out_free_bus_2;
1108 if (smsc911x_mii_probe(dev) < 0) {
1109 SMSC_WARN(pdata, probe, "Error registering mii bus");
1110 goto err_out_unregister_bus_3;
1115 err_out_unregister_bus_3:
1116 mdiobus_unregister(pdata->mii_bus);
1118 mdiobus_free(pdata->mii_bus);
1123 /* Gets the number of tx statuses in the fifo */
1124 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1126 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1127 & TX_FIFO_INF_TSUSED_) >> 16;
1130 /* Reads tx statuses and increments counters where necessary */
1131 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1133 struct smsc911x_data *pdata = netdev_priv(dev);
1134 unsigned int tx_stat;
1136 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1137 if (unlikely(tx_stat & 0x80000000)) {
1138 /* In this driver the packet tag is used as the packet
1139 * length. Since a packet length can never reach the
1140 * size of 0x8000, this bit is reserved. It is worth
1141 * noting that the "reserved bit" in the warning above
1142 * does not reference a hardware defined reserved bit
1143 * but rather a driver defined one.
1145 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1147 if (unlikely(tx_stat & TX_STS_ES_)) {
1148 dev->stats.tx_errors++;
1150 dev->stats.tx_packets++;
1151 dev->stats.tx_bytes += (tx_stat >> 16);
1153 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1154 dev->stats.collisions += 16;
1155 dev->stats.tx_aborted_errors += 1;
1157 dev->stats.collisions +=
1158 ((tx_stat >> 3) & 0xF);
1160 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1161 dev->stats.tx_carrier_errors += 1;
1162 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1163 dev->stats.collisions++;
1164 dev->stats.tx_aborted_errors++;
1170 /* Increments the Rx error counters */
1172 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1176 if (unlikely(rxstat & RX_STS_ES_)) {
1177 dev->stats.rx_errors++;
1178 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1179 dev->stats.rx_crc_errors++;
1183 if (likely(!crc_err)) {
1184 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1185 (rxstat & RX_STS_LENGTH_ERR_)))
1186 dev->stats.rx_length_errors++;
1187 if (rxstat & RX_STS_MCAST_)
1188 dev->stats.multicast++;
1192 /* Quickly dumps bad packets */
1194 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1196 if (likely(pktwords >= 4)) {
1197 unsigned int timeout = 500;
1199 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1202 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1203 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1205 if (unlikely(timeout == 0))
1206 SMSC_WARN(pdata, hw, "Timed out waiting for "
1207 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1211 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1215 /* NAPI poll function */
1216 static int smsc911x_poll(struct napi_struct *napi, int budget)
1218 struct smsc911x_data *pdata =
1219 container_of(napi, struct smsc911x_data, napi);
1220 struct net_device *dev = pdata->dev;
1223 while (npackets < budget) {
1224 unsigned int pktlength;
1225 unsigned int pktwords;
1226 struct sk_buff *skb;
1227 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1231 /* We processed all packets available. Tell NAPI it can
1232 * stop polling then re-enable rx interrupts */
1233 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1234 napi_complete(napi);
1235 temp = smsc911x_reg_read(pdata, INT_EN);
1236 temp |= INT_EN_RSFL_EN_;
1237 smsc911x_reg_write(pdata, INT_EN, temp);
1241 /* Count packet for NAPI scheduling, even if it has an error.
1242 * Error packets still require cycles to discard */
1245 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1246 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1247 smsc911x_rx_counterrors(dev, rxstat);
1249 if (unlikely(rxstat & RX_STS_ES_)) {
1250 SMSC_WARN(pdata, rx_err,
1251 "Discarding packet with error bit set");
1252 /* Packet has an error, discard it and continue with
1254 smsc911x_rx_fastforward(pdata, pktwords);
1255 dev->stats.rx_dropped++;
1259 skb = netdev_alloc_skb(dev, pktwords << 2);
1260 if (unlikely(!skb)) {
1261 SMSC_WARN(pdata, rx_err,
1262 "Unable to allocate skb for rx packet");
1263 /* Drop the packet and stop this polling iteration */
1264 smsc911x_rx_fastforward(pdata, pktwords);
1265 dev->stats.rx_dropped++;
1269 pdata->ops->rx_readfifo(pdata,
1270 (unsigned int *)skb->data, pktwords);
1272 /* Align IP on 16B boundary */
1273 skb_reserve(skb, NET_IP_ALIGN);
1274 skb_put(skb, pktlength - 4);
1275 skb->protocol = eth_type_trans(skb, dev);
1276 skb_checksum_none_assert(skb);
1277 netif_receive_skb(skb);
1279 /* Update counters */
1280 dev->stats.rx_packets++;
1281 dev->stats.rx_bytes += (pktlength - 4);
1284 /* Return total received packets */
1288 /* Returns hash bit number for given MAC address
1290 * 01 00 5E 00 00 01 -> returns bit number 31 */
1291 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1293 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1296 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1298 /* Performs the multicast & mac_cr update. This is called when
1299 * safe on the current hardware, and with the mac_lock held */
1300 unsigned int mac_cr;
1302 SMSC_ASSERT_MAC_LOCK(pdata);
1304 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1305 mac_cr |= pdata->set_bits_mask;
1306 mac_cr &= ~(pdata->clear_bits_mask);
1307 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1308 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1309 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1310 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1311 mac_cr, pdata->hashhi, pdata->hashlo);
1314 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1316 unsigned int mac_cr;
1318 /* This function is only called for older LAN911x devices
1319 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1320 * be modified during Rx - newer devices immediately update the
1323 * This is called from interrupt context */
1325 spin_lock(&pdata->mac_lock);
1327 /* Check Rx has stopped */
1328 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1329 SMSC_WARN(pdata, drv, "Rx not stopped");
1331 /* Perform the update - safe to do now Rx has stopped */
1332 smsc911x_rx_multicast_update(pdata);
1335 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1336 mac_cr |= MAC_CR_RXEN_;
1337 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1339 pdata->multicast_update_pending = 0;
1341 spin_unlock(&pdata->mac_lock);
1344 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1348 if (!pdata->phy_dev)
1351 /* If the internal PHY is in General Power-Down mode, all, except the
1352 * management interface, is powered-down and stays in that condition as
1353 * long as Phy register bit 0.11 is HIGH.
1355 * In that case, clear the bit 0.11, so the PHY powers up and we can
1356 * access to the phy registers.
1358 rc = phy_read(pdata->phy_dev, MII_BMCR);
1360 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1364 /* If the PHY general power-down bit is not set is not necessary to
1365 * disable the general power down-mode.
1367 if (rc & BMCR_PDOWN) {
1368 rc = phy_write(pdata->phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1370 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1374 usleep_range(1000, 1500);
1380 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1384 if (!pdata->phy_dev)
1387 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1390 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1395 * If energy is detected the PHY is already awake so is not necessary
1396 * to disable the energy detect power-down mode.
1398 if ((rc & MII_LAN83C185_EDPWRDOWN) &&
1399 !(rc & MII_LAN83C185_ENERGYON)) {
1400 /* Disable energy detect mode for this SMSC Transceivers */
1401 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1402 rc & (~MII_LAN83C185_EDPWRDOWN));
1405 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1415 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1419 if (!pdata->phy_dev)
1422 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1425 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1429 /* Only enable if energy detect mode is already disabled */
1430 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1432 /* Enable energy detect mode for this SMSC Transceivers */
1433 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1434 rc | MII_LAN83C185_EDPWRDOWN);
1437 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1446 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1448 unsigned int timeout;
1453 * Make sure to power-up the PHY chip before doing a reset, otherwise
1456 ret = smsc911x_phy_general_power_up(pdata);
1458 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1463 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1464 * are initialized in a Energy Detect Power-Down mode that prevents
1465 * the MAC chip to be software reseted. So we have to wakeup the PHY
1468 if (pdata->generation == 4) {
1469 ret = smsc911x_phy_disable_energy_detect(pdata);
1472 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1477 /* Reset the LAN911x */
1478 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1482 temp = smsc911x_reg_read(pdata, HW_CFG);
1483 } while ((--timeout) && (temp & HW_CFG_SRST_));
1485 if (unlikely(temp & HW_CFG_SRST_)) {
1486 SMSC_WARN(pdata, drv, "Failed to complete reset");
1490 if (pdata->generation == 4) {
1491 ret = smsc911x_phy_enable_energy_detect(pdata);
1494 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1502 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1504 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1506 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1507 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1508 (dev_addr[1] << 8) | dev_addr[0];
1510 SMSC_ASSERT_MAC_LOCK(pdata);
1512 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1513 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1516 static void smsc911x_disable_irq_chip(struct net_device *dev)
1518 struct smsc911x_data *pdata = netdev_priv(dev);
1520 smsc911x_reg_write(pdata, INT_EN, 0);
1521 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1524 static int smsc911x_open(struct net_device *dev)
1526 struct smsc911x_data *pdata = netdev_priv(dev);
1527 unsigned int timeout;
1529 unsigned int intcfg;
1531 /* if the phy is not yet registered, retry later*/
1532 if (!pdata->phy_dev) {
1533 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1537 /* Reset the LAN911x */
1538 if (smsc911x_soft_reset(pdata)) {
1539 SMSC_WARN(pdata, hw, "soft reset failed");
1543 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1544 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1546 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1547 spin_lock_irq(&pdata->mac_lock);
1548 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1549 spin_unlock_irq(&pdata->mac_lock);
1551 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1553 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1558 if (unlikely(timeout == 0))
1559 SMSC_WARN(pdata, ifup,
1560 "Timed out waiting for EEPROM busy bit to clear");
1562 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1564 /* The soft reset above cleared the device's MAC address,
1565 * restore it from local copy (set in probe) */
1566 spin_lock_irq(&pdata->mac_lock);
1567 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1568 spin_unlock_irq(&pdata->mac_lock);
1570 /* Initialise irqs, but leave all sources disabled */
1571 smsc911x_disable_irq_chip(dev);
1573 /* Set interrupt deassertion to 100uS */
1574 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1576 if (pdata->config.irq_polarity) {
1577 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1578 intcfg |= INT_CFG_IRQ_POL_;
1580 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1583 if (pdata->config.irq_type) {
1584 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1585 intcfg |= INT_CFG_IRQ_TYPE_;
1587 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1590 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1592 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1593 pdata->software_irq_signal = 0;
1596 temp = smsc911x_reg_read(pdata, INT_EN);
1597 temp |= INT_EN_SW_INT_EN_;
1598 smsc911x_reg_write(pdata, INT_EN, temp);
1602 if (pdata->software_irq_signal)
1607 if (!pdata->software_irq_signal) {
1608 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1612 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1615 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1616 (unsigned long)pdata->ioaddr, dev->irq);
1618 /* Reset the last known duplex and carrier */
1619 pdata->last_duplex = -1;
1620 pdata->last_carrier = -1;
1622 /* Bring the PHY up */
1623 phy_start(pdata->phy_dev);
1625 temp = smsc911x_reg_read(pdata, HW_CFG);
1626 /* Preserve TX FIFO size and external PHY configuration */
1627 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1629 smsc911x_reg_write(pdata, HW_CFG, temp);
1631 temp = smsc911x_reg_read(pdata, FIFO_INT);
1632 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1633 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1634 smsc911x_reg_write(pdata, FIFO_INT, temp);
1636 /* set RX Data offset to 2 bytes for alignment */
1637 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1639 /* enable NAPI polling before enabling RX interrupts */
1640 napi_enable(&pdata->napi);
1642 temp = smsc911x_reg_read(pdata, INT_EN);
1643 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1644 smsc911x_reg_write(pdata, INT_EN, temp);
1646 spin_lock_irq(&pdata->mac_lock);
1647 temp = smsc911x_mac_read(pdata, MAC_CR);
1648 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1649 smsc911x_mac_write(pdata, MAC_CR, temp);
1650 spin_unlock_irq(&pdata->mac_lock);
1652 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1654 netif_start_queue(dev);
1658 /* Entry point for stopping the interface */
1659 static int smsc911x_stop(struct net_device *dev)
1661 struct smsc911x_data *pdata = netdev_priv(dev);
1664 /* Disable all device interrupts */
1665 temp = smsc911x_reg_read(pdata, INT_CFG);
1666 temp &= ~INT_CFG_IRQ_EN_;
1667 smsc911x_reg_write(pdata, INT_CFG, temp);
1669 /* Stop Tx and Rx polling */
1670 netif_stop_queue(dev);
1671 napi_disable(&pdata->napi);
1673 /* At this point all Rx and Tx activity is stopped */
1674 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1675 smsc911x_tx_update_txcounters(dev);
1677 /* Bring the PHY down */
1679 phy_stop(pdata->phy_dev);
1681 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1685 /* Entry point for transmitting a packet */
1686 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1688 struct smsc911x_data *pdata = netdev_priv(dev);
1689 unsigned int freespace;
1690 unsigned int tx_cmd_a;
1691 unsigned int tx_cmd_b;
1696 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1698 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1699 SMSC_WARN(pdata, tx_err,
1700 "Tx data fifo low, space available: %d", freespace);
1702 /* Word alignment adjustment */
1703 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1704 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1705 tx_cmd_a |= (unsigned int)skb->len;
1707 tx_cmd_b = ((unsigned int)skb->len) << 16;
1708 tx_cmd_b |= (unsigned int)skb->len;
1710 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1711 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1713 bufp = (ulong)skb->data & (~0x3);
1714 wrsz = (u32)skb->len + 3;
1715 wrsz += (u32)((ulong)skb->data & 0x3);
1718 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1719 freespace -= (skb->len + 32);
1720 skb_tx_timestamp(skb);
1723 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1724 smsc911x_tx_update_txcounters(dev);
1726 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1727 netif_stop_queue(dev);
1728 temp = smsc911x_reg_read(pdata, FIFO_INT);
1731 smsc911x_reg_write(pdata, FIFO_INT, temp);
1734 return NETDEV_TX_OK;
1737 /* Entry point for getting status counters */
1738 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1740 struct smsc911x_data *pdata = netdev_priv(dev);
1741 smsc911x_tx_update_txcounters(dev);
1742 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1746 /* Entry point for setting addressing modes */
1747 static void smsc911x_set_multicast_list(struct net_device *dev)
1749 struct smsc911x_data *pdata = netdev_priv(dev);
1750 unsigned long flags;
1752 if (dev->flags & IFF_PROMISC) {
1753 /* Enabling promiscuous mode */
1754 pdata->set_bits_mask = MAC_CR_PRMS_;
1755 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1758 } else if (dev->flags & IFF_ALLMULTI) {
1759 /* Enabling all multicast mode */
1760 pdata->set_bits_mask = MAC_CR_MCPAS_;
1761 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1764 } else if (!netdev_mc_empty(dev)) {
1765 /* Enabling specific multicast addresses */
1766 unsigned int hash_high = 0;
1767 unsigned int hash_low = 0;
1768 struct netdev_hw_addr *ha;
1770 pdata->set_bits_mask = MAC_CR_HPFILT_;
1771 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1773 netdev_for_each_mc_addr(ha, dev) {
1774 unsigned int bitnum = smsc911x_hash(ha->addr);
1775 unsigned int mask = 0x01 << (bitnum & 0x1F);
1783 pdata->hashhi = hash_high;
1784 pdata->hashlo = hash_low;
1786 /* Enabling local MAC address only */
1787 pdata->set_bits_mask = 0;
1788 pdata->clear_bits_mask =
1789 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1794 spin_lock_irqsave(&pdata->mac_lock, flags);
1796 if (pdata->generation <= 1) {
1797 /* Older hardware revision - cannot change these flags while
1799 if (!pdata->multicast_update_pending) {
1801 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1802 pdata->multicast_update_pending = 1;
1804 /* Request the hardware to stop, then perform the
1805 * update when we get an RX_STOP interrupt */
1806 temp = smsc911x_mac_read(pdata, MAC_CR);
1807 temp &= ~(MAC_CR_RXEN_);
1808 smsc911x_mac_write(pdata, MAC_CR, temp);
1810 /* There is another update pending, this should now
1811 * use the newer values */
1814 /* Newer hardware revision - can write immediately */
1815 smsc911x_rx_multicast_update(pdata);
1818 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1821 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1823 struct net_device *dev = dev_id;
1824 struct smsc911x_data *pdata = netdev_priv(dev);
1825 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1826 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1827 int serviced = IRQ_NONE;
1830 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1831 temp = smsc911x_reg_read(pdata, INT_EN);
1832 temp &= (~INT_EN_SW_INT_EN_);
1833 smsc911x_reg_write(pdata, INT_EN, temp);
1834 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1835 pdata->software_irq_signal = 1;
1837 serviced = IRQ_HANDLED;
1840 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1841 /* Called when there is a multicast update scheduled and
1842 * it is now safe to complete the update */
1843 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1844 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1845 if (pdata->multicast_update_pending)
1846 smsc911x_rx_multicast_update_workaround(pdata);
1847 serviced = IRQ_HANDLED;
1850 if (intsts & inten & INT_STS_TDFA_) {
1851 temp = smsc911x_reg_read(pdata, FIFO_INT);
1852 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1853 smsc911x_reg_write(pdata, FIFO_INT, temp);
1854 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1855 netif_wake_queue(dev);
1856 serviced = IRQ_HANDLED;
1859 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1860 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1861 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1862 serviced = IRQ_HANDLED;
1865 if (likely(intsts & inten & INT_STS_RSFL_)) {
1866 if (likely(napi_schedule_prep(&pdata->napi))) {
1867 /* Disable Rx interrupts */
1868 temp = smsc911x_reg_read(pdata, INT_EN);
1869 temp &= (~INT_EN_RSFL_EN_);
1870 smsc911x_reg_write(pdata, INT_EN, temp);
1871 /* Schedule a NAPI poll */
1872 __napi_schedule(&pdata->napi);
1874 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1876 serviced = IRQ_HANDLED;
1882 #ifdef CONFIG_NET_POLL_CONTROLLER
1883 static void smsc911x_poll_controller(struct net_device *dev)
1885 disable_irq(dev->irq);
1886 smsc911x_irqhandler(0, dev);
1887 enable_irq(dev->irq);
1889 #endif /* CONFIG_NET_POLL_CONTROLLER */
1891 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1893 struct smsc911x_data *pdata = netdev_priv(dev);
1894 struct sockaddr *addr = p;
1896 /* On older hardware revisions we cannot change the mac address
1897 * registers while receiving data. Newer devices can safely change
1898 * this at any time. */
1899 if (pdata->generation <= 1 && netif_running(dev))
1902 if (!is_valid_ether_addr(addr->sa_data))
1903 return -EADDRNOTAVAIL;
1905 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1907 spin_lock_irq(&pdata->mac_lock);
1908 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1909 spin_unlock_irq(&pdata->mac_lock);
1911 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1916 /* Standard ioctls for mii-tool */
1917 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1919 struct smsc911x_data *pdata = netdev_priv(dev);
1921 if (!netif_running(dev) || !pdata->phy_dev)
1924 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1928 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1930 struct smsc911x_data *pdata = netdev_priv(dev);
1934 return phy_ethtool_gset(pdata->phy_dev, cmd);
1938 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1940 struct smsc911x_data *pdata = netdev_priv(dev);
1942 return phy_ethtool_sset(pdata->phy_dev, cmd);
1945 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1946 struct ethtool_drvinfo *info)
1948 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1949 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1950 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1951 sizeof(info->bus_info));
1954 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1956 struct smsc911x_data *pdata = netdev_priv(dev);
1958 return phy_start_aneg(pdata->phy_dev);
1961 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1963 struct smsc911x_data *pdata = netdev_priv(dev);
1964 return pdata->msg_enable;
1967 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1969 struct smsc911x_data *pdata = netdev_priv(dev);
1970 pdata->msg_enable = level;
1973 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1975 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1980 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1983 struct smsc911x_data *pdata = netdev_priv(dev);
1984 struct phy_device *phy_dev = pdata->phy_dev;
1985 unsigned long flags;
1990 regs->version = pdata->idrev;
1991 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1992 data[j++] = smsc911x_reg_read(pdata, i);
1994 for (i = MAC_CR; i <= WUCSR; i++) {
1995 spin_lock_irqsave(&pdata->mac_lock, flags);
1996 data[j++] = smsc911x_mac_read(pdata, i);
1997 spin_unlock_irqrestore(&pdata->mac_lock, flags);
2000 for (i = 0; i <= 31; i++)
2001 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
2004 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
2006 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
2007 temp &= ~GPIO_CFG_EEPR_EN_;
2008 smsc911x_reg_write(pdata, GPIO_CFG, temp);
2012 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2017 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2018 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2019 SMSC_WARN(pdata, drv, "Busy at start");
2023 e2cmd = op | E2P_CMD_EPC_BUSY_;
2024 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2028 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2029 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2032 SMSC_TRACE(pdata, drv, "TIMED OUT");
2036 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2037 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2044 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2045 u8 address, u8 *data)
2047 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2050 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2051 ret = smsc911x_eeprom_send_cmd(pdata, op);
2054 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2059 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2060 u8 address, u8 data)
2062 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2066 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2067 ret = smsc911x_eeprom_send_cmd(pdata, op);
2070 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2071 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2073 /* Workaround for hardware read-after-write restriction */
2074 temp = smsc911x_reg_read(pdata, BYTE_TEST);
2076 ret = smsc911x_eeprom_send_cmd(pdata, op);
2082 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2084 return SMSC911X_EEPROM_SIZE;
2087 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2088 struct ethtool_eeprom *eeprom, u8 *data)
2090 struct smsc911x_data *pdata = netdev_priv(dev);
2091 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2095 smsc911x_eeprom_enable_access(pdata);
2097 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2098 for (i = 0; i < len; i++) {
2099 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2106 memcpy(data, &eeprom_data[eeprom->offset], len);
2111 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2112 struct ethtool_eeprom *eeprom, u8 *data)
2115 struct smsc911x_data *pdata = netdev_priv(dev);
2117 smsc911x_eeprom_enable_access(pdata);
2118 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2119 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2120 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2122 /* Single byte write, according to man page */
2128 static const struct ethtool_ops smsc911x_ethtool_ops = {
2129 .get_settings = smsc911x_ethtool_getsettings,
2130 .set_settings = smsc911x_ethtool_setsettings,
2131 .get_link = ethtool_op_get_link,
2132 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2133 .nway_reset = smsc911x_ethtool_nwayreset,
2134 .get_msglevel = smsc911x_ethtool_getmsglevel,
2135 .set_msglevel = smsc911x_ethtool_setmsglevel,
2136 .get_regs_len = smsc911x_ethtool_getregslen,
2137 .get_regs = smsc911x_ethtool_getregs,
2138 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2139 .get_eeprom = smsc911x_ethtool_get_eeprom,
2140 .set_eeprom = smsc911x_ethtool_set_eeprom,
2141 .get_ts_info = ethtool_op_get_ts_info,
2144 static const struct net_device_ops smsc911x_netdev_ops = {
2145 .ndo_open = smsc911x_open,
2146 .ndo_stop = smsc911x_stop,
2147 .ndo_start_xmit = smsc911x_hard_start_xmit,
2148 .ndo_get_stats = smsc911x_get_stats,
2149 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2150 .ndo_do_ioctl = smsc911x_do_ioctl,
2151 .ndo_change_mtu = eth_change_mtu,
2152 .ndo_validate_addr = eth_validate_addr,
2153 .ndo_set_mac_address = smsc911x_set_mac_address,
2154 #ifdef CONFIG_NET_POLL_CONTROLLER
2155 .ndo_poll_controller = smsc911x_poll_controller,
2159 /* copies the current mac address from hardware to dev->dev_addr */
2160 static void smsc911x_read_mac_address(struct net_device *dev)
2162 struct smsc911x_data *pdata = netdev_priv(dev);
2163 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2164 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2166 dev->dev_addr[0] = (u8)(mac_low32);
2167 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2168 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2169 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2170 dev->dev_addr[4] = (u8)(mac_high16);
2171 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2174 /* Initializing private device structures, only called from probe */
2175 static int smsc911x_init(struct net_device *dev)
2177 struct smsc911x_data *pdata = netdev_priv(dev);
2178 unsigned int byte_test, mask;
2179 unsigned int to = 100;
2181 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2182 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2183 (unsigned long)pdata->ioaddr);
2184 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2185 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2187 spin_lock_init(&pdata->dev_lock);
2188 spin_lock_init(&pdata->mac_lock);
2190 if (pdata->ioaddr == NULL) {
2191 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2196 * poll the READY bit in PMT_CTRL. Any other access to the device is
2197 * forbidden while this bit isn't set. Try for 100ms
2199 * Note that this test is done before the WORD_SWAP register is
2200 * programmed. So in some configurations the READY bit is at 16 before
2201 * WORD_SWAP is written to. This issue is worked around by waiting
2202 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2204 * SMSC has confirmed that checking bit 16 (marked as reserved in
2205 * the datasheet) is fine since these bits "will either never be set
2206 * or can only go high after READY does (so also indicate the device
2210 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2211 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2215 netdev_err(dev, "Device not READY in 100ms aborting\n");
2219 /* Check byte ordering */
2220 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2221 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2222 if (byte_test == 0x43218765) {
2223 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2224 "applying WORD_SWAP");
2225 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2227 /* 1 dummy read of BYTE_TEST is needed after a write to
2228 * WORD_SWAP before its contents are valid */
2229 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2231 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2234 if (byte_test != 0x87654321) {
2235 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2236 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2237 SMSC_WARN(pdata, probe,
2238 "top 16 bits equal to bottom 16 bits");
2239 SMSC_TRACE(pdata, probe,
2240 "This may mean the chip is set "
2241 "for 32 bit while the bus is reading 16 bit");
2246 /* Default generation to zero (all workarounds apply) */
2247 pdata->generation = 0;
2249 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2250 switch (pdata->idrev & 0xFFFF0000) {
2256 /* LAN911[5678] family */
2257 pdata->generation = pdata->idrev & 0x0000FFFF;
2264 /* LAN921[5678] family */
2265 pdata->generation = 3;
2272 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2273 pdata->generation = 4;
2277 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2282 SMSC_TRACE(pdata, probe,
2283 "LAN911x identified, idrev: 0x%08X, generation: %d",
2284 pdata->idrev, pdata->generation);
2286 if (pdata->generation == 0)
2287 SMSC_WARN(pdata, probe,
2288 "This driver is not intended for this chip revision");
2290 /* workaround for platforms without an eeprom, where the mac address
2291 * is stored elsewhere and set by the bootloader. This saves the
2292 * mac address before resetting the device */
2293 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2294 spin_lock_irq(&pdata->mac_lock);
2295 smsc911x_read_mac_address(dev);
2296 spin_unlock_irq(&pdata->mac_lock);
2299 /* Reset the LAN911x */
2300 if (smsc911x_soft_reset(pdata))
2304 dev->flags |= IFF_MULTICAST;
2305 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2306 dev->netdev_ops = &smsc911x_netdev_ops;
2307 dev->ethtool_ops = &smsc911x_ethtool_ops;
2312 static int smsc911x_drv_remove(struct platform_device *pdev)
2314 struct net_device *dev;
2315 struct smsc911x_data *pdata;
2316 struct resource *res;
2318 dev = platform_get_drvdata(pdev);
2320 pdata = netdev_priv(dev);
2322 BUG_ON(!pdata->ioaddr);
2323 BUG_ON(!pdata->phy_dev);
2325 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2327 phy_disconnect(pdata->phy_dev);
2328 pdata->phy_dev = NULL;
2329 mdiobus_unregister(pdata->mii_bus);
2330 mdiobus_free(pdata->mii_bus);
2332 unregister_netdev(dev);
2333 free_irq(dev->irq, dev);
2334 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2337 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2339 release_mem_region(res->start, resource_size(res));
2341 iounmap(pdata->ioaddr);
2343 (void)smsc911x_disable_resources(pdev);
2344 smsc911x_free_resources(pdev);
2351 /* standard register acces */
2352 static const struct smsc911x_ops standard_smsc911x_ops = {
2353 .reg_read = __smsc911x_reg_read,
2354 .reg_write = __smsc911x_reg_write,
2355 .rx_readfifo = smsc911x_rx_readfifo,
2356 .tx_writefifo = smsc911x_tx_writefifo,
2359 /* shifted register access */
2360 static const struct smsc911x_ops shifted_smsc911x_ops = {
2361 .reg_read = __smsc911x_reg_read_shift,
2362 .reg_write = __smsc911x_reg_write_shift,
2363 .rx_readfifo = smsc911x_rx_readfifo_shift,
2364 .tx_writefifo = smsc911x_tx_writefifo_shift,
2368 static int smsc911x_probe_config_dt(struct smsc911x_platform_config *config,
2369 struct device_node *np)
2377 config->phy_interface = of_get_phy_mode(np);
2379 mac = of_get_mac_address(np);
2381 memcpy(config->mac, mac, ETH_ALEN);
2383 of_property_read_u32(np, "reg-shift", &config->shift);
2385 of_property_read_u32(np, "reg-io-width", &width);
2387 config->flags |= SMSC911X_USE_32BIT;
2389 config->flags |= SMSC911X_USE_16BIT;
2391 if (of_get_property(np, "smsc,irq-active-high", NULL))
2392 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2394 if (of_get_property(np, "smsc,irq-push-pull", NULL))
2395 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2397 if (of_get_property(np, "smsc,force-internal-phy", NULL))
2398 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2400 if (of_get_property(np, "smsc,force-external-phy", NULL))
2401 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2403 if (of_get_property(np, "smsc,save-mac-address", NULL))
2404 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2409 static inline int smsc911x_probe_config_dt(
2410 struct smsc911x_platform_config *config,
2411 struct device_node *np)
2415 #endif /* CONFIG_OF */
2417 static int smsc911x_drv_probe(struct platform_device *pdev)
2419 struct device_node *np = pdev->dev.of_node;
2420 struct net_device *dev;
2421 struct smsc911x_data *pdata;
2422 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2423 struct resource *res, *irq_res;
2424 unsigned int intcfg = 0;
2425 int res_size, irq_flags;
2428 pr_info("Driver version %s\n", SMSC_DRV_VERSION);
2430 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2433 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2435 pr_warn("Could not allocate resource\n");
2439 res_size = resource_size(res);
2441 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2443 pr_warn("Could not allocate irq resource\n");
2448 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2453 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2456 goto out_release_io_1;
2459 SET_NETDEV_DEV(dev, &pdev->dev);
2461 pdata = netdev_priv(dev);
2462 dev->irq = irq_res->start;
2463 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2464 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2467 pdata->msg_enable = ((1 << debug) - 1);
2469 platform_set_drvdata(pdev, dev);
2471 retval = smsc911x_request_resources(pdev);
2473 goto out_request_resources_fail;
2475 retval = smsc911x_enable_resources(pdev);
2477 goto out_enable_resources_fail;
2479 if (pdata->ioaddr == NULL) {
2480 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2482 goto out_disable_resources;
2485 retval = smsc911x_probe_config_dt(&pdata->config, np);
2486 if (retval && config) {
2487 /* copy config parameters across to pdata */
2488 memcpy(&pdata->config, config, sizeof(pdata->config));
2493 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2494 goto out_disable_resources;
2497 /* assume standard, non-shifted, access to HW registers */
2498 pdata->ops = &standard_smsc911x_ops;
2499 /* apply the right access if shifting is needed */
2500 if (pdata->config.shift)
2501 pdata->ops = &shifted_smsc911x_ops;
2503 retval = smsc911x_init(dev);
2505 goto out_disable_resources;
2507 /* configure irq polarity and type before connecting isr */
2508 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2509 intcfg |= INT_CFG_IRQ_POL_;
2511 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2512 intcfg |= INT_CFG_IRQ_TYPE_;
2514 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2516 /* Ensure interrupts are globally disabled before connecting ISR */
2517 smsc911x_disable_irq_chip(dev);
2519 retval = request_irq(dev->irq, smsc911x_irqhandler,
2520 irq_flags | IRQF_SHARED, dev->name, dev);
2522 SMSC_WARN(pdata, probe,
2523 "Unable to claim requested irq: %d", dev->irq);
2524 goto out_disable_resources;
2527 retval = register_netdev(dev);
2529 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2532 SMSC_TRACE(pdata, probe,
2533 "Network interface: \"%s\"", dev->name);
2536 retval = smsc911x_mii_init(pdev, dev);
2538 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2539 goto out_unregister_netdev_5;
2542 spin_lock_irq(&pdata->mac_lock);
2544 /* Check if mac address has been specified when bringing interface up */
2545 if (is_valid_ether_addr(dev->dev_addr)) {
2546 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2547 SMSC_TRACE(pdata, probe,
2548 "MAC Address is specified by configuration");
2549 } else if (is_valid_ether_addr(pdata->config.mac)) {
2550 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN);
2551 SMSC_TRACE(pdata, probe,
2552 "MAC Address specified by platform data");
2554 /* Try reading mac address from device. if EEPROM is present
2555 * it will already have been set */
2558 if (is_valid_ether_addr(dev->dev_addr)) {
2559 /* eeprom values are valid so use them */
2560 SMSC_TRACE(pdata, probe,
2561 "Mac Address is read from LAN911x EEPROM");
2563 /* eeprom values are invalid, generate random MAC */
2564 eth_hw_addr_random(dev);
2565 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2566 SMSC_TRACE(pdata, probe,
2567 "MAC Address is set to eth_random_addr");
2571 spin_unlock_irq(&pdata->mac_lock);
2573 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2577 out_unregister_netdev_5:
2578 unregister_netdev(dev);
2580 free_irq(dev->irq, dev);
2581 out_disable_resources:
2582 (void)smsc911x_disable_resources(pdev);
2583 out_enable_resources_fail:
2584 smsc911x_free_resources(pdev);
2585 out_request_resources_fail:
2586 iounmap(pdata->ioaddr);
2589 release_mem_region(res->start, resource_size(res));
2595 /* This implementation assumes the devices remains powered on its VDDVARIO
2596 * pins during suspend. */
2598 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2600 static int smsc911x_suspend(struct device *dev)
2602 struct net_device *ndev = dev_get_drvdata(dev);
2603 struct smsc911x_data *pdata = netdev_priv(ndev);
2605 /* enable wake on LAN, energy detection and the external PME
2607 smsc911x_reg_write(pdata, PMT_CTRL,
2608 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2609 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2614 static int smsc911x_resume(struct device *dev)
2616 struct net_device *ndev = dev_get_drvdata(dev);
2617 struct smsc911x_data *pdata = netdev_priv(ndev);
2618 unsigned int to = 100;
2620 /* Note 3.11 from the datasheet:
2621 * "When the LAN9220 is in a power saving state, a write of any
2622 * data to the BYTE_TEST register will wake-up the device."
2624 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2626 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2627 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2629 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2632 return (to == 0) ? -EIO : 0;
2635 static const struct dev_pm_ops smsc911x_pm_ops = {
2636 .suspend = smsc911x_suspend,
2637 .resume = smsc911x_resume,
2640 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2643 #define SMSC911X_PM_OPS NULL
2647 static const struct of_device_id smsc911x_dt_ids[] = {
2648 { .compatible = "smsc,lan9115", },
2651 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2654 static struct platform_driver smsc911x_driver = {
2655 .probe = smsc911x_drv_probe,
2656 .remove = smsc911x_drv_remove,
2658 .name = SMSC_CHIPNAME,
2659 .owner = THIS_MODULE,
2660 .pm = SMSC911X_PM_OPS,
2661 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2665 /* Entry point for loading the module */
2666 static int __init smsc911x_init_module(void)
2669 return platform_driver_register(&smsc911x_driver);
2672 /* entry point for unloading the module */
2673 static void __exit smsc911x_cleanup_module(void)
2675 platform_driver_unregister(&smsc911x_driver);
2678 module_init(smsc911x_init_module);
2679 module_exit(smsc911x_cleanup_module);