1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/vmalloc.h>
29 #include <linux/i2c.h>
30 #include <linux/mtd/mtd.h>
36 /**************************************************************************
40 **************************************************************************/
42 #define EFX_DRIVER_VERSION "4.0"
45 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
46 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
48 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
49 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
52 /**************************************************************************
56 **************************************************************************/
58 #define EFX_MAX_CHANNELS 32U
59 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
60 #define EFX_EXTRA_CHANNEL_IOV 0
61 #define EFX_EXTRA_CHANNEL_PTP 1
62 #define EFX_MAX_EXTRA_CHANNELS 2U
64 /* Checksum generation is a per-queue option in hardware, so each
65 * queue visible to the networking core is backed by two hardware TX
67 #define EFX_MAX_TX_TC 2
68 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
69 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
70 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
71 #define EFX_TXQ_TYPES 4
72 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
74 /* Maximum possible MTU the driver supports */
75 #define EFX_MAX_MTU (9 * 1024)
77 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
78 * and should be a multiple of the cache line size.
80 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
82 /* If possible, we should ensure cache line alignment at start and end
83 * of every buffer. Otherwise, we just need to ensure 4-byte
84 * alignment of the network header.
87 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
89 #define EFX_RX_BUF_ALIGNMENT 4
92 /* Forward declare Precision Time Protocol (PTP) support structure. */
94 struct hwtstamp_config;
96 struct efx_self_tests;
99 * struct efx_buffer - A general-purpose DMA buffer
100 * @addr: host base address of the buffer
101 * @dma_addr: DMA base address of the buffer
102 * @len: Buffer length, in bytes
104 * The NIC uses these buffers for its interrupt status registers and
114 * struct efx_special_buffer - DMA buffer entered into buffer table
115 * @buf: Standard &struct efx_buffer
116 * @index: Buffer index within controller;s buffer table
117 * @entries: Number of buffer table entries
119 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
120 * Event and descriptor rings are addressed via one or more buffer
121 * table entries (and so can be physically non-contiguous, although we
122 * currently do not take advantage of that). On Falcon and Siena we
123 * have to take care of allocating and initialising the entries
124 * ourselves. On later hardware this is managed by the firmware and
125 * @index and @entries are left as 0.
127 struct efx_special_buffer {
128 struct efx_buffer buf;
130 unsigned int entries;
134 * struct efx_tx_buffer - buffer state for a TX descriptor
135 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
136 * freed when descriptor completes
137 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
138 * freed when descriptor completes.
139 * @option: When @flags & %EFX_TX_BUF_OPTION, a NIC-specific option descriptor.
140 * @dma_addr: DMA address of the fragment.
141 * @flags: Flags for allocation and DMA mapping type
142 * @len: Length of this fragment.
143 * This field is zero when the queue slot is empty.
144 * @unmap_len: Length of this fragment to unmap
145 * @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping.
146 * Only valid if @unmap_len != 0.
148 struct efx_tx_buffer {
150 const struct sk_buff *skb;
157 unsigned short flags;
159 unsigned short unmap_len;
160 unsigned short dma_offset;
162 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
163 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
164 #define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
165 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
166 #define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */
169 * struct efx_tx_queue - An Efx TX queue
171 * This is a ring buffer of TX fragments.
172 * Since the TX completion path always executes on the same
173 * CPU and the xmit path can operate on different CPUs,
174 * performance is increased by ensuring that the completion
175 * path and the xmit path operate on different cache lines.
176 * This is particularly important if the xmit path is always
177 * executing on one CPU which is different from the completion
178 * path. There is also a cache line for members which are
179 * read but not written on the fast path.
181 * @efx: The associated Efx NIC
182 * @queue: DMA queue number
183 * @channel: The associated channel
184 * @core_txq: The networking core TX queue structure
185 * @buffer: The software buffer ring
186 * @tsoh_page: Array of pages of TSO header buffers
187 * @txd: The hardware descriptor ring
188 * @ptr_mask: The size of the ring minus 1.
189 * @piobuf: PIO buffer region for this TX queue (shared with its partner).
190 * Size of the region is efx_piobuf_size.
191 * @piobuf_offset: Buffer offset to be specified in PIO descriptors
192 * @initialised: Has hardware queue been initialised?
193 * @read_count: Current read pointer.
194 * This is the number of buffers that have been removed from both rings.
195 * @old_write_count: The value of @write_count when last checked.
196 * This is here for performance reasons. The xmit path will
197 * only get the up-to-date value of @write_count if this
198 * variable indicates that the queue is empty. This is to
199 * avoid cache-line ping-pong between the xmit path and the
201 * @merge_events: Number of TX merged completion events
202 * @insert_count: Current insert pointer
203 * This is the number of buffers that have been added to the
205 * @write_count: Current write pointer
206 * This is the number of buffers that have been added to the
208 * @old_read_count: The value of read_count when last checked.
209 * This is here for performance reasons. The xmit path will
210 * only get the up-to-date value of read_count if this
211 * variable indicates that the queue is full. This is to
212 * avoid cache-line ping-pong between the xmit path and the
214 * @tso_bursts: Number of times TSO xmit invoked by kernel
215 * @tso_long_headers: Number of packets with headers too long for standard
217 * @tso_packets: Number of packets via the TSO xmit path
218 * @pushes: Number of times the TX push feature has been used
219 * @pio_packets: Number of times the TX PIO feature has been used
220 * @empty_read_count: If the completion path has seen the queue as empty
221 * and the transmission path has not yet checked this, the value of
222 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
224 struct efx_tx_queue {
225 /* Members which don't change on the fast path */
226 struct efx_nic *efx ____cacheline_aligned_in_smp;
228 struct efx_channel *channel;
229 struct netdev_queue *core_txq;
230 struct efx_tx_buffer *buffer;
231 struct efx_buffer *tsoh_page;
232 struct efx_special_buffer txd;
233 unsigned int ptr_mask;
234 void __iomem *piobuf;
235 unsigned int piobuf_offset;
238 /* Members used mainly on the completion path */
239 unsigned int read_count ____cacheline_aligned_in_smp;
240 unsigned int old_write_count;
241 unsigned int merge_events;
243 /* Members used only on the xmit path */
244 unsigned int insert_count ____cacheline_aligned_in_smp;
245 unsigned int write_count;
246 unsigned int old_read_count;
247 unsigned int tso_bursts;
248 unsigned int tso_long_headers;
249 unsigned int tso_packets;
251 unsigned int pio_packets;
253 /* Members shared between paths and sometimes updated */
254 unsigned int empty_read_count ____cacheline_aligned_in_smp;
255 #define EFX_EMPTY_COUNT_VALID 0x80000000
256 atomic_t flush_outstanding;
260 * struct efx_rx_buffer - An Efx RX data buffer
261 * @dma_addr: DMA base address of the buffer
262 * @page: The associated page buffer.
263 * Will be %NULL if the buffer slot is currently free.
264 * @page_offset: If pending: offset in @page of DMA base address.
265 * If completed: offset in @page of Ethernet header.
266 * @len: If pending: length for DMA descriptor.
267 * If completed: received length, excluding hash prefix.
268 * @flags: Flags for buffer and packet state. These are only set on the
269 * first buffer of a scattered packet.
271 struct efx_rx_buffer {
278 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
279 #define EFX_RX_PKT_CSUMMED 0x0002
280 #define EFX_RX_PKT_DISCARD 0x0004
281 #define EFX_RX_PKT_TCP 0x0040
282 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */
285 * struct efx_rx_page_state - Page-based rx buffer state
287 * Inserted at the start of every page allocated for receive buffers.
288 * Used to facilitate sharing dma mappings between recycled rx buffers
289 * and those passed up to the kernel.
291 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
292 * When refcnt falls to zero, the page is unmapped for dma
293 * @dma_addr: The dma address of this page.
295 struct efx_rx_page_state {
299 unsigned int __pad[0] ____cacheline_aligned;
303 * struct efx_rx_queue - An Efx RX queue
304 * @efx: The associated Efx NIC
305 * @core_index: Index of network core RX queue. Will be >= 0 iff this
306 * is associated with a real RX queue.
307 * @buffer: The software buffer ring
308 * @rxd: The hardware descriptor ring
309 * @ptr_mask: The size of the ring minus 1.
310 * @refill_enabled: Enable refill whenever fill level is low
311 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
312 * @rxq_flush_pending.
313 * @added_count: Number of buffers added to the receive queue.
314 * @notified_count: Number of buffers given to NIC (<= @added_count).
315 * @removed_count: Number of buffers removed from the receive queue.
316 * @scatter_n: Used by NIC specific receive code.
317 * @scatter_len: Used by NIC specific receive code.
318 * @page_ring: The ring to store DMA mapped pages for reuse.
319 * @page_add: Counter to calculate the write pointer for the recycle ring.
320 * @page_remove: Counter to calculate the read pointer for the recycle ring.
321 * @page_recycle_count: The number of pages that have been recycled.
322 * @page_recycle_failed: The number of pages that couldn't be recycled because
323 * the kernel still held a reference to them.
324 * @page_recycle_full: The number of pages that were released because the
325 * recycle ring was full.
326 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
327 * @max_fill: RX descriptor maximum fill level (<= ring size)
328 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
330 * @min_fill: RX descriptor minimum non-zero fill level.
331 * This records the minimum fill level observed when a ring
332 * refill was triggered.
333 * @recycle_count: RX buffer recycle counter.
334 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
336 struct efx_rx_queue {
339 struct efx_rx_buffer *buffer;
340 struct efx_special_buffer rxd;
341 unsigned int ptr_mask;
345 unsigned int added_count;
346 unsigned int notified_count;
347 unsigned int removed_count;
348 unsigned int scatter_n;
349 unsigned int scatter_len;
350 struct page **page_ring;
351 unsigned int page_add;
352 unsigned int page_remove;
353 unsigned int page_recycle_count;
354 unsigned int page_recycle_failed;
355 unsigned int page_recycle_full;
356 unsigned int page_ptr_mask;
357 unsigned int max_fill;
358 unsigned int fast_fill_trigger;
359 unsigned int min_fill;
360 unsigned int min_overfill;
361 unsigned int recycle_count;
362 struct timer_list slow_fill;
363 unsigned int slow_fill_count;
366 enum efx_rx_alloc_method {
367 RX_ALLOC_METHOD_AUTO = 0,
368 RX_ALLOC_METHOD_SKB = 1,
369 RX_ALLOC_METHOD_PAGE = 2,
372 enum efx_sync_events_state {
373 SYNC_EVENTS_DISABLED = 0,
374 SYNC_EVENTS_QUIESCENT,
375 SYNC_EVENTS_REQUESTED,
380 * struct efx_channel - An Efx channel
382 * A channel comprises an event queue, at least one TX queue, at least
383 * one RX queue, and an associated tasklet for processing the event
386 * @efx: Associated Efx NIC
387 * @channel: Channel instance number
388 * @type: Channel type definition
389 * @eventq_init: Event queue initialised flag
390 * @enabled: Channel enabled indicator
391 * @irq: IRQ number (MSI and MSI-X only)
392 * @irq_moderation: IRQ moderation value (in hardware ticks)
393 * @napi_dev: Net device used with NAPI
394 * @napi_str: NAPI control structure
395 * @eventq: Event queue buffer
396 * @eventq_mask: Event queue pointer mask
397 * @eventq_read_ptr: Event queue read pointer
398 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
399 * @irq_count: Number of IRQs since last adaptive moderation decision
400 * @irq_mod_score: IRQ moderation score
401 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
402 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
403 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
404 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
405 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
406 * @n_rx_overlength: Count of RX_OVERLENGTH errors
407 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
408 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
409 * lack of descriptors
410 * @n_rx_merge_events: Number of RX merged completion events
411 * @n_rx_merge_packets: Number of RX packets completed by merged events
412 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
413 * __efx_rx_packet(), or zero if there is none
414 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
415 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
416 * @rx_queue: RX queue for this channel
417 * @tx_queue: TX queues for this channel
418 * @sync_events_state: Current state of sync events on this channel
419 * @sync_timestamp_major: Major part of the last ptp sync event
420 * @sync_timestamp_minor: Minor part of the last ptp sync event
425 const struct efx_channel_type *type;
429 unsigned int irq_moderation;
430 struct net_device *napi_dev;
431 struct napi_struct napi_str;
432 struct efx_special_buffer eventq;
433 unsigned int eventq_mask;
434 unsigned int eventq_read_ptr;
437 unsigned int irq_count;
438 unsigned int irq_mod_score;
439 #ifdef CONFIG_RFS_ACCEL
440 unsigned int rfs_filters_added;
443 unsigned n_rx_tobe_disc;
444 unsigned n_rx_ip_hdr_chksum_err;
445 unsigned n_rx_tcp_udp_chksum_err;
446 unsigned n_rx_mcast_mismatch;
447 unsigned n_rx_frm_trunc;
448 unsigned n_rx_overlength;
449 unsigned n_skbuff_leaks;
450 unsigned int n_rx_nodesc_trunc;
451 unsigned int n_rx_merge_events;
452 unsigned int n_rx_merge_packets;
454 unsigned int rx_pkt_n_frags;
455 unsigned int rx_pkt_index;
457 struct efx_rx_queue rx_queue;
458 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
460 enum efx_sync_events_state sync_events_state;
461 u32 sync_timestamp_major;
462 u32 sync_timestamp_minor;
466 * struct efx_msi_context - Context for each MSI
467 * @efx: The associated NIC
468 * @index: Index of the channel/IRQ
469 * @name: Name of the channel/IRQ
471 * Unlike &struct efx_channel, this is never reallocated and is always
472 * safe for the IRQ handler to access.
474 struct efx_msi_context {
477 char name[IFNAMSIZ + 6];
481 * struct efx_channel_type - distinguishes traffic and extra channels
482 * @handle_no_channel: Handle failure to allocate an extra channel
483 * @pre_probe: Set up extra state prior to initialisation
484 * @post_remove: Tear down extra state after finalisation, if allocated.
485 * May be called on channels that have not been probed.
486 * @get_name: Generate the channel's name (used for its IRQ handler)
487 * @copy: Copy the channel state prior to reallocation. May be %NULL if
488 * reallocation is not supported.
489 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
490 * @keep_eventq: Flag for whether event queue should be kept initialised
491 * while the device is stopped
493 struct efx_channel_type {
494 void (*handle_no_channel)(struct efx_nic *);
495 int (*pre_probe)(struct efx_channel *);
496 void (*post_remove)(struct efx_channel *);
497 void (*get_name)(struct efx_channel *, char *buf, size_t len);
498 struct efx_channel *(*copy)(const struct efx_channel *);
499 bool (*receive_skb)(struct efx_channel *, struct sk_buff *);
509 #define STRING_TABLE_LOOKUP(val, member) \
510 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
512 extern const char *const efx_loopback_mode_names[];
513 extern const unsigned int efx_loopback_mode_max;
514 #define LOOPBACK_MODE(efx) \
515 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
517 extern const char *const efx_reset_type_names[];
518 extern const unsigned int efx_reset_type_max;
519 #define RESET_TYPE(type) \
520 STRING_TABLE_LOOKUP(type, efx_reset_type)
523 /* Be careful if altering to correct macro below */
524 EFX_INT_MODE_MSIX = 0,
525 EFX_INT_MODE_MSI = 1,
526 EFX_INT_MODE_LEGACY = 2,
527 EFX_INT_MODE_MAX /* Insert any new items before this */
529 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
532 STATE_UNINIT = 0, /* device being probed/removed or is frozen */
533 STATE_READY = 1, /* hardware ready and netdev registered */
534 STATE_DISABLED = 2, /* device disabled due to hardware errors */
535 STATE_RECOVERY = 3, /* device recovering from PCI error */
538 /* Forward declaration */
541 /* Pseudo bit-mask flow control field */
542 #define EFX_FC_RX FLOW_CTRL_RX
543 #define EFX_FC_TX FLOW_CTRL_TX
544 #define EFX_FC_AUTO 4
547 * struct efx_link_state - Current state of the link
549 * @fd: Link is full-duplex
550 * @fc: Actual flow control flags
551 * @speed: Link speed (Mbps)
553 struct efx_link_state {
560 static inline bool efx_link_state_equal(const struct efx_link_state *left,
561 const struct efx_link_state *right)
563 return left->up == right->up && left->fd == right->fd &&
564 left->fc == right->fc && left->speed == right->speed;
568 * struct efx_phy_operations - Efx PHY operations table
569 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
570 * efx->loopback_modes.
571 * @init: Initialise PHY
572 * @fini: Shut down PHY
573 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
574 * @poll: Update @link_state and report whether it changed.
575 * Serialised by the mac_lock.
576 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
577 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
578 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
579 * (only needed where AN bit is set in mmds)
580 * @test_alive: Test that PHY is 'alive' (online)
581 * @test_name: Get the name of a PHY-specific test/result
582 * @run_tests: Run tests and record results as appropriate (offline).
583 * Flags are the ethtool tests flags.
585 struct efx_phy_operations {
586 int (*probe) (struct efx_nic *efx);
587 int (*init) (struct efx_nic *efx);
588 void (*fini) (struct efx_nic *efx);
589 void (*remove) (struct efx_nic *efx);
590 int (*reconfigure) (struct efx_nic *efx);
591 bool (*poll) (struct efx_nic *efx);
592 void (*get_settings) (struct efx_nic *efx,
593 struct ethtool_cmd *ecmd);
594 int (*set_settings) (struct efx_nic *efx,
595 struct ethtool_cmd *ecmd);
596 void (*set_npage_adv) (struct efx_nic *efx, u32);
597 int (*test_alive) (struct efx_nic *efx);
598 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
599 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
600 int (*get_module_eeprom) (struct efx_nic *efx,
601 struct ethtool_eeprom *ee,
603 int (*get_module_info) (struct efx_nic *efx,
604 struct ethtool_modinfo *modinfo);
608 * enum efx_phy_mode - PHY operating mode flags
609 * @PHY_MODE_NORMAL: on and should pass traffic
610 * @PHY_MODE_TX_DISABLED: on with TX disabled
611 * @PHY_MODE_LOW_POWER: set to low power through MDIO
612 * @PHY_MODE_OFF: switched off through external control
613 * @PHY_MODE_SPECIAL: on but will not pass traffic
617 PHY_MODE_TX_DISABLED = 1,
618 PHY_MODE_LOW_POWER = 2,
620 PHY_MODE_SPECIAL = 8,
623 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
625 return !!(mode & ~PHY_MODE_TX_DISABLED);
629 * struct efx_hw_stat_desc - Description of a hardware statistic
630 * @name: Name of the statistic as visible through ethtool, or %NULL if
631 * it should not be exposed
632 * @dma_width: Width in bits (0 for non-DMA statistics)
633 * @offset: Offset within stats (ignored for non-DMA statistics)
635 struct efx_hw_stat_desc {
641 /* Number of bits used in a multicast filter hash address */
642 #define EFX_MCAST_HASH_BITS 8
644 /* Number of (single-bit) entries in a multicast filter hash */
645 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
647 /* An Efx multicast filter hash */
648 union efx_multicast_hash {
649 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
650 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
657 * struct efx_nic - an Efx NIC
658 * @name: Device name (net device name or bus id before net device registered)
659 * @pci_dev: The PCI device
660 * @node: List node for maintaning primary/secondary function lists
661 * @primary: &struct efx_nic instance for the primary function of this
662 * controller. May be the same structure, and may be %NULL if no
663 * primary function is bound. Serialised by rtnl_lock.
664 * @secondary_list: List of &struct efx_nic instances for the secondary PCI
665 * functions of the controller, if this is for the primary function.
666 * Serialised by rtnl_lock.
667 * @type: Controller type attributes
668 * @legacy_irq: IRQ number
669 * @workqueue: Workqueue for port reconfigures and the HW monitor.
670 * Work items do not hold and must not acquire RTNL.
671 * @workqueue_name: Name of workqueue
672 * @reset_work: Scheduled reset workitem
673 * @membase_phys: Memory BAR value as physical address
674 * @membase: Memory BAR value
675 * @interrupt_mode: Interrupt mode
676 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
677 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
678 * @irq_rx_moderation: IRQ moderation time for RX event queues
679 * @msg_enable: Log message enable flags
680 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
681 * @reset_pending: Bitmask for pending resets
682 * @tx_queue: TX DMA queues
683 * @rx_queue: RX DMA queues
685 * @msi_context: Context for each MSI
686 * @extra_channel_types: Types of extra (non-traffic) channels that
687 * should be allocated for this NIC
688 * @rxq_entries: Size of receive queues requested by user.
689 * @txq_entries: Size of transmit queues requested by user.
690 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
691 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
692 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
693 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
694 * @sram_lim_qw: Qword address limit of SRAM
695 * @next_buffer_table: First available buffer table id
696 * @n_channels: Number of channels in use
697 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
698 * @n_tx_channels: Number of channels used for TX
699 * @rx_ip_align: RX DMA address offset to have IP header aligned in
700 * in accordance with NET_IP_ALIGN
701 * @rx_dma_len: Current maximum RX DMA length
702 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
703 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
704 * for use in sk_buff::truesize
705 * @rx_prefix_size: Size of RX prefix before packet data
706 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
707 * (valid only if @rx_prefix_size != 0; always negative)
708 * @rx_packet_len_offset: Offset of RX packet length from start of packet data
709 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative)
710 * @rx_packet_ts_offset: Offset of timestamp from start of packet data
711 * (valid only if channel->sync_timestamps_enabled; always negative)
712 * @rx_hash_key: Toeplitz hash key for RSS
713 * @rx_indir_table: Indirection table for RSS
714 * @rx_scatter: Scatter mode enabled for receives
715 * @int_error_count: Number of internal errors seen recently
716 * @int_error_expire: Time at which error count will be expired
717 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
718 * acknowledge but do nothing else.
719 * @irq_status: Interrupt status buffer
720 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
721 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
722 * @selftest_work: Work item for asynchronous self-test
723 * @mtd_list: List of MTDs attached to the NIC
724 * @nic_data: Hardware dependent state
725 * @mcdi: Management-Controller-to-Driver Interface state
726 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
727 * efx_monitor() and efx_reconfigure_port()
728 * @port_enabled: Port enabled indicator.
729 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
730 * efx_mac_work() with kernel interfaces. Safe to read under any
731 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
732 * be held to modify it.
733 * @port_initialized: Port initialized?
734 * @net_dev: Operating system network device. Consider holding the rtnl lock
735 * @stats_buffer: DMA buffer for statistics
736 * @phy_type: PHY type
737 * @phy_op: PHY interface
738 * @phy_data: PHY private data (including PHY-specific stats)
739 * @mdio: PHY MDIO interface
740 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
741 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
742 * @link_advertising: Autonegotiation advertising flags
743 * @link_state: Current state of the link
744 * @n_link_state_changes: Number of times the link has changed state
745 * @unicast_filter: Flag for Falcon-arch simple unicast filter.
746 * Protected by @mac_lock.
747 * @multicast_hash: Multicast hash table for Falcon-arch.
748 * Protected by @mac_lock.
749 * @wanted_fc: Wanted flow control flags
750 * @fc_disable: When non-zero flow control is disabled. Typically used to
751 * ensure that network back pressure doesn't delay dma queue flushes.
752 * Serialised by the rtnl lock.
753 * @mac_work: Work item for changing MAC promiscuity and multicast hash
754 * @loopback_mode: Loopback status
755 * @loopback_modes: Supported loopback mode bitmask
756 * @loopback_selftest: Offline self-test private state
757 * @filter_lock: Filter table lock
758 * @filter_state: Architecture-dependent filter table state
759 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS,
760 * indexed by filter ID
761 * @rps_expire_index: Next index to check for expiry in @rps_flow_id
762 * @active_queues: Count of RX and TX queues that haven't been flushed and drained.
763 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
764 * Decremented when the efx_flush_rx_queue() is called.
765 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
766 * completed (either success or failure). Not used when MCDI is used to
767 * flush receive queues.
768 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
769 * @vf: Array of &struct efx_vf objects.
770 * @vf_count: Number of VFs intended to be enabled.
771 * @vf_init_count: Number of VFs that have been fully initialised.
772 * @vi_scale: log2 number of vnics per VF.
773 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
774 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
775 * @local_addr_list: List of local addresses. Protected by %local_lock.
776 * @local_page_list: List of DMA addressable pages used to broadcast
777 * %local_addr_list. Protected by %local_lock.
778 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
779 * @peer_work: Work item to broadcast peer addresses to VMs.
780 * @ptp_data: PTP state data
781 * @vpd_sn: Serial number read from VPD
782 * @monitor_work: Hardware monitor workitem
783 * @biu_lock: BIU (bus interface unit) lock
784 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
785 * field is used by efx_test_interrupts() to verify that an
786 * interrupt has occurred.
787 * @stats_lock: Statistics update lock. Must be held when calling
788 * efx_nic_type::{update,start,stop}_stats.
790 * This is stored in the private area of the &struct net_device.
793 /* The following fields should be written very rarely */
796 struct list_head node;
797 struct efx_nic *primary;
798 struct list_head secondary_list;
799 struct pci_dev *pci_dev;
800 unsigned int port_num;
801 const struct efx_nic_type *type;
803 bool eeh_disabled_legacy_irq;
804 struct workqueue_struct *workqueue;
805 char workqueue_name[16];
806 struct work_struct reset_work;
807 resource_size_t membase_phys;
808 void __iomem *membase;
810 enum efx_int_mode interrupt_mode;
811 unsigned int timer_quantum_ns;
812 bool irq_rx_adaptive;
813 unsigned int irq_rx_moderation;
816 enum nic_state state;
817 unsigned long reset_pending;
819 struct efx_channel *channel[EFX_MAX_CHANNELS];
820 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
821 const struct efx_channel_type *
822 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
824 unsigned rxq_entries;
825 unsigned txq_entries;
826 unsigned int txq_stop_thresh;
827 unsigned int txq_wake_thresh;
831 unsigned sram_lim_qw;
832 unsigned next_buffer_table;
834 unsigned int max_channels;
836 unsigned n_rx_channels;
838 unsigned tx_channel_offset;
839 unsigned n_tx_channels;
840 unsigned int rx_ip_align;
841 unsigned int rx_dma_len;
842 unsigned int rx_buffer_order;
843 unsigned int rx_buffer_truesize;
844 unsigned int rx_page_buf_step;
845 unsigned int rx_bufs_per_page;
846 unsigned int rx_pages_per_batch;
847 unsigned int rx_prefix_size;
848 int rx_packet_hash_offset;
849 int rx_packet_len_offset;
850 int rx_packet_ts_offset;
852 u32 rx_indir_table[128];
855 unsigned int_error_count;
856 unsigned long int_error_expire;
858 bool irq_soft_enabled;
859 struct efx_buffer irq_status;
860 unsigned irq_zero_count;
862 struct delayed_work selftest_work;
864 #ifdef CONFIG_SFC_MTD
865 struct list_head mtd_list;
869 struct efx_mcdi_data *mcdi;
871 struct mutex mac_lock;
872 struct work_struct mac_work;
875 bool mc_bist_for_other_fn;
876 bool port_initialized;
877 struct net_device *net_dev;
879 struct efx_buffer stats_buffer;
880 u64 rx_nodesc_drops_total;
881 u64 rx_nodesc_drops_while_down;
882 bool rx_nodesc_drops_prev_state;
884 unsigned int phy_type;
885 const struct efx_phy_operations *phy_op;
887 struct mdio_if_info mdio;
888 unsigned int mdio_bus;
889 enum efx_phy_mode phy_mode;
891 u32 link_advertising;
892 struct efx_link_state link_state;
893 unsigned int n_link_state_changes;
896 union efx_multicast_hash multicast_hash;
901 enum efx_loopback_mode loopback_mode;
904 void *loopback_selftest;
906 spinlock_t filter_lock;
908 #ifdef CONFIG_RFS_ACCEL
910 unsigned int rps_expire_index;
913 atomic_t active_queues;
914 atomic_t rxq_flush_pending;
915 atomic_t rxq_flush_outstanding;
916 wait_queue_head_t flush_wq;
918 #ifdef CONFIG_SFC_SRIOV
919 struct efx_channel *vfdi_channel;
922 unsigned vf_init_count;
924 unsigned vf_buftbl_base;
925 struct efx_buffer vfdi_status;
926 struct list_head local_addr_list;
927 struct list_head local_page_list;
928 struct mutex local_lock;
929 struct work_struct peer_work;
932 struct efx_ptp_data *ptp_data;
936 /* The following fields may be written more often */
938 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
941 spinlock_t stats_lock;
944 static inline int efx_dev_registered(struct efx_nic *efx)
946 return efx->net_dev->reg_state == NETREG_REGISTERED;
949 static inline unsigned int efx_port_num(struct efx_nic *efx)
951 return efx->port_num;
954 struct efx_mtd_partition {
955 struct list_head node;
957 const char *dev_type_name;
958 const char *type_name;
959 char name[IFNAMSIZ + 20];
963 * struct efx_nic_type - Efx device type definition
964 * @mem_map_size: Get memory BAR mapped size
965 * @probe: Probe the controller
966 * @remove: Free resources allocated by probe()
967 * @init: Initialise the controller
968 * @dimension_resources: Dimension controller resources (buffer table,
969 * and VIs once the available interrupt resources are clear)
970 * @fini: Shut down the controller
971 * @monitor: Periodic function for polling link state and hardware monitor
972 * @map_reset_reason: Map ethtool reset reason to a reset method
973 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
974 * @reset: Reset the controller hardware and possibly the PHY. This will
975 * be called while the controller is uninitialised.
976 * @probe_port: Probe the MAC and PHY
977 * @remove_port: Free resources allocated by probe_port()
978 * @handle_global_event: Handle a "global" event (may be %NULL)
979 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
980 * @prepare_flush: Prepare the hardware for flushing the DMA queues
981 * (for Falcon architecture)
982 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
984 * @describe_stats: Describe statistics for ethtool
985 * @update_stats: Update statistics not provided by event handling.
986 * Either argument may be %NULL.
987 * @start_stats: Start the regular fetching of statistics
988 * @pull_stats: Pull stats from the NIC and wait until they arrive.
989 * @stop_stats: Stop the regular fetching of statistics
990 * @set_id_led: Set state of identifying LED or revert to automatic function
991 * @push_irq_moderation: Apply interrupt moderation value
992 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
993 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
994 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
995 * to the hardware. Serialised by the mac_lock.
996 * @check_mac_fault: Check MAC fault state. True if fault present.
997 * @get_wol: Get WoL configuration from driver state
998 * @set_wol: Push WoL configuration to the NIC
999 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
1000 * @test_chip: Test registers. May use efx_farch_test_registers(), and is
1001 * expected to reset the NIC.
1002 * @test_nvram: Test validity of NVRAM contents
1003 * @mcdi_request: Send an MCDI request with the given header and SDU.
1004 * The SDU length may be any value from 0 up to the protocol-
1005 * defined maximum, but its buffer will be padded to a multiple
1007 * @mcdi_poll_response: Test whether an MCDI response is available.
1008 * @mcdi_read_response: Read the MCDI response PDU. The offset will
1009 * be a multiple of 4. The length may not be, but the buffer
1010 * will be padded so it is safe to round up.
1011 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
1012 * return an appropriate error code for aborting any current
1013 * request; otherwise return 0.
1014 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
1015 * be separately enabled after this.
1016 * @irq_test_generate: Generate a test IRQ
1017 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
1018 * queue must be separately disabled before this.
1019 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is
1020 * a pointer to the &struct efx_msi_context for the channel.
1021 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument
1022 * is a pointer to the &struct efx_nic.
1023 * @tx_probe: Allocate resources for TX queue
1024 * @tx_init: Initialise TX queue on the NIC
1025 * @tx_remove: Free resources for TX queue
1026 * @tx_write: Write TX descriptors and doorbell
1027 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC
1028 * @rx_probe: Allocate resources for RX queue
1029 * @rx_init: Initialise RX queue on the NIC
1030 * @rx_remove: Free resources for RX queue
1031 * @rx_write: Write RX descriptors and doorbell
1032 * @rx_defer_refill: Generate a refill reminder event
1033 * @ev_probe: Allocate resources for event queue
1034 * @ev_init: Initialise event queue on the NIC
1035 * @ev_fini: Deinitialise event queue on the NIC
1036 * @ev_remove: Free resources for event queue
1037 * @ev_process: Process events for a queue, up to the given NAPI quota
1038 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
1039 * @ev_test_generate: Generate a test event
1040 * @filter_table_probe: Probe filter capabilities and set up filter software state
1041 * @filter_table_restore: Restore filters removed from hardware
1042 * @filter_table_remove: Remove filters from hardware and tear down software state
1043 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1044 * @filter_insert: add or replace a filter
1045 * @filter_remove_safe: remove a filter by ID, carefully
1046 * @filter_get_safe: retrieve a filter by ID, carefully
1047 * @filter_clear_rx: remove RX filters by priority
1048 * @filter_count_rx_used: Get the number of filters in use at a given priority
1049 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1
1050 * @filter_get_rx_ids: Get list of RX filters at a given priority
1051 * @filter_rfs_insert: Add or replace a filter for RFS. This must be
1052 * atomic. The hardware change may be asynchronous but should
1053 * not be delayed for long. It may fail if this can't be done
1055 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS.
1056 * This must check whether the specified table entry is used by RFS
1057 * and that rps_may_expire_flow() returns true for it.
1058 * @mtd_probe: Probe and add MTD partitions associated with this net device,
1059 * using efx_mtd_add()
1060 * @mtd_rename: Set an MTD partition name using the net device name
1061 * @mtd_read: Read from an MTD partition
1062 * @mtd_erase: Erase part of an MTD partition
1063 * @mtd_write: Write to an MTD partition
1064 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1065 * also notifies the driver that a writer has finished using this
1067 * @ptp_write_host_time: Send host time to MC as part of sync protocol
1068 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX
1069 * timestamping, possibly only temporarily for the purposes of a reset.
1070 * @ptp_set_ts_config: Set hardware timestamp configuration. The flags
1071 * and tx_type will already have been validated but this operation
1072 * must validate and update rx_filter.
1073 * @revision: Hardware architecture revision
1074 * @txd_ptr_tbl_base: TX descriptor ring base address
1075 * @rxd_ptr_tbl_base: RX descriptor ring base address
1076 * @buf_tbl_base: Buffer table base address
1077 * @evq_ptr_tbl_base: Event queue pointer table base address
1078 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1079 * @max_dma_mask: Maximum possible DMA mask
1080 * @rx_prefix_size: Size of RX prefix before packet data
1081 * @rx_hash_offset: Offset of RX flow hash within prefix
1082 * @rx_ts_offset: Offset of timestamp within prefix
1083 * @rx_buffer_padding: Size of padding at end of RX packet
1084 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers
1085 * @always_rx_scatter: NIC will always scatter packets to multiple buffers
1086 * @max_interrupt_mode: Highest capability interrupt mode supported
1087 * from &enum efx_init_mode.
1088 * @timer_period_max: Maximum period of interrupt timer (in ticks)
1089 * @offload_features: net_device feature flags for protocol offload
1090 * features implemented in hardware
1091 * @mcdi_max_ver: Maximum MCDI version supported
1092 * @hwtstamp_filters: Mask of hardware timestamp filter types supported
1094 struct efx_nic_type {
1095 unsigned int (*mem_map_size)(struct efx_nic *efx);
1096 int (*probe)(struct efx_nic *efx);
1097 void (*remove)(struct efx_nic *efx);
1098 int (*init)(struct efx_nic *efx);
1099 int (*dimension_resources)(struct efx_nic *efx);
1100 void (*fini)(struct efx_nic *efx);
1101 void (*monitor)(struct efx_nic *efx);
1102 enum reset_type (*map_reset_reason)(enum reset_type reason);
1103 int (*map_reset_flags)(u32 *flags);
1104 int (*reset)(struct efx_nic *efx, enum reset_type method);
1105 int (*probe_port)(struct efx_nic *efx);
1106 void (*remove_port)(struct efx_nic *efx);
1107 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
1108 int (*fini_dmaq)(struct efx_nic *efx);
1109 void (*prepare_flush)(struct efx_nic *efx);
1110 void (*finish_flush)(struct efx_nic *efx);
1111 size_t (*describe_stats)(struct efx_nic *efx, u8 *names);
1112 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,
1113 struct rtnl_link_stats64 *core_stats);
1114 void (*start_stats)(struct efx_nic *efx);
1115 void (*pull_stats)(struct efx_nic *efx);
1116 void (*stop_stats)(struct efx_nic *efx);
1117 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
1118 void (*push_irq_moderation)(struct efx_channel *channel);
1119 int (*reconfigure_port)(struct efx_nic *efx);
1120 void (*prepare_enable_fc_tx)(struct efx_nic *efx);
1121 int (*reconfigure_mac)(struct efx_nic *efx);
1122 bool (*check_mac_fault)(struct efx_nic *efx);
1123 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
1124 int (*set_wol)(struct efx_nic *efx, u32 type);
1125 void (*resume_wol)(struct efx_nic *efx);
1126 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests);
1127 int (*test_nvram)(struct efx_nic *efx);
1128 void (*mcdi_request)(struct efx_nic *efx,
1129 const efx_dword_t *hdr, size_t hdr_len,
1130 const efx_dword_t *sdu, size_t sdu_len);
1131 bool (*mcdi_poll_response)(struct efx_nic *efx);
1132 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu,
1133 size_t pdu_offset, size_t pdu_len);
1134 int (*mcdi_poll_reboot)(struct efx_nic *efx);
1135 void (*irq_enable_master)(struct efx_nic *efx);
1136 void (*irq_test_generate)(struct efx_nic *efx);
1137 void (*irq_disable_non_ev)(struct efx_nic *efx);
1138 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id);
1139 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id);
1140 int (*tx_probe)(struct efx_tx_queue *tx_queue);
1141 void (*tx_init)(struct efx_tx_queue *tx_queue);
1142 void (*tx_remove)(struct efx_tx_queue *tx_queue);
1143 void (*tx_write)(struct efx_tx_queue *tx_queue);
1144 void (*rx_push_rss_config)(struct efx_nic *efx);
1145 int (*rx_probe)(struct efx_rx_queue *rx_queue);
1146 void (*rx_init)(struct efx_rx_queue *rx_queue);
1147 void (*rx_remove)(struct efx_rx_queue *rx_queue);
1148 void (*rx_write)(struct efx_rx_queue *rx_queue);
1149 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue);
1150 int (*ev_probe)(struct efx_channel *channel);
1151 int (*ev_init)(struct efx_channel *channel);
1152 void (*ev_fini)(struct efx_channel *channel);
1153 void (*ev_remove)(struct efx_channel *channel);
1154 int (*ev_process)(struct efx_channel *channel, int quota);
1155 void (*ev_read_ack)(struct efx_channel *channel);
1156 void (*ev_test_generate)(struct efx_channel *channel);
1157 int (*filter_table_probe)(struct efx_nic *efx);
1158 void (*filter_table_restore)(struct efx_nic *efx);
1159 void (*filter_table_remove)(struct efx_nic *efx);
1160 void (*filter_update_rx_scatter)(struct efx_nic *efx);
1161 s32 (*filter_insert)(struct efx_nic *efx,
1162 struct efx_filter_spec *spec, bool replace);
1163 int (*filter_remove_safe)(struct efx_nic *efx,
1164 enum efx_filter_priority priority,
1166 int (*filter_get_safe)(struct efx_nic *efx,
1167 enum efx_filter_priority priority,
1168 u32 filter_id, struct efx_filter_spec *);
1169 void (*filter_clear_rx)(struct efx_nic *efx,
1170 enum efx_filter_priority priority);
1171 u32 (*filter_count_rx_used)(struct efx_nic *efx,
1172 enum efx_filter_priority priority);
1173 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx);
1174 s32 (*filter_get_rx_ids)(struct efx_nic *efx,
1175 enum efx_filter_priority priority,
1176 u32 *buf, u32 size);
1177 #ifdef CONFIG_RFS_ACCEL
1178 s32 (*filter_rfs_insert)(struct efx_nic *efx,
1179 struct efx_filter_spec *spec);
1180 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id,
1181 unsigned int index);
1183 #ifdef CONFIG_SFC_MTD
1184 int (*mtd_probe)(struct efx_nic *efx);
1185 void (*mtd_rename)(struct efx_mtd_partition *part);
1186 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len,
1187 size_t *retlen, u8 *buffer);
1188 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len);
1189 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len,
1190 size_t *retlen, const u8 *buffer);
1191 int (*mtd_sync)(struct mtd_info *mtd);
1193 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time);
1194 int (*ptp_set_ts_sync_events)(struct efx_nic *efx, bool en, bool temp);
1195 int (*ptp_set_ts_config)(struct efx_nic *efx,
1196 struct hwtstamp_config *init);
1199 unsigned int txd_ptr_tbl_base;
1200 unsigned int rxd_ptr_tbl_base;
1201 unsigned int buf_tbl_base;
1202 unsigned int evq_ptr_tbl_base;
1203 unsigned int evq_rptr_tbl_base;
1205 unsigned int rx_prefix_size;
1206 unsigned int rx_hash_offset;
1207 unsigned int rx_ts_offset;
1208 unsigned int rx_buffer_padding;
1209 bool can_rx_scatter;
1210 bool always_rx_scatter;
1211 unsigned int max_interrupt_mode;
1212 unsigned int timer_period_max;
1213 netdev_features_t offload_features;
1215 unsigned int max_rx_ip_filters;
1216 u32 hwtstamp_filters;
1219 /**************************************************************************
1221 * Prototypes and inline functions
1223 *************************************************************************/
1225 static inline struct efx_channel *
1226 efx_get_channel(struct efx_nic *efx, unsigned index)
1228 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
1229 return efx->channel[index];
1232 /* Iterate over all used channels */
1233 #define efx_for_each_channel(_channel, _efx) \
1234 for (_channel = (_efx)->channel[0]; \
1236 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1237 (_efx)->channel[_channel->channel + 1] : NULL)
1239 /* Iterate over all used channels in reverse */
1240 #define efx_for_each_channel_rev(_channel, _efx) \
1241 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1243 _channel = _channel->channel ? \
1244 (_efx)->channel[_channel->channel - 1] : NULL)
1246 static inline struct efx_tx_queue *
1247 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1249 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1250 type >= EFX_TXQ_TYPES);
1251 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
1254 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1256 return channel->channel - channel->efx->tx_channel_offset <
1257 channel->efx->n_tx_channels;
1260 static inline struct efx_tx_queue *
1261 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1263 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
1264 type >= EFX_TXQ_TYPES);
1265 return &channel->tx_queue[type];
1268 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1270 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1271 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1274 /* Iterate over all TX queues belonging to a channel */
1275 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1276 if (!efx_channel_has_tx_queues(_channel)) \
1279 for (_tx_queue = (_channel)->tx_queue; \
1280 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1281 efx_tx_queue_used(_tx_queue); \
1284 /* Iterate over all possible TX queues belonging to a channel */
1285 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1286 if (!efx_channel_has_tx_queues(_channel)) \
1289 for (_tx_queue = (_channel)->tx_queue; \
1290 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1293 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1295 return channel->rx_queue.core_index >= 0;
1298 static inline struct efx_rx_queue *
1299 efx_channel_get_rx_queue(struct efx_channel *channel)
1301 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1302 return &channel->rx_queue;
1305 /* Iterate over all RX queues belonging to a channel */
1306 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1307 if (!efx_channel_has_rx_queue(_channel)) \
1310 for (_rx_queue = &(_channel)->rx_queue; \
1314 static inline struct efx_channel *
1315 efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1317 return container_of(rx_queue, struct efx_channel, rx_queue);
1320 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1322 return efx_rx_queue_channel(rx_queue)->channel;
1325 /* Returns a pointer to the specified receive buffer in the RX
1328 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1331 return &rx_queue->buffer[index];
1336 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1338 * This calculates the maximum frame length that will be used for a
1339 * given MTU. The frame length will be equal to the MTU plus a
1340 * constant amount of header space and padding. This is the quantity
1341 * that the net driver will program into the MAC as the maximum frame
1344 * The 10G MAC requires 8-byte alignment on the frame
1345 * length, so we round up to the nearest 8.
1347 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1348 * XGMII cycle). If the frame length reaches the maximum value in the
1349 * same cycle, the XMAC can miss the IPG altogether. We work around
1350 * this by adding a further 16 bytes.
1352 #define EFX_MAX_FRAME_LEN(mtu) \
1353 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1355 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb)
1357 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1359 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb)
1361 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1364 #endif /* EFX_NET_DRIVER_H */