1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2008-2013 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 #include <linux/delay.h>
11 #include <asm/cmpxchg.h>
12 #include "net_driver.h"
15 #include "farch_regs.h"
16 #include "mcdi_pcol.h"
19 /**************************************************************************
21 * Management-Controller-to-Driver Interface
23 **************************************************************************
26 #define MCDI_RPC_TIMEOUT (10 * HZ)
28 /* A reboot/assertion causes the MCDI status word to be set after the
29 * command word is set or a REBOOT event is sent. If we notice a reboot
30 * via these mechanisms then wait 250ms for the status word to be set.
32 #define MCDI_STATUS_DELAY_US 100
33 #define MCDI_STATUS_DELAY_COUNT 2500
34 #define MCDI_STATUS_SLEEP_MS \
35 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
38 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
40 struct efx_mcdi_async_param {
41 struct list_head list;
46 efx_mcdi_async_completer *complete;
48 /* followed by request/response buffer */
51 static void efx_mcdi_timeout_async(unsigned long context);
52 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
53 bool *was_attached_out);
54 static bool efx_mcdi_poll_once(struct efx_nic *efx);
56 static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
58 EFX_BUG_ON_PARANOID(!efx->mcdi);
59 return &efx->mcdi->iface;
62 int efx_mcdi_init(struct efx_nic *efx)
64 struct efx_mcdi_iface *mcdi;
65 bool already_attached;
68 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
74 init_waitqueue_head(&mcdi->wq);
75 spin_lock_init(&mcdi->iface_lock);
76 mcdi->state = MCDI_STATE_QUIESCENT;
77 mcdi->mode = MCDI_MODE_POLL;
78 spin_lock_init(&mcdi->async_lock);
79 INIT_LIST_HEAD(&mcdi->async_list);
80 setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
83 (void) efx_mcdi_poll_reboot(efx);
84 mcdi->new_epoch = true;
86 /* Recover from a failed assertion before probing */
87 rc = efx_mcdi_handle_assertion(efx);
91 /* Let the MC (and BMC, if this is a LOM) know that the driver
92 * is loaded. We should do this before we reset the NIC.
94 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
96 netif_err(efx, probe, efx->net_dev,
97 "Unable to register driver with MCPU\n");
100 if (already_attached)
101 /* Not a fatal error */
102 netif_err(efx, probe, efx->net_dev,
103 "Host already registered with MCPU\n");
108 void efx_mcdi_fini(struct efx_nic *efx)
113 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
115 /* Relinquish the device (back to the BMC, if this is a LOM) */
116 efx_mcdi_drv_attach(efx, false, NULL);
121 static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
122 const efx_dword_t *inbuf, size_t inlen)
124 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
129 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
131 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
132 spin_lock_bh(&mcdi->iface_lock);
134 spin_unlock_bh(&mcdi->iface_lock);
136 seqno = mcdi->seqno & SEQ_MASK;
138 if (mcdi->mode == MCDI_MODE_EVENTS)
139 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
141 if (efx->type->mcdi_max_ver == 1) {
143 EFX_POPULATE_DWORD_7(hdr[0],
144 MCDI_HEADER_RESPONSE, 0,
145 MCDI_HEADER_RESYNC, 1,
146 MCDI_HEADER_CODE, cmd,
147 MCDI_HEADER_DATALEN, inlen,
148 MCDI_HEADER_SEQ, seqno,
149 MCDI_HEADER_XFLAGS, xflags,
150 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
154 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
155 EFX_POPULATE_DWORD_7(hdr[0],
156 MCDI_HEADER_RESPONSE, 0,
157 MCDI_HEADER_RESYNC, 1,
158 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
159 MCDI_HEADER_DATALEN, 0,
160 MCDI_HEADER_SEQ, seqno,
161 MCDI_HEADER_XFLAGS, xflags,
162 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
163 EFX_POPULATE_DWORD_2(hdr[1],
164 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
165 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
169 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
171 mcdi->new_epoch = false;
174 static int efx_mcdi_errno(unsigned int mcdi_err)
179 #define TRANSLATE_ERROR(name) \
180 case MC_CMD_ERR_ ## name: \
182 TRANSLATE_ERROR(EPERM);
183 TRANSLATE_ERROR(ENOENT);
184 TRANSLATE_ERROR(EINTR);
185 TRANSLATE_ERROR(EAGAIN);
186 TRANSLATE_ERROR(EACCES);
187 TRANSLATE_ERROR(EBUSY);
188 TRANSLATE_ERROR(EINVAL);
189 TRANSLATE_ERROR(EDEADLK);
190 TRANSLATE_ERROR(ENOSYS);
191 TRANSLATE_ERROR(ETIME);
192 TRANSLATE_ERROR(EALREADY);
193 TRANSLATE_ERROR(ENOSPC);
194 #undef TRANSLATE_ERROR
195 case MC_CMD_ERR_ENOTSUP:
197 case MC_CMD_ERR_ALLOC_FAIL:
199 case MC_CMD_ERR_MAC_EXIST:
206 static void efx_mcdi_read_response_header(struct efx_nic *efx)
208 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
209 unsigned int respseq, respcmd, error;
212 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
213 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
214 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
215 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
217 if (respcmd != MC_CMD_V2_EXTN) {
218 mcdi->resp_hdr_len = 4;
219 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
221 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
222 mcdi->resp_hdr_len = 8;
223 mcdi->resp_data_len =
224 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
227 if (error && mcdi->resp_data_len == 0) {
228 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
230 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
231 netif_err(efx, hw, efx->net_dev,
232 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
233 respseq, mcdi->seqno);
236 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
238 efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
244 static bool efx_mcdi_poll_once(struct efx_nic *efx)
246 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
249 if (!efx->type->mcdi_poll_response(efx))
252 spin_lock_bh(&mcdi->iface_lock);
253 efx_mcdi_read_response_header(efx);
254 spin_unlock_bh(&mcdi->iface_lock);
259 static int efx_mcdi_poll(struct efx_nic *efx)
261 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
262 unsigned long time, finish;
266 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
267 rc = efx_mcdi_poll_reboot(efx);
269 spin_lock_bh(&mcdi->iface_lock);
271 mcdi->resp_hdr_len = 0;
272 mcdi->resp_data_len = 0;
273 spin_unlock_bh(&mcdi->iface_lock);
277 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
278 * because generally mcdi responses are fast. After that, back off
279 * and poll once a jiffy (approximately)
282 finish = jiffies + MCDI_RPC_TIMEOUT;
289 schedule_timeout_uninterruptible(1);
294 if (efx_mcdi_poll_once(efx))
297 if (time_after(time, finish))
301 /* Return rc=0 like wait_event_timeout() */
305 /* Test and clear MC-rebooted flag for this port/function; reset
306 * software state as necessary.
308 int efx_mcdi_poll_reboot(struct efx_nic *efx)
313 return efx->type->mcdi_poll_reboot(efx);
316 static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
318 return cmpxchg(&mcdi->state,
319 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
320 MCDI_STATE_QUIESCENT;
323 static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
325 /* Wait until the interface becomes QUIESCENT and we win the race
326 * to mark it RUNNING_SYNC.
329 cmpxchg(&mcdi->state,
330 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
331 MCDI_STATE_QUIESCENT);
334 static int efx_mcdi_await_completion(struct efx_nic *efx)
336 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
338 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
339 MCDI_RPC_TIMEOUT) == 0)
342 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
343 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
344 * completed the request first, then we'll just end up completing the
345 * request again, which is safe.
347 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
348 * wait_event_timeout() implicitly provides.
350 if (mcdi->mode == MCDI_MODE_POLL)
351 return efx_mcdi_poll(efx);
356 /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
357 * requester. Return whether this was done. Does not take any locks.
359 static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
361 if (cmpxchg(&mcdi->state,
362 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
363 MCDI_STATE_RUNNING_SYNC) {
371 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
373 if (mcdi->mode == MCDI_MODE_EVENTS) {
374 struct efx_mcdi_async_param *async;
375 struct efx_nic *efx = mcdi->efx;
377 /* Process the asynchronous request queue */
378 spin_lock_bh(&mcdi->async_lock);
379 async = list_first_entry_or_null(
380 &mcdi->async_list, struct efx_mcdi_async_param, list);
382 mcdi->state = MCDI_STATE_RUNNING_ASYNC;
383 efx_mcdi_send_request(efx, async->cmd,
384 (const efx_dword_t *)(async + 1),
386 mod_timer(&mcdi->async_timer,
387 jiffies + MCDI_RPC_TIMEOUT);
389 spin_unlock_bh(&mcdi->async_lock);
395 mcdi->state = MCDI_STATE_QUIESCENT;
399 /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
400 * asynchronous completion function, and release the interface.
401 * Return whether this was done. Must be called in bh-disabled
402 * context. Will take iface_lock and async_lock.
404 static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
406 struct efx_nic *efx = mcdi->efx;
407 struct efx_mcdi_async_param *async;
408 size_t hdr_len, data_len, err_len;
410 MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
413 if (cmpxchg(&mcdi->state,
414 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
415 MCDI_STATE_RUNNING_ASYNC)
418 spin_lock(&mcdi->iface_lock);
420 /* Ensure that if the completion event arrives later,
421 * the seqno check in efx_mcdi_ev_cpl() will fail
430 hdr_len = mcdi->resp_hdr_len;
431 data_len = mcdi->resp_data_len;
433 spin_unlock(&mcdi->iface_lock);
435 /* Stop the timer. In case the timer function is running, we
436 * must wait for it to return so that there is no possibility
437 * of it aborting the next request.
440 del_timer_sync(&mcdi->async_timer);
442 spin_lock(&mcdi->async_lock);
443 async = list_first_entry(&mcdi->async_list,
444 struct efx_mcdi_async_param, list);
445 list_del(&async->list);
446 spin_unlock(&mcdi->async_lock);
448 outbuf = (efx_dword_t *)(async + 1);
449 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
450 min(async->outlen, data_len));
451 if (!timeout && rc && !async->quiet) {
452 err_len = min(sizeof(errbuf), data_len);
453 efx->type->mcdi_read_response(efx, errbuf, hdr_len,
455 efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
458 async->complete(efx, async->cookie, rc, outbuf, data_len);
461 efx_mcdi_release(mcdi);
466 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
467 unsigned int datalen, unsigned int mcdi_err)
469 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
472 spin_lock(&mcdi->iface_lock);
474 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
476 /* The request has been cancelled */
479 netif_err(efx, hw, efx->net_dev,
480 "MC response mismatch tx seq 0x%x rx "
481 "seq 0x%x\n", seqno, mcdi->seqno);
483 if (efx->type->mcdi_max_ver >= 2) {
484 /* MCDI v2 responses don't fit in an event */
485 efx_mcdi_read_response_header(efx);
487 mcdi->resprc = efx_mcdi_errno(mcdi_err);
488 mcdi->resp_hdr_len = 4;
489 mcdi->resp_data_len = datalen;
495 spin_unlock(&mcdi->iface_lock);
498 if (!efx_mcdi_complete_async(mcdi, false))
499 (void) efx_mcdi_complete_sync(mcdi);
501 /* If the interface isn't RUNNING_ASYNC or
502 * RUNNING_SYNC then we've received a duplicate
503 * completion after we've already transitioned back to
504 * QUIESCENT. [A subsequent invocation would increment
505 * seqno, so would have failed the seqno check].
510 static void efx_mcdi_timeout_async(unsigned long context)
512 struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
514 efx_mcdi_complete_async(mcdi, true);
518 efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
520 if (efx->type->mcdi_max_ver < 0 ||
521 (efx->type->mcdi_max_ver < 2 &&
522 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
525 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
526 (efx->type->mcdi_max_ver < 2 &&
527 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
533 static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
534 efx_dword_t *outbuf, size_t outlen,
535 size_t *outlen_actual, bool quiet)
537 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
538 MCDI_DECLARE_BUF_OUT_OR_ERR(errbuf, 0);
541 if (mcdi->mode == MCDI_MODE_POLL)
542 rc = efx_mcdi_poll(efx);
544 rc = efx_mcdi_await_completion(efx);
547 netif_err(efx, hw, efx->net_dev,
548 "MC command 0x%x inlen %d mode %d timed out\n",
549 cmd, (int)inlen, mcdi->mode);
551 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
552 netif_err(efx, hw, efx->net_dev,
553 "MCDI request was completed without an event\n");
557 /* Close the race with efx_mcdi_ev_cpl() executing just too late
558 * and completing a request we've just cancelled, by ensuring
559 * that the seqno check therein fails.
561 spin_lock_bh(&mcdi->iface_lock);
564 spin_unlock_bh(&mcdi->iface_lock);
571 size_t hdr_len, data_len, err_len;
573 /* At the very least we need a memory barrier here to ensure
574 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
575 * a spurious efx_mcdi_ev_cpl() running concurrently by
576 * acquiring the iface_lock. */
577 spin_lock_bh(&mcdi->iface_lock);
579 hdr_len = mcdi->resp_hdr_len;
580 data_len = mcdi->resp_data_len;
581 err_len = min(sizeof(errbuf), data_len);
582 spin_unlock_bh(&mcdi->iface_lock);
586 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
587 min(outlen, data_len));
589 *outlen_actual = data_len;
591 efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
593 if (cmd == MC_CMD_REBOOT && rc == -EIO) {
594 /* Don't reset if MC_CMD_REBOOT returns EIO */
595 } else if (rc == -EIO || rc == -EINTR) {
596 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
598 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
599 } else if (rc && !quiet) {
600 efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
604 if (rc == -EIO || rc == -EINTR) {
605 msleep(MCDI_STATUS_SLEEP_MS);
606 efx_mcdi_poll_reboot(efx);
607 mcdi->new_epoch = true;
611 efx_mcdi_release(mcdi);
615 static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
616 const efx_dword_t *inbuf, size_t inlen,
617 efx_dword_t *outbuf, size_t outlen,
618 size_t *outlen_actual, bool quiet)
622 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
628 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
629 outlen_actual, quiet);
632 int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
633 const efx_dword_t *inbuf, size_t inlen,
634 efx_dword_t *outbuf, size_t outlen,
635 size_t *outlen_actual)
637 return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
638 outlen_actual, false);
641 /* Normally, on receiving an error code in the MCDI response,
642 * efx_mcdi_rpc will log an error message containing (among other
643 * things) the raw error code, by means of efx_mcdi_display_error.
644 * This _quiet version suppresses that; if the caller wishes to log
645 * the error conditionally on the return code, it should call this
646 * function and is then responsible for calling efx_mcdi_display_error
649 int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
650 const efx_dword_t *inbuf, size_t inlen,
651 efx_dword_t *outbuf, size_t outlen,
652 size_t *outlen_actual)
654 return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
655 outlen_actual, true);
658 int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
659 const efx_dword_t *inbuf, size_t inlen)
661 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
664 rc = efx_mcdi_check_supported(efx, cmd, inlen);
668 if (efx->mc_bist_for_other_fn)
671 efx_mcdi_acquire_sync(mcdi);
672 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
676 static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
677 const efx_dword_t *inbuf, size_t inlen,
679 efx_mcdi_async_completer *complete,
680 unsigned long cookie, bool quiet)
682 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
683 struct efx_mcdi_async_param *async;
686 rc = efx_mcdi_check_supported(efx, cmd, inlen);
690 if (efx->mc_bist_for_other_fn)
693 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
699 async->inlen = inlen;
700 async->outlen = outlen;
701 async->quiet = quiet;
702 async->complete = complete;
703 async->cookie = cookie;
704 memcpy(async + 1, inbuf, inlen);
706 spin_lock_bh(&mcdi->async_lock);
708 if (mcdi->mode == MCDI_MODE_EVENTS) {
709 list_add_tail(&async->list, &mcdi->async_list);
711 /* If this is at the front of the queue, try to start it
714 if (mcdi->async_list.next == &async->list &&
715 efx_mcdi_acquire_async(mcdi)) {
716 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
717 mod_timer(&mcdi->async_timer,
718 jiffies + MCDI_RPC_TIMEOUT);
725 spin_unlock_bh(&mcdi->async_lock);
731 * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
732 * @efx: NIC through which to issue the command
733 * @cmd: Command type number
734 * @inbuf: Command parameters
735 * @inlen: Length of command parameters, in bytes
736 * @outlen: Length to allocate for response buffer, in bytes
737 * @complete: Function to be called on completion or cancellation.
738 * @cookie: Arbitrary value to be passed to @complete.
740 * This function does not sleep and therefore may be called in atomic
741 * context. It will fail if event queues are disabled or if MCDI
742 * event completions have been disabled due to an error.
744 * If it succeeds, the @complete function will be called exactly once
745 * in atomic context, when one of the following occurs:
746 * (a) the completion event is received (in NAPI context)
747 * (b) event queues are disabled (in the process that disables them)
748 * (c) the request times-out (in timer context)
751 efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
752 const efx_dword_t *inbuf, size_t inlen, size_t outlen,
753 efx_mcdi_async_completer *complete, unsigned long cookie)
755 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
759 int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
760 const efx_dword_t *inbuf, size_t inlen,
761 size_t outlen, efx_mcdi_async_completer *complete,
762 unsigned long cookie)
764 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
768 int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
769 efx_dword_t *outbuf, size_t outlen,
770 size_t *outlen_actual)
772 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
773 outlen_actual, false);
776 int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
777 efx_dword_t *outbuf, size_t outlen,
778 size_t *outlen_actual)
780 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
781 outlen_actual, true);
784 void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
785 size_t inlen, efx_dword_t *outbuf,
786 size_t outlen, int rc)
788 int code = 0, err_arg = 0;
790 if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
791 code = MCDI_DWORD(outbuf, ERR_CODE);
792 if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
793 err_arg = MCDI_DWORD(outbuf, ERR_ARG);
794 netif_err(efx, hw, efx->net_dev,
795 "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n",
796 cmd, (int)inlen, rc, code, err_arg);
799 /* Switch to polled MCDI completions. This can be called in various
800 * error conditions with various locks held, so it must be lockless.
801 * Caller is responsible for flushing asynchronous requests later.
803 void efx_mcdi_mode_poll(struct efx_nic *efx)
805 struct efx_mcdi_iface *mcdi;
810 mcdi = efx_mcdi(efx);
811 if (mcdi->mode == MCDI_MODE_POLL)
814 /* We can switch from event completion to polled completion, because
815 * mcdi requests are always completed in shared memory. We do this by
816 * switching the mode to POLL'd then completing the request.
817 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
819 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
820 * which efx_mcdi_complete_sync() provides for us.
822 mcdi->mode = MCDI_MODE_POLL;
824 efx_mcdi_complete_sync(mcdi);
827 /* Flush any running or queued asynchronous requests, after event processing
830 void efx_mcdi_flush_async(struct efx_nic *efx)
832 struct efx_mcdi_async_param *async, *next;
833 struct efx_mcdi_iface *mcdi;
838 mcdi = efx_mcdi(efx);
840 /* We must be in polling mode so no more requests can be queued */
841 BUG_ON(mcdi->mode != MCDI_MODE_POLL);
843 del_timer_sync(&mcdi->async_timer);
845 /* If a request is still running, make sure we give the MC
846 * time to complete it so that the response won't overwrite our
849 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
851 mcdi->state = MCDI_STATE_QUIESCENT;
854 /* Nothing else will access the async list now, so it is safe
855 * to walk it without holding async_lock. If we hold it while
856 * calling a completer then lockdep may warn that we have
857 * acquired locks in the wrong order.
859 list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
860 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
861 list_del(&async->list);
866 void efx_mcdi_mode_event(struct efx_nic *efx)
868 struct efx_mcdi_iface *mcdi;
873 mcdi = efx_mcdi(efx);
875 if (mcdi->mode == MCDI_MODE_EVENTS)
878 /* We can't switch from polled to event completion in the middle of a
879 * request, because the completion method is specified in the request.
880 * So acquire the interface to serialise the requestors. We don't need
881 * to acquire the iface_lock to change the mode here, but we do need a
882 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
883 * efx_mcdi_acquire() provides.
885 efx_mcdi_acquire_sync(mcdi);
886 mcdi->mode = MCDI_MODE_EVENTS;
887 efx_mcdi_release(mcdi);
890 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
892 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
894 /* If there is an outstanding MCDI request, it has been terminated
895 * either by a BADASSERT or REBOOT event. If the mcdi interface is
896 * in polled mode, then do nothing because the MC reboot handler will
897 * set the header correctly. However, if the mcdi interface is waiting
898 * for a CMDDONE event it won't receive it [and since all MCDI events
899 * are sent to the same queue, we can't be racing with
902 * If there is an outstanding asynchronous request, we can't
903 * complete it now (efx_mcdi_complete() would deadlock). The
904 * reset process will take care of this.
906 * There's a race here with efx_mcdi_send_request(), because
907 * we might receive a REBOOT event *before* the request has
908 * been copied out. In polled mode (during startup) this is
909 * irrelevant, because efx_mcdi_complete_sync() is ignored. In
910 * event mode, this condition is just an edge-case of
911 * receiving a REBOOT event after posting the MCDI
912 * request. Did the mc reboot before or after the copyout? The
913 * best we can do always is just return failure.
915 spin_lock(&mcdi->iface_lock);
916 if (efx_mcdi_complete_sync(mcdi)) {
917 if (mcdi->mode == MCDI_MODE_EVENTS) {
919 mcdi->resp_hdr_len = 0;
920 mcdi->resp_data_len = 0;
926 /* Consume the status word since efx_mcdi_rpc_finish() won't */
927 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
928 if (efx_mcdi_poll_reboot(efx))
930 udelay(MCDI_STATUS_DELAY_US);
932 mcdi->new_epoch = true;
934 /* Nobody was waiting for an MCDI request, so trigger a reset */
935 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
938 spin_unlock(&mcdi->iface_lock);
941 /* The MC is going down in to BIST mode. set the BIST flag to block
942 * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
943 * (which doesn't actually execute a reset, it waits for the controlling
944 * function to reset it).
946 static void efx_mcdi_ev_bist(struct efx_nic *efx)
948 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
950 spin_lock(&mcdi->iface_lock);
951 efx->mc_bist_for_other_fn = true;
952 if (efx_mcdi_complete_sync(mcdi)) {
953 if (mcdi->mode == MCDI_MODE_EVENTS) {
955 mcdi->resp_hdr_len = 0;
956 mcdi->resp_data_len = 0;
960 mcdi->new_epoch = true;
961 efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
962 spin_unlock(&mcdi->iface_lock);
965 /* Called from falcon_process_eventq for MCDI events */
966 void efx_mcdi_process_event(struct efx_channel *channel,
969 struct efx_nic *efx = channel->efx;
970 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
971 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
974 case MCDI_EVENT_CODE_BADSSERT:
975 netif_err(efx, hw, efx->net_dev,
976 "MC watchdog or assertion failure at 0x%x\n", data);
977 efx_mcdi_ev_death(efx, -EINTR);
980 case MCDI_EVENT_CODE_PMNOTICE:
981 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
984 case MCDI_EVENT_CODE_CMDDONE:
986 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
987 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
988 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
991 case MCDI_EVENT_CODE_LINKCHANGE:
992 efx_mcdi_process_link_change(efx, event);
994 case MCDI_EVENT_CODE_SENSOREVT:
995 efx_mcdi_sensor_event(efx, event);
997 case MCDI_EVENT_CODE_SCHEDERR:
998 netif_dbg(efx, hw, efx->net_dev,
999 "MC Scheduler alert (0x%x)\n", data);
1001 case MCDI_EVENT_CODE_REBOOT:
1002 case MCDI_EVENT_CODE_MC_REBOOT:
1003 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
1004 efx_mcdi_ev_death(efx, -EIO);
1006 case MCDI_EVENT_CODE_MC_BIST:
1007 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1008 efx_mcdi_ev_bist(efx);
1010 case MCDI_EVENT_CODE_MAC_STATS_DMA:
1011 /* MAC stats are gather lazily. We can ignore this. */
1013 case MCDI_EVENT_CODE_FLR:
1014 efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
1016 case MCDI_EVENT_CODE_PTP_RX:
1017 case MCDI_EVENT_CODE_PTP_FAULT:
1018 case MCDI_EVENT_CODE_PTP_PPS:
1019 efx_ptp_event(efx, event);
1021 case MCDI_EVENT_CODE_TX_FLUSH:
1022 case MCDI_EVENT_CODE_RX_FLUSH:
1023 /* Two flush events will be sent: one to the same event
1024 * queue as completions, and one to event queue 0.
1025 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
1026 * flag will be set, and we should ignore the event
1027 * because we want to wait for all completions.
1029 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1030 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1031 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1032 efx_ef10_handle_drain_event(efx);
1034 case MCDI_EVENT_CODE_TX_ERR:
1035 case MCDI_EVENT_CODE_RX_ERR:
1036 netif_err(efx, hw, efx->net_dev,
1037 "%s DMA error (event: "EFX_QWORD_FMT")\n",
1038 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1039 EFX_QWORD_VAL(*event));
1040 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1043 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
1048 /**************************************************************************
1050 * Specific request functions
1052 **************************************************************************
1055 void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
1057 MCDI_DECLARE_BUF(outbuf,
1058 max(MC_CMD_GET_VERSION_OUT_LEN,
1059 MC_CMD_GET_CAPABILITIES_OUT_LEN));
1061 const __le16 *ver_words;
1065 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
1066 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1067 outbuf, sizeof(outbuf), &outlength);
1070 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
1075 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
1076 offset = snprintf(buf, len, "%u.%u.%u.%u",
1077 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
1078 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
1080 /* EF10 may have multiple datapath firmware variants within a
1081 * single version. Report which variants are running.
1083 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
1084 BUILD_BUG_ON(MC_CMD_GET_CAPABILITIES_IN_LEN != 0);
1085 rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
1086 outbuf, sizeof(outbuf), &outlength);
1087 if (rc || outlength < MC_CMD_GET_CAPABILITIES_OUT_LEN)
1089 buf + offset, len - offset, " rx? tx?");
1092 buf + offset, len - offset, " rx%x tx%x",
1094 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID),
1096 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID));
1098 /* It's theoretically possible for the string to exceed 31
1099 * characters, though in practice the first three version
1100 * components are short enough that this doesn't happen.
1102 if (WARN_ON(offset >= len))
1109 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1113 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1116 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
1117 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1121 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1122 driver_operating ? 1 : 0);
1123 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
1124 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
1126 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1127 outbuf, sizeof(outbuf), &outlen);
1130 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1135 if (driver_operating) {
1136 if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
1137 efx->mcdi->fn_flags =
1139 DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
1141 /* Synthesise flags for Siena */
1142 efx->mcdi->fn_flags =
1143 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1144 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
1145 (efx_port_num(efx) == 0) <<
1146 MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
1150 /* We currently assume we have control of the external link
1151 * and are completely trusted by firmware. Abort probing
1152 * if that's not true for this function.
1154 if (driver_operating &&
1155 (efx->mcdi->fn_flags &
1156 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1157 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) !=
1158 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1159 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) {
1160 netif_err(efx, probe, efx->net_dev,
1161 "This driver version only supports one function per port\n");
1165 if (was_attached != NULL)
1166 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1170 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1174 int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
1175 u16 *fw_subtype_list, u32 *capabilities)
1177 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
1179 int port_num = efx_port_num(efx);
1182 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1184 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1185 outbuf, sizeof(outbuf), &outlen);
1189 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1197 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1198 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0),
1200 if (fw_subtype_list) {
1202 i < MCDI_VAR_ARRAY_LEN(outlen,
1203 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1205 fw_subtype_list[i] = MCDI_ARRAY_WORD(
1206 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1207 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1208 fw_subtype_list[i] = 0;
1212 *capabilities = MCDI_DWORD(outbuf,
1213 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1215 *capabilities = MCDI_DWORD(outbuf,
1216 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1222 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1223 __func__, rc, (int)outlen);
1228 int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1230 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
1235 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1237 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1239 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1240 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1242 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1244 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1249 int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1251 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
1255 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1257 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1258 outbuf, sizeof(outbuf), &outlen);
1261 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1266 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1270 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1275 int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1276 size_t *size_out, size_t *erase_size_out,
1277 bool *protected_out)
1279 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1280 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
1284 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1286 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1287 outbuf, sizeof(outbuf), &outlen);
1290 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1295 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1296 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1297 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
1298 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
1302 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1306 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1308 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1309 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
1312 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1314 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1315 outbuf, sizeof(outbuf), NULL);
1319 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1320 case MC_CMD_NVRAM_TEST_PASS:
1321 case MC_CMD_NVRAM_TEST_NOTSUPP:
1328 int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1334 rc = efx_mcdi_nvram_types(efx, &nvram_types);
1339 while (nvram_types != 0) {
1340 if (nvram_types & 1) {
1341 rc = efx_mcdi_nvram_test(efx, type);
1352 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1355 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1359 static int efx_mcdi_read_assertion(struct efx_nic *efx)
1361 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
1362 MCDI_DECLARE_BUF_OUT_OR_ERR(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
1363 unsigned int flags, index;
1369 /* Attempt to read any stored assertion state before we reboot
1370 * the mcfw out of the assertion handler. Retry twice, once
1371 * because a boot-time assertion might cause this command to fail
1372 * with EINTR. And once again because GET_ASSERTS can race with
1373 * MC_CMD_REBOOT running on the other port. */
1376 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1377 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1378 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1379 outbuf, sizeof(outbuf), &outlen);
1380 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1383 efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1384 MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1388 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
1391 /* Print out any recorded assertion state */
1392 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1393 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1396 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1397 ? "system-level assertion"
1398 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1399 ? "thread-level assertion"
1400 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1402 : "unknown assertion";
1403 netif_err(efx, hw, efx->net_dev,
1404 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1405 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1406 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1408 /* Print out the registers */
1410 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1412 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1414 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1420 static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1422 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1424 /* If the MC is running debug firmware, it might now be
1425 * waiting for a debugger to attach, but we just want it to
1426 * reboot. We set a flag that makes the command a no-op if it
1427 * has already done so. We don't know what return code to
1428 * expect (0 or -EIO), so ignore it.
1430 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1431 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1432 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1433 (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1437 int efx_mcdi_handle_assertion(struct efx_nic *efx)
1441 rc = efx_mcdi_read_assertion(efx);
1445 efx_mcdi_exit_assertion(efx);
1450 void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1452 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
1455 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1456 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1457 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1459 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1461 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1463 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1467 static int efx_mcdi_reset_port(struct efx_nic *efx)
1469 return efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
1472 static int efx_mcdi_reset_mc(struct efx_nic *efx)
1474 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1477 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1478 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1479 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1481 /* White is black, and up is down */
1489 enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1491 return RESET_TYPE_RECOVER_OR_ALL;
1494 int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1498 /* Recover from a failed assertion pre-reset */
1499 rc = efx_mcdi_handle_assertion(efx);
1503 if (method == RESET_TYPE_WORLD)
1504 return efx_mcdi_reset_mc(efx);
1506 return efx_mcdi_reset_port(efx);
1509 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1510 const u8 *mac, int *id_out)
1512 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1513 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
1517 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1518 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1519 MC_CMD_FILTER_MODE_SIMPLE);
1520 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1522 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1523 outbuf, sizeof(outbuf), &outlen);
1527 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1532 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1538 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1545 efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1547 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1551 int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1553 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
1557 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1558 outbuf, sizeof(outbuf), &outlen);
1562 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
1567 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1573 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1578 int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1580 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
1583 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1585 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1590 int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1592 struct efx_channel *channel;
1593 struct efx_rx_queue *rx_queue;
1594 MCDI_DECLARE_BUF(inbuf,
1595 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
1598 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1599 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1602 efx_for_each_channel(channel, efx) {
1603 efx_for_each_channel_rx_queue(rx_queue, channel) {
1604 if (rx_queue->flush_pending) {
1605 rx_queue->flush_pending = false;
1606 atomic_dec(&efx->rxq_flush_pending);
1607 MCDI_SET_ARRAY_DWORD(
1608 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1609 count, efx_rx_queue_index(rx_queue));
1615 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1616 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
1622 int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1626 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1630 int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
1632 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
1634 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
1635 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
1636 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
1637 return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
1641 #ifdef CONFIG_SFC_MTD
1643 #define EFX_MCDI_NVRAM_LEN_MAX 128
1645 static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
1647 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
1650 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
1652 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
1654 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
1659 static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
1660 loff_t offset, u8 *buffer, size_t length)
1662 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
1663 MCDI_DECLARE_BUF(outbuf,
1664 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1668 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
1669 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
1670 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
1672 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
1673 outbuf, sizeof(outbuf), &outlen);
1677 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
1681 static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
1682 loff_t offset, const u8 *buffer, size_t length)
1684 MCDI_DECLARE_BUF(inbuf,
1685 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1688 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
1689 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
1690 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
1691 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
1693 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
1695 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
1696 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
1701 static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
1702 loff_t offset, size_t length)
1704 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
1707 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
1708 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
1709 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
1711 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
1713 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
1718 static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
1720 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
1723 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
1725 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
1727 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
1732 int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
1733 size_t len, size_t *retlen, u8 *buffer)
1735 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1736 struct efx_nic *efx = mtd->priv;
1737 loff_t offset = start;
1738 loff_t end = min_t(loff_t, start + len, mtd->size);
1742 while (offset < end) {
1743 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1744 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
1752 *retlen = offset - start;
1756 int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
1758 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1759 struct efx_nic *efx = mtd->priv;
1760 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
1761 loff_t end = min_t(loff_t, start + len, mtd->size);
1762 size_t chunk = part->common.mtd.erasesize;
1765 if (!part->updating) {
1766 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1769 part->updating = true;
1772 /* The MCDI interface can in fact do multiple erase blocks at once;
1773 * but erasing may be slow, so we make multiple calls here to avoid
1774 * tripping the MCDI RPC timeout. */
1775 while (offset < end) {
1776 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
1786 int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
1787 size_t len, size_t *retlen, const u8 *buffer)
1789 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1790 struct efx_nic *efx = mtd->priv;
1791 loff_t offset = start;
1792 loff_t end = min_t(loff_t, start + len, mtd->size);
1796 if (!part->updating) {
1797 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1800 part->updating = true;
1803 while (offset < end) {
1804 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1805 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
1813 *retlen = offset - start;
1817 int efx_mcdi_mtd_sync(struct mtd_info *mtd)
1819 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1820 struct efx_nic *efx = mtd->priv;
1823 if (part->updating) {
1824 part->updating = false;
1825 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
1831 void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
1833 struct efx_mcdi_mtd_partition *mcdi_part =
1834 container_of(part, struct efx_mcdi_mtd_partition, common);
1835 struct efx_nic *efx = part->mtd.priv;
1837 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
1838 efx->name, part->type_name, mcdi_part->fw_subtype);
1841 #endif /* CONFIG_SFC_MTD */