drivers/net/ethernet/qlogic/qed/qed_roce.c

   1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
   2 /* QLogic qed NIC Driver
   3  * Copyright (c) 2015-2017  QLogic Corporation
   4  * Copyright (c) 2019-2020 Marvell International Ltd.
   5  */
   6
   7 #include <linux/types.h>
   8 #include <asm/byteorder.h>
   9 #include <linux/bitops.h>
  10 #include <linux/delay.h>
  11 #include <linux/dma-mapping.h>
  12 #include <linux/errno.h>
  13 #include <linux/io.h>
  14 #include <linux/kernel.h>
  15 #include <linux/list.h>
  16 #include <linux/module.h>
  17 #include <linux/mutex.h>
  18 #include <linux/pci.h>
  19 #include <linux/slab.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/string.h>
  22 #include <linux/if_vlan.h>
  23 #include "qed.h"
  24 #include "qed_cxt.h"
  25 #include "qed_dcbx.h"
  26 #include "qed_hsi.h"
  27 #include "qed_hw.h"
  28 #include "qed_init_ops.h"
  29 #include "qed_int.h"
  30 #include "qed_ll2.h"
  31 #include "qed_mcp.h"
  32 #include "qed_reg_addr.h"
  33 #include <linux/qed/qed_rdma_if.h>
  34 #include "qed_rdma.h"
  35 #include "qed_roce.h"
  36 #include "qed_sp.h"
  37
  38 static void qed_roce_free_real_icid(struct qed_hwfn *p_hwfn, u16 icid);
  39
  40 static int qed_roce_async_event(struct qed_hwfn *p_hwfn, u8 fw_event_code,
  41                                 __le16 echo, union event_ring_data *data,
  42                                 u8 fw_return_code)
  43 {
  44         struct qed_rdma_events events = p_hwfn->p_rdma_info->events;
  45         union rdma_eqe_data *rdata = &data->rdma_data;
  46
  47         if (fw_event_code == ROCE_ASYNC_EVENT_DESTROY_QP_DONE) {
  48                 u16 icid = (u16)le32_to_cpu(rdata->rdma_destroy_qp_data.cid);
  49
  50                 /* icid release in this async event can occur only if the icid
  51                  * was offloaded to the FW. In case it wasn't offloaded this is
  52                  * handled in qed_roce_sp_destroy_qp.
  53                  */
  54                 qed_roce_free_real_icid(p_hwfn, icid);
  55         } else if (fw_event_code == ROCE_ASYNC_EVENT_SRQ_EMPTY ||
  56                    fw_event_code == ROCE_ASYNC_EVENT_SRQ_LIMIT) {
  57                 u16 srq_id = (u16)le32_to_cpu(rdata->async_handle.lo);
  58
  59                 events.affiliated_event(events.context, fw_event_code,
  60                                         &srq_id);
  61         } else {
  62                 events.affiliated_event(events.context, fw_event_code,
  63                                         (void *)&rdata->async_handle);
  64         }
  65
  66         return 0;
  67 }
  68
  69 void qed_roce_stop(struct qed_hwfn *p_hwfn)
  70 {
  71         struct qed_bmap *rcid_map = &p_hwfn->p_rdma_info->real_cid_map;
  72         int wait_count = 0;
  73
  74         /* when destroying a_RoCE QP the control is returned to the user after
  75          * the synchronous part. The asynchronous part may take a little longer.
  76          * We delay for a short while if an async destroy QP is still expected.
  77          * Beyond the added delay we clear the bitmap anyway.
  78          */
  79         while (bitmap_weight(rcid_map->bitmap, rcid_map->max_count)) {
  80                 msleep(100);
  81                 if (wait_count++ > 20) {
  82                         DP_NOTICE(p_hwfn, "cid bitmap wait timed out\n");
  83                         break;
  84                 }
  85         }
  86 }
  87
  88 static void qed_rdma_copy_gids(struct qed_rdma_qp *qp, __le32 *src_gid,
  89                                __le32 *dst_gid)
  90 {
  91         u32 i;
  92
  93         if (qp->roce_mode == ROCE_V2_IPV4) {
  94                 /* The IPv4 addresses shall be aligned to the highest word.
  95                  * The lower words must be zero.
  96                  */
  97                 memset(src_gid, 0, sizeof(union qed_gid));
  98                 memset(dst_gid, 0, sizeof(union qed_gid));
  99                 src_gid[3] = cpu_to_le32(qp->sgid.ipv4_addr);
 100                 dst_gid[3] = cpu_to_le32(qp->dgid.ipv4_addr);
 101         } else {
 102                 /* GIDs and IPv6 addresses coincide in location and size */
 103                 for (i = 0; i < ARRAY_SIZE(qp->sgid.dwords); i++) {
 104                         src_gid[i] = cpu_to_le32(qp->sgid.dwords[i]);
 105                         dst_gid[i] = cpu_to_le32(qp->dgid.dwords[i]);
 106                 }
 107         }
 108 }
 109
 110 static enum roce_flavor qed_roce_mode_to_flavor(enum roce_mode roce_mode)
 111 {
 112         switch (roce_mode) {
 113         case ROCE_V1:
 114                 return PLAIN_ROCE;
 115         case ROCE_V2_IPV4:
 116                 return RROCE_IPV4;
 117         case ROCE_V2_IPV6:
 118                 return RROCE_IPV6;
 119         default:
 120                 return MAX_ROCE_FLAVOR;
 121         }
 122 }
 123
 124 static void qed_roce_free_cid_pair(struct qed_hwfn *p_hwfn, u16 cid)
 125 {
 126         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 127         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->cid_map, cid);
 128         qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->cid_map, cid + 1);
 129         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 130 }
 131
 132 int qed_roce_alloc_cid(struct qed_hwfn *p_hwfn, u16 *cid)
 133 {
 134         struct qed_rdma_info *p_rdma_info = p_hwfn->p_rdma_info;
 135         u32 responder_icid;
 136         u32 requester_icid;
 137         int rc;
 138
 139         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 140         rc = qed_rdma_bmap_alloc_id(p_hwfn, &p_rdma_info->cid_map,
 141                                     &responder_icid);
 142         if (rc) {
 143                 spin_unlock_bh(&p_rdma_info->lock);
 144                 return rc;
 145         }
 146
 147         rc = qed_rdma_bmap_alloc_id(p_hwfn, &p_rdma_info->cid_map,
 148                                     &requester_icid);
 149
 150         spin_unlock_bh(&p_rdma_info->lock);
 151         if (rc)
 152                 goto err;
 153
 154         /* the two icid's should be adjacent */
 155         if ((requester_icid - responder_icid) != 1) {
 156                 DP_NOTICE(p_hwfn, "Failed to allocate two adjacent qp's'\n");
 157                 rc = -EINVAL;
 158                 goto err;
 159         }
 160
 161         responder_icid += qed_cxt_get_proto_cid_start(p_hwfn,
 162                                                       p_rdma_info->proto);
 163         requester_icid += qed_cxt_get_proto_cid_start(p_hwfn,
 164                                                       p_rdma_info->proto);
 165
 166         /* If these icids require a new ILT line allocate DMA-able context for
 167          * an ILT page
 168          */
 169         rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, QED_ELEM_CXT, responder_icid);
 170         if (rc)
 171                 goto err;
 172
 173         rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, QED_ELEM_CXT, requester_icid);
 174         if (rc)
 175                 goto err;
 176
 177         *cid = (u16)responder_icid;
 178         return rc;
 179
 180 err:
 181         spin_lock_bh(&p_rdma_info->lock);
 182         qed_bmap_release_id(p_hwfn, &p_rdma_info->cid_map, responder_icid);
 183         qed_bmap_release_id(p_hwfn, &p_rdma_info->cid_map, requester_icid);
 184
 185         spin_unlock_bh(&p_rdma_info->lock);
 186         DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
 187                    "Allocate CID - failed, rc = %d\n", rc);
 188         return rc;
 189 }
 190
 191 static void qed_roce_set_real_cid(struct qed_hwfn *p_hwfn, u32 cid)
 192 {
 193         spin_lock_bh(&p_hwfn->p_rdma_info->lock);
 194         qed_bmap_set_id(p_hwfn, &p_hwfn->p_rdma_info->real_cid_map, cid);
 195         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
 196 }
 197
 198 static u8 qed_roce_get_qp_tc(struct qed_hwfn *p_hwfn, struct qed_rdma_qp *qp)
 199 {
 200         u8 pri, tc = 0;
 201
 202         if (qp->vlan_id) {
 203                 pri = (qp->vlan_id & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
 204                 tc = qed_dcbx_get_priority_tc(p_hwfn, pri);
 205         }
 206
 207         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 208                    "qp icid %u tc: %u (vlan priority %s)\n",
 209                    qp->icid, tc, qp->vlan_id ? "enabled" : "disabled");
 210
 211         return tc;
 212 }
 213
 214 static int qed_roce_sp_create_responder(struct qed_hwfn *p_hwfn,
 215                                         struct qed_rdma_qp *qp)
 216 {
 217         struct roce_create_qp_resp_ramrod_data *p_ramrod;
 218         u16 regular_latency_queue, low_latency_queue;
 219         struct qed_sp_init_data init_data;
 220         struct qed_spq_entry *p_ent;
 221         enum protocol_type proto;
 222         u32 flags = 0;
 223         int rc;
 224         u8 tc;
 225
 226         if (!qp->has_resp)
 227                 return 0;
 228
 229         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 230
 231         /* Allocate DMA-able memory for IRQ */
 232         qp->irq_num_pages = 1;
 233         qp->irq = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 234                                      RDMA_RING_PAGE_SIZE,
 235                                      &qp->irq_phys_addr, GFP_KERNEL);
 236         if (!qp->irq) {
 237                 rc = -ENOMEM;
 238                 DP_NOTICE(p_hwfn,
 239                           "qed create responder failed: cannot allocate memory (irq). rc = %d\n",
 240                           rc);
 241                 return rc;
 242         }
 243
 244         /* Get SPQ entry */
 245         memset(&init_data, 0, sizeof(init_data));
 246         init_data.cid = qp->icid;
 247         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 248         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 249
 250         rc = qed_sp_init_request(p_hwfn, &p_ent, ROCE_RAMROD_CREATE_QP,
 251                                  PROTOCOLID_ROCE, &init_data);
 252         if (rc)
 253                 goto err;
 254
 255         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_ROCE_FLAVOR,
 256                   qed_roce_mode_to_flavor(qp->roce_mode));
 257
 258         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_RD_EN,
 259                   qp->incoming_rdma_read_en);
 260
 261         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_WR_EN,
 262                   qp->incoming_rdma_write_en);
 263
 264         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_ATOMIC_EN,
 265                   qp->incoming_atomic_en);
 266
 267         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN,
 268                   qp->e2e_flow_control_en);
 269
 270         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_SRQ_FLG, qp->use_srq);
 271
 272         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RESERVED_KEY_EN,
 273                   qp->fmr_and_reserved_lkey);
 274
 275         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER,
 276                   qp->min_rnr_nak_timer);
 277
 278         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_XRC_FLAG,
 279                   qed_rdma_is_xrc_qp(qp));
 280
 281         p_ramrod = &p_ent->ramrod.roce_create_qp_resp;
 282         p_ramrod->flags = cpu_to_le32(flags);
 283         p_ramrod->max_ird = qp->max_rd_atomic_resp;
 284         p_ramrod->traffic_class = qp->traffic_class_tos;
 285         p_ramrod->hop_limit = qp->hop_limit_ttl;
 286         p_ramrod->irq_num_pages = qp->irq_num_pages;
 287         p_ramrod->p_key = cpu_to_le16(qp->pkey);
 288         p_ramrod->flow_label = cpu_to_le32(qp->flow_label);
 289         p_ramrod->dst_qp_id = cpu_to_le32(qp->dest_qp);
 290         p_ramrod->mtu = cpu_to_le16(qp->mtu);
 291         p_ramrod->initial_psn = cpu_to_le32(qp->rq_psn);
 292         p_ramrod->pd = cpu_to_le16(qp->pd);
 293         p_ramrod->rq_num_pages = cpu_to_le16(qp->rq_num_pages);
 294         DMA_REGPAIR_LE(p_ramrod->rq_pbl_addr, qp->rq_pbl_ptr);
 295         DMA_REGPAIR_LE(p_ramrod->irq_pbl_addr, qp->irq_phys_addr);
 296         qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
 297         p_ramrod->qp_handle_for_async.hi = qp->qp_handle_async.hi;
 298         p_ramrod->qp_handle_for_async.lo = qp->qp_handle_async.lo;
 299         p_ramrod->qp_handle_for_cqe.hi = qp->qp_handle.hi;
 300         p_ramrod->qp_handle_for_cqe.lo = qp->qp_handle.lo;
 301         p_ramrod->cq_cid = cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) |
 302                                        qp->rq_cq_id);
 303         p_ramrod->xrc_domain = cpu_to_le16(qp->xrcd_id);
 304
 305         tc = qed_roce_get_qp_tc(p_hwfn, qp);
 306         regular_latency_queue = qed_get_cm_pq_idx_ofld_mtc(p_hwfn, tc);
 307         low_latency_queue = qed_get_cm_pq_idx_llt_mtc(p_hwfn, tc);
 308         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 309                    "qp icid %u pqs: regular_latency %u low_latency %u\n",
 310                    qp->icid, regular_latency_queue - CM_TX_PQ_BASE,
 311                    low_latency_queue - CM_TX_PQ_BASE);
 312         p_ramrod->regular_latency_phy_queue =
 313             cpu_to_le16(regular_latency_queue);
 314         p_ramrod->low_latency_phy_queue =
 315             cpu_to_le16(low_latency_queue);
 316
 317         p_ramrod->dpi = cpu_to_le16(qp->dpi);
 318
 319         qed_rdma_set_fw_mac(p_ramrod->remote_mac_addr, qp->remote_mac_addr);
 320         qed_rdma_set_fw_mac(p_ramrod->local_mac_addr, qp->local_mac_addr);
 321
 322         p_ramrod->udp_src_port = cpu_to_le16(qp->udp_src_port);
 323         p_ramrod->vlan_id = cpu_to_le16(qp->vlan_id);
 324         p_ramrod->srq_id.srq_idx = cpu_to_le16(qp->srq_id);
 325         p_ramrod->srq_id.opaque_fid = cpu_to_le16(p_hwfn->hw_info.opaque_fid);
 326
 327         p_ramrod->stats_counter_id = RESC_START(p_hwfn, QED_RDMA_STATS_QUEUE) +
 328                                      qp->stats_queue;
 329
 330         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 331         if (rc)
 332                 goto err;
 333
 334         qp->resp_offloaded = true;
 335         qp->cq_prod = 0;
 336
 337         proto = p_hwfn->p_rdma_info->proto;
 338         qed_roce_set_real_cid(p_hwfn, qp->icid -
 339                               qed_cxt_get_proto_cid_start(p_hwfn, proto));
 340
 341         return rc;
 342
 343 err:
 344         DP_NOTICE(p_hwfn, "create responder - failed, rc = %d\n", rc);
 345         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 346                           qp->irq_num_pages * RDMA_RING_PAGE_SIZE,
 347                           qp->irq, qp->irq_phys_addr);
 348
 349         return rc;
 350 }
 351
 352 static int qed_roce_sp_create_requester(struct qed_hwfn *p_hwfn,
 353                                         struct qed_rdma_qp *qp)
 354 {
 355         struct roce_create_qp_req_ramrod_data *p_ramrod;
 356         u16 regular_latency_queue, low_latency_queue;
 357         struct qed_sp_init_data init_data;
 358         struct qed_spq_entry *p_ent;
 359         enum protocol_type proto;
 360         u16 flags = 0;
 361         int rc;
 362         u8 tc;
 363
 364         if (!qp->has_req)
 365                 return 0;
 366
 367         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 368
 369         /* Allocate DMA-able memory for ORQ */
 370         qp->orq_num_pages = 1;
 371         qp->orq = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 372                                      RDMA_RING_PAGE_SIZE,
 373                                      &qp->orq_phys_addr, GFP_KERNEL);
 374         if (!qp->orq) {
 375                 rc = -ENOMEM;
 376                 DP_NOTICE(p_hwfn,
 377                           "qed create requester failed: cannot allocate memory (orq). rc = %d\n",
 378                           rc);
 379                 return rc;
 380         }
 381
 382         /* Get SPQ entry */
 383         memset(&init_data, 0, sizeof(init_data));
 384         init_data.cid = qp->icid + 1;
 385         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 386         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 387
 388         rc = qed_sp_init_request(p_hwfn, &p_ent,
 389                                  ROCE_RAMROD_CREATE_QP,
 390                                  PROTOCOLID_ROCE, &init_data);
 391         if (rc)
 392                 goto err;
 393
 394         SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_ROCE_FLAVOR,
 395                   qed_roce_mode_to_flavor(qp->roce_mode));
 396
 397         SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_FMR_AND_RESERVED_EN,
 398                   qp->fmr_and_reserved_lkey);
 399
 400         SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_SIGNALED_COMP,
 401                   qp->signal_all);
 402
 403         SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT,
 404                   qp->retry_cnt);
 405
 406         SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_RNR_NAK_CNT,
 407                   qp->rnr_retry_cnt);
 408
 409         SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_XRC_FLAG,
 410                   qed_rdma_is_xrc_qp(qp));
 411
 412         p_ramrod = &p_ent->ramrod.roce_create_qp_req;
 413         p_ramrod->flags = cpu_to_le16(flags);
 414
 415         SET_FIELD(p_ramrod->flags2, ROCE_CREATE_QP_REQ_RAMROD_DATA_EDPM_MODE,
 416                   qp->edpm_mode);
 417
 418         p_ramrod->max_ord = qp->max_rd_atomic_req;
 419         p_ramrod->traffic_class = qp->traffic_class_tos;
 420         p_ramrod->hop_limit = qp->hop_limit_ttl;
 421         p_ramrod->orq_num_pages = qp->orq_num_pages;
 422         p_ramrod->p_key = cpu_to_le16(qp->pkey);
 423         p_ramrod->flow_label = cpu_to_le32(qp->flow_label);
 424         p_ramrod->dst_qp_id = cpu_to_le32(qp->dest_qp);
 425         p_ramrod->ack_timeout_val = cpu_to_le32(qp->ack_timeout);
 426         p_ramrod->mtu = cpu_to_le16(qp->mtu);
 427         p_ramrod->initial_psn = cpu_to_le32(qp->sq_psn);
 428         p_ramrod->pd = cpu_to_le16(qp->pd);
 429         p_ramrod->sq_num_pages = cpu_to_le16(qp->sq_num_pages);
 430         DMA_REGPAIR_LE(p_ramrod->sq_pbl_addr, qp->sq_pbl_ptr);
 431         DMA_REGPAIR_LE(p_ramrod->orq_pbl_addr, qp->orq_phys_addr);
 432         qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
 433         p_ramrod->qp_handle_for_async.hi = qp->qp_handle_async.hi;
 434         p_ramrod->qp_handle_for_async.lo = qp->qp_handle_async.lo;
 435         p_ramrod->qp_handle_for_cqe.hi = qp->qp_handle.hi;
 436         p_ramrod->qp_handle_for_cqe.lo = qp->qp_handle.lo;
 437         p_ramrod->cq_cid =
 438             cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) | qp->sq_cq_id);
 439
 440         tc = qed_roce_get_qp_tc(p_hwfn, qp);
 441         regular_latency_queue = qed_get_cm_pq_idx_ofld_mtc(p_hwfn, tc);
 442         low_latency_queue = qed_get_cm_pq_idx_llt_mtc(p_hwfn, tc);
 443         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 444                    "qp icid %u pqs: regular_latency %u low_latency %u\n",
 445                    qp->icid, regular_latency_queue - CM_TX_PQ_BASE,
 446                    low_latency_queue - CM_TX_PQ_BASE);
 447         p_ramrod->regular_latency_phy_queue =
 448             cpu_to_le16(regular_latency_queue);
 449         p_ramrod->low_latency_phy_queue =
 450             cpu_to_le16(low_latency_queue);
 451
 452         p_ramrod->dpi = cpu_to_le16(qp->dpi);
 453
 454         qed_rdma_set_fw_mac(p_ramrod->remote_mac_addr, qp->remote_mac_addr);
 455         qed_rdma_set_fw_mac(p_ramrod->local_mac_addr, qp->local_mac_addr);
 456
 457         p_ramrod->udp_src_port = cpu_to_le16(qp->udp_src_port);
 458         p_ramrod->vlan_id = cpu_to_le16(qp->vlan_id);
 459         p_ramrod->stats_counter_id = RESC_START(p_hwfn, QED_RDMA_STATS_QUEUE) +
 460                                      qp->stats_queue;
 461
 462         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 463         if (rc)
 464                 goto err;
 465
 466         qp->req_offloaded = true;
 467         proto = p_hwfn->p_rdma_info->proto;
 468         qed_roce_set_real_cid(p_hwfn,
 469                               qp->icid + 1 -
 470                               qed_cxt_get_proto_cid_start(p_hwfn, proto));
 471
 472         return rc;
 473
 474 err:
 475         DP_NOTICE(p_hwfn, "Create requested - failed, rc = %d\n", rc);
 476         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 477                           qp->orq_num_pages * RDMA_RING_PAGE_SIZE,
 478                           qp->orq, qp->orq_phys_addr);
 479         return rc;
 480 }
 481
 482 static int qed_roce_sp_modify_responder(struct qed_hwfn *p_hwfn,
 483                                         struct qed_rdma_qp *qp,
 484                                         bool move_to_err, u32 modify_flags)
 485 {
 486         struct roce_modify_qp_resp_ramrod_data *p_ramrod;
 487         struct qed_sp_init_data init_data;
 488         struct qed_spq_entry *p_ent;
 489         u16 flags = 0;
 490         int rc;
 491
 492         if (!qp->has_resp)
 493                 return 0;
 494
 495         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 496
 497         if (move_to_err && !qp->resp_offloaded)
 498                 return 0;
 499
 500         /* Get SPQ entry */
 501         memset(&init_data, 0, sizeof(init_data));
 502         init_data.cid = qp->icid;
 503         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 504         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 505
 506         rc = qed_sp_init_request(p_hwfn, &p_ent,
 507                                  ROCE_EVENT_MODIFY_QP,
 508                                  PROTOCOLID_ROCE, &init_data);
 509         if (rc) {
 510                 DP_NOTICE(p_hwfn, "rc = %d\n", rc);
 511                 return rc;
 512         }
 513
 514         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MOVE_TO_ERR_FLG,
 515                   !!move_to_err);
 516
 517         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_RD_EN,
 518                   qp->incoming_rdma_read_en);
 519
 520         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_WR_EN,
 521                   qp->incoming_rdma_write_en);
 522
 523         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_ATOMIC_EN,
 524                   qp->incoming_atomic_en);
 525
 526         SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN,
 527                   qp->e2e_flow_control_en);
 528
 529         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_OPS_EN_FLG,
 530                   GET_FIELD(modify_flags,
 531                             QED_RDMA_MODIFY_QP_VALID_RDMA_OPS_EN));
 532
 533         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_P_KEY_FLG,
 534                   GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY));
 535
 536         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_ADDRESS_VECTOR_FLG,
 537                   GET_FIELD(modify_flags,
 538                             QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR));
 539
 540         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MAX_IRD_FLG,
 541                   GET_FIELD(modify_flags,
 542                             QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_RESP));
 543
 544         SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER_FLG,
 545                   GET_FIELD(modify_flags,
 546                             QED_ROCE_MODIFY_QP_VALID_MIN_RNR_NAK_TIMER));
 547
 548         p_ramrod = &p_ent->ramrod.roce_modify_qp_resp;
 549         p_ramrod->flags = cpu_to_le16(flags);
 550
 551         p_ramrod->fields = 0;
 552         SET_FIELD(p_ramrod->fields,
 553                   ROCE_MODIFY_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER,
 554                   qp->min_rnr_nak_timer);
 555
 556         p_ramrod->max_ird = qp->max_rd_atomic_resp;
 557         p_ramrod->traffic_class = qp->traffic_class_tos;
 558         p_ramrod->hop_limit = qp->hop_limit_ttl;
 559         p_ramrod->p_key = cpu_to_le16(qp->pkey);
 560         p_ramrod->flow_label = cpu_to_le32(qp->flow_label);
 561         p_ramrod->mtu = cpu_to_le16(qp->mtu);
 562         qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
 563         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 564
 565         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Modify responder, rc = %d\n", rc);
 566         return rc;
 567 }
 568
 569 static int qed_roce_sp_modify_requester(struct qed_hwfn *p_hwfn,
 570                                         struct qed_rdma_qp *qp,
 571                                         bool move_to_sqd,
 572                                         bool move_to_err, u32 modify_flags)
 573 {
 574         struct roce_modify_qp_req_ramrod_data *p_ramrod;
 575         struct qed_sp_init_data init_data;
 576         struct qed_spq_entry *p_ent;
 577         u16 flags = 0;
 578         int rc;
 579
 580         if (!qp->has_req)
 581                 return 0;
 582
 583         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 584
 585         if (move_to_err && !(qp->req_offloaded))
 586                 return 0;
 587
 588         /* Get SPQ entry */
 589         memset(&init_data, 0, sizeof(init_data));
 590         init_data.cid = qp->icid + 1;
 591         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 592         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 593
 594         rc = qed_sp_init_request(p_hwfn, &p_ent,
 595                                  ROCE_EVENT_MODIFY_QP,
 596                                  PROTOCOLID_ROCE, &init_data);
 597         if (rc) {
 598                 DP_NOTICE(p_hwfn, "rc = %d\n", rc);
 599                 return rc;
 600         }
 601
 602         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_ERR_FLG,
 603                   !!move_to_err);
 604
 605         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_SQD_FLG,
 606                   !!move_to_sqd);
 607
 608         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_EN_SQD_ASYNC_NOTIFY,
 609                   qp->sqd_async);
 610
 611         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_P_KEY_FLG,
 612                   GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY));
 613
 614         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ADDRESS_VECTOR_FLG,
 615                   GET_FIELD(modify_flags,
 616                             QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR));
 617
 618         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MAX_ORD_FLG,
 619                   GET_FIELD(modify_flags,
 620                             QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_REQ));
 621
 622         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT_FLG,
 623                   GET_FIELD(modify_flags,
 624                             QED_ROCE_MODIFY_QP_VALID_RNR_RETRY_CNT));
 625
 626         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT_FLG,
 627                   GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_RETRY_CNT));
 628
 629         SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ACK_TIMEOUT_FLG,
 630                   GET_FIELD(modify_flags,
 631                             QED_ROCE_MODIFY_QP_VALID_ACK_TIMEOUT));
 632
 633         p_ramrod = &p_ent->ramrod.roce_modify_qp_req;
 634         p_ramrod->flags = cpu_to_le16(flags);
 635
 636         p_ramrod->fields = 0;
 637         SET_FIELD(p_ramrod->fields,
 638                   ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT, qp->retry_cnt);
 639         SET_FIELD(p_ramrod->fields, ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT,
 640                   qp->rnr_retry_cnt);
 641
 642         p_ramrod->max_ord = qp->max_rd_atomic_req;
 643         p_ramrod->traffic_class = qp->traffic_class_tos;
 644         p_ramrod->hop_limit = qp->hop_limit_ttl;
 645         p_ramrod->p_key = cpu_to_le16(qp->pkey);
 646         p_ramrod->flow_label = cpu_to_le32(qp->flow_label);
 647         p_ramrod->ack_timeout_val = cpu_to_le32(qp->ack_timeout);
 648         p_ramrod->mtu = cpu_to_le16(qp->mtu);
 649         qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid);
 650         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 651
 652         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Modify requester, rc = %d\n", rc);
 653         return rc;
 654 }
 655
 656 static int qed_roce_sp_destroy_qp_responder(struct qed_hwfn *p_hwfn,
 657                                             struct qed_rdma_qp *qp,
 658                                             u32 *cq_prod)
 659 {
 660         struct roce_destroy_qp_resp_output_params *p_ramrod_res;
 661         struct roce_destroy_qp_resp_ramrod_data *p_ramrod;
 662         struct qed_sp_init_data init_data;
 663         struct qed_spq_entry *p_ent;
 664         dma_addr_t ramrod_res_phys;
 665         int rc;
 666
 667         if (!qp->has_resp) {
 668                 *cq_prod = 0;
 669                 return 0;
 670         }
 671
 672         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 673         *cq_prod = qp->cq_prod;
 674
 675         if (!qp->resp_offloaded) {
 676                 /* If a responder was never offload, we need to free the cids
 677                  * allocated in create_qp as a FW async event will never arrive
 678                  */
 679                 u32 cid;
 680
 681                 cid = qp->icid -
 682                       qed_cxt_get_proto_cid_start(p_hwfn,
 683                                                   p_hwfn->p_rdma_info->proto);
 684                 qed_roce_free_cid_pair(p_hwfn, (u16)cid);
 685
 686                 return 0;
 687         }
 688
 689         /* Get SPQ entry */
 690         memset(&init_data, 0, sizeof(init_data));
 691         init_data.cid = qp->icid;
 692         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 693         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 694
 695         rc = qed_sp_init_request(p_hwfn, &p_ent,
 696                                  ROCE_RAMROD_DESTROY_QP,
 697                                  PROTOCOLID_ROCE, &init_data);
 698         if (rc)
 699                 return rc;
 700
 701         p_ramrod = &p_ent->ramrod.roce_destroy_qp_resp;
 702
 703         p_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 704                                           sizeof(*p_ramrod_res),
 705                                           &ramrod_res_phys, GFP_KERNEL);
 706
 707         if (!p_ramrod_res) {
 708                 rc = -ENOMEM;
 709                 DP_NOTICE(p_hwfn,
 710                           "qed destroy responder failed: cannot allocate memory (ramrod). rc = %d\n",
 711                           rc);
 712                 qed_sp_destroy_request(p_hwfn, p_ent);
 713                 return rc;
 714         }
 715
 716         DMA_REGPAIR_LE(p_ramrod->output_params_addr, ramrod_res_phys);
 717
 718         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 719         if (rc)
 720                 goto err;
 721
 722         *cq_prod = le32_to_cpu(p_ramrod_res->cq_prod);
 723         qp->cq_prod = *cq_prod;
 724
 725         /* Free IRQ - only if ramrod succeeded, in case FW is still using it */
 726         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 727                           qp->irq_num_pages * RDMA_RING_PAGE_SIZE,
 728                           qp->irq, qp->irq_phys_addr);
 729
 730         qp->resp_offloaded = false;
 731
 732         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Destroy responder, rc = %d\n", rc);
 733
 734 err:
 735         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 736                           sizeof(struct roce_destroy_qp_resp_output_params),
 737                           p_ramrod_res, ramrod_res_phys);
 738
 739         return rc;
 740 }
 741
 742 static int qed_roce_sp_destroy_qp_requester(struct qed_hwfn *p_hwfn,
 743                                             struct qed_rdma_qp *qp)
 744 {
 745         struct roce_destroy_qp_req_output_params *p_ramrod_res;
 746         struct roce_destroy_qp_req_ramrod_data *p_ramrod;
 747         struct qed_sp_init_data init_data;
 748         struct qed_spq_entry *p_ent;
 749         dma_addr_t ramrod_res_phys;
 750         int rc = -ENOMEM;
 751
 752         if (!qp->has_req)
 753                 return 0;
 754
 755         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid);
 756
 757         if (!qp->req_offloaded)
 758                 return 0;
 759
 760         p_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 761                                           sizeof(*p_ramrod_res),
 762                                           &ramrod_res_phys, GFP_KERNEL);
 763         if (!p_ramrod_res) {
 764                 DP_NOTICE(p_hwfn,
 765                           "qed destroy requester failed: cannot allocate memory (ramrod)\n");
 766                 return rc;
 767         }
 768
 769         /* Get SPQ entry */
 770         memset(&init_data, 0, sizeof(init_data));
 771         init_data.cid = qp->icid + 1;
 772         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 773         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 774
 775         rc = qed_sp_init_request(p_hwfn, &p_ent, ROCE_RAMROD_DESTROY_QP,
 776                                  PROTOCOLID_ROCE, &init_data);
 777         if (rc)
 778                 goto err;
 779
 780         p_ramrod = &p_ent->ramrod.roce_destroy_qp_req;
 781         DMA_REGPAIR_LE(p_ramrod->output_params_addr, ramrod_res_phys);
 782
 783         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 784         if (rc)
 785                 goto err;
 786
 787
 788         /* Free ORQ - only if ramrod succeeded, in case FW is still using it */
 789         dma_free_coherent(&p_hwfn->cdev->pdev->dev,
 790                           qp->orq_num_pages * RDMA_RING_PAGE_SIZE,
 791                           qp->orq, qp->orq_phys_addr);
 792
 793         qp->req_offloaded = false;
 794
 795         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Destroy requester, rc = %d\n", rc);
 796
 797 err:
 798         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_ramrod_res),
 799                           p_ramrod_res, ramrod_res_phys);
 800
 801         return rc;
 802 }
 803
 804 int qed_roce_query_qp(struct qed_hwfn *p_hwfn,
 805                       struct qed_rdma_qp *qp,
 806                       struct qed_rdma_query_qp_out_params *out_params)
 807 {
 808         struct roce_query_qp_resp_output_params *p_resp_ramrod_res;
 809         struct roce_query_qp_req_output_params *p_req_ramrod_res;
 810         struct roce_query_qp_resp_ramrod_data *p_resp_ramrod;
 811         struct roce_query_qp_req_ramrod_data *p_req_ramrod;
 812         struct qed_sp_init_data init_data;
 813         dma_addr_t resp_ramrod_res_phys;
 814         dma_addr_t req_ramrod_res_phys;
 815         struct qed_spq_entry *p_ent;
 816         bool rq_err_state;
 817         bool sq_err_state;
 818         bool sq_draining;
 819         int rc = -ENOMEM;
 820
 821         if ((!(qp->resp_offloaded)) && (!(qp->req_offloaded))) {
 822                 /* We can't send ramrod to the fw since this qp wasn't offloaded
 823                  * to the fw yet
 824                  */
 825                 out_params->draining = false;
 826                 out_params->rq_psn = qp->rq_psn;
 827                 out_params->sq_psn = qp->sq_psn;
 828                 out_params->state = qp->cur_state;
 829
 830                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "No QPs as no offload\n");
 831                 return 0;
 832         }
 833
 834         if (!(qp->resp_offloaded)) {
 835                 DP_NOTICE(p_hwfn,
 836                           "The responder's qp should be offloaded before requester's\n");
 837                 return -EINVAL;
 838         }
 839
 840         /* Send a query responder ramrod to FW to get RQ-PSN and state */
 841         p_resp_ramrod_res =
 842                 dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 843                                    sizeof(*p_resp_ramrod_res),
 844                                    &resp_ramrod_res_phys, GFP_KERNEL);
 845         if (!p_resp_ramrod_res) {
 846                 DP_NOTICE(p_hwfn,
 847                           "qed query qp failed: cannot allocate memory (ramrod)\n");
 848                 return rc;
 849         }
 850
 851         /* Get SPQ entry */
 852         memset(&init_data, 0, sizeof(init_data));
 853         init_data.cid = qp->icid;
 854         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 855         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 856         rc = qed_sp_init_request(p_hwfn, &p_ent, ROCE_RAMROD_QUERY_QP,
 857                                  PROTOCOLID_ROCE, &init_data);
 858         if (rc)
 859                 goto err_resp;
 860
 861         p_resp_ramrod = &p_ent->ramrod.roce_query_qp_resp;
 862         DMA_REGPAIR_LE(p_resp_ramrod->output_params_addr, resp_ramrod_res_phys);
 863
 864         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 865         if (rc)
 866                 goto err_resp;
 867
 868         out_params->rq_psn = le32_to_cpu(p_resp_ramrod_res->psn);
 869         rq_err_state = GET_FIELD(le32_to_cpu(p_resp_ramrod_res->flags),
 870                                  ROCE_QUERY_QP_RESP_OUTPUT_PARAMS_ERROR_FLG);
 871
 872         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_resp_ramrod_res),
 873                           p_resp_ramrod_res, resp_ramrod_res_phys);
 874
 875         if (!(qp->req_offloaded)) {
 876                 /* Don't send query qp for the requester */
 877                 out_params->sq_psn = qp->sq_psn;
 878                 out_params->draining = false;
 879
 880                 if (rq_err_state)
 881                         qp->cur_state = QED_ROCE_QP_STATE_ERR;
 882
 883                 out_params->state = qp->cur_state;
 884
 885                 return 0;
 886         }
 887
 888         /* Send a query requester ramrod to FW to get SQ-PSN and state */
 889         p_req_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
 890                                               sizeof(*p_req_ramrod_res),
 891                                               &req_ramrod_res_phys,
 892                                               GFP_KERNEL);
 893         if (!p_req_ramrod_res) {
 894                 rc = -ENOMEM;
 895                 DP_NOTICE(p_hwfn,
 896                           "qed query qp failed: cannot allocate memory (ramrod)\n");
 897                 return rc;
 898         }
 899
 900         /* Get SPQ entry */
 901         init_data.cid = qp->icid + 1;
 902         rc = qed_sp_init_request(p_hwfn, &p_ent, ROCE_RAMROD_QUERY_QP,
 903                                  PROTOCOLID_ROCE, &init_data);
 904         if (rc)
 905                 goto err_req;
 906
 907         p_req_ramrod = &p_ent->ramrod.roce_query_qp_req;
 908         DMA_REGPAIR_LE(p_req_ramrod->output_params_addr, req_ramrod_res_phys);
 909
 910         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 911         if (rc)
 912                 goto err_req;
 913
 914         out_params->sq_psn = le32_to_cpu(p_req_ramrod_res->psn);
 915         sq_err_state = GET_FIELD(le32_to_cpu(p_req_ramrod_res->flags),
 916                                  ROCE_QUERY_QP_REQ_OUTPUT_PARAMS_ERR_FLG);
 917         sq_draining =
 918                 GET_FIELD(le32_to_cpu(p_req_ramrod_res->flags),
 919                           ROCE_QUERY_QP_REQ_OUTPUT_PARAMS_SQ_DRAINING_FLG);
 920
 921         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_req_ramrod_res),
 922                           p_req_ramrod_res, req_ramrod_res_phys);
 923
 924         out_params->draining = false;
 925
 926         if (rq_err_state || sq_err_state)
 927                 qp->cur_state = QED_ROCE_QP_STATE_ERR;
 928         else if (sq_draining)
 929                 out_params->draining = true;
 930         out_params->state = qp->cur_state;
 931
 932         return 0;
 933
 934 err_req:
 935         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_req_ramrod_res),
 936                           p_req_ramrod_res, req_ramrod_res_phys);
 937         return rc;
 938 err_resp:
 939         dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_resp_ramrod_res),
 940                           p_resp_ramrod_res, resp_ramrod_res_phys);
 941         return rc;
 942 }
 943
 944 int qed_roce_destroy_qp(struct qed_hwfn *p_hwfn, struct qed_rdma_qp *qp)
 945 {
 946         u32 cq_prod;
 947         int rc;
 948
 949         /* Destroys the specified QP */
 950         if ((qp->cur_state != QED_ROCE_QP_STATE_RESET) &&
 951             (qp->cur_state != QED_ROCE_QP_STATE_ERR) &&
 952             (qp->cur_state != QED_ROCE_QP_STATE_INIT)) {
 953                 DP_NOTICE(p_hwfn,
 954                           "QP must be in error, reset or init state before destroying it\n");
 955                 return -EINVAL;
 956         }
 957
 958         if (qp->cur_state != QED_ROCE_QP_STATE_RESET) {
 959                 rc = qed_roce_sp_destroy_qp_responder(p_hwfn, qp,
 960                                                       &cq_prod);
 961                 if (rc)
 962                         return rc;
 963
 964                 /* Send destroy requester ramrod */
 965                 rc = qed_roce_sp_destroy_qp_requester(p_hwfn, qp);
 966                 if (rc)
 967                         return rc;
 968         }
 969
 970         return 0;
 971 }
 972
 973 int qed_roce_modify_qp(struct qed_hwfn *p_hwfn,
 974                        struct qed_rdma_qp *qp,
 975                        enum qed_roce_qp_state prev_state,
 976                        struct qed_rdma_modify_qp_in_params *params)
 977 {
 978         int rc = 0;
 979
 980         /* Perform additional operations according to the current state and the
 981          * next state
 982          */
 983         if (((prev_state == QED_ROCE_QP_STATE_INIT) ||
 984              (prev_state == QED_ROCE_QP_STATE_RESET)) &&
 985             (qp->cur_state == QED_ROCE_QP_STATE_RTR)) {
 986                 /* Init->RTR or Reset->RTR */
 987                 rc = qed_roce_sp_create_responder(p_hwfn, qp);
 988                 return rc;
 989         } else if ((prev_state == QED_ROCE_QP_STATE_RTR) &&
 990                    (qp->cur_state == QED_ROCE_QP_STATE_RTS)) {
 991                 /* RTR-> RTS */
 992                 rc = qed_roce_sp_create_requester(p_hwfn, qp);
 993                 if (rc)
 994                         return rc;
 995
 996                 /* Send modify responder ramrod */
 997                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, false,
 998                                                   params->modify_flags);
 999                 return rc;
1000         } else if ((prev_state == QED_ROCE_QP_STATE_RTS) &&
1001                    (qp->cur_state == QED_ROCE_QP_STATE_RTS)) {
1002                 /* RTS->RTS */
1003                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, false,
1004                                                   params->modify_flags);
1005                 if (rc)
1006                         return rc;
1007
1008                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, false, false,
1009                                                   params->modify_flags);
1010                 return rc;
1011         } else if ((prev_state == QED_ROCE_QP_STATE_RTS) &&
1012                    (qp->cur_state == QED_ROCE_QP_STATE_SQD)) {
1013                 /* RTS->SQD */
1014                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, true, false,
1015                                                   params->modify_flags);
1016                 return rc;
1017         } else if ((prev_state == QED_ROCE_QP_STATE_SQD) &&
1018                    (qp->cur_state == QED_ROCE_QP_STATE_SQD)) {
1019                 /* SQD->SQD */
1020                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, false,
1021                                                   params->modify_flags);
1022                 if (rc)
1023                         return rc;
1024
1025                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, false, false,
1026                                                   params->modify_flags);
1027                 return rc;
1028         } else if ((prev_state == QED_ROCE_QP_STATE_SQD) &&
1029                    (qp->cur_state == QED_ROCE_QP_STATE_RTS)) {
1030                 /* SQD->RTS */
1031                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, false,
1032                                                   params->modify_flags);
1033                 if (rc)
1034                         return rc;
1035
1036                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, false, false,
1037                                                   params->modify_flags);
1038
1039                 return rc;
1040         } else if (qp->cur_state == QED_ROCE_QP_STATE_ERR) {
1041                 /* ->ERR */
1042                 rc = qed_roce_sp_modify_responder(p_hwfn, qp, true,
1043                                                   params->modify_flags);
1044                 if (rc)
1045                         return rc;
1046
1047                 rc = qed_roce_sp_modify_requester(p_hwfn, qp, false, true,
1048                                                   params->modify_flags);
1049                 return rc;
1050         } else if (qp->cur_state == QED_ROCE_QP_STATE_RESET) {
1051                 /* Any state -> RESET */
1052                 u32 cq_prod;
1053
1054                 /* Send destroy responder ramrod */
1055                 rc = qed_roce_sp_destroy_qp_responder(p_hwfn,
1056                                                       qp,
1057                                                       &cq_prod);
1058
1059                 if (rc)
1060                         return rc;
1061
1062                 qp->cq_prod = cq_prod;
1063
1064                 rc = qed_roce_sp_destroy_qp_requester(p_hwfn, qp);
1065         } else {
1066                 DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "0\n");
1067         }
1068
1069         return rc;
1070 }
1071
1072 static void qed_roce_free_real_icid(struct qed_hwfn *p_hwfn, u16 icid)
1073 {
1074         struct qed_rdma_info *p_rdma_info = p_hwfn->p_rdma_info;
1075         u32 start_cid, cid, xcid;
1076
1077         /* an even icid belongs to a responder while an odd icid belongs to a
1078          * requester. The 'cid' received as an input can be either. We calculate
1079          * the "partner" icid and call it xcid. Only if both are free then the
1080          * "cid" map can be cleared.
1081          */
1082         start_cid = qed_cxt_get_proto_cid_start(p_hwfn, p_rdma_info->proto);
1083         cid = icid - start_cid;
1084         xcid = cid ^ 1;
1085
1086         spin_lock_bh(&p_rdma_info->lock);
1087
1088         qed_bmap_release_id(p_hwfn, &p_rdma_info->real_cid_map, cid);
1089         if (qed_bmap_test_id(p_hwfn, &p_rdma_info->real_cid_map, xcid) == 0) {
1090                 qed_bmap_release_id(p_hwfn, &p_rdma_info->cid_map, cid);
1091                 qed_bmap_release_id(p_hwfn, &p_rdma_info->cid_map, xcid);
1092         }
1093
1094         spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1095 }
1096
1097 void qed_roce_dpm_dcbx(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1098 {
1099         u8 val;
1100
1101         /* if any QPs are already active, we want to disable DPM, since their
1102          * context information contains information from before the latest DCBx
1103          * update. Otherwise enable it.
1104          */
1105         val = qed_rdma_allocated_qps(p_hwfn) ? true : false;
1106         p_hwfn->dcbx_no_edpm = (u8)val;
1107
1108         qed_rdma_dpm_conf(p_hwfn, p_ptt);
1109 }
1110
1111 int qed_roce_setup(struct qed_hwfn *p_hwfn)
1112 {
1113         return qed_spq_register_async_cb(p_hwfn, PROTOCOLID_ROCE,
1114                                          qed_roce_async_event);
1115 }
1116
1117 int qed_roce_init_hw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1118 {
1119         u32 ll2_ethertype_en;
1120
1121         qed_wr(p_hwfn, p_ptt, PRS_REG_ROCE_DEST_QP_MAX_PF, 0);
1122
1123         p_hwfn->rdma_prs_search_reg = PRS_REG_SEARCH_ROCE;
1124
1125         ll2_ethertype_en = qed_rd(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN);
1126         qed_wr(p_hwfn, p_ptt, PRS_REG_LIGHT_L2_ETHERTYPE_EN,
1127                (ll2_ethertype_en | 0x01));
1128
1129         if (qed_cxt_get_proto_cid_start(p_hwfn, PROTOCOLID_ROCE) % 2) {
1130                 DP_NOTICE(p_hwfn, "The first RoCE's cid should be even\n");
1131                 return -EINVAL;
1132         }
1133
1134         DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Initializing HW - Done\n");
1135         return 0;
1136 }