2749df593ebcbaedf8c8f3d8af9762e54cf7428c
[platform/kernel/linux-rpi.git] / drivers / net / ethernet / mscc / ocelot_vcap.c
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Microsemi Ocelot Switch driver
3  * Copyright (c) 2019 Microsemi Corporation
4  */
5
6 #include <linux/iopoll.h>
7 #include <linux/proc_fs.h>
8
9 #include <soc/mscc/ocelot_vcap.h>
10 #include "ocelot_police.h"
11 #include "ocelot_vcap.h"
12
13 #define ENTRY_WIDTH 32
14
15 enum vcap_sel {
16         VCAP_SEL_ENTRY = 0x1,
17         VCAP_SEL_ACTION = 0x2,
18         VCAP_SEL_COUNTER = 0x4,
19         VCAP_SEL_ALL = 0x7,
20 };
21
22 enum vcap_cmd {
23         VCAP_CMD_WRITE = 0, /* Copy from Cache to TCAM */
24         VCAP_CMD_READ = 1, /* Copy from TCAM to Cache */
25         VCAP_CMD_MOVE_UP = 2, /* Move <count> up */
26         VCAP_CMD_MOVE_DOWN = 3, /* Move <count> down */
27         VCAP_CMD_INITIALIZE = 4, /* Write all (from cache) */
28 };
29
30 #define VCAP_ENTRY_WIDTH 12 /* Max entry width (32bit words) */
31 #define VCAP_COUNTER_WIDTH 4 /* Max counter width (32bit words) */
32
33 struct vcap_data {
34         u32 entry[VCAP_ENTRY_WIDTH]; /* ENTRY_DAT */
35         u32 mask[VCAP_ENTRY_WIDTH]; /* MASK_DAT */
36         u32 action[VCAP_ENTRY_WIDTH]; /* ACTION_DAT */
37         u32 counter[VCAP_COUNTER_WIDTH]; /* CNT_DAT */
38         u32 tg; /* TG_DAT */
39         u32 type; /* Action type */
40         u32 tg_sw; /* Current type-group */
41         u32 cnt; /* Current counter */
42         u32 key_offset; /* Current entry offset */
43         u32 action_offset; /* Current action offset */
44         u32 counter_offset; /* Current counter offset */
45         u32 tg_value; /* Current type-group value */
46         u32 tg_mask; /* Current type-group mask */
47 };
48
49 static u32 vcap_read_update_ctrl(struct ocelot *ocelot,
50                                  const struct vcap_props *vcap)
51 {
52         return ocelot_target_read(ocelot, vcap->target, VCAP_CORE_UPDATE_CTRL);
53 }
54
55 static void vcap_cmd(struct ocelot *ocelot, const struct vcap_props *vcap,
56                      u16 ix, int cmd, int sel)
57 {
58         u32 value = (VCAP_CORE_UPDATE_CTRL_UPDATE_CMD(cmd) |
59                      VCAP_CORE_UPDATE_CTRL_UPDATE_ADDR(ix) |
60                      VCAP_CORE_UPDATE_CTRL_UPDATE_SHOT);
61
62         if ((sel & VCAP_SEL_ENTRY) && ix >= vcap->entry_count)
63                 return;
64
65         if (!(sel & VCAP_SEL_ENTRY))
66                 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_ENTRY_DIS;
67
68         if (!(sel & VCAP_SEL_ACTION))
69                 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_ACTION_DIS;
70
71         if (!(sel & VCAP_SEL_COUNTER))
72                 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_CNT_DIS;
73
74         ocelot_target_write(ocelot, vcap->target, value, VCAP_CORE_UPDATE_CTRL);
75
76         read_poll_timeout(vcap_read_update_ctrl, value,
77                           (value & VCAP_CORE_UPDATE_CTRL_UPDATE_SHOT) == 0,
78                           10, 100000, false, ocelot, vcap);
79 }
80
81 /* Convert from 0-based row to VCAP entry row and run command */
82 static void vcap_row_cmd(struct ocelot *ocelot, const struct vcap_props *vcap,
83                          u32 row, int cmd, int sel)
84 {
85         vcap_cmd(ocelot, vcap, vcap->entry_count - row - 1, cmd, sel);
86 }
87
88 static void vcap_entry2cache(struct ocelot *ocelot,
89                              const struct vcap_props *vcap,
90                              struct vcap_data *data)
91 {
92         u32 entry_words, i;
93
94         entry_words = DIV_ROUND_UP(vcap->entry_width, ENTRY_WIDTH);
95
96         for (i = 0; i < entry_words; i++) {
97                 ocelot_target_write_rix(ocelot, vcap->target, data->entry[i],
98                                         VCAP_CACHE_ENTRY_DAT, i);
99                 ocelot_target_write_rix(ocelot, vcap->target, ~data->mask[i],
100                                         VCAP_CACHE_MASK_DAT, i);
101         }
102         ocelot_target_write(ocelot, vcap->target, data->tg, VCAP_CACHE_TG_DAT);
103 }
104
105 static void vcap_cache2entry(struct ocelot *ocelot,
106                              const struct vcap_props *vcap,
107                              struct vcap_data *data)
108 {
109         u32 entry_words, i;
110
111         entry_words = DIV_ROUND_UP(vcap->entry_width, ENTRY_WIDTH);
112
113         for (i = 0; i < entry_words; i++) {
114                 data->entry[i] = ocelot_target_read_rix(ocelot, vcap->target,
115                                                         VCAP_CACHE_ENTRY_DAT, i);
116                 // Invert mask
117                 data->mask[i] = ~ocelot_target_read_rix(ocelot, vcap->target,
118                                                         VCAP_CACHE_MASK_DAT, i);
119         }
120         data->tg = ocelot_target_read(ocelot, vcap->target, VCAP_CACHE_TG_DAT);
121 }
122
123 static void vcap_action2cache(struct ocelot *ocelot,
124                               const struct vcap_props *vcap,
125                               struct vcap_data *data)
126 {
127         u32 action_words, mask;
128         int i, width;
129
130         /* Encode action type */
131         width = vcap->action_type_width;
132         if (width) {
133                 mask = GENMASK(width, 0);
134                 data->action[0] = ((data->action[0] & ~mask) | data->type);
135         }
136
137         action_words = DIV_ROUND_UP(vcap->action_width, ENTRY_WIDTH);
138
139         for (i = 0; i < action_words; i++)
140                 ocelot_target_write_rix(ocelot, vcap->target, data->action[i],
141                                         VCAP_CACHE_ACTION_DAT, i);
142
143         for (i = 0; i < vcap->counter_words; i++)
144                 ocelot_target_write_rix(ocelot, vcap->target, data->counter[i],
145                                         VCAP_CACHE_CNT_DAT, i);
146 }
147
148 static void vcap_cache2action(struct ocelot *ocelot,
149                               const struct vcap_props *vcap,
150                               struct vcap_data *data)
151 {
152         u32 action_words;
153         int i, width;
154
155         action_words = DIV_ROUND_UP(vcap->action_width, ENTRY_WIDTH);
156
157         for (i = 0; i < action_words; i++)
158                 data->action[i] = ocelot_target_read_rix(ocelot, vcap->target,
159                                                          VCAP_CACHE_ACTION_DAT,
160                                                          i);
161
162         for (i = 0; i < vcap->counter_words; i++)
163                 data->counter[i] = ocelot_target_read_rix(ocelot, vcap->target,
164                                                           VCAP_CACHE_CNT_DAT,
165                                                           i);
166
167         /* Extract action type */
168         width = vcap->action_type_width;
169         data->type = (width ? (data->action[0] & GENMASK(width, 0)) : 0);
170 }
171
172 /* Calculate offsets for entry */
173 static void vcap_data_offset_get(const struct vcap_props *vcap,
174                                  struct vcap_data *data, int ix)
175 {
176         int num_subwords_per_entry, num_subwords_per_action;
177         int i, col, offset, num_entries_per_row, base;
178         u32 width = vcap->tg_width;
179
180         switch (data->tg_sw) {
181         case VCAP_TG_FULL:
182                 num_entries_per_row = 1;
183                 break;
184         case VCAP_TG_HALF:
185                 num_entries_per_row = 2;
186                 break;
187         case VCAP_TG_QUARTER:
188                 num_entries_per_row = 4;
189                 break;
190         default:
191                 return;
192         }
193
194         col = (ix % num_entries_per_row);
195         num_subwords_per_entry = (vcap->sw_count / num_entries_per_row);
196         base = (vcap->sw_count - col * num_subwords_per_entry -
197                 num_subwords_per_entry);
198         data->tg_value = 0;
199         data->tg_mask = 0;
200         for (i = 0; i < num_subwords_per_entry; i++) {
201                 offset = ((base + i) * width);
202                 data->tg_value |= (data->tg_sw << offset);
203                 data->tg_mask |= GENMASK(offset + width - 1, offset);
204         }
205
206         /* Calculate key/action/counter offsets */
207         col = (num_entries_per_row - col - 1);
208         data->key_offset = (base * vcap->entry_width) / vcap->sw_count;
209         data->counter_offset = (num_subwords_per_entry * col *
210                                 vcap->counter_width);
211         i = data->type;
212         width = vcap->action_table[i].width;
213         num_subwords_per_action = vcap->action_table[i].count;
214         data->action_offset = ((num_subwords_per_action * col * width) /
215                                 num_entries_per_row);
216         data->action_offset += vcap->action_type_width;
217 }
218
219 static void vcap_data_set(u32 *data, u32 offset, u32 len, u32 value)
220 {
221         u32 i, v, m;
222
223         for (i = 0; i < len; i++, offset++) {
224                 v = data[offset / ENTRY_WIDTH];
225                 m = (1 << (offset % ENTRY_WIDTH));
226                 if (value & (1 << i))
227                         v |= m;
228                 else
229                         v &= ~m;
230                 data[offset / ENTRY_WIDTH] = v;
231         }
232 }
233
234 static u32 vcap_data_get(u32 *data, u32 offset, u32 len)
235 {
236         u32 i, v, m, value = 0;
237
238         for (i = 0; i < len; i++, offset++) {
239                 v = data[offset / ENTRY_WIDTH];
240                 m = (1 << (offset % ENTRY_WIDTH));
241                 if (v & m)
242                         value |= (1 << i);
243         }
244         return value;
245 }
246
247 static void vcap_key_field_set(struct vcap_data *data, u32 offset, u32 width,
248                                u32 value, u32 mask)
249 {
250         vcap_data_set(data->entry, offset + data->key_offset, width, value);
251         vcap_data_set(data->mask, offset + data->key_offset, width, mask);
252 }
253
254 static void vcap_key_set(const struct vcap_props *vcap, struct vcap_data *data,
255                          int field, u32 value, u32 mask)
256 {
257         u32 offset = vcap->keys[field].offset;
258         u32 length = vcap->keys[field].length;
259
260         vcap_key_field_set(data, offset, length, value, mask);
261 }
262
263 static void vcap_key_bytes_set(const struct vcap_props *vcap,
264                                struct vcap_data *data, int field,
265                                u8 *val, u8 *msk)
266 {
267         u32 offset = vcap->keys[field].offset;
268         u32 count  = vcap->keys[field].length;
269         u32 i, j, n = 0, value = 0, mask = 0;
270
271         WARN_ON(count % 8);
272
273         /* Data wider than 32 bits are split up in chunks of maximum 32 bits.
274          * The 32 LSB of the data are written to the 32 MSB of the TCAM.
275          */
276         offset += count;
277         count /= 8;
278
279         for (i = 0; i < count; i++) {
280                 j = (count - i - 1);
281                 value += (val[j] << n);
282                 mask += (msk[j] << n);
283                 n += 8;
284                 if (n == ENTRY_WIDTH || (i + 1) == count) {
285                         offset -= n;
286                         vcap_key_field_set(data, offset, n, value, mask);
287                         n = 0;
288                         value = 0;
289                         mask = 0;
290                 }
291         }
292 }
293
294 static void vcap_key_l4_port_set(const struct vcap_props *vcap,
295                                  struct vcap_data *data, int field,
296                                  struct ocelot_vcap_udp_tcp *port)
297 {
298         u32 offset = vcap->keys[field].offset;
299         u32 length = vcap->keys[field].length;
300
301         WARN_ON(length != 16);
302
303         vcap_key_field_set(data, offset, length, port->value, port->mask);
304 }
305
306 static void vcap_key_bit_set(const struct vcap_props *vcap,
307                              struct vcap_data *data, int field,
308                              enum ocelot_vcap_bit val)
309 {
310         u32 value = (val == OCELOT_VCAP_BIT_1 ? 1 : 0);
311         u32 msk = (val == OCELOT_VCAP_BIT_ANY ? 0 : 1);
312         u32 offset = vcap->keys[field].offset;
313         u32 length = vcap->keys[field].length;
314
315         WARN_ON(length != 1);
316
317         vcap_key_field_set(data, offset, length, value, msk);
318 }
319
320 static void vcap_action_set(const struct vcap_props *vcap,
321                             struct vcap_data *data, int field, u32 value)
322 {
323         int offset = vcap->actions[field].offset;
324         int length = vcap->actions[field].length;
325
326         vcap_data_set(data->action, offset + data->action_offset, length,
327                       value);
328 }
329
330 static void is2_action_set(struct ocelot *ocelot, struct vcap_data *data,
331                            struct ocelot_vcap_filter *filter)
332 {
333         const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS2];
334         struct ocelot_vcap_action *a = &filter->action;
335
336         vcap_action_set(vcap, data, VCAP_IS2_ACT_MASK_MODE, a->mask_mode);
337         vcap_action_set(vcap, data, VCAP_IS2_ACT_PORT_MASK, a->port_mask);
338         vcap_action_set(vcap, data, VCAP_IS2_ACT_MIRROR_ENA, a->mirror_ena);
339         vcap_action_set(vcap, data, VCAP_IS2_ACT_POLICE_ENA, a->police_ena);
340         vcap_action_set(vcap, data, VCAP_IS2_ACT_POLICE_IDX, a->pol_ix);
341         vcap_action_set(vcap, data, VCAP_IS2_ACT_CPU_QU_NUM, a->cpu_qu_num);
342         vcap_action_set(vcap, data, VCAP_IS2_ACT_CPU_COPY_ENA, a->cpu_copy_ena);
343 }
344
345 static void is2_entry_set(struct ocelot *ocelot, int ix,
346                           struct ocelot_vcap_filter *filter)
347 {
348         const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS2];
349         struct ocelot_vcap_key_vlan *tag = &filter->vlan;
350         u32 val, msk, type, type_mask = 0xf, i, count;
351         struct ocelot_vcap_u64 payload;
352         struct vcap_data data;
353         int row = (ix / 2);
354
355         memset(&payload, 0, sizeof(payload));
356         memset(&data, 0, sizeof(data));
357
358         /* Read row */
359         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
360         vcap_cache2entry(ocelot, vcap, &data);
361         vcap_cache2action(ocelot, vcap, &data);
362
363         data.tg_sw = VCAP_TG_HALF;
364         vcap_data_offset_get(vcap, &data, ix);
365         data.tg = (data.tg & ~data.tg_mask);
366         if (filter->prio != 0)
367                 data.tg |= data.tg_value;
368
369         data.type = IS2_ACTION_TYPE_NORMAL;
370
371         vcap_key_set(vcap, &data, VCAP_IS2_HK_PAG, filter->pag, 0xff);
372         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_FIRST,
373                          (filter->lookup == 0) ? OCELOT_VCAP_BIT_1 :
374                          OCELOT_VCAP_BIT_0);
375         vcap_key_set(vcap, &data, VCAP_IS2_HK_IGR_PORT_MASK, 0,
376                      ~filter->ingress_port_mask);
377         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_FIRST, OCELOT_VCAP_BIT_ANY);
378         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_HOST_MATCH,
379                          OCELOT_VCAP_BIT_ANY);
380         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L2_MC, filter->dmac_mc);
381         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L2_BC, filter->dmac_bc);
382         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_VLAN_TAGGED, tag->tagged);
383         vcap_key_set(vcap, &data, VCAP_IS2_HK_VID,
384                      tag->vid.value, tag->vid.mask);
385         vcap_key_set(vcap, &data, VCAP_IS2_HK_PCP,
386                      tag->pcp.value[0], tag->pcp.mask[0]);
387         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_DEI, tag->dei);
388
389         switch (filter->key_type) {
390         case OCELOT_VCAP_KEY_ETYPE: {
391                 struct ocelot_vcap_key_etype *etype = &filter->key.etype;
392
393                 type = IS2_TYPE_ETYPE;
394                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
395                                    etype->dmac.value, etype->dmac.mask);
396                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
397                                    etype->smac.value, etype->smac.mask);
398                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_ETYPE,
399                                    etype->etype.value, etype->etype.mask);
400                 /* Clear unused bits */
401                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD0,
402                              0, 0);
403                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD1,
404                              0, 0);
405                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD2,
406                              0, 0);
407                 vcap_key_bytes_set(vcap, &data,
408                                    VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD0,
409                                    etype->data.value, etype->data.mask);
410                 break;
411         }
412         case OCELOT_VCAP_KEY_LLC: {
413                 struct ocelot_vcap_key_llc *llc = &filter->key.llc;
414
415                 type = IS2_TYPE_LLC;
416                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
417                                    llc->dmac.value, llc->dmac.mask);
418                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
419                                    llc->smac.value, llc->smac.mask);
420                 for (i = 0; i < 4; i++) {
421                         payload.value[i] = llc->llc.value[i];
422                         payload.mask[i] = llc->llc.mask[i];
423                 }
424                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_LLC_L2_LLC,
425                                    payload.value, payload.mask);
426                 break;
427         }
428         case OCELOT_VCAP_KEY_SNAP: {
429                 struct ocelot_vcap_key_snap *snap = &filter->key.snap;
430
431                 type = IS2_TYPE_SNAP;
432                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
433                                    snap->dmac.value, snap->dmac.mask);
434                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
435                                    snap->smac.value, snap->smac.mask);
436                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_SNAP_L2_SNAP,
437                                    filter->key.snap.snap.value,
438                                    filter->key.snap.snap.mask);
439                 break;
440         }
441         case OCELOT_VCAP_KEY_ARP: {
442                 struct ocelot_vcap_key_arp *arp = &filter->key.arp;
443
444                 type = IS2_TYPE_ARP;
445                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_SMAC,
446                                    arp->smac.value, arp->smac.mask);
447                 vcap_key_bit_set(vcap, &data,
448                                  VCAP_IS2_HK_MAC_ARP_ADDR_SPACE_OK,
449                                  arp->ethernet);
450                 vcap_key_bit_set(vcap, &data,
451                                  VCAP_IS2_HK_MAC_ARP_PROTO_SPACE_OK,
452                                  arp->ip);
453                 vcap_key_bit_set(vcap, &data,
454                                  VCAP_IS2_HK_MAC_ARP_LEN_OK,
455                                  arp->length);
456                 vcap_key_bit_set(vcap, &data,
457                                  VCAP_IS2_HK_MAC_ARP_TARGET_MATCH,
458                                  arp->dmac_match);
459                 vcap_key_bit_set(vcap, &data,
460                                  VCAP_IS2_HK_MAC_ARP_SENDER_MATCH,
461                                  arp->smac_match);
462                 vcap_key_bit_set(vcap, &data,
463                                  VCAP_IS2_HK_MAC_ARP_OPCODE_UNKNOWN,
464                                  arp->unknown);
465
466                 /* OPCODE is inverse, bit 0 is reply flag, bit 1 is RARP flag */
467                 val = ((arp->req == OCELOT_VCAP_BIT_0 ? 1 : 0) |
468                        (arp->arp == OCELOT_VCAP_BIT_0 ? 2 : 0));
469                 msk = ((arp->req == OCELOT_VCAP_BIT_ANY ? 0 : 1) |
470                        (arp->arp == OCELOT_VCAP_BIT_ANY ? 0 : 2));
471                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_OPCODE,
472                              val, msk);
473                 vcap_key_bytes_set(vcap, &data,
474                                    VCAP_IS2_HK_MAC_ARP_L3_IP4_DIP,
475                                    arp->dip.value.addr, arp->dip.mask.addr);
476                 vcap_key_bytes_set(vcap, &data,
477                                    VCAP_IS2_HK_MAC_ARP_L3_IP4_SIP,
478                                    arp->sip.value.addr, arp->sip.mask.addr);
479                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_DIP_EQ_SIP,
480                              0, 0);
481                 break;
482         }
483         case OCELOT_VCAP_KEY_IPV4:
484         case OCELOT_VCAP_KEY_IPV6: {
485                 enum ocelot_vcap_bit sip_eq_dip, sport_eq_dport, seq_zero, tcp;
486                 enum ocelot_vcap_bit ttl, fragment, options, tcp_ack, tcp_urg;
487                 enum ocelot_vcap_bit tcp_fin, tcp_syn, tcp_rst, tcp_psh;
488                 struct ocelot_vcap_key_ipv4 *ipv4 = NULL;
489                 struct ocelot_vcap_key_ipv6 *ipv6 = NULL;
490                 struct ocelot_vcap_udp_tcp *sport, *dport;
491                 struct ocelot_vcap_ipv4 sip, dip;
492                 struct ocelot_vcap_u8 proto, ds;
493                 struct ocelot_vcap_u48 *ip_data;
494
495                 if (filter->key_type == OCELOT_VCAP_KEY_IPV4) {
496                         ipv4 = &filter->key.ipv4;
497                         ttl = ipv4->ttl;
498                         fragment = ipv4->fragment;
499                         options = ipv4->options;
500                         proto = ipv4->proto;
501                         ds = ipv4->ds;
502                         ip_data = &ipv4->data;
503                         sip = ipv4->sip;
504                         dip = ipv4->dip;
505                         sport = &ipv4->sport;
506                         dport = &ipv4->dport;
507                         tcp_fin = ipv4->tcp_fin;
508                         tcp_syn = ipv4->tcp_syn;
509                         tcp_rst = ipv4->tcp_rst;
510                         tcp_psh = ipv4->tcp_psh;
511                         tcp_ack = ipv4->tcp_ack;
512                         tcp_urg = ipv4->tcp_urg;
513                         sip_eq_dip = ipv4->sip_eq_dip;
514                         sport_eq_dport = ipv4->sport_eq_dport;
515                         seq_zero = ipv4->seq_zero;
516                 } else {
517                         ipv6 = &filter->key.ipv6;
518                         ttl = ipv6->ttl;
519                         fragment = OCELOT_VCAP_BIT_ANY;
520                         options = OCELOT_VCAP_BIT_ANY;
521                         proto = ipv6->proto;
522                         ds = ipv6->ds;
523                         ip_data = &ipv6->data;
524                         for (i = 0; i < 8; i++) {
525                                 val = ipv6->sip.value[i + 8];
526                                 msk = ipv6->sip.mask[i + 8];
527                                 if (i < 4) {
528                                         dip.value.addr[i] = val;
529                                         dip.mask.addr[i] = msk;
530                                 } else {
531                                         sip.value.addr[i - 4] = val;
532                                         sip.mask.addr[i - 4] = msk;
533                                 }
534                         }
535                         sport = &ipv6->sport;
536                         dport = &ipv6->dport;
537                         tcp_fin = ipv6->tcp_fin;
538                         tcp_syn = ipv6->tcp_syn;
539                         tcp_rst = ipv6->tcp_rst;
540                         tcp_psh = ipv6->tcp_psh;
541                         tcp_ack = ipv6->tcp_ack;
542                         tcp_urg = ipv6->tcp_urg;
543                         sip_eq_dip = ipv6->sip_eq_dip;
544                         sport_eq_dport = ipv6->sport_eq_dport;
545                         seq_zero = ipv6->seq_zero;
546                 }
547
548                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_IP4,
549                                  ipv4 ? OCELOT_VCAP_BIT_1 : OCELOT_VCAP_BIT_0);
550                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L3_FRAGMENT,
551                                  fragment);
552                 vcap_key_set(vcap, &data, VCAP_IS2_HK_L3_FRAG_OFS_GT0, 0, 0);
553                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L3_OPTIONS,
554                                  options);
555                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_IP4_L3_TTL_GT0,
556                                  ttl);
557                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_TOS,
558                                    ds.value, ds.mask);
559                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_IP4_DIP,
560                                    dip.value.addr, dip.mask.addr);
561                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_IP4_SIP,
562                                    sip.value.addr, sip.mask.addr);
563                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_DIP_EQ_SIP,
564                                  sip_eq_dip);
565                 val = proto.value[0];
566                 msk = proto.mask[0];
567                 type = IS2_TYPE_IP_UDP_TCP;
568                 if (msk == 0xff && (val == IPPROTO_TCP || val == IPPROTO_UDP)) {
569                         /* UDP/TCP protocol match */
570                         tcp = (val == IPPROTO_TCP ?
571                                OCELOT_VCAP_BIT_1 : OCELOT_VCAP_BIT_0);
572                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_TCP, tcp);
573                         vcap_key_l4_port_set(vcap, &data,
574                                              VCAP_IS2_HK_L4_DPORT, dport);
575                         vcap_key_l4_port_set(vcap, &data,
576                                              VCAP_IS2_HK_L4_SPORT, sport);
577                         vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_RNG, 0, 0);
578                         vcap_key_bit_set(vcap, &data,
579                                          VCAP_IS2_HK_L4_SPORT_EQ_DPORT,
580                                          sport_eq_dport);
581                         vcap_key_bit_set(vcap, &data,
582                                          VCAP_IS2_HK_L4_SEQUENCE_EQ0,
583                                          seq_zero);
584                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_FIN,
585                                          tcp_fin);
586                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_SYN,
587                                          tcp_syn);
588                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_RST,
589                                          tcp_rst);
590                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_PSH,
591                                          tcp_psh);
592                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_ACK,
593                                          tcp_ack);
594                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_URG,
595                                          tcp_urg);
596                         vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_1588_DOM,
597                                      0, 0);
598                         vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_1588_VER,
599                                      0, 0);
600                 } else {
601                         if (msk == 0) {
602                                 /* Any IP protocol match */
603                                 type_mask = IS2_TYPE_MASK_IP_ANY;
604                         } else {
605                                 /* Non-UDP/TCP protocol match */
606                                 type = IS2_TYPE_IP_OTHER;
607                                 for (i = 0; i < 6; i++) {
608                                         payload.value[i] = ip_data->value[i];
609                                         payload.mask[i] = ip_data->mask[i];
610                                 }
611                         }
612                         vcap_key_bytes_set(vcap, &data,
613                                            VCAP_IS2_HK_IP4_L3_PROTO,
614                                            proto.value, proto.mask);
615                         vcap_key_bytes_set(vcap, &data,
616                                            VCAP_IS2_HK_L3_PAYLOAD,
617                                            payload.value, payload.mask);
618                 }
619                 break;
620         }
621         case OCELOT_VCAP_KEY_ANY:
622         default:
623                 type = 0;
624                 type_mask = 0;
625                 count = vcap->entry_width / 2;
626                 /* Iterate over the non-common part of the key and
627                  * clear entry data
628                  */
629                 for (i = vcap->keys[VCAP_IS2_HK_L2_DMAC].offset;
630                      i < count; i += ENTRY_WIDTH) {
631                         vcap_key_field_set(&data, i, min(32u, count - i), 0, 0);
632                 }
633                 break;
634         }
635
636         vcap_key_set(vcap, &data, VCAP_IS2_TYPE, type, type_mask);
637         is2_action_set(ocelot, &data, filter);
638         vcap_data_set(data.counter, data.counter_offset,
639                       vcap->counter_width, filter->stats.pkts);
640
641         /* Write row */
642         vcap_entry2cache(ocelot, vcap, &data);
643         vcap_action2cache(ocelot, vcap, &data);
644         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
645 }
646
647 static void is1_action_set(struct ocelot *ocelot, struct vcap_data *data,
648                            const struct ocelot_vcap_filter *filter)
649 {
650         const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS1];
651         const struct ocelot_vcap_action *a = &filter->action;
652
653         vcap_action_set(vcap, data, VCAP_IS1_ACT_VID_REPLACE_ENA,
654                         a->vid_replace_ena);
655         vcap_action_set(vcap, data, VCAP_IS1_ACT_VID_ADD_VAL, a->vid);
656         vcap_action_set(vcap, data, VCAP_IS1_ACT_VLAN_POP_CNT_ENA,
657                         a->vlan_pop_cnt_ena);
658         vcap_action_set(vcap, data, VCAP_IS1_ACT_VLAN_POP_CNT,
659                         a->vlan_pop_cnt);
660         vcap_action_set(vcap, data, VCAP_IS1_ACT_PCP_DEI_ENA, a->pcp_dei_ena);
661         vcap_action_set(vcap, data, VCAP_IS1_ACT_PCP_VAL, a->pcp);
662         vcap_action_set(vcap, data, VCAP_IS1_ACT_DEI_VAL, a->dei);
663         vcap_action_set(vcap, data, VCAP_IS1_ACT_QOS_ENA, a->qos_ena);
664         vcap_action_set(vcap, data, VCAP_IS1_ACT_QOS_VAL, a->qos_val);
665         vcap_action_set(vcap, data, VCAP_IS1_ACT_PAG_OVERRIDE_MASK,
666                         a->pag_override_mask);
667         vcap_action_set(vcap, data, VCAP_IS1_ACT_PAG_VAL, a->pag_val);
668 }
669
670 static void is1_entry_set(struct ocelot *ocelot, int ix,
671                           struct ocelot_vcap_filter *filter)
672 {
673         const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS1];
674         struct ocelot_vcap_key_vlan *tag = &filter->vlan;
675         struct ocelot_vcap_u64 payload;
676         struct vcap_data data;
677         int row = ix / 2;
678         u32 type;
679
680         memset(&payload, 0, sizeof(payload));
681         memset(&data, 0, sizeof(data));
682
683         /* Read row */
684         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
685         vcap_cache2entry(ocelot, vcap, &data);
686         vcap_cache2action(ocelot, vcap, &data);
687
688         data.tg_sw = VCAP_TG_HALF;
689         data.type = IS1_ACTION_TYPE_NORMAL;
690         vcap_data_offset_get(vcap, &data, ix);
691         data.tg = (data.tg & ~data.tg_mask);
692         if (filter->prio != 0)
693                 data.tg |= data.tg_value;
694
695         vcap_key_set(vcap, &data, VCAP_IS1_HK_LOOKUP, filter->lookup, 0x3);
696         vcap_key_set(vcap, &data, VCAP_IS1_HK_IGR_PORT_MASK, 0,
697                      ~filter->ingress_port_mask);
698         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_L2_MC, filter->dmac_mc);
699         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_L2_BC, filter->dmac_bc);
700         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_VLAN_TAGGED, tag->tagged);
701         vcap_key_set(vcap, &data, VCAP_IS1_HK_VID,
702                      tag->vid.value, tag->vid.mask);
703         vcap_key_set(vcap, &data, VCAP_IS1_HK_PCP,
704                      tag->pcp.value[0], tag->pcp.mask[0]);
705         type = IS1_TYPE_S1_NORMAL;
706
707         switch (filter->key_type) {
708         case OCELOT_VCAP_KEY_ETYPE: {
709                 struct ocelot_vcap_key_etype *etype = &filter->key.etype;
710
711                 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_L2_SMAC,
712                                    etype->smac.value, etype->smac.mask);
713                 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_ETYPE,
714                                    etype->etype.value, etype->etype.mask);
715                 break;
716         }
717         case OCELOT_VCAP_KEY_IPV4: {
718                 struct ocelot_vcap_key_ipv4 *ipv4 = &filter->key.ipv4;
719                 struct ocelot_vcap_udp_tcp *sport = &ipv4->sport;
720                 struct ocelot_vcap_udp_tcp *dport = &ipv4->dport;
721                 enum ocelot_vcap_bit tcp_udp = OCELOT_VCAP_BIT_0;
722                 struct ocelot_vcap_u8 proto = ipv4->proto;
723                 struct ocelot_vcap_ipv4 sip = ipv4->sip;
724                 u32 val, msk;
725
726                 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_IP_SNAP,
727                                  OCELOT_VCAP_BIT_1);
728                 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_IP4,
729                                  OCELOT_VCAP_BIT_1);
730                 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_ETYPE_LEN,
731                                  OCELOT_VCAP_BIT_1);
732                 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_L3_IP4_SIP,
733                                    sip.value.addr, sip.mask.addr);
734
735                 val = proto.value[0];
736                 msk = proto.mask[0];
737
738                 if ((val == NEXTHDR_TCP || val == NEXTHDR_UDP) && msk == 0xff)
739                         tcp_udp = OCELOT_VCAP_BIT_1;
740                 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TCP_UDP, tcp_udp);
741
742                 if (tcp_udp) {
743                         enum ocelot_vcap_bit tcp = OCELOT_VCAP_BIT_0;
744
745                         if (val == NEXTHDR_TCP)
746                                 tcp = OCELOT_VCAP_BIT_1;
747
748                         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TCP, tcp);
749                         vcap_key_l4_port_set(vcap, &data, VCAP_IS1_HK_L4_SPORT,
750                                              sport);
751                         /* Overloaded field */
752                         vcap_key_l4_port_set(vcap, &data, VCAP_IS1_HK_ETYPE,
753                                              dport);
754                 } else {
755                         /* IPv4 "other" frame */
756                         struct ocelot_vcap_u16 etype = {0};
757
758                         /* Overloaded field */
759                         etype.value[0] = proto.value[0];
760                         etype.mask[0] = proto.mask[0];
761
762                         vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_ETYPE,
763                                            etype.value, etype.mask);
764                 }
765                 break;
766         }
767         default:
768                 break;
769         }
770         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TYPE,
771                          type ? OCELOT_VCAP_BIT_1 : OCELOT_VCAP_BIT_0);
772
773         is1_action_set(ocelot, &data, filter);
774         vcap_data_set(data.counter, data.counter_offset,
775                       vcap->counter_width, filter->stats.pkts);
776
777         /* Write row */
778         vcap_entry2cache(ocelot, vcap, &data);
779         vcap_action2cache(ocelot, vcap, &data);
780         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
781 }
782
783 static void es0_action_set(struct ocelot *ocelot, struct vcap_data *data,
784                            const struct ocelot_vcap_filter *filter)
785 {
786         const struct vcap_props *vcap = &ocelot->vcap[VCAP_ES0];
787         const struct ocelot_vcap_action *a = &filter->action;
788
789         vcap_action_set(vcap, data, VCAP_ES0_ACT_PUSH_OUTER_TAG,
790                         a->push_outer_tag);
791         vcap_action_set(vcap, data, VCAP_ES0_ACT_PUSH_INNER_TAG,
792                         a->push_inner_tag);
793         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_TPID_SEL,
794                         a->tag_a_tpid_sel);
795         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_VID_SEL,
796                         a->tag_a_vid_sel);
797         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_PCP_SEL,
798                         a->tag_a_pcp_sel);
799         vcap_action_set(vcap, data, VCAP_ES0_ACT_VID_A_VAL, a->vid_a_val);
800         vcap_action_set(vcap, data, VCAP_ES0_ACT_PCP_A_VAL, a->pcp_a_val);
801         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_TPID_SEL,
802                         a->tag_b_tpid_sel);
803         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_VID_SEL,
804                         a->tag_b_vid_sel);
805         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_PCP_SEL,
806                         a->tag_b_pcp_sel);
807         vcap_action_set(vcap, data, VCAP_ES0_ACT_VID_B_VAL, a->vid_b_val);
808         vcap_action_set(vcap, data, VCAP_ES0_ACT_PCP_B_VAL, a->pcp_b_val);
809 }
810
811 static void es0_entry_set(struct ocelot *ocelot, int ix,
812                           struct ocelot_vcap_filter *filter)
813 {
814         const struct vcap_props *vcap = &ocelot->vcap[VCAP_ES0];
815         struct ocelot_vcap_key_vlan *tag = &filter->vlan;
816         struct ocelot_vcap_u64 payload;
817         struct vcap_data data;
818         int row = ix;
819
820         memset(&payload, 0, sizeof(payload));
821         memset(&data, 0, sizeof(data));
822
823         /* Read row */
824         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
825         vcap_cache2entry(ocelot, vcap, &data);
826         vcap_cache2action(ocelot, vcap, &data);
827
828         data.tg_sw = VCAP_TG_FULL;
829         data.type = ES0_ACTION_TYPE_NORMAL;
830         vcap_data_offset_get(vcap, &data, ix);
831         data.tg = (data.tg & ~data.tg_mask);
832         if (filter->prio != 0)
833                 data.tg |= data.tg_value;
834
835         vcap_key_set(vcap, &data, VCAP_ES0_IGR_PORT, filter->ingress_port.value,
836                      filter->ingress_port.mask);
837         vcap_key_set(vcap, &data, VCAP_ES0_EGR_PORT, filter->egress_port.value,
838                      filter->egress_port.mask);
839         vcap_key_bit_set(vcap, &data, VCAP_ES0_L2_MC, filter->dmac_mc);
840         vcap_key_bit_set(vcap, &data, VCAP_ES0_L2_BC, filter->dmac_bc);
841         vcap_key_set(vcap, &data, VCAP_ES0_VID,
842                      tag->vid.value, tag->vid.mask);
843         vcap_key_set(vcap, &data, VCAP_ES0_PCP,
844                      tag->pcp.value[0], tag->pcp.mask[0]);
845
846         es0_action_set(ocelot, &data, filter);
847         vcap_data_set(data.counter, data.counter_offset,
848                       vcap->counter_width, filter->stats.pkts);
849
850         /* Write row */
851         vcap_entry2cache(ocelot, vcap, &data);
852         vcap_action2cache(ocelot, vcap, &data);
853         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
854 }
855
856 static void vcap_entry_get(struct ocelot *ocelot, int ix,
857                            struct ocelot_vcap_filter *filter)
858 {
859         const struct vcap_props *vcap = &ocelot->vcap[filter->block_id];
860         struct vcap_data data;
861         int row, count;
862         u32 cnt;
863
864         if (filter->block_id == VCAP_ES0)
865                 data.tg_sw = VCAP_TG_FULL;
866         else
867                 data.tg_sw = VCAP_TG_HALF;
868
869         count = (1 << (data.tg_sw - 1));
870         row = (ix / count);
871         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_COUNTER);
872         vcap_cache2action(ocelot, vcap, &data);
873         vcap_data_offset_get(vcap, &data, ix);
874         cnt = vcap_data_get(data.counter, data.counter_offset,
875                             vcap->counter_width);
876
877         filter->stats.pkts = cnt;
878 }
879
880 static void vcap_entry_set(struct ocelot *ocelot, int ix,
881                            struct ocelot_vcap_filter *filter)
882 {
883         if (filter->block_id == VCAP_IS1)
884                 return is1_entry_set(ocelot, ix, filter);
885         if (filter->block_id == VCAP_IS2)
886                 return is2_entry_set(ocelot, ix, filter);
887         if (filter->block_id == VCAP_ES0)
888                 return es0_entry_set(ocelot, ix, filter);
889 }
890
891 struct vcap_policer_entry {
892         struct list_head list;
893         refcount_t refcount;
894         u32 pol_ix;
895 };
896
897 int ocelot_vcap_policer_add(struct ocelot *ocelot, u32 pol_ix,
898                             struct ocelot_policer *pol)
899 {
900         struct qos_policer_conf pp = { 0 };
901         struct vcap_policer_entry *tmp;
902         int ret;
903
904         if (!pol)
905                 return -EINVAL;
906
907         pp.mode = MSCC_QOS_RATE_MODE_DATA;
908         pp.pir = pol->rate;
909         pp.pbs = pol->burst;
910
911         list_for_each_entry(tmp, &ocelot->vcap_pol.pol_list, list)
912                 if (tmp->pol_ix == pol_ix) {
913                         refcount_inc(&tmp->refcount);
914                         return 0;
915                 }
916
917         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
918         if (!tmp)
919                 return -ENOMEM;
920
921         ret = qos_policer_conf_set(ocelot, 0, pol_ix, &pp);
922         if (ret) {
923                 kfree(tmp);
924                 return ret;
925         }
926
927         tmp->pol_ix = pol_ix;
928         refcount_set(&tmp->refcount, 1);
929         list_add_tail(&tmp->list, &ocelot->vcap_pol.pol_list);
930
931         return 0;
932 }
933 EXPORT_SYMBOL(ocelot_vcap_policer_add);
934
935 int ocelot_vcap_policer_del(struct ocelot *ocelot, u32 pol_ix)
936 {
937         struct qos_policer_conf pp = {0};
938         struct vcap_policer_entry *tmp, *n;
939         u8 z = 0;
940
941         list_for_each_entry_safe(tmp, n, &ocelot->vcap_pol.pol_list, list)
942                 if (tmp->pol_ix == pol_ix) {
943                         z = refcount_dec_and_test(&tmp->refcount);
944                         if (z) {
945                                 list_del(&tmp->list);
946                                 kfree(tmp);
947                         }
948                 }
949
950         if (z) {
951                 pp.mode = MSCC_QOS_RATE_MODE_DISABLED;
952                 return qos_policer_conf_set(ocelot, 0, pol_ix, &pp);
953         }
954
955         return 0;
956 }
957 EXPORT_SYMBOL(ocelot_vcap_policer_del);
958
959 static int
960 ocelot_vcap_filter_add_aux_resources(struct ocelot *ocelot,
961                                      struct ocelot_vcap_filter *filter,
962                                      struct netlink_ext_ack *extack)
963 {
964         struct ocelot_mirror *m;
965         int ret;
966
967         if (filter->block_id == VCAP_IS2 && filter->action.mirror_ena) {
968                 m = ocelot_mirror_get(ocelot, filter->egress_port.value,
969                                       extack);
970                 if (IS_ERR(m))
971                         return PTR_ERR(m);
972         }
973
974         if (filter->block_id == VCAP_IS2 && filter->action.police_ena) {
975                 ret = ocelot_vcap_policer_add(ocelot, filter->action.pol_ix,
976                                               &filter->action.pol);
977                 if (ret)
978                         return ret;
979         }
980
981         return 0;
982 }
983
984 static void
985 ocelot_vcap_filter_del_aux_resources(struct ocelot *ocelot,
986                                      struct ocelot_vcap_filter *filter)
987 {
988         if (filter->block_id == VCAP_IS2 && filter->action.police_ena)
989                 ocelot_vcap_policer_del(ocelot, filter->action.pol_ix);
990
991         if (filter->block_id == VCAP_IS2 && filter->action.mirror_ena)
992                 ocelot_mirror_put(ocelot);
993 }
994
995 static int ocelot_vcap_filter_add_to_block(struct ocelot *ocelot,
996                                            struct ocelot_vcap_block *block,
997                                            struct ocelot_vcap_filter *filter,
998                                            struct netlink_ext_ack *extack)
999 {
1000         struct ocelot_vcap_filter *tmp;
1001         struct list_head *pos, *n;
1002         int ret;
1003
1004         ret = ocelot_vcap_filter_add_aux_resources(ocelot, filter, extack);
1005         if (ret)
1006                 return ret;
1007
1008         block->count++;
1009
1010         if (list_empty(&block->rules)) {
1011                 list_add(&filter->list, &block->rules);
1012                 return 0;
1013         }
1014
1015         list_for_each_safe(pos, n, &block->rules) {
1016                 tmp = list_entry(pos, struct ocelot_vcap_filter, list);
1017                 if (filter->prio < tmp->prio)
1018                         break;
1019         }
1020         list_add(&filter->list, pos->prev);
1021
1022         return 0;
1023 }
1024
1025 static bool ocelot_vcap_filter_equal(const struct ocelot_vcap_filter *a,
1026                                      const struct ocelot_vcap_filter *b)
1027 {
1028         return !memcmp(&a->id, &b->id, sizeof(struct ocelot_vcap_id));
1029 }
1030
1031 static int ocelot_vcap_block_get_filter_index(struct ocelot_vcap_block *block,
1032                                               struct ocelot_vcap_filter *filter)
1033 {
1034         struct ocelot_vcap_filter *tmp;
1035         int index = 0;
1036
1037         list_for_each_entry(tmp, &block->rules, list) {
1038                 if (ocelot_vcap_filter_equal(filter, tmp))
1039                         return index;
1040                 index++;
1041         }
1042
1043         return -ENOENT;
1044 }
1045
1046 static struct ocelot_vcap_filter*
1047 ocelot_vcap_block_find_filter_by_index(struct ocelot_vcap_block *block,
1048                                        int index)
1049 {
1050         struct ocelot_vcap_filter *tmp;
1051         int i = 0;
1052
1053         list_for_each_entry(tmp, &block->rules, list) {
1054                 if (i == index)
1055                         return tmp;
1056                 ++i;
1057         }
1058
1059         return NULL;
1060 }
1061
1062 struct ocelot_vcap_filter *
1063 ocelot_vcap_block_find_filter_by_id(struct ocelot_vcap_block *block,
1064                                     unsigned long cookie, bool tc_offload)
1065 {
1066         struct ocelot_vcap_filter *filter;
1067
1068         list_for_each_entry(filter, &block->rules, list)
1069                 if (filter->id.tc_offload == tc_offload &&
1070                     filter->id.cookie == cookie)
1071                         return filter;
1072
1073         return NULL;
1074 }
1075 EXPORT_SYMBOL(ocelot_vcap_block_find_filter_by_id);
1076
1077 /* If @on=false, then SNAP, ARP, IP and OAM frames will not match on keys based
1078  * on destination and source MAC addresses, but only on higher-level protocol
1079  * information. The only frame types to match on keys containing MAC addresses
1080  * in this case are non-SNAP, non-ARP, non-IP and non-OAM frames.
1081  *
1082  * If @on=true, then the above frame types (SNAP, ARP, IP and OAM) will match
1083  * on MAC_ETYPE keys such as destination and source MAC on this ingress port.
1084  * However the setting has the side effect of making these frames not matching
1085  * on any _other_ keys than MAC_ETYPE ones.
1086  */
1087 static void ocelot_match_all_as_mac_etype(struct ocelot *ocelot, int port,
1088                                           int lookup, bool on)
1089 {
1090         u32 val = 0;
1091
1092         if (on)
1093                 val = ANA_PORT_VCAP_S2_CFG_S2_SNAP_DIS(BIT(lookup)) |
1094                       ANA_PORT_VCAP_S2_CFG_S2_ARP_DIS(BIT(lookup)) |
1095                       ANA_PORT_VCAP_S2_CFG_S2_IP_TCPUDP_DIS(BIT(lookup)) |
1096                       ANA_PORT_VCAP_S2_CFG_S2_IP_OTHER_DIS(BIT(lookup)) |
1097                       ANA_PORT_VCAP_S2_CFG_S2_OAM_DIS(BIT(lookup));
1098
1099         ocelot_rmw_gix(ocelot, val,
1100                        ANA_PORT_VCAP_S2_CFG_S2_SNAP_DIS(BIT(lookup)) |
1101                        ANA_PORT_VCAP_S2_CFG_S2_ARP_DIS(BIT(lookup)) |
1102                        ANA_PORT_VCAP_S2_CFG_S2_IP_TCPUDP_DIS(BIT(lookup)) |
1103                        ANA_PORT_VCAP_S2_CFG_S2_IP_OTHER_DIS(BIT(lookup)) |
1104                        ANA_PORT_VCAP_S2_CFG_S2_OAM_DIS(BIT(lookup)),
1105                        ANA_PORT_VCAP_S2_CFG, port);
1106 }
1107
1108 static bool
1109 ocelot_vcap_is_problematic_mac_etype(struct ocelot_vcap_filter *filter)
1110 {
1111         u16 proto, mask;
1112
1113         if (filter->key_type != OCELOT_VCAP_KEY_ETYPE)
1114                 return false;
1115
1116         proto = ntohs(*(__be16 *)filter->key.etype.etype.value);
1117         mask = ntohs(*(__be16 *)filter->key.etype.etype.mask);
1118
1119         /* ETH_P_ALL match, so all protocols below are included */
1120         if (mask == 0)
1121                 return true;
1122         if (proto == ETH_P_ARP)
1123                 return true;
1124         if (proto == ETH_P_IP)
1125                 return true;
1126         if (proto == ETH_P_IPV6)
1127                 return true;
1128
1129         return false;
1130 }
1131
1132 static bool
1133 ocelot_vcap_is_problematic_non_mac_etype(struct ocelot_vcap_filter *filter)
1134 {
1135         if (filter->key_type == OCELOT_VCAP_KEY_SNAP)
1136                 return true;
1137         if (filter->key_type == OCELOT_VCAP_KEY_ARP)
1138                 return true;
1139         if (filter->key_type == OCELOT_VCAP_KEY_IPV4)
1140                 return true;
1141         if (filter->key_type == OCELOT_VCAP_KEY_IPV6)
1142                 return true;
1143         return false;
1144 }
1145
1146 static bool
1147 ocelot_exclusive_mac_etype_filter_rules(struct ocelot *ocelot,
1148                                         struct ocelot_vcap_filter *filter)
1149 {
1150         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1151         struct ocelot_vcap_filter *tmp;
1152         unsigned long port;
1153         int i;
1154
1155         /* We only have the S2_IP_TCPUDP_DIS set of knobs for VCAP IS2 */
1156         if (filter->block_id != VCAP_IS2)
1157                 return true;
1158
1159         if (ocelot_vcap_is_problematic_mac_etype(filter)) {
1160                 /* Search for any non-MAC_ETYPE rules on the port */
1161                 for (i = 0; i < block->count; i++) {
1162                         tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1163                         if (tmp->ingress_port_mask & filter->ingress_port_mask &&
1164                             tmp->lookup == filter->lookup &&
1165                             ocelot_vcap_is_problematic_non_mac_etype(tmp))
1166                                 return false;
1167                 }
1168
1169                 for_each_set_bit(port, &filter->ingress_port_mask,
1170                                  ocelot->num_phys_ports)
1171                         ocelot_match_all_as_mac_etype(ocelot, port,
1172                                                       filter->lookup, true);
1173         } else if (ocelot_vcap_is_problematic_non_mac_etype(filter)) {
1174                 /* Search for any MAC_ETYPE rules on the port */
1175                 for (i = 0; i < block->count; i++) {
1176                         tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1177                         if (tmp->ingress_port_mask & filter->ingress_port_mask &&
1178                             tmp->lookup == filter->lookup &&
1179                             ocelot_vcap_is_problematic_mac_etype(tmp))
1180                                 return false;
1181                 }
1182
1183                 for_each_set_bit(port, &filter->ingress_port_mask,
1184                                  ocelot->num_phys_ports)
1185                         ocelot_match_all_as_mac_etype(ocelot, port,
1186                                                       filter->lookup, false);
1187         }
1188
1189         return true;
1190 }
1191
1192 int ocelot_vcap_filter_add(struct ocelot *ocelot,
1193                            struct ocelot_vcap_filter *filter,
1194                            struct netlink_ext_ack *extack)
1195 {
1196         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1197         int i, index, ret;
1198
1199         if (!ocelot_exclusive_mac_etype_filter_rules(ocelot, filter)) {
1200                 NL_SET_ERR_MSG_MOD(extack,
1201                                    "Cannot mix MAC_ETYPE with non-MAC_ETYPE rules, use the other IS2 lookup");
1202                 return -EBUSY;
1203         }
1204
1205         /* Add filter to the linked list */
1206         ret = ocelot_vcap_filter_add_to_block(ocelot, block, filter, extack);
1207         if (ret)
1208                 return ret;
1209
1210         /* Get the index of the inserted filter */
1211         index = ocelot_vcap_block_get_filter_index(block, filter);
1212         if (index < 0)
1213                 return index;
1214
1215         /* Move down the rules to make place for the new filter */
1216         for (i = block->count - 1; i > index; i--) {
1217                 struct ocelot_vcap_filter *tmp;
1218
1219                 tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1220                 vcap_entry_set(ocelot, i, tmp);
1221         }
1222
1223         /* Now insert the new filter */
1224         vcap_entry_set(ocelot, index, filter);
1225         return 0;
1226 }
1227 EXPORT_SYMBOL(ocelot_vcap_filter_add);
1228
1229 static void ocelot_vcap_block_remove_filter(struct ocelot *ocelot,
1230                                             struct ocelot_vcap_block *block,
1231                                             struct ocelot_vcap_filter *filter)
1232 {
1233         struct ocelot_vcap_filter *tmp, *n;
1234
1235         list_for_each_entry_safe(tmp, n, &block->rules, list) {
1236                 if (ocelot_vcap_filter_equal(filter, tmp)) {
1237                         ocelot_vcap_filter_del_aux_resources(ocelot, tmp);
1238                         list_del(&tmp->list);
1239                         kfree(tmp);
1240                 }
1241         }
1242
1243         block->count--;
1244 }
1245
1246 int ocelot_vcap_filter_del(struct ocelot *ocelot,
1247                            struct ocelot_vcap_filter *filter)
1248 {
1249         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1250         struct ocelot_vcap_filter del_filter;
1251         int i, index;
1252
1253         /* Need to inherit the block_id so that vcap_entry_set()
1254          * does not get confused and knows where to install it.
1255          */
1256         memset(&del_filter, 0, sizeof(del_filter));
1257         del_filter.block_id = filter->block_id;
1258
1259         /* Gets index of the filter */
1260         index = ocelot_vcap_block_get_filter_index(block, filter);
1261         if (index < 0)
1262                 return index;
1263
1264         /* Delete filter */
1265         ocelot_vcap_block_remove_filter(ocelot, block, filter);
1266
1267         /* Move up all the blocks over the deleted filter */
1268         for (i = index; i < block->count; i++) {
1269                 struct ocelot_vcap_filter *tmp;
1270
1271                 tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1272                 vcap_entry_set(ocelot, i, tmp);
1273         }
1274
1275         /* Now delete the last filter, because it is duplicated */
1276         vcap_entry_set(ocelot, block->count, &del_filter);
1277
1278         return 0;
1279 }
1280 EXPORT_SYMBOL(ocelot_vcap_filter_del);
1281
1282 int ocelot_vcap_filter_replace(struct ocelot *ocelot,
1283                                struct ocelot_vcap_filter *filter)
1284 {
1285         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1286         int index;
1287
1288         index = ocelot_vcap_block_get_filter_index(block, filter);
1289         if (index < 0)
1290                 return index;
1291
1292         vcap_entry_set(ocelot, index, filter);
1293
1294         return 0;
1295 }
1296 EXPORT_SYMBOL(ocelot_vcap_filter_replace);
1297
1298 int ocelot_vcap_filter_stats_update(struct ocelot *ocelot,
1299                                     struct ocelot_vcap_filter *filter)
1300 {
1301         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1302         struct ocelot_vcap_filter tmp;
1303         int index;
1304
1305         index = ocelot_vcap_block_get_filter_index(block, filter);
1306         if (index < 0)
1307                 return index;
1308
1309         vcap_entry_get(ocelot, index, filter);
1310
1311         /* After we get the result we need to clear the counters */
1312         tmp = *filter;
1313         tmp.stats.pkts = 0;
1314         vcap_entry_set(ocelot, index, &tmp);
1315
1316         return 0;
1317 }
1318
1319 static void ocelot_vcap_init_one(struct ocelot *ocelot,
1320                                  const struct vcap_props *vcap)
1321 {
1322         struct vcap_data data;
1323
1324         memset(&data, 0, sizeof(data));
1325
1326         vcap_entry2cache(ocelot, vcap, &data);
1327         ocelot_target_write(ocelot, vcap->target, vcap->entry_count,
1328                             VCAP_CORE_MV_CFG);
1329         vcap_cmd(ocelot, vcap, 0, VCAP_CMD_INITIALIZE, VCAP_SEL_ENTRY);
1330
1331         vcap_action2cache(ocelot, vcap, &data);
1332         ocelot_target_write(ocelot, vcap->target, vcap->action_count,
1333                             VCAP_CORE_MV_CFG);
1334         vcap_cmd(ocelot, vcap, 0, VCAP_CMD_INITIALIZE,
1335                  VCAP_SEL_ACTION | VCAP_SEL_COUNTER);
1336 }
1337
1338 static void ocelot_vcap_detect_constants(struct ocelot *ocelot,
1339                                          struct vcap_props *vcap)
1340 {
1341         int counter_memory_width;
1342         int num_default_actions;
1343         int version;
1344
1345         version = ocelot_target_read(ocelot, vcap->target,
1346                                      VCAP_CONST_VCAP_VER);
1347         /* Only version 0 VCAP supported for now */
1348         if (WARN_ON(version != 0))
1349                 return;
1350
1351         /* Width in bits of type-group field */
1352         vcap->tg_width = ocelot_target_read(ocelot, vcap->target,
1353                                             VCAP_CONST_ENTRY_TG_WIDTH);
1354         /* Number of subwords per TCAM row */
1355         vcap->sw_count = ocelot_target_read(ocelot, vcap->target,
1356                                             VCAP_CONST_ENTRY_SWCNT);
1357         /* Number of rows in TCAM. There can be this many full keys, or double
1358          * this number half keys, or 4 times this number quarter keys.
1359          */
1360         vcap->entry_count = ocelot_target_read(ocelot, vcap->target,
1361                                                VCAP_CONST_ENTRY_CNT);
1362         /* Assuming there are 4 subwords per TCAM row, their layout in the
1363          * actual TCAM (not in the cache) would be:
1364          *
1365          * |  SW 3  | TG 3 |  SW 2  | TG 2 |  SW 1  | TG 1 |  SW 0  | TG 0 |
1366          *
1367          * (where SW=subword and TG=Type-Group).
1368          *
1369          * What VCAP_CONST_ENTRY_CNT is giving us is the width of one full TCAM
1370          * row. But when software accesses the TCAM through the cache
1371          * registers, the Type-Group values are written through another set of
1372          * registers VCAP_TG_DAT, and therefore, it appears as though the 4
1373          * subwords are contiguous in the cache memory.
1374          * Important mention: regardless of the number of key entries per row
1375          * (and therefore of key size: 1 full key or 2 half keys or 4 quarter
1376          * keys), software always has to configure 4 Type-Group values. For
1377          * example, in the case of 1 full key, the driver needs to set all 4
1378          * Type-Group to be full key.
1379          *
1380          * For this reason, we need to fix up the value that the hardware is
1381          * giving us. We don't actually care about the width of the entry in
1382          * the TCAM. What we care about is the width of the entry in the cache
1383          * registers, which is how we get to interact with it. And since the
1384          * VCAP_ENTRY_DAT cache registers access only the subwords and not the
1385          * Type-Groups, this means we need to subtract the width of the
1386          * Type-Groups when packing and unpacking key entry data in a TCAM row.
1387          */
1388         vcap->entry_width = ocelot_target_read(ocelot, vcap->target,
1389                                                VCAP_CONST_ENTRY_WIDTH);
1390         vcap->entry_width -= vcap->tg_width * vcap->sw_count;
1391         num_default_actions = ocelot_target_read(ocelot, vcap->target,
1392                                                  VCAP_CONST_ACTION_DEF_CNT);
1393         vcap->action_count = vcap->entry_count + num_default_actions;
1394         vcap->action_width = ocelot_target_read(ocelot, vcap->target,
1395                                                 VCAP_CONST_ACTION_WIDTH);
1396         /* The width of the counter memory, this is the complete width of all
1397          * counter-fields associated with one full-word entry. There is one
1398          * counter per entry sub-word (see CAP_CORE::ENTRY_SWCNT for number of
1399          * subwords.)
1400          */
1401         vcap->counter_words = vcap->sw_count;
1402         counter_memory_width = ocelot_target_read(ocelot, vcap->target,
1403                                                   VCAP_CONST_CNT_WIDTH);
1404         vcap->counter_width = counter_memory_width / vcap->counter_words;
1405 }
1406
1407 int ocelot_vcap_init(struct ocelot *ocelot)
1408 {
1409         int i;
1410
1411         /* Create a policer that will drop the frames for the cpu.
1412          * This policer will be used as action in the acl rules to drop
1413          * frames.
1414          */
1415         ocelot_write_gix(ocelot, 0x299, ANA_POL_MODE_CFG,
1416                          OCELOT_POLICER_DISCARD);
1417         ocelot_write_gix(ocelot, 0x1, ANA_POL_PIR_CFG,
1418                          OCELOT_POLICER_DISCARD);
1419         ocelot_write_gix(ocelot, 0x3fffff, ANA_POL_PIR_STATE,
1420                          OCELOT_POLICER_DISCARD);
1421         ocelot_write_gix(ocelot, 0x0, ANA_POL_CIR_CFG,
1422                          OCELOT_POLICER_DISCARD);
1423         ocelot_write_gix(ocelot, 0x3fffff, ANA_POL_CIR_STATE,
1424                          OCELOT_POLICER_DISCARD);
1425
1426         for (i = 0; i < OCELOT_NUM_VCAP_BLOCKS; i++) {
1427                 struct ocelot_vcap_block *block = &ocelot->block[i];
1428                 struct vcap_props *vcap = &ocelot->vcap[i];
1429
1430                 INIT_LIST_HEAD(&block->rules);
1431
1432                 ocelot_vcap_detect_constants(ocelot, vcap);
1433                 ocelot_vcap_init_one(ocelot, vcap);
1434         }
1435
1436         INIT_LIST_HEAD(&ocelot->dummy_rules);
1437         INIT_LIST_HEAD(&ocelot->traps);
1438         INIT_LIST_HEAD(&ocelot->vcap_pol.pol_list);
1439
1440         return 0;
1441 }