drivers/net/ethernet/mscc/ocelot_board.c

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Microsemi Ocelot Switch driver
   4  *
   5  * Copyright (c) 2017 Microsemi Corporation
   6  */
   7 #include <linux/interrupt.h>
   8 #include <linux/module.h>
   9 #include <linux/of_net.h>
  10 #include <linux/netdevice.h>
  11 #include <linux/of_mdio.h>
  12 #include <linux/of_platform.h>
  13 #include <linux/mfd/syscon.h>
  14 #include <linux/skbuff.h>
  15 #include <net/switchdev.h>
  16
  17 #include "ocelot.h"
  18
  19 #define IFH_EXTRACT_BITFIELD64(x, o, w) (((x) >> (o)) & GENMASK_ULL((w) - 1, 0))
  20
  21 static int ocelot_parse_ifh(u32 *_ifh, struct frame_info *info)
  22 {
  23         u8 llen, wlen;
  24         u64 ifh[2];
  25
  26         ifh[0] = be64_to_cpu(((__force __be64 *)_ifh)[0]);
  27         ifh[1] = be64_to_cpu(((__force __be64 *)_ifh)[1]);
  28
  29         wlen = IFH_EXTRACT_BITFIELD64(ifh[0], 7,  8);
  30         llen = IFH_EXTRACT_BITFIELD64(ifh[0], 15,  6);
  31
  32         info->len = OCELOT_BUFFER_CELL_SZ * wlen + llen - 80;
  33
  34         info->port = IFH_EXTRACT_BITFIELD64(ifh[1], 43, 4);
  35
  36         info->cpuq = IFH_EXTRACT_BITFIELD64(ifh[1], 20, 8);
  37         info->tag_type = IFH_EXTRACT_BITFIELD64(ifh[1], 16,  1);
  38         info->vid = IFH_EXTRACT_BITFIELD64(ifh[1], 0,  12);
  39
  40         return 0;
  41 }
  42
  43 static int ocelot_rx_frame_word(struct ocelot *ocelot, u8 grp, bool ifh,
  44                                 u32 *rval)
  45 {
  46         u32 val;
  47         u32 bytes_valid;
  48
  49         val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
  50         if (val == XTR_NOT_READY) {
  51                 if (ifh)
  52                         return -EIO;
  53
  54                 do {
  55                         val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
  56                 } while (val == XTR_NOT_READY);
  57         }
  58
  59         switch (val) {
  60         case XTR_ABORT:
  61                 return -EIO;
  62         case XTR_EOF_0:
  63         case XTR_EOF_1:
  64         case XTR_EOF_2:
  65         case XTR_EOF_3:
  66         case XTR_PRUNED:
  67                 bytes_valid = XTR_VALID_BYTES(val);
  68                 val = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
  69                 if (val == XTR_ESCAPE)
  70                         *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
  71                 else
  72                         *rval = val;
  73
  74                 return bytes_valid;
  75         case XTR_ESCAPE:
  76                 *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp);
  77
  78                 return 4;
  79         default:
  80                 *rval = val;
  81
  82                 return 4;
  83         }
  84 }
  85
  86 static irqreturn_t ocelot_xtr_irq_handler(int irq, void *arg)
  87 {
  88         struct ocelot *ocelot = arg;
  89         int i = 0, grp = 0;
  90         int err = 0;
  91
  92         if (!(ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)))
  93                 return IRQ_NONE;
  94
  95         do {
  96                 struct sk_buff *skb;
  97                 struct net_device *dev;
  98                 u32 *buf;
  99                 int sz, len, buf_len;
 100                 u32 ifh[4];
 101                 u32 val;
 102                 struct frame_info info;
 103
 104                 for (i = 0; i < IFH_LEN; i++) {
 105                         err = ocelot_rx_frame_word(ocelot, grp, true, &ifh[i]);
 106                         if (err != 4)
 107                                 break;
 108                 }
 109
 110                 if (err != 4)
 111                         break;
 112
 113                 ocelot_parse_ifh(ifh, &info);
 114
 115                 dev = ocelot->ports[info.port]->dev;
 116
 117                 skb = netdev_alloc_skb(dev, info.len);
 118
 119                 if (unlikely(!skb)) {
 120                         netdev_err(dev, "Unable to allocate sk_buff\n");
 121                         err = -ENOMEM;
 122                         break;
 123                 }
 124                 buf_len = info.len - ETH_FCS_LEN;
 125                 buf = (u32 *)skb_put(skb, buf_len);
 126
 127                 len = 0;
 128                 do {
 129                         sz = ocelot_rx_frame_word(ocelot, grp, false, &val);
 130                         *buf++ = val;
 131                         len += sz;
 132                 } while (len < buf_len);
 133
 134                 /* Read the FCS */
 135                 sz = ocelot_rx_frame_word(ocelot, grp, false, &val);
 136                 /* Update the statistics if part of the FCS was read before */
 137                 len -= ETH_FCS_LEN - sz;
 138
 139                 if (unlikely(dev->features & NETIF_F_RXFCS)) {
 140                         buf = (u32 *)skb_put(skb, ETH_FCS_LEN);
 141                         *buf = val;
 142                 }
 143
 144                 if (sz < 0) {
 145                         err = sz;
 146                         break;
 147                 }
 148
 149                 /* Everything we see on an interface that is in the HW bridge
 150                  * has already been forwarded.
 151                  */
 152                 if (ocelot->bridge_mask & BIT(info.port))
 153                         skb->offload_fwd_mark = 1;
 154
 155                 skb->protocol = eth_type_trans(skb, dev);
 156                 netif_rx(skb);
 157                 dev->stats.rx_bytes += len;
 158                 dev->stats.rx_packets++;
 159         } while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp));
 160
 161         if (err)
 162                 while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp))
 163                         ocelot_read_rix(ocelot, QS_XTR_RD, grp);
 164
 165         return IRQ_HANDLED;
 166 }
 167
 168 static const struct of_device_id mscc_ocelot_match[] = {
 169         { .compatible = "mscc,vsc7514-switch" },
 170         { }
 171 };
 172 MODULE_DEVICE_TABLE(of, mscc_ocelot_match);
 173
 174 static int mscc_ocelot_probe(struct platform_device *pdev)
 175 {
 176         int err, irq;
 177         unsigned int i;
 178         struct device_node *np = pdev->dev.of_node;
 179         struct device_node *ports, *portnp;
 180         struct ocelot *ocelot;
 181         struct regmap *hsio;
 182         u32 val;
 183
 184         struct {
 185                 enum ocelot_target id;
 186                 char *name;
 187                 u8 optional:1;
 188         } res[] = {
 189                 { SYS, "sys" },
 190                 { REW, "rew" },
 191                 { QSYS, "qsys" },
 192                 { ANA, "ana" },
 193                 { QS, "qs" },
 194                 { S2, "s2" },
 195                 { PTP, "ptp", 1 },
 196         };
 197
 198         if (!np && !pdev->dev.platform_data)
 199                 return -ENODEV;
 200
 201         ocelot = devm_kzalloc(&pdev->dev, sizeof(*ocelot), GFP_KERNEL);
 202         if (!ocelot)
 203                 return -ENOMEM;
 204
 205         platform_set_drvdata(pdev, ocelot);
 206         ocelot->dev = &pdev->dev;
 207
 208         for (i = 0; i < ARRAY_SIZE(res); i++) {
 209                 struct regmap *target;
 210
 211                 target = ocelot_io_platform_init(ocelot, pdev, res[i].name);
 212                 if (IS_ERR(target)) {
 213                         if (res[i].optional) {
 214                                 ocelot->targets[res[i].id] = NULL;
 215                                 continue;
 216                         }
 217
 218                         return PTR_ERR(target);
 219                 }
 220
 221                 ocelot->targets[res[i].id] = target;
 222         }
 223
 224         hsio = syscon_regmap_lookup_by_compatible("mscc,ocelot-hsio");
 225         if (IS_ERR(hsio)) {
 226                 dev_err(&pdev->dev, "missing hsio syscon\n");
 227                 return PTR_ERR(hsio);
 228         }
 229
 230         ocelot->targets[HSIO] = hsio;
 231
 232         err = ocelot_chip_init(ocelot);
 233         if (err)
 234                 return err;
 235
 236         irq = platform_get_irq_byname(pdev, "xtr");
 237         if (irq < 0)
 238                 return -ENODEV;
 239
 240         err = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 241                                         ocelot_xtr_irq_handler, IRQF_ONESHOT,
 242                                         "frame extraction", ocelot);
 243         if (err)
 244                 return err;
 245
 246         regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], 1);
 247         regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
 248
 249         do {
 250                 msleep(1);
 251                 regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT],
 252                                   &val);
 253         } while (val);
 254
 255         regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
 256         regmap_field_write(ocelot->regfields[SYS_RESET_CFG_CORE_ENA], 1);
 257
 258         ocelot->num_cpu_ports = 1; /* 1 port on the switch, two groups */
 259
 260         ports = of_get_child_by_name(np, "ethernet-ports");
 261         if (!ports) {
 262                 dev_err(&pdev->dev, "no ethernet-ports child node found\n");
 263                 return -ENODEV;
 264         }
 265
 266         ocelot->num_phys_ports = of_get_child_count(ports);
 267
 268         ocelot->ports = devm_kcalloc(&pdev->dev, ocelot->num_phys_ports,
 269                                      sizeof(struct ocelot_port *), GFP_KERNEL);
 270
 271         INIT_LIST_HEAD(&ocelot->multicast);
 272         ocelot_init(ocelot);
 273
 274         for_each_available_child_of_node(ports, portnp) {
 275                 struct device_node *phy_node;
 276                 struct phy_device *phy;
 277                 struct resource *res;
 278                 struct phy *serdes;
 279                 void __iomem *regs;
 280                 char res_name[8];
 281                 int phy_mode;
 282                 u32 port;
 283
 284                 if (of_property_read_u32(portnp, "reg", &port))
 285                         continue;
 286
 287                 snprintf(res_name, sizeof(res_name), "port%d", port);
 288
 289                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 290                                                    res_name);
 291                 regs = devm_ioremap_resource(&pdev->dev, res);
 292                 if (IS_ERR(regs))
 293                         continue;
 294
 295                 phy_node = of_parse_phandle(portnp, "phy-handle", 0);
 296                 if (!phy_node)
 297                         continue;
 298
 299                 phy = of_phy_find_device(phy_node);
 300                 if (!phy)
 301                         continue;
 302
 303                 err = ocelot_probe_port(ocelot, port, regs, phy);
 304                 if (err) {
 305                         of_node_put(portnp);
 306                         return err;
 307                 }
 308
 309                 phy_mode = of_get_phy_mode(portnp);
 310                 if (phy_mode < 0)
 311                         ocelot->ports[port]->phy_mode = PHY_INTERFACE_MODE_NA;
 312                 else
 313                         ocelot->ports[port]->phy_mode = phy_mode;
 314
 315                 switch (ocelot->ports[port]->phy_mode) {
 316                 case PHY_INTERFACE_MODE_NA:
 317                         continue;
 318                 case PHY_INTERFACE_MODE_SGMII:
 319                         break;
 320                 case PHY_INTERFACE_MODE_QSGMII:
 321                         /* Ensure clock signals and speed is set on all
 322                          * QSGMII links
 323                          */
 324                         ocelot_port_writel(ocelot->ports[port],
 325                                            DEV_CLOCK_CFG_LINK_SPEED
 326                                            (OCELOT_SPEED_1000),
 327                                            DEV_CLOCK_CFG);
 328                         break;
 329                 default:
 330                         dev_err(ocelot->dev,
 331                                 "invalid phy mode for port%d, (Q)SGMII only\n",
 332                                 port);
 333                         of_node_put(portnp);
 334                         return -EINVAL;
 335                 }
 336
 337                 serdes = devm_of_phy_get(ocelot->dev, portnp, NULL);
 338                 if (IS_ERR(serdes)) {
 339                         err = PTR_ERR(serdes);
 340                         if (err == -EPROBE_DEFER)
 341                                 dev_dbg(ocelot->dev, "deferring probe\n");
 342                         else
 343                                 dev_err(ocelot->dev,
 344                                         "missing SerDes phys for port%d\n",
 345                                         port);
 346
 347                         goto err_probe_ports;
 348                 }
 349
 350                 ocelot->ports[port]->serdes = serdes;
 351         }
 352
 353         register_netdevice_notifier(&ocelot_netdevice_nb);
 354         register_switchdev_notifier(&ocelot_switchdev_nb);
 355         register_switchdev_blocking_notifier(&ocelot_switchdev_blocking_nb);
 356
 357         dev_info(&pdev->dev, "Ocelot switch probed\n");
 358
 359         return 0;
 360
 361 err_probe_ports:
 362         return err;
 363 }
 364
 365 static int mscc_ocelot_remove(struct platform_device *pdev)
 366 {
 367         struct ocelot *ocelot = platform_get_drvdata(pdev);
 368
 369         ocelot_deinit(ocelot);
 370         unregister_switchdev_blocking_notifier(&ocelot_switchdev_blocking_nb);
 371         unregister_switchdev_notifier(&ocelot_switchdev_nb);
 372         unregister_netdevice_notifier(&ocelot_netdevice_nb);
 373
 374         return 0;
 375 }
 376
 377 static struct platform_driver mscc_ocelot_driver = {
 378         .probe = mscc_ocelot_probe,
 379         .remove = mscc_ocelot_remove,
 380         .driver = {
 381                 .name = "ocelot-switch",
 382                 .of_match_table = mscc_ocelot_match,
 383         },
 384 };
 385
 386 module_platform_driver(mscc_ocelot_driver);
 387
 388 MODULE_DESCRIPTION("Microsemi Ocelot switch driver");
 389 MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
 390 MODULE_LICENSE("Dual MIT/GPL");