1 // SPDX-License-Identifier: GPL-2.0+
3 #include <linux/ptp_classify.h>
5 #include "lan966x_main.h"
7 #define LAN966X_MAX_PTP_ID 512
9 /* Represents 1ppm adjustment in 2^59 format with 6.037735849ns as reference
10 * The value is calculated as following: (1/1000000)/((2^-59)/6.037735849)
12 #define LAN966X_1PPM_FORMAT 3480517749723LL
14 /* Represents 1ppb adjustment in 2^29 format with 6.037735849ns as reference
15 * The value is calculated as following: (1/1000000000)/((2^59)/6.037735849)
17 #define LAN966X_1PPB_FORMAT 3480517749LL
19 #define TOD_ACC_PIN 0x7
22 PTP_PIN_ACTION_IDLE = 0,
30 static u64 lan966x_ptp_get_nominal_value(void)
32 /* This is the default value that for each system clock, the time of day
33 * is increased. It has the format 5.59 nanosecond.
35 return 0x304d4873ecade305;
38 int lan966x_ptp_hwtstamp_set(struct lan966x_port *port, struct ifreq *ifr)
40 struct lan966x *lan966x = port->lan966x;
41 struct hwtstamp_config cfg;
42 struct lan966x_phc *phc;
44 /* For now don't allow to run ptp on ports that are part of a bridge,
45 * because in case of transparent clock the HW will still forward the
46 * frames, so there would be duplicate frames
48 if (lan966x->bridge_mask & BIT(port->chip_port))
51 if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
54 switch (cfg.tx_type) {
56 port->ptp_cmd = IFH_REW_OP_TWO_STEP_PTP;
58 case HWTSTAMP_TX_ONESTEP_SYNC:
59 port->ptp_cmd = IFH_REW_OP_ONE_STEP_PTP;
62 port->ptp_cmd = IFH_REW_OP_NOOP;
68 switch (cfg.rx_filter) {
69 case HWTSTAMP_FILTER_NONE:
71 case HWTSTAMP_FILTER_ALL:
72 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
73 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
74 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
75 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
76 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
77 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
78 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
79 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
80 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
81 case HWTSTAMP_FILTER_PTP_V2_EVENT:
82 case HWTSTAMP_FILTER_PTP_V2_SYNC:
83 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
84 case HWTSTAMP_FILTER_NTP_ALL:
85 cfg.rx_filter = HWTSTAMP_FILTER_ALL;
91 /* Commit back the result & save it */
92 mutex_lock(&lan966x->ptp_lock);
93 phc = &lan966x->phc[LAN966X_PHC_PORT];
94 memcpy(&phc->hwtstamp_config, &cfg, sizeof(cfg));
95 mutex_unlock(&lan966x->ptp_lock);
97 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
100 int lan966x_ptp_hwtstamp_get(struct lan966x_port *port, struct ifreq *ifr)
102 struct lan966x *lan966x = port->lan966x;
103 struct lan966x_phc *phc;
105 phc = &lan966x->phc[LAN966X_PHC_PORT];
106 return copy_to_user(ifr->ifr_data, &phc->hwtstamp_config,
107 sizeof(phc->hwtstamp_config)) ? -EFAULT : 0;
110 static int lan966x_ptp_classify(struct lan966x_port *port, struct sk_buff *skb)
112 struct ptp_header *header;
116 if (port->ptp_cmd == IFH_REW_OP_NOOP)
117 return IFH_REW_OP_NOOP;
119 type = ptp_classify_raw(skb);
120 if (type == PTP_CLASS_NONE)
121 return IFH_REW_OP_NOOP;
123 header = ptp_parse_header(skb, type);
125 return IFH_REW_OP_NOOP;
127 if (port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP)
128 return IFH_REW_OP_TWO_STEP_PTP;
130 /* If it is sync and run 1 step then set the correct operation,
131 * otherwise run as 2 step
133 msgtype = ptp_get_msgtype(header, type);
134 if ((msgtype & 0xf) == 0)
135 return IFH_REW_OP_ONE_STEP_PTP;
137 return IFH_REW_OP_TWO_STEP_PTP;
140 static void lan966x_ptp_txtstamp_old_release(struct lan966x_port *port)
142 struct sk_buff *skb, *skb_tmp;
145 spin_lock_irqsave(&port->tx_skbs.lock, flags);
146 skb_queue_walk_safe(&port->tx_skbs, skb, skb_tmp) {
147 if time_after(LAN966X_SKB_CB(skb)->jiffies + LAN966X_PTP_TIMEOUT,
151 __skb_unlink(skb, &port->tx_skbs);
152 dev_kfree_skb_any(skb);
154 spin_unlock_irqrestore(&port->tx_skbs.lock, flags);
157 int lan966x_ptp_txtstamp_request(struct lan966x_port *port,
160 struct lan966x *lan966x = port->lan966x;
164 rew_op = lan966x_ptp_classify(port, skb);
165 LAN966X_SKB_CB(skb)->rew_op = rew_op;
167 if (rew_op != IFH_REW_OP_TWO_STEP_PTP)
170 lan966x_ptp_txtstamp_old_release(port);
172 spin_lock_irqsave(&lan966x->ptp_ts_id_lock, flags);
173 if (lan966x->ptp_skbs == LAN966X_MAX_PTP_ID) {
174 spin_unlock_irqrestore(&lan966x->ptp_ts_id_lock, flags);
178 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
180 skb_queue_tail(&port->tx_skbs, skb);
181 LAN966X_SKB_CB(skb)->ts_id = port->ts_id;
182 LAN966X_SKB_CB(skb)->jiffies = jiffies;
186 if (port->ts_id == LAN966X_MAX_PTP_ID)
189 spin_unlock_irqrestore(&lan966x->ptp_ts_id_lock, flags);
194 void lan966x_ptp_txtstamp_release(struct lan966x_port *port,
197 struct lan966x *lan966x = port->lan966x;
200 spin_lock_irqsave(&lan966x->ptp_ts_id_lock, flags);
203 skb_unlink(skb, &port->tx_skbs);
204 spin_unlock_irqrestore(&lan966x->ptp_ts_id_lock, flags);
207 static void lan966x_get_hwtimestamp(struct lan966x *lan966x,
208 struct timespec64 *ts,
211 /* Read current PTP time to get seconds */
215 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
217 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_SAVE) |
218 PTP_PIN_CFG_PIN_DOM_SET(LAN966X_PHC_PORT) |
219 PTP_PIN_CFG_PIN_SYNC_SET(0),
220 PTP_PIN_CFG_PIN_ACTION |
221 PTP_PIN_CFG_PIN_DOM |
222 PTP_PIN_CFG_PIN_SYNC,
223 lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
225 ts->tv_sec = lan_rd(lan966x, PTP_TOD_SEC_LSB(TOD_ACC_PIN));
226 curr_nsec = lan_rd(lan966x, PTP_TOD_NSEC(TOD_ACC_PIN));
230 /* Sec has incremented since the ts was registered */
231 if (curr_nsec < nsec)
234 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
237 irqreturn_t lan966x_ptp_irq_handler(int irq, void *args)
239 int budget = LAN966X_MAX_PTP_ID;
240 struct lan966x *lan966x = args;
243 struct sk_buff *skb, *skb_tmp, *skb_match = NULL;
244 struct skb_shared_hwtstamps shhwtstamps;
245 struct lan966x_port *port;
246 struct timespec64 ts;
251 val = lan_rd(lan966x, PTP_TWOSTEP_CTRL);
253 /* Check if a timestamp can be retrieved */
254 if (!(val & PTP_TWOSTEP_CTRL_VLD))
257 WARN_ON(val & PTP_TWOSTEP_CTRL_OVFL);
259 if (!(val & PTP_TWOSTEP_CTRL_STAMP_TX))
262 /* Retrieve the ts Tx port */
263 txport = PTP_TWOSTEP_CTRL_STAMP_PORT_GET(val);
265 /* Retrieve its associated skb */
266 port = lan966x->ports[txport];
268 /* Retrieve the delay */
269 delay = lan_rd(lan966x, PTP_TWOSTEP_STAMP);
270 delay = PTP_TWOSTEP_STAMP_STAMP_NSEC_GET(delay);
272 /* Get next timestamp from fifo, which needs to be the
273 * rx timestamp which represents the id of the frame
275 lan_rmw(PTP_TWOSTEP_CTRL_NXT_SET(1),
276 PTP_TWOSTEP_CTRL_NXT,
277 lan966x, PTP_TWOSTEP_CTRL);
279 val = lan_rd(lan966x, PTP_TWOSTEP_CTRL);
281 /* Check if a timestamp can be retried */
282 if (!(val & PTP_TWOSTEP_CTRL_VLD))
285 /* Read RX timestamping to get the ID */
286 id = lan_rd(lan966x, PTP_TWOSTEP_STAMP);
288 spin_lock_irqsave(&port->tx_skbs.lock, flags);
289 skb_queue_walk_safe(&port->tx_skbs, skb, skb_tmp) {
290 if (LAN966X_SKB_CB(skb)->ts_id != id)
293 __skb_unlink(skb, &port->tx_skbs);
297 spin_unlock_irqrestore(&port->tx_skbs.lock, flags);
300 lan_rmw(PTP_TWOSTEP_CTRL_NXT_SET(1),
301 PTP_TWOSTEP_CTRL_NXT,
302 lan966x, PTP_TWOSTEP_CTRL);
304 if (WARN_ON(!skb_match))
307 spin_lock(&lan966x->ptp_ts_id_lock);
309 spin_unlock(&lan966x->ptp_ts_id_lock);
311 /* Get the h/w timestamp */
312 lan966x_get_hwtimestamp(lan966x, &ts, delay);
314 /* Set the timestamp into the skb */
315 shhwtstamps.hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
316 skb_tstamp_tx(skb_match, &shhwtstamps);
318 dev_kfree_skb_any(skb_match);
324 irqreturn_t lan966x_ptp_ext_irq_handler(int irq, void *args)
326 struct lan966x *lan966x = args;
327 struct lan966x_phc *phc;
334 if (!(lan_rd(lan966x, PTP_PIN_INTR)))
337 /* Go through all domains and see which pin generated the interrupt */
338 for (i = 0; i < LAN966X_PHC_COUNT; ++i) {
339 struct ptp_clock_event ptp_event = {0};
341 phc = &lan966x->phc[i];
342 pin = ptp_find_pin_unlocked(phc->clock, PTP_PF_EXTTS, 0);
346 if (!(lan_rd(lan966x, PTP_PIN_INTR) & BIT(pin)))
349 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
351 /* Enable to get the new interrupt.
352 * By writing 1 it clears the bit
354 lan_wr(BIT(pin), lan966x, PTP_PIN_INTR);
356 /* Get current time */
357 s = lan_rd(lan966x, PTP_TOD_SEC_MSB(pin));
359 s |= lan_rd(lan966x, PTP_TOD_SEC_LSB(pin));
360 ns = lan_rd(lan966x, PTP_TOD_NSEC(pin));
361 ns &= PTP_TOD_NSEC_TOD_NSEC;
363 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
365 if ((ns & 0xFFFFFFF0) == 0x3FFFFFF0) {
370 time = ktime_set(s, ns);
372 ptp_event.index = pin;
373 ptp_event.timestamp = time;
374 ptp_event.type = PTP_CLOCK_EXTTS;
375 ptp_clock_event(phc->clock, &ptp_event);
381 static int lan966x_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
383 struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
384 struct lan966x *lan966x = phc->lan966x;
393 if (scaled_ppm < 0) {
395 scaled_ppm = -scaled_ppm;
398 tod_inc = lan966x_ptp_get_nominal_value();
400 /* The multiplication is split in 2 separate additions because of
401 * overflow issues. If scaled_ppm with 16bit fractional part was bigger
402 * than 20ppm then we got overflow.
404 ref = LAN966X_1PPM_FORMAT * (scaled_ppm >> 16);
405 ref += (LAN966X_1PPM_FORMAT * (0xffff & scaled_ppm)) >> 16;
406 tod_inc = neg_adj ? tod_inc - ref : tod_inc + ref;
408 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
410 lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(1 << BIT(phc->index)),
411 PTP_DOM_CFG_CLKCFG_DIS,
412 lan966x, PTP_DOM_CFG);
414 lan_wr((u32)tod_inc & 0xFFFFFFFF, lan966x,
415 PTP_CLK_PER_CFG(phc->index, 0));
416 lan_wr((u32)(tod_inc >> 32), lan966x,
417 PTP_CLK_PER_CFG(phc->index, 1));
419 lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0),
420 PTP_DOM_CFG_CLKCFG_DIS,
421 lan966x, PTP_DOM_CFG);
423 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
428 static int lan966x_ptp_settime64(struct ptp_clock_info *ptp,
429 const struct timespec64 *ts)
431 struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
432 struct lan966x *lan966x = phc->lan966x;
435 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
437 /* Must be in IDLE mode before the time can be loaded */
438 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_IDLE) |
439 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
440 PTP_PIN_CFG_PIN_SYNC_SET(0),
441 PTP_PIN_CFG_PIN_ACTION |
442 PTP_PIN_CFG_PIN_DOM |
443 PTP_PIN_CFG_PIN_SYNC,
444 lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
447 lan_wr(PTP_TOD_SEC_MSB_TOD_SEC_MSB_SET(upper_32_bits(ts->tv_sec)),
448 lan966x, PTP_TOD_SEC_MSB(TOD_ACC_PIN));
449 lan_wr(lower_32_bits(ts->tv_sec),
450 lan966x, PTP_TOD_SEC_LSB(TOD_ACC_PIN));
451 lan_wr(ts->tv_nsec, lan966x, PTP_TOD_NSEC(TOD_ACC_PIN));
453 /* Apply new values */
454 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_LOAD) |
455 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
456 PTP_PIN_CFG_PIN_SYNC_SET(0),
457 PTP_PIN_CFG_PIN_ACTION |
458 PTP_PIN_CFG_PIN_DOM |
459 PTP_PIN_CFG_PIN_SYNC,
460 lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
462 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
467 int lan966x_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts)
469 struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
470 struct lan966x *lan966x = phc->lan966x;
475 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
477 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_SAVE) |
478 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
479 PTP_PIN_CFG_PIN_SYNC_SET(0),
480 PTP_PIN_CFG_PIN_ACTION |
481 PTP_PIN_CFG_PIN_DOM |
482 PTP_PIN_CFG_PIN_SYNC,
483 lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
485 s = lan_rd(lan966x, PTP_TOD_SEC_MSB(TOD_ACC_PIN));
487 s |= lan_rd(lan966x, PTP_TOD_SEC_LSB(TOD_ACC_PIN));
488 ns = lan_rd(lan966x, PTP_TOD_NSEC(TOD_ACC_PIN));
489 ns &= PTP_TOD_NSEC_TOD_NSEC;
491 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
493 /* Deal with negative values */
494 if ((ns & 0xFFFFFFF0) == 0x3FFFFFF0) {
500 set_normalized_timespec64(ts, s, ns);
504 static int lan966x_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
506 struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
507 struct lan966x *lan966x = phc->lan966x;
509 if (delta > -(NSEC_PER_SEC / 2) && delta < (NSEC_PER_SEC / 2)) {
512 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
514 /* Must be in IDLE mode before the time can be loaded */
515 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_IDLE) |
516 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
517 PTP_PIN_CFG_PIN_SYNC_SET(0),
518 PTP_PIN_CFG_PIN_ACTION |
519 PTP_PIN_CFG_PIN_DOM |
520 PTP_PIN_CFG_PIN_SYNC,
521 lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
523 lan_wr(PTP_TOD_NSEC_TOD_NSEC_SET(delta),
524 lan966x, PTP_TOD_NSEC(TOD_ACC_PIN));
526 /* Adjust time with the value of PTP_TOD_NSEC */
527 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_DELTA) |
528 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
529 PTP_PIN_CFG_PIN_SYNC_SET(0),
530 PTP_PIN_CFG_PIN_ACTION |
531 PTP_PIN_CFG_PIN_DOM |
532 PTP_PIN_CFG_PIN_SYNC,
533 lan966x, PTP_PIN_CFG(TOD_ACC_PIN));
535 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
537 /* Fall back using lan966x_ptp_settime64 which is not exact */
538 struct timespec64 ts;
541 lan966x_ptp_gettime64(ptp, &ts);
543 now = ktime_to_ns(timespec64_to_ktime(ts));
544 ts = ns_to_timespec64(now + delta);
546 lan966x_ptp_settime64(ptp, &ts);
552 static int lan966x_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
553 enum ptp_pin_function func, unsigned int chan)
555 struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
556 struct lan966x *lan966x = phc->lan966x;
557 struct ptp_clock_info *info;
560 /* Currently support only 1 channel */
573 /* The PTP pins are shared by all the PHC. So it is required to see if
574 * the pin is connected to another PHC. The pin is connected to another
575 * PHC if that pin already has a function on that PHC.
577 for (i = 0; i < LAN966X_PHC_COUNT; ++i) {
578 info = &lan966x->phc[i].info;
580 /* Ignore the check with ourself */
584 if (info->pin_config[pin].func == PTP_PF_PEROUT ||
585 info->pin_config[pin].func == PTP_PF_EXTTS)
592 static int lan966x_ptp_perout(struct ptp_clock_info *ptp,
593 struct ptp_clock_request *rq, int on)
595 struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
596 struct lan966x *lan966x = phc->lan966x;
597 struct timespec64 ts_phase, ts_period;
603 if (rq->perout.flags & ~(PTP_PEROUT_DUTY_CYCLE |
607 pin = ptp_find_pin(phc->clock, PTP_PF_PEROUT, rq->perout.index);
608 if (pin == -1 || pin >= LAN966X_PHC_PINS_NUM)
612 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
613 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_IDLE) |
614 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
615 PTP_PIN_CFG_PIN_SYNC_SET(0),
616 PTP_PIN_CFG_PIN_ACTION |
617 PTP_PIN_CFG_PIN_DOM |
618 PTP_PIN_CFG_PIN_SYNC,
619 lan966x, PTP_PIN_CFG(pin));
620 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
624 if (rq->perout.period.sec == 1 &&
625 rq->perout.period.nsec == 0)
628 if (rq->perout.flags & PTP_PEROUT_PHASE) {
629 ts_phase.tv_sec = rq->perout.phase.sec;
630 ts_phase.tv_nsec = rq->perout.phase.nsec;
632 ts_phase.tv_sec = rq->perout.start.sec;
633 ts_phase.tv_nsec = rq->perout.start.nsec;
636 if (ts_phase.tv_sec || (ts_phase.tv_nsec && !pps)) {
637 dev_warn(lan966x->dev,
638 "Absolute time not supported!\n");
642 if (rq->perout.flags & PTP_PEROUT_DUTY_CYCLE) {
643 struct timespec64 ts_on;
645 ts_on.tv_sec = rq->perout.on.sec;
646 ts_on.tv_nsec = rq->perout.on.nsec;
648 wf_high = timespec64_to_ns(&ts_on);
654 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
655 lan_wr(PTP_WF_LOW_PERIOD_PIN_WFL(ts_phase.tv_nsec),
656 lan966x, PTP_WF_LOW_PERIOD(pin));
657 lan_wr(PTP_WF_HIGH_PERIOD_PIN_WFH(wf_high),
658 lan966x, PTP_WF_HIGH_PERIOD(pin));
659 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_CLOCK) |
660 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
661 PTP_PIN_CFG_PIN_SYNC_SET(3),
662 PTP_PIN_CFG_PIN_ACTION |
663 PTP_PIN_CFG_PIN_DOM |
664 PTP_PIN_CFG_PIN_SYNC,
665 lan966x, PTP_PIN_CFG(pin));
666 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
670 ts_period.tv_sec = rq->perout.period.sec;
671 ts_period.tv_nsec = rq->perout.period.nsec;
673 wf_low = timespec64_to_ns(&ts_period);
676 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
677 lan_wr(PTP_WF_LOW_PERIOD_PIN_WFL(wf_low),
678 lan966x, PTP_WF_LOW_PERIOD(pin));
679 lan_wr(PTP_WF_HIGH_PERIOD_PIN_WFH(wf_high),
680 lan966x, PTP_WF_HIGH_PERIOD(pin));
681 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_CLOCK) |
682 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
683 PTP_PIN_CFG_PIN_SYNC_SET(0),
684 PTP_PIN_CFG_PIN_ACTION |
685 PTP_PIN_CFG_PIN_DOM |
686 PTP_PIN_CFG_PIN_SYNC,
687 lan966x, PTP_PIN_CFG(pin));
688 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
693 static int lan966x_ptp_extts(struct ptp_clock_info *ptp,
694 struct ptp_clock_request *rq, int on)
696 struct lan966x_phc *phc = container_of(ptp, struct lan966x_phc, info);
697 struct lan966x *lan966x = phc->lan966x;
702 if (lan966x->ptp_ext_irq <= 0)
705 /* Reject requests with unsupported flags */
706 if (rq->extts.flags & ~(PTP_ENABLE_FEATURE |
711 pin = ptp_find_pin(phc->clock, PTP_PF_EXTTS, rq->extts.index);
712 if (pin == -1 || pin >= LAN966X_PHC_PINS_NUM)
715 spin_lock_irqsave(&lan966x->ptp_clock_lock, flags);
716 lan_rmw(PTP_PIN_CFG_PIN_ACTION_SET(PTP_PIN_ACTION_SAVE) |
717 PTP_PIN_CFG_PIN_SYNC_SET(on ? 3 : 0) |
718 PTP_PIN_CFG_PIN_DOM_SET(phc->index) |
719 PTP_PIN_CFG_PIN_SELECT_SET(pin),
720 PTP_PIN_CFG_PIN_ACTION |
721 PTP_PIN_CFG_PIN_SYNC |
722 PTP_PIN_CFG_PIN_DOM |
723 PTP_PIN_CFG_PIN_SELECT,
724 lan966x, PTP_PIN_CFG(pin));
726 val = lan_rd(lan966x, PTP_PIN_INTR_ENA);
731 lan_wr(val, lan966x, PTP_PIN_INTR_ENA);
733 spin_unlock_irqrestore(&lan966x->ptp_clock_lock, flags);
738 static int lan966x_ptp_enable(struct ptp_clock_info *ptp,
739 struct ptp_clock_request *rq, int on)
742 case PTP_CLK_REQ_PEROUT:
743 return lan966x_ptp_perout(ptp, rq, on);
744 case PTP_CLK_REQ_EXTTS:
745 return lan966x_ptp_extts(ptp, rq, on);
753 static struct ptp_clock_info lan966x_ptp_clock_info = {
754 .owner = THIS_MODULE,
755 .name = "lan966x ptp",
757 .gettime64 = lan966x_ptp_gettime64,
758 .settime64 = lan966x_ptp_settime64,
759 .adjtime = lan966x_ptp_adjtime,
760 .adjfine = lan966x_ptp_adjfine,
761 .verify = lan966x_ptp_verify,
762 .enable = lan966x_ptp_enable,
763 .n_per_out = LAN966X_PHC_PINS_NUM,
764 .n_ext_ts = LAN966X_PHC_PINS_NUM,
765 .n_pins = LAN966X_PHC_PINS_NUM,
768 static int lan966x_ptp_phc_init(struct lan966x *lan966x,
770 struct ptp_clock_info *clock_info)
772 struct lan966x_phc *phc = &lan966x->phc[index];
773 struct ptp_pin_desc *p;
776 for (i = 0; i < LAN966X_PHC_PINS_NUM; i++) {
779 snprintf(p->name, sizeof(p->name), "pin%d", i);
781 p->func = PTP_PF_NONE;
784 phc->info = *clock_info;
785 phc->info.pin_config = &phc->pins[0];
786 phc->clock = ptp_clock_register(&phc->info, lan966x->dev);
787 if (IS_ERR(phc->clock))
788 return PTR_ERR(phc->clock);
791 phc->lan966x = lan966x;
793 /* PTP Rx stamping is always enabled. */
794 phc->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
799 int lan966x_ptp_init(struct lan966x *lan966x)
801 u64 tod_adj = lan966x_ptp_get_nominal_value();
802 struct lan966x_port *port;
808 for (i = 0; i < LAN966X_PHC_COUNT; ++i) {
809 err = lan966x_ptp_phc_init(lan966x, i, &lan966x_ptp_clock_info);
814 spin_lock_init(&lan966x->ptp_clock_lock);
815 spin_lock_init(&lan966x->ptp_ts_id_lock);
816 mutex_init(&lan966x->ptp_lock);
818 /* Disable master counters */
819 lan_wr(PTP_DOM_CFG_ENA_SET(0), lan966x, PTP_DOM_CFG);
821 /* Configure the nominal TOD increment per clock cycle */
822 lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0x7),
823 PTP_DOM_CFG_CLKCFG_DIS,
824 lan966x, PTP_DOM_CFG);
826 for (i = 0; i < LAN966X_PHC_COUNT; ++i) {
827 lan_wr((u32)tod_adj & 0xFFFFFFFF, lan966x,
828 PTP_CLK_PER_CFG(i, 0));
829 lan_wr((u32)(tod_adj >> 32), lan966x,
830 PTP_CLK_PER_CFG(i, 1));
833 lan_rmw(PTP_DOM_CFG_CLKCFG_DIS_SET(0),
834 PTP_DOM_CFG_CLKCFG_DIS,
835 lan966x, PTP_DOM_CFG);
837 /* Enable master counters */
838 lan_wr(PTP_DOM_CFG_ENA_SET(0x7), lan966x, PTP_DOM_CFG);
840 for (i = 0; i < lan966x->num_phys_ports; i++) {
841 port = lan966x->ports[i];
845 skb_queue_head_init(&port->tx_skbs);
851 void lan966x_ptp_deinit(struct lan966x *lan966x)
853 struct lan966x_port *port;
856 for (i = 0; i < lan966x->num_phys_ports; i++) {
857 port = lan966x->ports[i];
861 skb_queue_purge(&port->tx_skbs);
864 for (i = 0; i < LAN966X_PHC_COUNT; ++i)
865 ptp_clock_unregister(lan966x->phc[i].clock);
868 void lan966x_ptp_rxtstamp(struct lan966x *lan966x, struct sk_buff *skb,
871 struct skb_shared_hwtstamps *shhwtstamps;
872 struct lan966x_phc *phc;
873 struct timespec64 ts;
879 phc = &lan966x->phc[LAN966X_PHC_PORT];
880 lan966x_ptp_gettime64(&phc->info, &ts);
882 /* Drop the sub-ns precision */
883 timestamp = timestamp >> 2;
884 if (ts.tv_nsec < timestamp)
886 ts.tv_nsec = timestamp;
887 full_ts_in_ns = ktime_set(ts.tv_sec, ts.tv_nsec);
889 shhwtstamps = skb_hwtstamps(skb);
890 shhwtstamps->hwtstamp = full_ts_in_ns;
893 u32 lan966x_ptp_get_period_ps(void)
895 /* This represents the system clock period in picoseconds */