2 * drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c
3 * Copyright (c) 2016 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2016 Ido Schimmel <idosch@mellanox.com>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the names of the copyright holders nor the names of its
15 * contributors may be used to endorse or promote products derived from
16 * this software without specific prior written permission.
18 * Alternatively, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") version 2 as published by the Free
20 * Software Foundation.
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
35 #include <linux/netdevice.h>
36 #include <linux/string.h>
37 #include <net/dcbnl.h>
42 static u8 mlxsw_sp_dcbnl_getdcbx(struct net_device __always_unused *dev)
44 return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
47 static u8 mlxsw_sp_dcbnl_setdcbx(struct net_device __always_unused *dev,
50 return (mode != (DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE)) ? 1 : 0;
53 static int mlxsw_sp_dcbnl_ieee_getets(struct net_device *dev,
56 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
58 memcpy(ets, mlxsw_sp_port->dcb.ets, sizeof(*ets));
63 static int mlxsw_sp_port_ets_validate(struct mlxsw_sp_port *mlxsw_sp_port,
66 struct net_device *dev = mlxsw_sp_port->dev;
67 bool has_ets_tc = false;
70 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
71 switch (ets->tc_tsa[i]) {
72 case IEEE_8021QAZ_TSA_STRICT:
74 case IEEE_8021QAZ_TSA_ETS:
76 tx_bw_sum += ets->tc_tx_bw[i];
79 netdev_err(dev, "Only strict priority and ETS are supported\n");
83 if (ets->prio_tc[i] >= IEEE_8021QAZ_MAX_TCS) {
84 netdev_err(dev, "Invalid TC\n");
89 if (has_ets_tc && tx_bw_sum != 100) {
90 netdev_err(dev, "Total ETS bandwidth should equal 100\n");
97 static int mlxsw_sp_port_pg_prio_map(struct mlxsw_sp_port *mlxsw_sp_port,
100 char pptb_pl[MLXSW_REG_PPTB_LEN];
103 mlxsw_reg_pptb_pack(pptb_pl, mlxsw_sp_port->local_port);
104 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
105 mlxsw_reg_pptb_prio_to_buff_set(pptb_pl, i, prio_tc[i]);
106 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb),
110 static bool mlxsw_sp_ets_has_pg(u8 *prio_tc, u8 pg)
114 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
115 if (prio_tc[i] == pg)
120 static int mlxsw_sp_port_pg_destroy(struct mlxsw_sp_port *mlxsw_sp_port,
121 u8 *old_prio_tc, u8 *new_prio_tc)
123 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
124 char pbmc_pl[MLXSW_REG_PBMC_LEN];
127 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
128 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
132 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
133 u8 pg = old_prio_tc[i];
135 if (!mlxsw_sp_ets_has_pg(new_prio_tc, pg))
136 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg, 0);
139 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
142 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
143 struct ieee_ets *ets)
145 struct ieee_ets *my_ets = mlxsw_sp_port->dcb.ets;
146 struct net_device *dev = mlxsw_sp_port->dev;
149 /* Create the required PGs, but don't destroy existing ones, as
150 * traffic is still directed to them.
152 err = __mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu,
155 netdev_err(dev, "Failed to configure port's headroom\n");
159 err = mlxsw_sp_port_pg_prio_map(mlxsw_sp_port, ets->prio_tc);
161 netdev_err(dev, "Failed to set PG-priority mapping\n");
162 goto err_port_prio_pg_map;
165 err = mlxsw_sp_port_pg_destroy(mlxsw_sp_port, my_ets->prio_tc,
168 netdev_warn(dev, "Failed to remove ununsed PGs\n");
172 err_port_prio_pg_map:
173 mlxsw_sp_port_pg_destroy(mlxsw_sp_port, ets->prio_tc, my_ets->prio_tc);
177 static int __mlxsw_sp_dcbnl_ieee_setets(struct mlxsw_sp_port *mlxsw_sp_port,
178 struct ieee_ets *ets)
180 struct ieee_ets *my_ets = mlxsw_sp_port->dcb.ets;
181 struct net_device *dev = mlxsw_sp_port->dev;
184 /* Egress configuration. */
185 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
186 bool dwrr = ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS;
187 u8 weight = ets->tc_tx_bw[i];
189 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
190 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
193 netdev_err(dev, "Failed to link subgroup ETS element %d to group\n",
195 goto err_port_ets_set;
199 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
200 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i,
203 netdev_err(dev, "Failed to map prio %d to TC %d\n", i,
205 goto err_port_prio_tc_set;
209 /* Ingress configuration. */
210 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, ets);
212 goto err_port_headroom_set;
216 err_port_headroom_set:
217 i = IEEE_8021QAZ_MAX_TCS;
218 err_port_prio_tc_set:
219 for (i--; i >= 0; i--)
220 mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, my_ets->prio_tc[i]);
221 i = IEEE_8021QAZ_MAX_TCS;
223 for (i--; i >= 0; i--) {
224 bool dwrr = my_ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS;
225 u8 weight = my_ets->tc_tx_bw[i];
227 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
228 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
234 static int mlxsw_sp_dcbnl_ieee_setets(struct net_device *dev,
235 struct ieee_ets *ets)
237 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
240 err = mlxsw_sp_port_ets_validate(mlxsw_sp_port, ets);
244 err = __mlxsw_sp_dcbnl_ieee_setets(mlxsw_sp_port, ets);
248 memcpy(mlxsw_sp_port->dcb.ets, ets, sizeof(*ets));
253 static int mlxsw_sp_dcbnl_ieee_getmaxrate(struct net_device *dev,
254 struct ieee_maxrate *maxrate)
256 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
258 memcpy(maxrate, mlxsw_sp_port->dcb.maxrate, sizeof(*maxrate));
263 static int mlxsw_sp_dcbnl_ieee_setmaxrate(struct net_device *dev,
264 struct ieee_maxrate *maxrate)
266 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
267 struct ieee_maxrate *my_maxrate = mlxsw_sp_port->dcb.maxrate;
270 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
271 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
272 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
274 maxrate->tc_maxrate[i]);
276 netdev_err(dev, "Failed to set maxrate for TC %d\n", i);
277 goto err_port_ets_maxrate_set;
281 memcpy(mlxsw_sp_port->dcb.maxrate, maxrate, sizeof(*maxrate));
285 err_port_ets_maxrate_set:
286 for (i--; i >= 0; i--)
287 mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
288 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
289 i, 0, my_maxrate->tc_maxrate[i]);
293 static const struct dcbnl_rtnl_ops mlxsw_sp_dcbnl_ops = {
294 .ieee_getets = mlxsw_sp_dcbnl_ieee_getets,
295 .ieee_setets = mlxsw_sp_dcbnl_ieee_setets,
296 .ieee_getmaxrate = mlxsw_sp_dcbnl_ieee_getmaxrate,
297 .ieee_setmaxrate = mlxsw_sp_dcbnl_ieee_setmaxrate,
299 .getdcbx = mlxsw_sp_dcbnl_getdcbx,
300 .setdcbx = mlxsw_sp_dcbnl_setdcbx,
303 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
305 mlxsw_sp_port->dcb.ets = kzalloc(sizeof(*mlxsw_sp_port->dcb.ets),
307 if (!mlxsw_sp_port->dcb.ets)
310 mlxsw_sp_port->dcb.ets->ets_cap = IEEE_8021QAZ_MAX_TCS;
315 static void mlxsw_sp_port_ets_fini(struct mlxsw_sp_port *mlxsw_sp_port)
317 kfree(mlxsw_sp_port->dcb.ets);
320 static int mlxsw_sp_port_maxrate_init(struct mlxsw_sp_port *mlxsw_sp_port)
324 mlxsw_sp_port->dcb.maxrate = kmalloc(sizeof(*mlxsw_sp_port->dcb.maxrate),
326 if (!mlxsw_sp_port->dcb.maxrate)
329 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
330 mlxsw_sp_port->dcb.maxrate->tc_maxrate[i] = MLXSW_REG_QEEC_MAS_DIS;
335 static void mlxsw_sp_port_maxrate_fini(struct mlxsw_sp_port *mlxsw_sp_port)
337 kfree(mlxsw_sp_port->dcb.maxrate);
340 int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
344 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
347 err = mlxsw_sp_port_maxrate_init(mlxsw_sp_port);
349 goto err_port_maxrate_init;
351 mlxsw_sp_port->dev->dcbnl_ops = &mlxsw_sp_dcbnl_ops;
355 err_port_maxrate_init:
356 mlxsw_sp_port_ets_fini(mlxsw_sp_port);
360 void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
362 mlxsw_sp_port_maxrate_fini(mlxsw_sp_port);
363 mlxsw_sp_port_ets_fini(mlxsw_sp_port);