2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/types.h>
40 #include <linux/netdevice.h>
41 #include <linux/etherdevice.h>
42 #include <linux/ethtool.h>
43 #include <linux/slab.h>
44 #include <linux/device.h>
45 #include <linux/skbuff.h>
46 #include <linux/if_vlan.h>
47 #include <linux/if_bridge.h>
48 #include <linux/workqueue.h>
49 #include <linux/jiffies.h>
50 #include <linux/bitops.h>
51 #include <linux/list.h>
52 #include <linux/notifier.h>
53 #include <linux/dcbnl.h>
54 #include <linux/inetdevice.h>
55 #include <net/switchdev.h>
56 #include <generated/utsrelease.h>
57 #include <net/pkt_cls.h>
58 #include <net/tc_act/tc_mirred.h>
59 #include <net/netevent.h>
68 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69 static const char mlxsw_sp_driver_version[] = "1.0";
75 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
82 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
85 * Packet protocol type. Must be set to 1 (Ethernet).
87 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
89 /* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
92 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
98 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
101 * Switch partition ID. Must be set to 0.
103 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
105 /* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
109 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
112 * Egress TClass to be used on the egress device on the egress port.
114 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
124 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
131 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
135 * 6 - Control packets
137 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
139 static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
141 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
157 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
159 char spad_pl[MLXSW_REG_SPAD_LEN];
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
169 static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
171 struct mlxsw_resources *resources;
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
182 if (!mlxsw_sp->span.entries)
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
191 static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
200 kfree(mlxsw_sp->span.entries);
203 static struct mlxsw_sp_span_entry *
204 mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
214 /* find a free entry to use */
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
219 span_entry = &mlxsw_sp->span.entries[i];
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
239 static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
251 struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259 if (curr->used && curr->local_port == port->local_port)
265 struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
267 struct mlxsw_sp_span_entry *span_entry;
269 span_entry = mlxsw_sp_span_entry_find(port);
271 span_entry->ref_count++;
275 return mlxsw_sp_span_entry_create(port);
278 static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
279 struct mlxsw_sp_span_entry *span_entry)
281 if (--span_entry->ref_count == 0)
282 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
286 static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
288 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
289 struct mlxsw_sp_span_inspected_port *p;
292 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
293 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
295 list_for_each_entry(p, &curr->bound_ports_list, list)
296 if (p->local_port == port->local_port &&
297 p->type == MLXSW_SP_SPAN_EGRESS)
304 static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
306 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
309 static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
311 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
312 char sbib_pl[MLXSW_REG_SBIB_LEN];
315 /* If port is egress mirrored, the shared buffer size should be
316 * updated according to the mtu value
318 if (mlxsw_sp_span_is_egress_mirror(port)) {
319 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
320 mlxsw_sp_span_mtu_to_buffsize(mtu));
321 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
323 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
331 static struct mlxsw_sp_span_inspected_port *
332 mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
333 struct mlxsw_sp_span_entry *span_entry)
335 struct mlxsw_sp_span_inspected_port *p;
337 list_for_each_entry(p, &span_entry->bound_ports_list, list)
338 if (port->local_port == p->local_port)
344 mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
345 struct mlxsw_sp_span_entry *span_entry,
346 enum mlxsw_sp_span_type type)
348 struct mlxsw_sp_span_inspected_port *inspected_port;
349 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
350 char mpar_pl[MLXSW_REG_MPAR_LEN];
351 char sbib_pl[MLXSW_REG_SBIB_LEN];
352 int pa_id = span_entry->id;
355 /* if it is an egress SPAN, bind a shared buffer to it */
356 if (type == MLXSW_SP_SPAN_EGRESS) {
357 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
358 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
359 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
361 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
366 /* bind the port to the SPAN entry */
367 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
368 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
370 goto err_mpar_reg_write;
372 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
373 if (!inspected_port) {
375 goto err_inspected_port_alloc;
377 inspected_port->local_port = port->local_port;
378 inspected_port->type = type;
379 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
384 err_inspected_port_alloc:
385 if (type == MLXSW_SP_SPAN_EGRESS) {
386 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
387 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
393 mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
394 struct mlxsw_sp_span_entry *span_entry,
395 enum mlxsw_sp_span_type type)
397 struct mlxsw_sp_span_inspected_port *inspected_port;
398 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
399 char mpar_pl[MLXSW_REG_MPAR_LEN];
400 char sbib_pl[MLXSW_REG_SBIB_LEN];
401 int pa_id = span_entry->id;
403 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
407 /* remove the inspected port */
408 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
409 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
411 /* remove the SBIB buffer if it was egress SPAN */
412 if (type == MLXSW_SP_SPAN_EGRESS) {
413 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
417 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
419 list_del(&inspected_port->list);
420 kfree(inspected_port);
423 static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
424 struct mlxsw_sp_port *to,
425 enum mlxsw_sp_span_type type)
427 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
428 struct mlxsw_sp_span_entry *span_entry;
431 span_entry = mlxsw_sp_span_entry_get(to);
435 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
438 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
445 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
449 static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
450 struct mlxsw_sp_port *to,
451 enum mlxsw_sp_span_type type)
453 struct mlxsw_sp_span_entry *span_entry;
455 span_entry = mlxsw_sp_span_entry_find(to);
457 netdev_err(from->dev, "no span entry found\n");
461 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
463 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
466 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
469 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
470 char paos_pl[MLXSW_REG_PAOS_LEN];
472 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
473 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
474 MLXSW_PORT_ADMIN_STATUS_DOWN);
475 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
478 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
481 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
482 char ppad_pl[MLXSW_REG_PPAD_LEN];
484 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
485 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
486 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
489 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
491 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
492 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
494 ether_addr_copy(addr, mlxsw_sp->base_mac);
495 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
496 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
499 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
501 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
502 char pmtu_pl[MLXSW_REG_PMTU_LEN];
506 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
507 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
508 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
511 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
516 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
517 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
520 static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
523 char pspa_pl[MLXSW_REG_PSPA_LEN];
525 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
529 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
531 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
533 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
537 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
541 char svpe_pl[MLXSW_REG_SVPE_LEN];
543 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
544 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
547 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
548 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
552 char svfa_pl[MLXSW_REG_SVFA_LEN];
554 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
556 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
559 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
560 u16 vid, bool learn_enable)
562 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
566 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
569 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
571 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
577 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
579 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
580 char sspr_pl[MLXSW_REG_SSPR_LEN];
582 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
583 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
586 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
587 u8 local_port, u8 *p_module,
588 u8 *p_width, u8 *p_lane)
590 char pmlp_pl[MLXSW_REG_PMLP_LEN];
593 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
594 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
597 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
598 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
599 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
603 static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
604 u8 module, u8 width, u8 lane)
606 char pmlp_pl[MLXSW_REG_PMLP_LEN];
609 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
610 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
611 for (i = 0; i < width; i++) {
612 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
613 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
616 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
619 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
621 char pmlp_pl[MLXSW_REG_PMLP_LEN];
623 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
624 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
625 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
628 static int mlxsw_sp_port_open(struct net_device *dev)
630 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
633 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
636 netif_start_queue(dev);
640 static int mlxsw_sp_port_stop(struct net_device *dev)
642 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
644 netif_stop_queue(dev);
645 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
648 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
649 struct net_device *dev)
651 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
652 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
653 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
654 const struct mlxsw_tx_info tx_info = {
655 .local_port = mlxsw_sp_port->local_port,
661 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
662 return NETDEV_TX_BUSY;
664 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
665 struct sk_buff *skb_orig = skb;
667 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
669 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
670 dev_kfree_skb_any(skb_orig);
675 if (eth_skb_pad(skb)) {
676 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
680 mlxsw_sp_txhdr_construct(skb, &tx_info);
681 /* TX header is consumed by HW on the way so we shouldn't count its
682 * bytes as being sent.
684 len = skb->len - MLXSW_TXHDR_LEN;
686 /* Due to a race we might fail here because of a full queue. In that
687 * unlikely case we simply drop the packet.
689 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
692 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
693 u64_stats_update_begin(&pcpu_stats->syncp);
694 pcpu_stats->tx_packets++;
695 pcpu_stats->tx_bytes += len;
696 u64_stats_update_end(&pcpu_stats->syncp);
698 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
699 dev_kfree_skb_any(skb);
704 static void mlxsw_sp_set_rx_mode(struct net_device *dev)
708 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
710 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
711 struct sockaddr *addr = p;
714 if (!is_valid_ether_addr(addr->sa_data))
715 return -EADDRNOTAVAIL;
717 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
720 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
724 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
725 bool pause_en, bool pfc_en, u16 delay)
727 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
729 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
730 MLXSW_SP_PAUSE_DELAY;
732 if (pause_en || pfc_en)
733 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
734 pg_size + delay, pg_size);
736 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
739 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
740 u8 *prio_tc, bool pause_en,
741 struct ieee_pfc *my_pfc)
743 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
744 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
745 u16 delay = !!my_pfc ? my_pfc->delay : 0;
746 char pbmc_pl[MLXSW_REG_PBMC_LEN];
749 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
750 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
754 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
755 bool configure = false;
758 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
759 if (prio_tc[j] == i) {
760 pfc = pfc_en & BIT(j);
768 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
771 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
774 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
775 int mtu, bool pause_en)
777 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
778 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
779 struct ieee_pfc *my_pfc;
782 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
783 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
785 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
789 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
791 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
792 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
795 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
798 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
800 goto err_span_port_mtu_update;
801 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
803 goto err_port_mtu_set;
808 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
809 err_span_port_mtu_update:
810 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
814 static struct rtnl_link_stats64 *
815 mlxsw_sp_port_get_stats64(struct net_device *dev,
816 struct rtnl_link_stats64 *stats)
818 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
819 struct mlxsw_sp_port_pcpu_stats *p;
820 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
825 for_each_possible_cpu(i) {
826 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
828 start = u64_stats_fetch_begin_irq(&p->syncp);
829 rx_packets = p->rx_packets;
830 rx_bytes = p->rx_bytes;
831 tx_packets = p->tx_packets;
832 tx_bytes = p->tx_bytes;
833 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
835 stats->rx_packets += rx_packets;
836 stats->rx_bytes += rx_bytes;
837 stats->tx_packets += tx_packets;
838 stats->tx_bytes += tx_bytes;
839 /* tx_dropped is u32, updated without syncp protection. */
840 tx_dropped += p->tx_dropped;
842 stats->tx_dropped = tx_dropped;
846 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
847 u16 vid_end, bool is_member, bool untagged)
849 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
853 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
857 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
858 vid_end, is_member, untagged);
859 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
864 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
866 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
867 u16 vid, last_visited_vid;
870 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
871 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
874 last_visited_vid = vid;
875 goto err_port_vid_to_fid_set;
879 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
881 last_visited_vid = VLAN_N_VID;
882 goto err_port_vid_to_fid_set;
887 err_port_vid_to_fid_set:
888 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
889 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
894 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
896 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
900 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
904 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
905 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
914 static struct mlxsw_sp_port *
915 mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
917 struct mlxsw_sp_port *mlxsw_sp_vport;
919 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
923 /* dev will be set correctly after the VLAN device is linked
924 * with the real device. In case of bridge SELF invocation, dev
927 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
928 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
929 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
930 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
931 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
932 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
933 mlxsw_sp_vport->vport.vid = vid;
935 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
937 return mlxsw_sp_vport;
940 static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
942 list_del(&mlxsw_sp_vport->vport.list);
943 kfree(mlxsw_sp_vport);
946 static int mlxsw_sp_port_add_vid(struct net_device *dev,
947 __be16 __always_unused proto, u16 vid)
949 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
950 struct mlxsw_sp_port *mlxsw_sp_vport;
951 bool untagged = vid == 1;
954 /* VLAN 0 is added to HW filter when device goes up, but it is
955 * reserved in our case, so simply return.
960 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
963 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
967 /* When adding the first VLAN interface on a bridged port we need to
968 * transition all the active 802.1Q bridge VLANs to use explicit
969 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
971 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
972 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
974 goto err_port_vp_mode_trans;
977 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
979 goto err_port_vid_learning_set;
981 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
983 goto err_port_add_vid;
988 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
989 err_port_vid_learning_set:
990 if (list_is_singular(&mlxsw_sp_port->vports_list))
991 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
992 err_port_vp_mode_trans:
993 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
997 static int mlxsw_sp_port_kill_vid(struct net_device *dev,
998 __be16 __always_unused proto, u16 vid)
1000 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1001 struct mlxsw_sp_port *mlxsw_sp_vport;
1002 struct mlxsw_sp_fid *f;
1004 /* VLAN 0 is removed from HW filter when device goes down, but
1005 * it is reserved in our case, so simply return.
1010 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
1011 if (WARN_ON(!mlxsw_sp_vport))
1014 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
1016 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
1018 /* Drop FID reference. If this was the last reference the
1019 * resources will be freed.
1021 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1022 if (f && !WARN_ON(!f->leave))
1023 f->leave(mlxsw_sp_vport);
1025 /* When removing the last VLAN interface on a bridged port we need to
1026 * transition all active 802.1Q bridge VLANs to use VID to FID
1027 * mappings and set port's mode to VLAN mode.
1029 if (list_is_singular(&mlxsw_sp_port->vports_list))
1030 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1032 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1037 static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1040 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1041 u8 module = mlxsw_sp_port->mapping.module;
1042 u8 width = mlxsw_sp_port->mapping.width;
1043 u8 lane = mlxsw_sp_port->mapping.lane;
1046 if (!mlxsw_sp_port->split)
1047 err = snprintf(name, len, "p%d", module + 1);
1049 err = snprintf(name, len, "p%ds%d", module + 1,
1058 static struct mlxsw_sp_port_mall_tc_entry *
1059 mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1060 unsigned long cookie) {
1061 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1063 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1064 if (mall_tc_entry->cookie == cookie)
1065 return mall_tc_entry;
1071 mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1072 struct tc_cls_matchall_offload *cls,
1073 const struct tc_action *a,
1076 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1077 struct net *net = dev_net(mlxsw_sp_port->dev);
1078 enum mlxsw_sp_span_type span_type;
1079 struct mlxsw_sp_port *to_port;
1080 struct net_device *to_dev;
1084 ifindex = tcf_mirred_ifindex(a);
1085 to_dev = __dev_get_by_index(net, ifindex);
1087 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1091 if (!mlxsw_sp_port_dev_check(to_dev)) {
1092 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1095 to_port = netdev_priv(to_dev);
1097 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1101 mall_tc_entry->cookie = cls->cookie;
1102 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1103 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1104 mall_tc_entry->mirror.ingress = ingress;
1105 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1107 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1108 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1110 goto err_mirror_add;
1114 list_del(&mall_tc_entry->list);
1115 kfree(mall_tc_entry);
1119 static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1121 struct tc_cls_matchall_offload *cls,
1124 const struct tc_action *a;
1128 if (!tc_single_action(cls->exts)) {
1129 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1133 tcf_exts_to_list(cls->exts, &actions);
1134 list_for_each_entry(a, &actions, list) {
1135 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1138 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1147 static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1148 struct tc_cls_matchall_offload *cls)
1150 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1151 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1152 enum mlxsw_sp_span_type span_type;
1153 struct mlxsw_sp_port *to_port;
1155 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1157 if (!mall_tc_entry) {
1158 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1162 switch (mall_tc_entry->type) {
1163 case MLXSW_SP_PORT_MALL_MIRROR:
1164 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1165 span_type = mall_tc_entry->mirror.ingress ?
1166 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1168 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1174 list_del(&mall_tc_entry->list);
1175 kfree(mall_tc_entry);
1178 static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1179 __be16 proto, struct tc_to_netdev *tc)
1181 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1182 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1184 if (tc->type == TC_SETUP_MATCHALL) {
1185 switch (tc->cls_mall->command) {
1186 case TC_CLSMATCHALL_REPLACE:
1187 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1191 case TC_CLSMATCHALL_DESTROY:
1192 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1203 static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1204 .ndo_open = mlxsw_sp_port_open,
1205 .ndo_stop = mlxsw_sp_port_stop,
1206 .ndo_start_xmit = mlxsw_sp_port_xmit,
1207 .ndo_setup_tc = mlxsw_sp_setup_tc,
1208 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
1209 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1210 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1211 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1212 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1213 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1214 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1215 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
1216 .ndo_fdb_add = switchdev_port_fdb_add,
1217 .ndo_fdb_del = switchdev_port_fdb_del,
1218 .ndo_fdb_dump = switchdev_port_fdb_dump,
1219 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1220 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1221 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
1222 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
1225 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1226 struct ethtool_drvinfo *drvinfo)
1228 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1229 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1231 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1232 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1233 sizeof(drvinfo->version));
1234 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1236 mlxsw_sp->bus_info->fw_rev.major,
1237 mlxsw_sp->bus_info->fw_rev.minor,
1238 mlxsw_sp->bus_info->fw_rev.subminor);
1239 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1240 sizeof(drvinfo->bus_info));
1243 static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1244 struct ethtool_pauseparam *pause)
1246 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1248 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1249 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1252 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1253 struct ethtool_pauseparam *pause)
1255 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1257 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1258 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1259 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1261 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1265 static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1266 struct ethtool_pauseparam *pause)
1268 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1269 bool pause_en = pause->tx_pause || pause->rx_pause;
1272 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1273 netdev_err(dev, "PFC already enabled on port\n");
1277 if (pause->autoneg) {
1278 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1282 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1284 netdev_err(dev, "Failed to configure port's headroom\n");
1288 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1290 netdev_err(dev, "Failed to set PAUSE parameters\n");
1291 goto err_port_pause_configure;
1294 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1295 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1299 err_port_pause_configure:
1300 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1301 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1305 struct mlxsw_sp_port_hw_stats {
1306 char str[ETH_GSTRING_LEN];
1307 u64 (*getter)(char *payload);
1310 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
1312 .str = "a_frames_transmitted_ok",
1313 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1316 .str = "a_frames_received_ok",
1317 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1320 .str = "a_frame_check_sequence_errors",
1321 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1324 .str = "a_alignment_errors",
1325 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1328 .str = "a_octets_transmitted_ok",
1329 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1332 .str = "a_octets_received_ok",
1333 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1336 .str = "a_multicast_frames_xmitted_ok",
1337 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1340 .str = "a_broadcast_frames_xmitted_ok",
1341 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1344 .str = "a_multicast_frames_received_ok",
1345 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1348 .str = "a_broadcast_frames_received_ok",
1349 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1352 .str = "a_in_range_length_errors",
1353 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1356 .str = "a_out_of_range_length_field",
1357 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1360 .str = "a_frame_too_long_errors",
1361 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1364 .str = "a_symbol_error_during_carrier",
1365 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1368 .str = "a_mac_control_frames_transmitted",
1369 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1372 .str = "a_mac_control_frames_received",
1373 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1376 .str = "a_unsupported_opcodes_received",
1377 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1380 .str = "a_pause_mac_ctrl_frames_received",
1381 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1384 .str = "a_pause_mac_ctrl_frames_xmitted",
1385 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1389 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1391 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1393 .str = "rx_octets_prio",
1394 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1397 .str = "rx_frames_prio",
1398 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1401 .str = "tx_octets_prio",
1402 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1405 .str = "tx_frames_prio",
1406 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1409 .str = "rx_pause_prio",
1410 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1413 .str = "rx_pause_duration_prio",
1414 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1417 .str = "tx_pause_prio",
1418 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1421 .str = "tx_pause_duration_prio",
1422 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1426 #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1428 static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1430 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1432 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1435 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1437 .str = "tc_transmit_queue_tc",
1438 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1441 .str = "tc_no_buffer_discard_uc_tc",
1442 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1446 #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1448 #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
1449 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1450 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
1451 IEEE_8021QAZ_MAX_TCS)
1453 static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1457 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1458 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1459 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1460 *p += ETH_GSTRING_LEN;
1464 static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1468 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1469 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1470 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1471 *p += ETH_GSTRING_LEN;
1475 static void mlxsw_sp_port_get_strings(struct net_device *dev,
1476 u32 stringset, u8 *data)
1481 switch (stringset) {
1483 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1484 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1486 p += ETH_GSTRING_LEN;
1489 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1490 mlxsw_sp_port_get_prio_strings(&p, i);
1492 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1493 mlxsw_sp_port_get_tc_strings(&p, i);
1499 static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1500 enum ethtool_phys_id_state state)
1502 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1503 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1504 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1508 case ETHTOOL_ID_ACTIVE:
1511 case ETHTOOL_ID_INACTIVE:
1518 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1519 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1523 mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1524 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1527 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1528 *p_hw_stats = mlxsw_sp_port_hw_stats;
1529 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1531 case MLXSW_REG_PPCNT_PRIO_CNT:
1532 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1533 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1535 case MLXSW_REG_PPCNT_TC_CNT:
1536 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1537 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1546 static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1547 enum mlxsw_reg_ppcnt_grp grp, int prio,
1548 u64 *data, int data_index)
1550 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1552 struct mlxsw_sp_port_hw_stats *hw_stats;
1553 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1557 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1560 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
1561 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1562 for (i = 0; i < len; i++)
1563 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1566 static void mlxsw_sp_port_get_stats(struct net_device *dev,
1567 struct ethtool_stats *stats, u64 *data)
1569 int i, data_index = 0;
1571 /* IEEE 802.3 Counters */
1572 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1574 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1576 /* Per-Priority Counters */
1577 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1578 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1580 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1583 /* Per-TC Counters */
1584 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1585 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1587 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1591 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1595 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
1601 struct mlxsw_sp_port_link_mode {
1608 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1610 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1611 .supported = SUPPORTED_100baseT_Full,
1612 .advertised = ADVERTISED_100baseT_Full,
1616 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1620 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1621 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1622 .supported = SUPPORTED_1000baseKX_Full,
1623 .advertised = ADVERTISED_1000baseKX_Full,
1627 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1628 .supported = SUPPORTED_10000baseT_Full,
1629 .advertised = ADVERTISED_10000baseT_Full,
1633 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1634 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1635 .supported = SUPPORTED_10000baseKX4_Full,
1636 .advertised = ADVERTISED_10000baseKX4_Full,
1640 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1641 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1642 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1643 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1644 .supported = SUPPORTED_10000baseKR_Full,
1645 .advertised = ADVERTISED_10000baseKR_Full,
1649 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1650 .supported = SUPPORTED_20000baseKR2_Full,
1651 .advertised = ADVERTISED_20000baseKR2_Full,
1655 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1656 .supported = SUPPORTED_40000baseCR4_Full,
1657 .advertised = ADVERTISED_40000baseCR4_Full,
1661 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1662 .supported = SUPPORTED_40000baseKR4_Full,
1663 .advertised = ADVERTISED_40000baseKR4_Full,
1667 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1668 .supported = SUPPORTED_40000baseSR4_Full,
1669 .advertised = ADVERTISED_40000baseSR4_Full,
1673 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1674 .supported = SUPPORTED_40000baseLR4_Full,
1675 .advertised = ADVERTISED_40000baseLR4_Full,
1679 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1680 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1681 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1685 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1686 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1687 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1691 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1692 .supported = SUPPORTED_56000baseKR4_Full,
1693 .advertised = ADVERTISED_56000baseKR4_Full,
1697 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1698 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1699 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1700 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1705 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1707 static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1709 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1710 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1711 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1712 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1713 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1714 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1715 return SUPPORTED_FIBRE;
1717 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1718 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1719 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1720 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1721 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1722 return SUPPORTED_Backplane;
1726 static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1731 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1732 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1733 modes |= mlxsw_sp_port_link_mode[i].supported;
1738 static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1743 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1744 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1745 modes |= mlxsw_sp_port_link_mode[i].advertised;
1750 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1751 struct ethtool_cmd *cmd)
1753 u32 speed = SPEED_UNKNOWN;
1754 u8 duplex = DUPLEX_UNKNOWN;
1760 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1761 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1762 speed = mlxsw_sp_port_link_mode[i].speed;
1763 duplex = DUPLEX_FULL;
1768 ethtool_cmd_speed_set(cmd, speed);
1769 cmd->duplex = duplex;
1772 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1774 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1775 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1776 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1777 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1780 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1781 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1782 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1785 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1786 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1787 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1788 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1794 static int mlxsw_sp_port_get_settings(struct net_device *dev,
1795 struct ethtool_cmd *cmd)
1797 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1798 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1799 char ptys_pl[MLXSW_REG_PTYS_LEN];
1801 u32 eth_proto_admin;
1805 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1806 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1808 netdev_err(dev, "Failed to get proto");
1811 mlxsw_reg_ptys_unpack(ptys_pl, ð_proto_cap,
1812 ð_proto_admin, ð_proto_oper);
1814 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1815 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1816 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1818 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1819 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1820 eth_proto_oper, cmd);
1822 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1823 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1824 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1826 cmd->transceiver = XCVR_INTERNAL;
1830 static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1835 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1836 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1837 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1842 static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1847 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1848 if (speed == mlxsw_sp_port_link_mode[i].speed)
1849 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1854 static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1859 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1860 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1861 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1866 static int mlxsw_sp_port_set_settings(struct net_device *dev,
1867 struct ethtool_cmd *cmd)
1869 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1870 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1871 char ptys_pl[MLXSW_REG_PTYS_LEN];
1875 u32 eth_proto_admin;
1878 speed = ethtool_cmd_speed(cmd);
1880 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1881 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1882 mlxsw_sp_to_ptys_speed(speed);
1884 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1885 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1887 netdev_err(dev, "Failed to get proto");
1890 mlxsw_reg_ptys_unpack(ptys_pl, ð_proto_cap, ð_proto_admin, NULL);
1892 eth_proto_new = eth_proto_new & eth_proto_cap;
1893 if (!eth_proto_new) {
1894 netdev_err(dev, "Not supported proto admin requested");
1897 if (eth_proto_new == eth_proto_admin)
1900 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1901 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1903 netdev_err(dev, "Failed to set proto admin");
1907 if (!netif_running(dev))
1910 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1912 netdev_err(dev, "Failed to set admin status");
1916 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1918 netdev_err(dev, "Failed to set admin status");
1925 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1926 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1927 .get_link = ethtool_op_get_link,
1928 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1929 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
1930 .get_strings = mlxsw_sp_port_get_strings,
1931 .set_phys_id = mlxsw_sp_port_set_phys_id,
1932 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1933 .get_sset_count = mlxsw_sp_port_get_sset_count,
1934 .get_settings = mlxsw_sp_port_get_settings,
1935 .set_settings = mlxsw_sp_port_set_settings,
1939 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1941 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1942 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1943 char ptys_pl[MLXSW_REG_PTYS_LEN];
1944 u32 eth_proto_admin;
1946 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1947 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1949 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1952 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1953 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1954 bool dwrr, u8 dwrr_weight)
1956 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1957 char qeec_pl[MLXSW_REG_QEEC_LEN];
1959 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1961 mlxsw_reg_qeec_de_set(qeec_pl, true);
1962 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1963 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1964 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1967 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1968 enum mlxsw_reg_qeec_hr hr, u8 index,
1969 u8 next_index, u32 maxrate)
1971 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1972 char qeec_pl[MLXSW_REG_QEEC_LEN];
1974 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1976 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1977 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1978 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1981 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1982 u8 switch_prio, u8 tclass)
1984 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1985 char qtct_pl[MLXSW_REG_QTCT_LEN];
1987 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1989 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1992 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
1996 /* Setup the elements hierarcy, so that each TC is linked to
1997 * one subgroup, which are all member in the same group.
1999 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2000 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2004 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2005 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2006 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2011 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2012 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2013 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2019 /* Make sure the max shaper is disabled in all hierarcies that
2022 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2023 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2024 MLXSW_REG_QEEC_MAS_DIS);
2027 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2028 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2029 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2031 MLXSW_REG_QEEC_MAS_DIS);
2035 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2036 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2037 MLXSW_REG_QEEC_HIERARCY_TC,
2039 MLXSW_REG_QEEC_MAS_DIS);
2044 /* Map all priorities to traffic class 0. */
2045 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2046 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2054 static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2056 mlxsw_sp_port->pvid = 1;
2058 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2061 static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2063 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2066 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2067 bool split, u8 module, u8 width, u8 lane)
2069 struct mlxsw_sp_port *mlxsw_sp_port;
2070 struct net_device *dev;
2074 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2077 mlxsw_sp_port = netdev_priv(dev);
2078 mlxsw_sp_port->dev = dev;
2079 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2080 mlxsw_sp_port->local_port = local_port;
2081 mlxsw_sp_port->split = split;
2082 mlxsw_sp_port->mapping.module = module;
2083 mlxsw_sp_port->mapping.width = width;
2084 mlxsw_sp_port->mapping.lane = lane;
2085 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2086 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2087 if (!mlxsw_sp_port->active_vlans) {
2089 goto err_port_active_vlans_alloc;
2091 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2092 if (!mlxsw_sp_port->untagged_vlans) {
2094 goto err_port_untagged_vlans_alloc;
2096 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
2097 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
2099 mlxsw_sp_port->pcpu_stats =
2100 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2101 if (!mlxsw_sp_port->pcpu_stats) {
2103 goto err_alloc_stats;
2106 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2107 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2109 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2111 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2112 mlxsw_sp_port->local_port);
2113 goto err_port_swid_set;
2116 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2118 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2119 mlxsw_sp_port->local_port);
2120 goto err_dev_addr_init;
2123 netif_carrier_off(dev);
2125 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
2126 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2127 dev->hw_features |= NETIF_F_HW_TC;
2129 /* Each packet needs to have a Tx header (metadata) on top all other
2132 dev->hard_header_len += MLXSW_TXHDR_LEN;
2134 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2136 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2137 mlxsw_sp_port->local_port);
2138 goto err_port_system_port_mapping_set;
2141 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2143 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2144 mlxsw_sp_port->local_port);
2145 goto err_port_speed_by_width_set;
2148 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2150 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2151 mlxsw_sp_port->local_port);
2152 goto err_port_mtu_set;
2155 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2157 goto err_port_admin_status_set;
2159 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2161 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2162 mlxsw_sp_port->local_port);
2163 goto err_port_buffers_init;
2166 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2168 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2169 mlxsw_sp_port->local_port);
2170 goto err_port_ets_init;
2173 /* ETS and buffers must be initialized before DCB. */
2174 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2176 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2177 mlxsw_sp_port->local_port);
2178 goto err_port_dcb_init;
2181 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2183 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2184 mlxsw_sp_port->local_port);
2185 goto err_port_pvid_vport_create;
2188 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
2189 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
2190 err = register_netdev(dev);
2192 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2193 mlxsw_sp_port->local_port);
2194 goto err_register_netdev;
2197 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2198 mlxsw_sp_port->local_port, dev,
2199 mlxsw_sp_port->split, module);
2201 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2202 mlxsw_sp_port->local_port);
2203 goto err_core_port_init;
2209 unregister_netdev(dev);
2210 err_register_netdev:
2211 mlxsw_sp->ports[local_port] = NULL;
2212 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2213 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2214 err_port_pvid_vport_create:
2215 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2218 err_port_buffers_init:
2219 err_port_admin_status_set:
2221 err_port_speed_by_width_set:
2222 err_port_system_port_mapping_set:
2224 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2226 free_percpu(mlxsw_sp_port->pcpu_stats);
2228 kfree(mlxsw_sp_port->untagged_vlans);
2229 err_port_untagged_vlans_alloc:
2230 kfree(mlxsw_sp_port->active_vlans);
2231 err_port_active_vlans_alloc:
2236 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2238 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2242 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
2243 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
2244 mlxsw_sp->ports[local_port] = NULL;
2245 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
2246 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2247 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
2248 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2249 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
2250 free_percpu(mlxsw_sp_port->pcpu_stats);
2251 kfree(mlxsw_sp_port->untagged_vlans);
2252 kfree(mlxsw_sp_port->active_vlans);
2253 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
2254 free_netdev(mlxsw_sp_port->dev);
2257 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2261 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2262 mlxsw_sp_port_remove(mlxsw_sp, i);
2263 kfree(mlxsw_sp->ports);
2266 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2268 u8 module, width, lane;
2273 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2274 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2275 if (!mlxsw_sp->ports)
2278 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
2279 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
2282 goto err_port_module_info_get;
2285 mlxsw_sp->port_to_module[i] = module;
2286 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2289 goto err_port_create;
2294 err_port_module_info_get:
2295 for (i--; i >= 1; i--)
2296 mlxsw_sp_port_remove(mlxsw_sp, i);
2297 kfree(mlxsw_sp->ports);
2301 static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2303 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2305 return local_port - offset;
2308 static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2309 u8 module, unsigned int count)
2311 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2314 for (i = 0; i < count; i++) {
2315 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2318 goto err_port_module_map;
2321 for (i = 0; i < count; i++) {
2322 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2324 goto err_port_swid_set;
2327 for (i = 0; i < count; i++) {
2328 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
2329 module, width, i * width);
2331 goto err_port_create;
2337 for (i--; i >= 0; i--)
2338 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2341 for (i--; i >= 0; i--)
2342 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2343 MLXSW_PORT_SWID_DISABLED_PORT);
2345 err_port_module_map:
2346 for (i--; i >= 0; i--)
2347 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2351 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2352 u8 base_port, unsigned int count)
2354 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2357 /* Split by four means we need to re-create two ports, otherwise
2362 for (i = 0; i < count; i++) {
2363 local_port = base_port + i * 2;
2364 module = mlxsw_sp->port_to_module[local_port];
2366 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2370 for (i = 0; i < count; i++)
2371 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2373 for (i = 0; i < count; i++) {
2374 local_port = base_port + i * 2;
2375 module = mlxsw_sp->port_to_module[local_port];
2377 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
2382 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2385 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2386 struct mlxsw_sp_port *mlxsw_sp_port;
2387 u8 module, cur_width, base_port;
2391 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2392 if (!mlxsw_sp_port) {
2393 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2398 module = mlxsw_sp_port->mapping.module;
2399 cur_width = mlxsw_sp_port->mapping.width;
2401 if (count != 2 && count != 4) {
2402 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2406 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2407 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2411 /* Make sure we have enough slave (even) ports for the split. */
2413 base_port = local_port;
2414 if (mlxsw_sp->ports[base_port + 1]) {
2415 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2419 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2420 if (mlxsw_sp->ports[base_port + 1] ||
2421 mlxsw_sp->ports[base_port + 3]) {
2422 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2427 for (i = 0; i < count; i++)
2428 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2430 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2432 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2433 goto err_port_split_create;
2438 err_port_split_create:
2439 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2443 static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
2445 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2446 struct mlxsw_sp_port *mlxsw_sp_port;
2447 u8 cur_width, base_port;
2451 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2452 if (!mlxsw_sp_port) {
2453 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2458 if (!mlxsw_sp_port->split) {
2459 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2463 cur_width = mlxsw_sp_port->mapping.width;
2464 count = cur_width == 1 ? 4 : 2;
2466 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2468 /* Determine which ports to remove. */
2469 if (count == 2 && local_port >= base_port + 2)
2470 base_port = base_port + 2;
2472 for (i = 0; i < count; i++)
2473 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2475 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2480 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2481 char *pude_pl, void *priv)
2483 struct mlxsw_sp *mlxsw_sp = priv;
2484 struct mlxsw_sp_port *mlxsw_sp_port;
2485 enum mlxsw_reg_pude_oper_status status;
2488 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2489 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2493 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2494 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2495 netdev_info(mlxsw_sp_port->dev, "link up\n");
2496 netif_carrier_on(mlxsw_sp_port->dev);
2498 netdev_info(mlxsw_sp_port->dev, "link down\n");
2499 netif_carrier_off(mlxsw_sp_port->dev);
2503 static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2504 .func = mlxsw_sp_pude_event_func,
2505 .trap_id = MLXSW_TRAP_ID_PUDE,
2508 static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2509 enum mlxsw_event_trap_id trap_id)
2511 struct mlxsw_event_listener *el;
2512 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2516 case MLXSW_TRAP_ID_PUDE:
2517 el = &mlxsw_sp_pude_event;
2520 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2524 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2525 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2527 goto err_event_trap_set;
2532 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2536 static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2537 enum mlxsw_event_trap_id trap_id)
2539 struct mlxsw_event_listener *el;
2542 case MLXSW_TRAP_ID_PUDE:
2543 el = &mlxsw_sp_pude_event;
2546 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2549 static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2552 struct mlxsw_sp *mlxsw_sp = priv;
2553 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2554 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2556 if (unlikely(!mlxsw_sp_port)) {
2557 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2562 skb->dev = mlxsw_sp_port->dev;
2564 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2565 u64_stats_update_begin(&pcpu_stats->syncp);
2566 pcpu_stats->rx_packets++;
2567 pcpu_stats->rx_bytes += skb->len;
2568 u64_stats_update_end(&pcpu_stats->syncp);
2570 skb->protocol = eth_type_trans(skb, skb->dev);
2571 netif_receive_skb(skb);
2574 static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2576 .func = mlxsw_sp_rx_listener_func,
2577 .local_port = MLXSW_PORT_DONT_CARE,
2578 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2580 /* Traps for specific L2 packet types, not trapped as FDB MC */
2582 .func = mlxsw_sp_rx_listener_func,
2583 .local_port = MLXSW_PORT_DONT_CARE,
2584 .trap_id = MLXSW_TRAP_ID_STP,
2587 .func = mlxsw_sp_rx_listener_func,
2588 .local_port = MLXSW_PORT_DONT_CARE,
2589 .trap_id = MLXSW_TRAP_ID_LACP,
2592 .func = mlxsw_sp_rx_listener_func,
2593 .local_port = MLXSW_PORT_DONT_CARE,
2594 .trap_id = MLXSW_TRAP_ID_EAPOL,
2597 .func = mlxsw_sp_rx_listener_func,
2598 .local_port = MLXSW_PORT_DONT_CARE,
2599 .trap_id = MLXSW_TRAP_ID_LLDP,
2602 .func = mlxsw_sp_rx_listener_func,
2603 .local_port = MLXSW_PORT_DONT_CARE,
2604 .trap_id = MLXSW_TRAP_ID_MMRP,
2607 .func = mlxsw_sp_rx_listener_func,
2608 .local_port = MLXSW_PORT_DONT_CARE,
2609 .trap_id = MLXSW_TRAP_ID_MVRP,
2612 .func = mlxsw_sp_rx_listener_func,
2613 .local_port = MLXSW_PORT_DONT_CARE,
2614 .trap_id = MLXSW_TRAP_ID_RPVST,
2617 .func = mlxsw_sp_rx_listener_func,
2618 .local_port = MLXSW_PORT_DONT_CARE,
2619 .trap_id = MLXSW_TRAP_ID_DHCP,
2622 .func = mlxsw_sp_rx_listener_func,
2623 .local_port = MLXSW_PORT_DONT_CARE,
2624 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2627 .func = mlxsw_sp_rx_listener_func,
2628 .local_port = MLXSW_PORT_DONT_CARE,
2629 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2632 .func = mlxsw_sp_rx_listener_func,
2633 .local_port = MLXSW_PORT_DONT_CARE,
2634 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2637 .func = mlxsw_sp_rx_listener_func,
2638 .local_port = MLXSW_PORT_DONT_CARE,
2639 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2642 .func = mlxsw_sp_rx_listener_func,
2643 .local_port = MLXSW_PORT_DONT_CARE,
2644 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2647 .func = mlxsw_sp_rx_listener_func,
2648 .local_port = MLXSW_PORT_DONT_CARE,
2649 .trap_id = MLXSW_TRAP_ID_ARPBC,
2652 .func = mlxsw_sp_rx_listener_func,
2653 .local_port = MLXSW_PORT_DONT_CARE,
2654 .trap_id = MLXSW_TRAP_ID_ARPUC,
2657 .func = mlxsw_sp_rx_listener_func,
2658 .local_port = MLXSW_PORT_DONT_CARE,
2659 .trap_id = MLXSW_TRAP_ID_MTUERROR,
2662 .func = mlxsw_sp_rx_listener_func,
2663 .local_port = MLXSW_PORT_DONT_CARE,
2664 .trap_id = MLXSW_TRAP_ID_TTLERROR,
2667 .func = mlxsw_sp_rx_listener_func,
2668 .local_port = MLXSW_PORT_DONT_CARE,
2669 .trap_id = MLXSW_TRAP_ID_LBERROR,
2672 .func = mlxsw_sp_rx_listener_func,
2673 .local_port = MLXSW_PORT_DONT_CARE,
2674 .trap_id = MLXSW_TRAP_ID_OSPF,
2677 .func = mlxsw_sp_rx_listener_func,
2678 .local_port = MLXSW_PORT_DONT_CARE,
2679 .trap_id = MLXSW_TRAP_ID_IP2ME,
2682 .func = mlxsw_sp_rx_listener_func,
2683 .local_port = MLXSW_PORT_DONT_CARE,
2684 .trap_id = MLXSW_TRAP_ID_RTR_INGRESS0,
2687 .func = mlxsw_sp_rx_listener_func,
2688 .local_port = MLXSW_PORT_DONT_CARE,
2689 .trap_id = MLXSW_TRAP_ID_HOST_MISS_IPV4,
2693 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2695 char htgt_pl[MLXSW_REG_HTGT_LEN];
2696 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2700 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2701 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2705 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2706 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2710 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2711 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2712 &mlxsw_sp_rx_listener[i],
2715 goto err_rx_listener_register;
2717 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2718 mlxsw_sp_rx_listener[i].trap_id);
2719 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2721 goto err_rx_trap_set;
2726 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2727 &mlxsw_sp_rx_listener[i],
2729 err_rx_listener_register:
2730 for (i--; i >= 0; i--) {
2731 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
2732 mlxsw_sp_rx_listener[i].trap_id);
2733 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2735 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2736 &mlxsw_sp_rx_listener[i],
2742 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2744 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2747 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2748 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
2749 mlxsw_sp_rx_listener[i].trap_id);
2750 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2752 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2753 &mlxsw_sp_rx_listener[i],
2758 static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2759 enum mlxsw_reg_sfgc_type type,
2760 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2762 enum mlxsw_flood_table_type table_type;
2763 enum mlxsw_sp_flood_table flood_table;
2764 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2766 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
2767 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
2769 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
2771 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2772 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2774 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
2776 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2778 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2781 static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2785 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2786 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2789 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2790 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2794 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2795 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2803 static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2805 char slcr_pl[MLXSW_REG_SLCR_LEN];
2807 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2808 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2809 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2810 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2811 MLXSW_REG_SLCR_LAG_HASH_SIP |
2812 MLXSW_REG_SLCR_LAG_HASH_DIP |
2813 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2814 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2815 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2816 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2819 static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
2820 const struct mlxsw_bus_info *mlxsw_bus_info)
2822 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2825 mlxsw_sp->core = mlxsw_core;
2826 mlxsw_sp->bus_info = mlxsw_bus_info;
2827 INIT_LIST_HEAD(&mlxsw_sp->fids);
2828 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
2829 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
2831 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2833 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2837 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2839 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
2843 err = mlxsw_sp_traps_init(mlxsw_sp);
2845 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2846 goto err_rx_listener_register;
2849 err = mlxsw_sp_flood_init(mlxsw_sp);
2851 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2852 goto err_flood_init;
2855 err = mlxsw_sp_buffers_init(mlxsw_sp);
2857 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2858 goto err_buffers_init;
2861 err = mlxsw_sp_lag_init(mlxsw_sp);
2863 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2867 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2869 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2870 goto err_switchdev_init;
2873 err = mlxsw_sp_router_init(mlxsw_sp);
2875 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2876 goto err_router_init;
2879 err = mlxsw_sp_span_init(mlxsw_sp);
2881 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2885 err = mlxsw_sp_ports_create(mlxsw_sp);
2887 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2888 goto err_ports_create;
2894 mlxsw_sp_span_fini(mlxsw_sp);
2896 mlxsw_sp_router_fini(mlxsw_sp);
2898 mlxsw_sp_switchdev_fini(mlxsw_sp);
2901 mlxsw_sp_buffers_fini(mlxsw_sp);
2904 mlxsw_sp_traps_fini(mlxsw_sp);
2905 err_rx_listener_register:
2906 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2910 static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
2912 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2915 mlxsw_sp_ports_remove(mlxsw_sp);
2916 mlxsw_sp_span_fini(mlxsw_sp);
2917 mlxsw_sp_router_fini(mlxsw_sp);
2918 mlxsw_sp_switchdev_fini(mlxsw_sp);
2919 mlxsw_sp_buffers_fini(mlxsw_sp);
2920 mlxsw_sp_traps_fini(mlxsw_sp);
2921 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2922 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
2923 WARN_ON(!list_empty(&mlxsw_sp->fids));
2924 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2925 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
2928 static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2929 .used_max_vepa_channels = 1,
2930 .max_vepa_channels = 0,
2932 .max_lag = MLXSW_SP_LAG_MAX,
2933 .used_max_port_per_lag = 1,
2934 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
2936 .max_mid = MLXSW_SP_MID_MAX,
2939 .used_max_system_port = 1,
2940 .max_system_port = 64,
2941 .used_max_vlan_groups = 1,
2942 .max_vlan_groups = 127,
2943 .used_max_regions = 1,
2945 .used_flood_tables = 1,
2946 .used_flood_mode = 1,
2948 .max_fid_offset_flood_tables = 2,
2949 .fid_offset_flood_table_size = VLAN_N_VID - 1,
2950 .max_fid_flood_tables = 2,
2951 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
2952 .used_max_ib_mc = 1,
2956 .used_kvd_sizes = 1,
2957 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2958 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2959 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
2963 .type = MLXSW_PORT_SWID_TYPE_ETH,
2966 .resource_query_enable = 1,
2969 static struct mlxsw_driver mlxsw_sp_driver = {
2970 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2971 .owner = THIS_MODULE,
2972 .priv_size = sizeof(struct mlxsw_sp),
2973 .init = mlxsw_sp_init,
2974 .fini = mlxsw_sp_fini,
2975 .port_split = mlxsw_sp_port_split,
2976 .port_unsplit = mlxsw_sp_port_unsplit,
2977 .sb_pool_get = mlxsw_sp_sb_pool_get,
2978 .sb_pool_set = mlxsw_sp_sb_pool_set,
2979 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2980 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2981 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2982 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2983 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2984 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2985 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2986 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2987 .txhdr_construct = mlxsw_sp_txhdr_construct,
2988 .txhdr_len = MLXSW_TXHDR_LEN,
2989 .profile = &mlxsw_sp_config_profile,
2992 static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2994 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2997 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2999 struct net_device *lower_dev;
3000 struct list_head *iter;
3002 if (mlxsw_sp_port_dev_check(dev))
3003 return netdev_priv(dev);
3005 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
3006 if (mlxsw_sp_port_dev_check(lower_dev))
3007 return netdev_priv(lower_dev);
3012 static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3014 struct mlxsw_sp_port *mlxsw_sp_port;
3016 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3017 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3020 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3022 struct net_device *lower_dev;
3023 struct list_head *iter;
3025 if (mlxsw_sp_port_dev_check(dev))
3026 return netdev_priv(dev);
3028 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
3029 if (mlxsw_sp_port_dev_check(lower_dev))
3030 return netdev_priv(lower_dev);
3035 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3037 struct mlxsw_sp_port *mlxsw_sp_port;
3040 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3042 dev_hold(mlxsw_sp_port->dev);
3044 return mlxsw_sp_port;
3047 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3049 dev_put(mlxsw_sp_port->dev);
3052 static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3053 unsigned long event)
3062 if (r && --r->ref_count == 0)
3064 /* It is possible we already removed the RIF ourselves
3065 * if it was assigned to a netdev that is now a bridge
3074 static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3078 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3079 if (!mlxsw_sp->rifs[i])
3082 return MLXSW_SP_RIF_MAX;
3085 static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3086 bool *p_lagged, u16 *p_system_port)
3088 u8 local_port = mlxsw_sp_vport->local_port;
3090 *p_lagged = mlxsw_sp_vport->lagged;
3091 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3094 static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3095 struct net_device *l3_dev, u16 rif,
3098 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3099 bool lagged = mlxsw_sp_vport->lagged;
3100 char ritr_pl[MLXSW_REG_RITR_LEN];
3103 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3104 l3_dev->mtu, l3_dev->dev_addr);
3106 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3107 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3108 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3110 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3113 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3115 static struct mlxsw_sp_fid *
3116 mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3118 struct mlxsw_sp_fid *f;
3120 f = kzalloc(sizeof(*f), GFP_KERNEL);
3124 f->leave = mlxsw_sp_vport_rif_sp_leave;
3132 static struct mlxsw_sp_rif *
3133 mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3135 struct mlxsw_sp_rif *r;
3137 r = kzalloc(sizeof(*r), GFP_KERNEL);
3141 ether_addr_copy(r->addr, l3_dev->dev_addr);
3142 r->mtu = l3_dev->mtu;
3151 static struct mlxsw_sp_rif *
3152 mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3153 struct net_device *l3_dev)
3155 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3156 struct mlxsw_sp_fid *f;
3157 struct mlxsw_sp_rif *r;
3161 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3162 if (rif == MLXSW_SP_RIF_MAX)
3163 return ERR_PTR(-ERANGE);
3165 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3167 return ERR_PTR(err);
3169 fid = mlxsw_sp_rif_sp_to_fid(rif);
3170 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3172 goto err_rif_fdb_op;
3174 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3177 goto err_rfid_alloc;
3180 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3187 mlxsw_sp->rifs[rif] = r;
3194 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3196 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3197 return ERR_PTR(err);
3200 static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3201 struct mlxsw_sp_rif *r)
3203 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3204 struct net_device *l3_dev = r->dev;
3205 struct mlxsw_sp_fid *f = r->f;
3209 mlxsw_sp->rifs[rif] = NULL;
3216 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3218 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3221 static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3222 struct net_device *l3_dev)
3224 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3225 struct mlxsw_sp_rif *r;
3227 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3229 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3234 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3237 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3242 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3244 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3246 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3248 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3249 if (--f->ref_count == 0)
3250 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3253 static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3254 struct net_device *port_dev,
3255 unsigned long event, u16 vid)
3257 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3258 struct mlxsw_sp_port *mlxsw_sp_vport;
3260 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3261 if (WARN_ON(!mlxsw_sp_vport))
3266 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3268 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3275 static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3276 unsigned long event)
3278 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3281 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3284 static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3285 struct net_device *lag_dev,
3286 unsigned long event, u16 vid)
3288 struct net_device *port_dev;
3289 struct list_head *iter;
3292 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3293 if (mlxsw_sp_port_dev_check(port_dev)) {
3294 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3304 static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3305 unsigned long event)
3307 if (netif_is_bridge_port(lag_dev))
3310 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3313 static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3314 struct net_device *l3_dev)
3318 if (is_vlan_dev(l3_dev))
3319 fid = vlan_dev_vlan_id(l3_dev);
3320 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3323 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3325 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3328 static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3330 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3331 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3334 static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3336 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3339 static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3342 enum mlxsw_flood_table_type table_type;
3347 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3351 table_type = mlxsw_sp_flood_table_type_get(fid);
3352 index = mlxsw_sp_flood_table_index_get(fid);
3353 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3354 1, MLXSW_PORT_ROUTER_PORT, set);
3355 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3361 static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3363 if (mlxsw_sp_fid_is_vfid(fid))
3364 return MLXSW_REG_RITR_FID_IF;
3366 return MLXSW_REG_RITR_VLAN_IF;
3369 static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3370 struct net_device *l3_dev,
3374 enum mlxsw_reg_ritr_if_type rif_type;
3375 char ritr_pl[MLXSW_REG_RITR_LEN];
3377 rif_type = mlxsw_sp_rif_type_get(fid);
3378 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3380 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3382 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3385 static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3386 struct net_device *l3_dev,
3387 struct mlxsw_sp_fid *f)
3389 struct mlxsw_sp_rif *r;
3393 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3394 if (rif == MLXSW_SP_RIF_MAX)
3397 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
3401 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3403 goto err_rif_bridge_op;
3405 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3407 goto err_rif_fdb_op;
3409 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3416 mlxsw_sp->rifs[rif] = r;
3418 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3423 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3425 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3427 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3431 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3432 struct mlxsw_sp_rif *r)
3434 struct net_device *l3_dev = r->dev;
3435 struct mlxsw_sp_fid *f = r->f;
3438 mlxsw_sp->rifs[rif] = NULL;
3443 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3445 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3447 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3449 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3452 static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3453 struct net_device *br_dev,
3454 unsigned long event)
3456 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3457 struct mlxsw_sp_fid *f;
3459 /* FID can either be an actual FID if the L3 device is the
3460 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3461 * L3 device is a VLAN-unaware bridge and we get a vFID.
3463 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3469 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3471 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3478 static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3479 unsigned long event)
3481 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3482 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
3483 u16 vid = vlan_dev_vlan_id(vlan_dev);
3485 if (mlxsw_sp_port_dev_check(real_dev))
3486 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3488 else if (netif_is_lag_master(real_dev))
3489 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3491 else if (netif_is_bridge_master(real_dev) &&
3492 mlxsw_sp->master_bridge.dev == real_dev)
3493 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3499 static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3500 unsigned long event, void *ptr)
3502 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3503 struct net_device *dev = ifa->ifa_dev->dev;
3504 struct mlxsw_sp *mlxsw_sp;
3505 struct mlxsw_sp_rif *r;
3508 mlxsw_sp = mlxsw_sp_lower_get(dev);
3512 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3513 if (!mlxsw_sp_rif_should_config(r, event))
3516 if (mlxsw_sp_port_dev_check(dev))
3517 err = mlxsw_sp_inetaddr_port_event(dev, event);
3518 else if (netif_is_lag_master(dev))
3519 err = mlxsw_sp_inetaddr_lag_event(dev, event);
3520 else if (netif_is_bridge_master(dev))
3521 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
3522 else if (is_vlan_dev(dev))
3523 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3526 return notifier_from_errno(err);
3529 static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3530 const char *mac, int mtu)
3532 char ritr_pl[MLXSW_REG_RITR_LEN];
3535 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3536 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3540 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3541 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3542 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3543 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3546 static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3548 struct mlxsw_sp *mlxsw_sp;
3549 struct mlxsw_sp_rif *r;
3552 mlxsw_sp = mlxsw_sp_lower_get(dev);
3556 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3560 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3564 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3568 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3570 goto err_rif_fdb_op;
3572 ether_addr_copy(r->addr, dev->dev_addr);
3575 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3580 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3582 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3586 static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3589 if (mlxsw_sp_fid_is_vfid(fid))
3590 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3592 return test_bit(fid, lag_port->active_vlans);
3595 static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3598 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3599 u8 local_port = mlxsw_sp_port->local_port;
3600 u16 lag_id = mlxsw_sp_port->lag_id;
3603 if (!mlxsw_sp_port->lagged)
3606 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3607 struct mlxsw_sp_port *lag_port;
3609 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3610 if (!lag_port || lag_port->local_port == local_port)
3612 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3620 mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3623 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3624 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3626 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3627 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3628 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3629 mlxsw_sp_port->local_port);
3631 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3632 mlxsw_sp_port->local_port, fid);
3634 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3638 mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3641 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3642 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3644 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3645 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3646 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3648 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3649 mlxsw_sp_port->lag_id, fid);
3651 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3654 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
3656 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3659 if (mlxsw_sp_port->lagged)
3660 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
3663 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
3666 static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3668 struct mlxsw_sp_fid *f, *tmp;
3670 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3671 if (--f->ref_count == 0)
3672 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3677 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3678 struct net_device *br_dev)
3680 return !mlxsw_sp->master_bridge.dev ||
3681 mlxsw_sp->master_bridge.dev == br_dev;
3684 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3685 struct net_device *br_dev)
3687 mlxsw_sp->master_bridge.dev = br_dev;
3688 mlxsw_sp->master_bridge.ref_count++;
3691 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3693 if (--mlxsw_sp->master_bridge.ref_count == 0) {
3694 mlxsw_sp->master_bridge.dev = NULL;
3695 /* It's possible upper VLAN devices are still holding
3696 * references to underlying FIDs. Drop the reference
3697 * and release the resources if it was the last one.
3698 * If it wasn't, then something bad happened.
3700 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3704 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3705 struct net_device *br_dev)
3707 struct net_device *dev = mlxsw_sp_port->dev;
3710 /* When port is not bridged untagged packets are tagged with
3711 * PVID=VID=1, thereby creating an implicit VLAN interface in
3712 * the device. Remove it and let bridge code take care of its
3715 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
3719 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3721 mlxsw_sp_port->learning = 1;
3722 mlxsw_sp_port->learning_sync = 1;
3723 mlxsw_sp_port->uc_flood = 1;
3724 mlxsw_sp_port->bridged = 1;
3729 static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3731 struct net_device *dev = mlxsw_sp_port->dev;
3733 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3735 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3737 mlxsw_sp_port->learning = 0;
3738 mlxsw_sp_port->learning_sync = 0;
3739 mlxsw_sp_port->uc_flood = 0;
3740 mlxsw_sp_port->bridged = 0;
3742 /* Add implicit VLAN interface in the device, so that untagged
3743 * packets will be classified to the default vFID.
3745 mlxsw_sp_port_add_vid(dev, 0, 1);
3748 static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3750 char sldr_pl[MLXSW_REG_SLDR_LEN];
3752 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3753 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3756 static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3758 char sldr_pl[MLXSW_REG_SLDR_LEN];
3760 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3761 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3764 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3765 u16 lag_id, u8 port_index)
3767 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3768 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3770 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3771 lag_id, port_index);
3772 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3775 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3778 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3779 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3781 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3783 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3786 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3789 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3790 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3792 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3794 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3797 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3800 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3801 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3803 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3805 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3808 static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3809 struct net_device *lag_dev,
3812 struct mlxsw_sp_upper *lag;
3813 int free_lag_id = -1;
3816 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3817 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3818 if (lag->ref_count) {
3819 if (lag->dev == lag_dev) {
3823 } else if (free_lag_id < 0) {
3827 if (free_lag_id < 0)
3829 *p_lag_id = free_lag_id;
3834 mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3835 struct net_device *lag_dev,
3836 struct netdev_lag_upper_info *lag_upper_info)
3840 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3842 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3847 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3848 u16 lag_id, u8 *p_port_index)
3852 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3853 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3862 mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3865 struct mlxsw_sp_port *mlxsw_sp_vport;
3866 struct mlxsw_sp_fid *f;
3868 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3869 if (WARN_ON(!mlxsw_sp_vport))
3872 /* If vPort is assigned a RIF, then leave it since it's no
3875 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3877 f->leave(mlxsw_sp_vport);
3879 mlxsw_sp_vport->lag_id = lag_id;
3880 mlxsw_sp_vport->lagged = 1;
3884 mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3886 struct mlxsw_sp_port *mlxsw_sp_vport;
3887 struct mlxsw_sp_fid *f;
3889 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3890 if (WARN_ON(!mlxsw_sp_vport))
3893 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3895 f->leave(mlxsw_sp_vport);
3897 mlxsw_sp_vport->lagged = 0;
3900 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3901 struct net_device *lag_dev)
3903 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3904 struct mlxsw_sp_upper *lag;
3909 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3912 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3913 if (!lag->ref_count) {
3914 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3920 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3923 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3925 goto err_col_port_add;
3926 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3928 goto err_col_port_enable;
3930 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3931 mlxsw_sp_port->local_port);
3932 mlxsw_sp_port->lag_id = lag_id;
3933 mlxsw_sp_port->lagged = 1;
3936 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3940 err_col_port_enable:
3941 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
3943 if (!lag->ref_count)
3944 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
3948 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3949 struct net_device *lag_dev)
3951 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3952 u16 lag_id = mlxsw_sp_port->lag_id;
3953 struct mlxsw_sp_upper *lag;
3955 if (!mlxsw_sp_port->lagged)
3957 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3958 WARN_ON(lag->ref_count == 0);
3960 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3961 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
3963 if (mlxsw_sp_port->bridged) {
3964 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
3965 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
3968 if (lag->ref_count == 1)
3969 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
3971 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3972 mlxsw_sp_port->local_port);
3973 mlxsw_sp_port->lagged = 0;
3976 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
3979 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3982 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3983 char sldr_pl[MLXSW_REG_SLDR_LEN];
3985 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3986 mlxsw_sp_port->local_port);
3987 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3990 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3993 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3994 char sldr_pl[MLXSW_REG_SLDR_LEN];
3996 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3997 mlxsw_sp_port->local_port);
3998 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4001 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4002 bool lag_tx_enabled)
4005 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4006 mlxsw_sp_port->lag_id);
4008 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4009 mlxsw_sp_port->lag_id);
4012 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4013 struct netdev_lag_lower_state_info *info)
4015 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4018 static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4019 struct net_device *vlan_dev)
4021 struct mlxsw_sp_port *mlxsw_sp_vport;
4022 u16 vid = vlan_dev_vlan_id(vlan_dev);
4024 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4025 if (WARN_ON(!mlxsw_sp_vport))
4028 mlxsw_sp_vport->dev = vlan_dev;
4033 static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4034 struct net_device *vlan_dev)
4036 struct mlxsw_sp_port *mlxsw_sp_vport;
4037 u16 vid = vlan_dev_vlan_id(vlan_dev);
4039 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4040 if (WARN_ON(!mlxsw_sp_vport))
4043 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
4046 static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4047 unsigned long event, void *ptr)
4049 struct netdev_notifier_changeupper_info *info;
4050 struct mlxsw_sp_port *mlxsw_sp_port;
4051 struct net_device *upper_dev;
4052 struct mlxsw_sp *mlxsw_sp;
4055 mlxsw_sp_port = netdev_priv(dev);
4056 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4060 case NETDEV_PRECHANGEUPPER:
4061 upper_dev = info->upper_dev;
4062 if (!is_vlan_dev(upper_dev) &&
4063 !netif_is_lag_master(upper_dev) &&
4064 !netif_is_bridge_master(upper_dev))
4068 /* HW limitation forbids to put ports to multiple bridges. */
4069 if (netif_is_bridge_master(upper_dev) &&
4070 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
4072 if (netif_is_lag_master(upper_dev) &&
4073 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4076 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4078 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4079 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4082 case NETDEV_CHANGEUPPER:
4083 upper_dev = info->upper_dev;
4084 if (is_vlan_dev(upper_dev)) {
4086 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4089 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4091 } else if (netif_is_bridge_master(upper_dev)) {
4093 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4096 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
4097 } else if (netif_is_lag_master(upper_dev)) {
4099 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4102 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4114 static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4115 unsigned long event, void *ptr)
4117 struct netdev_notifier_changelowerstate_info *info;
4118 struct mlxsw_sp_port *mlxsw_sp_port;
4121 mlxsw_sp_port = netdev_priv(dev);
4125 case NETDEV_CHANGELOWERSTATE:
4126 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4127 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4128 info->lower_state_info);
4130 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4138 static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4139 unsigned long event, void *ptr)
4142 case NETDEV_PRECHANGEUPPER:
4143 case NETDEV_CHANGEUPPER:
4144 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4145 case NETDEV_CHANGELOWERSTATE:
4146 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4152 static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4153 unsigned long event, void *ptr)
4155 struct net_device *dev;
4156 struct list_head *iter;
4159 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4160 if (mlxsw_sp_port_dev_check(dev)) {
4161 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4170 static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4171 struct net_device *vlan_dev)
4173 u16 fid = vlan_dev_vlan_id(vlan_dev);
4174 struct mlxsw_sp_fid *f;
4176 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4178 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4188 static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4189 struct net_device *vlan_dev)
4191 u16 fid = vlan_dev_vlan_id(vlan_dev);
4192 struct mlxsw_sp_fid *f;
4194 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4196 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4197 if (f && --f->ref_count == 0)
4198 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4201 static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4202 unsigned long event, void *ptr)
4204 struct netdev_notifier_changeupper_info *info;
4205 struct net_device *upper_dev;
4206 struct mlxsw_sp *mlxsw_sp;
4209 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4212 if (br_dev != mlxsw_sp->master_bridge.dev)
4218 case NETDEV_CHANGEUPPER:
4219 upper_dev = info->upper_dev;
4220 if (!is_vlan_dev(upper_dev))
4222 if (info->linking) {
4223 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4228 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4236 static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
4238 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
4242 static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4244 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4246 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4247 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
4250 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
4252 static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4253 struct net_device *br_dev)
4255 struct device *dev = mlxsw_sp->bus_info->dev;
4256 struct mlxsw_sp_fid *f;
4260 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
4261 if (vfid == MLXSW_SP_VFID_MAX) {
4262 dev_err(dev, "No available vFIDs\n");
4263 return ERR_PTR(-ERANGE);
4266 fid = mlxsw_sp_vfid_to_fid(vfid);
4267 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
4269 dev_err(dev, "Failed to create FID=%d\n", fid);
4270 return ERR_PTR(err);
4273 f = kzalloc(sizeof(*f), GFP_KERNEL);
4275 goto err_allocate_vfid;
4277 f->leave = mlxsw_sp_vport_vfid_leave;
4281 list_add(&f->list, &mlxsw_sp->vfids.list);
4282 set_bit(vfid, mlxsw_sp->vfids.mapped);
4287 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4288 return ERR_PTR(-ENOMEM);
4291 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4292 struct mlxsw_sp_fid *f)
4294 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
4297 clear_bit(vfid, mlxsw_sp->vfids.mapped);
4301 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
4305 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
4308 static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4311 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4312 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4314 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4318 static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4319 struct net_device *br_dev)
4321 struct mlxsw_sp_fid *f;
4324 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
4326 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
4331 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4333 goto err_vport_flood_set;
4335 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4337 goto err_vport_fid_map;
4339 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
4342 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4347 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4348 err_vport_flood_set:
4350 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4354 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4356 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4358 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4360 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4362 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4364 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4366 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
4367 if (--f->ref_count == 0)
4368 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
4371 static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4372 struct net_device *br_dev)
4374 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4375 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4376 struct net_device *dev = mlxsw_sp_vport->dev;
4379 if (f && !WARN_ON(!f->leave))
4380 f->leave(mlxsw_sp_vport);
4382 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
4384 netdev_err(dev, "Failed to join vFID\n");
4388 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4390 netdev_err(dev, "Failed to enable learning\n");
4391 goto err_port_vid_learning_set;
4394 mlxsw_sp_vport->learning = 1;
4395 mlxsw_sp_vport->learning_sync = 1;
4396 mlxsw_sp_vport->uc_flood = 1;
4397 mlxsw_sp_vport->bridged = 1;
4401 err_port_vid_learning_set:
4402 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4406 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
4408 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4410 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4412 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
4414 mlxsw_sp_vport->learning = 0;
4415 mlxsw_sp_vport->learning_sync = 0;
4416 mlxsw_sp_vport->uc_flood = 0;
4417 mlxsw_sp_vport->bridged = 0;
4421 mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4422 const struct net_device *br_dev)
4424 struct mlxsw_sp_port *mlxsw_sp_vport;
4426 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4428 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
4430 if (dev && dev == br_dev)
4437 static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4438 unsigned long event, void *ptr,
4441 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4442 struct netdev_notifier_changeupper_info *info = ptr;
4443 struct mlxsw_sp_port *mlxsw_sp_vport;
4444 struct net_device *upper_dev;
4447 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4450 case NETDEV_PRECHANGEUPPER:
4451 upper_dev = info->upper_dev;
4452 if (!netif_is_bridge_master(upper_dev))
4456 /* We can't have multiple VLAN interfaces configured on
4457 * the same port and being members in the same bridge.
4459 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4463 case NETDEV_CHANGEUPPER:
4464 upper_dev = info->upper_dev;
4465 if (info->linking) {
4466 if (WARN_ON(!mlxsw_sp_vport))
4468 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4471 if (!mlxsw_sp_vport)
4473 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
4480 static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4481 unsigned long event, void *ptr,
4484 struct net_device *dev;
4485 struct list_head *iter;
4488 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4489 if (mlxsw_sp_port_dev_check(dev)) {
4490 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4500 static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4501 unsigned long event, void *ptr)
4503 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4504 u16 vid = vlan_dev_vlan_id(vlan_dev);
4506 if (mlxsw_sp_port_dev_check(real_dev))
4507 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4509 else if (netif_is_lag_master(real_dev))
4510 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4516 static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4517 unsigned long event, void *ptr)
4519 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
4522 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4523 err = mlxsw_sp_netdevice_router_port_event(dev);
4524 else if (mlxsw_sp_port_dev_check(dev))
4525 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4526 else if (netif_is_lag_master(dev))
4527 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
4528 else if (netif_is_bridge_master(dev))
4529 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
4530 else if (is_vlan_dev(dev))
4531 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
4533 return notifier_from_errno(err);
4536 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4537 .notifier_call = mlxsw_sp_netdevice_event,
4540 static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4541 .notifier_call = mlxsw_sp_inetaddr_event,
4542 .priority = 10, /* Must be called before FIB notifier block */
4545 static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4546 .notifier_call = mlxsw_sp_router_netevent_event,
4549 static int __init mlxsw_sp_module_init(void)
4553 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4554 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4555 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4557 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4559 goto err_core_driver_register;
4562 err_core_driver_register:
4563 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4564 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4565 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4569 static void __exit mlxsw_sp_module_exit(void)
4571 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
4572 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4573 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
4574 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4577 module_init(mlxsw_sp_module_init);
4578 module_exit(mlxsw_sp_module_exit);
4580 MODULE_LICENSE("Dual BSD/GPL");
4581 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4582 MODULE_DESCRIPTION("Mellanox Spectrum driver");
4583 MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);