1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <linux/firmware.h>
24 #include <asm/byteorder.h>
25 #include <net/devlink.h>
26 #include <trace/events/devlink.h>
36 #include "resources.h"
37 #include "../mlxfw/mlxfw.h"
39 static LIST_HEAD(mlxsw_core_driver_list);
40 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
42 static const char mlxsw_core_driver_name[] = "mlxsw_core";
44 static struct workqueue_struct *mlxsw_wq;
45 static struct workqueue_struct *mlxsw_owq;
47 struct mlxsw_core_port {
48 struct devlink_port devlink_port;
49 void *port_driver_priv;
53 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
55 return mlxsw_core_port->port_driver_priv;
57 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
59 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
61 return mlxsw_core_port->port_driver_priv != NULL;
65 struct mlxsw_driver *driver;
66 const struct mlxsw_bus *bus;
68 const struct mlxsw_bus_info *bus_info;
69 struct workqueue_struct *emad_wq;
70 struct list_head rx_listener_list;
71 struct list_head event_listener_list;
74 struct list_head trans_list;
75 spinlock_t trans_list_lock; /* protects trans_list writes */
77 bool enable_string_tlv;
80 u8 *mapping; /* lag_id+port_index to local_port mapping */
83 struct mlxsw_hwmon *hwmon;
84 struct mlxsw_thermal *thermal;
85 struct mlxsw_core_port *ports;
86 unsigned int max_ports;
87 bool fw_flash_in_progress;
89 struct devlink_health_reporter *fw_fatal;
91 struct mlxsw_env *env;
92 bool is_initialized; /* Denotes if core was already initialized. */
93 unsigned long driver_priv[];
94 /* driver_priv has to be always the last item */
97 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40
99 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core)
101 /* Switch ports are numbered from 1 to queried value */
102 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
103 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
104 MAX_SYSTEM_PORT) + 1;
106 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
108 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
109 sizeof(struct mlxsw_core_port), GFP_KERNEL);
110 if (!mlxsw_core->ports)
116 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core)
118 kfree(mlxsw_core->ports);
121 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
123 return mlxsw_core->max_ports;
125 EXPORT_SYMBOL(mlxsw_core_max_ports);
127 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
129 return mlxsw_core->driver_priv;
131 EXPORT_SYMBOL(mlxsw_core_driver_priv);
133 bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core)
135 return mlxsw_core->driver->res_query_enabled;
137 EXPORT_SYMBOL(mlxsw_core_res_query_enabled);
139 bool mlxsw_core_temp_warn_enabled(const struct mlxsw_core *mlxsw_core)
141 return mlxsw_core->driver->temp_warn_enabled;
145 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
146 const struct mlxsw_fw_rev *req_rev)
148 return rev->minor > req_rev->minor ||
149 (rev->minor == req_rev->minor &&
150 rev->subminor >= req_rev->subminor);
152 EXPORT_SYMBOL(mlxsw_core_fw_rev_minor_subminor_validate);
154 struct mlxsw_rx_listener_item {
155 struct list_head list;
156 struct mlxsw_rx_listener rxl;
161 struct mlxsw_event_listener_item {
162 struct list_head list;
163 struct mlxsw_event_listener el;
172 * Destination MAC in EMAD's Ethernet header.
173 * Must be set to 01:02:c9:00:00:01
175 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
178 * Source MAC in EMAD's Ethernet header.
179 * Must be set to 00:02:c9:01:02:03
181 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
183 /* emad_eth_hdr_ethertype
184 * Ethertype in EMAD's Ethernet header.
185 * Must be set to 0x8932
187 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
189 /* emad_eth_hdr_mlx_proto
191 * Must be set to 0x0.
193 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
196 * Mellanox protocol version.
197 * Must be set to 0x0.
199 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
203 * Must be set to 0x1 (operation TLV).
205 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
208 * Length of the operation TLV in u32.
209 * Must be set to 0x4.
211 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
214 * Direct route bit. Setting to 1 indicates the EMAD is a direct route
215 * EMAD. DR TLV must follow.
217 * Note: Currently not supported and must not be set.
219 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
221 /* emad_op_tlv_status
222 * Returned status in case of EMAD response. Must be set to 0 in case
225 * 0x1 - device is busy. Requester should retry
226 * 0x2 - Mellanox protocol version not supported
228 * 0x4 - register not supported
229 * 0x5 - operation class not supported
230 * 0x6 - EMAD method not supported
231 * 0x7 - bad parameter (e.g. port out of range)
232 * 0x8 - resource not available
233 * 0x9 - message receipt acknowledgment. Requester should retry
234 * 0x70 - internal error
236 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
238 /* emad_op_tlv_register_id
239 * Register ID of register within register TLV.
241 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
244 * Response bit. Setting to 1 indicates Response, otherwise request.
246 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
248 /* emad_op_tlv_method
252 * 0x3 - send (currently not supported)
255 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
258 * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
260 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
263 * EMAD transaction ID. Used for pairing request and response EMADs.
265 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
267 /* emad_string_tlv_type
269 * Must be set to 0x2 (string TLV).
271 MLXSW_ITEM32(emad, string_tlv, type, 0x00, 27, 5);
273 /* emad_string_tlv_len
274 * Length of the string TLV in u32.
276 MLXSW_ITEM32(emad, string_tlv, len, 0x00, 16, 11);
278 #define MLXSW_EMAD_STRING_TLV_STRING_LEN 128
280 /* emad_string_tlv_string
281 * String provided by the device's firmware in case of erroneous register access
283 MLXSW_ITEM_BUF(emad, string_tlv, string, 0x04,
284 MLXSW_EMAD_STRING_TLV_STRING_LEN);
288 * Must be set to 0x3 (register TLV).
290 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
293 * Length of the operation TLV in u32.
295 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
299 * Must be set to 0x0 (end TLV).
301 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
304 * Length of the end TLV in u32.
307 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
309 enum mlxsw_core_reg_access_type {
310 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
311 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
314 static inline const char *
315 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
318 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
320 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
326 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
328 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
329 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
332 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
333 const struct mlxsw_reg_info *reg,
336 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
337 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
338 memcpy(reg_tlv + sizeof(u32), payload, reg->len);
341 static void mlxsw_emad_pack_string_tlv(char *string_tlv)
343 mlxsw_emad_string_tlv_type_set(string_tlv, MLXSW_EMAD_TLV_TYPE_STRING);
344 mlxsw_emad_string_tlv_len_set(string_tlv, MLXSW_EMAD_STRING_TLV_LEN);
347 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
348 const struct mlxsw_reg_info *reg,
349 enum mlxsw_core_reg_access_type type,
352 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
353 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
354 mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
355 mlxsw_emad_op_tlv_status_set(op_tlv, 0);
356 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
357 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
358 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
359 mlxsw_emad_op_tlv_method_set(op_tlv,
360 MLXSW_EMAD_OP_TLV_METHOD_QUERY);
362 mlxsw_emad_op_tlv_method_set(op_tlv,
363 MLXSW_EMAD_OP_TLV_METHOD_WRITE);
364 mlxsw_emad_op_tlv_class_set(op_tlv,
365 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
366 mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
369 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
371 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
373 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
374 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
375 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
376 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
377 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
379 skb_reset_mac_header(skb);
384 static void mlxsw_emad_construct(struct sk_buff *skb,
385 const struct mlxsw_reg_info *reg,
387 enum mlxsw_core_reg_access_type type,
388 u64 tid, bool enable_string_tlv)
392 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
393 mlxsw_emad_pack_end_tlv(buf);
395 buf = skb_push(skb, reg->len + sizeof(u32));
396 mlxsw_emad_pack_reg_tlv(buf, reg, payload);
398 if (enable_string_tlv) {
399 buf = skb_push(skb, MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32));
400 mlxsw_emad_pack_string_tlv(buf);
403 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
404 mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
406 mlxsw_emad_construct_eth_hdr(skb);
409 struct mlxsw_emad_tlv_offsets {
415 static bool mlxsw_emad_tlv_is_string_tlv(const char *tlv)
417 u8 tlv_type = mlxsw_emad_string_tlv_type_get(tlv);
419 return tlv_type == MLXSW_EMAD_TLV_TYPE_STRING;
422 static void mlxsw_emad_tlv_parse(struct sk_buff *skb)
424 struct mlxsw_emad_tlv_offsets *offsets =
425 (struct mlxsw_emad_tlv_offsets *) skb->cb;
427 offsets->op_tlv = MLXSW_EMAD_ETH_HDR_LEN;
428 offsets->string_tlv = 0;
429 offsets->reg_tlv = MLXSW_EMAD_ETH_HDR_LEN +
430 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
432 /* If string TLV is present, it must come after the operation TLV. */
433 if (mlxsw_emad_tlv_is_string_tlv(skb->data + offsets->reg_tlv)) {
434 offsets->string_tlv = offsets->reg_tlv;
435 offsets->reg_tlv += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);
439 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
441 struct mlxsw_emad_tlv_offsets *offsets =
442 (struct mlxsw_emad_tlv_offsets *) skb->cb;
444 return ((char *) (skb->data + offsets->op_tlv));
447 static char *mlxsw_emad_string_tlv(const struct sk_buff *skb)
449 struct mlxsw_emad_tlv_offsets *offsets =
450 (struct mlxsw_emad_tlv_offsets *) skb->cb;
452 if (!offsets->string_tlv)
455 return ((char *) (skb->data + offsets->string_tlv));
458 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
460 struct mlxsw_emad_tlv_offsets *offsets =
461 (struct mlxsw_emad_tlv_offsets *) skb->cb;
463 return ((char *) (skb->data + offsets->reg_tlv));
466 static char *mlxsw_emad_reg_payload(const char *reg_tlv)
468 return ((char *) (reg_tlv + sizeof(u32)));
471 static char *mlxsw_emad_reg_payload_cmd(const char *mbox)
473 return ((char *) (mbox + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
476 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
480 op_tlv = mlxsw_emad_op_tlv(skb);
481 return mlxsw_emad_op_tlv_tid_get(op_tlv);
484 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
488 op_tlv = mlxsw_emad_op_tlv(skb);
489 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
492 static int mlxsw_emad_process_status(char *op_tlv,
493 enum mlxsw_emad_op_tlv_status *p_status)
495 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
498 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
500 case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
501 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
503 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
504 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
505 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
506 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
507 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
508 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
509 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
510 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
517 mlxsw_emad_process_status_skb(struct sk_buff *skb,
518 enum mlxsw_emad_op_tlv_status *p_status)
520 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
523 struct mlxsw_reg_trans {
524 struct list_head list;
525 struct list_head bulk_list;
526 struct mlxsw_core *core;
527 struct sk_buff *tx_skb;
528 struct mlxsw_tx_info tx_info;
529 struct delayed_work timeout_dw;
530 unsigned int retries;
532 struct completion completion;
534 mlxsw_reg_trans_cb_t *cb;
535 unsigned long cb_priv;
536 const struct mlxsw_reg_info *reg;
537 enum mlxsw_core_reg_access_type type;
539 char *emad_err_string;
540 enum mlxsw_emad_op_tlv_status emad_status;
544 static void mlxsw_emad_process_string_tlv(const struct sk_buff *skb,
545 struct mlxsw_reg_trans *trans)
550 string_tlv = mlxsw_emad_string_tlv(skb);
554 trans->emad_err_string = kzalloc(MLXSW_EMAD_STRING_TLV_STRING_LEN,
556 if (!trans->emad_err_string)
559 string = mlxsw_emad_string_tlv_string_data(string_tlv);
560 strlcpy(trans->emad_err_string, string,
561 MLXSW_EMAD_STRING_TLV_STRING_LEN);
564 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000
565 #define MLXSW_EMAD_TIMEOUT_MS 200
567 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
569 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
571 if (trans->core->fw_flash_in_progress)
572 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
574 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout);
577 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
578 struct mlxsw_reg_trans *trans)
583 skb = skb_copy(trans->tx_skb, GFP_KERNEL);
587 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
588 skb->data + mlxsw_core->driver->txhdr_len,
589 skb->len - mlxsw_core->driver->txhdr_len);
591 atomic_set(&trans->active, 1);
592 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
597 mlxsw_emad_trans_timeout_schedule(trans);
601 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
603 struct mlxsw_core *mlxsw_core = trans->core;
605 dev_kfree_skb(trans->tx_skb);
606 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
607 list_del_rcu(&trans->list);
608 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
610 complete(&trans->completion);
613 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
614 struct mlxsw_reg_trans *trans)
618 if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
620 err = mlxsw_emad_transmit(trans->core, trans);
626 mlxsw_emad_trans_finish(trans, err);
629 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
631 struct mlxsw_reg_trans *trans = container_of(work,
632 struct mlxsw_reg_trans,
635 if (!atomic_dec_and_test(&trans->active))
638 mlxsw_emad_transmit_retry(trans->core, trans);
641 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
642 struct mlxsw_reg_trans *trans,
647 if (!atomic_dec_and_test(&trans->active))
650 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
651 if (err == -EAGAIN) {
652 mlxsw_emad_transmit_retry(mlxsw_core, trans);
655 char *reg_tlv = mlxsw_emad_reg_tlv(skb);
658 trans->cb(mlxsw_core,
659 mlxsw_emad_reg_payload(reg_tlv),
660 trans->reg->len, trans->cb_priv);
662 mlxsw_emad_process_string_tlv(skb, trans);
664 mlxsw_emad_trans_finish(trans, err);
668 /* called with rcu read lock held */
669 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
672 struct mlxsw_core *mlxsw_core = priv;
673 struct mlxsw_reg_trans *trans;
675 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
676 skb->data, skb->len);
678 mlxsw_emad_tlv_parse(skb);
680 if (!mlxsw_emad_is_resp(skb))
683 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
684 if (mlxsw_emad_get_tid(skb) == trans->tid) {
685 mlxsw_emad_process_response(mlxsw_core, trans, skb);
694 static const struct mlxsw_listener mlxsw_emad_rx_listener =
695 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
698 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
700 struct workqueue_struct *emad_wq;
704 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
707 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0);
710 mlxsw_core->emad_wq = emad_wq;
712 /* Set the upper 32 bits of the transaction ID field to a random
713 * number. This allows us to discard EMADs addressed to other
716 get_random_bytes(&tid, 4);
718 atomic64_set(&mlxsw_core->emad.tid, tid);
720 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
721 spin_lock_init(&mlxsw_core->emad.trans_list_lock);
723 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
726 goto err_trap_register;
728 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
730 goto err_emad_trap_set;
731 mlxsw_core->emad.use_emad = true;
736 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
739 destroy_workqueue(mlxsw_core->emad_wq);
743 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
746 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
749 mlxsw_core->emad.use_emad = false;
750 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
752 destroy_workqueue(mlxsw_core->emad_wq);
755 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
756 u16 reg_len, bool enable_string_tlv)
761 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
762 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
763 sizeof(u32) + mlxsw_core->driver->txhdr_len);
764 if (enable_string_tlv)
765 emad_len += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);
766 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
769 skb = netdev_alloc_skb(NULL, emad_len);
772 memset(skb->data, 0, emad_len);
773 skb_reserve(skb, emad_len);
778 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
779 const struct mlxsw_reg_info *reg,
781 enum mlxsw_core_reg_access_type type,
782 struct mlxsw_reg_trans *trans,
783 struct list_head *bulk_list,
784 mlxsw_reg_trans_cb_t *cb,
785 unsigned long cb_priv, u64 tid)
787 bool enable_string_tlv;
791 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
792 tid, reg->id, mlxsw_reg_id_str(reg->id),
793 mlxsw_core_reg_access_type_str(type));
795 /* Since this can be changed during emad_reg_access, read it once and
796 * use the value all the way.
798 enable_string_tlv = mlxsw_core->emad.enable_string_tlv;
800 skb = mlxsw_emad_alloc(mlxsw_core, reg->len, enable_string_tlv);
804 list_add_tail(&trans->bulk_list, bulk_list);
805 trans->core = mlxsw_core;
807 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
808 trans->tx_info.is_emad = true;
809 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
811 init_completion(&trans->completion);
813 trans->cb_priv = cb_priv;
817 mlxsw_emad_construct(skb, reg, payload, type, trans->tid,
819 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
821 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
822 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
823 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
824 err = mlxsw_emad_transmit(mlxsw_core, trans);
830 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
831 list_del_rcu(&trans->list);
832 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
833 list_del(&trans->bulk_list);
834 dev_kfree_skb(trans->tx_skb);
842 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
844 spin_lock(&mlxsw_core_driver_list_lock);
845 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
846 spin_unlock(&mlxsw_core_driver_list_lock);
849 EXPORT_SYMBOL(mlxsw_core_driver_register);
851 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
853 spin_lock(&mlxsw_core_driver_list_lock);
854 list_del(&mlxsw_driver->list);
855 spin_unlock(&mlxsw_core_driver_list_lock);
857 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
859 static struct mlxsw_driver *__driver_find(const char *kind)
861 struct mlxsw_driver *mlxsw_driver;
863 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
864 if (strcmp(mlxsw_driver->kind, kind) == 0)
870 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
872 struct mlxsw_driver *mlxsw_driver;
874 spin_lock(&mlxsw_core_driver_list_lock);
875 mlxsw_driver = __driver_find(kind);
876 spin_unlock(&mlxsw_core_driver_list_lock);
880 struct mlxsw_core_fw_info {
881 struct mlxfw_dev mlxfw_dev;
882 struct mlxsw_core *mlxsw_core;
885 static int mlxsw_core_fw_component_query(struct mlxfw_dev *mlxfw_dev,
886 u16 component_index, u32 *p_max_size,
887 u8 *p_align_bits, u16 *p_max_write_size)
889 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
890 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
891 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
892 char mcqi_pl[MLXSW_REG_MCQI_LEN];
895 mlxsw_reg_mcqi_pack(mcqi_pl, component_index);
896 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcqi), mcqi_pl);
899 mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits, p_max_write_size);
901 *p_align_bits = max_t(u8, *p_align_bits, 2);
902 *p_max_write_size = min_t(u16, *p_max_write_size, MLXSW_REG_MCDA_MAX_DATA_LEN);
906 static int mlxsw_core_fw_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle)
908 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
909 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
910 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
911 char mcc_pl[MLXSW_REG_MCC_LEN];
915 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0);
916 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
920 mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state);
921 if (control_state != MLXFW_FSM_STATE_IDLE)
924 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE, 0, *fwhandle, 0);
925 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
928 static int mlxsw_core_fw_fsm_component_update(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
929 u16 component_index, u32 component_size)
931 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
932 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
933 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
934 char mcc_pl[MLXSW_REG_MCC_LEN];
936 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT,
937 component_index, fwhandle, component_size);
938 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
941 static int mlxsw_core_fw_fsm_block_download(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
942 u8 *data, u16 size, u32 offset)
944 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
945 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
946 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
947 char mcda_pl[MLXSW_REG_MCDA_LEN];
949 mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data);
950 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl);
953 static int mlxsw_core_fw_fsm_component_verify(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
956 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
957 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
958 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
959 char mcc_pl[MLXSW_REG_MCC_LEN];
961 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT,
962 component_index, fwhandle, 0);
963 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
966 static int mlxsw_core_fw_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
968 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
969 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
970 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
971 char mcc_pl[MLXSW_REG_MCC_LEN];
973 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0, fwhandle, 0);
974 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
977 static int mlxsw_core_fw_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
978 enum mlxfw_fsm_state *fsm_state,
979 enum mlxfw_fsm_state_err *fsm_state_err)
981 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
982 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
983 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
984 char mcc_pl[MLXSW_REG_MCC_LEN];
989 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0);
990 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
994 mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state);
995 *fsm_state = control_state;
996 *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code, MLXFW_FSM_STATE_ERR_MAX);
1000 static void mlxsw_core_fw_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1002 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1003 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1004 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1005 char mcc_pl[MLXSW_REG_MCC_LEN];
1007 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0, fwhandle, 0);
1008 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1011 static void mlxsw_core_fw_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1013 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1014 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1015 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1016 char mcc_pl[MLXSW_REG_MCC_LEN];
1018 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0, fwhandle, 0);
1019 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1022 static const struct mlxfw_dev_ops mlxsw_core_fw_mlxsw_dev_ops = {
1023 .component_query = mlxsw_core_fw_component_query,
1024 .fsm_lock = mlxsw_core_fw_fsm_lock,
1025 .fsm_component_update = mlxsw_core_fw_fsm_component_update,
1026 .fsm_block_download = mlxsw_core_fw_fsm_block_download,
1027 .fsm_component_verify = mlxsw_core_fw_fsm_component_verify,
1028 .fsm_activate = mlxsw_core_fw_fsm_activate,
1029 .fsm_query_state = mlxsw_core_fw_fsm_query_state,
1030 .fsm_cancel = mlxsw_core_fw_fsm_cancel,
1031 .fsm_release = mlxsw_core_fw_fsm_release,
1034 static int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core, const struct firmware *firmware,
1035 struct netlink_ext_ack *extack)
1037 struct mlxsw_core_fw_info mlxsw_core_fw_info = {
1039 .ops = &mlxsw_core_fw_mlxsw_dev_ops,
1040 .psid = mlxsw_core->bus_info->psid,
1041 .psid_size = strlen(mlxsw_core->bus_info->psid),
1042 .devlink = priv_to_devlink(mlxsw_core),
1044 .mlxsw_core = mlxsw_core
1048 mlxsw_core->fw_flash_in_progress = true;
1049 err = mlxfw_firmware_flash(&mlxsw_core_fw_info.mlxfw_dev, firmware, extack);
1050 mlxsw_core->fw_flash_in_progress = false;
1055 static int mlxsw_core_fw_rev_validate(struct mlxsw_core *mlxsw_core,
1056 const struct mlxsw_bus_info *mlxsw_bus_info,
1057 const struct mlxsw_fw_rev *req_rev,
1058 const char *filename)
1060 const struct mlxsw_fw_rev *rev = &mlxsw_bus_info->fw_rev;
1061 union devlink_param_value value;
1062 const struct firmware *firmware;
1065 /* Don't check if driver does not require it */
1066 if (!req_rev || !filename)
1069 /* Don't check if devlink 'fw_load_policy' param is 'flash' */
1070 err = devlink_param_driverinit_value_get(priv_to_devlink(mlxsw_core),
1071 DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY,
1075 if (value.vu8 == DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH)
1078 /* Validate driver & FW are compatible */
1079 if (rev->major != req_rev->major) {
1080 WARN(1, "Mismatch in major FW version [%d:%d] is never expected; Please contact support\n",
1081 rev->major, req_rev->major);
1084 if (mlxsw_core_fw_rev_minor_subminor_validate(rev, req_rev))
1087 dev_err(mlxsw_bus_info->dev, "The firmware version %d.%d.%d is incompatible with the driver (required >= %d.%d.%d)\n",
1088 rev->major, rev->minor, rev->subminor, req_rev->major,
1089 req_rev->minor, req_rev->subminor);
1090 dev_info(mlxsw_bus_info->dev, "Flashing firmware using file %s\n", filename);
1092 err = request_firmware_direct(&firmware, filename, mlxsw_bus_info->dev);
1094 dev_err(mlxsw_bus_info->dev, "Could not request firmware file %s\n", filename);
1098 err = mlxsw_core_fw_flash(mlxsw_core, firmware, NULL);
1099 release_firmware(firmware);
1101 dev_err(mlxsw_bus_info->dev, "Could not upgrade firmware\n");
1103 /* On FW flash success, tell the caller FW reset is needed
1104 * if current FW supports it.
1106 if (rev->minor >= req_rev->can_reset_minor)
1107 return err ? err : -EAGAIN;
1112 static int mlxsw_core_fw_flash_update(struct mlxsw_core *mlxsw_core,
1113 struct devlink_flash_update_params *params,
1114 struct netlink_ext_ack *extack)
1116 const struct firmware *firmware;
1119 err = request_firmware_direct(&firmware, params->file_name, mlxsw_core->bus_info->dev);
1122 err = mlxsw_core_fw_flash(mlxsw_core, firmware, extack);
1123 release_firmware(firmware);
1128 static int mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink *devlink, u32 id,
1129 union devlink_param_value val,
1130 struct netlink_ext_ack *extack)
1132 if (val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER &&
1133 val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) {
1134 NL_SET_ERR_MSG_MOD(extack, "'fw_load_policy' must be 'driver' or 'flash'");
1141 static const struct devlink_param mlxsw_core_fw_devlink_params[] = {
1142 DEVLINK_PARAM_GENERIC(FW_LOAD_POLICY, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
1143 mlxsw_core_devlink_param_fw_load_policy_validate),
1146 static int mlxsw_core_fw_params_register(struct mlxsw_core *mlxsw_core)
1148 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1149 union devlink_param_value value;
1152 err = devlink_params_register(devlink, mlxsw_core_fw_devlink_params,
1153 ARRAY_SIZE(mlxsw_core_fw_devlink_params));
1157 value.vu8 = DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER;
1158 devlink_param_driverinit_value_set(devlink, DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY, value);
1162 static void mlxsw_core_fw_params_unregister(struct mlxsw_core *mlxsw_core)
1164 devlink_params_unregister(priv_to_devlink(mlxsw_core), mlxsw_core_fw_devlink_params,
1165 ARRAY_SIZE(mlxsw_core_fw_devlink_params));
1168 static int mlxsw_devlink_port_split(struct devlink *devlink,
1169 unsigned int port_index,
1171 struct netlink_ext_ack *extack)
1173 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1175 if (port_index >= mlxsw_core->max_ports) {
1176 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
1179 if (!mlxsw_core->driver->port_split)
1181 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
1185 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
1186 unsigned int port_index,
1187 struct netlink_ext_ack *extack)
1189 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1191 if (port_index >= mlxsw_core->max_ports) {
1192 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
1195 if (!mlxsw_core->driver->port_unsplit)
1197 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
1202 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
1203 unsigned int sb_index, u16 pool_index,
1204 struct devlink_sb_pool_info *pool_info)
1206 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1207 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1209 if (!mlxsw_driver->sb_pool_get)
1211 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
1212 pool_index, pool_info);
1216 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
1217 unsigned int sb_index, u16 pool_index, u32 size,
1218 enum devlink_sb_threshold_type threshold_type,
1219 struct netlink_ext_ack *extack)
1221 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1222 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1224 if (!mlxsw_driver->sb_pool_set)
1226 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
1227 pool_index, size, threshold_type,
1231 static void *__dl_port(struct devlink_port *devlink_port)
1233 return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
1236 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
1237 enum devlink_port_type port_type)
1239 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1240 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1241 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1243 if (!mlxsw_driver->port_type_set)
1246 return mlxsw_driver->port_type_set(mlxsw_core,
1247 mlxsw_core_port->local_port,
1251 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
1252 unsigned int sb_index, u16 pool_index,
1255 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1256 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1257 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1259 if (!mlxsw_driver->sb_port_pool_get ||
1260 !mlxsw_core_port_check(mlxsw_core_port))
1262 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
1263 pool_index, p_threshold);
1266 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
1267 unsigned int sb_index, u16 pool_index,
1269 struct netlink_ext_ack *extack)
1271 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1272 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1273 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1275 if (!mlxsw_driver->sb_port_pool_set ||
1276 !mlxsw_core_port_check(mlxsw_core_port))
1278 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
1279 pool_index, threshold, extack);
1283 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
1284 unsigned int sb_index, u16 tc_index,
1285 enum devlink_sb_pool_type pool_type,
1286 u16 *p_pool_index, u32 *p_threshold)
1288 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1289 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1290 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1292 if (!mlxsw_driver->sb_tc_pool_bind_get ||
1293 !mlxsw_core_port_check(mlxsw_core_port))
1295 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
1296 tc_index, pool_type,
1297 p_pool_index, p_threshold);
1301 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
1302 unsigned int sb_index, u16 tc_index,
1303 enum devlink_sb_pool_type pool_type,
1304 u16 pool_index, u32 threshold,
1305 struct netlink_ext_ack *extack)
1307 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1308 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1309 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1311 if (!mlxsw_driver->sb_tc_pool_bind_set ||
1312 !mlxsw_core_port_check(mlxsw_core_port))
1314 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
1315 tc_index, pool_type,
1316 pool_index, threshold, extack);
1319 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
1320 unsigned int sb_index)
1322 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1323 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1325 if (!mlxsw_driver->sb_occ_snapshot)
1327 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
1330 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
1331 unsigned int sb_index)
1333 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1334 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1336 if (!mlxsw_driver->sb_occ_max_clear)
1338 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
1342 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
1343 unsigned int sb_index, u16 pool_index,
1344 u32 *p_cur, u32 *p_max)
1346 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1347 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1348 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1350 if (!mlxsw_driver->sb_occ_port_pool_get ||
1351 !mlxsw_core_port_check(mlxsw_core_port))
1353 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
1354 pool_index, p_cur, p_max);
1358 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
1359 unsigned int sb_index, u16 tc_index,
1360 enum devlink_sb_pool_type pool_type,
1361 u32 *p_cur, u32 *p_max)
1363 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1364 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1365 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1367 if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
1368 !mlxsw_core_port_check(mlxsw_core_port))
1370 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
1372 pool_type, p_cur, p_max);
1376 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
1377 struct netlink_ext_ack *extack)
1379 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1380 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
1381 u32 hw_rev, fw_major, fw_minor, fw_sub_minor;
1382 char mgir_pl[MLXSW_REG_MGIR_LEN];
1386 err = devlink_info_driver_name_put(req,
1387 mlxsw_core->bus_info->device_kind);
1391 mlxsw_reg_mgir_pack(mgir_pl);
1392 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl);
1395 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major,
1396 &fw_minor, &fw_sub_minor);
1398 sprintf(buf, "%X", hw_rev);
1399 err = devlink_info_version_fixed_put(req, "hw.revision", buf);
1403 err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid);
1407 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor);
1408 err = devlink_info_version_running_put(req, "fw.version", buf);
1416 mlxsw_devlink_core_bus_device_reload_down(struct devlink *devlink,
1417 bool netns_change, enum devlink_reload_action action,
1418 enum devlink_reload_limit limit,
1419 struct netlink_ext_ack *extack)
1421 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1423 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
1426 mlxsw_core_bus_device_unregister(mlxsw_core, true);
1431 mlxsw_devlink_core_bus_device_reload_up(struct devlink *devlink, enum devlink_reload_action action,
1432 enum devlink_reload_limit limit, u32 *actions_performed,
1433 struct netlink_ext_ack *extack)
1435 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1437 *actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
1438 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE);
1439 return mlxsw_core_bus_device_register(mlxsw_core->bus_info,
1441 mlxsw_core->bus_priv, true,
1445 static int mlxsw_devlink_flash_update(struct devlink *devlink,
1446 struct devlink_flash_update_params *params,
1447 struct netlink_ext_ack *extack)
1449 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1451 return mlxsw_core_fw_flash_update(mlxsw_core, params, extack);
1454 static int mlxsw_devlink_trap_init(struct devlink *devlink,
1455 const struct devlink_trap *trap,
1458 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1459 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1461 if (!mlxsw_driver->trap_init)
1463 return mlxsw_driver->trap_init(mlxsw_core, trap, trap_ctx);
1466 static void mlxsw_devlink_trap_fini(struct devlink *devlink,
1467 const struct devlink_trap *trap,
1470 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1471 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1473 if (!mlxsw_driver->trap_fini)
1475 mlxsw_driver->trap_fini(mlxsw_core, trap, trap_ctx);
1478 static int mlxsw_devlink_trap_action_set(struct devlink *devlink,
1479 const struct devlink_trap *trap,
1480 enum devlink_trap_action action,
1481 struct netlink_ext_ack *extack)
1483 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1484 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1486 if (!mlxsw_driver->trap_action_set)
1488 return mlxsw_driver->trap_action_set(mlxsw_core, trap, action, extack);
1492 mlxsw_devlink_trap_group_init(struct devlink *devlink,
1493 const struct devlink_trap_group *group)
1495 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1496 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1498 if (!mlxsw_driver->trap_group_init)
1500 return mlxsw_driver->trap_group_init(mlxsw_core, group);
1504 mlxsw_devlink_trap_group_set(struct devlink *devlink,
1505 const struct devlink_trap_group *group,
1506 const struct devlink_trap_policer *policer,
1507 struct netlink_ext_ack *extack)
1509 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1510 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1512 if (!mlxsw_driver->trap_group_set)
1514 return mlxsw_driver->trap_group_set(mlxsw_core, group, policer, extack);
1518 mlxsw_devlink_trap_policer_init(struct devlink *devlink,
1519 const struct devlink_trap_policer *policer)
1521 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1522 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1524 if (!mlxsw_driver->trap_policer_init)
1526 return mlxsw_driver->trap_policer_init(mlxsw_core, policer);
1530 mlxsw_devlink_trap_policer_fini(struct devlink *devlink,
1531 const struct devlink_trap_policer *policer)
1533 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1534 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1536 if (!mlxsw_driver->trap_policer_fini)
1538 mlxsw_driver->trap_policer_fini(mlxsw_core, policer);
1542 mlxsw_devlink_trap_policer_set(struct devlink *devlink,
1543 const struct devlink_trap_policer *policer,
1544 u64 rate, u64 burst,
1545 struct netlink_ext_ack *extack)
1547 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1548 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1550 if (!mlxsw_driver->trap_policer_set)
1552 return mlxsw_driver->trap_policer_set(mlxsw_core, policer, rate, burst,
1557 mlxsw_devlink_trap_policer_counter_get(struct devlink *devlink,
1558 const struct devlink_trap_policer *policer,
1561 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1562 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1564 if (!mlxsw_driver->trap_policer_counter_get)
1566 return mlxsw_driver->trap_policer_counter_get(mlxsw_core, policer,
1570 static const struct devlink_ops mlxsw_devlink_ops = {
1571 .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
1572 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
1573 .reload_down = mlxsw_devlink_core_bus_device_reload_down,
1574 .reload_up = mlxsw_devlink_core_bus_device_reload_up,
1575 .port_type_set = mlxsw_devlink_port_type_set,
1576 .port_split = mlxsw_devlink_port_split,
1577 .port_unsplit = mlxsw_devlink_port_unsplit,
1578 .sb_pool_get = mlxsw_devlink_sb_pool_get,
1579 .sb_pool_set = mlxsw_devlink_sb_pool_set,
1580 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get,
1581 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set,
1582 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get,
1583 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set,
1584 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot,
1585 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear,
1586 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get,
1587 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get,
1588 .info_get = mlxsw_devlink_info_get,
1589 .flash_update = mlxsw_devlink_flash_update,
1590 .trap_init = mlxsw_devlink_trap_init,
1591 .trap_fini = mlxsw_devlink_trap_fini,
1592 .trap_action_set = mlxsw_devlink_trap_action_set,
1593 .trap_group_init = mlxsw_devlink_trap_group_init,
1594 .trap_group_set = mlxsw_devlink_trap_group_set,
1595 .trap_policer_init = mlxsw_devlink_trap_policer_init,
1596 .trap_policer_fini = mlxsw_devlink_trap_policer_fini,
1597 .trap_policer_set = mlxsw_devlink_trap_policer_set,
1598 .trap_policer_counter_get = mlxsw_devlink_trap_policer_counter_get,
1601 static int mlxsw_core_params_register(struct mlxsw_core *mlxsw_core)
1605 err = mlxsw_core_fw_params_register(mlxsw_core);
1609 if (mlxsw_core->driver->params_register) {
1610 err = mlxsw_core->driver->params_register(mlxsw_core);
1612 goto err_params_register;
1616 err_params_register:
1617 mlxsw_core_fw_params_unregister(mlxsw_core);
1621 static void mlxsw_core_params_unregister(struct mlxsw_core *mlxsw_core)
1623 mlxsw_core_fw_params_unregister(mlxsw_core);
1624 if (mlxsw_core->driver->params_register)
1625 mlxsw_core->driver->params_unregister(mlxsw_core);
1628 struct mlxsw_core_health_event {
1629 struct mlxsw_core *mlxsw_core;
1630 char mfde_pl[MLXSW_REG_MFDE_LEN];
1631 struct work_struct work;
1634 static void mlxsw_core_health_event_work(struct work_struct *work)
1636 struct mlxsw_core_health_event *event;
1637 struct mlxsw_core *mlxsw_core;
1639 event = container_of(work, struct mlxsw_core_health_event, work);
1640 mlxsw_core = event->mlxsw_core;
1641 devlink_health_report(mlxsw_core->health.fw_fatal, "FW fatal event occurred",
1646 static void mlxsw_core_health_listener_func(const struct mlxsw_reg_info *reg,
1647 char *mfde_pl, void *priv)
1649 struct mlxsw_core_health_event *event;
1650 struct mlxsw_core *mlxsw_core = priv;
1652 event = kmalloc(sizeof(*event), GFP_ATOMIC);
1655 event->mlxsw_core = mlxsw_core;
1656 memcpy(event->mfde_pl, mfde_pl, sizeof(event->mfde_pl));
1657 INIT_WORK(&event->work, mlxsw_core_health_event_work);
1658 mlxsw_core_schedule_work(&event->work);
1661 static const struct mlxsw_listener mlxsw_core_health_listener =
1662 MLXSW_EVENTL(mlxsw_core_health_listener_func, MFDE, MFDE);
1664 static int mlxsw_core_health_fw_fatal_dump(struct devlink_health_reporter *reporter,
1665 struct devlink_fmsg *fmsg, void *priv_ctx,
1666 struct netlink_ext_ack *extack)
1668 char *mfde_pl = priv_ctx;
1675 /* User-triggered dumps are not possible */
1678 val = mlxsw_reg_mfde_irisc_id_get(mfde_pl);
1679 err = devlink_fmsg_u8_pair_put(fmsg, "irisc_id", val);
1682 err = devlink_fmsg_arr_pair_nest_start(fmsg, "event");
1686 event_id = mlxsw_reg_mfde_event_id_get(mfde_pl);
1687 err = devlink_fmsg_u8_pair_put(fmsg, "id", event_id);
1691 case MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO:
1692 val_str = "CR space timeout";
1694 case MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP:
1695 val_str = "KVD insertion machine stopped";
1701 err = devlink_fmsg_string_pair_put(fmsg, "desc", val_str);
1705 err = devlink_fmsg_arr_pair_nest_end(fmsg);
1709 val = mlxsw_reg_mfde_method_get(mfde_pl);
1711 case MLXSW_REG_MFDE_METHOD_QUERY:
1714 case MLXSW_REG_MFDE_METHOD_WRITE:
1721 err = devlink_fmsg_string_pair_put(fmsg, "method", val_str);
1726 val = mlxsw_reg_mfde_long_process_get(mfde_pl);
1727 err = devlink_fmsg_bool_pair_put(fmsg, "long_process", val);
1731 val = mlxsw_reg_mfde_command_type_get(mfde_pl);
1733 case MLXSW_REG_MFDE_COMMAND_TYPE_MAD:
1736 case MLXSW_REG_MFDE_COMMAND_TYPE_EMAD:
1739 case MLXSW_REG_MFDE_COMMAND_TYPE_CMDIF:
1746 err = devlink_fmsg_string_pair_put(fmsg, "command_type", val_str);
1751 val = mlxsw_reg_mfde_reg_attr_id_get(mfde_pl);
1752 err = devlink_fmsg_u32_pair_put(fmsg, "reg_attr_id", val);
1756 if (event_id == MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO) {
1757 val = mlxsw_reg_mfde_log_address_get(mfde_pl);
1758 err = devlink_fmsg_u32_pair_put(fmsg, "log_address", val);
1761 val = mlxsw_reg_mfde_log_id_get(mfde_pl);
1762 err = devlink_fmsg_u8_pair_put(fmsg, "log_irisc_id", val);
1765 } else if (event_id == MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP) {
1766 val = mlxsw_reg_mfde_pipes_mask_get(mfde_pl);
1767 err = devlink_fmsg_u32_pair_put(fmsg, "pipes_mask", val);
1776 mlxsw_core_health_fw_fatal_test(struct devlink_health_reporter *reporter,
1777 struct netlink_ext_ack *extack)
1779 struct mlxsw_core *mlxsw_core = devlink_health_reporter_priv(reporter);
1780 char mfgd_pl[MLXSW_REG_MFGD_LEN];
1783 /* Read the register first to make sure no other bits are changed. */
1784 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1787 mlxsw_reg_mfgd_trigger_test_set(mfgd_pl, true);
1788 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1791 static const struct devlink_health_reporter_ops
1792 mlxsw_core_health_fw_fatal_ops = {
1794 .dump = mlxsw_core_health_fw_fatal_dump,
1795 .test = mlxsw_core_health_fw_fatal_test,
1798 static int mlxsw_core_health_fw_fatal_config(struct mlxsw_core *mlxsw_core,
1801 char mfgd_pl[MLXSW_REG_MFGD_LEN];
1804 /* Read the register first to make sure no other bits are changed. */
1805 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1808 mlxsw_reg_mfgd_fatal_event_mode_set(mfgd_pl, enable);
1809 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1812 static int mlxsw_core_health_init(struct mlxsw_core *mlxsw_core)
1814 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1815 struct devlink_health_reporter *fw_fatal;
1818 if (!mlxsw_core->driver->fw_fatal_enabled)
1821 fw_fatal = devlink_health_reporter_create(devlink, &mlxsw_core_health_fw_fatal_ops,
1823 if (IS_ERR(fw_fatal)) {
1824 dev_err(mlxsw_core->bus_info->dev, "Failed to create fw fatal reporter");
1825 return PTR_ERR(fw_fatal);
1827 mlxsw_core->health.fw_fatal = fw_fatal;
1829 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1831 goto err_trap_register;
1833 err = mlxsw_core_health_fw_fatal_config(mlxsw_core, true);
1835 goto err_fw_fatal_config;
1839 err_fw_fatal_config:
1840 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1842 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal);
1846 static void mlxsw_core_health_fini(struct mlxsw_core *mlxsw_core)
1848 if (!mlxsw_core->driver->fw_fatal_enabled)
1851 mlxsw_core_health_fw_fatal_config(mlxsw_core, false);
1852 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1853 /* Make sure there is no more event work scheduled */
1854 mlxsw_core_flush_owq();
1855 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal);
1859 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1860 const struct mlxsw_bus *mlxsw_bus,
1861 void *bus_priv, bool reload,
1862 struct devlink *devlink,
1863 struct netlink_ext_ack *extack)
1865 const char *device_kind = mlxsw_bus_info->device_kind;
1866 struct mlxsw_core *mlxsw_core;
1867 struct mlxsw_driver *mlxsw_driver;
1868 struct mlxsw_res *res;
1872 mlxsw_driver = mlxsw_core_driver_get(device_kind);
1877 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
1878 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
1881 goto err_devlink_alloc;
1885 mlxsw_core = devlink_priv(devlink);
1886 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1887 INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1888 mlxsw_core->driver = mlxsw_driver;
1889 mlxsw_core->bus = mlxsw_bus;
1890 mlxsw_core->bus_priv = bus_priv;
1891 mlxsw_core->bus_info = mlxsw_bus_info;
1893 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1894 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1898 if (mlxsw_driver->resources_register && !reload) {
1899 err = mlxsw_driver->resources_register(mlxsw_core);
1901 goto err_register_resources;
1904 err = mlxsw_ports_init(mlxsw_core);
1906 goto err_ports_init;
1908 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1909 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1910 alloc_size = sizeof(u8) *
1911 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1912 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1913 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1914 if (!mlxsw_core->lag.mapping) {
1916 goto err_alloc_lag_mapping;
1920 err = mlxsw_emad_init(mlxsw_core);
1925 err = devlink_register(devlink, mlxsw_bus_info->dev);
1927 goto err_devlink_register;
1931 err = mlxsw_core_params_register(mlxsw_core);
1933 goto err_register_params;
1936 err = mlxsw_core_fw_rev_validate(mlxsw_core, mlxsw_bus_info, mlxsw_driver->fw_req_rev,
1937 mlxsw_driver->fw_filename);
1939 goto err_fw_rev_validate;
1941 err = mlxsw_core_health_init(mlxsw_core);
1943 goto err_health_init;
1945 if (mlxsw_driver->init) {
1946 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info, extack);
1948 goto err_driver_init;
1951 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1953 goto err_hwmon_init;
1955 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
1956 &mlxsw_core->thermal);
1958 goto err_thermal_init;
1960 err = mlxsw_env_init(mlxsw_core, &mlxsw_core->env);
1964 mlxsw_core->is_initialized = true;
1965 devlink_params_publish(devlink);
1968 devlink_reload_enable(devlink);
1973 mlxsw_thermal_fini(mlxsw_core->thermal);
1975 mlxsw_hwmon_fini(mlxsw_core->hwmon);
1977 if (mlxsw_core->driver->fini)
1978 mlxsw_core->driver->fini(mlxsw_core);
1980 mlxsw_core_health_fini(mlxsw_core);
1982 err_fw_rev_validate:
1984 mlxsw_core_params_unregister(mlxsw_core);
1985 err_register_params:
1987 devlink_unregister(devlink);
1988 err_devlink_register:
1989 mlxsw_emad_fini(mlxsw_core);
1991 kfree(mlxsw_core->lag.mapping);
1992 err_alloc_lag_mapping:
1993 mlxsw_ports_fini(mlxsw_core);
1996 devlink_resources_unregister(devlink, NULL);
1997 err_register_resources:
1998 mlxsw_bus->fini(bus_priv);
2001 devlink_free(devlink);
2006 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
2007 const struct mlxsw_bus *mlxsw_bus,
2008 void *bus_priv, bool reload,
2009 struct devlink *devlink,
2010 struct netlink_ext_ack *extack)
2012 bool called_again = false;
2016 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus,
2019 /* -EAGAIN is returned in case the FW was updated. FW needs
2020 * a reset, so lets try to call __mlxsw_core_bus_device_register()
2023 if (err == -EAGAIN && !called_again) {
2024 called_again = true;
2030 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
2032 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
2035 struct devlink *devlink = priv_to_devlink(mlxsw_core);
2038 devlink_reload_disable(devlink);
2039 if (devlink_is_reload_failed(devlink)) {
2041 /* Only the parts that were not de-initialized in the
2042 * failed reload attempt need to be de-initialized.
2044 goto reload_fail_deinit;
2049 devlink_params_unpublish(devlink);
2050 mlxsw_core->is_initialized = false;
2051 mlxsw_env_fini(mlxsw_core->env);
2052 mlxsw_thermal_fini(mlxsw_core->thermal);
2053 mlxsw_hwmon_fini(mlxsw_core->hwmon);
2054 if (mlxsw_core->driver->fini)
2055 mlxsw_core->driver->fini(mlxsw_core);
2056 mlxsw_core_health_fini(mlxsw_core);
2058 mlxsw_core_params_unregister(mlxsw_core);
2060 devlink_unregister(devlink);
2061 mlxsw_emad_fini(mlxsw_core);
2062 kfree(mlxsw_core->lag.mapping);
2063 mlxsw_ports_fini(mlxsw_core);
2065 devlink_resources_unregister(devlink, NULL);
2066 mlxsw_core->bus->fini(mlxsw_core->bus_priv);
2071 mlxsw_core_params_unregister(mlxsw_core);
2072 devlink_unregister(devlink);
2073 devlink_resources_unregister(devlink, NULL);
2074 devlink_free(devlink);
2076 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
2078 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
2079 const struct mlxsw_tx_info *tx_info)
2081 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
2084 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
2086 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
2087 const struct mlxsw_tx_info *tx_info)
2089 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
2092 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
2094 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
2095 struct sk_buff *skb, u8 local_port)
2097 if (mlxsw_core->driver->ptp_transmitted)
2098 mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb,
2101 EXPORT_SYMBOL(mlxsw_core_ptp_transmitted);
2103 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
2104 const struct mlxsw_rx_listener *rxl_b)
2106 return (rxl_a->func == rxl_b->func &&
2107 rxl_a->local_port == rxl_b->local_port &&
2108 rxl_a->trap_id == rxl_b->trap_id &&
2109 rxl_a->mirror_reason == rxl_b->mirror_reason);
2112 static struct mlxsw_rx_listener_item *
2113 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
2114 const struct mlxsw_rx_listener *rxl)
2116 struct mlxsw_rx_listener_item *rxl_item;
2118 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
2119 if (__is_rx_listener_equal(&rxl_item->rxl, rxl))
2125 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
2126 const struct mlxsw_rx_listener *rxl,
2127 void *priv, bool enabled)
2129 struct mlxsw_rx_listener_item *rxl_item;
2131 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2134 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
2137 rxl_item->rxl = *rxl;
2138 rxl_item->priv = priv;
2139 rxl_item->enabled = enabled;
2141 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
2144 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
2146 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
2147 const struct mlxsw_rx_listener *rxl)
2149 struct mlxsw_rx_listener_item *rxl_item;
2151 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2154 list_del_rcu(&rxl_item->list);
2158 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
2161 mlxsw_core_rx_listener_state_set(struct mlxsw_core *mlxsw_core,
2162 const struct mlxsw_rx_listener *rxl,
2165 struct mlxsw_rx_listener_item *rxl_item;
2167 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2168 if (WARN_ON(!rxl_item))
2170 rxl_item->enabled = enabled;
2173 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
2176 struct mlxsw_event_listener_item *event_listener_item = priv;
2177 struct mlxsw_reg_info reg;
2182 mlxsw_emad_tlv_parse(skb);
2183 op_tlv = mlxsw_emad_op_tlv(skb);
2184 reg_tlv = mlxsw_emad_reg_tlv(skb);
2186 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
2187 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
2188 payload = mlxsw_emad_reg_payload(reg_tlv);
2189 event_listener_item->el.func(®, payload, event_listener_item->priv);
2193 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
2194 const struct mlxsw_event_listener *el_b)
2196 return (el_a->func == el_b->func &&
2197 el_a->trap_id == el_b->trap_id);
2200 static struct mlxsw_event_listener_item *
2201 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
2202 const struct mlxsw_event_listener *el)
2204 struct mlxsw_event_listener_item *el_item;
2206 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
2207 if (__is_event_listener_equal(&el_item->el, el))
2213 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
2214 const struct mlxsw_event_listener *el,
2218 struct mlxsw_event_listener_item *el_item;
2219 const struct mlxsw_rx_listener rxl = {
2220 .func = mlxsw_core_event_listener_func,
2221 .local_port = MLXSW_PORT_DONT_CARE,
2222 .trap_id = el->trap_id,
2225 el_item = __find_event_listener_item(mlxsw_core, el);
2228 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
2232 el_item->priv = priv;
2234 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item, true);
2236 goto err_rx_listener_register;
2238 /* No reason to save item if we did not manage to register an RX
2241 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
2245 err_rx_listener_register:
2249 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
2251 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
2252 const struct mlxsw_event_listener *el)
2254 struct mlxsw_event_listener_item *el_item;
2255 const struct mlxsw_rx_listener rxl = {
2256 .func = mlxsw_core_event_listener_func,
2257 .local_port = MLXSW_PORT_DONT_CARE,
2258 .trap_id = el->trap_id,
2261 el_item = __find_event_listener_item(mlxsw_core, el);
2264 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl);
2265 list_del(&el_item->list);
2268 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
2270 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
2271 const struct mlxsw_listener *listener,
2272 void *priv, bool enabled)
2274 if (listener->is_event) {
2276 return mlxsw_core_event_listener_register(mlxsw_core,
2277 &listener->event_listener,
2280 return mlxsw_core_rx_listener_register(mlxsw_core,
2281 &listener->rx_listener,
2286 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
2287 const struct mlxsw_listener *listener,
2290 if (listener->is_event)
2291 mlxsw_core_event_listener_unregister(mlxsw_core,
2292 &listener->event_listener);
2294 mlxsw_core_rx_listener_unregister(mlxsw_core,
2295 &listener->rx_listener);
2298 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
2299 const struct mlxsw_listener *listener, void *priv)
2301 enum mlxsw_reg_htgt_trap_group trap_group;
2302 enum mlxsw_reg_hpkt_action action;
2303 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2306 err = mlxsw_core_listener_register(mlxsw_core, listener, priv,
2307 listener->enabled_on_register);
2311 action = listener->enabled_on_register ? listener->en_action :
2312 listener->dis_action;
2313 trap_group = listener->enabled_on_register ? listener->en_trap_group :
2314 listener->dis_trap_group;
2315 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id,
2316 trap_group, listener->is_ctrl);
2317 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2324 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
2327 EXPORT_SYMBOL(mlxsw_core_trap_register);
2329 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
2330 const struct mlxsw_listener *listener,
2333 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2335 if (!listener->is_event) {
2336 mlxsw_reg_hpkt_pack(hpkt_pl, listener->dis_action,
2337 listener->trap_id, listener->dis_trap_group,
2339 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2342 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
2344 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
2346 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
2347 const struct mlxsw_listener *listener,
2350 enum mlxsw_reg_htgt_trap_group trap_group;
2351 enum mlxsw_reg_hpkt_action action;
2352 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2355 /* Not supported for event listener */
2356 if (WARN_ON(listener->is_event))
2359 action = enabled ? listener->en_action : listener->dis_action;
2360 trap_group = enabled ? listener->en_trap_group :
2361 listener->dis_trap_group;
2362 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id,
2363 trap_group, listener->is_ctrl);
2364 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2368 mlxsw_core_rx_listener_state_set(mlxsw_core, &listener->rx_listener,
2372 EXPORT_SYMBOL(mlxsw_core_trap_state_set);
2374 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
2376 return atomic64_inc_return(&mlxsw_core->emad.tid);
2379 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
2380 const struct mlxsw_reg_info *reg,
2382 enum mlxsw_core_reg_access_type type,
2383 struct list_head *bulk_list,
2384 mlxsw_reg_trans_cb_t *cb,
2385 unsigned long cb_priv)
2387 u64 tid = mlxsw_core_tid_get(mlxsw_core);
2388 struct mlxsw_reg_trans *trans;
2391 trans = kzalloc(sizeof(*trans), GFP_KERNEL);
2395 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
2396 bulk_list, cb, cb_priv, tid);
2398 kfree_rcu(trans, rcu);
2404 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
2405 const struct mlxsw_reg_info *reg, char *payload,
2406 struct list_head *bulk_list,
2407 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
2409 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
2410 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
2411 bulk_list, cb, cb_priv);
2413 EXPORT_SYMBOL(mlxsw_reg_trans_query);
2415 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
2416 const struct mlxsw_reg_info *reg, char *payload,
2417 struct list_head *bulk_list,
2418 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
2420 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
2421 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
2422 bulk_list, cb, cb_priv);
2424 EXPORT_SYMBOL(mlxsw_reg_trans_write);
2426 #define MLXSW_REG_TRANS_ERR_STRING_SIZE 256
2428 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
2430 char err_string[MLXSW_REG_TRANS_ERR_STRING_SIZE];
2431 struct mlxsw_core *mlxsw_core = trans->core;
2434 wait_for_completion(&trans->completion);
2435 cancel_delayed_work_sync(&trans->timeout_dw);
2439 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
2440 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
2442 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
2443 trans->tid, trans->reg->id,
2444 mlxsw_reg_id_str(trans->reg->id),
2445 mlxsw_core_reg_access_type_str(trans->type),
2447 mlxsw_emad_op_tlv_status_str(trans->emad_status));
2449 snprintf(err_string, MLXSW_REG_TRANS_ERR_STRING_SIZE,
2450 "(tid=%llx,reg_id=%x(%s)) %s (%s)\n", trans->tid,
2451 trans->reg->id, mlxsw_reg_id_str(trans->reg->id),
2452 mlxsw_emad_op_tlv_status_str(trans->emad_status),
2453 trans->emad_err_string ? trans->emad_err_string : "");
2455 trace_devlink_hwerr(priv_to_devlink(mlxsw_core),
2456 trans->emad_status, err_string);
2458 kfree(trans->emad_err_string);
2461 list_del(&trans->bulk_list);
2462 kfree_rcu(trans, rcu);
2466 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
2468 struct mlxsw_reg_trans *trans;
2469 struct mlxsw_reg_trans *tmp;
2473 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
2474 err = mlxsw_reg_trans_wait(trans);
2475 if (err && sum_err == 0)
2476 sum_err = err; /* first error to be returned */
2480 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
2482 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
2483 const struct mlxsw_reg_info *reg,
2485 enum mlxsw_core_reg_access_type type)
2487 enum mlxsw_emad_op_tlv_status status;
2490 char *in_mbox, *out_mbox, *tmp;
2492 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
2493 reg->id, mlxsw_reg_id_str(reg->id),
2494 mlxsw_core_reg_access_type_str(type));
2496 in_mbox = mlxsw_cmd_mbox_alloc();
2500 out_mbox = mlxsw_cmd_mbox_alloc();
2506 mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
2507 mlxsw_core_tid_get(mlxsw_core));
2508 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
2509 mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
2511 /* There is a special treatment needed for MRSR (reset) register.
2512 * The command interface will return error after the command
2513 * is executed, so tell the lower layer to expect it
2514 * and cope accordingly.
2516 reset_ok = reg->id == MLXSW_REG_MRSR_ID;
2520 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
2522 err = mlxsw_emad_process_status(out_mbox, &status);
2524 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
2526 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
2527 status, mlxsw_emad_op_tlv_status_str(status));
2532 memcpy(payload, mlxsw_emad_reg_payload_cmd(out_mbox),
2535 mlxsw_cmd_mbox_free(out_mbox);
2537 mlxsw_cmd_mbox_free(in_mbox);
2539 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
2540 reg->id, mlxsw_reg_id_str(reg->id),
2541 mlxsw_core_reg_access_type_str(type));
2545 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
2546 char *payload, size_t payload_len,
2547 unsigned long cb_priv)
2549 char *orig_payload = (char *) cb_priv;
2551 memcpy(orig_payload, payload, payload_len);
2554 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
2555 const struct mlxsw_reg_info *reg,
2557 enum mlxsw_core_reg_access_type type)
2559 LIST_HEAD(bulk_list);
2562 /* During initialization EMAD interface is not available to us,
2563 * so we default to command interface. We switch to EMAD interface
2564 * after setting the appropriate traps.
2566 if (!mlxsw_core->emad.use_emad)
2567 return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
2570 err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
2571 payload, type, &bulk_list,
2572 mlxsw_core_reg_access_cb,
2573 (unsigned long) payload);
2576 return mlxsw_reg_trans_bulk_wait(&bulk_list);
2579 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
2580 const struct mlxsw_reg_info *reg, char *payload)
2582 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
2583 MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
2585 EXPORT_SYMBOL(mlxsw_reg_query);
2587 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
2588 const struct mlxsw_reg_info *reg, char *payload)
2590 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
2591 MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
2593 EXPORT_SYMBOL(mlxsw_reg_write);
2595 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
2596 struct mlxsw_rx_info *rx_info)
2598 struct mlxsw_rx_listener_item *rxl_item;
2599 const struct mlxsw_rx_listener *rxl;
2603 if (rx_info->is_lag) {
2604 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
2605 __func__, rx_info->u.lag_id,
2607 /* Upper layer does not care if the skb came from LAG or not,
2608 * so just get the local_port for the lag port and push it up.
2610 local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
2612 rx_info->lag_port_index);
2614 local_port = rx_info->u.sys_port;
2617 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
2618 __func__, local_port, rx_info->trap_id);
2620 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
2621 (local_port >= mlxsw_core->max_ports))
2625 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
2626 rxl = &rxl_item->rxl;
2627 if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
2628 rxl->local_port == local_port) &&
2629 rxl->trap_id == rx_info->trap_id &&
2630 rxl->mirror_reason == rx_info->mirror_reason) {
2631 if (rxl_item->enabled)
2641 rxl->func(skb, local_port, rxl_item->priv);
2648 EXPORT_SYMBOL(mlxsw_core_skb_receive);
2650 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
2651 u16 lag_id, u8 port_index)
2653 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
2657 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
2658 u16 lag_id, u8 port_index, u8 local_port)
2660 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2661 lag_id, port_index);
2663 mlxsw_core->lag.mapping[index] = local_port;
2665 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
2667 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
2668 u16 lag_id, u8 port_index)
2670 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2671 lag_id, port_index);
2673 return mlxsw_core->lag.mapping[index];
2675 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
2677 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
2678 u16 lag_id, u8 local_port)
2682 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
2683 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2686 if (mlxsw_core->lag.mapping[index] == local_port)
2687 mlxsw_core->lag.mapping[index] = 0;
2690 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
2692 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
2693 enum mlxsw_res_id res_id)
2695 return mlxsw_res_valid(&mlxsw_core->res, res_id);
2697 EXPORT_SYMBOL(mlxsw_core_res_valid);
2699 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
2700 enum mlxsw_res_id res_id)
2702 return mlxsw_res_get(&mlxsw_core->res, res_id);
2704 EXPORT_SYMBOL(mlxsw_core_res_get);
2706 static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
2707 enum devlink_port_flavour flavour,
2708 u32 port_number, bool split,
2709 u32 split_port_subnumber,
2710 bool splittable, u32 lanes,
2711 const unsigned char *switch_id,
2712 unsigned char switch_id_len)
2714 struct devlink *devlink = priv_to_devlink(mlxsw_core);
2715 struct mlxsw_core_port *mlxsw_core_port =
2716 &mlxsw_core->ports[local_port];
2717 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2718 struct devlink_port_attrs attrs = {};
2721 attrs.split = split;
2722 attrs.lanes = lanes;
2723 attrs.splittable = splittable;
2724 attrs.flavour = flavour;
2725 attrs.phys.port_number = port_number;
2726 attrs.phys.split_subport_number = split_port_subnumber;
2727 memcpy(attrs.switch_id.id, switch_id, switch_id_len);
2728 attrs.switch_id.id_len = switch_id_len;
2729 mlxsw_core_port->local_port = local_port;
2730 devlink_port_attrs_set(devlink_port, &attrs);
2731 err = devlink_port_register(devlink, devlink_port, local_port);
2733 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
2737 static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
2739 struct mlxsw_core_port *mlxsw_core_port =
2740 &mlxsw_core->ports[local_port];
2741 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2743 devlink_port_unregister(devlink_port);
2744 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
2747 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
2748 u32 port_number, bool split,
2749 u32 split_port_subnumber,
2750 bool splittable, u32 lanes,
2751 const unsigned char *switch_id,
2752 unsigned char switch_id_len)
2754 return __mlxsw_core_port_init(mlxsw_core, local_port,
2755 DEVLINK_PORT_FLAVOUR_PHYSICAL,
2756 port_number, split, split_port_subnumber,
2758 switch_id, switch_id_len);
2760 EXPORT_SYMBOL(mlxsw_core_port_init);
2762 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
2764 __mlxsw_core_port_fini(mlxsw_core, local_port);
2766 EXPORT_SYMBOL(mlxsw_core_port_fini);
2768 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
2769 void *port_driver_priv,
2770 const unsigned char *switch_id,
2771 unsigned char switch_id_len)
2773 struct mlxsw_core_port *mlxsw_core_port =
2774 &mlxsw_core->ports[MLXSW_PORT_CPU_PORT];
2777 err = __mlxsw_core_port_init(mlxsw_core, MLXSW_PORT_CPU_PORT,
2778 DEVLINK_PORT_FLAVOUR_CPU,
2779 0, false, 0, false, 0,
2780 switch_id, switch_id_len);
2784 mlxsw_core_port->port_driver_priv = port_driver_priv;
2787 EXPORT_SYMBOL(mlxsw_core_cpu_port_init);
2789 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core)
2791 __mlxsw_core_port_fini(mlxsw_core, MLXSW_PORT_CPU_PORT);
2793 EXPORT_SYMBOL(mlxsw_core_cpu_port_fini);
2795 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
2796 void *port_driver_priv, struct net_device *dev)
2798 struct mlxsw_core_port *mlxsw_core_port =
2799 &mlxsw_core->ports[local_port];
2800 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2802 mlxsw_core_port->port_driver_priv = port_driver_priv;
2803 devlink_port_type_eth_set(devlink_port, dev);
2805 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
2807 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
2808 void *port_driver_priv)
2810 struct mlxsw_core_port *mlxsw_core_port =
2811 &mlxsw_core->ports[local_port];
2812 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2814 mlxsw_core_port->port_driver_priv = port_driver_priv;
2815 devlink_port_type_ib_set(devlink_port, NULL);
2817 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
2819 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
2820 void *port_driver_priv)
2822 struct mlxsw_core_port *mlxsw_core_port =
2823 &mlxsw_core->ports[local_port];
2824 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2826 mlxsw_core_port->port_driver_priv = port_driver_priv;
2827 devlink_port_type_clear(devlink_port);
2829 EXPORT_SYMBOL(mlxsw_core_port_clear);
2831 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
2834 struct mlxsw_core_port *mlxsw_core_port =
2835 &mlxsw_core->ports[local_port];
2836 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2838 return devlink_port->type;
2840 EXPORT_SYMBOL(mlxsw_core_port_type_get);
2843 struct devlink_port *
2844 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
2847 struct mlxsw_core_port *mlxsw_core_port =
2848 &mlxsw_core->ports[local_port];
2849 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2851 return devlink_port;
2853 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get);
2855 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core)
2857 return mlxsw_core->env;
2860 bool mlxsw_core_is_initialized(const struct mlxsw_core *mlxsw_core)
2862 return mlxsw_core->is_initialized;
2865 int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module)
2867 enum mlxsw_reg_pmtm_module_type module_type;
2868 char pmtm_pl[MLXSW_REG_PMTM_LEN];
2871 mlxsw_reg_pmtm_pack(pmtm_pl, module);
2872 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(pmtm), pmtm_pl);
2875 mlxsw_reg_pmtm_unpack(pmtm_pl, &module_type);
2877 /* Here we need to get the module width according to the module type. */
2879 switch (module_type) {
2880 case MLXSW_REG_PMTM_MODULE_TYPE_C2C8X:
2881 case MLXSW_REG_PMTM_MODULE_TYPE_QSFP_DD:
2882 case MLXSW_REG_PMTM_MODULE_TYPE_OSFP:
2884 case MLXSW_REG_PMTM_MODULE_TYPE_C2C4X:
2885 case MLXSW_REG_PMTM_MODULE_TYPE_BP_4X:
2886 case MLXSW_REG_PMTM_MODULE_TYPE_QSFP:
2888 case MLXSW_REG_PMTM_MODULE_TYPE_C2C2X:
2889 case MLXSW_REG_PMTM_MODULE_TYPE_BP_2X:
2890 case MLXSW_REG_PMTM_MODULE_TYPE_SFP_DD:
2891 case MLXSW_REG_PMTM_MODULE_TYPE_DSFP:
2893 case MLXSW_REG_PMTM_MODULE_TYPE_C2C1X:
2894 case MLXSW_REG_PMTM_MODULE_TYPE_BP_1X:
2895 case MLXSW_REG_PMTM_MODULE_TYPE_SFP:
2901 EXPORT_SYMBOL(mlxsw_core_module_max_width);
2903 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
2904 const char *buf, size_t size)
2906 __be32 *m = (__be32 *) buf;
2908 int count = size / sizeof(__be32);
2910 for (i = count - 1; i >= 0; i--)
2915 for (i = 0; i < count; i += 4)
2916 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
2917 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
2918 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
2921 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
2922 u32 in_mod, bool out_mbox_direct, bool reset_ok,
2923 char *in_mbox, size_t in_mbox_size,
2924 char *out_mbox, size_t out_mbox_size)
2929 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
2930 if (!mlxsw_core->bus->cmd_exec)
2933 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
2934 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
2936 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
2937 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
2940 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
2941 opcode_mod, in_mod, out_mbox_direct,
2942 in_mbox, in_mbox_size,
2943 out_mbox, out_mbox_size, &status);
2945 if (!err && out_mbox) {
2946 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
2947 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
2950 if (reset_ok && err == -EIO &&
2951 status == MLXSW_CMD_STATUS_RUNNING_RESET) {
2953 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
2954 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
2955 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
2956 in_mod, status, mlxsw_cmd_status_str(status));
2957 } else if (err == -ETIMEDOUT) {
2958 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
2959 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
2965 EXPORT_SYMBOL(mlxsw_cmd_exec);
2967 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
2969 return queue_delayed_work(mlxsw_wq, dwork, delay);
2971 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
2973 bool mlxsw_core_schedule_work(struct work_struct *work)
2975 return queue_work(mlxsw_owq, work);
2977 EXPORT_SYMBOL(mlxsw_core_schedule_work);
2979 void mlxsw_core_flush_owq(void)
2981 flush_workqueue(mlxsw_owq);
2983 EXPORT_SYMBOL(mlxsw_core_flush_owq);
2985 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
2986 const struct mlxsw_config_profile *profile,
2987 u64 *p_single_size, u64 *p_double_size,
2990 struct mlxsw_driver *driver = mlxsw_core->driver;
2992 if (!driver->kvd_sizes_get)
2995 return driver->kvd_sizes_get(mlxsw_core, profile,
2996 p_single_size, p_double_size,
2999 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
3001 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
3002 struct mlxsw_res *res)
3012 mlxsw_cmd_mbox_zero(mbox);
3014 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
3016 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index);
3020 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
3021 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
3022 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
3024 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
3027 mlxsw_res_parse(res, id, data);
3031 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get
3032 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW.
3036 EXPORT_SYMBOL(mlxsw_core_resources_query);
3038 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core)
3040 return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv);
3042 EXPORT_SYMBOL(mlxsw_core_read_frc_h);
3044 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core)
3046 return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv);
3048 EXPORT_SYMBOL(mlxsw_core_read_frc_l);
3050 void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core)
3052 mlxsw_core->emad.enable_string_tlv = true;
3054 EXPORT_SYMBOL(mlxsw_core_emad_string_tlv_enable);
3056 static int __init mlxsw_core_module_init(void)
3060 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0);
3063 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0,
3064 mlxsw_core_driver_name);
3067 goto err_alloc_ordered_workqueue;
3071 err_alloc_ordered_workqueue:
3072 destroy_workqueue(mlxsw_wq);
3076 static void __exit mlxsw_core_module_exit(void)
3078 destroy_workqueue(mlxsw_owq);
3079 destroy_workqueue(mlxsw_wq);
3082 module_init(mlxsw_core_module_init);
3083 module_exit(mlxsw_core_module_exit);
3085 MODULE_LICENSE("Dual BSD/GPL");
3086 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3087 MODULE_DESCRIPTION("Mellanox switch device core driver");