2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #ifndef __MLX5_ESWITCH_H__
34 #define __MLX5_ESWITCH_H__
36 #include <linux/if_ether.h>
37 #include <linux/if_link.h>
38 #include <linux/atomic.h>
39 #include <linux/xarray.h>
40 #include <net/devlink.h>
41 #include <linux/mlx5/device.h>
42 #include <linux/mlx5/eswitch.h>
43 #include <linux/mlx5/vport.h>
44 #include <linux/mlx5/fs.h>
46 #include "lib/fs_chains.h"
49 #include "esw/sample.h"
51 enum mlx5_mapped_obj_type {
52 MLX5_MAPPED_OBJ_CHAIN,
53 MLX5_MAPPED_OBJ_SAMPLE,
56 struct mlx5_mapped_obj {
57 enum mlx5_mapped_obj_type type;
68 #ifdef CONFIG_MLX5_ESWITCH
70 #define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15
72 #define MLX5_MAX_UC_PER_VPORT(dev) \
73 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
75 #define MLX5_MAX_MC_PER_VPORT(dev) \
76 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
78 #define MLX5_MIN_BW_SHARE 1
80 #define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \
81 min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit)
83 #define mlx5_esw_has_fwd_fdb(dev) \
84 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
86 #define esw_chains(esw) \
87 ((esw)->fdb_table.offloads.esw_chains_priv)
92 MAPPING_TYPE_TUNNEL_ENC_OPTS,
97 struct vport_ingress {
98 struct mlx5_flow_table *acl;
99 struct mlx5_flow_handle *allow_rule;
101 struct mlx5_flow_group *allow_spoofchk_only_grp;
102 struct mlx5_flow_group *allow_untagged_spoofchk_grp;
103 struct mlx5_flow_group *allow_untagged_only_grp;
104 struct mlx5_flow_group *drop_grp;
105 struct mlx5_flow_handle *drop_rule;
106 struct mlx5_fc *drop_counter;
109 /* Optional group to add an FTE to do internal priority
110 * tagging on ingress packets.
112 struct mlx5_flow_group *metadata_prio_tag_grp;
113 /* Group to add default match-all FTE entry to tag ingress
114 * packet with metadata.
116 struct mlx5_flow_group *metadata_allmatch_grp;
117 struct mlx5_modify_hdr *modify_metadata;
118 struct mlx5_flow_handle *modify_metadata_rule;
122 struct vport_egress {
123 struct mlx5_flow_table *acl;
124 struct mlx5_flow_handle *allowed_vlan;
125 struct mlx5_flow_group *vlan_grp;
128 struct mlx5_flow_group *drop_grp;
129 struct mlx5_flow_handle *drop_rule;
130 struct mlx5_fc *drop_counter;
133 struct mlx5_flow_group *fwd_grp;
134 struct mlx5_flow_handle *fwd_rule;
139 struct mlx5_vport_drop_stats {
144 struct mlx5_vport_info {
154 /* Vport context events */
155 enum mlx5_eswitch_vport_event {
156 MLX5_VPORT_UC_ADDR_CHANGE = BIT(0),
157 MLX5_VPORT_MC_ADDR_CHANGE = BIT(1),
158 MLX5_VPORT_PROMISC_CHANGE = BIT(3),
161 struct mlx5_esw_bridge;
164 struct mlx5_core_dev *dev;
165 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
166 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
167 struct mlx5_flow_handle *promisc_rule;
168 struct mlx5_flow_handle *allmulti_rule;
169 struct work_struct vport_change_handler;
171 struct vport_ingress ingress;
172 struct vport_egress egress;
173 u32 default_metadata;
176 struct mlx5_vport_info info;
188 enum mlx5_eswitch_vport_event enabled_events;
190 struct devlink_port *dl_port;
191 struct mlx5_esw_bridge *bridge;
194 struct mlx5_esw_indir_table;
196 struct mlx5_eswitch_fdb {
199 struct mlx5_flow_table *fdb;
200 struct mlx5_flow_group *addr_grp;
201 struct mlx5_flow_group *allmulti_grp;
202 struct mlx5_flow_group *promisc_grp;
203 struct mlx5_flow_table *vepa_fdb;
204 struct mlx5_flow_handle *vepa_uplink_rule;
205 struct mlx5_flow_handle *vepa_star_rule;
208 struct offloads_fdb {
209 struct mlx5_flow_namespace *ns;
210 struct mlx5_flow_table *tc_miss_table;
211 struct mlx5_flow_table *slow_fdb;
212 struct mlx5_flow_group *send_to_vport_grp;
213 struct mlx5_flow_group *send_to_vport_meta_grp;
214 struct mlx5_flow_group *peer_miss_grp;
215 struct mlx5_flow_handle **peer_miss_rules;
216 struct mlx5_flow_group *miss_grp;
217 struct mlx5_flow_handle **send_to_vport_meta_rules;
218 struct mlx5_flow_handle *miss_rule_uni;
219 struct mlx5_flow_handle *miss_rule_multi;
220 int vlan_push_pop_refcount;
222 struct mlx5_fs_chains *esw_chains_priv;
224 DECLARE_HASHTABLE(table, 8);
225 /* Protects vports.table */
229 struct mlx5_esw_indir_table *indir;
236 struct mlx5_esw_offload {
237 struct mlx5_flow_table *ft_offloads_restore;
238 struct mlx5_flow_group *restore_group;
239 struct mlx5_modify_hdr *restore_copy_hdr_id;
240 struct mapping_ctx *reg_c0_obj_pool;
242 struct mlx5_flow_table *ft_offloads;
243 struct mlx5_flow_group *vport_rx_group;
244 struct xarray vport_reps;
245 struct list_head peer_flows;
246 struct mutex peer_mutex;
247 struct mutex encap_tbl_lock; /* protects encap_tbl */
248 DECLARE_HASHTABLE(encap_tbl, 8);
249 struct mutex decap_tbl_lock; /* protects decap_tbl */
250 DECLARE_HASHTABLE(decap_tbl, 8);
251 struct mod_hdr_tbl mod_hdr;
252 DECLARE_HASHTABLE(termtbl_tbl, 8);
253 struct mutex termtbl_mutex; /* protects termtbl hash */
254 struct xarray vhca_map;
255 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
257 atomic64_t num_flows;
258 enum devlink_eswitch_encap_mode encap;
259 struct ida vport_metadata_ida;
260 unsigned int host_number; /* ECPF supports one external host */
263 /* E-Switch MC FDB table hash node */
264 struct esw_mc_addr { /* SRIOV only */
265 struct l2addr_node node;
266 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
270 struct mlx5_host_work {
271 struct work_struct work;
272 struct mlx5_eswitch *esw;
275 struct mlx5_esw_functions {
281 MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0),
282 MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1),
285 struct mlx5_esw_bridge_offloads;
287 struct mlx5_eswitch {
288 struct mlx5_core_dev *dev;
290 struct mlx5_eswitch_fdb fdb_table;
291 /* legacy data structures */
292 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
293 struct esw_mc_addr mc_promisc;
295 struct workqueue_struct *work_queue;
296 struct xarray vports;
300 /* Synchronize between vport change events
301 * and async SRIOV admin state changes
303 struct mutex state_lock;
305 /* Protects eswitch mode change that occurs via one or more
306 * user commands, i.e. sriov state change, devlink commands.
308 struct rw_semaphore mode_lock;
309 atomic64_t user_count;
316 struct mlx5_esw_bridge_offloads *br_offloads;
317 struct mlx5_esw_offload offloads;
320 u16 first_host_vport;
321 struct mlx5_esw_functions esw_funcs;
325 struct blocking_notifier_head n_head;
328 void esw_offloads_disable(struct mlx5_eswitch *esw);
329 int esw_offloads_enable(struct mlx5_eswitch *esw);
330 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw);
331 int esw_offloads_init_reps(struct mlx5_eswitch *esw);
333 bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw);
334 int mlx5_esw_offloads_vport_metadata_set(struct mlx5_eswitch *esw, bool enable);
335 u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw);
336 void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata);
338 int mlx5_esw_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num,
342 int mlx5_eswitch_init(struct mlx5_core_dev *dev);
343 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
345 #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1)
346 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int mode, int num_vfs);
347 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);
348 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw, bool clear_vf);
349 void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf);
350 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
351 u16 vport, const u8 *mac);
352 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
353 u16 vport, int link_state);
354 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
355 u16 vport, u16 vlan, u8 qos);
356 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
357 u16 vport, bool spoofchk);
358 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
359 u16 vport_num, bool setting);
360 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
361 u32 max_rate, u32 min_rate);
362 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
363 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
364 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
365 u16 vport, struct ifla_vf_info *ivi);
366 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
368 struct ifla_vf_stats *vf_stats);
369 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
371 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
372 bool other_vport, void *in);
374 struct mlx5_flow_spec;
375 struct mlx5_esw_flow_attr;
376 struct mlx5_termtbl_handle;
379 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
380 struct mlx5_flow_attr *attr,
381 struct mlx5_flow_act *flow_act,
382 struct mlx5_flow_spec *spec);
384 struct mlx5_flow_handle *
385 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw,
386 struct mlx5_flow_table *ft,
387 struct mlx5_flow_spec *spec,
388 struct mlx5_esw_flow_attr *attr,
389 struct mlx5_flow_act *flow_act,
390 struct mlx5_flow_destination *dest,
394 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw,
395 struct mlx5_termtbl_handle *tt);
398 mlx5_eswitch_clear_rule_source_port(struct mlx5_eswitch *esw, struct mlx5_flow_spec *spec);
400 struct mlx5_flow_handle *
401 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
402 struct mlx5_flow_spec *spec,
403 struct mlx5_flow_attr *attr);
404 struct mlx5_flow_handle *
405 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw,
406 struct mlx5_flow_spec *spec,
407 struct mlx5_flow_attr *attr);
409 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
410 struct mlx5_flow_handle *rule,
411 struct mlx5_flow_attr *attr);
413 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw,
414 struct mlx5_flow_handle *rule,
415 struct mlx5_flow_attr *attr);
417 struct mlx5_flow_handle *
418 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
419 struct mlx5_flow_destination *dest);
422 SET_VLAN_STRIP = BIT(0),
423 SET_VLAN_INSERT = BIT(1)
426 enum mlx5_flow_match_level {
427 MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE,
428 MLX5_MATCH_L2 = MLX5_INLINE_MODE_L2,
429 MLX5_MATCH_L3 = MLX5_INLINE_MODE_IP,
430 MLX5_MATCH_L4 = MLX5_INLINE_MODE_TCP_UDP,
433 /* current maximum for flow based vport multicasting */
434 #define MLX5_MAX_FLOW_FWD_VPORTS 2
437 MLX5_ESW_DEST_ENCAP = BIT(0),
438 MLX5_ESW_DEST_ENCAP_VALID = BIT(1),
439 MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2),
443 MLX5_ESW_ATTR_FLAG_VLAN_HANDLED = BIT(0),
444 MLX5_ESW_ATTR_FLAG_SLOW_PATH = BIT(1),
445 MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2),
446 MLX5_ESW_ATTR_FLAG_SRC_REWRITE = BIT(3),
447 MLX5_ESW_ATTR_FLAG_SAMPLE = BIT(4),
450 struct mlx5_esw_flow_attr {
451 struct mlx5_eswitch_rep *in_rep;
452 struct mlx5_core_dev *in_mdev;
453 struct mlx5_core_dev *counter_dev;
458 __be16 vlan_proto[MLX5_FS_VLAN_DEPTH];
459 u16 vlan_vid[MLX5_FS_VLAN_DEPTH];
460 u8 vlan_prio[MLX5_FS_VLAN_DEPTH];
464 struct mlx5_eswitch_rep *rep;
465 struct mlx5_pkt_reformat *pkt_reformat;
466 struct mlx5_core_dev *mdev;
467 struct mlx5_termtbl_handle *termtbl;
468 int src_port_rewrite_act_id;
469 } dests[MLX5_MAX_FLOW_FWD_VPORTS];
470 struct mlx5_rx_tun_attr *rx_tun_attr;
471 struct mlx5_pkt_reformat *decap_pkt_reformat;
472 struct mlx5_sample_attr *sample;
475 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
476 struct netlink_ext_ack *extack);
477 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
478 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
479 struct netlink_ext_ack *extack);
480 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
481 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
482 enum devlink_eswitch_encap_mode encap,
483 struct netlink_ext_ack *extack);
484 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink,
485 enum devlink_eswitch_encap_mode *encap);
486 int mlx5_devlink_port_function_hw_addr_get(struct devlink *devlink,
487 struct devlink_port *port,
488 u8 *hw_addr, int *hw_addr_len,
489 struct netlink_ext_ack *extack);
490 int mlx5_devlink_port_function_hw_addr_set(struct devlink *devlink,
491 struct devlink_port *port,
492 const u8 *hw_addr, int hw_addr_len,
493 struct netlink_ext_ack *extack);
495 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);
497 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
498 struct mlx5_flow_attr *attr);
499 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
500 struct mlx5_flow_attr *attr);
501 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
502 u16 vport, u16 vlan, u8 qos, u8 set_flags);
504 static inline bool mlx5_esw_qos_enabled(struct mlx5_eswitch *esw)
506 return esw->qos.enabled;
509 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev,
512 bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) &&
513 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan);
518 return ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) &&
519 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2);
522 bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0,
523 struct mlx5_core_dev *dev1);
524 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
525 struct mlx5_core_dev *dev1);
527 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev);
529 #define MLX5_DEBUG_ESWITCH_MASK BIT(3)
531 #define esw_info(__dev, format, ...) \
532 dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
534 #define esw_warn(__dev, format, ...) \
535 dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
537 #define esw_debug(dev, format, ...) \
538 mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
540 static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw)
542 return esw && MLX5_ESWITCH_MANAGER(esw->dev);
545 /* The returned number is valid only when the dev is eswitch manager. */
546 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev)
548 return mlx5_core_is_ecpf_esw_manager(dev) ?
549 MLX5_VPORT_ECPF : MLX5_VPORT_PF;
553 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num)
555 return esw->manager_vport == vport_num;
558 static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev)
560 return mlx5_core_is_ecpf_esw_manager(dev) ?
561 MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF;
564 static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev)
566 return mlx5_core_is_ecpf_esw_manager(dev);
569 static inline unsigned int
570 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
573 return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num;
577 mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)
579 return dl_port_index & 0xffff;
582 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */
583 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
585 /* Each mark identifies eswitch vport type.
586 * MLX5_ESW_VPT_HOST_FN is used to identify both PF and VF ports using
588 * MLX5_ESW_VPT_VF identifies a SRIOV VF vport.
589 * MLX5_ESW_VPT_SF identifies SF vport.
591 #define MLX5_ESW_VPT_HOST_FN XA_MARK_0
592 #define MLX5_ESW_VPT_VF XA_MARK_1
593 #define MLX5_ESW_VPT_SF XA_MARK_2
595 /* The vport iterator is valid only after vport are initialized in mlx5_eswitch_init.
596 * Borrowed the idea from xa_for_each_marked() but with support for desired last element.
599 #define mlx5_esw_for_each_vport(esw, index, vport) \
600 xa_for_each(&((esw)->vports), index, vport)
602 #define mlx5_esw_for_each_entry_marked(xa, index, entry, last, filter) \
603 for (index = 0, entry = xa_find(xa, &index, last, filter); \
604 entry; entry = xa_find_after(xa, &index, last, filter))
606 #define mlx5_esw_for_each_vport_marked(esw, index, vport, last, filter) \
607 mlx5_esw_for_each_entry_marked(&((esw)->vports), index, vport, last, filter)
609 #define mlx5_esw_for_each_vf_vport(esw, index, vport, last) \
610 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_VF)
612 #define mlx5_esw_for_each_host_func_vport(esw, index, vport, last) \
613 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_HOST_FN)
615 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink);
616 struct mlx5_vport *__must_check
617 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num);
619 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num);
620 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num);
622 int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data);
625 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
626 enum mlx5_eswitch_vport_event enabled_events);
627 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw);
629 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, u16 vport_num,
630 enum mlx5_eswitch_vport_event enabled_events);
631 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
634 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
635 struct mlx5_vport *vport);
637 esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw,
638 struct mlx5_vport *vport);
640 struct esw_vport_tbl_namespace {
646 struct mlx5_vport_tbl_attr {
650 const struct esw_vport_tbl_namespace *vport_ns;
653 struct mlx5_flow_table *
654 mlx5_esw_vporttbl_get(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
656 mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
658 struct mlx5_flow_handle *
659 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag);
661 int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
662 void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
664 int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num);
665 void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num);
667 int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
668 enum mlx5_eswitch_vport_event enabled_events);
669 void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num);
671 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
672 enum mlx5_eswitch_vport_event enabled_events);
673 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs);
675 int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, u16 vport_num);
676 void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
677 struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num);
679 int mlx5_esw_devlink_sf_port_register(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
680 u16 vport_num, u32 controller, u32 sfnum);
681 void mlx5_esw_devlink_sf_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
683 int mlx5_esw_offloads_sf_vport_enable(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
684 u16 vport_num, u32 controller, u32 sfnum);
685 void mlx5_esw_offloads_sf_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
686 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id);
688 int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num);
689 void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num);
690 int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num);
693 * mlx5_esw_event_info - Indicates eswitch mode changed/changing.
695 * @new_mode: New mode of eswitch.
697 struct mlx5_esw_event_info {
701 int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *n);
702 void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *n);
704 bool mlx5_esw_hold(struct mlx5_core_dev *dev);
705 void mlx5_esw_release(struct mlx5_core_dev *dev);
706 void mlx5_esw_get(struct mlx5_core_dev *dev);
707 void mlx5_esw_put(struct mlx5_core_dev *dev);
708 int mlx5_esw_try_lock(struct mlx5_eswitch *esw);
709 void mlx5_esw_unlock(struct mlx5_eswitch *esw);
711 void esw_vport_change_handle_locked(struct mlx5_vport *vport);
713 bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 controller);
715 #else /* CONFIG_MLX5_ESWITCH */
716 /* eswitch API stubs */
717 static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
718 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
719 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }
720 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf) {}
721 static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; }
722 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
724 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
725 static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
727 return ERR_PTR(-EOPNOTSUPP);
730 static inline struct mlx5_flow_handle *
731 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
733 return ERR_PTR(-EOPNOTSUPP);
736 static inline unsigned int
737 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
742 #endif /* CONFIG_MLX5_ESWITCH */
744 #endif /* __MLX5_ESWITCH_H__ */