2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #ifndef __MLX5_ESWITCH_H__
34 #define __MLX5_ESWITCH_H__
36 #include <linux/if_ether.h>
37 #include <linux/if_link.h>
38 #include <linux/atomic.h>
39 #include <linux/xarray.h>
40 #include <net/devlink.h>
41 #include <linux/mlx5/device.h>
42 #include <linux/mlx5/eswitch.h>
43 #include <linux/mlx5/vport.h>
44 #include <linux/mlx5/fs.h>
46 #include "lib/fs_chains.h"
49 #include "esw/sample.h"
51 enum mlx5_mapped_obj_type {
52 MLX5_MAPPED_OBJ_CHAIN,
53 MLX5_MAPPED_OBJ_SAMPLE,
56 struct mlx5_mapped_obj {
57 enum mlx5_mapped_obj_type type;
68 #ifdef CONFIG_MLX5_ESWITCH
70 #define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15
72 #define MLX5_MAX_UC_PER_VPORT(dev) \
73 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
75 #define MLX5_MAX_MC_PER_VPORT(dev) \
76 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
78 #define MLX5_MIN_BW_SHARE 1
80 #define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \
81 min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit)
83 #define mlx5_esw_has_fwd_fdb(dev) \
84 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
86 #define esw_chains(esw) \
87 ((esw)->fdb_table.offloads.esw_chains_priv)
92 MAPPING_TYPE_TUNNEL_ENC_OPTS,
97 struct vport_ingress {
98 struct mlx5_flow_table *acl;
99 struct mlx5_flow_handle *allow_rule;
101 struct mlx5_flow_group *allow_spoofchk_only_grp;
102 struct mlx5_flow_group *allow_untagged_spoofchk_grp;
103 struct mlx5_flow_group *allow_untagged_only_grp;
104 struct mlx5_flow_group *drop_grp;
105 struct mlx5_flow_handle *drop_rule;
106 struct mlx5_fc *drop_counter;
109 /* Optional group to add an FTE to do internal priority
110 * tagging on ingress packets.
112 struct mlx5_flow_group *metadata_prio_tag_grp;
113 /* Group to add default match-all FTE entry to tag ingress
114 * packet with metadata.
116 struct mlx5_flow_group *metadata_allmatch_grp;
117 struct mlx5_modify_hdr *modify_metadata;
118 struct mlx5_flow_handle *modify_metadata_rule;
122 struct vport_egress {
123 struct mlx5_flow_table *acl;
124 struct mlx5_flow_handle *allowed_vlan;
125 struct mlx5_flow_group *vlan_grp;
128 struct mlx5_flow_group *drop_grp;
129 struct mlx5_flow_handle *drop_rule;
130 struct mlx5_fc *drop_counter;
133 struct mlx5_flow_group *fwd_grp;
134 struct mlx5_flow_handle *fwd_rule;
135 struct mlx5_flow_handle *bounce_rule;
136 struct mlx5_flow_group *bounce_grp;
141 struct mlx5_vport_drop_stats {
146 struct mlx5_vport_info {
156 /* Vport context events */
157 enum mlx5_eswitch_vport_event {
158 MLX5_VPORT_UC_ADDR_CHANGE = BIT(0),
159 MLX5_VPORT_MC_ADDR_CHANGE = BIT(1),
160 MLX5_VPORT_PROMISC_CHANGE = BIT(3),
163 struct mlx5_esw_bridge;
166 struct mlx5_core_dev *dev;
167 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
168 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
169 struct mlx5_flow_handle *promisc_rule;
170 struct mlx5_flow_handle *allmulti_rule;
171 struct work_struct vport_change_handler;
173 struct vport_ingress ingress;
174 struct vport_egress egress;
175 u32 default_metadata;
178 struct mlx5_vport_info info;
190 enum mlx5_eswitch_vport_event enabled_events;
192 struct devlink_port *dl_port;
193 struct mlx5_esw_bridge *bridge;
196 struct mlx5_esw_indir_table;
198 struct mlx5_eswitch_fdb {
201 struct mlx5_flow_table *fdb;
202 struct mlx5_flow_group *addr_grp;
203 struct mlx5_flow_group *allmulti_grp;
204 struct mlx5_flow_group *promisc_grp;
205 struct mlx5_flow_table *vepa_fdb;
206 struct mlx5_flow_handle *vepa_uplink_rule;
207 struct mlx5_flow_handle *vepa_star_rule;
210 struct offloads_fdb {
211 struct mlx5_flow_namespace *ns;
212 struct mlx5_flow_table *tc_miss_table;
213 struct mlx5_flow_table *slow_fdb;
214 struct mlx5_flow_group *send_to_vport_grp;
215 struct mlx5_flow_group *send_to_vport_meta_grp;
216 struct mlx5_flow_group *peer_miss_grp;
217 struct mlx5_flow_handle **peer_miss_rules;
218 struct mlx5_flow_group *miss_grp;
219 struct mlx5_flow_handle **send_to_vport_meta_rules;
220 struct mlx5_flow_handle *miss_rule_uni;
221 struct mlx5_flow_handle *miss_rule_multi;
222 int vlan_push_pop_refcount;
224 struct mlx5_fs_chains *esw_chains_priv;
226 DECLARE_HASHTABLE(table, 8);
227 /* Protects vports.table */
231 struct mlx5_esw_indir_table *indir;
238 struct mlx5_esw_offload {
239 struct mlx5_flow_table *ft_offloads_restore;
240 struct mlx5_flow_group *restore_group;
241 struct mlx5_modify_hdr *restore_copy_hdr_id;
242 struct mapping_ctx *reg_c0_obj_pool;
244 struct mlx5_flow_table *ft_offloads;
245 struct mlx5_flow_group *vport_rx_group;
246 struct xarray vport_reps;
247 struct list_head peer_flows;
248 struct mutex peer_mutex;
249 struct mutex encap_tbl_lock; /* protects encap_tbl */
250 DECLARE_HASHTABLE(encap_tbl, 8);
251 struct mutex decap_tbl_lock; /* protects decap_tbl */
252 DECLARE_HASHTABLE(decap_tbl, 8);
253 struct mod_hdr_tbl mod_hdr;
254 DECLARE_HASHTABLE(termtbl_tbl, 8);
255 struct mutex termtbl_mutex; /* protects termtbl hash */
256 struct xarray vhca_map;
257 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
259 atomic64_t num_flows;
260 enum devlink_eswitch_encap_mode encap;
261 struct ida vport_metadata_ida;
262 unsigned int host_number; /* ECPF supports one external host */
265 /* E-Switch MC FDB table hash node */
266 struct esw_mc_addr { /* SRIOV only */
267 struct l2addr_node node;
268 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
272 struct mlx5_host_work {
273 struct work_struct work;
274 struct mlx5_eswitch *esw;
277 struct mlx5_esw_functions {
283 MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0),
284 MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1),
287 struct mlx5_esw_bridge_offloads;
289 struct mlx5_eswitch {
290 struct mlx5_core_dev *dev;
292 struct mlx5_eswitch_fdb fdb_table;
293 /* legacy data structures */
294 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
295 struct esw_mc_addr mc_promisc;
297 struct workqueue_struct *work_queue;
298 struct xarray vports;
302 /* Synchronize between vport change events
303 * and async SRIOV admin state changes
305 struct mutex state_lock;
307 /* Protects eswitch mode change that occurs via one or more
308 * user commands, i.e. sriov state change, devlink commands.
310 struct rw_semaphore mode_lock;
311 atomic64_t user_count;
318 struct mlx5_esw_bridge_offloads *br_offloads;
319 struct mlx5_esw_offload offloads;
322 u16 first_host_vport;
323 struct mlx5_esw_functions esw_funcs;
327 struct blocking_notifier_head n_head;
328 struct lock_class_key mode_lock_key;
331 void esw_offloads_disable(struct mlx5_eswitch *esw);
332 int esw_offloads_enable(struct mlx5_eswitch *esw);
333 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw);
334 int esw_offloads_init_reps(struct mlx5_eswitch *esw);
336 bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw);
337 int mlx5_esw_offloads_vport_metadata_set(struct mlx5_eswitch *esw, bool enable);
338 u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw);
339 void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata);
341 int mlx5_esw_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num,
345 int mlx5_eswitch_init(struct mlx5_core_dev *dev);
346 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
348 #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1)
349 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int mode, int num_vfs);
350 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);
351 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw, bool clear_vf);
352 void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf);
353 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
354 u16 vport, const u8 *mac);
355 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
356 u16 vport, int link_state);
357 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
358 u16 vport, u16 vlan, u8 qos);
359 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
360 u16 vport, bool spoofchk);
361 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
362 u16 vport_num, bool setting);
363 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
364 u32 max_rate, u32 min_rate);
365 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
366 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
367 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
368 u16 vport, struct ifla_vf_info *ivi);
369 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
371 struct ifla_vf_stats *vf_stats);
372 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
374 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
375 bool other_vport, void *in);
377 struct mlx5_flow_spec;
378 struct mlx5_esw_flow_attr;
379 struct mlx5_termtbl_handle;
382 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
383 struct mlx5_flow_attr *attr,
384 struct mlx5_flow_act *flow_act,
385 struct mlx5_flow_spec *spec);
387 struct mlx5_flow_handle *
388 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw,
389 struct mlx5_flow_table *ft,
390 struct mlx5_flow_spec *spec,
391 struct mlx5_esw_flow_attr *attr,
392 struct mlx5_flow_act *flow_act,
393 struct mlx5_flow_destination *dest,
397 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw,
398 struct mlx5_termtbl_handle *tt);
401 mlx5_eswitch_clear_rule_source_port(struct mlx5_eswitch *esw, struct mlx5_flow_spec *spec);
403 struct mlx5_flow_handle *
404 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
405 struct mlx5_flow_spec *spec,
406 struct mlx5_flow_attr *attr);
407 struct mlx5_flow_handle *
408 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw,
409 struct mlx5_flow_spec *spec,
410 struct mlx5_flow_attr *attr);
412 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
413 struct mlx5_flow_handle *rule,
414 struct mlx5_flow_attr *attr);
416 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw,
417 struct mlx5_flow_handle *rule,
418 struct mlx5_flow_attr *attr);
420 struct mlx5_flow_handle *
421 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
422 struct mlx5_flow_destination *dest);
425 SET_VLAN_STRIP = BIT(0),
426 SET_VLAN_INSERT = BIT(1)
429 enum mlx5_flow_match_level {
430 MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE,
431 MLX5_MATCH_L2 = MLX5_INLINE_MODE_L2,
432 MLX5_MATCH_L3 = MLX5_INLINE_MODE_IP,
433 MLX5_MATCH_L4 = MLX5_INLINE_MODE_TCP_UDP,
436 /* current maximum for flow based vport multicasting */
437 #define MLX5_MAX_FLOW_FWD_VPORTS 2
440 MLX5_ESW_DEST_ENCAP = BIT(0),
441 MLX5_ESW_DEST_ENCAP_VALID = BIT(1),
442 MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2),
446 MLX5_ESW_ATTR_FLAG_VLAN_HANDLED = BIT(0),
447 MLX5_ESW_ATTR_FLAG_SLOW_PATH = BIT(1),
448 MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2),
449 MLX5_ESW_ATTR_FLAG_SRC_REWRITE = BIT(3),
450 MLX5_ESW_ATTR_FLAG_SAMPLE = BIT(4),
453 struct mlx5_esw_flow_attr {
454 struct mlx5_eswitch_rep *in_rep;
455 struct mlx5_core_dev *in_mdev;
456 struct mlx5_core_dev *counter_dev;
461 __be16 vlan_proto[MLX5_FS_VLAN_DEPTH];
462 u16 vlan_vid[MLX5_FS_VLAN_DEPTH];
463 u8 vlan_prio[MLX5_FS_VLAN_DEPTH];
467 struct mlx5_eswitch_rep *rep;
468 struct mlx5_pkt_reformat *pkt_reformat;
469 struct mlx5_core_dev *mdev;
470 struct mlx5_termtbl_handle *termtbl;
471 int src_port_rewrite_act_id;
472 } dests[MLX5_MAX_FLOW_FWD_VPORTS];
473 struct mlx5_rx_tun_attr *rx_tun_attr;
474 struct mlx5_pkt_reformat *decap_pkt_reformat;
475 struct mlx5_sample_attr *sample;
478 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
479 struct netlink_ext_ack *extack);
480 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
481 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
482 struct netlink_ext_ack *extack);
483 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
484 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
485 enum devlink_eswitch_encap_mode encap,
486 struct netlink_ext_ack *extack);
487 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink,
488 enum devlink_eswitch_encap_mode *encap);
489 int mlx5_devlink_port_function_hw_addr_get(struct devlink *devlink,
490 struct devlink_port *port,
491 u8 *hw_addr, int *hw_addr_len,
492 struct netlink_ext_ack *extack);
493 int mlx5_devlink_port_function_hw_addr_set(struct devlink *devlink,
494 struct devlink_port *port,
495 const u8 *hw_addr, int hw_addr_len,
496 struct netlink_ext_ack *extack);
498 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);
500 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
501 struct mlx5_flow_attr *attr);
502 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
503 struct mlx5_flow_attr *attr);
504 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
505 u16 vport, u16 vlan, u8 qos, u8 set_flags);
507 static inline bool mlx5_esw_qos_enabled(struct mlx5_eswitch *esw)
509 return esw->qos.enabled;
512 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev,
515 bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) &&
516 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan);
521 return ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) &&
522 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2);
525 bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0,
526 struct mlx5_core_dev *dev1);
527 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
528 struct mlx5_core_dev *dev1);
530 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev);
532 #define MLX5_DEBUG_ESWITCH_MASK BIT(3)
534 #define esw_info(__dev, format, ...) \
535 dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
537 #define esw_warn(__dev, format, ...) \
538 dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
540 #define esw_debug(dev, format, ...) \
541 mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
543 static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw)
545 return esw && MLX5_ESWITCH_MANAGER(esw->dev);
548 /* The returned number is valid only when the dev is eswitch manager. */
549 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev)
551 return mlx5_core_is_ecpf_esw_manager(dev) ?
552 MLX5_VPORT_ECPF : MLX5_VPORT_PF;
556 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num)
558 return esw->manager_vport == vport_num;
561 static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev)
563 return mlx5_core_is_ecpf_esw_manager(dev) ?
564 MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF;
567 static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev)
569 return mlx5_core_is_ecpf_esw_manager(dev);
572 static inline unsigned int
573 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
576 return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num;
580 mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)
582 return dl_port_index & 0xffff;
585 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */
586 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
588 /* Each mark identifies eswitch vport type.
589 * MLX5_ESW_VPT_HOST_FN is used to identify both PF and VF ports using
591 * MLX5_ESW_VPT_VF identifies a SRIOV VF vport.
592 * MLX5_ESW_VPT_SF identifies SF vport.
594 #define MLX5_ESW_VPT_HOST_FN XA_MARK_0
595 #define MLX5_ESW_VPT_VF XA_MARK_1
596 #define MLX5_ESW_VPT_SF XA_MARK_2
598 /* The vport iterator is valid only after vport are initialized in mlx5_eswitch_init.
599 * Borrowed the idea from xa_for_each_marked() but with support for desired last element.
602 #define mlx5_esw_for_each_vport(esw, index, vport) \
603 xa_for_each(&((esw)->vports), index, vport)
605 #define mlx5_esw_for_each_entry_marked(xa, index, entry, last, filter) \
606 for (index = 0, entry = xa_find(xa, &index, last, filter); \
607 entry; entry = xa_find_after(xa, &index, last, filter))
609 #define mlx5_esw_for_each_vport_marked(esw, index, vport, last, filter) \
610 mlx5_esw_for_each_entry_marked(&((esw)->vports), index, vport, last, filter)
612 #define mlx5_esw_for_each_vf_vport(esw, index, vport, last) \
613 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_VF)
615 #define mlx5_esw_for_each_host_func_vport(esw, index, vport, last) \
616 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_HOST_FN)
618 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink);
619 struct mlx5_vport *__must_check
620 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num);
622 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num);
623 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num);
625 int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data);
628 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
629 enum mlx5_eswitch_vport_event enabled_events);
630 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw);
632 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, u16 vport_num,
633 enum mlx5_eswitch_vport_event enabled_events);
634 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
637 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
638 struct mlx5_vport *vport);
640 esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw,
641 struct mlx5_vport *vport);
643 struct esw_vport_tbl_namespace {
649 struct mlx5_vport_tbl_attr {
653 const struct esw_vport_tbl_namespace *vport_ns;
656 struct mlx5_flow_table *
657 mlx5_esw_vporttbl_get(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
659 mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
661 struct mlx5_flow_handle *
662 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag);
664 int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
665 void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
667 int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num);
668 void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num);
670 int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
671 enum mlx5_eswitch_vport_event enabled_events);
672 void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num);
674 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
675 enum mlx5_eswitch_vport_event enabled_events);
676 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs);
678 int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, u16 vport_num);
679 void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
680 struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num);
682 int mlx5_esw_devlink_sf_port_register(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
683 u16 vport_num, u32 controller, u32 sfnum);
684 void mlx5_esw_devlink_sf_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
686 int mlx5_esw_offloads_sf_vport_enable(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
687 u16 vport_num, u32 controller, u32 sfnum);
688 void mlx5_esw_offloads_sf_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
689 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id);
691 int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num);
692 void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num);
693 int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num);
696 * mlx5_esw_event_info - Indicates eswitch mode changed/changing.
698 * @new_mode: New mode of eswitch.
700 struct mlx5_esw_event_info {
704 int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *n);
705 void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *n);
707 bool mlx5_esw_hold(struct mlx5_core_dev *dev);
708 void mlx5_esw_release(struct mlx5_core_dev *dev);
709 void mlx5_esw_get(struct mlx5_core_dev *dev);
710 void mlx5_esw_put(struct mlx5_core_dev *dev);
711 int mlx5_esw_try_lock(struct mlx5_eswitch *esw);
712 void mlx5_esw_unlock(struct mlx5_eswitch *esw);
713 void mlx5_esw_lock(struct mlx5_eswitch *esw);
715 void esw_vport_change_handle_locked(struct mlx5_vport *vport);
717 bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 controller);
719 int mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw,
720 struct mlx5_eswitch *slave_esw);
721 void mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw,
722 struct mlx5_eswitch *slave_esw);
723 int mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw);
725 #else /* CONFIG_MLX5_ESWITCH */
726 /* eswitch API stubs */
727 static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
728 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
729 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }
730 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf) {}
731 static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; }
732 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
734 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
735 static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
737 return ERR_PTR(-EOPNOTSUPP);
740 static inline void mlx5_esw_unlock(struct mlx5_eswitch *esw) { return; }
741 static inline void mlx5_esw_lock(struct mlx5_eswitch *esw) { return; }
743 static inline struct mlx5_flow_handle *
744 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
746 return ERR_PTR(-EOPNOTSUPP);
749 static inline unsigned int
750 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
757 mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw,
758 struct mlx5_eswitch *slave_esw)
764 mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw,
765 struct mlx5_eswitch *slave_esw) {}
768 mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw)
772 #endif /* CONFIG_MLX5_ESWITCH */
774 #endif /* __MLX5_ESWITCH_H__ */