2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
41 #define UPLINK_VPORT 0xFFFF
49 /* E-Switch UC L2 table hash node */
51 struct l2addr_node node;
56 /* E-Switch MC FDB table hash node */
57 struct esw_mc_addr { /* SRIOV only */
58 struct l2addr_node node;
59 struct mlx5_flow_rule *uplink_rule; /* Forward to uplink rule */
63 /* Vport UC/MC hash node */
65 struct l2addr_node node;
68 struct mlx5_flow_rule *flow_rule; /* SRIOV only */
69 /* A flag indicating that mac was added due to mc promiscuous vport */
74 UC_ADDR_CHANGE = BIT(0),
75 MC_ADDR_CHANGE = BIT(1),
76 PROMISC_CHANGE = BIT(3),
79 /* Vport context events */
80 #define SRIOV_VPORT_EVENTS (UC_ADDR_CHANGE | \
84 int esw_offloads_init(struct mlx5_eswitch *esw, int nvports);
85 void esw_offloads_cleanup(struct mlx5_eswitch *esw, int nvports);
87 static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
90 int in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)];
91 int out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
95 memset(out, 0, sizeof(out));
96 memset(in, 0, sizeof(in));
98 MLX5_SET(modify_nic_vport_context_in, in,
99 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
100 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
101 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
103 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
104 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
105 in, nic_vport_context);
107 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
109 if (events_mask & UC_ADDR_CHANGE)
110 MLX5_SET(nic_vport_context, nic_vport_ctx,
111 event_on_uc_address_change, 1);
112 if (events_mask & MC_ADDR_CHANGE)
113 MLX5_SET(nic_vport_context, nic_vport_ctx,
114 event_on_mc_address_change, 1);
115 if (events_mask & PROMISC_CHANGE)
116 MLX5_SET(nic_vport_context, nic_vport_ctx,
117 event_on_promisc_change, 1);
119 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
122 err = mlx5_cmd_status_to_err_v2(out);
130 /* E-Switch vport context HW commands */
131 static int query_esw_vport_context_cmd(struct mlx5_core_dev *mdev, u32 vport,
132 u32 *out, int outlen)
134 u32 in[MLX5_ST_SZ_DW(query_esw_vport_context_in)];
136 memset(in, 0, sizeof(in));
138 MLX5_SET(query_nic_vport_context_in, in, opcode,
139 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT);
141 MLX5_SET(query_esw_vport_context_in, in, vport_number, vport);
143 MLX5_SET(query_esw_vport_context_in, in, other_vport, 1);
145 return mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out, outlen);
148 static int query_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
151 u32 out[MLX5_ST_SZ_DW(query_esw_vport_context_out)];
156 memset(out, 0, sizeof(out));
161 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
162 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
165 err = query_esw_vport_context_cmd(dev, vport, out, sizeof(out));
169 cvlan_strip = MLX5_GET(query_esw_vport_context_out, out,
170 esw_vport_context.vport_cvlan_strip);
172 cvlan_insert = MLX5_GET(query_esw_vport_context_out, out,
173 esw_vport_context.vport_cvlan_insert);
175 if (cvlan_strip || cvlan_insert) {
176 *vlan = MLX5_GET(query_esw_vport_context_out, out,
177 esw_vport_context.cvlan_id);
178 *qos = MLX5_GET(query_esw_vport_context_out, out,
179 esw_vport_context.cvlan_pcp);
182 esw_debug(dev, "Query Vport[%d] cvlan: VLAN %d qos=%d\n",
188 static int modify_esw_vport_context_cmd(struct mlx5_core_dev *dev, u16 vport,
191 u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)];
193 memset(out, 0, sizeof(out));
195 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
197 MLX5_SET(modify_esw_vport_context_in, in, other_vport, 1);
199 MLX5_SET(modify_esw_vport_context_in, in, opcode,
200 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
202 return mlx5_cmd_exec_check_status(dev, in, inlen,
206 static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
207 u16 vlan, u8 qos, bool set)
209 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)];
211 memset(in, 0, sizeof(in));
213 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
214 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
217 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%d\n",
218 vport, vlan, qos, set);
221 MLX5_SET(modify_esw_vport_context_in, in,
222 esw_vport_context.vport_cvlan_strip, 1);
223 /* insert only if no vlan in packet */
224 MLX5_SET(modify_esw_vport_context_in, in,
225 esw_vport_context.vport_cvlan_insert, 1);
226 MLX5_SET(modify_esw_vport_context_in, in,
227 esw_vport_context.cvlan_pcp, qos);
228 MLX5_SET(modify_esw_vport_context_in, in,
229 esw_vport_context.cvlan_id, vlan);
232 MLX5_SET(modify_esw_vport_context_in, in,
233 field_select.vport_cvlan_strip, 1);
234 MLX5_SET(modify_esw_vport_context_in, in,
235 field_select.vport_cvlan_insert, 1);
237 return modify_esw_vport_context_cmd(dev, vport, in, sizeof(in));
240 /* HW L2 Table (MPFS) management */
241 static int set_l2_table_entry_cmd(struct mlx5_core_dev *dev, u32 index,
242 u8 *mac, u8 vlan_valid, u16 vlan)
244 u32 in[MLX5_ST_SZ_DW(set_l2_table_entry_in)];
245 u32 out[MLX5_ST_SZ_DW(set_l2_table_entry_out)];
248 memset(in, 0, sizeof(in));
249 memset(out, 0, sizeof(out));
251 MLX5_SET(set_l2_table_entry_in, in, opcode,
252 MLX5_CMD_OP_SET_L2_TABLE_ENTRY);
253 MLX5_SET(set_l2_table_entry_in, in, table_index, index);
254 MLX5_SET(set_l2_table_entry_in, in, vlan_valid, vlan_valid);
255 MLX5_SET(set_l2_table_entry_in, in, vlan, vlan);
257 in_mac_addr = MLX5_ADDR_OF(set_l2_table_entry_in, in, mac_address);
258 ether_addr_copy(&in_mac_addr[2], mac);
260 return mlx5_cmd_exec_check_status(dev, in, sizeof(in),
264 static int del_l2_table_entry_cmd(struct mlx5_core_dev *dev, u32 index)
266 u32 in[MLX5_ST_SZ_DW(delete_l2_table_entry_in)];
267 u32 out[MLX5_ST_SZ_DW(delete_l2_table_entry_out)];
269 memset(in, 0, sizeof(in));
270 memset(out, 0, sizeof(out));
272 MLX5_SET(delete_l2_table_entry_in, in, opcode,
273 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
274 MLX5_SET(delete_l2_table_entry_in, in, table_index, index);
275 return mlx5_cmd_exec_check_status(dev, in, sizeof(in),
279 static int alloc_l2_table_index(struct mlx5_l2_table *l2_table, u32 *ix)
283 *ix = find_first_zero_bit(l2_table->bitmap, l2_table->size);
284 if (*ix >= l2_table->size)
287 __set_bit(*ix, l2_table->bitmap);
292 static void free_l2_table_index(struct mlx5_l2_table *l2_table, u32 ix)
294 __clear_bit(ix, l2_table->bitmap);
297 static int set_l2_table_entry(struct mlx5_core_dev *dev, u8 *mac,
298 u8 vlan_valid, u16 vlan,
301 struct mlx5_l2_table *l2_table = &dev->priv.eswitch->l2_table;
304 err = alloc_l2_table_index(l2_table, index);
308 err = set_l2_table_entry_cmd(dev, *index, mac, vlan_valid, vlan);
310 free_l2_table_index(l2_table, *index);
315 static void del_l2_table_entry(struct mlx5_core_dev *dev, u32 index)
317 struct mlx5_l2_table *l2_table = &dev->priv.eswitch->l2_table;
319 del_l2_table_entry_cmd(dev, index);
320 free_l2_table_index(l2_table, index);
324 static struct mlx5_flow_rule *
325 __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u32 vport, bool rx_rule,
326 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
328 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
329 MLX5_MATCH_OUTER_HEADERS);
330 struct mlx5_flow_rule *flow_rule = NULL;
331 struct mlx5_flow_destination dest;
332 struct mlx5_flow_spec *spec;
333 void *mv_misc = NULL;
334 void *mc_misc = NULL;
339 match_header |= MLX5_MATCH_MISC_PARAMETERS;
341 spec = mlx5_vzalloc(sizeof(*spec));
343 pr_warn("FDB: Failed to alloc match parameters\n");
346 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
347 outer_headers.dmac_47_16);
348 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
349 outer_headers.dmac_47_16);
351 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
352 ether_addr_copy(dmac_v, mac_v);
353 ether_addr_copy(dmac_c, mac_c);
356 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
357 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
359 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
361 MLX5_SET(fte_match_set_misc, mv_misc, source_port, UPLINK_VPORT);
362 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
365 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
366 dest.vport_num = vport;
369 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
370 dmac_v, dmac_c, vport);
371 spec->match_criteria_enable = match_header;
373 mlx5_add_flow_rule(esw->fdb_table.fdb, spec,
374 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,
376 if (IS_ERR(flow_rule)) {
378 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",
379 dmac_v, dmac_c, vport, PTR_ERR(flow_rule));
387 static struct mlx5_flow_rule *
388 esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u32 vport)
392 eth_broadcast_addr(mac_c);
393 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
396 static struct mlx5_flow_rule *
397 esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u32 vport)
402 eth_zero_addr(mac_c);
403 eth_zero_addr(mac_v);
406 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
409 static struct mlx5_flow_rule *
410 esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u32 vport)
415 eth_zero_addr(mac_c);
416 eth_zero_addr(mac_v);
417 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
420 static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw, int nvports)
422 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
423 struct mlx5_core_dev *dev = esw->dev;
424 struct mlx5_flow_namespace *root_ns;
425 struct mlx5_flow_table *fdb;
426 struct mlx5_flow_group *g;
427 void *match_criteria;
433 esw_debug(dev, "Create FDB log_max_size(%d)\n",
434 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
436 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
438 esw_warn(dev, "Failed to get FDB flow namespace\n");
442 flow_group_in = mlx5_vzalloc(inlen);
445 memset(flow_group_in, 0, inlen);
447 table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
448 fdb = mlx5_create_flow_table(root_ns, 0, table_size, 0);
451 esw_warn(dev, "Failed to create FDB Table err %d\n", err);
454 esw->fdb_table.fdb = fdb;
456 /* Addresses group : Full match unicast/multicast addresses */
457 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
458 MLX5_MATCH_OUTER_HEADERS);
459 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
460 dmac = MLX5_ADDR_OF(fte_match_param, match_criteria, outer_headers.dmac_47_16);
461 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
462 /* Preserve 2 entries for allmulti and promisc rules*/
463 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 3);
464 eth_broadcast_addr(dmac);
465 g = mlx5_create_flow_group(fdb, flow_group_in);
468 esw_warn(dev, "Failed to create flow group err(%d)\n", err);
471 esw->fdb_table.legacy.addr_grp = g;
473 /* Allmulti group : One rule that forwards any mcast traffic */
474 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
475 MLX5_MATCH_OUTER_HEADERS);
476 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 2);
477 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 2);
480 g = mlx5_create_flow_group(fdb, flow_group_in);
483 esw_warn(dev, "Failed to create allmulti flow group err(%d)\n", err);
486 esw->fdb_table.legacy.allmulti_grp = g;
488 /* Promiscuous group :
489 * One rule that forward all unmatched traffic from previous groups
492 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
493 MLX5_MATCH_MISC_PARAMETERS);
494 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
495 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 1);
496 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 1);
497 g = mlx5_create_flow_group(fdb, flow_group_in);
500 esw_warn(dev, "Failed to create promisc flow group err(%d)\n", err);
503 esw->fdb_table.legacy.promisc_grp = g;
507 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.allmulti_grp)) {
508 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
509 esw->fdb_table.legacy.allmulti_grp = NULL;
511 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.addr_grp)) {
512 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
513 esw->fdb_table.legacy.addr_grp = NULL;
515 if (!IS_ERR_OR_NULL(esw->fdb_table.fdb)) {
516 mlx5_destroy_flow_table(esw->fdb_table.fdb);
517 esw->fdb_table.fdb = NULL;
521 kvfree(flow_group_in);
525 static void esw_destroy_legacy_fdb_table(struct mlx5_eswitch *esw)
527 if (!esw->fdb_table.fdb)
530 esw_debug(esw->dev, "Destroy FDB Table\n");
531 mlx5_destroy_flow_group(esw->fdb_table.legacy.promisc_grp);
532 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
533 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
534 mlx5_destroy_flow_table(esw->fdb_table.fdb);
535 esw->fdb_table.fdb = NULL;
536 esw->fdb_table.legacy.addr_grp = NULL;
537 esw->fdb_table.legacy.allmulti_grp = NULL;
538 esw->fdb_table.legacy.promisc_grp = NULL;
541 /* E-Switch vport UC/MC lists management */
542 typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
543 struct vport_addr *vaddr);
545 static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
547 struct hlist_head *hash = esw->l2_table.l2_hash;
548 struct esw_uc_addr *esw_uc;
549 u8 *mac = vaddr->node.addr;
550 u32 vport = vaddr->vport;
553 esw_uc = l2addr_hash_find(hash, mac, struct esw_uc_addr);
556 "Failed to set L2 mac(%pM) for vport(%d), mac is already in use by vport(%d)\n",
557 mac, vport, esw_uc->vport);
561 esw_uc = l2addr_hash_add(hash, mac, struct esw_uc_addr, GFP_KERNEL);
564 esw_uc->vport = vport;
566 err = set_l2_table_entry(esw->dev, mac, 0, 0, &esw_uc->table_index);
570 /* SRIOV is enabled: Forward UC MAC to vport */
571 if (esw->fdb_table.fdb && esw->mode == SRIOV_LEGACY)
572 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
574 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM index:%d fr(%p)\n",
575 vport, mac, esw_uc->table_index, vaddr->flow_rule);
578 l2addr_hash_del(esw_uc);
582 static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
584 struct hlist_head *hash = esw->l2_table.l2_hash;
585 struct esw_uc_addr *esw_uc;
586 u8 *mac = vaddr->node.addr;
587 u32 vport = vaddr->vport;
589 esw_uc = l2addr_hash_find(hash, mac, struct esw_uc_addr);
590 if (!esw_uc || esw_uc->vport != vport) {
592 "MAC(%pM) doesn't belong to vport (%d)\n",
596 esw_debug(esw->dev, "\tDELETE UC MAC: vport[%d] %pM index:%d fr(%p)\n",
597 vport, mac, esw_uc->table_index, vaddr->flow_rule);
599 del_l2_table_entry(esw->dev, esw_uc->table_index);
601 if (vaddr->flow_rule)
602 mlx5_del_flow_rule(vaddr->flow_rule);
603 vaddr->flow_rule = NULL;
605 l2addr_hash_del(esw_uc);
609 static void update_allmulti_vports(struct mlx5_eswitch *esw,
610 struct vport_addr *vaddr,
611 struct esw_mc_addr *esw_mc)
613 u8 *mac = vaddr->node.addr;
616 for (vport_idx = 0; vport_idx < esw->total_vports; vport_idx++) {
617 struct mlx5_vport *vport = &esw->vports[vport_idx];
618 struct hlist_head *vport_hash = vport->mc_list;
619 struct vport_addr *iter_vaddr =
620 l2addr_hash_find(vport_hash,
623 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
624 vaddr->vport == vport_idx)
626 switch (vaddr->action) {
627 case MLX5_ACTION_ADD:
630 iter_vaddr = l2addr_hash_add(vport_hash, mac,
635 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
639 iter_vaddr->vport = vport_idx;
640 iter_vaddr->flow_rule =
641 esw_fdb_set_vport_rule(esw,
644 iter_vaddr->mc_promisc = true;
646 case MLX5_ACTION_DEL:
649 mlx5_del_flow_rule(iter_vaddr->flow_rule);
650 l2addr_hash_del(iter_vaddr);
656 static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
658 struct hlist_head *hash = esw->mc_table;
659 struct esw_mc_addr *esw_mc;
660 u8 *mac = vaddr->node.addr;
661 u32 vport = vaddr->vport;
663 if (!esw->fdb_table.fdb)
666 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
670 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
674 esw_mc->uplink_rule = /* Forward MC MAC to Uplink */
675 esw_fdb_set_vport_rule(esw, mac, UPLINK_VPORT);
677 /* Add this multicast mac to all the mc promiscuous vports */
678 update_allmulti_vports(esw, vaddr, esw_mc);
681 /* If the multicast mac is added as a result of mc promiscuous vport,
682 * don't increment the multicast ref count
684 if (!vaddr->mc_promisc)
687 /* Forward MC MAC to vport */
688 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
690 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
691 vport, mac, vaddr->flow_rule,
692 esw_mc->refcnt, esw_mc->uplink_rule);
696 static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
698 struct hlist_head *hash = esw->mc_table;
699 struct esw_mc_addr *esw_mc;
700 u8 *mac = vaddr->node.addr;
701 u32 vport = vaddr->vport;
703 if (!esw->fdb_table.fdb)
706 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
709 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
714 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
715 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
716 esw_mc->uplink_rule);
718 if (vaddr->flow_rule)
719 mlx5_del_flow_rule(vaddr->flow_rule);
720 vaddr->flow_rule = NULL;
722 /* If the multicast mac is added as a result of mc promiscuous vport,
723 * don't decrement the multicast ref count.
725 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
728 /* Remove this multicast mac from all the mc promiscuous vports */
729 update_allmulti_vports(esw, vaddr, esw_mc);
731 if (esw_mc->uplink_rule)
732 mlx5_del_flow_rule(esw_mc->uplink_rule);
734 l2addr_hash_del(esw_mc);
738 /* Apply vport UC/MC list to HW l2 table and FDB table */
739 static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
740 u32 vport_num, int list_type)
742 struct mlx5_vport *vport = &esw->vports[vport_num];
743 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
744 vport_addr_action vport_addr_add;
745 vport_addr_action vport_addr_del;
746 struct vport_addr *addr;
747 struct l2addr_node *node;
748 struct hlist_head *hash;
749 struct hlist_node *tmp;
752 vport_addr_add = is_uc ? esw_add_uc_addr :
754 vport_addr_del = is_uc ? esw_del_uc_addr :
757 hash = is_uc ? vport->uc_list : vport->mc_list;
758 for_each_l2hash_node(node, tmp, hash, hi) {
759 addr = container_of(node, struct vport_addr, node);
760 switch (addr->action) {
761 case MLX5_ACTION_ADD:
762 vport_addr_add(esw, addr);
763 addr->action = MLX5_ACTION_NONE;
765 case MLX5_ACTION_DEL:
766 vport_addr_del(esw, addr);
767 l2addr_hash_del(addr);
773 /* Sync vport UC/MC list from vport context */
774 static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
775 u32 vport_num, int list_type)
777 struct mlx5_vport *vport = &esw->vports[vport_num];
778 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
779 u8 (*mac_list)[ETH_ALEN];
780 struct l2addr_node *node;
781 struct vport_addr *addr;
782 struct hlist_head *hash;
783 struct hlist_node *tmp;
789 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
790 MLX5_MAX_MC_PER_VPORT(esw->dev);
792 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
796 hash = is_uc ? vport->uc_list : vport->mc_list;
798 for_each_l2hash_node(node, tmp, hash, hi) {
799 addr = container_of(node, struct vport_addr, node);
800 addr->action = MLX5_ACTION_DEL;
806 err = mlx5_query_nic_vport_mac_list(esw->dev, vport_num, list_type,
810 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
811 vport_num, is_uc ? "UC" : "MC", size);
813 for (i = 0; i < size; i++) {
814 if (is_uc && !is_valid_ether_addr(mac_list[i]))
817 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
820 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
822 addr->action = MLX5_ACTION_NONE;
823 /* If this mac was previously added because of allmulti
824 * promiscuous rx mode, its now converted to be original
827 if (addr->mc_promisc) {
828 struct esw_mc_addr *esw_mc =
829 l2addr_hash_find(esw->mc_table,
834 "Failed to MAC(%pM) in mcast DB\n",
839 addr->mc_promisc = false;
844 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
848 "Failed to add MAC(%pM) to vport[%d] DB\n",
849 mac_list[i], vport_num);
852 addr->vport = vport_num;
853 addr->action = MLX5_ACTION_ADD;
859 /* Sync vport UC/MC list from vport context
860 * Must be called after esw_update_vport_addr_list
862 static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw, u32 vport_num)
864 struct mlx5_vport *vport = &esw->vports[vport_num];
865 struct l2addr_node *node;
866 struct vport_addr *addr;
867 struct hlist_head *hash;
868 struct hlist_node *tmp;
871 hash = vport->mc_list;
873 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
874 u8 *mac = node->addr;
876 addr = l2addr_hash_find(hash, mac, struct vport_addr);
878 if (addr->action == MLX5_ACTION_DEL)
879 addr->action = MLX5_ACTION_NONE;
882 addr = l2addr_hash_add(hash, mac, struct vport_addr,
886 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
890 addr->vport = vport_num;
891 addr->action = MLX5_ACTION_ADD;
892 addr->mc_promisc = true;
896 /* Apply vport rx mode to HW FDB table */
897 static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num,
898 bool promisc, bool mc_promisc)
900 struct esw_mc_addr *allmulti_addr = esw->mc_promisc;
901 struct mlx5_vport *vport = &esw->vports[vport_num];
903 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
907 vport->allmulti_rule =
908 esw_fdb_set_vport_allmulti_rule(esw, vport_num);
909 if (!allmulti_addr->uplink_rule)
910 allmulti_addr->uplink_rule =
911 esw_fdb_set_vport_allmulti_rule(esw,
913 allmulti_addr->refcnt++;
914 } else if (vport->allmulti_rule) {
915 mlx5_del_flow_rule(vport->allmulti_rule);
916 vport->allmulti_rule = NULL;
918 if (--allmulti_addr->refcnt > 0)
921 if (allmulti_addr->uplink_rule)
922 mlx5_del_flow_rule(allmulti_addr->uplink_rule);
923 allmulti_addr->uplink_rule = NULL;
927 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
931 vport->promisc_rule = esw_fdb_set_vport_promisc_rule(esw,
933 } else if (vport->promisc_rule) {
934 mlx5_del_flow_rule(vport->promisc_rule);
935 vport->promisc_rule = NULL;
939 /* Sync vport rx mode from vport context */
940 static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num)
942 struct mlx5_vport *vport = &esw->vports[vport_num];
948 err = mlx5_query_nic_vport_promisc(esw->dev,
955 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
956 vport_num, promisc_all, promisc_mc);
958 if (!vport->trusted || !vport->enabled) {
964 esw_apply_vport_rx_mode(esw, vport_num, promisc_all,
965 (promisc_all || promisc_mc));
968 static void esw_vport_change_handle_locked(struct mlx5_vport *vport)
970 struct mlx5_core_dev *dev = vport->dev;
971 struct mlx5_eswitch *esw = dev->priv.eswitch;
974 mlx5_query_nic_vport_mac_address(dev, vport->vport, mac);
975 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
978 if (vport->enabled_events & UC_ADDR_CHANGE) {
979 esw_update_vport_addr_list(esw, vport->vport,
980 MLX5_NVPRT_LIST_TYPE_UC);
981 esw_apply_vport_addr_list(esw, vport->vport,
982 MLX5_NVPRT_LIST_TYPE_UC);
985 if (vport->enabled_events & MC_ADDR_CHANGE) {
986 esw_update_vport_addr_list(esw, vport->vport,
987 MLX5_NVPRT_LIST_TYPE_MC);
990 if (vport->enabled_events & PROMISC_CHANGE) {
991 esw_update_vport_rx_mode(esw, vport->vport);
992 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
993 esw_update_vport_mc_promisc(esw, vport->vport);
996 if (vport->enabled_events & (PROMISC_CHANGE | MC_ADDR_CHANGE)) {
997 esw_apply_vport_addr_list(esw, vport->vport,
998 MLX5_NVPRT_LIST_TYPE_MC);
1001 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
1003 arm_vport_context_events_cmd(dev, vport->vport,
1004 vport->enabled_events);
1007 static void esw_vport_change_handler(struct work_struct *work)
1009 struct mlx5_vport *vport =
1010 container_of(work, struct mlx5_vport, vport_change_handler);
1011 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
1013 mutex_lock(&esw->state_lock);
1014 esw_vport_change_handle_locked(vport);
1015 mutex_unlock(&esw->state_lock);
1018 static void esw_vport_enable_egress_acl(struct mlx5_eswitch *esw,
1019 struct mlx5_vport *vport)
1021 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
1022 struct mlx5_flow_group *vlan_grp = NULL;
1023 struct mlx5_flow_group *drop_grp = NULL;
1024 struct mlx5_core_dev *dev = esw->dev;
1025 struct mlx5_flow_namespace *root_ns;
1026 struct mlx5_flow_table *acl;
1027 void *match_criteria;
1029 /* The egress acl table contains 2 rules:
1030 * 1)Allow traffic with vlan_tag=vst_vlan_id
1031 * 2)Drop all other traffic.
1036 if (!MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support) ||
1037 !IS_ERR_OR_NULL(vport->egress.acl))
1040 esw_debug(dev, "Create vport[%d] egress ACL log_max_size(%d)\n",
1041 vport->vport, MLX5_CAP_ESW_EGRESS_ACL(dev, log_max_ft_size));
1043 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_EGRESS);
1045 esw_warn(dev, "Failed to get E-Switch egress flow namespace\n");
1049 flow_group_in = mlx5_vzalloc(inlen);
1053 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1056 esw_warn(dev, "Failed to create E-Switch vport[%d] egress flow Table, err(%d)\n",
1061 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1062 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
1063 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.vlan_tag);
1064 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.first_vid);
1065 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
1066 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1068 vlan_grp = mlx5_create_flow_group(acl, flow_group_in);
1069 if (IS_ERR(vlan_grp)) {
1070 err = PTR_ERR(vlan_grp);
1071 esw_warn(dev, "Failed to create E-Switch vport[%d] egress allowed vlans flow group, err(%d)\n",
1076 memset(flow_group_in, 0, inlen);
1077 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1078 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1079 drop_grp = mlx5_create_flow_group(acl, flow_group_in);
1080 if (IS_ERR(drop_grp)) {
1081 err = PTR_ERR(drop_grp);
1082 esw_warn(dev, "Failed to create E-Switch vport[%d] egress drop flow group, err(%d)\n",
1087 vport->egress.acl = acl;
1088 vport->egress.drop_grp = drop_grp;
1089 vport->egress.allowed_vlans_grp = vlan_grp;
1091 kvfree(flow_group_in);
1092 if (err && !IS_ERR_OR_NULL(vlan_grp))
1093 mlx5_destroy_flow_group(vlan_grp);
1094 if (err && !IS_ERR_OR_NULL(acl))
1095 mlx5_destroy_flow_table(acl);
1098 static void esw_vport_cleanup_egress_rules(struct mlx5_eswitch *esw,
1099 struct mlx5_vport *vport)
1101 if (!IS_ERR_OR_NULL(vport->egress.allowed_vlan))
1102 mlx5_del_flow_rule(vport->egress.allowed_vlan);
1104 if (!IS_ERR_OR_NULL(vport->egress.drop_rule))
1105 mlx5_del_flow_rule(vport->egress.drop_rule);
1107 vport->egress.allowed_vlan = NULL;
1108 vport->egress.drop_rule = NULL;
1111 static void esw_vport_disable_egress_acl(struct mlx5_eswitch *esw,
1112 struct mlx5_vport *vport)
1114 if (IS_ERR_OR_NULL(vport->egress.acl))
1117 esw_debug(esw->dev, "Destroy vport[%d] E-Switch egress ACL\n", vport->vport);
1119 esw_vport_cleanup_egress_rules(esw, vport);
1120 mlx5_destroy_flow_group(vport->egress.allowed_vlans_grp);
1121 mlx5_destroy_flow_group(vport->egress.drop_grp);
1122 mlx5_destroy_flow_table(vport->egress.acl);
1123 vport->egress.allowed_vlans_grp = NULL;
1124 vport->egress.drop_grp = NULL;
1125 vport->egress.acl = NULL;
1128 static void esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw,
1129 struct mlx5_vport *vport)
1131 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
1132 struct mlx5_core_dev *dev = esw->dev;
1133 struct mlx5_flow_namespace *root_ns;
1134 struct mlx5_flow_table *acl;
1135 struct mlx5_flow_group *g;
1136 void *match_criteria;
1138 /* The ingress acl table contains 4 groups
1139 * (2 active rules at the same time -
1140 * 1 allow rule from one of the first 3 groups.
1141 * 1 drop rule from the last group):
1142 * 1)Allow untagged traffic with smac=original mac.
1143 * 2)Allow untagged traffic.
1144 * 3)Allow traffic with smac=original mac.
1145 * 4)Drop all other traffic.
1150 if (!MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support) ||
1151 !IS_ERR_OR_NULL(vport->ingress.acl))
1154 esw_debug(dev, "Create vport[%d] ingress ACL log_max_size(%d)\n",
1155 vport->vport, MLX5_CAP_ESW_INGRESS_ACL(dev, log_max_ft_size));
1157 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_INGRESS);
1159 esw_warn(dev, "Failed to get E-Switch ingress flow namespace\n");
1163 flow_group_in = mlx5_vzalloc(inlen);
1167 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1170 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n",
1174 vport->ingress.acl = acl;
1176 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
1178 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1179 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.vlan_tag);
1180 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1181 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1182 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
1183 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1185 g = mlx5_create_flow_group(acl, flow_group_in);
1188 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged spoofchk flow group, err(%d)\n",
1192 vport->ingress.allow_untagged_spoofchk_grp = g;
1194 memset(flow_group_in, 0, inlen);
1195 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1196 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.vlan_tag);
1197 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1198 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1200 g = mlx5_create_flow_group(acl, flow_group_in);
1203 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged flow group, err(%d)\n",
1207 vport->ingress.allow_untagged_only_grp = g;
1209 memset(flow_group_in, 0, inlen);
1210 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1211 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1212 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1213 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 2);
1214 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 2);
1216 g = mlx5_create_flow_group(acl, flow_group_in);
1219 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress spoofchk flow group, err(%d)\n",
1223 vport->ingress.allow_spoofchk_only_grp = g;
1225 memset(flow_group_in, 0, inlen);
1226 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 3);
1227 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 3);
1229 g = mlx5_create_flow_group(acl, flow_group_in);
1232 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress drop flow group, err(%d)\n",
1236 vport->ingress.drop_grp = g;
1240 if (!IS_ERR_OR_NULL(vport->ingress.allow_spoofchk_only_grp))
1241 mlx5_destroy_flow_group(
1242 vport->ingress.allow_spoofchk_only_grp);
1243 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_only_grp))
1244 mlx5_destroy_flow_group(
1245 vport->ingress.allow_untagged_only_grp);
1246 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_spoofchk_grp))
1247 mlx5_destroy_flow_group(
1248 vport->ingress.allow_untagged_spoofchk_grp);
1249 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1250 mlx5_destroy_flow_table(vport->ingress.acl);
1253 kvfree(flow_group_in);
1256 static void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,
1257 struct mlx5_vport *vport)
1259 if (!IS_ERR_OR_NULL(vport->ingress.drop_rule))
1260 mlx5_del_flow_rule(vport->ingress.drop_rule);
1262 if (!IS_ERR_OR_NULL(vport->ingress.allow_rule))
1263 mlx5_del_flow_rule(vport->ingress.allow_rule);
1265 vport->ingress.drop_rule = NULL;
1266 vport->ingress.allow_rule = NULL;
1269 static void esw_vport_disable_ingress_acl(struct mlx5_eswitch *esw,
1270 struct mlx5_vport *vport)
1272 if (IS_ERR_OR_NULL(vport->ingress.acl))
1275 esw_debug(esw->dev, "Destroy vport[%d] E-Switch ingress ACL\n", vport->vport);
1277 esw_vport_cleanup_ingress_rules(esw, vport);
1278 mlx5_destroy_flow_group(vport->ingress.allow_spoofchk_only_grp);
1279 mlx5_destroy_flow_group(vport->ingress.allow_untagged_only_grp);
1280 mlx5_destroy_flow_group(vport->ingress.allow_untagged_spoofchk_grp);
1281 mlx5_destroy_flow_group(vport->ingress.drop_grp);
1282 mlx5_destroy_flow_table(vport->ingress.acl);
1283 vport->ingress.acl = NULL;
1284 vport->ingress.drop_grp = NULL;
1285 vport->ingress.allow_spoofchk_only_grp = NULL;
1286 vport->ingress.allow_untagged_only_grp = NULL;
1287 vport->ingress.allow_untagged_spoofchk_grp = NULL;
1290 static int esw_vport_ingress_config(struct mlx5_eswitch *esw,
1291 struct mlx5_vport *vport)
1293 struct mlx5_flow_spec *spec;
1298 if (vport->spoofchk) {
1299 err = mlx5_query_nic_vport_mac_address(esw->dev, vport->vport, smac);
1302 "vport[%d] configure ingress rules failed, query smac failed, err(%d)\n",
1307 if (!is_valid_ether_addr(smac)) {
1308 mlx5_core_warn(esw->dev,
1309 "vport[%d] configure ingress rules failed, illegal mac with spoofchk\n",
1315 esw_vport_cleanup_ingress_rules(esw, vport);
1317 if (!vport->vlan && !vport->qos && !vport->spoofchk) {
1318 esw_vport_disable_ingress_acl(esw, vport);
1322 esw_vport_enable_ingress_acl(esw, vport);
1325 "vport[%d] configure ingress rules, vlan(%d) qos(%d)\n",
1326 vport->vport, vport->vlan, vport->qos);
1328 spec = mlx5_vzalloc(sizeof(*spec));
1331 esw_warn(esw->dev, "vport[%d] configure ingress rules failed, err(%d)\n",
1336 if (vport->vlan || vport->qos)
1337 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.vlan_tag);
1339 if (vport->spoofchk) {
1340 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_47_16);
1341 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_15_0);
1342 smac_v = MLX5_ADDR_OF(fte_match_param,
1344 outer_headers.smac_47_16);
1345 ether_addr_copy(smac_v, smac);
1348 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1349 vport->ingress.allow_rule =
1350 mlx5_add_flow_rule(vport->ingress.acl, spec,
1351 MLX5_FLOW_CONTEXT_ACTION_ALLOW,
1353 if (IS_ERR(vport->ingress.allow_rule)) {
1354 err = PTR_ERR(vport->ingress.allow_rule);
1355 pr_warn("vport[%d] configure ingress allow rule, err(%d)\n",
1357 vport->ingress.allow_rule = NULL;
1361 memset(spec, 0, sizeof(*spec));
1362 vport->ingress.drop_rule =
1363 mlx5_add_flow_rule(vport->ingress.acl, spec,
1364 MLX5_FLOW_CONTEXT_ACTION_DROP,
1366 if (IS_ERR(vport->ingress.drop_rule)) {
1367 err = PTR_ERR(vport->ingress.drop_rule);
1368 pr_warn("vport[%d] configure ingress drop rule, err(%d)\n",
1370 vport->ingress.drop_rule = NULL;
1376 esw_vport_cleanup_ingress_rules(esw, vport);
1381 static int esw_vport_egress_config(struct mlx5_eswitch *esw,
1382 struct mlx5_vport *vport)
1384 struct mlx5_flow_spec *spec;
1387 esw_vport_cleanup_egress_rules(esw, vport);
1389 if (!vport->vlan && !vport->qos) {
1390 esw_vport_disable_egress_acl(esw, vport);
1394 esw_vport_enable_egress_acl(esw, vport);
1397 "vport[%d] configure egress rules, vlan(%d) qos(%d)\n",
1398 vport->vport, vport->vlan, vport->qos);
1400 spec = mlx5_vzalloc(sizeof(*spec));
1403 esw_warn(esw->dev, "vport[%d] configure egress rules failed, err(%d)\n",
1408 /* Allowed vlan rule */
1409 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.vlan_tag);
1410 MLX5_SET_TO_ONES(fte_match_param, spec->match_value, outer_headers.vlan_tag);
1411 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.first_vid);
1412 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, vport->vlan);
1414 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1415 vport->egress.allowed_vlan =
1416 mlx5_add_flow_rule(vport->egress.acl, spec,
1417 MLX5_FLOW_CONTEXT_ACTION_ALLOW,
1419 if (IS_ERR(vport->egress.allowed_vlan)) {
1420 err = PTR_ERR(vport->egress.allowed_vlan);
1421 pr_warn("vport[%d] configure egress allowed vlan rule failed, err(%d)\n",
1423 vport->egress.allowed_vlan = NULL;
1427 /* Drop others rule (star rule) */
1428 memset(spec, 0, sizeof(*spec));
1429 vport->egress.drop_rule =
1430 mlx5_add_flow_rule(vport->egress.acl, spec,
1431 MLX5_FLOW_CONTEXT_ACTION_DROP,
1433 if (IS_ERR(vport->egress.drop_rule)) {
1434 err = PTR_ERR(vport->egress.drop_rule);
1435 pr_warn("vport[%d] configure egress drop rule failed, err(%d)\n",
1437 vport->egress.drop_rule = NULL;
1444 static void esw_enable_vport(struct mlx5_eswitch *esw, int vport_num,
1447 struct mlx5_vport *vport = &esw->vports[vport_num];
1449 mutex_lock(&esw->state_lock);
1450 WARN_ON(vport->enabled);
1452 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
1454 if (vport_num) { /* Only VFs need ACLs for VST and spoofchk filtering */
1455 esw_vport_ingress_config(esw, vport);
1456 esw_vport_egress_config(esw, vport);
1459 mlx5_modify_vport_admin_state(esw->dev,
1460 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1462 MLX5_ESW_VPORT_ADMIN_STATE_AUTO);
1464 /* Sync with current vport context */
1465 vport->enabled_events = enable_events;
1466 vport->enabled = true;
1468 /* only PF is trusted by default */
1469 vport->trusted = (vport_num) ? false : true;
1470 esw_vport_change_handle_locked(vport);
1472 esw->enabled_vports++;
1473 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
1474 mutex_unlock(&esw->state_lock);
1477 static void esw_disable_vport(struct mlx5_eswitch *esw, int vport_num)
1479 struct mlx5_vport *vport = &esw->vports[vport_num];
1481 if (!vport->enabled)
1484 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
1485 /* Mark this vport as disabled to discard new events */
1486 vport->enabled = false;
1488 synchronize_irq(mlx5_get_msix_vec(esw->dev, MLX5_EQ_VEC_ASYNC));
1490 mlx5_modify_vport_admin_state(esw->dev,
1491 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1493 MLX5_ESW_VPORT_ADMIN_STATE_DOWN);
1494 /* Wait for current already scheduled events to complete */
1495 flush_workqueue(esw->work_queue);
1496 /* Disable events from this vport */
1497 arm_vport_context_events_cmd(esw->dev, vport->vport, 0);
1498 mutex_lock(&esw->state_lock);
1499 /* We don't assume VFs will cleanup after themselves.
1500 * Calling vport change handler while vport is disabled will cleanup
1501 * the vport resources.
1503 esw_vport_change_handle_locked(vport);
1504 vport->enabled_events = 0;
1506 esw_vport_disable_egress_acl(esw, vport);
1507 esw_vport_disable_ingress_acl(esw, vport);
1509 esw->enabled_vports--;
1510 mutex_unlock(&esw->state_lock);
1513 /* Public E-Switch API */
1514 int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
1517 int i, enabled_events;
1519 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1520 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1523 if (!MLX5_CAP_GEN(esw->dev, eswitch_flow_table) ||
1524 !MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1525 esw_warn(esw->dev, "E-Switch FDB is not supported, aborting ...\n");
1529 if (!MLX5_CAP_ESW_INGRESS_ACL(esw->dev, ft_support))
1530 esw_warn(esw->dev, "E-Switch ingress ACL is not supported by FW\n");
1532 if (!MLX5_CAP_ESW_EGRESS_ACL(esw->dev, ft_support))
1533 esw_warn(esw->dev, "E-Switch engress ACL is not supported by FW\n");
1535 esw_info(esw->dev, "E-Switch enable SRIOV: nvfs(%d) mode (%d)\n", nvfs, mode);
1537 esw_disable_vport(esw, 0);
1539 if (mode == SRIOV_LEGACY)
1540 err = esw_create_legacy_fdb_table(esw, nvfs + 1);
1542 err = esw_offloads_init(esw, nvfs + 1);
1546 enabled_events = (mode == SRIOV_LEGACY) ? SRIOV_VPORT_EVENTS : UC_ADDR_CHANGE;
1547 for (i = 0; i <= nvfs; i++)
1548 esw_enable_vport(esw, i, enabled_events);
1550 esw_info(esw->dev, "SRIOV enabled: active vports(%d)\n",
1551 esw->enabled_vports);
1555 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1559 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw)
1561 struct esw_mc_addr *mc_promisc;
1565 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1566 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1569 esw_info(esw->dev, "disable SRIOV: active vports(%d) mode(%d)\n",
1570 esw->enabled_vports, esw->mode);
1572 mc_promisc = esw->mc_promisc;
1573 nvports = esw->enabled_vports;
1575 for (i = 0; i < esw->total_vports; i++)
1576 esw_disable_vport(esw, i);
1578 if (mc_promisc && mc_promisc->uplink_rule)
1579 mlx5_del_flow_rule(mc_promisc->uplink_rule);
1581 if (esw->mode == SRIOV_LEGACY)
1582 esw_destroy_legacy_fdb_table(esw);
1583 else if (esw->mode == SRIOV_OFFLOADS)
1584 esw_offloads_cleanup(esw, nvports);
1586 esw->mode = SRIOV_NONE;
1587 /* VPORT 0 (PF) must be enabled back with non-sriov configuration */
1588 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1591 int mlx5_eswitch_init(struct mlx5_core_dev *dev)
1593 int l2_table_size = 1 << MLX5_CAP_GEN(dev, log_max_l2_table);
1594 int total_vports = MLX5_TOTAL_VPORTS(dev);
1595 struct esw_mc_addr *mc_promisc;
1596 struct mlx5_eswitch *esw;
1600 if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
1601 MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1605 "Total vports %d, l2 table size(%d), per vport: max uc(%d) max mc(%d)\n",
1606 total_vports, l2_table_size,
1607 MLX5_MAX_UC_PER_VPORT(dev),
1608 MLX5_MAX_MC_PER_VPORT(dev));
1610 esw = kzalloc(sizeof(*esw), GFP_KERNEL);
1616 esw->l2_table.bitmap = kcalloc(BITS_TO_LONGS(l2_table_size),
1617 sizeof(uintptr_t), GFP_KERNEL);
1618 if (!esw->l2_table.bitmap) {
1622 esw->l2_table.size = l2_table_size;
1624 mc_promisc = kzalloc(sizeof(*mc_promisc), GFP_KERNEL);
1629 esw->mc_promisc = mc_promisc;
1631 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
1632 if (!esw->work_queue) {
1637 esw->vports = kcalloc(total_vports, sizeof(struct mlx5_vport),
1644 esw->offloads.vport_reps =
1645 kzalloc(total_vports * sizeof(struct mlx5_eswitch_rep),
1647 if (!esw->offloads.vport_reps) {
1652 mutex_init(&esw->state_lock);
1654 for (vport_num = 0; vport_num < total_vports; vport_num++) {
1655 struct mlx5_vport *vport = &esw->vports[vport_num];
1657 vport->vport = vport_num;
1659 INIT_WORK(&vport->vport_change_handler,
1660 esw_vport_change_handler);
1663 esw->total_vports = total_vports;
1664 esw->enabled_vports = 0;
1665 esw->mode = SRIOV_NONE;
1667 dev->priv.eswitch = esw;
1668 esw_enable_vport(esw, 0, UC_ADDR_CHANGE);
1669 /* VF Vports will be enabled when SRIOV is enabled */
1672 if (esw->work_queue)
1673 destroy_workqueue(esw->work_queue);
1674 kfree(esw->l2_table.bitmap);
1676 kfree(esw->offloads.vport_reps);
1681 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
1683 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
1684 MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
1687 esw_info(esw->dev, "cleanup\n");
1688 esw_disable_vport(esw, 0);
1690 esw->dev->priv.eswitch = NULL;
1691 destroy_workqueue(esw->work_queue);
1692 kfree(esw->l2_table.bitmap);
1693 kfree(esw->mc_promisc);
1694 kfree(esw->offloads.vport_reps);
1699 void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe)
1701 struct mlx5_eqe_vport_change *vc_eqe = &eqe->data.vport_change;
1702 u16 vport_num = be16_to_cpu(vc_eqe->vport_num);
1703 struct mlx5_vport *vport;
1706 pr_warn("MLX5 E-Switch: vport %d got an event while eswitch is not initialized\n",
1711 vport = &esw->vports[vport_num];
1713 queue_work(esw->work_queue, &vport->vport_change_handler);
1716 /* Vport Administration */
1717 #define ESW_ALLOWED(esw) \
1718 (esw && MLX5_CAP_GEN(esw->dev, vport_group_manager) && mlx5_core_is_pf(esw->dev))
1719 #define LEGAL_VPORT(esw, vport) (vport >= 0 && vport < esw->total_vports)
1721 static void node_guid_gen_from_mac(u64 *node_guid, u8 mac[ETH_ALEN])
1723 ((u8 *)node_guid)[7] = mac[0];
1724 ((u8 *)node_guid)[6] = mac[1];
1725 ((u8 *)node_guid)[5] = mac[2];
1726 ((u8 *)node_guid)[4] = 0xff;
1727 ((u8 *)node_guid)[3] = 0xfe;
1728 ((u8 *)node_guid)[2] = mac[3];
1729 ((u8 *)node_guid)[1] = mac[4];
1730 ((u8 *)node_guid)[0] = mac[5];
1733 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
1734 int vport, u8 mac[ETH_ALEN])
1736 struct mlx5_vport *evport;
1740 if (!ESW_ALLOWED(esw))
1742 if (!LEGAL_VPORT(esw, vport))
1745 evport = &esw->vports[vport];
1747 if (evport->spoofchk && !is_valid_ether_addr(mac)) {
1748 mlx5_core_warn(esw->dev,
1749 "MAC invalidation is not allowed when spoofchk is on, vport(%d)\n",
1754 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport, mac);
1756 mlx5_core_warn(esw->dev,
1757 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
1762 node_guid_gen_from_mac(&node_guid, mac);
1763 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport, node_guid);
1765 mlx5_core_warn(esw->dev,
1766 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
1769 mutex_lock(&esw->state_lock);
1770 if (evport->enabled)
1771 err = esw_vport_ingress_config(esw, evport);
1772 mutex_unlock(&esw->state_lock);
1776 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
1777 int vport, int link_state)
1779 if (!ESW_ALLOWED(esw))
1781 if (!LEGAL_VPORT(esw, vport))
1784 return mlx5_modify_vport_admin_state(esw->dev,
1785 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1789 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
1790 int vport, struct ifla_vf_info *ivi)
1792 struct mlx5_vport *evport;
1796 if (!ESW_ALLOWED(esw))
1798 if (!LEGAL_VPORT(esw, vport))
1801 evport = &esw->vports[vport];
1803 memset(ivi, 0, sizeof(*ivi));
1804 ivi->vf = vport - 1;
1806 mlx5_query_nic_vport_mac_address(esw->dev, vport, ivi->mac);
1807 ivi->linkstate = mlx5_query_vport_admin_state(esw->dev,
1808 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1810 query_esw_vport_cvlan(esw->dev, vport, &vlan, &qos);
1813 ivi->spoofchk = evport->spoofchk;
1818 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1819 int vport, u16 vlan, u8 qos)
1821 struct mlx5_vport *evport;
1825 if (!ESW_ALLOWED(esw))
1827 if (!LEGAL_VPORT(esw, vport) || (vlan > 4095) || (qos > 7))
1833 evport = &esw->vports[vport];
1835 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set);
1839 mutex_lock(&esw->state_lock);
1840 evport->vlan = vlan;
1842 if (evport->enabled) {
1843 err = esw_vport_ingress_config(esw, evport);
1846 err = esw_vport_egress_config(esw, evport);
1850 mutex_unlock(&esw->state_lock);
1854 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
1855 int vport, bool spoofchk)
1857 struct mlx5_vport *evport;
1861 if (!ESW_ALLOWED(esw))
1863 if (!LEGAL_VPORT(esw, vport))
1866 evport = &esw->vports[vport];
1868 mutex_lock(&esw->state_lock);
1869 pschk = evport->spoofchk;
1870 evport->spoofchk = spoofchk;
1871 if (evport->enabled)
1872 err = esw_vport_ingress_config(esw, evport);
1874 evport->spoofchk = pschk;
1875 mutex_unlock(&esw->state_lock);
1880 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
1881 int vport, bool setting)
1883 struct mlx5_vport *evport;
1885 if (!ESW_ALLOWED(esw))
1887 if (!LEGAL_VPORT(esw, vport))
1890 evport = &esw->vports[vport];
1892 mutex_lock(&esw->state_lock);
1893 evport->trusted = setting;
1894 if (evport->enabled)
1895 esw_vport_change_handle_locked(evport);
1896 mutex_unlock(&esw->state_lock);
1901 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
1903 struct ifla_vf_stats *vf_stats)
1905 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
1906 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)];
1910 if (!ESW_ALLOWED(esw))
1912 if (!LEGAL_VPORT(esw, vport))
1915 out = mlx5_vzalloc(outlen);
1919 memset(in, 0, sizeof(in));
1921 MLX5_SET(query_vport_counter_in, in, opcode,
1922 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
1923 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
1924 MLX5_SET(query_vport_counter_in, in, vport_number, vport);
1926 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
1928 memset(out, 0, outlen);
1929 err = mlx5_cmd_exec(esw->dev, in, sizeof(in), out, outlen);
1933 #define MLX5_GET_CTR(p, x) \
1934 MLX5_GET64(query_vport_counter_out, p, x)
1936 memset(vf_stats, 0, sizeof(*vf_stats));
1937 vf_stats->rx_packets =
1938 MLX5_GET_CTR(out, received_eth_unicast.packets) +
1939 MLX5_GET_CTR(out, received_eth_multicast.packets) +
1940 MLX5_GET_CTR(out, received_eth_broadcast.packets);
1942 vf_stats->rx_bytes =
1943 MLX5_GET_CTR(out, received_eth_unicast.octets) +
1944 MLX5_GET_CTR(out, received_eth_multicast.octets) +
1945 MLX5_GET_CTR(out, received_eth_broadcast.octets);
1947 vf_stats->tx_packets =
1948 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
1949 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
1950 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
1952 vf_stats->tx_bytes =
1953 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
1954 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
1955 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
1957 vf_stats->multicast =
1958 MLX5_GET_CTR(out, received_eth_multicast.packets);
1960 vf_stats->broadcast =
1961 MLX5_GET_CTR(out, received_eth_broadcast.packets);