2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include "lib/clock.h"
37 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
38 struct ethtool_drvinfo *drvinfo)
40 struct mlx5_core_dev *mdev = priv->mdev;
42 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
43 strlcpy(drvinfo->version, DRIVER_VERSION,
44 sizeof(drvinfo->version));
45 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
47 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
49 strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
50 sizeof(drvinfo->bus_info));
53 static void mlx5e_get_drvinfo(struct net_device *dev,
54 struct ethtool_drvinfo *drvinfo)
56 struct mlx5e_priv *priv = netdev_priv(dev);
58 mlx5e_ethtool_get_drvinfo(priv, drvinfo);
61 struct ptys2ethtool_config {
62 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
63 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
66 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
68 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, ...) \
70 struct ptys2ethtool_config *cfg; \
71 const unsigned int modes[] = { __VA_ARGS__ }; \
73 cfg = &ptys2ethtool_table[reg_]; \
74 bitmap_zero(cfg->supported, \
75 __ETHTOOL_LINK_MODE_MASK_NBITS); \
76 bitmap_zero(cfg->advertised, \
77 __ETHTOOL_LINK_MODE_MASK_NBITS); \
78 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
79 __set_bit(modes[i], cfg->supported); \
80 __set_bit(modes[i], cfg->advertised); \
84 void mlx5e_build_ptys2ethtool_map(void)
86 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII,
87 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
88 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX,
89 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
90 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4,
91 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
92 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4,
93 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
94 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR,
95 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
96 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2,
97 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
98 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4,
99 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
100 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4,
101 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
102 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4,
103 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
104 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR,
105 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
106 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR,
107 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
108 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER,
109 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
110 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4,
111 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
112 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4,
113 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
114 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2,
115 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
116 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4,
117 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
118 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4,
119 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
120 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4,
121 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
122 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4,
123 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
124 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T,
125 ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
126 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR,
127 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
128 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR,
129 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
130 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR,
131 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
132 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2,
133 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
134 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2,
135 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
138 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
140 int i, num_stats = 0;
144 for (i = 0; i < mlx5e_num_stats_grps; i++)
145 num_stats += mlx5e_stats_grps[i].get_num_stats(priv);
147 case ETH_SS_PRIV_FLAGS:
148 return ARRAY_SIZE(mlx5e_priv_flags);
150 return mlx5e_self_test_num(priv);
157 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
159 struct mlx5e_priv *priv = netdev_priv(dev);
161 return mlx5e_ethtool_get_sset_count(priv, sset);
164 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, u8 *data)
168 for (i = 0; i < mlx5e_num_stats_grps; i++)
169 idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);
172 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
177 case ETH_SS_PRIV_FLAGS:
178 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
179 strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
183 for (i = 0; i < mlx5e_self_test_num(priv); i++)
184 strcpy(data + i * ETH_GSTRING_LEN,
185 mlx5e_self_tests[i]);
189 mlx5e_fill_stats_strings(priv, data);
194 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
196 struct mlx5e_priv *priv = netdev_priv(dev);
198 mlx5e_ethtool_get_strings(priv, stringset, data);
201 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
202 struct ethtool_stats *stats, u64 *data)
206 mutex_lock(&priv->state_lock);
207 mlx5e_update_stats(priv);
208 mutex_unlock(&priv->state_lock);
210 for (i = 0; i < mlx5e_num_stats_grps; i++)
211 idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);
214 static void mlx5e_get_ethtool_stats(struct net_device *dev,
215 struct ethtool_stats *stats,
218 struct mlx5e_priv *priv = netdev_priv(dev);
220 mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
223 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
224 struct ethtool_ringparam *param)
226 param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
227 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
228 param->rx_pending = 1 << priv->channels.params.log_rq_mtu_frames;
229 param->tx_pending = 1 << priv->channels.params.log_sq_size;
232 static void mlx5e_get_ringparam(struct net_device *dev,
233 struct ethtool_ringparam *param)
235 struct mlx5e_priv *priv = netdev_priv(dev);
237 mlx5e_ethtool_get_ringparam(priv, param);
240 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
241 struct ethtool_ringparam *param)
243 struct mlx5e_channels new_channels = {};
248 if (param->rx_jumbo_pending) {
249 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
253 if (param->rx_mini_pending) {
254 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
259 if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
260 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
261 __func__, param->rx_pending,
262 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
266 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
267 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
268 __func__, param->tx_pending,
269 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
273 log_rq_size = order_base_2(param->rx_pending);
274 log_sq_size = order_base_2(param->tx_pending);
276 if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
277 log_sq_size == priv->channels.params.log_sq_size)
280 mutex_lock(&priv->state_lock);
282 new_channels.params = priv->channels.params;
283 new_channels.params.log_rq_mtu_frames = log_rq_size;
284 new_channels.params.log_sq_size = log_sq_size;
286 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
287 priv->channels.params = new_channels.params;
291 err = mlx5e_open_channels(priv, &new_channels);
295 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
298 mutex_unlock(&priv->state_lock);
303 static int mlx5e_set_ringparam(struct net_device *dev,
304 struct ethtool_ringparam *param)
306 struct mlx5e_priv *priv = netdev_priv(dev);
308 return mlx5e_ethtool_set_ringparam(priv, param);
311 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
312 struct ethtool_channels *ch)
314 ch->max_combined = priv->profile->max_nch(priv->mdev);
315 ch->combined_count = priv->channels.params.num_channels;
318 static void mlx5e_get_channels(struct net_device *dev,
319 struct ethtool_channels *ch)
321 struct mlx5e_priv *priv = netdev_priv(dev);
323 mlx5e_ethtool_get_channels(priv, ch);
326 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
327 struct ethtool_channels *ch)
329 unsigned int count = ch->combined_count;
330 struct mlx5e_channels new_channels = {};
335 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
340 if (priv->channels.params.num_channels == count)
343 mutex_lock(&priv->state_lock);
345 new_channels.params = priv->channels.params;
346 new_channels.params.num_channels = count;
347 if (!netif_is_rxfh_configured(priv->netdev))
348 mlx5e_build_default_indir_rqt(new_channels.params.indirection_rqt,
349 MLX5E_INDIR_RQT_SIZE, count);
351 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
352 priv->channels.params = new_channels.params;
356 /* Create fresh channels with new parameters */
357 err = mlx5e_open_channels(priv, &new_channels);
361 arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
363 mlx5e_arfs_disable(priv);
365 /* Switch to new channels, set new parameters and close old ones */
366 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
369 err = mlx5e_arfs_enable(priv);
371 netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
376 mutex_unlock(&priv->state_lock);
381 static int mlx5e_set_channels(struct net_device *dev,
382 struct ethtool_channels *ch)
384 struct mlx5e_priv *priv = netdev_priv(dev);
386 return mlx5e_ethtool_set_channels(priv, ch);
389 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
390 struct ethtool_coalesce *coal)
392 struct net_dim_cq_moder *rx_moder, *tx_moder;
394 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
397 rx_moder = &priv->channels.params.rx_cq_moderation;
398 coal->rx_coalesce_usecs = rx_moder->usec;
399 coal->rx_max_coalesced_frames = rx_moder->pkts;
400 coal->use_adaptive_rx_coalesce = priv->channels.params.rx_dim_enabled;
402 tx_moder = &priv->channels.params.tx_cq_moderation;
403 coal->tx_coalesce_usecs = tx_moder->usec;
404 coal->tx_max_coalesced_frames = tx_moder->pkts;
405 coal->use_adaptive_tx_coalesce = priv->channels.params.tx_dim_enabled;
410 static int mlx5e_get_coalesce(struct net_device *netdev,
411 struct ethtool_coalesce *coal)
413 struct mlx5e_priv *priv = netdev_priv(netdev);
415 return mlx5e_ethtool_get_coalesce(priv, coal);
418 #define MLX5E_MAX_COAL_TIME MLX5_MAX_CQ_PERIOD
419 #define MLX5E_MAX_COAL_FRAMES MLX5_MAX_CQ_COUNT
422 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
424 struct mlx5_core_dev *mdev = priv->mdev;
428 for (i = 0; i < priv->channels.num; ++i) {
429 struct mlx5e_channel *c = priv->channels.c[i];
431 for (tc = 0; tc < c->num_tc; tc++) {
432 mlx5_core_modify_cq_moderation(mdev,
434 coal->tx_coalesce_usecs,
435 coal->tx_max_coalesced_frames);
438 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
439 coal->rx_coalesce_usecs,
440 coal->rx_max_coalesced_frames);
444 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
445 struct ethtool_coalesce *coal)
447 struct net_dim_cq_moder *rx_moder, *tx_moder;
448 struct mlx5_core_dev *mdev = priv->mdev;
449 struct mlx5e_channels new_channels = {};
453 if (!MLX5_CAP_GEN(mdev, cq_moderation))
456 if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
457 coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
458 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
459 __func__, MLX5E_MAX_COAL_TIME);
463 if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
464 coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
465 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
466 __func__, MLX5E_MAX_COAL_FRAMES);
470 mutex_lock(&priv->state_lock);
471 new_channels.params = priv->channels.params;
473 rx_moder = &new_channels.params.rx_cq_moderation;
474 rx_moder->usec = coal->rx_coalesce_usecs;
475 rx_moder->pkts = coal->rx_max_coalesced_frames;
476 new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
478 tx_moder = &new_channels.params.tx_cq_moderation;
479 tx_moder->usec = coal->tx_coalesce_usecs;
480 tx_moder->pkts = coal->tx_max_coalesced_frames;
481 new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
483 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
484 priv->channels.params = new_channels.params;
489 reset = (!!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled) ||
490 (!!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled);
493 mlx5e_set_priv_channels_coalesce(priv, coal);
494 priv->channels.params = new_channels.params;
498 /* open fresh channels with new coal parameters */
499 err = mlx5e_open_channels(priv, &new_channels);
503 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
506 mutex_unlock(&priv->state_lock);
510 static int mlx5e_set_coalesce(struct net_device *netdev,
511 struct ethtool_coalesce *coal)
513 struct mlx5e_priv *priv = netdev_priv(netdev);
515 return mlx5e_ethtool_set_coalesce(priv, coal);
518 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
521 unsigned long proto_cap = eth_proto_cap;
524 for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
525 bitmap_or(supported_modes, supported_modes,
526 ptys2ethtool_table[proto].supported,
527 __ETHTOOL_LINK_MODE_MASK_NBITS);
530 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
533 unsigned long proto_cap = eth_proto_cap;
536 for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
537 bitmap_or(advertising_modes, advertising_modes,
538 ptys2ethtool_table[proto].advertised,
539 __ETHTOOL_LINK_MODE_MASK_NBITS);
542 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
546 if (!connector_type || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
547 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
548 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
549 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
550 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
551 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
552 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
553 ethtool_link_ksettings_add_link_mode(link_ksettings,
556 ethtool_link_ksettings_add_link_mode(link_ksettings,
561 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
562 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
563 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
564 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
565 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
566 ethtool_link_ksettings_add_link_mode(link_ksettings,
569 ethtool_link_ksettings_add_link_mode(link_ksettings,
576 switch (connector_type) {
578 ethtool_link_ksettings_add_link_mode(link_ksettings,
580 ethtool_link_ksettings_add_link_mode(link_ksettings,
584 ethtool_link_ksettings_add_link_mode(link_ksettings,
586 ethtool_link_ksettings_add_link_mode(link_ksettings,
590 ethtool_link_ksettings_add_link_mode(link_ksettings,
592 ethtool_link_ksettings_add_link_mode(link_ksettings,
596 ethtool_link_ksettings_add_link_mode(link_ksettings,
598 ethtool_link_ksettings_add_link_mode(link_ksettings,
601 case MLX5E_PORT_FIBRE:
602 ethtool_link_ksettings_add_link_mode(link_ksettings,
604 ethtool_link_ksettings_add_link_mode(link_ksettings,
608 ethtool_link_ksettings_add_link_mode(link_ksettings,
609 supported, Backplane);
610 ethtool_link_ksettings_add_link_mode(link_ksettings,
611 advertising, Backplane);
613 case MLX5E_PORT_NONE:
614 case MLX5E_PORT_OTHER:
620 static void get_speed_duplex(struct net_device *netdev,
622 struct ethtool_link_ksettings *link_ksettings)
624 u32 speed = SPEED_UNKNOWN;
625 u8 duplex = DUPLEX_UNKNOWN;
627 if (!netif_carrier_ok(netdev))
630 speed = mlx5e_port_ptys2speed(eth_proto_oper);
632 speed = SPEED_UNKNOWN;
636 duplex = DUPLEX_FULL;
639 link_ksettings->base.speed = speed;
640 link_ksettings->base.duplex = duplex;
643 static void get_supported(u32 eth_proto_cap,
644 struct ethtool_link_ksettings *link_ksettings)
646 unsigned long *supported = link_ksettings->link_modes.supported;
648 ptys2ethtool_supported_link(supported, eth_proto_cap);
649 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
652 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
654 struct ethtool_link_ksettings *link_ksettings)
656 unsigned long *advertising = link_ksettings->link_modes.advertising;
658 ptys2ethtool_adver_link(advertising, eth_proto_cap);
660 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
661 if (tx_pause ^ rx_pause)
662 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
665 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
666 [MLX5E_PORT_UNKNOWN] = PORT_OTHER,
667 [MLX5E_PORT_NONE] = PORT_NONE,
668 [MLX5E_PORT_TP] = PORT_TP,
669 [MLX5E_PORT_AUI] = PORT_AUI,
670 [MLX5E_PORT_BNC] = PORT_BNC,
671 [MLX5E_PORT_MII] = PORT_MII,
672 [MLX5E_PORT_FIBRE] = PORT_FIBRE,
673 [MLX5E_PORT_DA] = PORT_DA,
674 [MLX5E_PORT_OTHER] = PORT_OTHER,
677 static u8 get_connector_port(u32 eth_proto, u8 connector_type)
679 if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
680 return ptys2connector_type[connector_type];
683 (MLX5E_PROT_MASK(MLX5E_10GBASE_SR) |
684 MLX5E_PROT_MASK(MLX5E_40GBASE_SR4) |
685 MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
686 MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
691 (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
692 MLX5E_PROT_MASK(MLX5E_10GBASE_CR) |
693 MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
698 (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
699 MLX5E_PROT_MASK(MLX5E_10GBASE_KR) |
700 MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
701 MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
708 static void get_lp_advertising(u32 eth_proto_lp,
709 struct ethtool_link_ksettings *link_ksettings)
711 unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
713 ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
716 static int mlx5e_get_link_ksettings(struct net_device *netdev,
717 struct ethtool_link_ksettings *link_ksettings)
719 struct mlx5e_priv *priv = netdev_priv(netdev);
720 struct mlx5_core_dev *mdev = priv->mdev;
721 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
733 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
735 netdev_err(netdev, "%s: query port ptys failed: %d\n",
740 eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
741 eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
742 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
743 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
744 an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
745 an_status = MLX5_GET(ptys_reg, out, an_status);
746 connector_type = MLX5_GET(ptys_reg, out, connector_type);
748 mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
750 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
751 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
753 get_supported(eth_proto_cap, link_ksettings);
754 get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
755 get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
757 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
759 link_ksettings->base.port = get_connector_port(eth_proto_oper,
761 ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
763 get_lp_advertising(eth_proto_lp, link_ksettings);
765 if (an_status == MLX5_AN_COMPLETE)
766 ethtool_link_ksettings_add_link_mode(link_ksettings,
767 lp_advertising, Autoneg);
769 link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
771 ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
773 if (!an_disable_admin)
774 ethtool_link_ksettings_add_link_mode(link_ksettings,
775 advertising, Autoneg);
781 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
783 u32 i, ptys_modes = 0;
785 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
786 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
788 __ETHTOOL_LINK_MODE_MASK_NBITS))
789 ptys_modes |= MLX5E_PROT_MASK(i);
795 static int mlx5e_set_link_ksettings(struct net_device *netdev,
796 const struct ethtool_link_ksettings *link_ksettings)
798 struct mlx5e_priv *priv = netdev_priv(netdev);
799 struct mlx5_core_dev *mdev = priv->mdev;
800 u32 eth_proto_cap, eth_proto_admin;
801 bool an_changes = false;
810 speed = link_ksettings->base.speed;
812 link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
813 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
814 mlx5e_port_speed2linkmodes(speed);
816 err = mlx5_query_port_proto_cap(mdev, ð_proto_cap, MLX5_PTYS_EN);
818 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
823 link_modes = link_modes & eth_proto_cap;
825 netdev_err(netdev, "%s: Not supported link mode(s) requested",
831 err = mlx5_query_port_proto_admin(mdev, ð_proto_admin, MLX5_PTYS_EN);
833 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
838 mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
839 &an_disable_cap, &an_disable_admin);
841 an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
842 an_changes = ((!an_disable && an_disable_admin) ||
843 (an_disable && !an_disable_admin));
845 if (!an_changes && link_modes == eth_proto_admin)
848 mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
849 mlx5_toggle_port_link(mdev);
855 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
857 struct mlx5e_priv *priv = netdev_priv(netdev);
859 return sizeof(priv->channels.params.toeplitz_hash_key);
862 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
864 return MLX5E_INDIR_RQT_SIZE;
867 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
870 struct mlx5e_priv *priv = netdev_priv(netdev);
873 memcpy(indir, priv->channels.params.indirection_rqt,
874 sizeof(priv->channels.params.indirection_rqt));
877 memcpy(key, priv->channels.params.toeplitz_hash_key,
878 sizeof(priv->channels.params.toeplitz_hash_key));
881 *hfunc = priv->channels.params.rss_hfunc;
886 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
888 void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
889 struct mlx5_core_dev *mdev = priv->mdev;
890 int ctxlen = MLX5_ST_SZ_BYTES(tirc);
893 MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
895 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
896 memset(tirc, 0, ctxlen);
897 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
898 mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
901 if (!mlx5e_tunnel_inner_ft_supported(priv->mdev))
904 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
905 memset(tirc, 0, ctxlen);
906 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, true);
907 mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in, inlen);
911 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
912 const u8 *key, const u8 hfunc)
914 struct mlx5e_priv *priv = netdev_priv(dev);
915 int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
916 bool hash_changed = false;
919 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
920 (hfunc != ETH_RSS_HASH_XOR) &&
921 (hfunc != ETH_RSS_HASH_TOP))
924 in = kvzalloc(inlen, GFP_KERNEL);
928 mutex_lock(&priv->state_lock);
930 if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
931 hfunc != priv->channels.params.rss_hfunc) {
932 priv->channels.params.rss_hfunc = hfunc;
937 memcpy(priv->channels.params.indirection_rqt, indir,
938 sizeof(priv->channels.params.indirection_rqt));
940 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
941 u32 rqtn = priv->indir_rqt.rqtn;
942 struct mlx5e_redirect_rqt_param rrp = {
946 .hfunc = priv->channels.params.rss_hfunc,
947 .channels = &priv->channels,
952 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
957 memcpy(priv->channels.params.toeplitz_hash_key, key,
958 sizeof(priv->channels.params.toeplitz_hash_key));
959 hash_changed = hash_changed ||
960 priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
964 mlx5e_modify_tirs_hash(priv, in, inlen);
966 mutex_unlock(&priv->state_lock);
973 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC 100
974 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC 8000
975 #define MLX5E_PFC_PREVEN_MINOR_PRECENT 85
976 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC 80
977 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
978 max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
979 (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
981 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
982 u16 *pfc_prevention_tout)
984 struct mlx5e_priv *priv = netdev_priv(netdev);
985 struct mlx5_core_dev *mdev = priv->mdev;
987 if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
988 !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
991 return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
994 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
997 struct mlx5e_priv *priv = netdev_priv(netdev);
998 struct mlx5_core_dev *mdev = priv->mdev;
1002 if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1003 !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1006 critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1007 MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1010 if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1011 (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1012 critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1013 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1014 __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1015 MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1019 minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1020 return mlx5_set_port_stall_watermark(mdev, critical_tout,
1024 static int mlx5e_get_tunable(struct net_device *dev,
1025 const struct ethtool_tunable *tuna,
1031 case ETHTOOL_PFC_PREVENTION_TOUT:
1032 err = mlx5e_get_pfc_prevention_tout(dev, data);
1042 static int mlx5e_set_tunable(struct net_device *dev,
1043 const struct ethtool_tunable *tuna,
1046 struct mlx5e_priv *priv = netdev_priv(dev);
1049 mutex_lock(&priv->state_lock);
1052 case ETHTOOL_PFC_PREVENTION_TOUT:
1053 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1060 mutex_unlock(&priv->state_lock);
1064 static void mlx5e_get_pauseparam(struct net_device *netdev,
1065 struct ethtool_pauseparam *pauseparam)
1067 struct mlx5e_priv *priv = netdev_priv(netdev);
1068 struct mlx5_core_dev *mdev = priv->mdev;
1071 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1072 &pauseparam->tx_pause);
1074 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1079 static int mlx5e_set_pauseparam(struct net_device *netdev,
1080 struct ethtool_pauseparam *pauseparam)
1082 struct mlx5e_priv *priv = netdev_priv(netdev);
1083 struct mlx5_core_dev *mdev = priv->mdev;
1086 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1089 if (pauseparam->autoneg)
1092 err = mlx5_set_port_pause(mdev,
1093 pauseparam->rx_pause ? 1 : 0,
1094 pauseparam->tx_pause ? 1 : 0);
1096 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1103 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1104 struct ethtool_ts_info *info)
1106 struct mlx5_core_dev *mdev = priv->mdev;
1108 info->phc_index = mlx5_clock_get_ptp_index(mdev);
1110 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1111 info->phc_index == -1)
1114 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1115 SOF_TIMESTAMPING_RX_HARDWARE |
1116 SOF_TIMESTAMPING_RAW_HARDWARE;
1118 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1119 BIT(HWTSTAMP_TX_ON);
1121 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1122 BIT(HWTSTAMP_FILTER_ALL);
1127 static int mlx5e_get_ts_info(struct net_device *dev,
1128 struct ethtool_ts_info *info)
1130 struct mlx5e_priv *priv = netdev_priv(dev);
1132 return mlx5e_ethtool_get_ts_info(priv, info);
1135 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1139 if (MLX5_CAP_GEN(mdev, wol_g))
1142 if (MLX5_CAP_GEN(mdev, wol_s))
1143 ret |= WAKE_MAGICSECURE;
1145 if (MLX5_CAP_GEN(mdev, wol_a))
1148 if (MLX5_CAP_GEN(mdev, wol_b))
1151 if (MLX5_CAP_GEN(mdev, wol_m))
1154 if (MLX5_CAP_GEN(mdev, wol_u))
1157 if (MLX5_CAP_GEN(mdev, wol_p))
1163 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1167 if (mode & MLX5_WOL_MAGIC)
1170 if (mode & MLX5_WOL_SECURED_MAGIC)
1171 ret |= WAKE_MAGICSECURE;
1173 if (mode & MLX5_WOL_ARP)
1176 if (mode & MLX5_WOL_BROADCAST)
1179 if (mode & MLX5_WOL_MULTICAST)
1182 if (mode & MLX5_WOL_UNICAST)
1185 if (mode & MLX5_WOL_PHY_ACTIVITY)
1191 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1195 if (mode & WAKE_MAGIC)
1196 ret |= MLX5_WOL_MAGIC;
1198 if (mode & WAKE_MAGICSECURE)
1199 ret |= MLX5_WOL_SECURED_MAGIC;
1201 if (mode & WAKE_ARP)
1202 ret |= MLX5_WOL_ARP;
1204 if (mode & WAKE_BCAST)
1205 ret |= MLX5_WOL_BROADCAST;
1207 if (mode & WAKE_MCAST)
1208 ret |= MLX5_WOL_MULTICAST;
1210 if (mode & WAKE_UCAST)
1211 ret |= MLX5_WOL_UNICAST;
1213 if (mode & WAKE_PHY)
1214 ret |= MLX5_WOL_PHY_ACTIVITY;
1219 static void mlx5e_get_wol(struct net_device *netdev,
1220 struct ethtool_wolinfo *wol)
1222 struct mlx5e_priv *priv = netdev_priv(netdev);
1223 struct mlx5_core_dev *mdev = priv->mdev;
1227 memset(wol, 0, sizeof(*wol));
1229 wol->supported = mlx5e_get_wol_supported(mdev);
1230 if (!wol->supported)
1233 err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1237 wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1240 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1242 struct mlx5e_priv *priv = netdev_priv(netdev);
1243 struct mlx5_core_dev *mdev = priv->mdev;
1244 __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1250 if (wol->wolopts & ~wol_supported)
1253 mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1255 return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1258 static u32 mlx5e_get_msglevel(struct net_device *dev)
1260 return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1263 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1265 ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1268 static int mlx5e_set_phys_id(struct net_device *dev,
1269 enum ethtool_phys_id_state state)
1271 struct mlx5e_priv *priv = netdev_priv(dev);
1272 struct mlx5_core_dev *mdev = priv->mdev;
1273 u16 beacon_duration;
1275 if (!MLX5_CAP_GEN(mdev, beacon_led))
1279 case ETHTOOL_ID_ACTIVE:
1280 beacon_duration = MLX5_BEACON_DURATION_INF;
1282 case ETHTOOL_ID_INACTIVE:
1283 beacon_duration = MLX5_BEACON_DURATION_OFF;
1289 return mlx5_set_port_beacon(mdev, beacon_duration);
1292 static int mlx5e_get_module_info(struct net_device *netdev,
1293 struct ethtool_modinfo *modinfo)
1295 struct mlx5e_priv *priv = netdev_priv(netdev);
1296 struct mlx5_core_dev *dev = priv->mdev;
1300 size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1304 /* data[0] = identifier byte */
1306 case MLX5_MODULE_ID_QSFP:
1307 modinfo->type = ETH_MODULE_SFF_8436;
1308 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1310 case MLX5_MODULE_ID_QSFP_PLUS:
1311 case MLX5_MODULE_ID_QSFP28:
1312 /* data[1] = revision id */
1313 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1314 modinfo->type = ETH_MODULE_SFF_8636;
1315 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1317 modinfo->type = ETH_MODULE_SFF_8436;
1318 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1321 case MLX5_MODULE_ID_SFP:
1322 modinfo->type = ETH_MODULE_SFF_8472;
1323 modinfo->eeprom_len = MLX5_EEPROM_PAGE_LENGTH;
1326 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1334 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1335 struct ethtool_eeprom *ee,
1338 struct mlx5e_priv *priv = netdev_priv(netdev);
1339 struct mlx5_core_dev *mdev = priv->mdev;
1340 int offset = ee->offset;
1347 memset(data, 0, ee->len);
1349 while (i < ee->len) {
1350 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1357 if (size_read < 0) {
1358 netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1359 __func__, size_read);
1364 offset += size_read;
1370 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1372 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1375 struct mlx5e_priv *priv = netdev_priv(netdev);
1376 struct mlx5_core_dev *mdev = priv->mdev;
1377 struct mlx5e_channels new_channels = {};
1379 u8 cq_period_mode, current_cq_period_mode;
1382 cq_period_mode = enable ?
1383 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1384 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1385 current_cq_period_mode = is_rx_cq ?
1386 priv->channels.params.rx_cq_moderation.cq_period_mode :
1387 priv->channels.params.tx_cq_moderation.cq_period_mode;
1388 mode_changed = cq_period_mode != current_cq_period_mode;
1390 if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1391 !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1397 new_channels.params = priv->channels.params;
1399 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1401 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1403 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1404 priv->channels.params = new_channels.params;
1408 err = mlx5e_open_channels(priv, &new_channels);
1412 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1416 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1418 return set_pflag_cqe_based_moder(netdev, enable, false);
1421 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1423 return set_pflag_cqe_based_moder(netdev, enable, true);
1426 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1428 bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1429 struct mlx5e_channels new_channels = {};
1432 if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1433 return new_val ? -EOPNOTSUPP : 0;
1435 if (curr_val == new_val)
1438 new_channels.params = priv->channels.params;
1439 MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1441 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1442 priv->channels.params = new_channels.params;
1446 err = mlx5e_open_channels(priv, &new_channels);
1450 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1451 mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1452 MLX5E_GET_PFLAG(&priv->channels.params,
1453 MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1458 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1461 struct mlx5e_priv *priv = netdev_priv(netdev);
1462 struct mlx5_core_dev *mdev = priv->mdev;
1464 if (!MLX5_CAP_GEN(mdev, cqe_compression))
1467 if (enable && priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE) {
1468 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1472 mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1473 priv->channels.params.rx_cqe_compress_def = enable;
1478 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1480 struct mlx5e_priv *priv = netdev_priv(netdev);
1481 struct mlx5_core_dev *mdev = priv->mdev;
1482 struct mlx5e_channels new_channels = {};
1486 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1488 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1490 } else if (priv->channels.params.lro_en) {
1491 netdev_warn(netdev, "Can't set legacy RQ with LRO, disable LRO first\n");
1495 new_channels.params = priv->channels.params;
1497 MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1498 mlx5e_set_rq_type(mdev, &new_channels.params);
1500 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1501 priv->channels.params = new_channels.params;
1505 err = mlx5e_open_channels(priv, &new_channels);
1509 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1513 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1515 struct mlx5e_priv *priv = netdev_priv(netdev);
1516 struct mlx5e_channels *channels = &priv->channels;
1517 struct mlx5e_channel *c;
1520 if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
1521 priv->channels.params.xdp_prog)
1524 for (i = 0; i < channels->num; i++) {
1527 __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1529 __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1535 static int mlx5e_handle_pflag(struct net_device *netdev,
1537 enum mlx5e_priv_flag flag,
1538 mlx5e_pflag_handler pflag_handler)
1540 struct mlx5e_priv *priv = netdev_priv(netdev);
1541 bool enable = !!(wanted_flags & flag);
1542 u32 changes = wanted_flags ^ priv->channels.params.pflags;
1545 if (!(changes & flag))
1548 err = pflag_handler(netdev, enable);
1550 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1551 enable ? "Enable" : "Disable", flag, err);
1555 MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1559 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1561 struct mlx5e_priv *priv = netdev_priv(netdev);
1564 mutex_lock(&priv->state_lock);
1565 err = mlx5e_handle_pflag(netdev, pflags,
1566 MLX5E_PFLAG_RX_CQE_BASED_MODER,
1567 set_pflag_rx_cqe_based_moder);
1571 err = mlx5e_handle_pflag(netdev, pflags,
1572 MLX5E_PFLAG_TX_CQE_BASED_MODER,
1573 set_pflag_tx_cqe_based_moder);
1577 err = mlx5e_handle_pflag(netdev, pflags,
1578 MLX5E_PFLAG_RX_CQE_COMPRESS,
1579 set_pflag_rx_cqe_compress);
1583 err = mlx5e_handle_pflag(netdev, pflags,
1584 MLX5E_PFLAG_RX_STRIDING_RQ,
1585 set_pflag_rx_striding_rq);
1589 err = mlx5e_handle_pflag(netdev, pflags,
1590 MLX5E_PFLAG_RX_NO_CSUM_COMPLETE,
1591 set_pflag_rx_no_csum_complete);
1594 mutex_unlock(&priv->state_lock);
1596 /* Need to fix some features.. */
1597 netdev_update_features(netdev);
1602 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1604 struct mlx5e_priv *priv = netdev_priv(netdev);
1606 return priv->channels.params.pflags;
1609 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1610 struct ethtool_flash *flash)
1612 struct mlx5_core_dev *mdev = priv->mdev;
1613 struct net_device *dev = priv->netdev;
1614 const struct firmware *fw;
1617 if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1620 err = request_firmware_direct(&fw, flash->data, &dev->dev);
1627 err = mlx5_firmware_flash(mdev, fw);
1628 release_firmware(fw);
1635 static int mlx5e_flash_device(struct net_device *dev,
1636 struct ethtool_flash *flash)
1638 struct mlx5e_priv *priv = netdev_priv(dev);
1640 return mlx5e_ethtool_flash_device(priv, flash);
1643 #ifndef CONFIG_MLX5_EN_RXNFC
1644 /* When CONFIG_MLX5_EN_RXNFC=n we only support ETHTOOL_GRXRINGS
1645 * otherwise this function will be defined from en_fs_ethtool.c
1647 static int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, u32 *rule_locs)
1649 struct mlx5e_priv *priv = netdev_priv(dev);
1651 if (info->cmd != ETHTOOL_GRXRINGS)
1653 /* ring_count is needed by ethtool -x */
1654 info->data = priv->channels.params.num_channels;
1659 const struct ethtool_ops mlx5e_ethtool_ops = {
1660 .get_drvinfo = mlx5e_get_drvinfo,
1661 .get_link = ethtool_op_get_link,
1662 .get_strings = mlx5e_get_strings,
1663 .get_sset_count = mlx5e_get_sset_count,
1664 .get_ethtool_stats = mlx5e_get_ethtool_stats,
1665 .get_ringparam = mlx5e_get_ringparam,
1666 .set_ringparam = mlx5e_set_ringparam,
1667 .get_channels = mlx5e_get_channels,
1668 .set_channels = mlx5e_set_channels,
1669 .get_coalesce = mlx5e_get_coalesce,
1670 .set_coalesce = mlx5e_set_coalesce,
1671 .get_link_ksettings = mlx5e_get_link_ksettings,
1672 .set_link_ksettings = mlx5e_set_link_ksettings,
1673 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
1674 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1675 .get_rxfh = mlx5e_get_rxfh,
1676 .set_rxfh = mlx5e_set_rxfh,
1677 .get_rxnfc = mlx5e_get_rxnfc,
1678 #ifdef CONFIG_MLX5_EN_RXNFC
1679 .set_rxnfc = mlx5e_set_rxnfc,
1681 .flash_device = mlx5e_flash_device,
1682 .get_tunable = mlx5e_get_tunable,
1683 .set_tunable = mlx5e_set_tunable,
1684 .get_pauseparam = mlx5e_get_pauseparam,
1685 .set_pauseparam = mlx5e_set_pauseparam,
1686 .get_ts_info = mlx5e_get_ts_info,
1687 .set_phys_id = mlx5e_set_phys_id,
1688 .get_wol = mlx5e_get_wol,
1689 .set_wol = mlx5e_set_wol,
1690 .get_module_info = mlx5e_get_module_info,
1691 .get_module_eeprom = mlx5e_get_module_eeprom,
1692 .get_priv_flags = mlx5e_get_priv_flags,
1693 .set_priv_flags = mlx5e_set_priv_flags,
1694 .self_test = mlx5e_self_test,
1695 .get_msglevel = mlx5e_get_msglevel,
1696 .set_msglevel = mlx5e_set_msglevel,