1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 // Copyright (c) 2020 Mellanox Technologies
7 struct mlx5e_skb_cb_hwtstamp {
12 void mlx5e_skb_cb_hwtstamp_init(struct sk_buff *skb)
14 memset(skb->cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));
17 static struct mlx5e_skb_cb_hwtstamp *mlx5e_skb_cb_get_hwts(struct sk_buff *skb)
19 BUILD_BUG_ON(sizeof(struct mlx5e_skb_cb_hwtstamp) > sizeof(skb->cb));
20 return (struct mlx5e_skb_cb_hwtstamp *)skb->cb;
23 static void mlx5e_skb_cb_hwtstamp_tx(struct sk_buff *skb,
24 struct mlx5e_ptp_cq_stats *cq_stats)
26 struct skb_shared_hwtstamps hwts = {};
29 diff = abs(mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp -
30 mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp);
32 /* Maximal allowed diff is 1 / 128 second */
33 if (diff > (NSEC_PER_SEC >> 7)) {
35 cq_stats->abort_abs_diff_ns += diff;
39 hwts.hwtstamp = mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp;
40 skb_tstamp_tx(skb, &hwts);
43 void mlx5e_skb_cb_hwtstamp_handler(struct sk_buff *skb, int hwtstamp_type,
45 struct mlx5e_ptp_cq_stats *cq_stats)
47 switch (hwtstamp_type) {
48 case (MLX5E_SKB_CB_CQE_HWTSTAMP):
49 mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp = hwtstamp;
51 case (MLX5E_SKB_CB_PORT_HWTSTAMP):
52 mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp = hwtstamp;
56 /* If both CQEs arrive, check and report the port tstamp, and clear skb cb as
57 * skb soon to be released.
59 if (!mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp ||
60 !mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp)
63 mlx5e_skb_cb_hwtstamp_tx(skb, cq_stats);
64 memset(skb->cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));
67 static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq,
68 struct mlx5_cqe64 *cqe,
71 struct sk_buff *skb = mlx5e_skb_fifo_pop(&ptpsq->skb_fifo);
72 struct mlx5e_txqsq *sq = &ptpsq->txqsq;
75 if (unlikely(MLX5E_RX_ERR_CQE(cqe))) {
76 ptpsq->cq_stats->err_cqe++;
80 hwtstamp = mlx5e_cqe_ts_to_ns(sq->ptp_cyc2time, sq->clock, get_cqe_ts(cqe));
81 mlx5e_skb_cb_hwtstamp_handler(skb, MLX5E_SKB_CB_PORT_HWTSTAMP,
82 hwtstamp, ptpsq->cq_stats);
83 ptpsq->cq_stats->cqe++;
86 napi_consume_skb(skb, budget);
89 static bool mlx5e_ptp_poll_ts_cq(struct mlx5e_cq *cq, int budget)
91 struct mlx5e_ptpsq *ptpsq = container_of(cq, struct mlx5e_ptpsq, ts_cq);
92 struct mlx5_cqwq *cqwq = &cq->wq;
93 struct mlx5_cqe64 *cqe;
96 if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &ptpsq->txqsq.state)))
99 cqe = mlx5_cqwq_get_cqe(cqwq);
106 mlx5e_ptp_handle_ts_cqe(ptpsq, cqe, budget);
107 } while ((++work_done < budget) && (cqe = mlx5_cqwq_get_cqe(cqwq)));
109 mlx5_cqwq_update_db_record(cqwq);
111 /* ensure cq space is freed before enabling more cqes */
114 return work_done == budget;
117 static int mlx5e_ptp_napi_poll(struct napi_struct *napi, int budget)
119 struct mlx5e_port_ptp *c = container_of(napi, struct mlx5e_port_ptp,
121 struct mlx5e_ch_stats *ch_stats = c->stats;
130 for (i = 0; i < c->num_tc; i++) {
131 busy |= mlx5e_poll_tx_cq(&c->ptpsq[i].txqsq.cq, budget);
132 busy |= mlx5e_ptp_poll_ts_cq(&c->ptpsq[i].ts_cq, budget);
140 if (unlikely(!napi_complete_done(napi, work_done)))
145 for (i = 0; i < c->num_tc; i++) {
146 mlx5e_cq_arm(&c->ptpsq[i].txqsq.cq);
147 mlx5e_cq_arm(&c->ptpsq[i].ts_cq);
156 static int mlx5e_ptp_alloc_txqsq(struct mlx5e_port_ptp *c, int txq_ix,
157 struct mlx5e_params *params,
158 struct mlx5e_sq_param *param,
159 struct mlx5e_txqsq *sq, int tc,
160 struct mlx5e_ptpsq *ptpsq)
162 void *sqc_wq = MLX5_ADDR_OF(sqc, param->sqc, wq);
163 struct mlx5_core_dev *mdev = c->mdev;
164 struct mlx5_wq_cyc *wq = &sq->wq;
169 sq->tstamp = c->tstamp;
170 sq->clock = &mdev->clock;
171 sq->mkey_be = c->mkey_be;
172 sq->netdev = c->netdev;
177 sq->uar_map = mdev->mlx5e_res.hw_objs.bfreg.map;
178 sq->min_inline_mode = params->tx_min_inline_mode;
179 sq->hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu);
180 sq->stats = &c->priv->port_ptp_stats.sq[tc];
182 INIT_WORK(&sq->recover_work, mlx5e_tx_err_cqe_work);
183 if (!MLX5_CAP_ETH(mdev, wqe_vlan_insert))
184 set_bit(MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, &sq->state);
185 sq->stop_room = param->stop_room;
186 sq->ptp_cyc2time = mlx5_is_real_time_sq(mdev) ?
187 mlx5_real_time_cyc2time :
188 mlx5_timecounter_cyc2time;
190 node = dev_to_node(mlx5_core_dma_dev(mdev));
192 param->wq.db_numa_node = node;
193 err = mlx5_wq_cyc_create(mdev, ¶m->wq, sqc_wq, wq, &sq->wq_ctrl);
196 wq->db = &wq->db[MLX5_SND_DBR];
198 err = mlx5e_alloc_txqsq_db(sq, node);
200 goto err_sq_wq_destroy;
205 mlx5_wq_destroy(&sq->wq_ctrl);
210 static void mlx5e_ptp_destroy_sq(struct mlx5_core_dev *mdev, u32 sqn)
212 mlx5_core_destroy_sq(mdev, sqn);
215 static int mlx5e_ptp_alloc_traffic_db(struct mlx5e_ptpsq *ptpsq, int numa)
217 int wq_sz = mlx5_wq_cyc_get_size(&ptpsq->txqsq.wq);
219 ptpsq->skb_fifo.fifo = kvzalloc_node(array_size(wq_sz, sizeof(*ptpsq->skb_fifo.fifo)),
221 if (!ptpsq->skb_fifo.fifo)
224 ptpsq->skb_fifo.pc = &ptpsq->skb_fifo_pc;
225 ptpsq->skb_fifo.cc = &ptpsq->skb_fifo_cc;
226 ptpsq->skb_fifo.mask = wq_sz - 1;
231 static void mlx5e_ptp_drain_skb_fifo(struct mlx5e_skb_fifo *skb_fifo)
233 while (*skb_fifo->pc != *skb_fifo->cc) {
234 struct sk_buff *skb = mlx5e_skb_fifo_pop(skb_fifo);
236 dev_kfree_skb_any(skb);
240 static void mlx5e_ptp_free_traffic_db(struct mlx5e_skb_fifo *skb_fifo)
242 mlx5e_ptp_drain_skb_fifo(skb_fifo);
243 kvfree(skb_fifo->fifo);
246 static int mlx5e_ptp_open_txqsq(struct mlx5e_port_ptp *c, u32 tisn,
247 int txq_ix, struct mlx5e_ptp_params *cparams,
248 int tc, struct mlx5e_ptpsq *ptpsq)
250 struct mlx5e_sq_param *sqp = &cparams->txq_sq_param;
251 struct mlx5e_txqsq *txqsq = &ptpsq->txqsq;
252 struct mlx5e_create_sq_param csp = {};
255 err = mlx5e_ptp_alloc_txqsq(c, txq_ix, &cparams->params, sqp,
262 csp.cqn = txqsq->cq.mcq.cqn;
263 csp.wq_ctrl = &txqsq->wq_ctrl;
264 csp.min_inline_mode = txqsq->min_inline_mode;
265 csp.ts_cqe_to_dest_cqn = ptpsq->ts_cq.mcq.cqn;
267 err = mlx5e_create_sq_rdy(c->mdev, sqp, &csp, 0, &txqsq->sqn);
271 err = mlx5e_ptp_alloc_traffic_db(ptpsq,
272 dev_to_node(mlx5_core_dma_dev(c->mdev)));
279 mlx5e_free_txqsq(txqsq);
284 static void mlx5e_ptp_close_txqsq(struct mlx5e_ptpsq *ptpsq)
286 struct mlx5e_txqsq *sq = &ptpsq->txqsq;
287 struct mlx5_core_dev *mdev = sq->mdev;
289 mlx5e_ptp_free_traffic_db(&ptpsq->skb_fifo);
290 cancel_work_sync(&sq->recover_work);
291 mlx5e_ptp_destroy_sq(mdev, sq->sqn);
292 mlx5e_free_txqsq_descs(sq);
293 mlx5e_free_txqsq(sq);
296 static int mlx5e_ptp_open_txqsqs(struct mlx5e_port_ptp *c,
297 struct mlx5e_ptp_params *cparams)
299 struct mlx5e_params *params = &cparams->params;
304 ix_base = params->num_tc * params->num_channels;
306 for (tc = 0; tc < params->num_tc; tc++) {
307 int txq_ix = ix_base + tc;
309 err = mlx5e_ptp_open_txqsq(c, c->priv->tisn[c->lag_port][tc], txq_ix,
310 cparams, tc, &c->ptpsq[tc]);
318 for (--tc; tc >= 0; tc--)
319 mlx5e_ptp_close_txqsq(&c->ptpsq[tc]);
324 static void mlx5e_ptp_close_txqsqs(struct mlx5e_port_ptp *c)
328 for (tc = 0; tc < c->num_tc; tc++)
329 mlx5e_ptp_close_txqsq(&c->ptpsq[tc]);
332 static int mlx5e_ptp_open_cqs(struct mlx5e_port_ptp *c,
333 struct mlx5e_ptp_params *cparams)
335 struct mlx5e_params *params = &cparams->params;
336 struct mlx5e_create_cq_param ccp = {};
337 struct dim_cq_moder ptp_moder = {};
338 struct mlx5e_cq_param *cq_param;
342 ccp.node = dev_to_node(mlx5_core_dma_dev(c->mdev));
343 ccp.ch_stats = c->stats;
347 cq_param = &cparams->txq_sq_param.cqp;
349 for (tc = 0; tc < params->num_tc; tc++) {
350 struct mlx5e_cq *cq = &c->ptpsq[tc].txqsq.cq;
352 err = mlx5e_open_cq(c->priv, ptp_moder, cq_param, &ccp, cq);
354 goto out_err_txqsq_cq;
357 for (tc = 0; tc < params->num_tc; tc++) {
358 struct mlx5e_cq *cq = &c->ptpsq[tc].ts_cq;
359 struct mlx5e_ptpsq *ptpsq = &c->ptpsq[tc];
361 err = mlx5e_open_cq(c->priv, ptp_moder, cq_param, &ccp, cq);
365 ptpsq->cq_stats = &c->priv->port_ptp_stats.cq[tc];
371 for (--tc; tc >= 0; tc--)
372 mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
375 for (--tc; tc >= 0; tc--)
376 mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
381 static void mlx5e_ptp_close_cqs(struct mlx5e_port_ptp *c)
385 for (tc = 0; tc < c->num_tc; tc++)
386 mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
388 for (tc = 0; tc < c->num_tc; tc++)
389 mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
392 static void mlx5e_ptp_build_sq_param(struct mlx5e_priv *priv,
393 struct mlx5e_params *params,
394 struct mlx5e_sq_param *param)
396 void *sqc = param->sqc;
399 mlx5e_build_sq_param_common(priv, param);
401 wq = MLX5_ADDR_OF(sqc, sqc, wq);
402 MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);
403 param->stop_room = mlx5e_stop_room_for_wqe(MLX5_SEND_WQE_MAX_WQEBBS);
404 mlx5e_build_tx_cq_param(priv, params, ¶m->cqp);
407 static void mlx5e_ptp_build_params(struct mlx5e_port_ptp *c,
408 struct mlx5e_ptp_params *cparams,
409 struct mlx5e_params *orig)
411 struct mlx5e_params *params = &cparams->params;
413 params->tx_min_inline_mode = orig->tx_min_inline_mode;
414 params->num_channels = orig->num_channels;
415 params->hard_mtu = orig->hard_mtu;
416 params->sw_mtu = orig->sw_mtu;
417 params->num_tc = orig->num_tc;
420 params->log_sq_size = orig->log_sq_size;
422 mlx5e_ptp_build_sq_param(c->priv, params, &cparams->txq_sq_param);
425 static int mlx5e_ptp_open_queues(struct mlx5e_port_ptp *c,
426 struct mlx5e_ptp_params *cparams)
430 err = mlx5e_ptp_open_cqs(c, cparams);
434 err = mlx5e_ptp_open_txqsqs(c, cparams);
441 mlx5e_ptp_close_cqs(c);
446 static void mlx5e_ptp_close_queues(struct mlx5e_port_ptp *c)
448 mlx5e_ptp_close_txqsqs(c);
449 mlx5e_ptp_close_cqs(c);
452 int mlx5e_port_ptp_open(struct mlx5e_priv *priv, struct mlx5e_params *params,
453 u8 lag_port, struct mlx5e_port_ptp **cp)
455 struct net_device *netdev = priv->netdev;
456 struct mlx5_core_dev *mdev = priv->mdev;
457 struct mlx5e_ptp_params *cparams;
458 struct mlx5e_port_ptp *c;
463 err = mlx5_vector2eqn(priv->mdev, 0, &eqn, &irq);
467 c = kvzalloc_node(sizeof(*c), GFP_KERNEL, dev_to_node(mlx5_core_dma_dev(mdev)));
468 cparams = kvzalloc(sizeof(*cparams), GFP_KERNEL);
473 c->mdev = priv->mdev;
474 c->tstamp = &priv->tstamp;
476 c->pdev = mlx5_core_dma_dev(priv->mdev);
477 c->netdev = priv->netdev;
478 c->mkey_be = cpu_to_be32(priv->mdev->mlx5e_res.hw_objs.mkey.key);
479 c->num_tc = params->num_tc;
480 c->stats = &priv->port_ptp_stats.ch;
481 c->lag_port = lag_port;
483 netif_napi_add(netdev, &c->napi, mlx5e_ptp_napi_poll, 64);
485 mlx5e_ptp_build_params(c, cparams, params);
487 err = mlx5e_ptp_open_queues(c, cparams);
498 netif_napi_del(&c->napi);
505 void mlx5e_port_ptp_close(struct mlx5e_port_ptp *c)
507 mlx5e_ptp_close_queues(c);
508 netif_napi_del(&c->napi);
513 void mlx5e_ptp_activate_channel(struct mlx5e_port_ptp *c)
517 napi_enable(&c->napi);
519 for (tc = 0; tc < c->num_tc; tc++)
520 mlx5e_activate_txqsq(&c->ptpsq[tc].txqsq);
523 void mlx5e_ptp_deactivate_channel(struct mlx5e_port_ptp *c)
527 for (tc = 0; tc < c->num_tc; tc++)
528 mlx5e_deactivate_txqsq(&c->ptpsq[tc].txqsq);
530 napi_disable(&c->napi);