drivers/net/ethernet/mellanox/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/slab.h>
  42 #include <linux/io-mapping.h>
  43 #include <linux/delay.h>
  44 #include <linux/netdevice.h>
  45
  46 #include <linux/mlx4/device.h>
  47 #include <linux/mlx4/doorbell.h>
  48
  49 #include "mlx4.h"
  50 #include "fw.h"
  51 #include "icm.h"
  52
  53 MODULE_AUTHOR("Roland Dreier");
  54 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  55 MODULE_LICENSE("Dual BSD/GPL");
  56 MODULE_VERSION(DRV_VERSION);
  57
  58 struct workqueue_struct *mlx4_wq;
  59
  60 #ifdef CONFIG_MLX4_DEBUG
  61
  62 int mlx4_debug_level = 0;
  63 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  64 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  65
  66 #endif /* CONFIG_MLX4_DEBUG */
  67
  68 #ifdef CONFIG_PCI_MSI
  69
  70 static int msi_x = 1;
  71 module_param(msi_x, int, 0444);
  72 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  73
  74 #else /* CONFIG_PCI_MSI */
  75
  76 #define msi_x (0)
  77
  78 #endif /* CONFIG_PCI_MSI */
  79
  80 static int num_vfs;
  81 module_param(num_vfs, int, 0444);
  82 MODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0");
  83
  84 static int probe_vf;
  85 module_param(probe_vf, int, 0644);
  86 MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
  87
  88 int mlx4_log_num_mgm_entry_size = 10;
  89 module_param_named(log_num_mgm_entry_size,
  90                         mlx4_log_num_mgm_entry_size, int, 0444);
  91 MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
  92                                          " of qp per mcg, for example:"
  93                                          " 10 gives 248.range: 9<="
  94                                          " log_num_mgm_entry_size <= 12");
  95
  96 #define MLX4_VF                                        (1 << 0)
  97
  98 #define HCA_GLOBAL_CAP_MASK            0
  99 #define PF_CONTEXT_BEHAVIOUR_MASK      0
 100
 101 static char mlx4_version[] __devinitdata =
 102         DRV_NAME ": Mellanox ConnectX core driver v"
 103         DRV_VERSION " (" DRV_RELDATE ")\n";
 104
 105 static struct mlx4_profile default_profile = {
 106         .num_qp         = 1 << 18,
 107         .num_srq        = 1 << 16,
 108         .rdmarc_per_qp  = 1 << 4,
 109         .num_cq         = 1 << 16,
 110         .num_mcg        = 1 << 13,
 111         .num_mpt        = 1 << 19,
 112         .num_mtt        = 1 << 20, /* It is really num mtt segements */
 113 };
 114
 115 static int log_num_mac = 7;
 116 module_param_named(log_num_mac, log_num_mac, int, 0444);
 117 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
 118
 119 static int log_num_vlan;
 120 module_param_named(log_num_vlan, log_num_vlan, int, 0444);
 121 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
 122 /* Log2 max number of VLANs per ETH port (0-7) */
 123 #define MLX4_LOG_NUM_VLANS 7
 124
 125 static bool use_prio;
 126 module_param_named(use_prio, use_prio, bool, 0444);
 127 MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports "
 128                   "(0/1, default 0)");
 129
 130 int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG);
 131 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
 132 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)");
 133
 134 static int port_type_array[2] = {MLX4_PORT_TYPE_NONE, MLX4_PORT_TYPE_NONE};
 135 static int arr_argc = 2;
 136 module_param_array(port_type_array, int, &arr_argc, 0444);
 137 MODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is default "
 138                                 "1 for IB, 2 for Ethernet");
 139
 140 struct mlx4_port_config {
 141         struct list_head list;
 142         enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
 143         struct pci_dev *pdev;
 144 };
 145
 146 int mlx4_check_port_params(struct mlx4_dev *dev,
 147                            enum mlx4_port_type *port_type)
 148 {
 149         int i;
 150
 151         for (i = 0; i < dev->caps.num_ports - 1; i++) {
 152                 if (port_type[i] != port_type[i + 1]) {
 153                         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
 154                                 mlx4_err(dev, "Only same port types supported "
 155                                          "on this HCA, aborting.\n");
 156                                 return -EINVAL;
 157                         }
 158                         if (port_type[i] == MLX4_PORT_TYPE_ETH &&
 159                             port_type[i + 1] == MLX4_PORT_TYPE_IB)
 160                                 return -EINVAL;
 161                 }
 162         }
 163
 164         for (i = 0; i < dev->caps.num_ports; i++) {
 165                 if (!(port_type[i] & dev->caps.supported_type[i+1])) {
 166                         mlx4_err(dev, "Requested port type for port %d is not "
 167                                       "supported on this HCA\n", i + 1);
 168                         return -EINVAL;
 169                 }
 170         }
 171         return 0;
 172 }
 173
 174 static void mlx4_set_port_mask(struct mlx4_dev *dev)
 175 {
 176         int i;
 177
 178         for (i = 1; i <= dev->caps.num_ports; ++i)
 179                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 180 }
 181
 182 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
 183 {
 184         int err;
 185         int i;
 186
 187         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
 188         if (err) {
 189                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 190                 return err;
 191         }
 192
 193         if (dev_cap->min_page_sz > PAGE_SIZE) {
 194                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 195                          "kernel PAGE_SIZE of %ld, aborting.\n",
 196                          dev_cap->min_page_sz, PAGE_SIZE);
 197                 return -ENODEV;
 198         }
 199         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 200                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 201                          "aborting.\n",
 202                          dev_cap->num_ports, MLX4_MAX_PORTS);
 203                 return -ENODEV;
 204         }
 205
 206         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 207                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 208                          "PCI resource 2 size of 0x%llx, aborting.\n",
 209                          dev_cap->uar_size,
 210                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 211                 return -ENODEV;
 212         }
 213
 214         dev->caps.num_ports          = dev_cap->num_ports;
 215         dev->phys_caps.num_phys_eqs  = MLX4_MAX_EQ_NUM;
 216         for (i = 1; i <= dev->caps.num_ports; ++i) {
 217                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 218                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];
 219                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 220                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 221                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 222                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
 223                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];
 224                 dev->caps.supported_type[i] = dev_cap->supported_port_types[i];
 225                 dev->caps.suggested_type[i] = dev_cap->suggested_type[i];
 226                 dev->caps.default_sense[i] = dev_cap->default_sense[i];
 227                 dev->caps.trans_type[i]     = dev_cap->trans_type[i];
 228                 dev->caps.vendor_oui[i]     = dev_cap->vendor_oui[i];
 229                 dev->caps.wavelength[i]     = dev_cap->wavelength[i];
 230                 dev->caps.trans_code[i]     = dev_cap->trans_code[i];
 231         }
 232
 233         dev->caps.uar_page_size      = PAGE_SIZE;
 234         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 235         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 236         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 237         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 238         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 239         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 240         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 241         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 242         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 243         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 244         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 245         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 246         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 247         /*
 248          * Subtract 1 from the limit because we need to allocate a
 249          * spare CQE so the HCA HW can tell the difference between an
 250          * empty CQ and a full CQ.
 251          */
 252         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 253         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 254         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 255         dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
 256         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 257
 258         /* The first 128 UARs are used for EQ doorbells */
 259         dev->caps.reserved_uars      = max_t(int, 128, dev_cap->reserved_uars);
 260         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 261         dev->caps.reserved_xrcds     = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 262                                         dev_cap->reserved_xrcds : 0;
 263         dev->caps.max_xrcds          = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 264                                         dev_cap->max_xrcds : 0;
 265         dev->caps.mtt_entry_sz       = dev_cap->mtt_entry_sz;
 266
 267         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 268         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 269         dev->caps.flags              = dev_cap->flags;
 270         dev->caps.flags2             = dev_cap->flags2;
 271         dev->caps.bmme_flags         = dev_cap->bmme_flags;
 272         dev->caps.reserved_lkey      = dev_cap->reserved_lkey;
 273         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 274         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 275         dev->caps.max_rss_tbl_sz     = dev_cap->max_rss_tbl_sz;
 276
 277         if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
 278             dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) {
 279                 dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
 280         } else {
 281                 dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
 282
 283                 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
 284                     dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
 285                         mlx4_warn(dev, "Must have UC_STEER and MC_STEER flags "
 286                                        "set to use B0 steering. Falling back to A0 steering mode.\n");
 287         }
 288         mlx4_dbg(dev, "Steering mode is: %s\n",
 289                  mlx4_steering_mode_str(dev->caps.steering_mode));
 290         dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
 291
 292         /* Sense port always allowed on supported devices for ConnectX1 and 2 */
 293         if (dev->pdev->device != 0x1003)
 294                 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
 295
 296         dev->caps.log_num_macs  = log_num_mac;
 297         dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS;
 298         dev->caps.log_num_prios = use_prio ? 3 : 0;
 299
 300         for (i = 1; i <= dev->caps.num_ports; ++i) {
 301                 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE;
 302                 if (dev->caps.supported_type[i]) {
 303                         /* if only ETH is supported - assign ETH */
 304                         if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
 305                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 306                         /* if only IB is supported,
 307                          * assign IB only if SRIOV is off*/
 308                         else if (dev->caps.supported_type[i] ==
 309                                  MLX4_PORT_TYPE_IB) {
 310                                 if (dev->flags & MLX4_FLAG_SRIOV)
 311                                         dev->caps.port_type[i] =
 312                                                 MLX4_PORT_TYPE_NONE;
 313                                 else
 314                                         dev->caps.port_type[i] =
 315                                                 MLX4_PORT_TYPE_IB;
 316                         /* if IB and ETH are supported,
 317                          * first of all check if SRIOV is on */
 318                         } else if (dev->flags & MLX4_FLAG_SRIOV)
 319                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 320                         else {
 321                                 /* In non-SRIOV mode, we set the port type
 322                                  * according to user selection of port type,
 323                                  * if usere selected none, take the FW hint */
 324                                 if (port_type_array[i-1] == MLX4_PORT_TYPE_NONE)
 325                                         dev->caps.port_type[i] = dev->caps.suggested_type[i] ?
 326                                                 MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB;
 327                                 else
 328                                         dev->caps.port_type[i] = port_type_array[i-1];
 329                         }
 330                 }
 331                 /*
 332                  * Link sensing is allowed on the port if 3 conditions are true:
 333                  * 1. Both protocols are supported on the port.
 334                  * 2. Different types are supported on the port
 335                  * 3. FW declared that it supports link sensing
 336                  */
 337                 mlx4_priv(dev)->sense.sense_allowed[i] =
 338                         ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) &&
 339                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 340                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT));
 341
 342                 /*
 343                  * If "default_sense" bit is set, we move the port to "AUTO" mode
 344                  * and perform sense_port FW command to try and set the correct
 345                  * port type from beginning
 346                  */
 347                 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) {
 348                         enum mlx4_port_type sensed_port = MLX4_PORT_TYPE_NONE;
 349                         dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO;
 350                         mlx4_SENSE_PORT(dev, i, &sensed_port);
 351                         if (sensed_port != MLX4_PORT_TYPE_NONE)
 352                                 dev->caps.port_type[i] = sensed_port;
 353                 } else {
 354                         dev->caps.possible_type[i] = dev->caps.port_type[i];
 355                 }
 356
 357                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
 358                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
 359                         mlx4_warn(dev, "Requested number of MACs is too much "
 360                                   "for port %d, reducing to %d.\n",
 361                                   i, 1 << dev->caps.log_num_macs);
 362                 }
 363                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
 364                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
 365                         mlx4_warn(dev, "Requested number of VLANs is too much "
 366                                   "for port %d, reducing to %d.\n",
 367                                   i, 1 << dev->caps.log_num_vlans);
 368                 }
 369         }
 370
 371         dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters);
 372
 373         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
 374         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
 375                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
 376                 (1 << dev->caps.log_num_macs) *
 377                 (1 << dev->caps.log_num_vlans) *
 378                 (1 << dev->caps.log_num_prios) *
 379                 dev->caps.num_ports;
 380         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
 381
 382         dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
 383                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
 384                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
 385                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
 386
 387         return 0;
 388 }
 389 /*The function checks if there are live vf, return the num of them*/
 390 static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
 391 {
 392         struct mlx4_priv *priv = mlx4_priv(dev);
 393         struct mlx4_slave_state *s_state;
 394         int i;
 395         int ret = 0;
 396
 397         for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) {
 398                 s_state = &priv->mfunc.master.slave_state[i];
 399                 if (s_state->active && s_state->last_cmd !=
 400                     MLX4_COMM_CMD_RESET) {
 401                         mlx4_warn(dev, "%s: slave: %d is still active\n",
 402                                   __func__, i);
 403                         ret++;
 404                 }
 405         }
 406         return ret;
 407 }
 408
 409 int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
 410 {
 411         struct mlx4_priv *priv = mlx4_priv(dev);
 412         struct mlx4_slave_state *s_slave;
 413
 414         if (!mlx4_is_master(dev))
 415                 return 0;
 416
 417         s_slave = &priv->mfunc.master.slave_state[slave];
 418         return !!s_slave->active;
 419 }
 420 EXPORT_SYMBOL(mlx4_is_slave_active);
 421
 422 static int mlx4_slave_cap(struct mlx4_dev *dev)
 423 {
 424         int                        err;
 425         u32                        page_size;
 426         struct mlx4_dev_cap        dev_cap;
 427         struct mlx4_func_cap       func_cap;
 428         struct mlx4_init_hca_param hca_param;
 429         int                        i;
 430
 431         memset(&hca_param, 0, sizeof(hca_param));
 432         err = mlx4_QUERY_HCA(dev, &hca_param);
 433         if (err) {
 434                 mlx4_err(dev, "QUERY_HCA command failed, aborting.\n");
 435                 return err;
 436         }
 437
 438         /*fail if the hca has an unknown capability */
 439         if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) !=
 440             HCA_GLOBAL_CAP_MASK) {
 441                 mlx4_err(dev, "Unknown hca global capabilities\n");
 442                 return -ENOSYS;
 443         }
 444
 445         mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
 446
 447         memset(&dev_cap, 0, sizeof(dev_cap));
 448         dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp;
 449         err = mlx4_dev_cap(dev, &dev_cap);
 450         if (err) {
 451                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 452                 return err;
 453         }
 454
 455         err = mlx4_QUERY_FW(dev);
 456         if (err)
 457                 mlx4_err(dev, "QUERY_FW command failed: could not get FW version.\n");
 458
 459         page_size = ~dev->caps.page_size_cap + 1;
 460         mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);
 461         if (page_size > PAGE_SIZE) {
 462                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 463                          "kernel PAGE_SIZE of %ld, aborting.\n",
 464                          page_size, PAGE_SIZE);
 465                 return -ENODEV;
 466         }
 467
 468         /* slave gets uar page size from QUERY_HCA fw command */
 469         dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12);
 470
 471         /* TODO: relax this assumption */
 472         if (dev->caps.uar_page_size != PAGE_SIZE) {
 473                 mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n",
 474                          dev->caps.uar_page_size, PAGE_SIZE);
 475                 return -ENODEV;
 476         }
 477
 478         memset(&func_cap, 0, sizeof(func_cap));
 479         err = mlx4_QUERY_FUNC_CAP(dev, &func_cap);
 480         if (err) {
 481                 mlx4_err(dev, "QUERY_FUNC_CAP command failed, aborting.\n");
 482                 return err;
 483         }
 484
 485         if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) !=
 486             PF_CONTEXT_BEHAVIOUR_MASK) {
 487                 mlx4_err(dev, "Unknown pf context behaviour\n");
 488                 return -ENOSYS;
 489         }
 490
 491         dev->caps.num_ports             = func_cap.num_ports;
 492         dev->caps.num_qps               = func_cap.qp_quota;
 493         dev->caps.num_srqs              = func_cap.srq_quota;
 494         dev->caps.num_cqs               = func_cap.cq_quota;
 495         dev->caps.num_eqs               = func_cap.max_eq;
 496         dev->caps.reserved_eqs          = func_cap.reserved_eq;
 497         dev->caps.num_mpts              = func_cap.mpt_quota;
 498         dev->caps.num_mtts              = func_cap.mtt_quota;
 499         dev->caps.num_pds               = MLX4_NUM_PDS;
 500         dev->caps.num_mgms              = 0;
 501         dev->caps.num_amgms             = 0;
 502
 503         if (dev->caps.num_ports > MLX4_MAX_PORTS) {
 504                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 505                          "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS);
 506                 return -ENODEV;
 507         }
 508
 509         for (i = 1; i <= dev->caps.num_ports; ++i)
 510                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 511
 512         if (dev->caps.uar_page_size * (dev->caps.num_uars -
 513                                        dev->caps.reserved_uars) >
 514                                        pci_resource_len(dev->pdev, 2)) {
 515                 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than "
 516                          "PCI resource 2 size of 0x%llx, aborting.\n",
 517                          dev->caps.uar_page_size * dev->caps.num_uars,
 518                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 519                 return -ENODEV;
 520         }
 521
 522         return 0;
 523 }
 524
 525 /*
 526  * Change the port configuration of the device.
 527  * Every user of this function must hold the port mutex.
 528  */
 529 int mlx4_change_port_types(struct mlx4_dev *dev,
 530                            enum mlx4_port_type *port_types)
 531 {
 532         int err = 0;
 533         int change = 0;
 534         int port;
 535
 536         for (port = 0; port <  dev->caps.num_ports; port++) {
 537                 /* Change the port type only if the new type is different
 538                  * from the current, and not set to Auto */
 539                 if (port_types[port] != dev->caps.port_type[port + 1])
 540                         change = 1;
 541         }
 542         if (change) {
 543                 mlx4_unregister_device(dev);
 544                 for (port = 1; port <= dev->caps.num_ports; port++) {
 545                         mlx4_CLOSE_PORT(dev, port);
 546                         dev->caps.port_type[port] = port_types[port - 1];
 547                         err = mlx4_SET_PORT(dev, port);
 548                         if (err) {
 549                                 mlx4_err(dev, "Failed to set port %d, "
 550                                               "aborting\n", port);
 551                                 goto out;
 552                         }
 553                 }
 554                 mlx4_set_port_mask(dev);
 555                 err = mlx4_register_device(dev);
 556         }
 557
 558 out:
 559         return err;
 560 }
 561
 562 static ssize_t show_port_type(struct device *dev,
 563                               struct device_attribute *attr,
 564                               char *buf)
 565 {
 566         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 567                                                    port_attr);
 568         struct mlx4_dev *mdev = info->dev;
 569         char type[8];
 570
 571         sprintf(type, "%s",
 572                 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ?
 573                 "ib" : "eth");
 574         if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO)
 575                 sprintf(buf, "auto (%s)\n", type);
 576         else
 577                 sprintf(buf, "%s\n", type);
 578
 579         return strlen(buf);
 580 }
 581
 582 static ssize_t set_port_type(struct device *dev,
 583                              struct device_attribute *attr,
 584                              const char *buf, size_t count)
 585 {
 586         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 587                                                    port_attr);
 588         struct mlx4_dev *mdev = info->dev;
 589         struct mlx4_priv *priv = mlx4_priv(mdev);
 590         enum mlx4_port_type types[MLX4_MAX_PORTS];
 591         enum mlx4_port_type new_types[MLX4_MAX_PORTS];
 592         int i;
 593         int err = 0;
 594
 595         if (!strcmp(buf, "ib\n"))
 596                 info->tmp_type = MLX4_PORT_TYPE_IB;
 597         else if (!strcmp(buf, "eth\n"))
 598                 info->tmp_type = MLX4_PORT_TYPE_ETH;
 599         else if (!strcmp(buf, "auto\n"))
 600                 info->tmp_type = MLX4_PORT_TYPE_AUTO;
 601         else {
 602                 mlx4_err(mdev, "%s is not supported port type\n", buf);
 603                 return -EINVAL;
 604         }
 605
 606         mlx4_stop_sense(mdev);
 607         mutex_lock(&priv->port_mutex);
 608         /* Possible type is always the one that was delivered */
 609         mdev->caps.possible_type[info->port] = info->tmp_type;
 610
 611         for (i = 0; i < mdev->caps.num_ports; i++) {
 612                 types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type :
 613                                         mdev->caps.possible_type[i+1];
 614                 if (types[i] == MLX4_PORT_TYPE_AUTO)
 615                         types[i] = mdev->caps.port_type[i+1];
 616         }
 617
 618         if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 619             !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) {
 620                 for (i = 1; i <= mdev->caps.num_ports; i++) {
 621                         if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) {
 622                                 mdev->caps.possible_type[i] = mdev->caps.port_type[i];
 623                                 err = -EINVAL;
 624                         }
 625                 }
 626         }
 627         if (err) {
 628                 mlx4_err(mdev, "Auto sensing is not supported on this HCA. "
 629                                "Set only 'eth' or 'ib' for both ports "
 630                                "(should be the same)\n");
 631                 goto out;
 632         }
 633
 634         mlx4_do_sense_ports(mdev, new_types, types);
 635
 636         err = mlx4_check_port_params(mdev, new_types);
 637         if (err)
 638                 goto out;
 639
 640         /* We are about to apply the changes after the configuration
 641          * was verified, no need to remember the temporary types
 642          * any more */
 643         for (i = 0; i < mdev->caps.num_ports; i++)
 644                 priv->port[i + 1].tmp_type = 0;
 645
 646         err = mlx4_change_port_types(mdev, new_types);
 647
 648 out:
 649         mlx4_start_sense(mdev);
 650         mutex_unlock(&priv->port_mutex);
 651         return err ? err : count;
 652 }
 653
 654 enum ibta_mtu {
 655         IB_MTU_256  = 1,
 656         IB_MTU_512  = 2,
 657         IB_MTU_1024 = 3,
 658         IB_MTU_2048 = 4,
 659         IB_MTU_4096 = 5
 660 };
 661
 662 static inline int int_to_ibta_mtu(int mtu)
 663 {
 664         switch (mtu) {
 665         case 256:  return IB_MTU_256;
 666         case 512:  return IB_MTU_512;
 667         case 1024: return IB_MTU_1024;
 668         case 2048: return IB_MTU_2048;
 669         case 4096: return IB_MTU_4096;
 670         default: return -1;
 671         }
 672 }
 673
 674 static inline int ibta_mtu_to_int(enum ibta_mtu mtu)
 675 {
 676         switch (mtu) {
 677         case IB_MTU_256:  return  256;
 678         case IB_MTU_512:  return  512;
 679         case IB_MTU_1024: return 1024;
 680         case IB_MTU_2048: return 2048;
 681         case IB_MTU_4096: return 4096;
 682         default: return -1;
 683         }
 684 }
 685
 686 static ssize_t show_port_ib_mtu(struct device *dev,
 687                              struct device_attribute *attr,
 688                              char *buf)
 689 {
 690         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 691                                                    port_mtu_attr);
 692         struct mlx4_dev *mdev = info->dev;
 693
 694         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH)
 695                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 696
 697         sprintf(buf, "%d\n",
 698                         ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port]));
 699         return strlen(buf);
 700 }
 701
 702 static ssize_t set_port_ib_mtu(struct device *dev,
 703                              struct device_attribute *attr,
 704                              const char *buf, size_t count)
 705 {
 706         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 707                                                    port_mtu_attr);
 708         struct mlx4_dev *mdev = info->dev;
 709         struct mlx4_priv *priv = mlx4_priv(mdev);
 710         int err, port, mtu, ibta_mtu = -1;
 711
 712         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) {
 713                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 714                 return -EINVAL;
 715         }
 716
 717         err = sscanf(buf, "%d", &mtu);
 718         if (err > 0)
 719                 ibta_mtu = int_to_ibta_mtu(mtu);
 720
 721         if (err <= 0 || ibta_mtu < 0) {
 722                 mlx4_err(mdev, "%s is invalid IBTA mtu\n", buf);
 723                 return -EINVAL;
 724         }
 725
 726         mdev->caps.port_ib_mtu[info->port] = ibta_mtu;
 727
 728         mlx4_stop_sense(mdev);
 729         mutex_lock(&priv->port_mutex);
 730         mlx4_unregister_device(mdev);
 731         for (port = 1; port <= mdev->caps.num_ports; port++) {
 732                 mlx4_CLOSE_PORT(mdev, port);
 733                 err = mlx4_SET_PORT(mdev, port);
 734                 if (err) {
 735                         mlx4_err(mdev, "Failed to set port %d, "
 736                                       "aborting\n", port);
 737                         goto err_set_port;
 738                 }
 739         }
 740         err = mlx4_register_device(mdev);
 741 err_set_port:
 742         mutex_unlock(&priv->port_mutex);
 743         mlx4_start_sense(mdev);
 744         return err ? err : count;
 745 }
 746
 747 static int mlx4_load_fw(struct mlx4_dev *dev)
 748 {
 749         struct mlx4_priv *priv = mlx4_priv(dev);
 750         int err;
 751
 752         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 753                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 754         if (!priv->fw.fw_icm) {
 755                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 756                 return -ENOMEM;
 757         }
 758
 759         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 760         if (err) {
 761                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 762                 goto err_free;
 763         }
 764
 765         err = mlx4_RUN_FW(dev);
 766         if (err) {
 767                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 768                 goto err_unmap_fa;
 769         }
 770
 771         return 0;
 772
 773 err_unmap_fa:
 774         mlx4_UNMAP_FA(dev);
 775
 776 err_free:
 777         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 778         return err;
 779 }
 780
 781 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 782                                 int cmpt_entry_sz)
 783 {
 784         struct mlx4_priv *priv = mlx4_priv(dev);
 785         int err;
 786         int num_eqs;
 787
 788         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 789                                   cmpt_base +
 790                                   ((u64) (MLX4_CMPT_TYPE_QP *
 791                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 792                                   cmpt_entry_sz, dev->caps.num_qps,
 793                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 794                                   0, 0);
 795         if (err)
 796                 goto err;
 797
 798         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 799                                   cmpt_base +
 800                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 801                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 802                                   cmpt_entry_sz, dev->caps.num_srqs,
 803                                   dev->caps.reserved_srqs, 0, 0);
 804         if (err)
 805                 goto err_qp;
 806
 807         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 808                                   cmpt_base +
 809                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 810                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 811                                   cmpt_entry_sz, dev->caps.num_cqs,
 812                                   dev->caps.reserved_cqs, 0, 0);
 813         if (err)
 814                 goto err_srq;
 815
 816         num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs :
 817                   dev->caps.num_eqs;
 818         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 819                                   cmpt_base +
 820                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 821                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 822                                   cmpt_entry_sz, num_eqs, num_eqs, 0, 0);
 823         if (err)
 824                 goto err_cq;
 825
 826         return 0;
 827
 828 err_cq:
 829         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 830
 831 err_srq:
 832         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 833
 834 err_qp:
 835         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 836
 837 err:
 838         return err;
 839 }
 840
 841 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 842                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 843 {
 844         struct mlx4_priv *priv = mlx4_priv(dev);
 845         u64 aux_pages;
 846         int num_eqs;
 847         int err;
 848
 849         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 850         if (err) {
 851                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 852                 return err;
 853         }
 854
 855         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 856                  (unsigned long long) icm_size >> 10,
 857                  (unsigned long long) aux_pages << 2);
 858
 859         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 860                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 861         if (!priv->fw.aux_icm) {
 862                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 863                 return -ENOMEM;
 864         }
 865
 866         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 867         if (err) {
 868                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 869                 goto err_free_aux;
 870         }
 871
 872         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 873         if (err) {
 874                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 875                 goto err_unmap_aux;
 876         }
 877
 878
 879         num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs :
 880                    dev->caps.num_eqs;
 881         err = mlx4_init_icm_table(dev, &priv->eq_table.table,
 882                                   init_hca->eqc_base, dev_cap->eqc_entry_sz,
 883                                   num_eqs, num_eqs, 0, 0);
 884         if (err) {
 885                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 886                 goto err_unmap_cmpt;
 887         }
 888
 889         /*
 890          * Reserved MTT entries must be aligned up to a cacheline
 891          * boundary, since the FW will write to them, while the driver
 892          * writes to all other MTT entries. (The variable
 893          * dev->caps.mtt_entry_sz below is really the MTT segment
 894          * size, not the raw entry size)
 895          */
 896         dev->caps.reserved_mtts =
 897                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 898                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 899
 900         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 901                                   init_hca->mtt_base,
 902                                   dev->caps.mtt_entry_sz,
 903                                   dev->caps.num_mtts,
 904                                   dev->caps.reserved_mtts, 1, 0);
 905         if (err) {
 906                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 907                 goto err_unmap_eq;
 908         }
 909
 910         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 911                                   init_hca->dmpt_base,
 912                                   dev_cap->dmpt_entry_sz,
 913                                   dev->caps.num_mpts,
 914                                   dev->caps.reserved_mrws, 1, 1);
 915         if (err) {
 916                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 917                 goto err_unmap_mtt;
 918         }
 919
 920         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 921                                   init_hca->qpc_base,
 922                                   dev_cap->qpc_entry_sz,
 923                                   dev->caps.num_qps,
 924                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 925                                   0, 0);
 926         if (err) {
 927                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 928                 goto err_unmap_dmpt;
 929         }
 930
 931         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 932                                   init_hca->auxc_base,
 933                                   dev_cap->aux_entry_sz,
 934                                   dev->caps.num_qps,
 935                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 936                                   0, 0);
 937         if (err) {
 938                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 939                 goto err_unmap_qp;
 940         }
 941
 942         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 943                                   init_hca->altc_base,
 944                                   dev_cap->altc_entry_sz,
 945                                   dev->caps.num_qps,
 946                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 947                                   0, 0);
 948         if (err) {
 949                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 950                 goto err_unmap_auxc;
 951         }
 952
 953         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 954                                   init_hca->rdmarc_base,
 955                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 956                                   dev->caps.num_qps,
 957                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 958                                   0, 0);
 959         if (err) {
 960                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 961                 goto err_unmap_altc;
 962         }
 963
 964         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 965                                   init_hca->cqc_base,
 966                                   dev_cap->cqc_entry_sz,
 967                                   dev->caps.num_cqs,
 968                                   dev->caps.reserved_cqs, 0, 0);
 969         if (err) {
 970                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 971                 goto err_unmap_rdmarc;
 972         }
 973
 974         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 975                                   init_hca->srqc_base,
 976                                   dev_cap->srq_entry_sz,
 977                                   dev->caps.num_srqs,
 978                                   dev->caps.reserved_srqs, 0, 0);
 979         if (err) {
 980                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
 981                 goto err_unmap_cq;
 982         }
 983
 984         /*
 985          * It's not strictly required, but for simplicity just map the
 986          * whole multicast group table now.  The table isn't very big
 987          * and it's a lot easier than trying to track ref counts.
 988          */
 989         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
 990                                   init_hca->mc_base,
 991                                   mlx4_get_mgm_entry_size(dev),
 992                                   dev->caps.num_mgms + dev->caps.num_amgms,
 993                                   dev->caps.num_mgms + dev->caps.num_amgms,
 994                                   0, 0);
 995         if (err) {
 996                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
 997                 goto err_unmap_srq;
 998         }
 999
1000         return 0;
1001
1002 err_unmap_srq:
1003         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1004
1005 err_unmap_cq:
1006         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1007
1008 err_unmap_rdmarc:
1009         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1010
1011 err_unmap_altc:
1012         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1013
1014 err_unmap_auxc:
1015         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1016
1017 err_unmap_qp:
1018         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1019
1020 err_unmap_dmpt:
1021         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1022
1023 err_unmap_mtt:
1024         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1025
1026 err_unmap_eq:
1027         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1028
1029 err_unmap_cmpt:
1030         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1031         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1032         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1033         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1034
1035 err_unmap_aux:
1036         mlx4_UNMAP_ICM_AUX(dev);
1037
1038 err_free_aux:
1039         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1040
1041         return err;
1042 }
1043
1044 static void mlx4_free_icms(struct mlx4_dev *dev)
1045 {
1046         struct mlx4_priv *priv = mlx4_priv(dev);
1047
1048         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
1049         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1050         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1051         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1052         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1053         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1054         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1055         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1056         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1057         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1058         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1059         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1060         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1061         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1062
1063         mlx4_UNMAP_ICM_AUX(dev);
1064         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1065 }
1066
1067 static void mlx4_slave_exit(struct mlx4_dev *dev)
1068 {
1069         struct mlx4_priv *priv = mlx4_priv(dev);
1070
1071         down(&priv->cmd.slave_sem);
1072         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME))
1073                 mlx4_warn(dev, "Failed to close slave function.\n");
1074         up(&priv->cmd.slave_sem);
1075 }
1076
1077 static int map_bf_area(struct mlx4_dev *dev)
1078 {
1079         struct mlx4_priv *priv = mlx4_priv(dev);
1080         resource_size_t bf_start;
1081         resource_size_t bf_len;
1082         int err = 0;
1083
1084         if (!dev->caps.bf_reg_size)
1085                 return -ENXIO;
1086
1087         bf_start = pci_resource_start(dev->pdev, 2) +
1088                         (dev->caps.num_uars << PAGE_SHIFT);
1089         bf_len = pci_resource_len(dev->pdev, 2) -
1090                         (dev->caps.num_uars << PAGE_SHIFT);
1091         priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len);
1092         if (!priv->bf_mapping)
1093                 err = -ENOMEM;
1094
1095         return err;
1096 }
1097
1098 static void unmap_bf_area(struct mlx4_dev *dev)
1099 {
1100         if (mlx4_priv(dev)->bf_mapping)
1101                 io_mapping_free(mlx4_priv(dev)->bf_mapping);
1102 }
1103
1104 static void mlx4_close_hca(struct mlx4_dev *dev)
1105 {
1106         unmap_bf_area(dev);
1107         if (mlx4_is_slave(dev))
1108                 mlx4_slave_exit(dev);
1109         else {
1110                 mlx4_CLOSE_HCA(dev, 0);
1111                 mlx4_free_icms(dev);
1112                 mlx4_UNMAP_FA(dev);
1113                 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
1114         }
1115 }
1116
1117 static int mlx4_init_slave(struct mlx4_dev *dev)
1118 {
1119         struct mlx4_priv *priv = mlx4_priv(dev);
1120         u64 dma = (u64) priv->mfunc.vhcr_dma;
1121         int num_of_reset_retries = NUM_OF_RESET_RETRIES;
1122         int ret_from_reset = 0;
1123         u32 slave_read;
1124         u32 cmd_channel_ver;
1125
1126         down(&priv->cmd.slave_sem);
1127         priv->cmd.max_cmds = 1;
1128         mlx4_warn(dev, "Sending reset\n");
1129         ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0,
1130                                        MLX4_COMM_TIME);
1131         /* if we are in the middle of flr the slave will try
1132          * NUM_OF_RESET_RETRIES times before leaving.*/
1133         if (ret_from_reset) {
1134                 if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) {
1135                         msleep(SLEEP_TIME_IN_RESET);
1136                         while (ret_from_reset && num_of_reset_retries) {
1137                                 mlx4_warn(dev, "slave is currently in the"
1138                                           "middle of FLR. retrying..."
1139                                           "(try num:%d)\n",
1140                                           (NUM_OF_RESET_RETRIES -
1141                                            num_of_reset_retries  + 1));
1142                                 ret_from_reset =
1143                                         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET,
1144                                                       0, MLX4_COMM_TIME);
1145                                 num_of_reset_retries = num_of_reset_retries - 1;
1146                         }
1147                 } else
1148                         goto err;
1149         }
1150
1151         /* check the driver version - the slave I/F revision
1152          * must match the master's */
1153         slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
1154         cmd_channel_ver = mlx4_comm_get_version();
1155
1156         if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) !=
1157                 MLX4_COMM_GET_IF_REV(slave_read)) {
1158                 mlx4_err(dev, "slave driver version is not supported"
1159                          " by the master\n");
1160                 goto err;
1161         }
1162
1163         mlx4_warn(dev, "Sending vhcr0\n");
1164         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48,
1165                                                     MLX4_COMM_TIME))
1166                 goto err;
1167         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32,
1168                                                     MLX4_COMM_TIME))
1169                 goto err;
1170         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16,
1171                                                     MLX4_COMM_TIME))
1172                 goto err;
1173         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME))
1174                 goto err;
1175         up(&priv->cmd.slave_sem);
1176         return 0;
1177
1178 err:
1179         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0);
1180         up(&priv->cmd.slave_sem);
1181         return -EIO;
1182 }
1183
1184 static int mlx4_init_hca(struct mlx4_dev *dev)
1185 {
1186         struct mlx4_priv          *priv = mlx4_priv(dev);
1187         struct mlx4_adapter        adapter;
1188         struct mlx4_dev_cap        dev_cap;
1189         struct mlx4_mod_stat_cfg   mlx4_cfg;
1190         struct mlx4_profile        profile;
1191         struct mlx4_init_hca_param init_hca;
1192         u64 icm_size;
1193         int err;
1194
1195         if (!mlx4_is_slave(dev)) {
1196                 err = mlx4_QUERY_FW(dev);
1197                 if (err) {
1198                         if (err == -EACCES)
1199                                 mlx4_info(dev, "non-primary physical function, skipping.\n");
1200                         else
1201                                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
1202                         goto unmap_bf;
1203                 }
1204
1205                 err = mlx4_load_fw(dev);
1206                 if (err) {
1207                         mlx4_err(dev, "Failed to start FW, aborting.\n");
1208                         goto unmap_bf;
1209                 }
1210
1211                 mlx4_cfg.log_pg_sz_m = 1;
1212                 mlx4_cfg.log_pg_sz = 0;
1213                 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
1214                 if (err)
1215                         mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
1216
1217                 err = mlx4_dev_cap(dev, &dev_cap);
1218                 if (err) {
1219                         mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
1220                         goto err_stop_fw;
1221                 }
1222
1223                 profile = default_profile;
1224
1225                 icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
1226                                              &init_hca);
1227                 if ((long long) icm_size < 0) {
1228                         err = icm_size;
1229                         goto err_stop_fw;
1230                 }
1231
1232                 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1;
1233
1234                 init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
1235                 init_hca.uar_page_sz = PAGE_SHIFT - 12;
1236
1237                 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
1238                 if (err)
1239                         goto err_stop_fw;
1240
1241                 err = mlx4_INIT_HCA(dev, &init_hca);
1242                 if (err) {
1243                         mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
1244                         goto err_free_icm;
1245                 }
1246         } else {
1247                 err = mlx4_init_slave(dev);
1248                 if (err) {
1249                         mlx4_err(dev, "Failed to initialize slave\n");
1250                         goto unmap_bf;
1251                 }
1252
1253                 err = mlx4_slave_cap(dev);
1254                 if (err) {
1255                         mlx4_err(dev, "Failed to obtain slave caps\n");
1256                         goto err_close;
1257                 }
1258         }
1259
1260         if (map_bf_area(dev))
1261                 mlx4_dbg(dev, "Failed to map blue flame area\n");
1262
1263         /*Only the master set the ports, all the rest got it from it.*/
1264         if (!mlx4_is_slave(dev))
1265                 mlx4_set_port_mask(dev);
1266
1267         err = mlx4_QUERY_ADAPTER(dev, &adapter);
1268         if (err) {
1269                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
1270                 goto err_close;
1271         }
1272
1273         priv->eq_table.inta_pin = adapter.inta_pin;
1274         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
1275
1276         return 0;
1277
1278 err_close:
1279         mlx4_close_hca(dev);
1280
1281 err_free_icm:
1282         if (!mlx4_is_slave(dev))
1283                 mlx4_free_icms(dev);
1284
1285 err_stop_fw:
1286         if (!mlx4_is_slave(dev)) {
1287                 mlx4_UNMAP_FA(dev);
1288                 mlx4_free_icm(dev, priv->fw.fw_icm, 0);
1289         }
1290 unmap_bf:
1291         unmap_bf_area(dev);
1292         return err;
1293 }
1294
1295 static int mlx4_init_counters_table(struct mlx4_dev *dev)
1296 {
1297         struct mlx4_priv *priv = mlx4_priv(dev);
1298         int nent;
1299
1300         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1301                 return -ENOENT;
1302
1303         nent = dev->caps.max_counters;
1304         return mlx4_bitmap_init(&priv->counters_bitmap, nent, nent - 1, 0, 0);
1305 }
1306
1307 static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)
1308 {
1309         mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap);
1310 }
1311
1312 int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1313 {
1314         struct mlx4_priv *priv = mlx4_priv(dev);
1315
1316         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1317                 return -ENOENT;
1318
1319         *idx = mlx4_bitmap_alloc(&priv->counters_bitmap);
1320         if (*idx == -1)
1321                 return -ENOMEM;
1322
1323         return 0;
1324 }
1325
1326 int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1327 {
1328         u64 out_param;
1329         int err;
1330
1331         if (mlx4_is_mfunc(dev)) {
1332                 err = mlx4_cmd_imm(dev, 0, &out_param, RES_COUNTER,
1333                                    RES_OP_RESERVE, MLX4_CMD_ALLOC_RES,
1334                                    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
1335                 if (!err)
1336                         *idx = get_param_l(&out_param);
1337
1338                 return err;
1339         }
1340         return __mlx4_counter_alloc(dev, idx);
1341 }
1342 EXPORT_SYMBOL_GPL(mlx4_counter_alloc);
1343
1344 void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1345 {
1346         mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx);
1347         return;
1348 }
1349
1350 void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1351 {
1352         u64 in_param;
1353
1354         if (mlx4_is_mfunc(dev)) {
1355                 set_param_l(&in_param, idx);
1356                 mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE,
1357                          MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
1358                          MLX4_CMD_WRAPPED);
1359                 return;
1360         }
1361         __mlx4_counter_free(dev, idx);
1362 }
1363 EXPORT_SYMBOL_GPL(mlx4_counter_free);
1364
1365 static int mlx4_setup_hca(struct mlx4_dev *dev)
1366 {
1367         struct mlx4_priv *priv = mlx4_priv(dev);
1368         int err;
1369         int port;
1370         __be32 ib_port_default_caps;
1371
1372         err = mlx4_init_uar_table(dev);
1373         if (err) {
1374                 mlx4_err(dev, "Failed to initialize "
1375                          "user access region table, aborting.\n");
1376                 return err;
1377         }
1378
1379         err = mlx4_uar_alloc(dev, &priv->driver_uar);
1380         if (err) {
1381                 mlx4_err(dev, "Failed to allocate driver access region, "
1382                          "aborting.\n");
1383                 goto err_uar_table_free;
1384         }
1385
1386         priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
1387         if (!priv->kar) {
1388                 mlx4_err(dev, "Couldn't map kernel access region, "
1389                          "aborting.\n");
1390                 err = -ENOMEM;
1391                 goto err_uar_free;
1392         }
1393
1394         err = mlx4_init_pd_table(dev);
1395         if (err) {
1396                 mlx4_err(dev, "Failed to initialize "
1397                          "protection domain table, aborting.\n");
1398                 goto err_kar_unmap;
1399         }
1400
1401         err = mlx4_init_xrcd_table(dev);
1402         if (err) {
1403                 mlx4_err(dev, "Failed to initialize "
1404                          "reliable connection domain table, aborting.\n");
1405                 goto err_pd_table_free;
1406         }
1407
1408         err = mlx4_init_mr_table(dev);
1409         if (err) {
1410                 mlx4_err(dev, "Failed to initialize "
1411                          "memory region table, aborting.\n");
1412                 goto err_xrcd_table_free;
1413         }
1414
1415         err = mlx4_init_eq_table(dev);
1416         if (err) {
1417                 mlx4_err(dev, "Failed to initialize "
1418                          "event queue table, aborting.\n");
1419                 goto err_mr_table_free;
1420         }
1421
1422         err = mlx4_cmd_use_events(dev);
1423         if (err) {
1424                 mlx4_err(dev, "Failed to switch to event-driven "
1425                          "firmware commands, aborting.\n");
1426                 goto err_eq_table_free;
1427         }
1428
1429         err = mlx4_NOP(dev);
1430         if (err) {
1431                 if (dev->flags & MLX4_FLAG_MSI_X) {
1432                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
1433                                   "interrupt IRQ %d).\n",
1434                                   priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1435                         mlx4_warn(dev, "Trying again without MSI-X.\n");
1436                 } else {
1437                         mlx4_err(dev, "NOP command failed to generate interrupt "
1438                                  "(IRQ %d), aborting.\n",
1439                                  priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1440                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
1441                 }
1442
1443                 goto err_cmd_poll;
1444         }
1445
1446         mlx4_dbg(dev, "NOP command IRQ test passed\n");
1447
1448         err = mlx4_init_cq_table(dev);
1449         if (err) {
1450                 mlx4_err(dev, "Failed to initialize "
1451                          "completion queue table, aborting.\n");
1452                 goto err_cmd_poll;
1453         }
1454
1455         err = mlx4_init_srq_table(dev);
1456         if (err) {
1457                 mlx4_err(dev, "Failed to initialize "
1458                          "shared receive queue table, aborting.\n");
1459                 goto err_cq_table_free;
1460         }
1461
1462         err = mlx4_init_qp_table(dev);
1463         if (err) {
1464                 mlx4_err(dev, "Failed to initialize "
1465                          "queue pair table, aborting.\n");
1466                 goto err_srq_table_free;
1467         }
1468
1469         if (!mlx4_is_slave(dev)) {
1470                 err = mlx4_init_mcg_table(dev);
1471                 if (err) {
1472                         mlx4_err(dev, "Failed to initialize "
1473                                  "multicast group table, aborting.\n");
1474                         goto err_qp_table_free;
1475                 }
1476         }
1477
1478         err = mlx4_init_counters_table(dev);
1479         if (err && err != -ENOENT) {
1480                 mlx4_err(dev, "Failed to initialize counters table, aborting.\n");
1481                 goto err_mcg_table_free;
1482         }
1483
1484         if (!mlx4_is_slave(dev)) {
1485                 for (port = 1; port <= dev->caps.num_ports; port++) {
1486                         ib_port_default_caps = 0;
1487                         err = mlx4_get_port_ib_caps(dev, port,
1488                                                     &ib_port_default_caps);
1489                         if (err)
1490                                 mlx4_warn(dev, "failed to get port %d default "
1491                                           "ib capabilities (%d). Continuing "
1492                                           "with caps = 0\n", port, err);
1493                         dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
1494
1495                         if (mlx4_is_mfunc(dev))
1496                                 dev->caps.port_ib_mtu[port] = IB_MTU_2048;
1497                         else
1498                                 dev->caps.port_ib_mtu[port] = IB_MTU_4096;
1499
1500                         err = mlx4_SET_PORT(dev, port);
1501                         if (err) {
1502                                 mlx4_err(dev, "Failed to set port %d, aborting\n",
1503                                         port);
1504                                 goto err_counters_table_free;
1505                         }
1506                 }
1507         }
1508
1509         return 0;
1510
1511 err_counters_table_free:
1512         mlx4_cleanup_counters_table(dev);
1513
1514 err_mcg_table_free:
1515         mlx4_cleanup_mcg_table(dev);
1516
1517 err_qp_table_free:
1518         mlx4_cleanup_qp_table(dev);
1519
1520 err_srq_table_free:
1521         mlx4_cleanup_srq_table(dev);
1522
1523 err_cq_table_free:
1524         mlx4_cleanup_cq_table(dev);
1525
1526 err_cmd_poll:
1527         mlx4_cmd_use_polling(dev);
1528
1529 err_eq_table_free:
1530         mlx4_cleanup_eq_table(dev);
1531
1532 err_mr_table_free:
1533         mlx4_cleanup_mr_table(dev);
1534
1535 err_xrcd_table_free:
1536         mlx4_cleanup_xrcd_table(dev);
1537
1538 err_pd_table_free:
1539         mlx4_cleanup_pd_table(dev);
1540
1541 err_kar_unmap:
1542         iounmap(priv->kar);
1543
1544 err_uar_free:
1545         mlx4_uar_free(dev, &priv->driver_uar);
1546
1547 err_uar_table_free:
1548         mlx4_cleanup_uar_table(dev);
1549         return err;
1550 }
1551
1552 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
1553 {
1554         struct mlx4_priv *priv = mlx4_priv(dev);
1555         struct msix_entry *entries;
1556         int nreq = min_t(int, dev->caps.num_ports *
1557                          min_t(int, netif_get_num_default_rss_queues() + 1,
1558                                MAX_MSIX_P_PORT) + MSIX_LEGACY_SZ, MAX_MSIX);
1559         int err;
1560         int i;
1561
1562         if (msi_x) {
1563                 /* In multifunction mode each function gets 2 msi-X vectors
1564                  * one for data path completions anf the other for asynch events
1565                  * or command completions */
1566                 if (mlx4_is_mfunc(dev)) {
1567                         nreq = 2;
1568                 } else {
1569                         nreq = min_t(int, dev->caps.num_eqs -
1570                                      dev->caps.reserved_eqs, nreq);
1571                 }
1572
1573                 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1574                 if (!entries)
1575                         goto no_msi;
1576
1577                 for (i = 0; i < nreq; ++i)
1578                         entries[i].entry = i;
1579
1580         retry:
1581                 err = pci_enable_msix(dev->pdev, entries, nreq);
1582                 if (err) {
1583                         /* Try again if at least 2 vectors are available */
1584                         if (err > 1) {
1585                                 mlx4_info(dev, "Requested %d vectors, "
1586                                           "but only %d MSI-X vectors available, "
1587                                           "trying again\n", nreq, err);
1588                                 nreq = err;
1589                                 goto retry;
1590                         }
1591                         kfree(entries);
1592                         goto no_msi;
1593                 }
1594
1595                 if (nreq <
1596                     MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) {
1597                         /*Working in legacy mode , all EQ's shared*/
1598                         dev->caps.comp_pool           = 0;
1599                         dev->caps.num_comp_vectors = nreq - 1;
1600                 } else {
1601                         dev->caps.comp_pool           = nreq - MSIX_LEGACY_SZ;
1602                         dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1;
1603                 }
1604                 for (i = 0; i < nreq; ++i)
1605                         priv->eq_table.eq[i].irq = entries[i].vector;
1606
1607                 dev->flags |= MLX4_FLAG_MSI_X;
1608
1609                 kfree(entries);
1610                 return;
1611         }
1612
1613 no_msi:
1614         dev->caps.num_comp_vectors = 1;
1615         dev->caps.comp_pool        = 0;
1616
1617         for (i = 0; i < 2; ++i)
1618                 priv->eq_table.eq[i].irq = dev->pdev->irq;
1619 }
1620
1621 static int mlx4_init_port_info(struct mlx4_dev *dev, int port)
1622 {
1623         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
1624         int err = 0;
1625
1626         info->dev = dev;
1627         info->port = port;
1628         if (!mlx4_is_slave(dev)) {
1629                 INIT_RADIX_TREE(&info->mac_tree, GFP_KERNEL);
1630                 mlx4_init_mac_table(dev, &info->mac_table);
1631                 mlx4_init_vlan_table(dev, &info->vlan_table);
1632                 info->base_qpn =
1633                         dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
1634                         (port - 1) * (1 << log_num_mac);
1635         }
1636
1637         sprintf(info->dev_name, "mlx4_port%d", port);
1638         info->port_attr.attr.name = info->dev_name;
1639         if (mlx4_is_mfunc(dev))
1640                 info->port_attr.attr.mode = S_IRUGO;
1641         else {
1642                 info->port_attr.attr.mode = S_IRUGO | S_IWUSR;
1643                 info->port_attr.store     = set_port_type;
1644         }
1645         info->port_attr.show      = show_port_type;
1646         sysfs_attr_init(&info->port_attr.attr);
1647
1648         err = device_create_file(&dev->pdev->dev, &info->port_attr);
1649         if (err) {
1650                 mlx4_err(dev, "Failed to create file for port %d\n", port);
1651                 info->port = -1;
1652         }
1653
1654         sprintf(info->dev_mtu_name, "mlx4_port%d_mtu", port);
1655         info->port_mtu_attr.attr.name = info->dev_mtu_name;
1656         if (mlx4_is_mfunc(dev))
1657                 info->port_mtu_attr.attr.mode = S_IRUGO;
1658         else {
1659                 info->port_mtu_attr.attr.mode = S_IRUGO | S_IWUSR;
1660                 info->port_mtu_attr.store     = set_port_ib_mtu;
1661         }
1662         info->port_mtu_attr.show      = show_port_ib_mtu;
1663         sysfs_attr_init(&info->port_mtu_attr.attr);
1664
1665         err = device_create_file(&dev->pdev->dev, &info->port_mtu_attr);
1666         if (err) {
1667                 mlx4_err(dev, "Failed to create mtu file for port %d\n", port);
1668                 device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1669                 info->port = -1;
1670         }
1671
1672         return err;
1673 }
1674
1675 static void mlx4_cleanup_port_info(struct mlx4_port_info *info)
1676 {
1677         if (info->port < 0)
1678                 return;
1679
1680         device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1681         device_remove_file(&info->dev->pdev->dev, &info->port_mtu_attr);
1682 }
1683
1684 static int mlx4_init_steering(struct mlx4_dev *dev)
1685 {
1686         struct mlx4_priv *priv = mlx4_priv(dev);
1687         int num_entries = dev->caps.num_ports;
1688         int i, j;
1689
1690         priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL);
1691         if (!priv->steer)
1692                 return -ENOMEM;
1693
1694         for (i = 0; i < num_entries; i++)
1695                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1696                         INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]);
1697                         INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]);
1698                 }
1699         return 0;
1700 }
1701
1702 static void mlx4_clear_steering(struct mlx4_dev *dev)
1703 {
1704         struct mlx4_priv *priv = mlx4_priv(dev);
1705         struct mlx4_steer_index *entry, *tmp_entry;
1706         struct mlx4_promisc_qp *pqp, *tmp_pqp;
1707         int num_entries = dev->caps.num_ports;
1708         int i, j;
1709
1710         for (i = 0; i < num_entries; i++) {
1711                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1712                         list_for_each_entry_safe(pqp, tmp_pqp,
1713                                                  &priv->steer[i].promisc_qps[j],
1714                                                  list) {
1715                                 list_del(&pqp->list);
1716                                 kfree(pqp);
1717                         }
1718                         list_for_each_entry_safe(entry, tmp_entry,
1719                                                  &priv->steer[i].steer_entries[j],
1720                                                  list) {
1721                                 list_del(&entry->list);
1722                                 list_for_each_entry_safe(pqp, tmp_pqp,
1723                                                          &entry->duplicates,
1724                                                          list) {
1725                                         list_del(&pqp->list);
1726                                         kfree(pqp);
1727                                 }
1728                                 kfree(entry);
1729                         }
1730                 }
1731         }
1732         kfree(priv->steer);
1733 }
1734
1735 static int extended_func_num(struct pci_dev *pdev)
1736 {
1737         return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn);
1738 }
1739
1740 #define MLX4_OWNER_BASE 0x8069c
1741 #define MLX4_OWNER_SIZE 4
1742
1743 static int mlx4_get_ownership(struct mlx4_dev *dev)
1744 {
1745         void __iomem *owner;
1746         u32 ret;
1747
1748         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1749                         MLX4_OWNER_SIZE);
1750         if (!owner) {
1751                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1752                 return -ENOMEM;
1753         }
1754
1755         ret = readl(owner);
1756         iounmap(owner);
1757         return (int) !!ret;
1758 }
1759
1760 static void mlx4_free_ownership(struct mlx4_dev *dev)
1761 {
1762         void __iomem *owner;
1763
1764         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1765                         MLX4_OWNER_SIZE);
1766         if (!owner) {
1767                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1768                 return;
1769         }
1770         writel(0, owner);
1771         msleep(1000);
1772         iounmap(owner);
1773 }
1774
1775 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1776 {
1777         struct mlx4_priv *priv;
1778         struct mlx4_dev *dev;
1779         int err;
1780         int port;
1781
1782         pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
1783
1784         err = pci_enable_device(pdev);
1785         if (err) {
1786                 dev_err(&pdev->dev, "Cannot enable PCI device, "
1787                         "aborting.\n");
1788                 return err;
1789         }
1790         if (num_vfs > MLX4_MAX_NUM_VF) {
1791                 printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n",
1792                        num_vfs, MLX4_MAX_NUM_VF);
1793                 return -EINVAL;
1794         }
1795         /*
1796          * Check for BARs.
1797          */
1798         if (((id == NULL) || !(id->driver_data & MLX4_VF)) &&
1799             !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1800                 dev_err(&pdev->dev, "Missing DCS, aborting."
1801                         "(id == 0X%p, id->driver_data: 0x%lx,"
1802                         " pci_resource_flags(pdev, 0):0x%lx)\n", id,
1803                         id ? id->driver_data : 0, pci_resource_flags(pdev, 0));
1804                 err = -ENODEV;
1805                 goto err_disable_pdev;
1806         }
1807         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1808                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1809                 err = -ENODEV;
1810                 goto err_disable_pdev;
1811         }
1812
1813         err = pci_request_regions(pdev, DRV_NAME);
1814         if (err) {
1815                 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
1816                 goto err_disable_pdev;
1817         }
1818
1819         pci_set_master(pdev);
1820
1821         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1822         if (err) {
1823                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1824                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1825                 if (err) {
1826                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1827                         goto err_release_regions;
1828                 }
1829         }
1830         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1831         if (err) {
1832                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1833                          "consistent PCI DMA mask.\n");
1834                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1835                 if (err) {
1836                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1837                                 "aborting.\n");
1838                         goto err_release_regions;
1839                 }
1840         }
1841
1842         /* Allow large DMA segments, up to the firmware limit of 1 GB */
1843         dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
1844
1845         priv = kzalloc(sizeof *priv, GFP_KERNEL);
1846         if (!priv) {
1847                 dev_err(&pdev->dev, "Device struct alloc failed, "
1848                         "aborting.\n");
1849                 err = -ENOMEM;
1850                 goto err_release_regions;
1851         }
1852
1853         dev       = &priv->dev;
1854         dev->pdev = pdev;
1855         INIT_LIST_HEAD(&priv->ctx_list);
1856         spin_lock_init(&priv->ctx_lock);
1857
1858         mutex_init(&priv->port_mutex);
1859
1860         INIT_LIST_HEAD(&priv->pgdir_list);
1861         mutex_init(&priv->pgdir_mutex);
1862
1863         INIT_LIST_HEAD(&priv->bf_list);
1864         mutex_init(&priv->bf_mutex);
1865
1866         dev->rev_id = pdev->revision;
1867         /* Detect if this device is a virtual function */
1868         if (id && id->driver_data & MLX4_VF) {
1869                 /* When acting as pf, we normally skip vfs unless explicitly
1870                  * requested to probe them. */
1871                 if (num_vfs && extended_func_num(pdev) > probe_vf) {
1872                         mlx4_warn(dev, "Skipping virtual function:%d\n",
1873                                                 extended_func_num(pdev));
1874                         err = -ENODEV;
1875                         goto err_free_dev;
1876                 }
1877                 mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
1878                 dev->flags |= MLX4_FLAG_SLAVE;
1879         } else {
1880                 /* We reset the device and enable SRIOV only for physical
1881                  * devices.  Try to claim ownership on the device;
1882                  * if already taken, skip -- do not allow multiple PFs */
1883                 err = mlx4_get_ownership(dev);
1884                 if (err) {
1885                         if (err < 0)
1886                                 goto err_free_dev;
1887                         else {
1888                                 mlx4_warn(dev, "Multiple PFs not yet supported."
1889                                           " Skipping PF.\n");
1890                                 err = -EINVAL;
1891                                 goto err_free_dev;
1892                         }
1893                 }
1894
1895                 if (num_vfs) {
1896                         mlx4_warn(dev, "Enabling sriov with:%d vfs\n", num_vfs);
1897                         err = pci_enable_sriov(pdev, num_vfs);
1898                         if (err) {
1899                                 mlx4_err(dev, "Failed to enable sriov,"
1900                                          "continuing without sriov enabled"
1901                                          " (err = %d).\n", err);
1902                                 err = 0;
1903                         } else {
1904                                 mlx4_warn(dev, "Running in master mode\n");
1905                                 dev->flags |= MLX4_FLAG_SRIOV |
1906                                               MLX4_FLAG_MASTER;
1907                                 dev->num_vfs = num_vfs;
1908                         }
1909                 }
1910
1911                 /*
1912                  * Now reset the HCA before we touch the PCI capabilities or
1913                  * attempt a firmware command, since a boot ROM may have left
1914                  * the HCA in an undefined state.
1915                  */
1916                 err = mlx4_reset(dev);
1917                 if (err) {
1918                         mlx4_err(dev, "Failed to reset HCA, aborting.\n");
1919                         goto err_rel_own;
1920                 }
1921         }
1922
1923 slave_start:
1924         if (mlx4_cmd_init(dev)) {
1925                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
1926                 goto err_sriov;
1927         }
1928
1929         /* In slave functions, the communication channel must be initialized
1930          * before posting commands. Also, init num_slaves before calling
1931          * mlx4_init_hca */
1932         if (mlx4_is_mfunc(dev)) {
1933                 if (mlx4_is_master(dev))
1934                         dev->num_slaves = MLX4_MAX_NUM_SLAVES;
1935                 else {
1936                         dev->num_slaves = 0;
1937                         if (mlx4_multi_func_init(dev)) {
1938                                 mlx4_err(dev, "Failed to init slave mfunc"
1939                                          " interface, aborting.\n");
1940                                 goto err_cmd;
1941                         }
1942                 }
1943         }
1944
1945         err = mlx4_init_hca(dev);
1946         if (err) {
1947                 if (err == -EACCES) {
1948                         /* Not primary Physical function
1949                          * Running in slave mode */
1950                         mlx4_cmd_cleanup(dev);
1951                         dev->flags |= MLX4_FLAG_SLAVE;
1952                         dev->flags &= ~MLX4_FLAG_MASTER;
1953                         goto slave_start;
1954                 } else
1955                         goto err_mfunc;
1956         }
1957
1958         /* In master functions, the communication channel must be initialized
1959          * after obtaining its address from fw */
1960         if (mlx4_is_master(dev)) {
1961                 if (mlx4_multi_func_init(dev)) {
1962                         mlx4_err(dev, "Failed to init master mfunc"
1963                                  "interface, aborting.\n");
1964                         goto err_close;
1965                 }
1966         }
1967
1968         err = mlx4_alloc_eq_table(dev);
1969         if (err)
1970                 goto err_master_mfunc;
1971
1972         priv->msix_ctl.pool_bm = 0;
1973         mutex_init(&priv->msix_ctl.pool_lock);
1974
1975         mlx4_enable_msi_x(dev);
1976         if ((mlx4_is_mfunc(dev)) &&
1977             !(dev->flags & MLX4_FLAG_MSI_X)) {
1978                 mlx4_err(dev, "INTx is not supported in multi-function mode."
1979                          " aborting.\n");
1980                 goto err_free_eq;
1981         }
1982
1983         if (!mlx4_is_slave(dev)) {
1984                 err = mlx4_init_steering(dev);
1985                 if (err)
1986                         goto err_free_eq;
1987         }
1988
1989         err = mlx4_setup_hca(dev);
1990         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
1991             !mlx4_is_mfunc(dev)) {
1992                 dev->flags &= ~MLX4_FLAG_MSI_X;
1993                 dev->caps.num_comp_vectors = 1;
1994                 dev->caps.comp_pool        = 0;
1995                 pci_disable_msix(pdev);
1996                 err = mlx4_setup_hca(dev);
1997         }
1998
1999         if (err)
2000                 goto err_steer;
2001
2002         for (port = 1; port <= dev->caps.num_ports; port++) {
2003                 err = mlx4_init_port_info(dev, port);
2004                 if (err)
2005                         goto err_port;
2006         }
2007
2008         err = mlx4_register_device(dev);
2009         if (err)
2010                 goto err_port;
2011
2012         mlx4_sense_init(dev);
2013         mlx4_start_sense(dev);
2014
2015         pci_set_drvdata(pdev, dev);
2016
2017         return 0;
2018
2019 err_port:
2020         for (--port; port >= 1; --port)
2021                 mlx4_cleanup_port_info(&priv->port[port]);
2022
2023         mlx4_cleanup_counters_table(dev);
2024         mlx4_cleanup_mcg_table(dev);
2025         mlx4_cleanup_qp_table(dev);
2026         mlx4_cleanup_srq_table(dev);
2027         mlx4_cleanup_cq_table(dev);
2028         mlx4_cmd_use_polling(dev);
2029         mlx4_cleanup_eq_table(dev);
2030         mlx4_cleanup_mr_table(dev);
2031         mlx4_cleanup_xrcd_table(dev);
2032         mlx4_cleanup_pd_table(dev);
2033         mlx4_cleanup_uar_table(dev);
2034
2035 err_steer:
2036         if (!mlx4_is_slave(dev))
2037                 mlx4_clear_steering(dev);
2038
2039 err_free_eq:
2040         mlx4_free_eq_table(dev);
2041
2042 err_master_mfunc:
2043         if (mlx4_is_master(dev))
2044                 mlx4_multi_func_cleanup(dev);
2045
2046 err_close:
2047         if (dev->flags & MLX4_FLAG_MSI_X)
2048                 pci_disable_msix(pdev);
2049
2050         mlx4_close_hca(dev);
2051
2052 err_mfunc:
2053         if (mlx4_is_slave(dev))
2054                 mlx4_multi_func_cleanup(dev);
2055
2056 err_cmd:
2057         mlx4_cmd_cleanup(dev);
2058
2059 err_sriov:
2060         if (dev->flags & MLX4_FLAG_SRIOV)
2061                 pci_disable_sriov(pdev);
2062
2063 err_rel_own:
2064         if (!mlx4_is_slave(dev))
2065                 mlx4_free_ownership(dev);
2066
2067 err_free_dev:
2068         kfree(priv);
2069
2070 err_release_regions:
2071         pci_release_regions(pdev);
2072
2073 err_disable_pdev:
2074         pci_disable_device(pdev);
2075         pci_set_drvdata(pdev, NULL);
2076         return err;
2077 }
2078
2079 static int __devinit mlx4_init_one(struct pci_dev *pdev,
2080                                    const struct pci_device_id *id)
2081 {
2082         printk_once(KERN_INFO "%s", mlx4_version);
2083
2084         return __mlx4_init_one(pdev, id);
2085 }
2086
2087 static void mlx4_remove_one(struct pci_dev *pdev)
2088 {
2089         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
2090         struct mlx4_priv *priv = mlx4_priv(dev);
2091         int p;
2092
2093         if (dev) {
2094                 /* in SRIOV it is not allowed to unload the pf's
2095                  * driver while there are alive vf's */
2096                 if (mlx4_is_master(dev)) {
2097                         if (mlx4_how_many_lives_vf(dev))
2098                                 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
2099                 }
2100                 mlx4_stop_sense(dev);
2101                 mlx4_unregister_device(dev);
2102
2103                 for (p = 1; p <= dev->caps.num_ports; p++) {
2104                         mlx4_cleanup_port_info(&priv->port[p]);
2105                         mlx4_CLOSE_PORT(dev, p);
2106                 }
2107
2108                 if (mlx4_is_master(dev))
2109                         mlx4_free_resource_tracker(dev,
2110                                                    RES_TR_FREE_SLAVES_ONLY);
2111
2112                 mlx4_cleanup_counters_table(dev);
2113                 mlx4_cleanup_mcg_table(dev);
2114                 mlx4_cleanup_qp_table(dev);
2115                 mlx4_cleanup_srq_table(dev);
2116                 mlx4_cleanup_cq_table(dev);
2117                 mlx4_cmd_use_polling(dev);
2118                 mlx4_cleanup_eq_table(dev);
2119                 mlx4_cleanup_mr_table(dev);
2120                 mlx4_cleanup_xrcd_table(dev);
2121                 mlx4_cleanup_pd_table(dev);
2122
2123                 if (mlx4_is_master(dev))
2124                         mlx4_free_resource_tracker(dev,
2125                                                    RES_TR_FREE_STRUCTS_ONLY);
2126
2127                 iounmap(priv->kar);
2128                 mlx4_uar_free(dev, &priv->driver_uar);
2129                 mlx4_cleanup_uar_table(dev);
2130                 if (!mlx4_is_slave(dev))
2131                         mlx4_clear_steering(dev);
2132                 mlx4_free_eq_table(dev);
2133                 if (mlx4_is_master(dev))
2134                         mlx4_multi_func_cleanup(dev);
2135                 mlx4_close_hca(dev);
2136                 if (mlx4_is_slave(dev))
2137                         mlx4_multi_func_cleanup(dev);
2138                 mlx4_cmd_cleanup(dev);
2139
2140                 if (dev->flags & MLX4_FLAG_MSI_X)
2141                         pci_disable_msix(pdev);
2142                 if (dev->flags & MLX4_FLAG_SRIOV) {
2143                         mlx4_warn(dev, "Disabling sriov\n");
2144                         pci_disable_sriov(pdev);
2145                 }
2146
2147                 if (!mlx4_is_slave(dev))
2148                         mlx4_free_ownership(dev);
2149                 kfree(priv);
2150                 pci_release_regions(pdev);
2151                 pci_disable_device(pdev);
2152                 pci_set_drvdata(pdev, NULL);
2153         }
2154 }
2155
2156 int mlx4_restart_one(struct pci_dev *pdev)
2157 {
2158         mlx4_remove_one(pdev);
2159         return __mlx4_init_one(pdev, NULL);
2160 }
2161
2162 static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
2163         /* MT25408 "Hermon" SDR */
2164         { PCI_VDEVICE(MELLANOX, 0x6340), 0 },
2165         /* MT25408 "Hermon" DDR */
2166         { PCI_VDEVICE(MELLANOX, 0x634a), 0 },
2167         /* MT25408 "Hermon" QDR */
2168         { PCI_VDEVICE(MELLANOX, 0x6354), 0 },
2169         /* MT25408 "Hermon" DDR PCIe gen2 */
2170         { PCI_VDEVICE(MELLANOX, 0x6732), 0 },
2171         /* MT25408 "Hermon" QDR PCIe gen2 */
2172         { PCI_VDEVICE(MELLANOX, 0x673c), 0 },
2173         /* MT25408 "Hermon" EN 10GigE */
2174         { PCI_VDEVICE(MELLANOX, 0x6368), 0 },
2175         /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2176         { PCI_VDEVICE(MELLANOX, 0x6750), 0 },
2177         /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2178         { PCI_VDEVICE(MELLANOX, 0x6372), 0 },
2179         /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2180         { PCI_VDEVICE(MELLANOX, 0x675a), 0 },
2181         /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2182         { PCI_VDEVICE(MELLANOX, 0x6764), 0 },
2183         /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2184         { PCI_VDEVICE(MELLANOX, 0x6746), 0 },
2185         /* MT26478 ConnectX2 40GigE PCIe gen2 */
2186         { PCI_VDEVICE(MELLANOX, 0x676e), 0 },
2187         /* MT25400 Family [ConnectX-2 Virtual Function] */
2188         { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_VF },
2189         /* MT27500 Family [ConnectX-3] */
2190         { PCI_VDEVICE(MELLANOX, 0x1003), 0 },
2191         /* MT27500 Family [ConnectX-3 Virtual Function] */
2192         { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_VF },
2193         { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */
2194         { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */
2195         { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */
2196         { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */
2197         { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */
2198         { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */
2199         { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */
2200         { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */
2201         { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */
2202         { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */
2203         { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */
2204         { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */
2205         { 0, }
2206 };
2207
2208 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
2209
2210 static struct pci_driver mlx4_driver = {
2211         .name           = DRV_NAME,
2212         .id_table       = mlx4_pci_table,
2213         .probe          = mlx4_init_one,
2214         .remove         = __devexit_p(mlx4_remove_one)
2215 };
2216
2217 static int __init mlx4_verify_params(void)
2218 {
2219         if ((log_num_mac < 0) || (log_num_mac > 7)) {
2220                 pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac);
2221                 return -1;
2222         }
2223
2224         if (log_num_vlan != 0)
2225                 pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n",
2226                            MLX4_LOG_NUM_VLANS);
2227
2228         if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) {
2229                 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg);
2230                 return -1;
2231         }
2232
2233         /* Check if module param for ports type has legal combination */
2234         if (port_type_array[0] == false && port_type_array[1] == true) {
2235                 printk(KERN_WARNING "Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n");
2236                 port_type_array[0] = true;
2237         }
2238
2239         return 0;
2240 }
2241
2242 static int __init mlx4_init(void)
2243 {
2244         int ret;
2245
2246         if (mlx4_verify_params())
2247                 return -EINVAL;
2248
2249         mlx4_catas_init();
2250
2251         mlx4_wq = create_singlethread_workqueue("mlx4");
2252         if (!mlx4_wq)
2253                 return -ENOMEM;
2254
2255         ret = pci_register_driver(&mlx4_driver);
2256         return ret < 0 ? ret : 0;
2257 }
2258
2259 static void __exit mlx4_cleanup(void)
2260 {
2261         pci_unregister_driver(&mlx4_driver);
2262         destroy_workqueue(mlx4_wq);
2263 }
2264
2265 module_init(mlx4_init);
2266 module_exit(mlx4_cleanup);