drivers/net/ethernet/mellanox/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/slab.h>
  42 #include <linux/io-mapping.h>
  43 #include <linux/delay.h>
  44 #include <linux/netdevice.h>
  45
  46 #include <linux/mlx4/device.h>
  47 #include <linux/mlx4/doorbell.h>
  48
  49 #include "mlx4.h"
  50 #include "fw.h"
  51 #include "icm.h"
  52
  53 MODULE_AUTHOR("Roland Dreier");
  54 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  55 MODULE_LICENSE("Dual BSD/GPL");
  56 MODULE_VERSION(DRV_VERSION);
  57
  58 struct workqueue_struct *mlx4_wq;
  59
  60 #ifdef CONFIG_MLX4_DEBUG
  61
  62 int mlx4_debug_level = 0;
  63 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  64 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  65
  66 #endif /* CONFIG_MLX4_DEBUG */
  67
  68 #ifdef CONFIG_PCI_MSI
  69
  70 static int msi_x = 1;
  71 module_param(msi_x, int, 0444);
  72 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  73
  74 #else /* CONFIG_PCI_MSI */
  75
  76 #define msi_x (0)
  77
  78 #endif /* CONFIG_PCI_MSI */
  79
  80 static int num_vfs;
  81 module_param(num_vfs, int, 0444);
  82 MODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0");
  83
  84 static int probe_vf;
  85 module_param(probe_vf, int, 0644);
  86 MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
  87
  88 int mlx4_log_num_mgm_entry_size = 10;
  89 module_param_named(log_num_mgm_entry_size,
  90                         mlx4_log_num_mgm_entry_size, int, 0444);
  91 MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
  92                                          " of qp per mcg, for example:"
  93                                          " 10 gives 248.range: 9<="
  94                                          " log_num_mgm_entry_size <= 12."
  95                                          " Not in use with device managed"
  96                                          " flow steering");
  97
  98 #define MLX4_VF                                        (1 << 0)
  99
 100 #define HCA_GLOBAL_CAP_MASK            0
 101 #define PF_CONTEXT_BEHAVIOUR_MASK      0
 102
 103 static char mlx4_version[] __devinitdata =
 104         DRV_NAME ": Mellanox ConnectX core driver v"
 105         DRV_VERSION " (" DRV_RELDATE ")\n";
 106
 107 static struct mlx4_profile default_profile = {
 108         .num_qp         = 1 << 18,
 109         .num_srq        = 1 << 16,
 110         .rdmarc_per_qp  = 1 << 4,
 111         .num_cq         = 1 << 16,
 112         .num_mcg        = 1 << 13,
 113         .num_mpt        = 1 << 19,
 114         .num_mtt        = 1 << 20, /* It is really num mtt segements */
 115 };
 116
 117 static int log_num_mac = 7;
 118 module_param_named(log_num_mac, log_num_mac, int, 0444);
 119 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
 120
 121 static int log_num_vlan;
 122 module_param_named(log_num_vlan, log_num_vlan, int, 0444);
 123 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
 124 /* Log2 max number of VLANs per ETH port (0-7) */
 125 #define MLX4_LOG_NUM_VLANS 7
 126
 127 static bool use_prio;
 128 module_param_named(use_prio, use_prio, bool, 0444);
 129 MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports "
 130                   "(0/1, default 0)");
 131
 132 int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG);
 133 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
 134 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)");
 135
 136 static int port_type_array[2] = {MLX4_PORT_TYPE_NONE, MLX4_PORT_TYPE_NONE};
 137 static int arr_argc = 2;
 138 module_param_array(port_type_array, int, &arr_argc, 0444);
 139 MODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is default "
 140                                 "1 for IB, 2 for Ethernet");
 141
 142 struct mlx4_port_config {
 143         struct list_head list;
 144         enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
 145         struct pci_dev *pdev;
 146 };
 147
 148 int mlx4_check_port_params(struct mlx4_dev *dev,
 149                            enum mlx4_port_type *port_type)
 150 {
 151         int i;
 152
 153         for (i = 0; i < dev->caps.num_ports - 1; i++) {
 154                 if (port_type[i] != port_type[i + 1]) {
 155                         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
 156                                 mlx4_err(dev, "Only same port types supported "
 157                                          "on this HCA, aborting.\n");
 158                                 return -EINVAL;
 159                         }
 160                 }
 161         }
 162
 163         for (i = 0; i < dev->caps.num_ports; i++) {
 164                 if (!(port_type[i] & dev->caps.supported_type[i+1])) {
 165                         mlx4_err(dev, "Requested port type for port %d is not "
 166                                       "supported on this HCA\n", i + 1);
 167                         return -EINVAL;
 168                 }
 169         }
 170         return 0;
 171 }
 172
 173 static void mlx4_set_port_mask(struct mlx4_dev *dev)
 174 {
 175         int i;
 176
 177         for (i = 1; i <= dev->caps.num_ports; ++i)
 178                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 179 }
 180
 181 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
 182 {
 183         int err;
 184         int i;
 185
 186         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
 187         if (err) {
 188                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 189                 return err;
 190         }
 191
 192         if (dev_cap->min_page_sz > PAGE_SIZE) {
 193                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 194                          "kernel PAGE_SIZE of %ld, aborting.\n",
 195                          dev_cap->min_page_sz, PAGE_SIZE);
 196                 return -ENODEV;
 197         }
 198         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 199                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 200                          "aborting.\n",
 201                          dev_cap->num_ports, MLX4_MAX_PORTS);
 202                 return -ENODEV;
 203         }
 204
 205         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 206                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 207                          "PCI resource 2 size of 0x%llx, aborting.\n",
 208                          dev_cap->uar_size,
 209                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 210                 return -ENODEV;
 211         }
 212
 213         dev->caps.num_ports          = dev_cap->num_ports;
 214         dev->phys_caps.num_phys_eqs  = MLX4_MAX_EQ_NUM;
 215         for (i = 1; i <= dev->caps.num_ports; ++i) {
 216                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 217                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];
 218                 dev->phys_caps.gid_phys_table_len[i]  = dev_cap->max_gids[i];
 219                 dev->phys_caps.pkey_phys_table_len[i] = dev_cap->max_pkeys[i];
 220                 /* set gid and pkey table operating lengths by default
 221                  * to non-sriov values */
 222                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 223                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 224                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 225                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
 226                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];
 227                 dev->caps.supported_type[i] = dev_cap->supported_port_types[i];
 228                 dev->caps.suggested_type[i] = dev_cap->suggested_type[i];
 229                 dev->caps.default_sense[i] = dev_cap->default_sense[i];
 230                 dev->caps.trans_type[i]     = dev_cap->trans_type[i];
 231                 dev->caps.vendor_oui[i]     = dev_cap->vendor_oui[i];
 232                 dev->caps.wavelength[i]     = dev_cap->wavelength[i];
 233                 dev->caps.trans_code[i]     = dev_cap->trans_code[i];
 234         }
 235
 236         dev->caps.uar_page_size      = PAGE_SIZE;
 237         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 238         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 239         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 240         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 241         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 242         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 243         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 244         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 245         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 246         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 247         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 248         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 249         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 250         /*
 251          * Subtract 1 from the limit because we need to allocate a
 252          * spare CQE so the HCA HW can tell the difference between an
 253          * empty CQ and a full CQ.
 254          */
 255         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 256         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 257         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 258         dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
 259         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 260
 261         /* The first 128 UARs are used for EQ doorbells */
 262         dev->caps.reserved_uars      = max_t(int, 128, dev_cap->reserved_uars);
 263         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 264         dev->caps.reserved_xrcds     = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 265                                         dev_cap->reserved_xrcds : 0;
 266         dev->caps.max_xrcds          = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 267                                         dev_cap->max_xrcds : 0;
 268         dev->caps.mtt_entry_sz       = dev_cap->mtt_entry_sz;
 269
 270         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 271         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 272         dev->caps.flags              = dev_cap->flags;
 273         dev->caps.flags2             = dev_cap->flags2;
 274         dev->caps.bmme_flags         = dev_cap->bmme_flags;
 275         dev->caps.reserved_lkey      = dev_cap->reserved_lkey;
 276         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 277         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 278         dev->caps.max_rss_tbl_sz     = dev_cap->max_rss_tbl_sz;
 279
 280         if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) {
 281                 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
 282                 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
 283                 dev->caps.fs_log_max_ucast_qp_range_size =
 284                         dev_cap->fs_log_max_ucast_qp_range_size;
 285         } else {
 286                 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
 287                     dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) {
 288                         dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
 289                 } else {
 290                         dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
 291
 292                         if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
 293                             dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
 294                                 mlx4_warn(dev, "Must have UC_STEER and MC_STEER flags "
 295                                                 "set to use B0 steering. Falling back to A0 steering mode.\n");
 296                 }
 297                 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
 298         }
 299         mlx4_dbg(dev, "Steering mode is: %s\n",
 300                  mlx4_steering_mode_str(dev->caps.steering_mode));
 301
 302         /* Sense port always allowed on supported devices for ConnectX1 and 2 */
 303         if (dev->pdev->device != 0x1003)
 304                 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
 305
 306         dev->caps.log_num_macs  = log_num_mac;
 307         dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS;
 308         dev->caps.log_num_prios = use_prio ? 3 : 0;
 309
 310         for (i = 1; i <= dev->caps.num_ports; ++i) {
 311                 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE;
 312                 if (dev->caps.supported_type[i]) {
 313                         /* if only ETH is supported - assign ETH */
 314                         if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
 315                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 316                         /* if only IB is supported, assign IB */
 317                         else if (dev->caps.supported_type[i] ==
 318                                  MLX4_PORT_TYPE_IB)
 319                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
 320                         else {
 321                                 /* if IB and ETH are supported, we set the port
 322                                  * type according to user selection of port type;
 323                                  * if user selected none, take the FW hint */
 324                                 if (port_type_array[i - 1] == MLX4_PORT_TYPE_NONE)
 325                                         dev->caps.port_type[i] = dev->caps.suggested_type[i] ?
 326                                                 MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB;
 327                                 else
 328                                         dev->caps.port_type[i] = port_type_array[i - 1];
 329                         }
 330                 }
 331                 /*
 332                  * Link sensing is allowed on the port if 3 conditions are true:
 333                  * 1. Both protocols are supported on the port.
 334                  * 2. Different types are supported on the port
 335                  * 3. FW declared that it supports link sensing
 336                  */
 337                 mlx4_priv(dev)->sense.sense_allowed[i] =
 338                         ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) &&
 339                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 340                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT));
 341
 342                 /*
 343                  * If "default_sense" bit is set, we move the port to "AUTO" mode
 344                  * and perform sense_port FW command to try and set the correct
 345                  * port type from beginning
 346                  */
 347                 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) {
 348                         enum mlx4_port_type sensed_port = MLX4_PORT_TYPE_NONE;
 349                         dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO;
 350                         mlx4_SENSE_PORT(dev, i, &sensed_port);
 351                         if (sensed_port != MLX4_PORT_TYPE_NONE)
 352                                 dev->caps.port_type[i] = sensed_port;
 353                 } else {
 354                         dev->caps.possible_type[i] = dev->caps.port_type[i];
 355                 }
 356
 357                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
 358                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
 359                         mlx4_warn(dev, "Requested number of MACs is too much "
 360                                   "for port %d, reducing to %d.\n",
 361                                   i, 1 << dev->caps.log_num_macs);
 362                 }
 363                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
 364                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
 365                         mlx4_warn(dev, "Requested number of VLANs is too much "
 366                                   "for port %d, reducing to %d.\n",
 367                                   i, 1 << dev->caps.log_num_vlans);
 368                 }
 369         }
 370
 371         dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters);
 372
 373         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
 374         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
 375                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
 376                 (1 << dev->caps.log_num_macs) *
 377                 (1 << dev->caps.log_num_vlans) *
 378                 (1 << dev->caps.log_num_prios) *
 379                 dev->caps.num_ports;
 380         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
 381
 382         dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
 383                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
 384                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
 385                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
 386
 387         dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0;
 388         return 0;
 389 }
 390 /*The function checks if there are live vf, return the num of them*/
 391 static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
 392 {
 393         struct mlx4_priv *priv = mlx4_priv(dev);
 394         struct mlx4_slave_state *s_state;
 395         int i;
 396         int ret = 0;
 397
 398         for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) {
 399                 s_state = &priv->mfunc.master.slave_state[i];
 400                 if (s_state->active && s_state->last_cmd !=
 401                     MLX4_COMM_CMD_RESET) {
 402                         mlx4_warn(dev, "%s: slave: %d is still active\n",
 403                                   __func__, i);
 404                         ret++;
 405                 }
 406         }
 407         return ret;
 408 }
 409
 410 int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey)
 411 {
 412         u32 qk = MLX4_RESERVED_QKEY_BASE;
 413
 414         if (qpn >= dev->phys_caps.base_tunnel_sqpn + 8 * MLX4_MFUNC_MAX ||
 415             qpn < dev->phys_caps.base_proxy_sqpn)
 416                 return -EINVAL;
 417
 418         if (qpn >= dev->phys_caps.base_tunnel_sqpn)
 419                 /* tunnel qp */
 420                 qk += qpn - dev->phys_caps.base_tunnel_sqpn;
 421         else
 422                 qk += qpn - dev->phys_caps.base_proxy_sqpn;
 423         *qkey = qk;
 424         return 0;
 425 }
 426 EXPORT_SYMBOL(mlx4_get_parav_qkey);
 427
 428 void mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val)
 429 {
 430         struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev);
 431
 432         if (!mlx4_is_master(dev))
 433                 return;
 434
 435         priv->virt2phys_pkey[slave][port - 1][i] = val;
 436 }
 437 EXPORT_SYMBOL(mlx4_sync_pkey_table);
 438
 439 void mlx4_put_slave_node_guid(struct mlx4_dev *dev, int slave, __be64 guid)
 440 {
 441         struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev);
 442
 443         if (!mlx4_is_master(dev))
 444                 return;
 445
 446         priv->slave_node_guids[slave] = guid;
 447 }
 448 EXPORT_SYMBOL(mlx4_put_slave_node_guid);
 449
 450 __be64 mlx4_get_slave_node_guid(struct mlx4_dev *dev, int slave)
 451 {
 452         struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev);
 453
 454         if (!mlx4_is_master(dev))
 455                 return 0;
 456
 457         return priv->slave_node_guids[slave];
 458 }
 459 EXPORT_SYMBOL(mlx4_get_slave_node_guid);
 460
 461 int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
 462 {
 463         struct mlx4_priv *priv = mlx4_priv(dev);
 464         struct mlx4_slave_state *s_slave;
 465
 466         if (!mlx4_is_master(dev))
 467                 return 0;
 468
 469         s_slave = &priv->mfunc.master.slave_state[slave];
 470         return !!s_slave->active;
 471 }
 472 EXPORT_SYMBOL(mlx4_is_slave_active);
 473
 474 static int mlx4_slave_cap(struct mlx4_dev *dev)
 475 {
 476         int                        err;
 477         u32                        page_size;
 478         struct mlx4_dev_cap        dev_cap;
 479         struct mlx4_func_cap       func_cap;
 480         struct mlx4_init_hca_param hca_param;
 481         int                        i;
 482
 483         memset(&hca_param, 0, sizeof(hca_param));
 484         err = mlx4_QUERY_HCA(dev, &hca_param);
 485         if (err) {
 486                 mlx4_err(dev, "QUERY_HCA command failed, aborting.\n");
 487                 return err;
 488         }
 489
 490         /*fail if the hca has an unknown capability */
 491         if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) !=
 492             HCA_GLOBAL_CAP_MASK) {
 493                 mlx4_err(dev, "Unknown hca global capabilities\n");
 494                 return -ENOSYS;
 495         }
 496
 497         mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
 498
 499         memset(&dev_cap, 0, sizeof(dev_cap));
 500         dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp;
 501         err = mlx4_dev_cap(dev, &dev_cap);
 502         if (err) {
 503                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 504                 return err;
 505         }
 506
 507         err = mlx4_QUERY_FW(dev);
 508         if (err)
 509                 mlx4_err(dev, "QUERY_FW command failed: could not get FW version.\n");
 510
 511         page_size = ~dev->caps.page_size_cap + 1;
 512         mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);
 513         if (page_size > PAGE_SIZE) {
 514                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 515                          "kernel PAGE_SIZE of %ld, aborting.\n",
 516                          page_size, PAGE_SIZE);
 517                 return -ENODEV;
 518         }
 519
 520         /* slave gets uar page size from QUERY_HCA fw command */
 521         dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12);
 522
 523         /* TODO: relax this assumption */
 524         if (dev->caps.uar_page_size != PAGE_SIZE) {
 525                 mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n",
 526                          dev->caps.uar_page_size, PAGE_SIZE);
 527                 return -ENODEV;
 528         }
 529
 530         memset(&func_cap, 0, sizeof(func_cap));
 531         err = mlx4_QUERY_FUNC_CAP(dev, 0, &func_cap);
 532         if (err) {
 533                 mlx4_err(dev, "QUERY_FUNC_CAP general command failed, aborting (%d).\n",
 534                           err);
 535                 return err;
 536         }
 537
 538         if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) !=
 539             PF_CONTEXT_BEHAVIOUR_MASK) {
 540                 mlx4_err(dev, "Unknown pf context behaviour\n");
 541                 return -ENOSYS;
 542         }
 543
 544         dev->caps.num_ports             = func_cap.num_ports;
 545         dev->caps.num_qps               = func_cap.qp_quota;
 546         dev->caps.num_srqs              = func_cap.srq_quota;
 547         dev->caps.num_cqs               = func_cap.cq_quota;
 548         dev->caps.num_eqs               = func_cap.max_eq;
 549         dev->caps.reserved_eqs          = func_cap.reserved_eq;
 550         dev->caps.num_mpts              = func_cap.mpt_quota;
 551         dev->caps.num_mtts              = func_cap.mtt_quota;
 552         dev->caps.num_pds               = MLX4_NUM_PDS;
 553         dev->caps.num_mgms              = 0;
 554         dev->caps.num_amgms             = 0;
 555
 556         if (dev->caps.num_ports > MLX4_MAX_PORTS) {
 557                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 558                          "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS);
 559                 return -ENODEV;
 560         }
 561
 562         dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
 563         dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
 564         dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
 565         dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL);
 566
 567         if (!dev->caps.qp0_tunnel || !dev->caps.qp0_proxy ||
 568             !dev->caps.qp1_tunnel || !dev->caps.qp1_proxy) {
 569                 err = -ENOMEM;
 570                 goto err_mem;
 571         }
 572
 573         for (i = 1; i <= dev->caps.num_ports; ++i) {
 574                 err = mlx4_QUERY_FUNC_CAP(dev, (u32) i, &func_cap);
 575                 if (err) {
 576                         mlx4_err(dev, "QUERY_FUNC_CAP port command failed for"
 577                                  " port %d, aborting (%d).\n", i, err);
 578                         goto err_mem;
 579                 }
 580                 dev->caps.qp0_tunnel[i - 1] = func_cap.qp0_tunnel_qpn;
 581                 dev->caps.qp0_proxy[i - 1] = func_cap.qp0_proxy_qpn;
 582                 dev->caps.qp1_tunnel[i - 1] = func_cap.qp1_tunnel_qpn;
 583                 dev->caps.qp1_proxy[i - 1] = func_cap.qp1_proxy_qpn;
 584                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 585                 if (mlx4_get_slave_pkey_gid_tbl_len(dev, i,
 586                                                     &dev->caps.gid_table_len[i],
 587                                                     &dev->caps.pkey_table_len[i]))
 588                         goto err_mem;
 589         }
 590
 591         if (dev->caps.uar_page_size * (dev->caps.num_uars -
 592                                        dev->caps.reserved_uars) >
 593                                        pci_resource_len(dev->pdev, 2)) {
 594                 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than "
 595                          "PCI resource 2 size of 0x%llx, aborting.\n",
 596                          dev->caps.uar_page_size * dev->caps.num_uars,
 597                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 598                 goto err_mem;
 599         }
 600
 601         return 0;
 602
 603 err_mem:
 604         kfree(dev->caps.qp0_tunnel);
 605         kfree(dev->caps.qp0_proxy);
 606         kfree(dev->caps.qp1_tunnel);
 607         kfree(dev->caps.qp1_proxy);
 608         dev->caps.qp0_tunnel = dev->caps.qp0_proxy =
 609                 dev->caps.qp1_tunnel = dev->caps.qp1_proxy = NULL;
 610
 611         return err;
 612 }
 613
 614 /*
 615  * Change the port configuration of the device.
 616  * Every user of this function must hold the port mutex.
 617  */
 618 int mlx4_change_port_types(struct mlx4_dev *dev,
 619                            enum mlx4_port_type *port_types)
 620 {
 621         int err = 0;
 622         int change = 0;
 623         int port;
 624
 625         for (port = 0; port <  dev->caps.num_ports; port++) {
 626                 /* Change the port type only if the new type is different
 627                  * from the current, and not set to Auto */
 628                 if (port_types[port] != dev->caps.port_type[port + 1])
 629                         change = 1;
 630         }
 631         if (change) {
 632                 mlx4_unregister_device(dev);
 633                 for (port = 1; port <= dev->caps.num_ports; port++) {
 634                         mlx4_CLOSE_PORT(dev, port);
 635                         dev->caps.port_type[port] = port_types[port - 1];
 636                         err = mlx4_SET_PORT(dev, port, -1);
 637                         if (err) {
 638                                 mlx4_err(dev, "Failed to set port %d, "
 639                                               "aborting\n", port);
 640                                 goto out;
 641                         }
 642                 }
 643                 mlx4_set_port_mask(dev);
 644                 err = mlx4_register_device(dev);
 645         }
 646
 647 out:
 648         return err;
 649 }
 650
 651 static ssize_t show_port_type(struct device *dev,
 652                               struct device_attribute *attr,
 653                               char *buf)
 654 {
 655         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 656                                                    port_attr);
 657         struct mlx4_dev *mdev = info->dev;
 658         char type[8];
 659
 660         sprintf(type, "%s",
 661                 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ?
 662                 "ib" : "eth");
 663         if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO)
 664                 sprintf(buf, "auto (%s)\n", type);
 665         else
 666                 sprintf(buf, "%s\n", type);
 667
 668         return strlen(buf);
 669 }
 670
 671 static ssize_t set_port_type(struct device *dev,
 672                              struct device_attribute *attr,
 673                              const char *buf, size_t count)
 674 {
 675         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 676                                                    port_attr);
 677         struct mlx4_dev *mdev = info->dev;
 678         struct mlx4_priv *priv = mlx4_priv(mdev);
 679         enum mlx4_port_type types[MLX4_MAX_PORTS];
 680         enum mlx4_port_type new_types[MLX4_MAX_PORTS];
 681         int i;
 682         int err = 0;
 683
 684         if (!strcmp(buf, "ib\n"))
 685                 info->tmp_type = MLX4_PORT_TYPE_IB;
 686         else if (!strcmp(buf, "eth\n"))
 687                 info->tmp_type = MLX4_PORT_TYPE_ETH;
 688         else if (!strcmp(buf, "auto\n"))
 689                 info->tmp_type = MLX4_PORT_TYPE_AUTO;
 690         else {
 691                 mlx4_err(mdev, "%s is not supported port type\n", buf);
 692                 return -EINVAL;
 693         }
 694
 695         mlx4_stop_sense(mdev);
 696         mutex_lock(&priv->port_mutex);
 697         /* Possible type is always the one that was delivered */
 698         mdev->caps.possible_type[info->port] = info->tmp_type;
 699
 700         for (i = 0; i < mdev->caps.num_ports; i++) {
 701                 types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type :
 702                                         mdev->caps.possible_type[i+1];
 703                 if (types[i] == MLX4_PORT_TYPE_AUTO)
 704                         types[i] = mdev->caps.port_type[i+1];
 705         }
 706
 707         if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 708             !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) {
 709                 for (i = 1; i <= mdev->caps.num_ports; i++) {
 710                         if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) {
 711                                 mdev->caps.possible_type[i] = mdev->caps.port_type[i];
 712                                 err = -EINVAL;
 713                         }
 714                 }
 715         }
 716         if (err) {
 717                 mlx4_err(mdev, "Auto sensing is not supported on this HCA. "
 718                                "Set only 'eth' or 'ib' for both ports "
 719                                "(should be the same)\n");
 720                 goto out;
 721         }
 722
 723         mlx4_do_sense_ports(mdev, new_types, types);
 724
 725         err = mlx4_check_port_params(mdev, new_types);
 726         if (err)
 727                 goto out;
 728
 729         /* We are about to apply the changes after the configuration
 730          * was verified, no need to remember the temporary types
 731          * any more */
 732         for (i = 0; i < mdev->caps.num_ports; i++)
 733                 priv->port[i + 1].tmp_type = 0;
 734
 735         err = mlx4_change_port_types(mdev, new_types);
 736
 737 out:
 738         mlx4_start_sense(mdev);
 739         mutex_unlock(&priv->port_mutex);
 740         return err ? err : count;
 741 }
 742
 743 enum ibta_mtu {
 744         IB_MTU_256  = 1,
 745         IB_MTU_512  = 2,
 746         IB_MTU_1024 = 3,
 747         IB_MTU_2048 = 4,
 748         IB_MTU_4096 = 5
 749 };
 750
 751 static inline int int_to_ibta_mtu(int mtu)
 752 {
 753         switch (mtu) {
 754         case 256:  return IB_MTU_256;
 755         case 512:  return IB_MTU_512;
 756         case 1024: return IB_MTU_1024;
 757         case 2048: return IB_MTU_2048;
 758         case 4096: return IB_MTU_4096;
 759         default: return -1;
 760         }
 761 }
 762
 763 static inline int ibta_mtu_to_int(enum ibta_mtu mtu)
 764 {
 765         switch (mtu) {
 766         case IB_MTU_256:  return  256;
 767         case IB_MTU_512:  return  512;
 768         case IB_MTU_1024: return 1024;
 769         case IB_MTU_2048: return 2048;
 770         case IB_MTU_4096: return 4096;
 771         default: return -1;
 772         }
 773 }
 774
 775 static ssize_t show_port_ib_mtu(struct device *dev,
 776                              struct device_attribute *attr,
 777                              char *buf)
 778 {
 779         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 780                                                    port_mtu_attr);
 781         struct mlx4_dev *mdev = info->dev;
 782
 783         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH)
 784                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 785
 786         sprintf(buf, "%d\n",
 787                         ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port]));
 788         return strlen(buf);
 789 }
 790
 791 static ssize_t set_port_ib_mtu(struct device *dev,
 792                              struct device_attribute *attr,
 793                              const char *buf, size_t count)
 794 {
 795         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 796                                                    port_mtu_attr);
 797         struct mlx4_dev *mdev = info->dev;
 798         struct mlx4_priv *priv = mlx4_priv(mdev);
 799         int err, port, mtu, ibta_mtu = -1;
 800
 801         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) {
 802                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 803                 return -EINVAL;
 804         }
 805
 806         err = sscanf(buf, "%d", &mtu);
 807         if (err > 0)
 808                 ibta_mtu = int_to_ibta_mtu(mtu);
 809
 810         if (err <= 0 || ibta_mtu < 0) {
 811                 mlx4_err(mdev, "%s is invalid IBTA mtu\n", buf);
 812                 return -EINVAL;
 813         }
 814
 815         mdev->caps.port_ib_mtu[info->port] = ibta_mtu;
 816
 817         mlx4_stop_sense(mdev);
 818         mutex_lock(&priv->port_mutex);
 819         mlx4_unregister_device(mdev);
 820         for (port = 1; port <= mdev->caps.num_ports; port++) {
 821                 mlx4_CLOSE_PORT(mdev, port);
 822                 err = mlx4_SET_PORT(mdev, port, -1);
 823                 if (err) {
 824                         mlx4_err(mdev, "Failed to set port %d, "
 825                                       "aborting\n", port);
 826                         goto err_set_port;
 827                 }
 828         }
 829         err = mlx4_register_device(mdev);
 830 err_set_port:
 831         mutex_unlock(&priv->port_mutex);
 832         mlx4_start_sense(mdev);
 833         return err ? err : count;
 834 }
 835
 836 static int mlx4_load_fw(struct mlx4_dev *dev)
 837 {
 838         struct mlx4_priv *priv = mlx4_priv(dev);
 839         int err;
 840
 841         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 842                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 843         if (!priv->fw.fw_icm) {
 844                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 845                 return -ENOMEM;
 846         }
 847
 848         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 849         if (err) {
 850                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 851                 goto err_free;
 852         }
 853
 854         err = mlx4_RUN_FW(dev);
 855         if (err) {
 856                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 857                 goto err_unmap_fa;
 858         }
 859
 860         return 0;
 861
 862 err_unmap_fa:
 863         mlx4_UNMAP_FA(dev);
 864
 865 err_free:
 866         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 867         return err;
 868 }
 869
 870 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 871                                 int cmpt_entry_sz)
 872 {
 873         struct mlx4_priv *priv = mlx4_priv(dev);
 874         int err;
 875         int num_eqs;
 876
 877         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 878                                   cmpt_base +
 879                                   ((u64) (MLX4_CMPT_TYPE_QP *
 880                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 881                                   cmpt_entry_sz, dev->caps.num_qps,
 882                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 883                                   0, 0);
 884         if (err)
 885                 goto err;
 886
 887         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 888                                   cmpt_base +
 889                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 890                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 891                                   cmpt_entry_sz, dev->caps.num_srqs,
 892                                   dev->caps.reserved_srqs, 0, 0);
 893         if (err)
 894                 goto err_qp;
 895
 896         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 897                                   cmpt_base +
 898                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 899                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 900                                   cmpt_entry_sz, dev->caps.num_cqs,
 901                                   dev->caps.reserved_cqs, 0, 0);
 902         if (err)
 903                 goto err_srq;
 904
 905         num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs :
 906                   dev->caps.num_eqs;
 907         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 908                                   cmpt_base +
 909                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 910                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 911                                   cmpt_entry_sz, num_eqs, num_eqs, 0, 0);
 912         if (err)
 913                 goto err_cq;
 914
 915         return 0;
 916
 917 err_cq:
 918         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 919
 920 err_srq:
 921         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 922
 923 err_qp:
 924         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 925
 926 err:
 927         return err;
 928 }
 929
 930 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 931                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 932 {
 933         struct mlx4_priv *priv = mlx4_priv(dev);
 934         u64 aux_pages;
 935         int num_eqs;
 936         int err;
 937
 938         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 939         if (err) {
 940                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 941                 return err;
 942         }
 943
 944         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 945                  (unsigned long long) icm_size >> 10,
 946                  (unsigned long long) aux_pages << 2);
 947
 948         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 949                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 950         if (!priv->fw.aux_icm) {
 951                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 952                 return -ENOMEM;
 953         }
 954
 955         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 956         if (err) {
 957                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 958                 goto err_free_aux;
 959         }
 960
 961         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 962         if (err) {
 963                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 964                 goto err_unmap_aux;
 965         }
 966
 967
 968         num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs :
 969                    dev->caps.num_eqs;
 970         err = mlx4_init_icm_table(dev, &priv->eq_table.table,
 971                                   init_hca->eqc_base, dev_cap->eqc_entry_sz,
 972                                   num_eqs, num_eqs, 0, 0);
 973         if (err) {
 974                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 975                 goto err_unmap_cmpt;
 976         }
 977
 978         /*
 979          * Reserved MTT entries must be aligned up to a cacheline
 980          * boundary, since the FW will write to them, while the driver
 981          * writes to all other MTT entries. (The variable
 982          * dev->caps.mtt_entry_sz below is really the MTT segment
 983          * size, not the raw entry size)
 984          */
 985         dev->caps.reserved_mtts =
 986                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 987                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 988
 989         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 990                                   init_hca->mtt_base,
 991                                   dev->caps.mtt_entry_sz,
 992                                   dev->caps.num_mtts,
 993                                   dev->caps.reserved_mtts, 1, 0);
 994         if (err) {
 995                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 996                 goto err_unmap_eq;
 997         }
 998
 999         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
1000                                   init_hca->dmpt_base,
1001                                   dev_cap->dmpt_entry_sz,
1002                                   dev->caps.num_mpts,
1003                                   dev->caps.reserved_mrws, 1, 1);
1004         if (err) {
1005                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
1006                 goto err_unmap_mtt;
1007         }
1008
1009         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
1010                                   init_hca->qpc_base,
1011                                   dev_cap->qpc_entry_sz,
1012                                   dev->caps.num_qps,
1013                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1014                                   0, 0);
1015         if (err) {
1016                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
1017                 goto err_unmap_dmpt;
1018         }
1019
1020         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
1021                                   init_hca->auxc_base,
1022                                   dev_cap->aux_entry_sz,
1023                                   dev->caps.num_qps,
1024                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1025                                   0, 0);
1026         if (err) {
1027                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
1028                 goto err_unmap_qp;
1029         }
1030
1031         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
1032                                   init_hca->altc_base,
1033                                   dev_cap->altc_entry_sz,
1034                                   dev->caps.num_qps,
1035                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1036                                   0, 0);
1037         if (err) {
1038                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
1039                 goto err_unmap_auxc;
1040         }
1041
1042         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
1043                                   init_hca->rdmarc_base,
1044                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
1045                                   dev->caps.num_qps,
1046                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1047                                   0, 0);
1048         if (err) {
1049                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
1050                 goto err_unmap_altc;
1051         }
1052
1053         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
1054                                   init_hca->cqc_base,
1055                                   dev_cap->cqc_entry_sz,
1056                                   dev->caps.num_cqs,
1057                                   dev->caps.reserved_cqs, 0, 0);
1058         if (err) {
1059                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
1060                 goto err_unmap_rdmarc;
1061         }
1062
1063         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
1064                                   init_hca->srqc_base,
1065                                   dev_cap->srq_entry_sz,
1066                                   dev->caps.num_srqs,
1067                                   dev->caps.reserved_srqs, 0, 0);
1068         if (err) {
1069                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
1070                 goto err_unmap_cq;
1071         }
1072
1073         /*
1074          * For flow steering device managed mode it is required to use
1075          * mlx4_init_icm_table. For B0 steering mode it's not strictly
1076          * required, but for simplicity just map the whole multicast
1077          * group table now.  The table isn't very big and it's a lot
1078          * easier than trying to track ref counts.
1079          */
1080         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
1081                                   init_hca->mc_base,
1082                                   mlx4_get_mgm_entry_size(dev),
1083                                   dev->caps.num_mgms + dev->caps.num_amgms,
1084                                   dev->caps.num_mgms + dev->caps.num_amgms,
1085                                   0, 0);
1086         if (err) {
1087                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
1088                 goto err_unmap_srq;
1089         }
1090
1091         return 0;
1092
1093 err_unmap_srq:
1094         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1095
1096 err_unmap_cq:
1097         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1098
1099 err_unmap_rdmarc:
1100         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1101
1102 err_unmap_altc:
1103         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1104
1105 err_unmap_auxc:
1106         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1107
1108 err_unmap_qp:
1109         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1110
1111 err_unmap_dmpt:
1112         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1113
1114 err_unmap_mtt:
1115         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1116
1117 err_unmap_eq:
1118         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1119
1120 err_unmap_cmpt:
1121         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1122         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1123         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1124         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1125
1126 err_unmap_aux:
1127         mlx4_UNMAP_ICM_AUX(dev);
1128
1129 err_free_aux:
1130         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1131
1132         return err;
1133 }
1134
1135 static void mlx4_free_icms(struct mlx4_dev *dev)
1136 {
1137         struct mlx4_priv *priv = mlx4_priv(dev);
1138
1139         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
1140         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1141         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1142         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1143         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1144         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1145         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1146         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1147         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1148         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1149         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1150         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1151         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1152         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1153
1154         mlx4_UNMAP_ICM_AUX(dev);
1155         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1156 }
1157
1158 static void mlx4_slave_exit(struct mlx4_dev *dev)
1159 {
1160         struct mlx4_priv *priv = mlx4_priv(dev);
1161
1162         mutex_lock(&priv->cmd.slave_cmd_mutex);
1163         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME))
1164                 mlx4_warn(dev, "Failed to close slave function.\n");
1165         mutex_unlock(&priv->cmd.slave_cmd_mutex);
1166 }
1167
1168 static int map_bf_area(struct mlx4_dev *dev)
1169 {
1170         struct mlx4_priv *priv = mlx4_priv(dev);
1171         resource_size_t bf_start;
1172         resource_size_t bf_len;
1173         int err = 0;
1174
1175         if (!dev->caps.bf_reg_size)
1176                 return -ENXIO;
1177
1178         bf_start = pci_resource_start(dev->pdev, 2) +
1179                         (dev->caps.num_uars << PAGE_SHIFT);
1180         bf_len = pci_resource_len(dev->pdev, 2) -
1181                         (dev->caps.num_uars << PAGE_SHIFT);
1182         priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len);
1183         if (!priv->bf_mapping)
1184                 err = -ENOMEM;
1185
1186         return err;
1187 }
1188
1189 static void unmap_bf_area(struct mlx4_dev *dev)
1190 {
1191         if (mlx4_priv(dev)->bf_mapping)
1192                 io_mapping_free(mlx4_priv(dev)->bf_mapping);
1193 }
1194
1195 static void mlx4_close_hca(struct mlx4_dev *dev)
1196 {
1197         unmap_bf_area(dev);
1198         if (mlx4_is_slave(dev))
1199                 mlx4_slave_exit(dev);
1200         else {
1201                 mlx4_CLOSE_HCA(dev, 0);
1202                 mlx4_free_icms(dev);
1203                 mlx4_UNMAP_FA(dev);
1204                 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
1205         }
1206 }
1207
1208 static int mlx4_init_slave(struct mlx4_dev *dev)
1209 {
1210         struct mlx4_priv *priv = mlx4_priv(dev);
1211         u64 dma = (u64) priv->mfunc.vhcr_dma;
1212         int num_of_reset_retries = NUM_OF_RESET_RETRIES;
1213         int ret_from_reset = 0;
1214         u32 slave_read;
1215         u32 cmd_channel_ver;
1216
1217         mutex_lock(&priv->cmd.slave_cmd_mutex);
1218         priv->cmd.max_cmds = 1;
1219         mlx4_warn(dev, "Sending reset\n");
1220         ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0,
1221                                        MLX4_COMM_TIME);
1222         /* if we are in the middle of flr the slave will try
1223          * NUM_OF_RESET_RETRIES times before leaving.*/
1224         if (ret_from_reset) {
1225                 if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) {
1226                         msleep(SLEEP_TIME_IN_RESET);
1227                         while (ret_from_reset && num_of_reset_retries) {
1228                                 mlx4_warn(dev, "slave is currently in the"
1229                                           "middle of FLR. retrying..."
1230                                           "(try num:%d)\n",
1231                                           (NUM_OF_RESET_RETRIES -
1232                                            num_of_reset_retries  + 1));
1233                                 ret_from_reset =
1234                                         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET,
1235                                                       0, MLX4_COMM_TIME);
1236                                 num_of_reset_retries = num_of_reset_retries - 1;
1237                         }
1238                 } else
1239                         goto err;
1240         }
1241
1242         /* check the driver version - the slave I/F revision
1243          * must match the master's */
1244         slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
1245         cmd_channel_ver = mlx4_comm_get_version();
1246
1247         if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) !=
1248                 MLX4_COMM_GET_IF_REV(slave_read)) {
1249                 mlx4_err(dev, "slave driver version is not supported"
1250                          " by the master\n");
1251                 goto err;
1252         }
1253
1254         mlx4_warn(dev, "Sending vhcr0\n");
1255         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48,
1256                                                     MLX4_COMM_TIME))
1257                 goto err;
1258         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32,
1259                                                     MLX4_COMM_TIME))
1260                 goto err;
1261         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16,
1262                                                     MLX4_COMM_TIME))
1263                 goto err;
1264         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME))
1265                 goto err;
1266
1267         mutex_unlock(&priv->cmd.slave_cmd_mutex);
1268         return 0;
1269
1270 err:
1271         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0);
1272         mutex_unlock(&priv->cmd.slave_cmd_mutex);
1273         return -EIO;
1274 }
1275
1276 static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev)
1277 {
1278         int i;
1279
1280         for (i = 1; i <= dev->caps.num_ports; i++) {
1281                 dev->caps.gid_table_len[i] = 1;
1282                 dev->caps.pkey_table_len[i] =
1283                         dev->phys_caps.pkey_phys_table_len[i] - 1;
1284         }
1285 }
1286
1287 static int mlx4_init_hca(struct mlx4_dev *dev)
1288 {
1289         struct mlx4_priv          *priv = mlx4_priv(dev);
1290         struct mlx4_adapter        adapter;
1291         struct mlx4_dev_cap        dev_cap;
1292         struct mlx4_mod_stat_cfg   mlx4_cfg;
1293         struct mlx4_profile        profile;
1294         struct mlx4_init_hca_param init_hca;
1295         u64 icm_size;
1296         int err;
1297
1298         if (!mlx4_is_slave(dev)) {
1299                 err = mlx4_QUERY_FW(dev);
1300                 if (err) {
1301                         if (err == -EACCES)
1302                                 mlx4_info(dev, "non-primary physical function, skipping.\n");
1303                         else
1304                                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
1305                         return err;
1306                 }
1307
1308                 err = mlx4_load_fw(dev);
1309                 if (err) {
1310                         mlx4_err(dev, "Failed to start FW, aborting.\n");
1311                         return err;
1312                 }
1313
1314                 mlx4_cfg.log_pg_sz_m = 1;
1315                 mlx4_cfg.log_pg_sz = 0;
1316                 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
1317                 if (err)
1318                         mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
1319
1320                 err = mlx4_dev_cap(dev, &dev_cap);
1321                 if (err) {
1322                         mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
1323                         goto err_stop_fw;
1324                 }
1325
1326                 if (mlx4_is_master(dev))
1327                         mlx4_parav_master_pf_caps(dev);
1328
1329                 priv->fs_hash_mode = MLX4_FS_L2_HASH;
1330
1331                 switch (priv->fs_hash_mode) {
1332                 case MLX4_FS_L2_HASH:
1333                         init_hca.fs_hash_enable_bits = 0;
1334                         break;
1335
1336                 case MLX4_FS_L2_L3_L4_HASH:
1337                         /* Enable flow steering with
1338                          * udp unicast and tcp unicast
1339                          */
1340                         init_hca.fs_hash_enable_bits =
1341                                 MLX4_FS_UDP_UC_EN | MLX4_FS_TCP_UC_EN;
1342                         break;
1343                 }
1344
1345                 profile = default_profile;
1346                 if (dev->caps.steering_mode ==
1347                     MLX4_STEERING_MODE_DEVICE_MANAGED)
1348                         profile.num_mcg = MLX4_FS_NUM_MCG;
1349
1350                 icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
1351                                              &init_hca);
1352                 if ((long long) icm_size < 0) {
1353                         err = icm_size;
1354                         goto err_stop_fw;
1355                 }
1356
1357                 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1;
1358
1359                 init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
1360                 init_hca.uar_page_sz = PAGE_SHIFT - 12;
1361
1362                 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
1363                 if (err)
1364                         goto err_stop_fw;
1365
1366                 err = mlx4_INIT_HCA(dev, &init_hca);
1367                 if (err) {
1368                         mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
1369                         goto err_free_icm;
1370                 }
1371         } else {
1372                 err = mlx4_init_slave(dev);
1373                 if (err) {
1374                         mlx4_err(dev, "Failed to initialize slave\n");
1375                         return err;
1376                 }
1377
1378                 err = mlx4_slave_cap(dev);
1379                 if (err) {
1380                         mlx4_err(dev, "Failed to obtain slave caps\n");
1381                         goto err_close;
1382                 }
1383         }
1384
1385         if (map_bf_area(dev))
1386                 mlx4_dbg(dev, "Failed to map blue flame area\n");
1387
1388         /*Only the master set the ports, all the rest got it from it.*/
1389         if (!mlx4_is_slave(dev))
1390                 mlx4_set_port_mask(dev);
1391
1392         err = mlx4_QUERY_ADAPTER(dev, &adapter);
1393         if (err) {
1394                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
1395                 goto unmap_bf;
1396         }
1397
1398         priv->eq_table.inta_pin = adapter.inta_pin;
1399         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
1400
1401         return 0;
1402
1403 unmap_bf:
1404         unmap_bf_area(dev);
1405
1406 err_close:
1407         mlx4_close_hca(dev);
1408
1409 err_free_icm:
1410         if (!mlx4_is_slave(dev))
1411                 mlx4_free_icms(dev);
1412
1413 err_stop_fw:
1414         if (!mlx4_is_slave(dev)) {
1415                 mlx4_UNMAP_FA(dev);
1416                 mlx4_free_icm(dev, priv->fw.fw_icm, 0);
1417         }
1418         return err;
1419 }
1420
1421 static int mlx4_init_counters_table(struct mlx4_dev *dev)
1422 {
1423         struct mlx4_priv *priv = mlx4_priv(dev);
1424         int nent;
1425
1426         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1427                 return -ENOENT;
1428
1429         nent = dev->caps.max_counters;
1430         return mlx4_bitmap_init(&priv->counters_bitmap, nent, nent - 1, 0, 0);
1431 }
1432
1433 static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)
1434 {
1435         mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap);
1436 }
1437
1438 int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1439 {
1440         struct mlx4_priv *priv = mlx4_priv(dev);
1441
1442         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1443                 return -ENOENT;
1444
1445         *idx = mlx4_bitmap_alloc(&priv->counters_bitmap);
1446         if (*idx == -1)
1447                 return -ENOMEM;
1448
1449         return 0;
1450 }
1451
1452 int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1453 {
1454         u64 out_param;
1455         int err;
1456
1457         if (mlx4_is_mfunc(dev)) {
1458                 err = mlx4_cmd_imm(dev, 0, &out_param, RES_COUNTER,
1459                                    RES_OP_RESERVE, MLX4_CMD_ALLOC_RES,
1460                                    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
1461                 if (!err)
1462                         *idx = get_param_l(&out_param);
1463
1464                 return err;
1465         }
1466         return __mlx4_counter_alloc(dev, idx);
1467 }
1468 EXPORT_SYMBOL_GPL(mlx4_counter_alloc);
1469
1470 void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1471 {
1472         mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx);
1473         return;
1474 }
1475
1476 void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1477 {
1478         u64 in_param;
1479
1480         if (mlx4_is_mfunc(dev)) {
1481                 set_param_l(&in_param, idx);
1482                 mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE,
1483                          MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
1484                          MLX4_CMD_WRAPPED);
1485                 return;
1486         }
1487         __mlx4_counter_free(dev, idx);
1488 }
1489 EXPORT_SYMBOL_GPL(mlx4_counter_free);
1490
1491 static int mlx4_setup_hca(struct mlx4_dev *dev)
1492 {
1493         struct mlx4_priv *priv = mlx4_priv(dev);
1494         int err;
1495         int port;
1496         __be32 ib_port_default_caps;
1497
1498         err = mlx4_init_uar_table(dev);
1499         if (err) {
1500                 mlx4_err(dev, "Failed to initialize "
1501                          "user access region table, aborting.\n");
1502                 return err;
1503         }
1504
1505         err = mlx4_uar_alloc(dev, &priv->driver_uar);
1506         if (err) {
1507                 mlx4_err(dev, "Failed to allocate driver access region, "
1508                          "aborting.\n");
1509                 goto err_uar_table_free;
1510         }
1511
1512         priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
1513         if (!priv->kar) {
1514                 mlx4_err(dev, "Couldn't map kernel access region, "
1515                          "aborting.\n");
1516                 err = -ENOMEM;
1517                 goto err_uar_free;
1518         }
1519
1520         err = mlx4_init_pd_table(dev);
1521         if (err) {
1522                 mlx4_err(dev, "Failed to initialize "
1523                          "protection domain table, aborting.\n");
1524                 goto err_kar_unmap;
1525         }
1526
1527         err = mlx4_init_xrcd_table(dev);
1528         if (err) {
1529                 mlx4_err(dev, "Failed to initialize "
1530                          "reliable connection domain table, aborting.\n");
1531                 goto err_pd_table_free;
1532         }
1533
1534         err = mlx4_init_mr_table(dev);
1535         if (err) {
1536                 mlx4_err(dev, "Failed to initialize "
1537                          "memory region table, aborting.\n");
1538                 goto err_xrcd_table_free;
1539         }
1540
1541         err = mlx4_init_eq_table(dev);
1542         if (err) {
1543                 mlx4_err(dev, "Failed to initialize "
1544                          "event queue table, aborting.\n");
1545                 goto err_mr_table_free;
1546         }
1547
1548         err = mlx4_cmd_use_events(dev);
1549         if (err) {
1550                 mlx4_err(dev, "Failed to switch to event-driven "
1551                          "firmware commands, aborting.\n");
1552                 goto err_eq_table_free;
1553         }
1554
1555         err = mlx4_NOP(dev);
1556         if (err) {
1557                 if (dev->flags & MLX4_FLAG_MSI_X) {
1558                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
1559                                   "interrupt IRQ %d).\n",
1560                                   priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1561                         mlx4_warn(dev, "Trying again without MSI-X.\n");
1562                 } else {
1563                         mlx4_err(dev, "NOP command failed to generate interrupt "
1564                                  "(IRQ %d), aborting.\n",
1565                                  priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1566                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
1567                 }
1568
1569                 goto err_cmd_poll;
1570         }
1571
1572         mlx4_dbg(dev, "NOP command IRQ test passed\n");
1573
1574         err = mlx4_init_cq_table(dev);
1575         if (err) {
1576                 mlx4_err(dev, "Failed to initialize "
1577                          "completion queue table, aborting.\n");
1578                 goto err_cmd_poll;
1579         }
1580
1581         err = mlx4_init_srq_table(dev);
1582         if (err) {
1583                 mlx4_err(dev, "Failed to initialize "
1584                          "shared receive queue table, aborting.\n");
1585                 goto err_cq_table_free;
1586         }
1587
1588         err = mlx4_init_qp_table(dev);
1589         if (err) {
1590                 mlx4_err(dev, "Failed to initialize "
1591                          "queue pair table, aborting.\n");
1592                 goto err_srq_table_free;
1593         }
1594
1595         if (!mlx4_is_slave(dev)) {
1596                 err = mlx4_init_mcg_table(dev);
1597                 if (err) {
1598                         mlx4_err(dev, "Failed to initialize "
1599                                  "multicast group table, aborting.\n");
1600                         goto err_qp_table_free;
1601                 }
1602         }
1603
1604         err = mlx4_init_counters_table(dev);
1605         if (err && err != -ENOENT) {
1606                 mlx4_err(dev, "Failed to initialize counters table, aborting.\n");
1607                 goto err_mcg_table_free;
1608         }
1609
1610         if (!mlx4_is_slave(dev)) {
1611                 for (port = 1; port <= dev->caps.num_ports; port++) {
1612                         ib_port_default_caps = 0;
1613                         err = mlx4_get_port_ib_caps(dev, port,
1614                                                     &ib_port_default_caps);
1615                         if (err)
1616                                 mlx4_warn(dev, "failed to get port %d default "
1617                                           "ib capabilities (%d). Continuing "
1618                                           "with caps = 0\n", port, err);
1619                         dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
1620
1621                         /* initialize per-slave default ib port capabilities */
1622                         if (mlx4_is_master(dev)) {
1623                                 int i;
1624                                 for (i = 0; i < dev->num_slaves; i++) {
1625                                         if (i == mlx4_master_func_num(dev))
1626                                                 continue;
1627                                         priv->mfunc.master.slave_state[i].ib_cap_mask[port] =
1628                                                         ib_port_default_caps;
1629                                 }
1630                         }
1631
1632                         if (mlx4_is_mfunc(dev))
1633                                 dev->caps.port_ib_mtu[port] = IB_MTU_2048;
1634                         else
1635                                 dev->caps.port_ib_mtu[port] = IB_MTU_4096;
1636
1637                         err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ?
1638                                             dev->caps.pkey_table_len[port] : -1);
1639                         if (err) {
1640                                 mlx4_err(dev, "Failed to set port %d, aborting\n",
1641                                         port);
1642                                 goto err_counters_table_free;
1643                         }
1644                 }
1645         }
1646
1647         return 0;
1648
1649 err_counters_table_free:
1650         mlx4_cleanup_counters_table(dev);
1651
1652 err_mcg_table_free:
1653         mlx4_cleanup_mcg_table(dev);
1654
1655 err_qp_table_free:
1656         mlx4_cleanup_qp_table(dev);
1657
1658 err_srq_table_free:
1659         mlx4_cleanup_srq_table(dev);
1660
1661 err_cq_table_free:
1662         mlx4_cleanup_cq_table(dev);
1663
1664 err_cmd_poll:
1665         mlx4_cmd_use_polling(dev);
1666
1667 err_eq_table_free:
1668         mlx4_cleanup_eq_table(dev);
1669
1670 err_mr_table_free:
1671         mlx4_cleanup_mr_table(dev);
1672
1673 err_xrcd_table_free:
1674         mlx4_cleanup_xrcd_table(dev);
1675
1676 err_pd_table_free:
1677         mlx4_cleanup_pd_table(dev);
1678
1679 err_kar_unmap:
1680         iounmap(priv->kar);
1681
1682 err_uar_free:
1683         mlx4_uar_free(dev, &priv->driver_uar);
1684
1685 err_uar_table_free:
1686         mlx4_cleanup_uar_table(dev);
1687         return err;
1688 }
1689
1690 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
1691 {
1692         struct mlx4_priv *priv = mlx4_priv(dev);
1693         struct msix_entry *entries;
1694         int nreq = min_t(int, dev->caps.num_ports *
1695                          min_t(int, netif_get_num_default_rss_queues() + 1,
1696                                MAX_MSIX_P_PORT) + MSIX_LEGACY_SZ, MAX_MSIX);
1697         int err;
1698         int i;
1699
1700         if (msi_x) {
1701                 /* In multifunction mode each function gets 2 msi-X vectors
1702                  * one for data path completions anf the other for asynch events
1703                  * or command completions */
1704                 if (mlx4_is_mfunc(dev)) {
1705                         nreq = 2;
1706                 } else {
1707                         nreq = min_t(int, dev->caps.num_eqs -
1708                                      dev->caps.reserved_eqs, nreq);
1709                 }
1710
1711                 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1712                 if (!entries)
1713                         goto no_msi;
1714
1715                 for (i = 0; i < nreq; ++i)
1716                         entries[i].entry = i;
1717
1718         retry:
1719                 err = pci_enable_msix(dev->pdev, entries, nreq);
1720                 if (err) {
1721                         /* Try again if at least 2 vectors are available */
1722                         if (err > 1) {
1723                                 mlx4_info(dev, "Requested %d vectors, "
1724                                           "but only %d MSI-X vectors available, "
1725                                           "trying again\n", nreq, err);
1726                                 nreq = err;
1727                                 goto retry;
1728                         }
1729                         kfree(entries);
1730                         goto no_msi;
1731                 }
1732
1733                 if (nreq <
1734                     MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) {
1735                         /*Working in legacy mode , all EQ's shared*/
1736                         dev->caps.comp_pool           = 0;
1737                         dev->caps.num_comp_vectors = nreq - 1;
1738                 } else {
1739                         dev->caps.comp_pool           = nreq - MSIX_LEGACY_SZ;
1740                         dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1;
1741                 }
1742                 for (i = 0; i < nreq; ++i)
1743                         priv->eq_table.eq[i].irq = entries[i].vector;
1744
1745                 dev->flags |= MLX4_FLAG_MSI_X;
1746
1747                 kfree(entries);
1748                 return;
1749         }
1750
1751 no_msi:
1752         dev->caps.num_comp_vectors = 1;
1753         dev->caps.comp_pool        = 0;
1754
1755         for (i = 0; i < 2; ++i)
1756                 priv->eq_table.eq[i].irq = dev->pdev->irq;
1757 }
1758
1759 static int mlx4_init_port_info(struct mlx4_dev *dev, int port)
1760 {
1761         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
1762         int err = 0;
1763
1764         info->dev = dev;
1765         info->port = port;
1766         if (!mlx4_is_slave(dev)) {
1767                 INIT_RADIX_TREE(&info->mac_tree, GFP_KERNEL);
1768                 mlx4_init_mac_table(dev, &info->mac_table);
1769                 mlx4_init_vlan_table(dev, &info->vlan_table);
1770                 info->base_qpn =
1771                         dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
1772                         (port - 1) * (1 << log_num_mac);
1773         }
1774
1775         sprintf(info->dev_name, "mlx4_port%d", port);
1776         info->port_attr.attr.name = info->dev_name;
1777         if (mlx4_is_mfunc(dev))
1778                 info->port_attr.attr.mode = S_IRUGO;
1779         else {
1780                 info->port_attr.attr.mode = S_IRUGO | S_IWUSR;
1781                 info->port_attr.store     = set_port_type;
1782         }
1783         info->port_attr.show      = show_port_type;
1784         sysfs_attr_init(&info->port_attr.attr);
1785
1786         err = device_create_file(&dev->pdev->dev, &info->port_attr);
1787         if (err) {
1788                 mlx4_err(dev, "Failed to create file for port %d\n", port);
1789                 info->port = -1;
1790         }
1791
1792         sprintf(info->dev_mtu_name, "mlx4_port%d_mtu", port);
1793         info->port_mtu_attr.attr.name = info->dev_mtu_name;
1794         if (mlx4_is_mfunc(dev))
1795                 info->port_mtu_attr.attr.mode = S_IRUGO;
1796         else {
1797                 info->port_mtu_attr.attr.mode = S_IRUGO | S_IWUSR;
1798                 info->port_mtu_attr.store     = set_port_ib_mtu;
1799         }
1800         info->port_mtu_attr.show      = show_port_ib_mtu;
1801         sysfs_attr_init(&info->port_mtu_attr.attr);
1802
1803         err = device_create_file(&dev->pdev->dev, &info->port_mtu_attr);
1804         if (err) {
1805                 mlx4_err(dev, "Failed to create mtu file for port %d\n", port);
1806                 device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1807                 info->port = -1;
1808         }
1809
1810         return err;
1811 }
1812
1813 static void mlx4_cleanup_port_info(struct mlx4_port_info *info)
1814 {
1815         if (info->port < 0)
1816                 return;
1817
1818         device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1819         device_remove_file(&info->dev->pdev->dev, &info->port_mtu_attr);
1820 }
1821
1822 static int mlx4_init_steering(struct mlx4_dev *dev)
1823 {
1824         struct mlx4_priv *priv = mlx4_priv(dev);
1825         int num_entries = dev->caps.num_ports;
1826         int i, j;
1827
1828         priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL);
1829         if (!priv->steer)
1830                 return -ENOMEM;
1831
1832         for (i = 0; i < num_entries; i++)
1833                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1834                         INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]);
1835                         INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]);
1836                 }
1837         return 0;
1838 }
1839
1840 static void mlx4_clear_steering(struct mlx4_dev *dev)
1841 {
1842         struct mlx4_priv *priv = mlx4_priv(dev);
1843         struct mlx4_steer_index *entry, *tmp_entry;
1844         struct mlx4_promisc_qp *pqp, *tmp_pqp;
1845         int num_entries = dev->caps.num_ports;
1846         int i, j;
1847
1848         for (i = 0; i < num_entries; i++) {
1849                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1850                         list_for_each_entry_safe(pqp, tmp_pqp,
1851                                                  &priv->steer[i].promisc_qps[j],
1852                                                  list) {
1853                                 list_del(&pqp->list);
1854                                 kfree(pqp);
1855                         }
1856                         list_for_each_entry_safe(entry, tmp_entry,
1857                                                  &priv->steer[i].steer_entries[j],
1858                                                  list) {
1859                                 list_del(&entry->list);
1860                                 list_for_each_entry_safe(pqp, tmp_pqp,
1861                                                          &entry->duplicates,
1862                                                          list) {
1863                                         list_del(&pqp->list);
1864                                         kfree(pqp);
1865                                 }
1866                                 kfree(entry);
1867                         }
1868                 }
1869         }
1870         kfree(priv->steer);
1871 }
1872
1873 static int extended_func_num(struct pci_dev *pdev)
1874 {
1875         return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn);
1876 }
1877
1878 #define MLX4_OWNER_BASE 0x8069c
1879 #define MLX4_OWNER_SIZE 4
1880
1881 static int mlx4_get_ownership(struct mlx4_dev *dev)
1882 {
1883         void __iomem *owner;
1884         u32 ret;
1885
1886         if (pci_channel_offline(dev->pdev))
1887                 return -EIO;
1888
1889         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1890                         MLX4_OWNER_SIZE);
1891         if (!owner) {
1892                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1893                 return -ENOMEM;
1894         }
1895
1896         ret = readl(owner);
1897         iounmap(owner);
1898         return (int) !!ret;
1899 }
1900
1901 static void mlx4_free_ownership(struct mlx4_dev *dev)
1902 {
1903         void __iomem *owner;
1904
1905         if (pci_channel_offline(dev->pdev))
1906                 return;
1907
1908         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1909                         MLX4_OWNER_SIZE);
1910         if (!owner) {
1911                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1912                 return;
1913         }
1914         writel(0, owner);
1915         msleep(1000);
1916         iounmap(owner);
1917 }
1918
1919 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1920 {
1921         struct mlx4_priv *priv;
1922         struct mlx4_dev *dev;
1923         int err;
1924         int port;
1925
1926         pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
1927
1928         err = pci_enable_device(pdev);
1929         if (err) {
1930                 dev_err(&pdev->dev, "Cannot enable PCI device, "
1931                         "aborting.\n");
1932                 return err;
1933         }
1934         if (num_vfs > MLX4_MAX_NUM_VF) {
1935                 printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n",
1936                        num_vfs, MLX4_MAX_NUM_VF);
1937                 return -EINVAL;
1938         }
1939         /*
1940          * Check for BARs.
1941          */
1942         if (((id == NULL) || !(id->driver_data & MLX4_VF)) &&
1943             !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1944                 dev_err(&pdev->dev, "Missing DCS, aborting."
1945                         "(id == 0X%p, id->driver_data: 0x%lx,"
1946                         " pci_resource_flags(pdev, 0):0x%lx)\n", id,
1947                         id ? id->driver_data : 0, pci_resource_flags(pdev, 0));
1948                 err = -ENODEV;
1949                 goto err_disable_pdev;
1950         }
1951         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1952                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1953                 err = -ENODEV;
1954                 goto err_disable_pdev;
1955         }
1956
1957         err = pci_request_regions(pdev, DRV_NAME);
1958         if (err) {
1959                 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
1960                 goto err_disable_pdev;
1961         }
1962
1963         pci_set_master(pdev);
1964
1965         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1966         if (err) {
1967                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1968                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1969                 if (err) {
1970                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1971                         goto err_release_regions;
1972                 }
1973         }
1974         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1975         if (err) {
1976                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1977                          "consistent PCI DMA mask.\n");
1978                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1979                 if (err) {
1980                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1981                                 "aborting.\n");
1982                         goto err_release_regions;
1983                 }
1984         }
1985
1986         /* Allow large DMA segments, up to the firmware limit of 1 GB */
1987         dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
1988
1989         priv = kzalloc(sizeof *priv, GFP_KERNEL);
1990         if (!priv) {
1991                 dev_err(&pdev->dev, "Device struct alloc failed, "
1992                         "aborting.\n");
1993                 err = -ENOMEM;
1994                 goto err_release_regions;
1995         }
1996
1997         dev       = &priv->dev;
1998         dev->pdev = pdev;
1999         INIT_LIST_HEAD(&priv->ctx_list);
2000         spin_lock_init(&priv->ctx_lock);
2001
2002         mutex_init(&priv->port_mutex);
2003
2004         INIT_LIST_HEAD(&priv->pgdir_list);
2005         mutex_init(&priv->pgdir_mutex);
2006
2007         INIT_LIST_HEAD(&priv->bf_list);
2008         mutex_init(&priv->bf_mutex);
2009
2010         dev->rev_id = pdev->revision;
2011         /* Detect if this device is a virtual function */
2012         if (id && id->driver_data & MLX4_VF) {
2013                 /* When acting as pf, we normally skip vfs unless explicitly
2014                  * requested to probe them. */
2015                 if (num_vfs && extended_func_num(pdev) > probe_vf) {
2016                         mlx4_warn(dev, "Skipping virtual function:%d\n",
2017                                                 extended_func_num(pdev));
2018                         err = -ENODEV;
2019                         goto err_free_dev;
2020                 }
2021                 mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
2022                 dev->flags |= MLX4_FLAG_SLAVE;
2023         } else {
2024                 /* We reset the device and enable SRIOV only for physical
2025                  * devices.  Try to claim ownership on the device;
2026                  * if already taken, skip -- do not allow multiple PFs */
2027                 err = mlx4_get_ownership(dev);
2028                 if (err) {
2029                         if (err < 0)
2030                                 goto err_free_dev;
2031                         else {
2032                                 mlx4_warn(dev, "Multiple PFs not yet supported."
2033                                           " Skipping PF.\n");
2034                                 err = -EINVAL;
2035                                 goto err_free_dev;
2036                         }
2037                 }
2038
2039                 if (num_vfs) {
2040                         mlx4_warn(dev, "Enabling SR-IOV with %d VFs\n", num_vfs);
2041                         err = pci_enable_sriov(pdev, num_vfs);
2042                         if (err) {
2043                                 mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d).\n",
2044                                          err);
2045                                 err = 0;
2046                         } else {
2047                                 mlx4_warn(dev, "Running in master mode\n");
2048                                 dev->flags |= MLX4_FLAG_SRIOV |
2049                                               MLX4_FLAG_MASTER;
2050                                 dev->num_vfs = num_vfs;
2051                         }
2052                 }
2053
2054                 /*
2055                  * Now reset the HCA before we touch the PCI capabilities or
2056                  * attempt a firmware command, since a boot ROM may have left
2057                  * the HCA in an undefined state.
2058                  */
2059                 err = mlx4_reset(dev);
2060                 if (err) {
2061                         mlx4_err(dev, "Failed to reset HCA, aborting.\n");
2062                         goto err_rel_own;
2063                 }
2064         }
2065
2066 slave_start:
2067         err = mlx4_cmd_init(dev);
2068         if (err) {
2069                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
2070                 goto err_sriov;
2071         }
2072
2073         /* In slave functions, the communication channel must be initialized
2074          * before posting commands. Also, init num_slaves before calling
2075          * mlx4_init_hca */
2076         if (mlx4_is_mfunc(dev)) {
2077                 if (mlx4_is_master(dev))
2078                         dev->num_slaves = MLX4_MAX_NUM_SLAVES;
2079                 else {
2080                         dev->num_slaves = 0;
2081                         if (mlx4_multi_func_init(dev)) {
2082                                 mlx4_err(dev, "Failed to init slave mfunc"
2083                                          " interface, aborting.\n");
2084                                 goto err_cmd;
2085                         }
2086                 }
2087         }
2088
2089         err = mlx4_init_hca(dev);
2090         if (err) {
2091                 if (err == -EACCES) {
2092                         /* Not primary Physical function
2093                          * Running in slave mode */
2094                         mlx4_cmd_cleanup(dev);
2095                         dev->flags |= MLX4_FLAG_SLAVE;
2096                         dev->flags &= ~MLX4_FLAG_MASTER;
2097                         goto slave_start;
2098                 } else
2099                         goto err_mfunc;
2100         }
2101
2102         /* In master functions, the communication channel must be initialized
2103          * after obtaining its address from fw */
2104         if (mlx4_is_master(dev)) {
2105                 if (mlx4_multi_func_init(dev)) {
2106                         mlx4_err(dev, "Failed to init master mfunc"
2107                                  "interface, aborting.\n");
2108                         goto err_close;
2109                 }
2110         }
2111
2112         err = mlx4_alloc_eq_table(dev);
2113         if (err)
2114                 goto err_master_mfunc;
2115
2116         priv->msix_ctl.pool_bm = 0;
2117         mutex_init(&priv->msix_ctl.pool_lock);
2118
2119         mlx4_enable_msi_x(dev);
2120         if ((mlx4_is_mfunc(dev)) &&
2121             !(dev->flags & MLX4_FLAG_MSI_X)) {
2122                 mlx4_err(dev, "INTx is not supported in multi-function mode."
2123                          " aborting.\n");
2124                 goto err_free_eq;
2125         }
2126
2127         if (!mlx4_is_slave(dev)) {
2128                 err = mlx4_init_steering(dev);
2129                 if (err)
2130                         goto err_free_eq;
2131         }
2132
2133         err = mlx4_setup_hca(dev);
2134         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
2135             !mlx4_is_mfunc(dev)) {
2136                 dev->flags &= ~MLX4_FLAG_MSI_X;
2137                 dev->caps.num_comp_vectors = 1;
2138                 dev->caps.comp_pool        = 0;
2139                 pci_disable_msix(pdev);
2140                 err = mlx4_setup_hca(dev);
2141         }
2142
2143         if (err)
2144                 goto err_steer;
2145
2146         for (port = 1; port <= dev->caps.num_ports; port++) {
2147                 err = mlx4_init_port_info(dev, port);
2148                 if (err)
2149                         goto err_port;
2150         }
2151
2152         err = mlx4_register_device(dev);
2153         if (err)
2154                 goto err_port;
2155
2156         mlx4_sense_init(dev);
2157         mlx4_start_sense(dev);
2158
2159         pci_set_drvdata(pdev, dev);
2160
2161         return 0;
2162
2163 err_port:
2164         for (--port; port >= 1; --port)
2165                 mlx4_cleanup_port_info(&priv->port[port]);
2166
2167         mlx4_cleanup_counters_table(dev);
2168         mlx4_cleanup_mcg_table(dev);
2169         mlx4_cleanup_qp_table(dev);
2170         mlx4_cleanup_srq_table(dev);
2171         mlx4_cleanup_cq_table(dev);
2172         mlx4_cmd_use_polling(dev);
2173         mlx4_cleanup_eq_table(dev);
2174         mlx4_cleanup_mr_table(dev);
2175         mlx4_cleanup_xrcd_table(dev);
2176         mlx4_cleanup_pd_table(dev);
2177         mlx4_cleanup_uar_table(dev);
2178
2179 err_steer:
2180         if (!mlx4_is_slave(dev))
2181                 mlx4_clear_steering(dev);
2182
2183 err_free_eq:
2184         mlx4_free_eq_table(dev);
2185
2186 err_master_mfunc:
2187         if (mlx4_is_master(dev))
2188                 mlx4_multi_func_cleanup(dev);
2189
2190 err_close:
2191         if (dev->flags & MLX4_FLAG_MSI_X)
2192                 pci_disable_msix(pdev);
2193
2194         mlx4_close_hca(dev);
2195
2196 err_mfunc:
2197         if (mlx4_is_slave(dev))
2198                 mlx4_multi_func_cleanup(dev);
2199
2200 err_cmd:
2201         mlx4_cmd_cleanup(dev);
2202
2203 err_sriov:
2204         if (dev->flags & MLX4_FLAG_SRIOV)
2205                 pci_disable_sriov(pdev);
2206
2207 err_rel_own:
2208         if (!mlx4_is_slave(dev))
2209                 mlx4_free_ownership(dev);
2210
2211 err_free_dev:
2212         kfree(priv);
2213
2214 err_release_regions:
2215         pci_release_regions(pdev);
2216
2217 err_disable_pdev:
2218         pci_disable_device(pdev);
2219         pci_set_drvdata(pdev, NULL);
2220         return err;
2221 }
2222
2223 static int __devinit mlx4_init_one(struct pci_dev *pdev,
2224                                    const struct pci_device_id *id)
2225 {
2226         printk_once(KERN_INFO "%s", mlx4_version);
2227
2228         return __mlx4_init_one(pdev, id);
2229 }
2230
2231 static void mlx4_remove_one(struct pci_dev *pdev)
2232 {
2233         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
2234         struct mlx4_priv *priv = mlx4_priv(dev);
2235         int p;
2236
2237         if (dev) {
2238                 /* in SRIOV it is not allowed to unload the pf's
2239                  * driver while there are alive vf's */
2240                 if (mlx4_is_master(dev)) {
2241                         if (mlx4_how_many_lives_vf(dev))
2242                                 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
2243                 }
2244                 mlx4_stop_sense(dev);
2245                 mlx4_unregister_device(dev);
2246
2247                 for (p = 1; p <= dev->caps.num_ports; p++) {
2248                         mlx4_cleanup_port_info(&priv->port[p]);
2249                         mlx4_CLOSE_PORT(dev, p);
2250                 }
2251
2252                 if (mlx4_is_master(dev))
2253                         mlx4_free_resource_tracker(dev,
2254                                                    RES_TR_FREE_SLAVES_ONLY);
2255
2256                 mlx4_cleanup_counters_table(dev);
2257                 mlx4_cleanup_mcg_table(dev);
2258                 mlx4_cleanup_qp_table(dev);
2259                 mlx4_cleanup_srq_table(dev);
2260                 mlx4_cleanup_cq_table(dev);
2261                 mlx4_cmd_use_polling(dev);
2262                 mlx4_cleanup_eq_table(dev);
2263                 mlx4_cleanup_mr_table(dev);
2264                 mlx4_cleanup_xrcd_table(dev);
2265                 mlx4_cleanup_pd_table(dev);
2266
2267                 if (mlx4_is_master(dev))
2268                         mlx4_free_resource_tracker(dev,
2269                                                    RES_TR_FREE_STRUCTS_ONLY);
2270
2271                 iounmap(priv->kar);
2272                 mlx4_uar_free(dev, &priv->driver_uar);
2273                 mlx4_cleanup_uar_table(dev);
2274                 if (!mlx4_is_slave(dev))
2275                         mlx4_clear_steering(dev);
2276                 mlx4_free_eq_table(dev);
2277                 if (mlx4_is_master(dev))
2278                         mlx4_multi_func_cleanup(dev);
2279                 mlx4_close_hca(dev);
2280                 if (mlx4_is_slave(dev))
2281                         mlx4_multi_func_cleanup(dev);
2282                 mlx4_cmd_cleanup(dev);
2283
2284                 if (dev->flags & MLX4_FLAG_MSI_X)
2285                         pci_disable_msix(pdev);
2286                 if (dev->flags & MLX4_FLAG_SRIOV) {
2287                         mlx4_warn(dev, "Disabling SR-IOV\n");
2288                         pci_disable_sriov(pdev);
2289                 }
2290
2291                 if (!mlx4_is_slave(dev))
2292                         mlx4_free_ownership(dev);
2293
2294                 kfree(dev->caps.qp0_tunnel);
2295                 kfree(dev->caps.qp0_proxy);
2296                 kfree(dev->caps.qp1_tunnel);
2297                 kfree(dev->caps.qp1_proxy);
2298
2299                 kfree(priv);
2300                 pci_release_regions(pdev);
2301                 pci_disable_device(pdev);
2302                 pci_set_drvdata(pdev, NULL);
2303         }
2304 }
2305
2306 int mlx4_restart_one(struct pci_dev *pdev)
2307 {
2308         mlx4_remove_one(pdev);
2309         return __mlx4_init_one(pdev, NULL);
2310 }
2311
2312 static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
2313         /* MT25408 "Hermon" SDR */
2314         { PCI_VDEVICE(MELLANOX, 0x6340), 0 },
2315         /* MT25408 "Hermon" DDR */
2316         { PCI_VDEVICE(MELLANOX, 0x634a), 0 },
2317         /* MT25408 "Hermon" QDR */
2318         { PCI_VDEVICE(MELLANOX, 0x6354), 0 },
2319         /* MT25408 "Hermon" DDR PCIe gen2 */
2320         { PCI_VDEVICE(MELLANOX, 0x6732), 0 },
2321         /* MT25408 "Hermon" QDR PCIe gen2 */
2322         { PCI_VDEVICE(MELLANOX, 0x673c), 0 },
2323         /* MT25408 "Hermon" EN 10GigE */
2324         { PCI_VDEVICE(MELLANOX, 0x6368), 0 },
2325         /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2326         { PCI_VDEVICE(MELLANOX, 0x6750), 0 },
2327         /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2328         { PCI_VDEVICE(MELLANOX, 0x6372), 0 },
2329         /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2330         { PCI_VDEVICE(MELLANOX, 0x675a), 0 },
2331         /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2332         { PCI_VDEVICE(MELLANOX, 0x6764), 0 },
2333         /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2334         { PCI_VDEVICE(MELLANOX, 0x6746), 0 },
2335         /* MT26478 ConnectX2 40GigE PCIe gen2 */
2336         { PCI_VDEVICE(MELLANOX, 0x676e), 0 },
2337         /* MT25400 Family [ConnectX-2 Virtual Function] */
2338         { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_VF },
2339         /* MT27500 Family [ConnectX-3] */
2340         { PCI_VDEVICE(MELLANOX, 0x1003), 0 },
2341         /* MT27500 Family [ConnectX-3 Virtual Function] */
2342         { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_VF },
2343         { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */
2344         { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */
2345         { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */
2346         { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */
2347         { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */
2348         { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */
2349         { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */
2350         { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */
2351         { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */
2352         { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */
2353         { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */
2354         { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */
2355         { 0, }
2356 };
2357
2358 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
2359
2360 static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev,
2361                                               pci_channel_state_t state)
2362 {
2363         mlx4_remove_one(pdev);
2364
2365         return state == pci_channel_io_perm_failure ?
2366                 PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET;
2367 }
2368
2369 static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev)
2370 {
2371         int ret = __mlx4_init_one(pdev, NULL);
2372
2373         return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
2374 }
2375
2376 static struct pci_error_handlers mlx4_err_handler = {
2377         .error_detected = mlx4_pci_err_detected,
2378         .slot_reset     = mlx4_pci_slot_reset,
2379 };
2380
2381 static struct pci_driver mlx4_driver = {
2382         .name           = DRV_NAME,
2383         .id_table       = mlx4_pci_table,
2384         .probe          = mlx4_init_one,
2385         .remove         = __devexit_p(mlx4_remove_one),
2386         .err_handler    = &mlx4_err_handler,
2387 };
2388
2389 static int __init mlx4_verify_params(void)
2390 {
2391         if ((log_num_mac < 0) || (log_num_mac > 7)) {
2392                 pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac);
2393                 return -1;
2394         }
2395
2396         if (log_num_vlan != 0)
2397                 pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n",
2398                            MLX4_LOG_NUM_VLANS);
2399
2400         if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) {
2401                 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg);
2402                 return -1;
2403         }
2404
2405         /* Check if module param for ports type has legal combination */
2406         if (port_type_array[0] == false && port_type_array[1] == true) {
2407                 printk(KERN_WARNING "Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n");
2408                 port_type_array[0] = true;
2409         }
2410
2411         return 0;
2412 }
2413
2414 static int __init mlx4_init(void)
2415 {
2416         int ret;
2417
2418         if (mlx4_verify_params())
2419                 return -EINVAL;
2420
2421         mlx4_catas_init();
2422
2423         mlx4_wq = create_singlethread_workqueue("mlx4");
2424         if (!mlx4_wq)
2425                 return -ENOMEM;
2426
2427         ret = pci_register_driver(&mlx4_driver);
2428         return ret < 0 ? ret : 0;
2429 }
2430
2431 static void __exit mlx4_cleanup(void)
2432 {
2433         pci_unregister_driver(&mlx4_driver);
2434         destroy_workqueue(mlx4_wq);
2435 }
2436
2437 module_init(mlx4_init);
2438 module_exit(mlx4_cleanup);