drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/bpf.h>
  53 #include <linux/bpf_trace.h>
  54 #include <linux/atomic.h>
  55 #include <scsi/fc/fc_fcoe.h>
  56 #include <net/udp_tunnel.h>
  57 #include <net/pkt_cls.h>
  58 #include <net/tc_act/tc_gact.h>
  59 #include <net/tc_act/tc_mirred.h>
  60 #include <net/vxlan.h>
  61 #include <net/mpls.h>
  62
  63 #include "ixgbe.h"
  64 #include "ixgbe_common.h"
  65 #include "ixgbe_dcb_82599.h"
  66 #include "ixgbe_sriov.h"
  67 #include "ixgbe_model.h"
  68
  69 char ixgbe_driver_name[] = "ixgbe";
  70 static const char ixgbe_driver_string[] =
  71                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  72 #ifdef IXGBE_FCOE
  73 char ixgbe_default_device_descr[] =
  74                               "Intel(R) 10 Gigabit Network Connection";
  75 #else
  76 static char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #endif
  79 #define DRV_VERSION "5.1.0-k"
  80 const char ixgbe_driver_version[] = DRV_VERSION;
  81 static const char ixgbe_copyright[] =
  82                                 "Copyright (c) 1999-2016 Intel Corporation.";
  83
  84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  85
  86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  87         [board_82598]           = &ixgbe_82598_info,
  88         [board_82599]           = &ixgbe_82599_info,
  89         [board_X540]            = &ixgbe_X540_info,
  90         [board_X550]            = &ixgbe_X550_info,
  91         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  92         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  93         [board_x550em_a]        = &ixgbe_x550em_a_info,
  94         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 146         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 147         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 148         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 149         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 150         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 151         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 152         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 153         /* required last entry */
 154         {0, }
 155 };
 156 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 157
 158 #ifdef CONFIG_IXGBE_DCA
 159 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 160                             void *p);
 161 static struct notifier_block dca_notifier = {
 162         .notifier_call = ixgbe_notify_dca,
 163         .next          = NULL,
 164         .priority      = 0
 165 };
 166 #endif
 167
 168 #ifdef CONFIG_PCI_IOV
 169 static unsigned int max_vfs;
 170 module_param(max_vfs, uint, 0);
 171 MODULE_PARM_DESC(max_vfs,
 172                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 173 #endif /* CONFIG_PCI_IOV */
 174
 175 static unsigned int allow_unsupported_sfp;
 176 module_param(allow_unsupported_sfp, uint, 0);
 177 MODULE_PARM_DESC(allow_unsupported_sfp,
 178                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 179
 180 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 181 static int debug = -1;
 182 module_param(debug, int, 0);
 183 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 184
 185 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 186 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 187 MODULE_LICENSE("GPL");
 188 MODULE_VERSION(DRV_VERSION);
 189
 190 static struct workqueue_struct *ixgbe_wq;
 191
 192 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 193 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 194
 195 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 196                                           u32 reg, u16 *value)
 197 {
 198         struct pci_dev *parent_dev;
 199         struct pci_bus *parent_bus;
 200
 201         parent_bus = adapter->pdev->bus->parent;
 202         if (!parent_bus)
 203                 return -1;
 204
 205         parent_dev = parent_bus->self;
 206         if (!parent_dev)
 207                 return -1;
 208
 209         if (!pci_is_pcie(parent_dev))
 210                 return -1;
 211
 212         pcie_capability_read_word(parent_dev, reg, value);
 213         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 214             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 215                 return -1;
 216         return 0;
 217 }
 218
 219 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 220 {
 221         struct ixgbe_hw *hw = &adapter->hw;
 222         u16 link_status = 0;
 223         int err;
 224
 225         hw->bus.type = ixgbe_bus_type_pci_express;
 226
 227         /* Get the negotiated link width and speed from PCI config space of the
 228          * parent, as this device is behind a switch
 229          */
 230         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 231
 232         /* assume caller will handle error case */
 233         if (err)
 234                 return err;
 235
 236         hw->bus.width = ixgbe_convert_bus_width(link_status);
 237         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 238
 239         return 0;
 240 }
 241
 242 /**
 243  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 244  * @hw: hw specific details
 245  *
 246  * This function is used by probe to determine whether a device's PCI-Express
 247  * bandwidth details should be gathered from the parent bus instead of from the
 248  * device. Used to ensure that various locations all have the correct device ID
 249  * checks.
 250  */
 251 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 252 {
 253         switch (hw->device_id) {
 254         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 255         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 256                 return true;
 257         default:
 258                 return false;
 259         }
 260 }
 261
 262 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 263                                      int expected_gts)
 264 {
 265         struct ixgbe_hw *hw = &adapter->hw;
 266         int max_gts = 0;
 267         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 268         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 269         struct pci_dev *pdev;
 270
 271         /* Some devices are not connected over PCIe and thus do not negotiate
 272          * speed. These devices do not have valid bus info, and thus any report
 273          * we generate may not be correct.
 274          */
 275         if (hw->bus.type == ixgbe_bus_type_internal)
 276                 return;
 277
 278         /* determine whether to use the parent device */
 279         if (ixgbe_pcie_from_parent(&adapter->hw))
 280                 pdev = adapter->pdev->bus->parent->self;
 281         else
 282                 pdev = adapter->pdev;
 283
 284         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 285             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 286                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 287                 return;
 288         }
 289
 290         switch (speed) {
 291         case PCIE_SPEED_2_5GT:
 292                 /* 8b/10b encoding reduces max throughput by 20% */
 293                 max_gts = 2 * width;
 294                 break;
 295         case PCIE_SPEED_5_0GT:
 296                 /* 8b/10b encoding reduces max throughput by 20% */
 297                 max_gts = 4 * width;
 298                 break;
 299         case PCIE_SPEED_8_0GT:
 300                 /* 128b/130b encoding reduces throughput by less than 2% */
 301                 max_gts = 8 * width;
 302                 break;
 303         default:
 304                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 305                 return;
 306         }
 307
 308         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 309                    max_gts);
 310         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 311                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 312                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 313                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 314                     "Unknown"),
 315                    width,
 316                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 317                     speed == PCIE_SPEED_5_0GT ? "20%" :
 318                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 319                     "Unknown"));
 320
 321         if (max_gts < expected_gts) {
 322                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 323                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 324                         expected_gts);
 325                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 326         }
 327 }
 328
 329 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 330 {
 331         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 332             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 333             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 334                 queue_work(ixgbe_wq, &adapter->service_task);
 335 }
 336
 337 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 338 {
 339         struct ixgbe_adapter *adapter = hw->back;
 340
 341         if (!hw->hw_addr)
 342                 return;
 343         hw->hw_addr = NULL;
 344         e_dev_err("Adapter removed\n");
 345         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 346                 ixgbe_service_event_schedule(adapter);
 347 }
 348
 349 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 350 {
 351         u32 value;
 352
 353         /* The following check not only optimizes a bit by not
 354          * performing a read on the status register when the
 355          * register just read was a status register read that
 356          * returned IXGBE_FAILED_READ_REG. It also blocks any
 357          * potential recursion.
 358          */
 359         if (reg == IXGBE_STATUS) {
 360                 ixgbe_remove_adapter(hw);
 361                 return;
 362         }
 363         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 364         if (value == IXGBE_FAILED_READ_REG)
 365                 ixgbe_remove_adapter(hw);
 366 }
 367
 368 /**
 369  * ixgbe_read_reg - Read from device register
 370  * @hw: hw specific details
 371  * @reg: offset of register to read
 372  *
 373  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 374  *
 375  * This function is used to read device registers. It checks for device
 376  * removal by confirming any read that returns all ones by checking the
 377  * status register value for all ones. This function avoids reading from
 378  * the hardware if a removal was previously detected in which case it
 379  * returns IXGBE_FAILED_READ_REG (all ones).
 380  */
 381 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 382 {
 383         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 384         u32 value;
 385
 386         if (ixgbe_removed(reg_addr))
 387                 return IXGBE_FAILED_READ_REG;
 388         if (unlikely(hw->phy.nw_mng_if_sel &
 389                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 390                 struct ixgbe_adapter *adapter;
 391                 int i;
 392
 393                 for (i = 0; i < 200; ++i) {
 394                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 395                         if (likely(!value))
 396                                 goto writes_completed;
 397                         if (value == IXGBE_FAILED_READ_REG) {
 398                                 ixgbe_remove_adapter(hw);
 399                                 return IXGBE_FAILED_READ_REG;
 400                         }
 401                         udelay(5);
 402                 }
 403
 404                 adapter = hw->back;
 405                 e_warn(hw, "register writes incomplete %08x\n", value);
 406         }
 407
 408 writes_completed:
 409         value = readl(reg_addr + reg);
 410         if (unlikely(value == IXGBE_FAILED_READ_REG))
 411                 ixgbe_check_remove(hw, reg);
 412         return value;
 413 }
 414
 415 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 416 {
 417         u16 value;
 418
 419         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 420         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 421                 ixgbe_remove_adapter(hw);
 422                 return true;
 423         }
 424         return false;
 425 }
 426
 427 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 428 {
 429         struct ixgbe_adapter *adapter = hw->back;
 430         u16 value;
 431
 432         if (ixgbe_removed(hw->hw_addr))
 433                 return IXGBE_FAILED_READ_CFG_WORD;
 434         pci_read_config_word(adapter->pdev, reg, &value);
 435         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 436             ixgbe_check_cfg_remove(hw, adapter->pdev))
 437                 return IXGBE_FAILED_READ_CFG_WORD;
 438         return value;
 439 }
 440
 441 #ifdef CONFIG_PCI_IOV
 442 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 443 {
 444         struct ixgbe_adapter *adapter = hw->back;
 445         u32 value;
 446
 447         if (ixgbe_removed(hw->hw_addr))
 448                 return IXGBE_FAILED_READ_CFG_DWORD;
 449         pci_read_config_dword(adapter->pdev, reg, &value);
 450         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 451             ixgbe_check_cfg_remove(hw, adapter->pdev))
 452                 return IXGBE_FAILED_READ_CFG_DWORD;
 453         return value;
 454 }
 455 #endif /* CONFIG_PCI_IOV */
 456
 457 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 458 {
 459         struct ixgbe_adapter *adapter = hw->back;
 460
 461         if (ixgbe_removed(hw->hw_addr))
 462                 return;
 463         pci_write_config_word(adapter->pdev, reg, value);
 464 }
 465
 466 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 467 {
 468         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 469
 470         /* flush memory to make sure state is correct before next watchdog */
 471         smp_mb__before_atomic();
 472         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 473 }
 474
 475 struct ixgbe_reg_info {
 476         u32 ofs;
 477         char *name;
 478 };
 479
 480 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 481
 482         /* General Registers */
 483         {IXGBE_CTRL, "CTRL"},
 484         {IXGBE_STATUS, "STATUS"},
 485         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 486
 487         /* Interrupt Registers */
 488         {IXGBE_EICR, "EICR"},
 489
 490         /* RX Registers */
 491         {IXGBE_SRRCTL(0), "SRRCTL"},
 492         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 493         {IXGBE_RDLEN(0), "RDLEN"},
 494         {IXGBE_RDH(0), "RDH"},
 495         {IXGBE_RDT(0), "RDT"},
 496         {IXGBE_RXDCTL(0), "RXDCTL"},
 497         {IXGBE_RDBAL(0), "RDBAL"},
 498         {IXGBE_RDBAH(0), "RDBAH"},
 499
 500         /* TX Registers */
 501         {IXGBE_TDBAL(0), "TDBAL"},
 502         {IXGBE_TDBAH(0), "TDBAH"},
 503         {IXGBE_TDLEN(0), "TDLEN"},
 504         {IXGBE_TDH(0), "TDH"},
 505         {IXGBE_TDT(0), "TDT"},
 506         {IXGBE_TXDCTL(0), "TXDCTL"},
 507
 508         /* List Terminator */
 509         { .name = NULL }
 510 };
 511
 512
 513 /*
 514  * ixgbe_regdump - register printout routine
 515  */
 516 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 517 {
 518         int i;
 519         char rname[16];
 520         u32 regs[64];
 521
 522         switch (reginfo->ofs) {
 523         case IXGBE_SRRCTL(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 526                 break;
 527         case IXGBE_DCA_RXCTRL(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 530                 break;
 531         case IXGBE_RDLEN(0):
 532                 for (i = 0; i < 64; i++)
 533                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 534                 break;
 535         case IXGBE_RDH(0):
 536                 for (i = 0; i < 64; i++)
 537                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 538                 break;
 539         case IXGBE_RDT(0):
 540                 for (i = 0; i < 64; i++)
 541                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 542                 break;
 543         case IXGBE_RXDCTL(0):
 544                 for (i = 0; i < 64; i++)
 545                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 546                 break;
 547         case IXGBE_RDBAL(0):
 548                 for (i = 0; i < 64; i++)
 549                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 550                 break;
 551         case IXGBE_RDBAH(0):
 552                 for (i = 0; i < 64; i++)
 553                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 554                 break;
 555         case IXGBE_TDBAL(0):
 556                 for (i = 0; i < 64; i++)
 557                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 558                 break;
 559         case IXGBE_TDBAH(0):
 560                 for (i = 0; i < 64; i++)
 561                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 562                 break;
 563         case IXGBE_TDLEN(0):
 564                 for (i = 0; i < 64; i++)
 565                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 566                 break;
 567         case IXGBE_TDH(0):
 568                 for (i = 0; i < 64; i++)
 569                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 570                 break;
 571         case IXGBE_TDT(0):
 572                 for (i = 0; i < 64; i++)
 573                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 574                 break;
 575         case IXGBE_TXDCTL(0):
 576                 for (i = 0; i < 64; i++)
 577                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 578                 break;
 579         default:
 580                 pr_info("%-15s %08x\n",
 581                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 582                 return;
 583         }
 584
 585         i = 0;
 586         while (i < 64) {
 587                 int j;
 588                 char buf[9 * 8 + 1];
 589                 char *p = buf;
 590
 591                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 592                 for (j = 0; j < 8; j++)
 593                         p += sprintf(p, " %08x", regs[i++]);
 594                 pr_err("%-15s%s\n", rname, buf);
 595         }
 596
 597 }
 598
 599 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 600 {
 601         struct ixgbe_tx_buffer *tx_buffer;
 602
 603         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 604         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 605                 n, ring->next_to_use, ring->next_to_clean,
 606                 (u64)dma_unmap_addr(tx_buffer, dma),
 607                 dma_unmap_len(tx_buffer, len),
 608                 tx_buffer->next_to_watch,
 609                 (u64)tx_buffer->time_stamp);
 610 }
 611
 612 /*
 613  * ixgbe_dump - Print registers, tx-rings and rx-rings
 614  */
 615 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 616 {
 617         struct net_device *netdev = adapter->netdev;
 618         struct ixgbe_hw *hw = &adapter->hw;
 619         struct ixgbe_reg_info *reginfo;
 620         int n = 0;
 621         struct ixgbe_ring *ring;
 622         struct ixgbe_tx_buffer *tx_buffer;
 623         union ixgbe_adv_tx_desc *tx_desc;
 624         struct my_u0 { u64 a; u64 b; } *u0;
 625         struct ixgbe_ring *rx_ring;
 626         union ixgbe_adv_rx_desc *rx_desc;
 627         struct ixgbe_rx_buffer *rx_buffer_info;
 628         int i = 0;
 629
 630         if (!netif_msg_hw(adapter))
 631                 return;
 632
 633         /* Print netdevice Info */
 634         if (netdev) {
 635                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 636                 pr_info("Device Name     state            "
 637                         "trans_start\n");
 638                 pr_info("%-15s %016lX %016lX\n",
 639                         netdev->name,
 640                         netdev->state,
 641                         dev_trans_start(netdev));
 642         }
 643
 644         /* Print Registers */
 645         dev_info(&adapter->pdev->dev, "Register Dump\n");
 646         pr_info(" Register Name   Value\n");
 647         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 648              reginfo->name; reginfo++) {
 649                 ixgbe_regdump(hw, reginfo);
 650         }
 651
 652         /* Print TX Ring Summary */
 653         if (!netdev || !netif_running(netdev))
 654                 return;
 655
 656         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 657         pr_info(" %s     %s              %s        %s\n",
 658                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 659                 "leng", "ntw", "timestamp");
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 ring = adapter->tx_ring[n];
 662                 ixgbe_print_buffer(ring, n);
 663         }
 664
 665         for (n = 0; n < adapter->num_xdp_queues; n++) {
 666                 ring = adapter->xdp_ring[n];
 667                 ixgbe_print_buffer(ring, n);
 668         }
 669
 670         /* Print TX Rings */
 671         if (!netif_msg_tx_done(adapter))
 672                 goto rx_ring_summary;
 673
 674         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 675
 676         /* Transmit Descriptor Formats
 677          *
 678          * 82598 Advanced Transmit Descriptor
 679          *   +--------------------------------------------------------------+
 680          * 0 |         Buffer Address [63:0]                                |
 681          *   +--------------------------------------------------------------+
 682          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 683          *   +--------------------------------------------------------------+
 684          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 685          *
 686          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 687          *   +--------------------------------------------------------------+
 688          * 0 |                          RSV [63:0]                          |
 689          *   +--------------------------------------------------------------+
 690          * 8 |            RSV           |  STA  |          NXTSEQ           |
 691          *   +--------------------------------------------------------------+
 692          *   63                       36 35   32 31                         0
 693          *
 694          * 82599+ Advanced Transmit Descriptor
 695          *   +--------------------------------------------------------------+
 696          * 0 |         Buffer Address [63:0]                                |
 697          *   +--------------------------------------------------------------+
 698          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 699          *   +--------------------------------------------------------------+
 700          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 701          *
 702          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 703          *   +--------------------------------------------------------------+
 704          * 0 |                          RSV [63:0]                          |
 705          *   +--------------------------------------------------------------+
 706          * 8 |            RSV           |  STA  |           RSV             |
 707          *   +--------------------------------------------------------------+
 708          *   63                       36 35   32 31                         0
 709          */
 710
 711         for (n = 0; n < adapter->num_tx_queues; n++) {
 712                 ring = adapter->tx_ring[n];
 713                 pr_info("------------------------------------\n");
 714                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 715                 pr_info("------------------------------------\n");
 716                 pr_info("%s%s    %s              %s        %s          %s\n",
 717                         "T [desc]     [address 63:0  ] ",
 718                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 719                         "leng", "ntw", "timestamp", "bi->skb");
 720
 721                 for (i = 0; ring->desc && (i < ring->count); i++) {
 722                         tx_desc = IXGBE_TX_DESC(ring, i);
 723                         tx_buffer = &ring->tx_buffer_info[i];
 724                         u0 = (struct my_u0 *)tx_desc;
 725                         if (dma_unmap_len(tx_buffer, len) > 0) {
 726                                 const char *ring_desc;
 727
 728                                 if (i == ring->next_to_use &&
 729                                     i == ring->next_to_clean)
 730                                         ring_desc = " NTC/U";
 731                                 else if (i == ring->next_to_use)
 732                                         ring_desc = " NTU";
 733                                 else if (i == ring->next_to_clean)
 734                                         ring_desc = " NTC";
 735                                 else
 736                                         ring_desc = "";
 737                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 738                                         i,
 739                                         le64_to_cpu(u0->a),
 740                                         le64_to_cpu(u0->b),
 741                                         (u64)dma_unmap_addr(tx_buffer, dma),
 742                                         dma_unmap_len(tx_buffer, len),
 743                                         tx_buffer->next_to_watch,
 744                                         (u64)tx_buffer->time_stamp,
 745                                         tx_buffer->skb,
 746                                         ring_desc);
 747
 748                                 if (netif_msg_pktdata(adapter) &&
 749                                     tx_buffer->skb)
 750                                         print_hex_dump(KERN_INFO, "",
 751                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 752                                                 tx_buffer->skb->data,
 753                                                 dma_unmap_len(tx_buffer, len),
 754                                                 true);
 755                         }
 756                 }
 757         }
 758
 759         /* Print RX Rings Summary */
 760 rx_ring_summary:
 761         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 762         pr_info("Queue [NTU] [NTC]\n");
 763         for (n = 0; n < adapter->num_rx_queues; n++) {
 764                 rx_ring = adapter->rx_ring[n];
 765                 pr_info("%5d %5X %5X\n",
 766                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 767         }
 768
 769         /* Print RX Rings */
 770         if (!netif_msg_rx_status(adapter))
 771                 return;
 772
 773         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 774
 775         /* Receive Descriptor Formats
 776          *
 777          * 82598 Advanced Receive Descriptor (Read) Format
 778          *    63                                           1        0
 779          *    +-----------------------------------------------------+
 780          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 781          *    +----------------------------------------------+------+
 782          *  8 |       Header Buffer Address [63:1]           |  DD  |
 783          *    +-----------------------------------------------------+
 784          *
 785          *
 786          * 82598 Advanced Receive Descriptor (Write-Back) Format
 787          *
 788          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 789          *   +------------------------------------------------------+
 790          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 791          *   | Packet   | IP     |   |          |     | Type | Type |
 792          *   | Checksum | Ident  |   |          |     |      |      |
 793          *   +------------------------------------------------------+
 794          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 795          *   +------------------------------------------------------+
 796          *   63       48 47    32 31            20 19               0
 797          *
 798          * 82599+ Advanced Receive Descriptor (Read) Format
 799          *    63                                           1        0
 800          *    +-----------------------------------------------------+
 801          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 802          *    +----------------------------------------------+------+
 803          *  8 |       Header Buffer Address [63:1]           |  DD  |
 804          *    +-----------------------------------------------------+
 805          *
 806          *
 807          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 808          *
 809          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 810          *   +------------------------------------------------------+
 811          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 812          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 813          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 814          *   +------------------------------------------------------+
 815          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 816          *   +------------------------------------------------------+
 817          *   63       48 47    32 31          20 19                 0
 818          */
 819
 820         for (n = 0; n < adapter->num_rx_queues; n++) {
 821                 rx_ring = adapter->rx_ring[n];
 822                 pr_info("------------------------------------\n");
 823                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 824                 pr_info("------------------------------------\n");
 825                 pr_info("%s%s%s\n",
 826                         "R  [desc]      [ PktBuf     A0] ",
 827                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 828                         "<-- Adv Rx Read format");
 829                 pr_info("%s%s%s\n",
 830                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 831                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 832                         "<-- Adv Rx Write-Back format");
 833
 834                 for (i = 0; i < rx_ring->count; i++) {
 835                         const char *ring_desc;
 836
 837                         if (i == rx_ring->next_to_use)
 838                                 ring_desc = " NTU";
 839                         else if (i == rx_ring->next_to_clean)
 840                                 ring_desc = " NTC";
 841                         else
 842                                 ring_desc = "";
 843
 844                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 845                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 846                         u0 = (struct my_u0 *)rx_desc;
 847                         if (rx_desc->wb.upper.length) {
 848                                 /* Descriptor Done */
 849                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 850                                         i,
 851                                         le64_to_cpu(u0->a),
 852                                         le64_to_cpu(u0->b),
 853                                         rx_buffer_info->skb,
 854                                         ring_desc);
 855                         } else {
 856                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 857                                         i,
 858                                         le64_to_cpu(u0->a),
 859                                         le64_to_cpu(u0->b),
 860                                         (u64)rx_buffer_info->dma,
 861                                         rx_buffer_info->skb,
 862                                         ring_desc);
 863
 864                                 if (netif_msg_pktdata(adapter) &&
 865                                     rx_buffer_info->dma) {
 866                                         print_hex_dump(KERN_INFO, "",
 867                                            DUMP_PREFIX_ADDRESS, 16, 1,
 868                                            page_address(rx_buffer_info->page) +
 869                                                     rx_buffer_info->page_offset,
 870                                            ixgbe_rx_bufsz(rx_ring), true);
 871                                 }
 872                         }
 873                 }
 874         }
 875 }
 876
 877 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 878 {
 879         u32 ctrl_ext;
 880
 881         /* Let firmware take over control of h/w */
 882         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 883         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 884                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 885 }
 886
 887 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 888 {
 889         u32 ctrl_ext;
 890
 891         /* Let firmware know the driver has taken over */
 892         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 893         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 894                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 895 }
 896
 897 /**
 898  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 899  * @adapter: pointer to adapter struct
 900  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 901  * @queue: queue to map the corresponding interrupt to
 902  * @msix_vector: the vector to map to the corresponding queue
 903  *
 904  */
 905 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 906                            u8 queue, u8 msix_vector)
 907 {
 908         u32 ivar, index;
 909         struct ixgbe_hw *hw = &adapter->hw;
 910         switch (hw->mac.type) {
 911         case ixgbe_mac_82598EB:
 912                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 913                 if (direction == -1)
 914                         direction = 0;
 915                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 916                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 917                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 918                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 919                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 920                 break;
 921         case ixgbe_mac_82599EB:
 922         case ixgbe_mac_X540:
 923         case ixgbe_mac_X550:
 924         case ixgbe_mac_X550EM_x:
 925         case ixgbe_mac_x550em_a:
 926                 if (direction == -1) {
 927                         /* other causes */
 928                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 929                         index = ((queue & 1) * 8);
 930                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 931                         ivar &= ~(0xFF << index);
 932                         ivar |= (msix_vector << index);
 933                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 934                         break;
 935                 } else {
 936                         /* tx or rx causes */
 937                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 938                         index = ((16 * (queue & 1)) + (8 * direction));
 939                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 940                         ivar &= ~(0xFF << index);
 941                         ivar |= (msix_vector << index);
 942                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 943                         break;
 944                 }
 945         default:
 946                 break;
 947         }
 948 }
 949
 950 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 951                                           u64 qmask)
 952 {
 953         u32 mask;
 954
 955         switch (adapter->hw.mac.type) {
 956         case ixgbe_mac_82598EB:
 957                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 958                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 959                 break;
 960         case ixgbe_mac_82599EB:
 961         case ixgbe_mac_X540:
 962         case ixgbe_mac_X550:
 963         case ixgbe_mac_X550EM_x:
 964         case ixgbe_mac_x550em_a:
 965                 mask = (qmask & 0xFFFFFFFF);
 966                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 967                 mask = (qmask >> 32);
 968                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 969                 break;
 970         default:
 971                 break;
 972         }
 973 }
 974
 975 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 976 {
 977         struct ixgbe_hw *hw = &adapter->hw;
 978         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 979         int i;
 980         u32 data;
 981
 982         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 983             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 984                 return;
 985
 986         switch (hw->mac.type) {
 987         case ixgbe_mac_82598EB:
 988                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 989                 break;
 990         default:
 991                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 992         }
 993         hwstats->lxoffrxc += data;
 994
 995         /* refill credits (no tx hang) if we received xoff */
 996         if (!data)
 997                 return;
 998
 999         for (i = 0; i < adapter->num_tx_queues; i++)
1000                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1001                           &adapter->tx_ring[i]->state);
1002
1003         for (i = 0; i < adapter->num_xdp_queues; i++)
1004                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1005                           &adapter->xdp_ring[i]->state);
1006 }
1007
1008 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1009 {
1010         struct ixgbe_hw *hw = &adapter->hw;
1011         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1012         u32 xoff[8] = {0};
1013         u8 tc;
1014         int i;
1015         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1016
1017         if (adapter->ixgbe_ieee_pfc)
1018                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1019
1020         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1021                 ixgbe_update_xoff_rx_lfc(adapter);
1022                 return;
1023         }
1024
1025         /* update stats for each tc, only valid with PFC enabled */
1026         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1027                 u32 pxoffrxc;
1028
1029                 switch (hw->mac.type) {
1030                 case ixgbe_mac_82598EB:
1031                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1032                         break;
1033                 default:
1034                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1035                 }
1036                 hwstats->pxoffrxc[i] += pxoffrxc;
1037                 /* Get the TC for given UP */
1038                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1039                 xoff[tc] += pxoffrxc;
1040         }
1041
1042         /* disarm tx queues that have received xoff frames */
1043         for (i = 0; i < adapter->num_tx_queues; i++) {
1044                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1045
1046                 tc = tx_ring->dcb_tc;
1047                 if (xoff[tc])
1048                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1049         }
1050
1051         for (i = 0; i < adapter->num_xdp_queues; i++) {
1052                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1053
1054                 tc = xdp_ring->dcb_tc;
1055                 if (xoff[tc])
1056                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1057         }
1058 }
1059
1060 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1061 {
1062         return ring->stats.packets;
1063 }
1064
1065 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1066 {
1067         struct ixgbe_adapter *adapter;
1068         struct ixgbe_hw *hw;
1069         u32 head, tail;
1070
1071         if (ring->l2_accel_priv)
1072                 adapter = ring->l2_accel_priv->real_adapter;
1073         else
1074                 adapter = netdev_priv(ring->netdev);
1075
1076         hw = &adapter->hw;
1077         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1078         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1079
1080         if (head != tail)
1081                 return (head < tail) ?
1082                         tail - head : (tail + ring->count - head);
1083
1084         return 0;
1085 }
1086
1087 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1088 {
1089         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1090         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1091         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1092
1093         clear_check_for_tx_hang(tx_ring);
1094
1095         /*
1096          * Check for a hung queue, but be thorough. This verifies
1097          * that a transmit has been completed since the previous
1098          * check AND there is at least one packet pending. The
1099          * ARMED bit is set to indicate a potential hang. The
1100          * bit is cleared if a pause frame is received to remove
1101          * false hang detection due to PFC or 802.3x frames. By
1102          * requiring this to fail twice we avoid races with
1103          * pfc clearing the ARMED bit and conditions where we
1104          * run the check_tx_hang logic with a transmit completion
1105          * pending but without time to complete it yet.
1106          */
1107         if (tx_done_old == tx_done && tx_pending)
1108                 /* make sure it is true for two checks in a row */
1109                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1110                                         &tx_ring->state);
1111         /* update completed stats and continue */
1112         tx_ring->tx_stats.tx_done_old = tx_done;
1113         /* reset the countdown */
1114         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1115
1116         return false;
1117 }
1118
1119 /**
1120  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1121  * @adapter: driver private struct
1122  **/
1123 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1124 {
1125
1126         /* Do the reset outside of interrupt context */
1127         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1128                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1129                 e_warn(drv, "initiating reset due to tx timeout\n");
1130                 ixgbe_service_event_schedule(adapter);
1131         }
1132 }
1133
1134 /**
1135  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1136  **/
1137 static int ixgbe_tx_maxrate(struct net_device *netdev,
1138                             int queue_index, u32 maxrate)
1139 {
1140         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1141         struct ixgbe_hw *hw = &adapter->hw;
1142         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1143
1144         if (!maxrate)
1145                 return 0;
1146
1147         /* Calculate the rate factor values to set */
1148         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1149         bcnrc_val /= maxrate;
1150
1151         /* clear everything but the rate factor */
1152         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1153         IXGBE_RTTBCNRC_RF_DEC_MASK;
1154
1155         /* enable the rate scheduler */
1156         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1157
1158         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1159         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1160
1161         return 0;
1162 }
1163
1164 /**
1165  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1166  * @q_vector: structure containing interrupt and ring information
1167  * @tx_ring: tx ring to clean
1168  * @napi_budget: Used to determine if we are in netpoll
1169  **/
1170 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1171                                struct ixgbe_ring *tx_ring, int napi_budget)
1172 {
1173         struct ixgbe_adapter *adapter = q_vector->adapter;
1174         struct ixgbe_tx_buffer *tx_buffer;
1175         union ixgbe_adv_tx_desc *tx_desc;
1176         unsigned int total_bytes = 0, total_packets = 0;
1177         unsigned int budget = q_vector->tx.work_limit;
1178         unsigned int i = tx_ring->next_to_clean;
1179
1180         if (test_bit(__IXGBE_DOWN, &adapter->state))
1181                 return true;
1182
1183         tx_buffer = &tx_ring->tx_buffer_info[i];
1184         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1185         i -= tx_ring->count;
1186
1187         do {
1188                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1189
1190                 /* if next_to_watch is not set then there is no work pending */
1191                 if (!eop_desc)
1192                         break;
1193
1194                 /* prevent any other reads prior to eop_desc */
1195                 smp_rmb();
1196
1197                 /* if DD is not set pending work has not been completed */
1198                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1199                         break;
1200
1201                 /* clear next_to_watch to prevent false hangs */
1202                 tx_buffer->next_to_watch = NULL;
1203
1204                 /* update the statistics for this packet */
1205                 total_bytes += tx_buffer->bytecount;
1206                 total_packets += tx_buffer->gso_segs;
1207
1208                 /* free the skb */
1209                 if (ring_is_xdp(tx_ring))
1210                         page_frag_free(tx_buffer->data);
1211                 else
1212                         napi_consume_skb(tx_buffer->skb, napi_budget);
1213
1214                 /* unmap skb header data */
1215                 dma_unmap_single(tx_ring->dev,
1216                                  dma_unmap_addr(tx_buffer, dma),
1217                                  dma_unmap_len(tx_buffer, len),
1218                                  DMA_TO_DEVICE);
1219
1220                 /* clear tx_buffer data */
1221                 dma_unmap_len_set(tx_buffer, len, 0);
1222
1223                 /* unmap remaining buffers */
1224                 while (tx_desc != eop_desc) {
1225                         tx_buffer++;
1226                         tx_desc++;
1227                         i++;
1228                         if (unlikely(!i)) {
1229                                 i -= tx_ring->count;
1230                                 tx_buffer = tx_ring->tx_buffer_info;
1231                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1232                         }
1233
1234                         /* unmap any remaining paged data */
1235                         if (dma_unmap_len(tx_buffer, len)) {
1236                                 dma_unmap_page(tx_ring->dev,
1237                                                dma_unmap_addr(tx_buffer, dma),
1238                                                dma_unmap_len(tx_buffer, len),
1239                                                DMA_TO_DEVICE);
1240                                 dma_unmap_len_set(tx_buffer, len, 0);
1241                         }
1242                 }
1243
1244                 /* move us one more past the eop_desc for start of next pkt */
1245                 tx_buffer++;
1246                 tx_desc++;
1247                 i++;
1248                 if (unlikely(!i)) {
1249                         i -= tx_ring->count;
1250                         tx_buffer = tx_ring->tx_buffer_info;
1251                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1252                 }
1253
1254                 /* issue prefetch for next Tx descriptor */
1255                 prefetch(tx_desc);
1256
1257                 /* update budget accounting */
1258                 budget--;
1259         } while (likely(budget));
1260
1261         i += tx_ring->count;
1262         tx_ring->next_to_clean = i;
1263         u64_stats_update_begin(&tx_ring->syncp);
1264         tx_ring->stats.bytes += total_bytes;
1265         tx_ring->stats.packets += total_packets;
1266         u64_stats_update_end(&tx_ring->syncp);
1267         q_vector->tx.total_bytes += total_bytes;
1268         q_vector->tx.total_packets += total_packets;
1269
1270         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1271                 /* schedule immediate reset if we believe we hung */
1272                 struct ixgbe_hw *hw = &adapter->hw;
1273                 e_err(drv, "Detected Tx Unit Hang %s\n"
1274                         "  Tx Queue             <%d>\n"
1275                         "  TDH, TDT             <%x>, <%x>\n"
1276                         "  next_to_use          <%x>\n"
1277                         "  next_to_clean        <%x>\n"
1278                         "tx_buffer_info[next_to_clean]\n"
1279                         "  time_stamp           <%lx>\n"
1280                         "  jiffies              <%lx>\n",
1281                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1282                         tx_ring->queue_index,
1283                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1284                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1285                         tx_ring->next_to_use, i,
1286                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1287
1288                 if (!ring_is_xdp(tx_ring))
1289                         netif_stop_subqueue(tx_ring->netdev,
1290                                             tx_ring->queue_index);
1291
1292                 e_info(probe,
1293                        "tx hang %d detected on queue %d, resetting adapter\n",
1294                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1295
1296                 /* schedule immediate reset if we believe we hung */
1297                 ixgbe_tx_timeout_reset(adapter);
1298
1299                 /* the adapter is about to reset, no point in enabling stuff */
1300                 return true;
1301         }
1302
1303         if (ring_is_xdp(tx_ring))
1304                 return !!budget;
1305
1306         netdev_tx_completed_queue(txring_txq(tx_ring),
1307                                   total_packets, total_bytes);
1308
1309 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1310         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1311                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1312                 /* Make sure that anybody stopping the queue after this
1313                  * sees the new next_to_clean.
1314                  */
1315                 smp_mb();
1316                 if (__netif_subqueue_stopped(tx_ring->netdev,
1317                                              tx_ring->queue_index)
1318                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1319                         netif_wake_subqueue(tx_ring->netdev,
1320                                             tx_ring->queue_index);
1321                         ++tx_ring->tx_stats.restart_queue;
1322                 }
1323         }
1324
1325         return !!budget;
1326 }
1327
1328 #ifdef CONFIG_IXGBE_DCA
1329 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1330                                 struct ixgbe_ring *tx_ring,
1331                                 int cpu)
1332 {
1333         struct ixgbe_hw *hw = &adapter->hw;
1334         u32 txctrl = 0;
1335         u16 reg_offset;
1336
1337         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1339
1340         switch (hw->mac.type) {
1341         case ixgbe_mac_82598EB:
1342                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1343                 break;
1344         case ixgbe_mac_82599EB:
1345         case ixgbe_mac_X540:
1346                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1347                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1348                 break;
1349         default:
1350                 /* for unknown hardware do not write register */
1351                 return;
1352         }
1353
1354         /*
1355          * We can enable relaxed ordering for reads, but not writes when
1356          * DCA is enabled.  This is due to a known issue in some chipsets
1357          * which will cause the DCA tag to be cleared.
1358          */
1359         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1360                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1361                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1362
1363         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1364 }
1365
1366 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1367                                 struct ixgbe_ring *rx_ring,
1368                                 int cpu)
1369 {
1370         struct ixgbe_hw *hw = &adapter->hw;
1371         u32 rxctrl = 0;
1372         u8 reg_idx = rx_ring->reg_idx;
1373
1374         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1375                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1376
1377         switch (hw->mac.type) {
1378         case ixgbe_mac_82599EB:
1379         case ixgbe_mac_X540:
1380                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1381                 break;
1382         default:
1383                 break;
1384         }
1385
1386         /*
1387          * We can enable relaxed ordering for reads, but not writes when
1388          * DCA is enabled.  This is due to a known issue in some chipsets
1389          * which will cause the DCA tag to be cleared.
1390          */
1391         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1392                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1393                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1394
1395         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1396 }
1397
1398 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1399 {
1400         struct ixgbe_adapter *adapter = q_vector->adapter;
1401         struct ixgbe_ring *ring;
1402         int cpu = get_cpu();
1403
1404         if (q_vector->cpu == cpu)
1405                 goto out_no_update;
1406
1407         ixgbe_for_each_ring(ring, q_vector->tx)
1408                 ixgbe_update_tx_dca(adapter, ring, cpu);
1409
1410         ixgbe_for_each_ring(ring, q_vector->rx)
1411                 ixgbe_update_rx_dca(adapter, ring, cpu);
1412
1413         q_vector->cpu = cpu;
1414 out_no_update:
1415         put_cpu();
1416 }
1417
1418 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1419 {
1420         int i;
1421
1422         /* always use CB2 mode, difference is masked in the CB driver */
1423         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1424                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1425                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1426         else
1427                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1428                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1429
1430         for (i = 0; i < adapter->num_q_vectors; i++) {
1431                 adapter->q_vector[i]->cpu = -1;
1432                 ixgbe_update_dca(adapter->q_vector[i]);
1433         }
1434 }
1435
1436 static int __ixgbe_notify_dca(struct device *dev, void *data)
1437 {
1438         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1439         unsigned long event = *(unsigned long *)data;
1440
1441         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1442                 return 0;
1443
1444         switch (event) {
1445         case DCA_PROVIDER_ADD:
1446                 /* if we're already enabled, don't do it again */
1447                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1448                         break;
1449                 if (dca_add_requester(dev) == 0) {
1450                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1451                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1452                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1453                         break;
1454                 }
1455                 /* fall through - DCA is disabled. */
1456         case DCA_PROVIDER_REMOVE:
1457                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1458                         dca_remove_requester(dev);
1459                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1460                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1461                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1462                 }
1463                 break;
1464         }
1465
1466         return 0;
1467 }
1468
1469 #endif /* CONFIG_IXGBE_DCA */
1470
1471 #define IXGBE_RSS_L4_TYPES_MASK \
1472         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1473          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1474          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1475          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1476
1477 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1478                                  union ixgbe_adv_rx_desc *rx_desc,
1479                                  struct sk_buff *skb)
1480 {
1481         u16 rss_type;
1482
1483         if (!(ring->netdev->features & NETIF_F_RXHASH))
1484                 return;
1485
1486         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1487                    IXGBE_RXDADV_RSSTYPE_MASK;
1488
1489         if (!rss_type)
1490                 return;
1491
1492         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1493                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1494                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1495 }
1496
1497 #ifdef IXGBE_FCOE
1498 /**
1499  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1500  * @ring: structure containing ring specific data
1501  * @rx_desc: advanced rx descriptor
1502  *
1503  * Returns : true if it is FCoE pkt
1504  */
1505 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1506                                     union ixgbe_adv_rx_desc *rx_desc)
1507 {
1508         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1509
1510         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1511                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1512                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1513                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1514 }
1515
1516 #endif /* IXGBE_FCOE */
1517 /**
1518  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1519  * @ring: structure containing ring specific data
1520  * @rx_desc: current Rx descriptor being processed
1521  * @skb: skb currently being received and modified
1522  **/
1523 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1524                                      union ixgbe_adv_rx_desc *rx_desc,
1525                                      struct sk_buff *skb)
1526 {
1527         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1528         bool encap_pkt = false;
1529
1530         skb_checksum_none_assert(skb);
1531
1532         /* Rx csum disabled */
1533         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1534                 return;
1535
1536         /* check for VXLAN and Geneve packets */
1537         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1538                 encap_pkt = true;
1539                 skb->encapsulation = 1;
1540         }
1541
1542         /* if IP and error */
1543         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1544             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1545                 ring->rx_stats.csum_err++;
1546                 return;
1547         }
1548
1549         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1550                 return;
1551
1552         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1553                 /*
1554                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1555                  * checksum errors.
1556                  */
1557                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1558                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1559                         return;
1560
1561                 ring->rx_stats.csum_err++;
1562                 return;
1563         }
1564
1565         /* It must be a TCP or UDP packet with a valid checksum */
1566         skb->ip_summed = CHECKSUM_UNNECESSARY;
1567         if (encap_pkt) {
1568                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1569                         return;
1570
1571                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1572                         skb->ip_summed = CHECKSUM_NONE;
1573                         return;
1574                 }
1575                 /* If we checked the outer header let the stack know */
1576                 skb->csum_level = 1;
1577         }
1578 }
1579
1580 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1581 {
1582         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1583 }
1584
1585 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1586                                     struct ixgbe_rx_buffer *bi)
1587 {
1588         struct page *page = bi->page;
1589         dma_addr_t dma;
1590
1591         /* since we are recycling buffers we should seldom need to alloc */
1592         if (likely(page))
1593                 return true;
1594
1595         /* alloc new page for storage */
1596         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1597         if (unlikely(!page)) {
1598                 rx_ring->rx_stats.alloc_rx_page_failed++;
1599                 return false;
1600         }
1601
1602         /* map page for use */
1603         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1604                                  ixgbe_rx_pg_size(rx_ring),
1605                                  DMA_FROM_DEVICE,
1606                                  IXGBE_RX_DMA_ATTR);
1607
1608         /*
1609          * if mapping failed free memory back to system since
1610          * there isn't much point in holding memory we can't use
1611          */
1612         if (dma_mapping_error(rx_ring->dev, dma)) {
1613                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1614
1615                 rx_ring->rx_stats.alloc_rx_page_failed++;
1616                 return false;
1617         }
1618
1619         bi->dma = dma;
1620         bi->page = page;
1621         bi->page_offset = ixgbe_rx_offset(rx_ring);
1622         bi->pagecnt_bias = 1;
1623         rx_ring->rx_stats.alloc_rx_page++;
1624
1625         return true;
1626 }
1627
1628 /**
1629  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1630  * @rx_ring: ring to place buffers on
1631  * @cleaned_count: number of buffers to replace
1632  **/
1633 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1634 {
1635         union ixgbe_adv_rx_desc *rx_desc;
1636         struct ixgbe_rx_buffer *bi;
1637         u16 i = rx_ring->next_to_use;
1638         u16 bufsz;
1639
1640         /* nothing to do */
1641         if (!cleaned_count)
1642                 return;
1643
1644         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1645         bi = &rx_ring->rx_buffer_info[i];
1646         i -= rx_ring->count;
1647
1648         bufsz = ixgbe_rx_bufsz(rx_ring);
1649
1650         do {
1651                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1652                         break;
1653
1654                 /* sync the buffer for use by the device */
1655                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1656                                                  bi->page_offset, bufsz,
1657                                                  DMA_FROM_DEVICE);
1658
1659                 /*
1660                  * Refresh the desc even if buffer_addrs didn't change
1661                  * because each write-back erases this info.
1662                  */
1663                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1664
1665                 rx_desc++;
1666                 bi++;
1667                 i++;
1668                 if (unlikely(!i)) {
1669                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1670                         bi = rx_ring->rx_buffer_info;
1671                         i -= rx_ring->count;
1672                 }
1673
1674                 /* clear the length for the next_to_use descriptor */
1675                 rx_desc->wb.upper.length = 0;
1676
1677                 cleaned_count--;
1678         } while (cleaned_count);
1679
1680         i += rx_ring->count;
1681
1682         if (rx_ring->next_to_use != i) {
1683                 rx_ring->next_to_use = i;
1684
1685                 /* update next to alloc since we have filled the ring */
1686                 rx_ring->next_to_alloc = i;
1687
1688                 /* Force memory writes to complete before letting h/w
1689                  * know there are new descriptors to fetch.  (Only
1690                  * applicable for weak-ordered memory model archs,
1691                  * such as IA-64).
1692                  */
1693                 wmb();
1694                 writel(i, rx_ring->tail);
1695         }
1696 }
1697
1698 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1699                                    struct sk_buff *skb)
1700 {
1701         u16 hdr_len = skb_headlen(skb);
1702
1703         /* set gso_size to avoid messing up TCP MSS */
1704         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1705                                                  IXGBE_CB(skb)->append_cnt);
1706         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1707 }
1708
1709 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1710                                    struct sk_buff *skb)
1711 {
1712         /* if append_cnt is 0 then frame is not RSC */
1713         if (!IXGBE_CB(skb)->append_cnt)
1714                 return;
1715
1716         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1717         rx_ring->rx_stats.rsc_flush++;
1718
1719         ixgbe_set_rsc_gso_size(rx_ring, skb);
1720
1721         /* gso_size is computed using append_cnt so always clear it last */
1722         IXGBE_CB(skb)->append_cnt = 0;
1723 }
1724
1725 /**
1726  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1727  * @rx_ring: rx descriptor ring packet is being transacted on
1728  * @rx_desc: pointer to the EOP Rx descriptor
1729  * @skb: pointer to current skb being populated
1730  *
1731  * This function checks the ring, descriptor, and packet information in
1732  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1733  * other fields within the skb.
1734  **/
1735 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1736                                      union ixgbe_adv_rx_desc *rx_desc,
1737                                      struct sk_buff *skb)
1738 {
1739         struct net_device *dev = rx_ring->netdev;
1740         u32 flags = rx_ring->q_vector->adapter->flags;
1741
1742         ixgbe_update_rsc_stats(rx_ring, skb);
1743
1744         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1745
1746         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1747
1748         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1749                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1750
1751         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1752             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1753                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1754                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1755         }
1756
1757         skb_record_rx_queue(skb, rx_ring->queue_index);
1758
1759         skb->protocol = eth_type_trans(skb, dev);
1760 }
1761
1762 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1763                          struct sk_buff *skb)
1764 {
1765         napi_gro_receive(&q_vector->napi, skb);
1766 }
1767
1768 /**
1769  * ixgbe_is_non_eop - process handling of non-EOP buffers
1770  * @rx_ring: Rx ring being processed
1771  * @rx_desc: Rx descriptor for current buffer
1772  * @skb: Current socket buffer containing buffer in progress
1773  *
1774  * This function updates next to clean.  If the buffer is an EOP buffer
1775  * this function exits returning false, otherwise it will place the
1776  * sk_buff in the next buffer to be chained and return true indicating
1777  * that this is in fact a non-EOP buffer.
1778  **/
1779 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1780                              union ixgbe_adv_rx_desc *rx_desc,
1781                              struct sk_buff *skb)
1782 {
1783         u32 ntc = rx_ring->next_to_clean + 1;
1784
1785         /* fetch, update, and store next to clean */
1786         ntc = (ntc < rx_ring->count) ? ntc : 0;
1787         rx_ring->next_to_clean = ntc;
1788
1789         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1790
1791         /* update RSC append count if present */
1792         if (ring_is_rsc_enabled(rx_ring)) {
1793                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1794                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1795
1796                 if (unlikely(rsc_enabled)) {
1797                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1798
1799                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1800                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1801
1802                         /* update ntc based on RSC value */
1803                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1804                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1805                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1806                 }
1807         }
1808
1809         /* if we are the last buffer then there is nothing else to do */
1810         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1811                 return false;
1812
1813         /* place skb in next buffer to be received */
1814         rx_ring->rx_buffer_info[ntc].skb = skb;
1815         rx_ring->rx_stats.non_eop_descs++;
1816
1817         return true;
1818 }
1819
1820 /**
1821  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1822  * @rx_ring: rx descriptor ring packet is being transacted on
1823  * @skb: pointer to current skb being adjusted
1824  *
1825  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1826  * main difference between this version and the original function is that
1827  * this function can make several assumptions about the state of things
1828  * that allow for significant optimizations versus the standard function.
1829  * As a result we can do things like drop a frag and maintain an accurate
1830  * truesize for the skb.
1831  */
1832 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1833                             struct sk_buff *skb)
1834 {
1835         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1836         unsigned char *va;
1837         unsigned int pull_len;
1838
1839         /*
1840          * it is valid to use page_address instead of kmap since we are
1841          * working with pages allocated out of the lomem pool per
1842          * alloc_page(GFP_ATOMIC)
1843          */
1844         va = skb_frag_address(frag);
1845
1846         /*
1847          * we need the header to contain the greater of either ETH_HLEN or
1848          * 60 bytes if the skb->len is less than 60 for skb_pad.
1849          */
1850         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1851
1852         /* align pull length to size of long to optimize memcpy performance */
1853         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1854
1855         /* update all of the pointers */
1856         skb_frag_size_sub(frag, pull_len);
1857         frag->page_offset += pull_len;
1858         skb->data_len -= pull_len;
1859         skb->tail += pull_len;
1860 }
1861
1862 /**
1863  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1864  * @rx_ring: rx descriptor ring packet is being transacted on
1865  * @skb: pointer to current skb being updated
1866  *
1867  * This function provides a basic DMA sync up for the first fragment of an
1868  * skb.  The reason for doing this is that the first fragment cannot be
1869  * unmapped until we have reached the end of packet descriptor for a buffer
1870  * chain.
1871  */
1872 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1873                                 struct sk_buff *skb)
1874 {
1875         /* if the page was released unmap it, else just sync our portion */
1876         if (unlikely(IXGBE_CB(skb)->page_released)) {
1877                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1878                                      ixgbe_rx_pg_size(rx_ring),
1879                                      DMA_FROM_DEVICE,
1880                                      IXGBE_RX_DMA_ATTR);
1881         } else {
1882                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1883
1884                 dma_sync_single_range_for_cpu(rx_ring->dev,
1885                                               IXGBE_CB(skb)->dma,
1886                                               frag->page_offset,
1887                                               skb_frag_size(frag),
1888                                               DMA_FROM_DEVICE);
1889         }
1890 }
1891
1892 /**
1893  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1894  * @rx_ring: rx descriptor ring packet is being transacted on
1895  * @rx_desc: pointer to the EOP Rx descriptor
1896  * @skb: pointer to current skb being fixed
1897  *
1898  * Check if the skb is valid in the XDP case it will be an error pointer.
1899  * Return true in this case to abort processing and advance to next
1900  * descriptor.
1901  *
1902  * Check for corrupted packet headers caused by senders on the local L2
1903  * embedded NIC switch not setting up their Tx Descriptors right.  These
1904  * should be very rare.
1905  *
1906  * Also address the case where we are pulling data in on pages only
1907  * and as such no data is present in the skb header.
1908  *
1909  * In addition if skb is not at least 60 bytes we need to pad it so that
1910  * it is large enough to qualify as a valid Ethernet frame.
1911  *
1912  * Returns true if an error was encountered and skb was freed.
1913  **/
1914 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1915                                   union ixgbe_adv_rx_desc *rx_desc,
1916                                   struct sk_buff *skb)
1917 {
1918         struct net_device *netdev = rx_ring->netdev;
1919
1920         /* XDP packets use error pointer so abort at this point */
1921         if (IS_ERR(skb))
1922                 return true;
1923
1924         /* verify that the packet does not have any known errors */
1925         if (unlikely(ixgbe_test_staterr(rx_desc,
1926                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1927             !(netdev->features & NETIF_F_RXALL))) {
1928                 dev_kfree_skb_any(skb);
1929                 return true;
1930         }
1931
1932         /* place header in linear portion of buffer */
1933         if (!skb_headlen(skb))
1934                 ixgbe_pull_tail(rx_ring, skb);
1935
1936 #ifdef IXGBE_FCOE
1937         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1938         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1939                 return false;
1940
1941 #endif
1942         /* if eth_skb_pad returns an error the skb was freed */
1943         if (eth_skb_pad(skb))
1944                 return true;
1945
1946         return false;
1947 }
1948
1949 /**
1950  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1951  * @rx_ring: rx descriptor ring to store buffers on
1952  * @old_buff: donor buffer to have page reused
1953  *
1954  * Synchronizes page for reuse by the adapter
1955  **/
1956 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1957                                 struct ixgbe_rx_buffer *old_buff)
1958 {
1959         struct ixgbe_rx_buffer *new_buff;
1960         u16 nta = rx_ring->next_to_alloc;
1961
1962         new_buff = &rx_ring->rx_buffer_info[nta];
1963
1964         /* update, and store next to alloc */
1965         nta++;
1966         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1967
1968         /* Transfer page from old buffer to new buffer.
1969          * Move each member individually to avoid possible store
1970          * forwarding stalls and unnecessary copy of skb.
1971          */
1972         new_buff->dma           = old_buff->dma;
1973         new_buff->page          = old_buff->page;
1974         new_buff->page_offset   = old_buff->page_offset;
1975         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1976 }
1977
1978 static inline bool ixgbe_page_is_reserved(struct page *page)
1979 {
1980         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1981 }
1982
1983 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1984 {
1985         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1986         struct page *page = rx_buffer->page;
1987
1988         /* avoid re-using remote pages */
1989         if (unlikely(ixgbe_page_is_reserved(page)))
1990                 return false;
1991
1992 #if (PAGE_SIZE < 8192)
1993         /* if we are only owner of page we can reuse it */
1994         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1995                 return false;
1996 #else
1997         /* The last offset is a bit aggressive in that we assume the
1998          * worst case of FCoE being enabled and using a 3K buffer.
1999          * However this should have minimal impact as the 1K extra is
2000          * still less than one buffer in size.
2001          */
2002 #define IXGBE_LAST_OFFSET \
2003         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
2004         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
2005                 return false;
2006 #endif
2007
2008         /* If we have drained the page fragment pool we need to update
2009          * the pagecnt_bias and page count so that we fully restock the
2010          * number of references the driver holds.
2011          */
2012         if (unlikely(!pagecnt_bias)) {
2013                 page_ref_add(page, USHRT_MAX);
2014                 rx_buffer->pagecnt_bias = USHRT_MAX;
2015         }
2016
2017         return true;
2018 }
2019
2020 /**
2021  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
2022  * @rx_ring: rx descriptor ring to transact packets on
2023  * @rx_buffer: buffer containing page to add
2024  * @rx_desc: descriptor containing length of buffer written by hardware
2025  * @skb: sk_buff to place the data into
2026  *
2027  * This function will add the data contained in rx_buffer->page to the skb.
2028  * This is done either through a direct copy if the data in the buffer is
2029  * less than the skb header size, otherwise it will just attach the page as
2030  * a frag to the skb.
2031  *
2032  * The function will then update the page offset if necessary and return
2033  * true if the buffer can be reused by the adapter.
2034  **/
2035 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2036                               struct ixgbe_rx_buffer *rx_buffer,
2037                               struct sk_buff *skb,
2038                               unsigned int size)
2039 {
2040 #if (PAGE_SIZE < 8192)
2041         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2042 #else
2043         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2044                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2045                                 SKB_DATA_ALIGN(size);
2046 #endif
2047         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2048                         rx_buffer->page_offset, size, truesize);
2049 #if (PAGE_SIZE < 8192)
2050         rx_buffer->page_offset ^= truesize;
2051 #else
2052         rx_buffer->page_offset += truesize;
2053 #endif
2054 }
2055
2056 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2057                                                    union ixgbe_adv_rx_desc *rx_desc,
2058                                                    struct sk_buff **skb,
2059                                                    const unsigned int size)
2060 {
2061         struct ixgbe_rx_buffer *rx_buffer;
2062
2063         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2064         prefetchw(rx_buffer->page);
2065         *skb = rx_buffer->skb;
2066
2067         /* Delay unmapping of the first packet. It carries the header
2068          * information, HW may still access the header after the writeback.
2069          * Only unmap it when EOP is reached
2070          */
2071         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2072                 if (!*skb)
2073                         goto skip_sync;
2074         } else {
2075                 if (*skb)
2076                         ixgbe_dma_sync_frag(rx_ring, *skb);
2077         }
2078
2079         /* we are reusing so sync this buffer for CPU use */
2080         dma_sync_single_range_for_cpu(rx_ring->dev,
2081                                       rx_buffer->dma,
2082                                       rx_buffer->page_offset,
2083                                       size,
2084                                       DMA_FROM_DEVICE);
2085 skip_sync:
2086         rx_buffer->pagecnt_bias--;
2087
2088         return rx_buffer;
2089 }
2090
2091 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2092                                 struct ixgbe_rx_buffer *rx_buffer,
2093                                 struct sk_buff *skb)
2094 {
2095         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2096                 /* hand second half of page back to the ring */
2097                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2098         } else {
2099                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2100                         /* the page has been released from the ring */
2101                         IXGBE_CB(skb)->page_released = true;
2102                 } else {
2103                         /* we are not reusing the buffer so unmap it */
2104                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2105                                              ixgbe_rx_pg_size(rx_ring),
2106                                              DMA_FROM_DEVICE,
2107                                              IXGBE_RX_DMA_ATTR);
2108                 }
2109                 __page_frag_cache_drain(rx_buffer->page,
2110                                         rx_buffer->pagecnt_bias);
2111         }
2112
2113         /* clear contents of rx_buffer */
2114         rx_buffer->page = NULL;
2115         rx_buffer->skb = NULL;
2116 }
2117
2118 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2119                                            struct ixgbe_rx_buffer *rx_buffer,
2120                                            struct xdp_buff *xdp,
2121                                            union ixgbe_adv_rx_desc *rx_desc)
2122 {
2123         unsigned int size = xdp->data_end - xdp->data;
2124 #if (PAGE_SIZE < 8192)
2125         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2126 #else
2127         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2128                                                xdp->data_hard_start);
2129 #endif
2130         struct sk_buff *skb;
2131
2132         /* prefetch first cache line of first page */
2133         prefetch(xdp->data);
2134 #if L1_CACHE_BYTES < 128
2135         prefetch(xdp->data + L1_CACHE_BYTES);
2136 #endif
2137         /* Note, we get here by enabling legacy-rx via:
2138          *
2139          *    ethtool --set-priv-flags <dev> legacy-rx on
2140          *
2141          * In this mode, we currently get 0 extra XDP headroom as
2142          * opposed to having legacy-rx off, where we process XDP
2143          * packets going to stack via ixgbe_build_skb(). The latter
2144          * provides us currently with 192 bytes of headroom.
2145          *
2146          * For ixgbe_construct_skb() mode it means that the
2147          * xdp->data_meta will always point to xdp->data, since
2148          * the helper cannot expand the head. Should this ever
2149          * change in future for legacy-rx mode on, then lets also
2150          * add xdp->data_meta handling here.
2151          */
2152
2153         /* allocate a skb to store the frags */
2154         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2155         if (unlikely(!skb))
2156                 return NULL;
2157
2158         if (size > IXGBE_RX_HDR_SIZE) {
2159                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2160                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2161
2162                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2163                                 xdp->data - page_address(rx_buffer->page),
2164                                 size, truesize);
2165 #if (PAGE_SIZE < 8192)
2166                 rx_buffer->page_offset ^= truesize;
2167 #else
2168                 rx_buffer->page_offset += truesize;
2169 #endif
2170         } else {
2171                 memcpy(__skb_put(skb, size),
2172                        xdp->data, ALIGN(size, sizeof(long)));
2173                 rx_buffer->pagecnt_bias++;
2174         }
2175
2176         return skb;
2177 }
2178
2179 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2180                                        struct ixgbe_rx_buffer *rx_buffer,
2181                                        struct xdp_buff *xdp,
2182                                        union ixgbe_adv_rx_desc *rx_desc)
2183 {
2184         unsigned int metasize = xdp->data - xdp->data_meta;
2185 #if (PAGE_SIZE < 8192)
2186         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2187 #else
2188         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2189                                 SKB_DATA_ALIGN(xdp->data_end -
2190                                                xdp->data_hard_start);
2191 #endif
2192         struct sk_buff *skb;
2193
2194         /* Prefetch first cache line of first page. If xdp->data_meta
2195          * is unused, this points extactly as xdp->data, otherwise we
2196          * likely have a consumer accessing first few bytes of meta
2197          * data, and then actual data.
2198          */
2199         prefetch(xdp->data_meta);
2200 #if L1_CACHE_BYTES < 128
2201         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2202 #endif
2203
2204         /* build an skb to around the page buffer */
2205         skb = build_skb(xdp->data_hard_start, truesize);
2206         if (unlikely(!skb))
2207                 return NULL;
2208
2209         /* update pointers within the skb to store the data */
2210         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2211         __skb_put(skb, xdp->data_end - xdp->data);
2212         if (metasize)
2213                 skb_metadata_set(skb, metasize);
2214
2215         /* record DMA address if this is the start of a chain of buffers */
2216         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2217                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2218
2219         /* update buffer offset */
2220 #if (PAGE_SIZE < 8192)
2221         rx_buffer->page_offset ^= truesize;
2222 #else
2223         rx_buffer->page_offset += truesize;
2224 #endif
2225
2226         return skb;
2227 }
2228
2229 #define IXGBE_XDP_PASS 0
2230 #define IXGBE_XDP_CONSUMED 1
2231 #define IXGBE_XDP_TX 2
2232
2233 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2234                                struct xdp_buff *xdp);
2235
2236 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2237                                      struct ixgbe_ring *rx_ring,
2238                                      struct xdp_buff *xdp)
2239 {
2240         int err, result = IXGBE_XDP_PASS;
2241         struct bpf_prog *xdp_prog;
2242         u32 act;
2243
2244         rcu_read_lock();
2245         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2246
2247         if (!xdp_prog)
2248                 goto xdp_out;
2249
2250         act = bpf_prog_run_xdp(xdp_prog, xdp);
2251         switch (act) {
2252         case XDP_PASS:
2253                 break;
2254         case XDP_TX:
2255                 result = ixgbe_xmit_xdp_ring(adapter, xdp);
2256                 break;
2257         case XDP_REDIRECT:
2258                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2259                 if (!err)
2260                         result = IXGBE_XDP_TX;
2261                 else
2262                         result = IXGBE_XDP_CONSUMED;
2263                 break;
2264         default:
2265                 bpf_warn_invalid_xdp_action(act);
2266                 /* fallthrough */
2267         case XDP_ABORTED:
2268                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2269                 /* fallthrough -- handle aborts by dropping packet */
2270         case XDP_DROP:
2271                 result = IXGBE_XDP_CONSUMED;
2272                 break;
2273         }
2274 xdp_out:
2275         rcu_read_unlock();
2276         return ERR_PTR(-result);
2277 }
2278
2279 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2280                                  struct ixgbe_rx_buffer *rx_buffer,
2281                                  unsigned int size)
2282 {
2283 #if (PAGE_SIZE < 8192)
2284         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2285
2286         rx_buffer->page_offset ^= truesize;
2287 #else
2288         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2289                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2290                                 SKB_DATA_ALIGN(size);
2291
2292         rx_buffer->page_offset += truesize;
2293 #endif
2294 }
2295
2296 /**
2297  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2298  * @q_vector: structure containing interrupt and ring information
2299  * @rx_ring: rx descriptor ring to transact packets on
2300  * @budget: Total limit on number of packets to process
2301  *
2302  * This function provides a "bounce buffer" approach to Rx interrupt
2303  * processing.  The advantage to this is that on systems that have
2304  * expensive overhead for IOMMU access this provides a means of avoiding
2305  * it by maintaining the mapping of the page to the syste.
2306  *
2307  * Returns amount of work completed
2308  **/
2309 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2310                                struct ixgbe_ring *rx_ring,
2311                                const int budget)
2312 {
2313         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2314         struct ixgbe_adapter *adapter = q_vector->adapter;
2315 #ifdef IXGBE_FCOE
2316         int ddp_bytes;
2317         unsigned int mss = 0;
2318 #endif /* IXGBE_FCOE */
2319         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2320         bool xdp_xmit = false;
2321         struct xdp_buff xdp;
2322
2323         xdp.rxq = &rx_ring->xdp_rxq;
2324
2325         while (likely(total_rx_packets < budget)) {
2326                 union ixgbe_adv_rx_desc *rx_desc;
2327                 struct ixgbe_rx_buffer *rx_buffer;
2328                 struct sk_buff *skb;
2329                 unsigned int size;
2330
2331                 /* return some buffers to hardware, one at a time is too slow */
2332                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2333                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2334                         cleaned_count = 0;
2335                 }
2336
2337                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2338                 size = le16_to_cpu(rx_desc->wb.upper.length);
2339                 if (!size)
2340                         break;
2341
2342                 /* This memory barrier is needed to keep us from reading
2343                  * any other fields out of the rx_desc until we know the
2344                  * descriptor has been written back
2345                  */
2346                 dma_rmb();
2347
2348                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2349
2350                 /* retrieve a buffer from the ring */
2351                 if (!skb) {
2352                         xdp.data = page_address(rx_buffer->page) +
2353                                    rx_buffer->page_offset;
2354                         xdp.data_meta = xdp.data;
2355                         xdp.data_hard_start = xdp.data -
2356                                               ixgbe_rx_offset(rx_ring);
2357                         xdp.data_end = xdp.data + size;
2358
2359                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2360                 }
2361
2362                 if (IS_ERR(skb)) {
2363                         if (PTR_ERR(skb) == -IXGBE_XDP_TX) {
2364                                 xdp_xmit = true;
2365                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2366                         } else {
2367                                 rx_buffer->pagecnt_bias++;
2368                         }
2369                         total_rx_packets++;
2370                         total_rx_bytes += size;
2371                 } else if (skb) {
2372                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2373                 } else if (ring_uses_build_skb(rx_ring)) {
2374                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2375                                               &xdp, rx_desc);
2376                 } else {
2377                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2378                                                   &xdp, rx_desc);
2379                 }
2380
2381                 /* exit if we failed to retrieve a buffer */
2382                 if (!skb) {
2383                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2384                         rx_buffer->pagecnt_bias++;
2385                         break;
2386                 }
2387
2388                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2389                 cleaned_count++;
2390
2391                 /* place incomplete frames back on ring for completion */
2392                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2393                         continue;
2394
2395                 /* verify the packet layout is correct */
2396                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2397                         continue;
2398
2399                 /* probably a little skewed due to removing CRC */
2400                 total_rx_bytes += skb->len;
2401
2402                 /* populate checksum, timestamp, VLAN, and protocol */
2403                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2404
2405 #ifdef IXGBE_FCOE
2406                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2407                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2408                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2409                         /* include DDPed FCoE data */
2410                         if (ddp_bytes > 0) {
2411                                 if (!mss) {
2412                                         mss = rx_ring->netdev->mtu -
2413                                                 sizeof(struct fcoe_hdr) -
2414                                                 sizeof(struct fc_frame_header) -
2415                                                 sizeof(struct fcoe_crc_eof);
2416                                         if (mss > 512)
2417                                                 mss &= ~511;
2418                                 }
2419                                 total_rx_bytes += ddp_bytes;
2420                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2421                                                                  mss);
2422                         }
2423                         if (!ddp_bytes) {
2424                                 dev_kfree_skb_any(skb);
2425                                 continue;
2426                         }
2427                 }
2428
2429 #endif /* IXGBE_FCOE */
2430                 ixgbe_rx_skb(q_vector, skb);
2431
2432                 /* update budget accounting */
2433                 total_rx_packets++;
2434         }
2435
2436         if (xdp_xmit) {
2437                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2438
2439                 /* Force memory writes to complete before letting h/w
2440                  * know there are new descriptors to fetch.
2441                  */
2442                 wmb();
2443                 writel(ring->next_to_use, ring->tail);
2444
2445                 xdp_do_flush_map();
2446         }
2447
2448         u64_stats_update_begin(&rx_ring->syncp);
2449         rx_ring->stats.packets += total_rx_packets;
2450         rx_ring->stats.bytes += total_rx_bytes;
2451         u64_stats_update_end(&rx_ring->syncp);
2452         q_vector->rx.total_packets += total_rx_packets;
2453         q_vector->rx.total_bytes += total_rx_bytes;
2454
2455         return total_rx_packets;
2456 }
2457
2458 /**
2459  * ixgbe_configure_msix - Configure MSI-X hardware
2460  * @adapter: board private structure
2461  *
2462  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2463  * interrupts.
2464  **/
2465 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2466 {
2467         struct ixgbe_q_vector *q_vector;
2468         int v_idx;
2469         u32 mask;
2470
2471         /* Populate MSIX to EITR Select */
2472         if (adapter->num_vfs > 32) {
2473                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2474                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2475         }
2476
2477         /*
2478          * Populate the IVAR table and set the ITR values to the
2479          * corresponding register.
2480          */
2481         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2482                 struct ixgbe_ring *ring;
2483                 q_vector = adapter->q_vector[v_idx];
2484
2485                 ixgbe_for_each_ring(ring, q_vector->rx)
2486                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2487
2488                 ixgbe_for_each_ring(ring, q_vector->tx)
2489                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2490
2491                 ixgbe_write_eitr(q_vector);
2492         }
2493
2494         switch (adapter->hw.mac.type) {
2495         case ixgbe_mac_82598EB:
2496                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2497                                v_idx);
2498                 break;
2499         case ixgbe_mac_82599EB:
2500         case ixgbe_mac_X540:
2501         case ixgbe_mac_X550:
2502         case ixgbe_mac_X550EM_x:
2503         case ixgbe_mac_x550em_a:
2504                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2505                 break;
2506         default:
2507                 break;
2508         }
2509         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2510
2511         /* set up to autoclear timer, and the vectors */
2512         mask = IXGBE_EIMS_ENABLE_MASK;
2513         mask &= ~(IXGBE_EIMS_OTHER |
2514                   IXGBE_EIMS_MAILBOX |
2515                   IXGBE_EIMS_LSC);
2516
2517         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2518 }
2519
2520 /**
2521  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2522  * @q_vector: structure containing interrupt and ring information
2523  * @ring_container: structure containing ring performance data
2524  *
2525  *      Stores a new ITR value based on packets and byte
2526  *      counts during the last interrupt.  The advantage of per interrupt
2527  *      computation is faster updates and more accurate ITR for the current
2528  *      traffic pattern.  Constants in this function were computed
2529  *      based on theoretical maximum wire speed and thresholds were set based
2530  *      on testing data as well as attempting to minimize response time
2531  *      while increasing bulk throughput.
2532  **/
2533 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2534                              struct ixgbe_ring_container *ring_container)
2535 {
2536         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2537                            IXGBE_ITR_ADAPTIVE_LATENCY;
2538         unsigned int avg_wire_size, packets, bytes;
2539         unsigned long next_update = jiffies;
2540
2541         /* If we don't have any rings just leave ourselves set for maximum
2542          * possible latency so we take ourselves out of the equation.
2543          */
2544         if (!ring_container->ring)
2545                 return;
2546
2547         /* If we didn't update within up to 1 - 2 jiffies we can assume
2548          * that either packets are coming in so slow there hasn't been
2549          * any work, or that there is so much work that NAPI is dealing
2550          * with interrupt moderation and we don't need to do anything.
2551          */
2552         if (time_after(next_update, ring_container->next_update))
2553                 goto clear_counts;
2554
2555         packets = ring_container->total_packets;
2556
2557         /* We have no packets to actually measure against. This means
2558          * either one of the other queues on this vector is active or
2559          * we are a Tx queue doing TSO with too high of an interrupt rate.
2560          *
2561          * When this occurs just tick up our delay by the minimum value
2562          * and hope that this extra delay will prevent us from being called
2563          * without any work on our queue.
2564          */
2565         if (!packets) {
2566                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2567                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2568                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2569                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2570                 goto clear_counts;
2571         }
2572
2573         bytes = ring_container->total_bytes;
2574
2575         /* If packets are less than 4 or bytes are less than 9000 assume
2576          * insufficient data to use bulk rate limiting approach. We are
2577          * likely latency driven.
2578          */
2579         if (packets < 4 && bytes < 9000) {
2580                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2581                 goto adjust_by_size;
2582         }
2583
2584         /* Between 4 and 48 we can assume that our current interrupt delay
2585          * is only slightly too low. As such we should increase it by a small
2586          * fixed amount.
2587          */
2588         if (packets < 48) {
2589                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2590                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2591                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2592                 goto clear_counts;
2593         }
2594
2595         /* Between 48 and 96 is our "goldilocks" zone where we are working
2596          * out "just right". Just report that our current ITR is good for us.
2597          */
2598         if (packets < 96) {
2599                 itr = q_vector->itr >> 2;
2600                 goto clear_counts;
2601         }
2602
2603         /* If packet count is 96 or greater we are likely looking at a slight
2604          * overrun of the delay we want. Try halving our delay to see if that
2605          * will cut the number of packets in half per interrupt.
2606          */
2607         if (packets < 256) {
2608                 itr = q_vector->itr >> 3;
2609                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2610                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2611                 goto clear_counts;
2612         }
2613
2614         /* The paths below assume we are dealing with a bulk ITR since number
2615          * of packets is 256 or greater. We are just going to have to compute
2616          * a value and try to bring the count under control, though for smaller
2617          * packet sizes there isn't much we can do as NAPI polling will likely
2618          * be kicking in sooner rather than later.
2619          */
2620         itr = IXGBE_ITR_ADAPTIVE_BULK;
2621
2622 adjust_by_size:
2623         /* If packet counts are 256 or greater we can assume we have a gross
2624          * overestimation of what the rate should be. Instead of trying to fine
2625          * tune it just use the formula below to try and dial in an exact value
2626          * give the current packet size of the frame.
2627          */
2628         avg_wire_size = bytes / packets;
2629
2630         /* The following is a crude approximation of:
2631          *  wmem_default / (size + overhead) = desired_pkts_per_int
2632          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2633          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2634          *
2635          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2636          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2637          * formula down to
2638          *
2639          *  (170 * (size + 24)) / (size + 640) = ITR
2640          *
2641          * We first do some math on the packet size and then finally bitshift
2642          * by 8 after rounding up. We also have to account for PCIe link speed
2643          * difference as ITR scales based on this.
2644          */
2645         if (avg_wire_size <= 60) {
2646                 /* Start at 50k ints/sec */
2647                 avg_wire_size = 5120;
2648         } else if (avg_wire_size <= 316) {
2649                 /* 50K ints/sec to 16K ints/sec */
2650                 avg_wire_size *= 40;
2651                 avg_wire_size += 2720;
2652         } else if (avg_wire_size <= 1084) {
2653                 /* 16K ints/sec to 9.2K ints/sec */
2654                 avg_wire_size *= 15;
2655                 avg_wire_size += 11452;
2656         } else if (avg_wire_size <= 1980) {
2657                 /* 9.2K ints/sec to 8K ints/sec */
2658                 avg_wire_size *= 5;
2659                 avg_wire_size += 22420;
2660         } else {
2661                 /* plateau at a limit of 8K ints/sec */
2662                 avg_wire_size = 32256;
2663         }
2664
2665         /* If we are in low latency mode half our delay which doubles the rate
2666          * to somewhere between 100K to 16K ints/sec
2667          */
2668         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2669                 avg_wire_size >>= 1;
2670
2671         /* Resultant value is 256 times larger than it needs to be. This
2672          * gives us room to adjust the value as needed to either increase
2673          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2674          *
2675          * Use addition as we have already recorded the new latency flag
2676          * for the ITR value.
2677          */
2678         switch (q_vector->adapter->link_speed) {
2679         case IXGBE_LINK_SPEED_10GB_FULL:
2680         case IXGBE_LINK_SPEED_100_FULL:
2681         default:
2682                 itr += DIV_ROUND_UP(avg_wire_size,
2683                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2684                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2685                 break;
2686         case IXGBE_LINK_SPEED_2_5GB_FULL:
2687         case IXGBE_LINK_SPEED_1GB_FULL:
2688         case IXGBE_LINK_SPEED_10_FULL:
2689                 itr += DIV_ROUND_UP(avg_wire_size,
2690                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2691                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2692                 break;
2693         }
2694
2695 clear_counts:
2696         /* write back value */
2697         ring_container->itr = itr;
2698
2699         /* next update should occur within next jiffy */
2700         ring_container->next_update = next_update + 1;
2701
2702         ring_container->total_bytes = 0;
2703         ring_container->total_packets = 0;
2704 }
2705
2706 /**
2707  * ixgbe_write_eitr - write EITR register in hardware specific way
2708  * @q_vector: structure containing interrupt and ring information
2709  *
2710  * This function is made to be called by ethtool and by the driver
2711  * when it needs to update EITR registers at runtime.  Hardware
2712  * specific quirks/differences are taken care of here.
2713  */
2714 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2715 {
2716         struct ixgbe_adapter *adapter = q_vector->adapter;
2717         struct ixgbe_hw *hw = &adapter->hw;
2718         int v_idx = q_vector->v_idx;
2719         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2720
2721         switch (adapter->hw.mac.type) {
2722         case ixgbe_mac_82598EB:
2723                 /* must write high and low 16 bits to reset counter */
2724                 itr_reg |= (itr_reg << 16);
2725                 break;
2726         case ixgbe_mac_82599EB:
2727         case ixgbe_mac_X540:
2728         case ixgbe_mac_X550:
2729         case ixgbe_mac_X550EM_x:
2730         case ixgbe_mac_x550em_a:
2731                 /*
2732                  * set the WDIS bit to not clear the timer bits and cause an
2733                  * immediate assertion of the interrupt
2734                  */
2735                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2736                 break;
2737         default:
2738                 break;
2739         }
2740         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2741 }
2742
2743 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2744 {
2745         u32 new_itr;
2746
2747         ixgbe_update_itr(q_vector, &q_vector->tx);
2748         ixgbe_update_itr(q_vector, &q_vector->rx);
2749
2750         /* use the smallest value of new ITR delay calculations */
2751         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2752
2753         /* Clear latency flag if set, shift into correct position */
2754         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2755         new_itr <<= 2;
2756
2757         if (new_itr != q_vector->itr) {
2758                 /* save the algorithm value here */
2759                 q_vector->itr = new_itr;
2760
2761                 ixgbe_write_eitr(q_vector);
2762         }
2763 }
2764
2765 /**
2766  * ixgbe_check_overtemp_subtask - check for over temperature
2767  * @adapter: pointer to adapter
2768  **/
2769 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2770 {
2771         struct ixgbe_hw *hw = &adapter->hw;
2772         u32 eicr = adapter->interrupt_event;
2773         s32 rc;
2774
2775         if (test_bit(__IXGBE_DOWN, &adapter->state))
2776                 return;
2777
2778         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2779                 return;
2780
2781         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2782
2783         switch (hw->device_id) {
2784         case IXGBE_DEV_ID_82599_T3_LOM:
2785                 /*
2786                  * Since the warning interrupt is for both ports
2787                  * we don't have to check if:
2788                  *  - This interrupt wasn't for our port.
2789                  *  - We may have missed the interrupt so always have to
2790                  *    check if we  got a LSC
2791                  */
2792                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2793                     !(eicr & IXGBE_EICR_LSC))
2794                         return;
2795
2796                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2797                         u32 speed;
2798                         bool link_up = false;
2799
2800                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2801
2802                         if (link_up)
2803                                 return;
2804                 }
2805
2806                 /* Check if this is not due to overtemp */
2807                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2808                         return;
2809
2810                 break;
2811         case IXGBE_DEV_ID_X550EM_A_1G_T:
2812         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2813                 rc = hw->phy.ops.check_overtemp(hw);
2814                 if (rc != IXGBE_ERR_OVERTEMP)
2815                         return;
2816                 break;
2817         default:
2818                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2819                         return;
2820                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2821                         return;
2822                 break;
2823         }
2824         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2825
2826         adapter->interrupt_event = 0;
2827 }
2828
2829 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2830 {
2831         struct ixgbe_hw *hw = &adapter->hw;
2832
2833         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2834             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2835                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2836                 /* write to clear the interrupt */
2837                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2838         }
2839 }
2840
2841 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2842 {
2843         struct ixgbe_hw *hw = &adapter->hw;
2844
2845         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2846                 return;
2847
2848         switch (adapter->hw.mac.type) {
2849         case ixgbe_mac_82599EB:
2850                 /*
2851                  * Need to check link state so complete overtemp check
2852                  * on service task
2853                  */
2854                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2855                      (eicr & IXGBE_EICR_LSC)) &&
2856                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2857                         adapter->interrupt_event = eicr;
2858                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2859                         ixgbe_service_event_schedule(adapter);
2860                         return;
2861                 }
2862                 return;
2863         case ixgbe_mac_x550em_a:
2864                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2865                         adapter->interrupt_event = eicr;
2866                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2867                         ixgbe_service_event_schedule(adapter);
2868                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2869                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2870                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2871                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2872                 }
2873                 return;
2874         case ixgbe_mac_X550:
2875         case ixgbe_mac_X540:
2876                 if (!(eicr & IXGBE_EICR_TS))
2877                         return;
2878                 break;
2879         default:
2880                 return;
2881         }
2882
2883         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2884 }
2885
2886 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2887 {
2888         switch (hw->mac.type) {
2889         case ixgbe_mac_82598EB:
2890                 if (hw->phy.type == ixgbe_phy_nl)
2891                         return true;
2892                 return false;
2893         case ixgbe_mac_82599EB:
2894         case ixgbe_mac_X550EM_x:
2895         case ixgbe_mac_x550em_a:
2896                 switch (hw->mac.ops.get_media_type(hw)) {
2897                 case ixgbe_media_type_fiber:
2898                 case ixgbe_media_type_fiber_qsfp:
2899                         return true;
2900                 default:
2901                         return false;
2902                 }
2903         default:
2904                 return false;
2905         }
2906 }
2907
2908 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2909 {
2910         struct ixgbe_hw *hw = &adapter->hw;
2911         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2912
2913         if (!ixgbe_is_sfp(hw))
2914                 return;
2915
2916         /* Later MAC's use different SDP */
2917         if (hw->mac.type >= ixgbe_mac_X540)
2918                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2919
2920         if (eicr & eicr_mask) {
2921                 /* Clear the interrupt */
2922                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2923                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2924                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2925                         adapter->sfp_poll_time = 0;
2926                         ixgbe_service_event_schedule(adapter);
2927                 }
2928         }
2929
2930         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2931             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2932                 /* Clear the interrupt */
2933                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2934                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2935                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2936                         ixgbe_service_event_schedule(adapter);
2937                 }
2938         }
2939 }
2940
2941 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2942 {
2943         struct ixgbe_hw *hw = &adapter->hw;
2944
2945         adapter->lsc_int++;
2946         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2947         adapter->link_check_timeout = jiffies;
2948         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2949                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2950                 IXGBE_WRITE_FLUSH(hw);
2951                 ixgbe_service_event_schedule(adapter);
2952         }
2953 }
2954
2955 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2956                                            u64 qmask)
2957 {
2958         u32 mask;
2959         struct ixgbe_hw *hw = &adapter->hw;
2960
2961         switch (hw->mac.type) {
2962         case ixgbe_mac_82598EB:
2963                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2964                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2965                 break;
2966         case ixgbe_mac_82599EB:
2967         case ixgbe_mac_X540:
2968         case ixgbe_mac_X550:
2969         case ixgbe_mac_X550EM_x:
2970         case ixgbe_mac_x550em_a:
2971                 mask = (qmask & 0xFFFFFFFF);
2972                 if (mask)
2973                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2974                 mask = (qmask >> 32);
2975                 if (mask)
2976                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2977                 break;
2978         default:
2979                 break;
2980         }
2981         /* skip the flush */
2982 }
2983
2984 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2985                                             u64 qmask)
2986 {
2987         u32 mask;
2988         struct ixgbe_hw *hw = &adapter->hw;
2989
2990         switch (hw->mac.type) {
2991         case ixgbe_mac_82598EB:
2992                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2993                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2994                 break;
2995         case ixgbe_mac_82599EB:
2996         case ixgbe_mac_X540:
2997         case ixgbe_mac_X550:
2998         case ixgbe_mac_X550EM_x:
2999         case ixgbe_mac_x550em_a:
3000                 mask = (qmask & 0xFFFFFFFF);
3001                 if (mask)
3002                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
3003                 mask = (qmask >> 32);
3004                 if (mask)
3005                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
3006                 break;
3007         default:
3008                 break;
3009         }
3010         /* skip the flush */
3011 }
3012
3013 /**
3014  * ixgbe_irq_enable - Enable default interrupt generation settings
3015  * @adapter: board private structure
3016  **/
3017 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
3018                                     bool flush)
3019 {
3020         struct ixgbe_hw *hw = &adapter->hw;
3021         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
3022
3023         /* don't reenable LSC while waiting for link */
3024         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
3025                 mask &= ~IXGBE_EIMS_LSC;
3026
3027         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3028                 switch (adapter->hw.mac.type) {
3029                 case ixgbe_mac_82599EB:
3030                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3031                         break;
3032                 case ixgbe_mac_X540:
3033                 case ixgbe_mac_X550:
3034                 case ixgbe_mac_X550EM_x:
3035                 case ixgbe_mac_x550em_a:
3036                         mask |= IXGBE_EIMS_TS;
3037                         break;
3038                 default:
3039                         break;
3040                 }
3041         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3042                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3043         switch (adapter->hw.mac.type) {
3044         case ixgbe_mac_82599EB:
3045                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3046                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3047                 /* fall through */
3048         case ixgbe_mac_X540:
3049         case ixgbe_mac_X550:
3050         case ixgbe_mac_X550EM_x:
3051         case ixgbe_mac_x550em_a:
3052                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3053                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3054                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3055                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3056                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3057                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3058                 mask |= IXGBE_EIMS_ECC;
3059                 mask |= IXGBE_EIMS_MAILBOX;
3060                 break;
3061         default:
3062                 break;
3063         }
3064
3065         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3066             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3067                 mask |= IXGBE_EIMS_FLOW_DIR;
3068
3069         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3070         if (queues)
3071                 ixgbe_irq_enable_queues(adapter, ~0);
3072         if (flush)
3073                 IXGBE_WRITE_FLUSH(&adapter->hw);
3074 }
3075
3076 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3077 {
3078         struct ixgbe_adapter *adapter = data;
3079         struct ixgbe_hw *hw = &adapter->hw;
3080         u32 eicr;
3081
3082         /*
3083          * Workaround for Silicon errata.  Use clear-by-write instead
3084          * of clear-by-read.  Reading with EICS will return the
3085          * interrupt causes without clearing, which later be done
3086          * with the write to EICR.
3087          */
3088         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3089
3090         /* The lower 16bits of the EICR register are for the queue interrupts
3091          * which should be masked here in order to not accidentally clear them if
3092          * the bits are high when ixgbe_msix_other is called. There is a race
3093          * condition otherwise which results in possible performance loss
3094          * especially if the ixgbe_msix_other interrupt is triggering
3095          * consistently (as it would when PPS is turned on for the X540 device)
3096          */
3097         eicr &= 0xFFFF0000;
3098
3099         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3100
3101         if (eicr & IXGBE_EICR_LSC)
3102                 ixgbe_check_lsc(adapter);
3103
3104         if (eicr & IXGBE_EICR_MAILBOX)
3105                 ixgbe_msg_task(adapter);
3106
3107         switch (hw->mac.type) {
3108         case ixgbe_mac_82599EB:
3109         case ixgbe_mac_X540:
3110         case ixgbe_mac_X550:
3111         case ixgbe_mac_X550EM_x:
3112         case ixgbe_mac_x550em_a:
3113                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3114                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3115                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3116                         ixgbe_service_event_schedule(adapter);
3117                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3118                                         IXGBE_EICR_GPI_SDP0_X540);
3119                 }
3120                 if (eicr & IXGBE_EICR_ECC) {
3121                         e_info(link, "Received ECC Err, initiating reset\n");
3122                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3123                         ixgbe_service_event_schedule(adapter);
3124                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3125                 }
3126                 /* Handle Flow Director Full threshold interrupt */
3127                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3128                         int reinit_count = 0;
3129                         int i;
3130                         for (i = 0; i < adapter->num_tx_queues; i++) {
3131                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3132                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3133                                                        &ring->state))
3134                                         reinit_count++;
3135                         }
3136                         if (reinit_count) {
3137                                 /* no more flow director interrupts until after init */
3138                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3139                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3140                                 ixgbe_service_event_schedule(adapter);
3141                         }
3142                 }
3143                 ixgbe_check_sfp_event(adapter, eicr);
3144                 ixgbe_check_overtemp_event(adapter, eicr);
3145                 break;
3146         default:
3147                 break;
3148         }
3149
3150         ixgbe_check_fan_failure(adapter, eicr);
3151
3152         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3153                 ixgbe_ptp_check_pps_event(adapter);
3154
3155         /* re-enable the original interrupt state, no lsc, no queues */
3156         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3157                 ixgbe_irq_enable(adapter, false, false);
3158
3159         return IRQ_HANDLED;
3160 }
3161
3162 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3163 {
3164         struct ixgbe_q_vector *q_vector = data;
3165
3166         /* EIAM disabled interrupts (on this vector) for us */
3167
3168         if (q_vector->rx.ring || q_vector->tx.ring)
3169                 napi_schedule_irqoff(&q_vector->napi);
3170
3171         return IRQ_HANDLED;
3172 }
3173
3174 /**
3175  * ixgbe_poll - NAPI Rx polling callback
3176  * @napi: structure for representing this polling device
3177  * @budget: how many packets driver is allowed to clean
3178  *
3179  * This function is used for legacy and MSI, NAPI mode
3180  **/
3181 int ixgbe_poll(struct napi_struct *napi, int budget)
3182 {
3183         struct ixgbe_q_vector *q_vector =
3184                                 container_of(napi, struct ixgbe_q_vector, napi);
3185         struct ixgbe_adapter *adapter = q_vector->adapter;
3186         struct ixgbe_ring *ring;
3187         int per_ring_budget, work_done = 0;
3188         bool clean_complete = true;
3189
3190 #ifdef CONFIG_IXGBE_DCA
3191         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3192                 ixgbe_update_dca(q_vector);
3193 #endif
3194
3195         ixgbe_for_each_ring(ring, q_vector->tx) {
3196                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3197                         clean_complete = false;
3198         }
3199
3200         /* Exit if we are called by netpoll */
3201         if (budget <= 0)
3202                 return budget;
3203
3204         /* attempt to distribute budget to each queue fairly, but don't allow
3205          * the budget to go below 1 because we'll exit polling */
3206         if (q_vector->rx.count > 1)
3207                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3208         else
3209                 per_ring_budget = budget;
3210
3211         ixgbe_for_each_ring(ring, q_vector->rx) {
3212                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3213                                                  per_ring_budget);
3214
3215                 work_done += cleaned;
3216                 if (cleaned >= per_ring_budget)
3217                         clean_complete = false;
3218         }
3219
3220         /* If all work not completed, return budget and keep polling */
3221         if (!clean_complete)
3222                 return budget;
3223
3224         /* all work done, exit the polling mode */
3225         napi_complete_done(napi, work_done);
3226         if (adapter->rx_itr_setting & 1)
3227                 ixgbe_set_itr(q_vector);
3228         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3229                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3230
3231         return min(work_done, budget - 1);
3232 }
3233
3234 /**
3235  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3236  * @adapter: board private structure
3237  *
3238  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3239  * interrupts from the kernel.
3240  **/
3241 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3242 {
3243         struct net_device *netdev = adapter->netdev;
3244         unsigned int ri = 0, ti = 0;
3245         int vector, err;
3246
3247         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3248                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3249                 struct msix_entry *entry = &adapter->msix_entries[vector];
3250
3251                 if (q_vector->tx.ring && q_vector->rx.ring) {
3252                         snprintf(q_vector->name, sizeof(q_vector->name),
3253                                  "%s-TxRx-%u", netdev->name, ri++);
3254                         ti++;
3255                 } else if (q_vector->rx.ring) {
3256                         snprintf(q_vector->name, sizeof(q_vector->name),
3257                                  "%s-rx-%u", netdev->name, ri++);
3258                 } else if (q_vector->tx.ring) {
3259                         snprintf(q_vector->name, sizeof(q_vector->name),
3260                                  "%s-tx-%u", netdev->name, ti++);
3261                 } else {
3262                         /* skip this unused q_vector */
3263                         continue;
3264                 }
3265                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3266                                   q_vector->name, q_vector);
3267                 if (err) {
3268                         e_err(probe, "request_irq failed for MSIX interrupt "
3269                               "Error: %d\n", err);
3270                         goto free_queue_irqs;
3271                 }
3272                 /* If Flow Director is enabled, set interrupt affinity */
3273                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3274                         /* assign the mask for this irq */
3275                         irq_set_affinity_hint(entry->vector,
3276                                               &q_vector->affinity_mask);
3277                 }
3278         }
3279
3280         err = request_irq(adapter->msix_entries[vector].vector,
3281                           ixgbe_msix_other, 0, netdev->name, adapter);
3282         if (err) {
3283                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3284                 goto free_queue_irqs;
3285         }
3286
3287         return 0;
3288
3289 free_queue_irqs:
3290         while (vector) {
3291                 vector--;
3292                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3293                                       NULL);
3294                 free_irq(adapter->msix_entries[vector].vector,
3295                          adapter->q_vector[vector]);
3296         }
3297         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3298         pci_disable_msix(adapter->pdev);
3299         kfree(adapter->msix_entries);
3300         adapter->msix_entries = NULL;
3301         return err;
3302 }
3303
3304 /**
3305  * ixgbe_intr - legacy mode Interrupt Handler
3306  * @irq: interrupt number
3307  * @data: pointer to a network interface device structure
3308  **/
3309 static irqreturn_t ixgbe_intr(int irq, void *data)
3310 {
3311         struct ixgbe_adapter *adapter = data;
3312         struct ixgbe_hw *hw = &adapter->hw;
3313         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3314         u32 eicr;
3315
3316         /*
3317          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3318          * before the read of EICR.
3319          */
3320         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3321
3322         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3323          * therefore no explicit interrupt disable is necessary */
3324         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3325         if (!eicr) {
3326                 /*
3327                  * shared interrupt alert!
3328                  * make sure interrupts are enabled because the read will
3329                  * have disabled interrupts due to EIAM
3330                  * finish the workaround of silicon errata on 82598.  Unmask
3331                  * the interrupt that we masked before the EICR read.
3332                  */
3333                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3334                         ixgbe_irq_enable(adapter, true, true);
3335                 return IRQ_NONE;        /* Not our interrupt */
3336         }
3337
3338         if (eicr & IXGBE_EICR_LSC)
3339                 ixgbe_check_lsc(adapter);
3340
3341         switch (hw->mac.type) {
3342         case ixgbe_mac_82599EB:
3343                 ixgbe_check_sfp_event(adapter, eicr);
3344                 /* Fall through */
3345         case ixgbe_mac_X540:
3346         case ixgbe_mac_X550:
3347         case ixgbe_mac_X550EM_x:
3348         case ixgbe_mac_x550em_a:
3349                 if (eicr & IXGBE_EICR_ECC) {
3350                         e_info(link, "Received ECC Err, initiating reset\n");
3351                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3352                         ixgbe_service_event_schedule(adapter);
3353                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3354                 }
3355                 ixgbe_check_overtemp_event(adapter, eicr);
3356                 break;
3357         default:
3358                 break;
3359         }
3360
3361         ixgbe_check_fan_failure(adapter, eicr);
3362         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3363                 ixgbe_ptp_check_pps_event(adapter);
3364
3365         /* would disable interrupts here but EIAM disabled it */
3366         napi_schedule_irqoff(&q_vector->napi);
3367
3368         /*
3369          * re-enable link(maybe) and non-queue interrupts, no flush.
3370          * ixgbe_poll will re-enable the queue interrupts
3371          */
3372         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3373                 ixgbe_irq_enable(adapter, false, false);
3374
3375         return IRQ_HANDLED;
3376 }
3377
3378 /**
3379  * ixgbe_request_irq - initialize interrupts
3380  * @adapter: board private structure
3381  *
3382  * Attempts to configure interrupts using the best available
3383  * capabilities of the hardware and kernel.
3384  **/
3385 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3386 {
3387         struct net_device *netdev = adapter->netdev;
3388         int err;
3389
3390         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3391                 err = ixgbe_request_msix_irqs(adapter);
3392         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3393                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3394                                   netdev->name, adapter);
3395         else
3396                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3397                                   netdev->name, adapter);
3398
3399         if (err)
3400                 e_err(probe, "request_irq failed, Error %d\n", err);
3401
3402         return err;
3403 }
3404
3405 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3406 {
3407         int vector;
3408
3409         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3410                 free_irq(adapter->pdev->irq, adapter);
3411                 return;
3412         }
3413
3414         if (!adapter->msix_entries)
3415                 return;
3416
3417         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3418                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3419                 struct msix_entry *entry = &adapter->msix_entries[vector];
3420
3421                 /* free only the irqs that were actually requested */
3422                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3423                         continue;
3424
3425                 /* clear the affinity_mask in the IRQ descriptor */
3426                 irq_set_affinity_hint(entry->vector, NULL);
3427
3428                 free_irq(entry->vector, q_vector);
3429         }
3430
3431         free_irq(adapter->msix_entries[vector].vector, adapter);
3432 }
3433
3434 /**
3435  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3436  * @adapter: board private structure
3437  **/
3438 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3439 {
3440         switch (adapter->hw.mac.type) {
3441         case ixgbe_mac_82598EB:
3442                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3443                 break;
3444         case ixgbe_mac_82599EB:
3445         case ixgbe_mac_X540:
3446         case ixgbe_mac_X550:
3447         case ixgbe_mac_X550EM_x:
3448         case ixgbe_mac_x550em_a:
3449                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3450                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3451                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3452                 break;
3453         default:
3454                 break;
3455         }
3456         IXGBE_WRITE_FLUSH(&adapter->hw);
3457         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3458                 int vector;
3459
3460                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3461                         synchronize_irq(adapter->msix_entries[vector].vector);
3462
3463                 synchronize_irq(adapter->msix_entries[vector++].vector);
3464         } else {
3465                 synchronize_irq(adapter->pdev->irq);
3466         }
3467 }
3468
3469 /**
3470  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3471  *
3472  **/
3473 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3474 {
3475         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3476
3477         ixgbe_write_eitr(q_vector);
3478
3479         ixgbe_set_ivar(adapter, 0, 0, 0);
3480         ixgbe_set_ivar(adapter, 1, 0, 0);
3481
3482         e_info(hw, "Legacy interrupt IVAR setup done\n");
3483 }
3484
3485 /**
3486  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3487  * @adapter: board private structure
3488  * @ring: structure containing ring specific data
3489  *
3490  * Configure the Tx descriptor ring after a reset.
3491  **/
3492 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3493                              struct ixgbe_ring *ring)
3494 {
3495         struct ixgbe_hw *hw = &adapter->hw;
3496         u64 tdba = ring->dma;
3497         int wait_loop = 10;
3498         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3499         u8 reg_idx = ring->reg_idx;
3500
3501         /* disable queue to avoid issues while updating state */
3502         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3503         IXGBE_WRITE_FLUSH(hw);
3504
3505         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3506                         (tdba & DMA_BIT_MASK(32)));
3507         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3508         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3509                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3510         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3511         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3512         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3513
3514         /*
3515          * set WTHRESH to encourage burst writeback, it should not be set
3516          * higher than 1 when:
3517          * - ITR is 0 as it could cause false TX hangs
3518          * - ITR is set to > 100k int/sec and BQL is enabled
3519          *
3520          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3521          * to or less than the number of on chip descriptors, which is
3522          * currently 40.
3523          */
3524         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3525                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3526         else
3527                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3528
3529         /*
3530          * Setting PTHRESH to 32 both improves performance
3531          * and avoids a TX hang with DFP enabled
3532          */
3533         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3534                    32;          /* PTHRESH = 32 */
3535
3536         /* reinitialize flowdirector state */
3537         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3538                 ring->atr_sample_rate = adapter->atr_sample_rate;
3539                 ring->atr_count = 0;
3540                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3541         } else {
3542                 ring->atr_sample_rate = 0;
3543         }
3544
3545         /* initialize XPS */
3546         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3547                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3548
3549                 if (q_vector)
3550                         netif_set_xps_queue(ring->netdev,
3551                                             &q_vector->affinity_mask,
3552                                             ring->queue_index);
3553         }
3554
3555         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3556
3557         /* reinitialize tx_buffer_info */
3558         memset(ring->tx_buffer_info, 0,
3559                sizeof(struct ixgbe_tx_buffer) * ring->count);
3560
3561         /* enable queue */
3562         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3563
3564         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3565         if (hw->mac.type == ixgbe_mac_82598EB &&
3566             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3567                 return;
3568
3569         /* poll to verify queue is enabled */
3570         do {
3571                 usleep_range(1000, 2000);
3572                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3573         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3574         if (!wait_loop)
3575                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3576 }
3577
3578 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3579 {
3580         struct ixgbe_hw *hw = &adapter->hw;
3581         u32 rttdcs, mtqc;
3582         u8 tcs = netdev_get_num_tc(adapter->netdev);
3583
3584         if (hw->mac.type == ixgbe_mac_82598EB)
3585                 return;
3586
3587         /* disable the arbiter while setting MTQC */
3588         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3589         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3590         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3591
3592         /* set transmit pool layout */
3593         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3594                 mtqc = IXGBE_MTQC_VT_ENA;
3595                 if (tcs > 4)
3596                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3597                 else if (tcs > 1)
3598                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3599                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3600                          IXGBE_82599_VMDQ_4Q_MASK)
3601                         mtqc |= IXGBE_MTQC_32VF;
3602                 else
3603                         mtqc |= IXGBE_MTQC_64VF;
3604         } else {
3605                 if (tcs > 4)
3606                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3607                 else if (tcs > 1)
3608                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3609                 else
3610                         mtqc = IXGBE_MTQC_64Q_1PB;
3611         }
3612
3613         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3614
3615         /* Enable Security TX Buffer IFG for multiple pb */
3616         if (tcs) {
3617                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3618                 sectx |= IXGBE_SECTX_DCB;
3619                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3620         }
3621
3622         /* re-enable the arbiter */
3623         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3624         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3625 }
3626
3627 /**
3628  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3629  * @adapter: board private structure
3630  *
3631  * Configure the Tx unit of the MAC after a reset.
3632  **/
3633 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3634 {
3635         struct ixgbe_hw *hw = &adapter->hw;
3636         u32 dmatxctl;
3637         u32 i;
3638
3639         ixgbe_setup_mtqc(adapter);
3640
3641         if (hw->mac.type != ixgbe_mac_82598EB) {
3642                 /* DMATXCTL.EN must be before Tx queues are enabled */
3643                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3644                 dmatxctl |= IXGBE_DMATXCTL_TE;
3645                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3646         }
3647
3648         /* Setup the HW Tx Head and Tail descriptor pointers */
3649         for (i = 0; i < adapter->num_tx_queues; i++)
3650                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3651         for (i = 0; i < adapter->num_xdp_queues; i++)
3652                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3653 }
3654
3655 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3656                                  struct ixgbe_ring *ring)
3657 {
3658         struct ixgbe_hw *hw = &adapter->hw;
3659         u8 reg_idx = ring->reg_idx;
3660         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3661
3662         srrctl |= IXGBE_SRRCTL_DROP_EN;
3663
3664         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3665 }
3666
3667 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3668                                   struct ixgbe_ring *ring)
3669 {
3670         struct ixgbe_hw *hw = &adapter->hw;
3671         u8 reg_idx = ring->reg_idx;
3672         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3673
3674         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3675
3676         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3677 }
3678
3679 #ifdef CONFIG_IXGBE_DCB
3680 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3681 #else
3682 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3683 #endif
3684 {
3685         int i;
3686         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3687
3688         if (adapter->ixgbe_ieee_pfc)
3689                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3690
3691         /*
3692          * We should set the drop enable bit if:
3693          *  SR-IOV is enabled
3694          *   or
3695          *  Number of Rx queues > 1 and flow control is disabled
3696          *
3697          *  This allows us to avoid head of line blocking for security
3698          *  and performance reasons.
3699          */
3700         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3701             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3702                 for (i = 0; i < adapter->num_rx_queues; i++)
3703                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3704         } else {
3705                 for (i = 0; i < adapter->num_rx_queues; i++)
3706                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3707         }
3708 }
3709
3710 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3711
3712 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3713                                    struct ixgbe_ring *rx_ring)
3714 {
3715         struct ixgbe_hw *hw = &adapter->hw;
3716         u32 srrctl;
3717         u8 reg_idx = rx_ring->reg_idx;
3718
3719         if (hw->mac.type == ixgbe_mac_82598EB) {
3720                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3721
3722                 /*
3723                  * if VMDq is not active we must program one srrctl register
3724                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3725                  */
3726                 reg_idx &= mask;
3727         }
3728
3729         /* configure header buffer length, needed for RSC */
3730         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3731
3732         /* configure the packet buffer length */
3733         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3734                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3735         else
3736                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3737
3738         /* configure descriptor type */
3739         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3740
3741         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3742 }
3743
3744 /**
3745  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3746  * @adapter: device handle
3747  *
3748  *  - 82598/82599/X540:     128
3749  *  - X550(non-SRIOV mode): 512
3750  *  - X550(SRIOV mode):     64
3751  */
3752 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3753 {
3754         if (adapter->hw.mac.type < ixgbe_mac_X550)
3755                 return 128;
3756         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3757                 return 64;
3758         else
3759                 return 512;
3760 }
3761
3762 /**
3763  * ixgbe_store_key - Write the RSS key to HW
3764  * @adapter: device handle
3765  *
3766  * Write the RSS key stored in adapter.rss_key to HW.
3767  */
3768 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3769 {
3770         struct ixgbe_hw *hw = &adapter->hw;
3771         int i;
3772
3773         for (i = 0; i < 10; i++)
3774                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3775 }
3776
3777 /**
3778  * ixgbe_init_rss_key - Initialize adapter RSS key
3779  * @adapter: device handle
3780  *
3781  * Allocates and initializes the RSS key if it is not allocated.
3782  **/
3783 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3784 {
3785         u32 *rss_key;
3786
3787         if (!adapter->rss_key) {
3788                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3789                 if (unlikely(!rss_key))
3790                         return -ENOMEM;
3791
3792                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3793                 adapter->rss_key = rss_key;
3794         }
3795
3796         return 0;
3797 }
3798
3799 /**
3800  * ixgbe_store_reta - Write the RETA table to HW
3801  * @adapter: device handle
3802  *
3803  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3804  */
3805 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3806 {
3807         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3808         struct ixgbe_hw *hw = &adapter->hw;
3809         u32 reta = 0;
3810         u32 indices_multi;
3811         u8 *indir_tbl = adapter->rss_indir_tbl;
3812
3813         /* Fill out the redirection table as follows:
3814          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3815          *    indices.
3816          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3817          *  - X550:       8 bit wide entries containing 6 bit RSS index
3818          */
3819         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3820                 indices_multi = 0x11;
3821         else
3822                 indices_multi = 0x1;
3823
3824         /* Write redirection table to HW */
3825         for (i = 0; i < reta_entries; i++) {
3826                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3827                 if ((i & 3) == 3) {
3828                         if (i < 128)
3829                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3830                         else
3831                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3832                                                 reta);
3833                         reta = 0;
3834                 }
3835         }
3836 }
3837
3838 /**
3839  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3840  * @adapter: device handle
3841  *
3842  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3843  */
3844 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3845 {
3846         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3847         struct ixgbe_hw *hw = &adapter->hw;
3848         u32 vfreta = 0;
3849         unsigned int pf_pool = adapter->num_vfs;
3850
3851         /* Write redirection table to HW */
3852         for (i = 0; i < reta_entries; i++) {
3853                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3854                 if ((i & 3) == 3) {
3855                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3856                                         vfreta);
3857                         vfreta = 0;
3858                 }
3859         }
3860 }
3861
3862 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3863 {
3864         u32 i, j;
3865         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3866         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3867
3868         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3869          * make full use of any rings they may have.  We will use the
3870          * PSRTYPE register to control how many rings we use within the PF.
3871          */
3872         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3873                 rss_i = 4;
3874
3875         /* Fill out hash function seeds */
3876         ixgbe_store_key(adapter);
3877
3878         /* Fill out redirection table */
3879         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3880
3881         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3882                 if (j == rss_i)
3883                         j = 0;
3884
3885                 adapter->rss_indir_tbl[i] = j;
3886         }
3887
3888         ixgbe_store_reta(adapter);
3889 }
3890
3891 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3892 {
3893         struct ixgbe_hw *hw = &adapter->hw;
3894         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3895         unsigned int pf_pool = adapter->num_vfs;
3896         int i, j;
3897
3898         /* Fill out hash function seeds */
3899         for (i = 0; i < 10; i++)
3900                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3901                                 *(adapter->rss_key + i));
3902
3903         /* Fill out the redirection table */
3904         for (i = 0, j = 0; i < 64; i++, j++) {
3905                 if (j == rss_i)
3906                         j = 0;
3907
3908                 adapter->rss_indir_tbl[i] = j;
3909         }
3910
3911         ixgbe_store_vfreta(adapter);
3912 }
3913
3914 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3915 {
3916         struct ixgbe_hw *hw = &adapter->hw;
3917         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3918         u32 rxcsum;
3919
3920         /* Disable indicating checksum in descriptor, enables RSS hash */
3921         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3922         rxcsum |= IXGBE_RXCSUM_PCSD;
3923         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3924
3925         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3926                 if (adapter->ring_feature[RING_F_RSS].mask)
3927                         mrqc = IXGBE_MRQC_RSSEN;
3928         } else {
3929                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3930
3931                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3932                         if (tcs > 4)
3933                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3934                         else if (tcs > 1)
3935                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3936                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3937                                  IXGBE_82599_VMDQ_4Q_MASK)
3938                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3939                         else
3940                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3941
3942                         /* Enable L3/L4 for Tx Switched packets */
3943                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3944                 } else {
3945                         if (tcs > 4)
3946                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3947                         else if (tcs > 1)
3948                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3949                         else
3950                                 mrqc = IXGBE_MRQC_RSSEN;
3951                 }
3952         }
3953
3954         /* Perform hash on these packet types */
3955         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3956                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3957                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3958                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3959
3960         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3961                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3962         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3963                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3964
3965         if ((hw->mac.type >= ixgbe_mac_X550) &&
3966             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3967                 unsigned int pf_pool = adapter->num_vfs;
3968
3969                 /* Enable VF RSS mode */
3970                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3971                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3972
3973                 /* Setup RSS through the VF registers */
3974                 ixgbe_setup_vfreta(adapter);
3975                 vfmrqc = IXGBE_MRQC_RSSEN;
3976                 vfmrqc |= rss_field;
3977                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3978         } else {
3979                 ixgbe_setup_reta(adapter);
3980                 mrqc |= rss_field;
3981                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3982         }
3983 }
3984
3985 /**
3986  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3987  * @adapter:    address of board private structure
3988  * @index:      index of ring to set
3989  **/
3990 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3991                                    struct ixgbe_ring *ring)
3992 {
3993         struct ixgbe_hw *hw = &adapter->hw;
3994         u32 rscctrl;
3995         u8 reg_idx = ring->reg_idx;
3996
3997         if (!ring_is_rsc_enabled(ring))
3998                 return;
3999
4000         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4001         rscctrl |= IXGBE_RSCCTL_RSCEN;
4002         /*
4003          * we must limit the number of descriptors so that the
4004          * total size of max desc * buf_len is not greater
4005          * than 65536
4006          */
4007         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4008         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4009 }
4010
4011 #define IXGBE_MAX_RX_DESC_POLL 10
4012 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4013                                        struct ixgbe_ring *ring)
4014 {
4015         struct ixgbe_hw *hw = &adapter->hw;
4016         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4017         u32 rxdctl;
4018         u8 reg_idx = ring->reg_idx;
4019
4020         if (ixgbe_removed(hw->hw_addr))
4021                 return;
4022         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4023         if (hw->mac.type == ixgbe_mac_82598EB &&
4024             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4025                 return;
4026
4027         do {
4028                 usleep_range(1000, 2000);
4029                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4030         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4031
4032         if (!wait_loop) {
4033                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4034                       "the polling period\n", reg_idx);
4035         }
4036 }
4037
4038 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
4039                             struct ixgbe_ring *ring)
4040 {
4041         struct ixgbe_hw *hw = &adapter->hw;
4042         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4043         u32 rxdctl;
4044         u8 reg_idx = ring->reg_idx;
4045
4046         if (ixgbe_removed(hw->hw_addr))
4047                 return;
4048         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4049         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4050
4051         /* write value back with RXDCTL.ENABLE bit cleared */
4052         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4053
4054         if (hw->mac.type == ixgbe_mac_82598EB &&
4055             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4056                 return;
4057
4058         /* the hardware may take up to 100us to really disable the rx queue */
4059         do {
4060                 udelay(10);
4061                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4062         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
4063
4064         if (!wait_loop) {
4065                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
4066                       "the polling period\n", reg_idx);
4067         }
4068 }
4069
4070 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4071                              struct ixgbe_ring *ring)
4072 {
4073         struct ixgbe_hw *hw = &adapter->hw;
4074         union ixgbe_adv_rx_desc *rx_desc;
4075         u64 rdba = ring->dma;
4076         u32 rxdctl;
4077         u8 reg_idx = ring->reg_idx;
4078
4079         /* disable queue to avoid issues while updating state */
4080         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4081         ixgbe_disable_rx_queue(adapter, ring);
4082
4083         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4084         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4085         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4086                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4087         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4088         IXGBE_WRITE_FLUSH(hw);
4089
4090         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4091         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4092         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4093
4094         ixgbe_configure_srrctl(adapter, ring);
4095         ixgbe_configure_rscctl(adapter, ring);
4096
4097         if (hw->mac.type == ixgbe_mac_82598EB) {
4098                 /*
4099                  * enable cache line friendly hardware writes:
4100                  * PTHRESH=32 descriptors (half the internal cache),
4101                  * this also removes ugly rx_no_buffer_count increment
4102                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4103                  * WTHRESH=8 burst writeback up to two cache lines
4104                  */
4105                 rxdctl &= ~0x3FFFFF;
4106                 rxdctl |=  0x080420;
4107 #if (PAGE_SIZE < 8192)
4108         } else {
4109                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4110                             IXGBE_RXDCTL_RLPML_EN);
4111
4112                 /* Limit the maximum frame size so we don't overrun the skb */
4113                 if (ring_uses_build_skb(ring) &&
4114                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4115                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4116                                   IXGBE_RXDCTL_RLPML_EN;
4117 #endif
4118         }
4119
4120         /* initialize rx_buffer_info */
4121         memset(ring->rx_buffer_info, 0,
4122                sizeof(struct ixgbe_rx_buffer) * ring->count);
4123
4124         /* initialize Rx descriptor 0 */
4125         rx_desc = IXGBE_RX_DESC(ring, 0);
4126         rx_desc->wb.upper.length = 0;
4127
4128         /* enable receive descriptor ring */
4129         rxdctl |= IXGBE_RXDCTL_ENABLE;
4130         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4131
4132         ixgbe_rx_desc_queue_enable(adapter, ring);
4133         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4134 }
4135
4136 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4137 {
4138         struct ixgbe_hw *hw = &adapter->hw;
4139         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4140         u16 pool;
4141
4142         /* PSRTYPE must be initialized in non 82598 adapters */
4143         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4144                       IXGBE_PSRTYPE_UDPHDR |
4145                       IXGBE_PSRTYPE_IPV4HDR |
4146                       IXGBE_PSRTYPE_L2HDR |
4147                       IXGBE_PSRTYPE_IPV6HDR;
4148
4149         if (hw->mac.type == ixgbe_mac_82598EB)
4150                 return;
4151
4152         if (rss_i > 3)
4153                 psrtype |= 2u << 29;
4154         else if (rss_i > 1)
4155                 psrtype |= 1u << 29;
4156
4157         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
4158                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4159 }
4160
4161 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4162 {
4163         struct ixgbe_hw *hw = &adapter->hw;
4164         u32 reg_offset, vf_shift;
4165         u32 gcr_ext, vmdctl;
4166         int i;
4167
4168         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4169                 return;
4170
4171         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4172         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4173         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4174         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4175         vmdctl |= IXGBE_VT_CTL_REPLEN;
4176         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4177
4178         vf_shift = VMDQ_P(0) % 32;
4179         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4180
4181         /* Enable only the PF's pool for Tx/Rx */
4182         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4183         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4184         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4185         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4186         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4187                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4188
4189         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4190         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4191
4192         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4193         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4194
4195         /*
4196          * Set up VF register offsets for selected VT Mode,
4197          * i.e. 32 or 64 VFs for SR-IOV
4198          */
4199         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4200         case IXGBE_82599_VMDQ_8Q_MASK:
4201                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4202                 break;
4203         case IXGBE_82599_VMDQ_4Q_MASK:
4204                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4205                 break;
4206         default:
4207                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4208                 break;
4209         }
4210
4211         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4212
4213         for (i = 0; i < adapter->num_vfs; i++) {
4214                 /* configure spoof checking */
4215                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4216                                           adapter->vfinfo[i].spoofchk_enabled);
4217
4218                 /* Enable/Disable RSS query feature  */
4219                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4220                                           adapter->vfinfo[i].rss_query_enabled);
4221         }
4222 }
4223
4224 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4225 {
4226         struct ixgbe_hw *hw = &adapter->hw;
4227         struct net_device *netdev = adapter->netdev;
4228         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4229         struct ixgbe_ring *rx_ring;
4230         int i;
4231         u32 mhadd, hlreg0;
4232
4233 #ifdef IXGBE_FCOE
4234         /* adjust max frame to be able to do baby jumbo for FCoE */
4235         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4236             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4237                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4238
4239 #endif /* IXGBE_FCOE */
4240
4241         /* adjust max frame to be at least the size of a standard frame */
4242         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4243                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4244
4245         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4246         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4247                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4248                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4249
4250                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4251         }
4252
4253         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4254         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4255         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4256         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4257
4258         /*
4259          * Setup the HW Rx Head and Tail Descriptor Pointers and
4260          * the Base and Length of the Rx Descriptor Ring
4261          */
4262         for (i = 0; i < adapter->num_rx_queues; i++) {
4263                 rx_ring = adapter->rx_ring[i];
4264
4265                 clear_ring_rsc_enabled(rx_ring);
4266                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4267                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4268
4269                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4270                         set_ring_rsc_enabled(rx_ring);
4271
4272                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4273                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4274
4275                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4276                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4277                         continue;
4278
4279                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4280
4281 #if (PAGE_SIZE < 8192)
4282                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4283                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4284
4285                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4286                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4287                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4288 #endif
4289         }
4290 }
4291
4292 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4293 {
4294         struct ixgbe_hw *hw = &adapter->hw;
4295         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4296
4297         switch (hw->mac.type) {
4298         case ixgbe_mac_82598EB:
4299                 /*
4300                  * For VMDq support of different descriptor types or
4301                  * buffer sizes through the use of multiple SRRCTL
4302                  * registers, RDRXCTL.MVMEN must be set to 1
4303                  *
4304                  * also, the manual doesn't mention it clearly but DCA hints
4305                  * will only use queue 0's tags unless this bit is set.  Side
4306                  * effects of setting this bit are only that SRRCTL must be
4307                  * fully programmed [0..15]
4308                  */
4309                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4310                 break;
4311         case ixgbe_mac_X550:
4312         case ixgbe_mac_X550EM_x:
4313         case ixgbe_mac_x550em_a:
4314                 if (adapter->num_vfs)
4315                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4316                 /* fall through */
4317         case ixgbe_mac_82599EB:
4318         case ixgbe_mac_X540:
4319                 /* Disable RSC for ACK packets */
4320                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4321                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4322                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4323                 /* hardware requires some bits to be set by default */
4324                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4325                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4326                 break;
4327         default:
4328                 /* We should do nothing since we don't know this hardware */
4329                 return;
4330         }
4331
4332         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4333 }
4334
4335 /**
4336  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4337  * @adapter: board private structure
4338  *
4339  * Configure the Rx unit of the MAC after a reset.
4340  **/
4341 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4342 {
4343         struct ixgbe_hw *hw = &adapter->hw;
4344         int i;
4345         u32 rxctrl, rfctl;
4346
4347         /* disable receives while setting up the descriptors */
4348         hw->mac.ops.disable_rx(hw);
4349
4350         ixgbe_setup_psrtype(adapter);
4351         ixgbe_setup_rdrxctl(adapter);
4352
4353         /* RSC Setup */
4354         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4355         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4356         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4357                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4358
4359         /* disable NFS filtering */
4360         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4361         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4362
4363         /* Program registers for the distribution of queues */
4364         ixgbe_setup_mrqc(adapter);
4365
4366         /* set_rx_buffer_len must be called before ring initialization */
4367         ixgbe_set_rx_buffer_len(adapter);
4368
4369         /*
4370          * Setup the HW Rx Head and Tail Descriptor Pointers and
4371          * the Base and Length of the Rx Descriptor Ring
4372          */
4373         for (i = 0; i < adapter->num_rx_queues; i++)
4374                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4375
4376         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4377         /* disable drop enable for 82598 parts */
4378         if (hw->mac.type == ixgbe_mac_82598EB)
4379                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4380
4381         /* enable all receives */
4382         rxctrl |= IXGBE_RXCTRL_RXEN;
4383         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4384 }
4385
4386 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4387                                  __be16 proto, u16 vid)
4388 {
4389         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4390         struct ixgbe_hw *hw = &adapter->hw;
4391
4392         /* add VID to filter table */
4393         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4394                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4395
4396         set_bit(vid, adapter->active_vlans);
4397
4398         return 0;
4399 }
4400
4401 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4402 {
4403         u32 vlvf;
4404         int idx;
4405
4406         /* short cut the special case */
4407         if (vlan == 0)
4408                 return 0;
4409
4410         /* Search for the vlan id in the VLVF entries */
4411         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4412                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4413                 if ((vlvf & VLAN_VID_MASK) == vlan)
4414                         break;
4415         }
4416
4417         return idx;
4418 }
4419
4420 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4421 {
4422         struct ixgbe_hw *hw = &adapter->hw;
4423         u32 bits, word;
4424         int idx;
4425
4426         idx = ixgbe_find_vlvf_entry(hw, vid);
4427         if (!idx)
4428                 return;
4429
4430         /* See if any other pools are set for this VLAN filter
4431          * entry other than the PF.
4432          */
4433         word = idx * 2 + (VMDQ_P(0) / 32);
4434         bits = ~BIT(VMDQ_P(0) % 32);
4435         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4436
4437         /* Disable the filter so this falls into the default pool. */
4438         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4439                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4440                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4441                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4442         }
4443 }
4444
4445 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4446                                   __be16 proto, u16 vid)
4447 {
4448         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4449         struct ixgbe_hw *hw = &adapter->hw;
4450
4451         /* remove VID from filter table */
4452         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4453                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4454
4455         clear_bit(vid, adapter->active_vlans);
4456
4457         return 0;
4458 }
4459
4460 /**
4461  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4462  * @adapter: driver data
4463  */
4464 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4465 {
4466         struct ixgbe_hw *hw = &adapter->hw;
4467         u32 vlnctrl;
4468         int i, j;
4469
4470         switch (hw->mac.type) {
4471         case ixgbe_mac_82598EB:
4472                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4473                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4474                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4475                 break;
4476         case ixgbe_mac_82599EB:
4477         case ixgbe_mac_X540:
4478         case ixgbe_mac_X550:
4479         case ixgbe_mac_X550EM_x:
4480         case ixgbe_mac_x550em_a:
4481                 for (i = 0; i < adapter->num_rx_queues; i++) {
4482                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4483
4484                         if (ring->l2_accel_priv)
4485                                 continue;
4486                         j = ring->reg_idx;
4487                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4488                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4489                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4490                 }
4491                 break;
4492         default:
4493                 break;
4494         }
4495 }
4496
4497 /**
4498  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4499  * @adapter: driver data
4500  */
4501 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4502 {
4503         struct ixgbe_hw *hw = &adapter->hw;
4504         u32 vlnctrl;
4505         int i, j;
4506
4507         switch (hw->mac.type) {
4508         case ixgbe_mac_82598EB:
4509                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4510                 vlnctrl |= IXGBE_VLNCTRL_VME;
4511                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4512                 break;
4513         case ixgbe_mac_82599EB:
4514         case ixgbe_mac_X540:
4515         case ixgbe_mac_X550:
4516         case ixgbe_mac_X550EM_x:
4517         case ixgbe_mac_x550em_a:
4518                 for (i = 0; i < adapter->num_rx_queues; i++) {
4519                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4520
4521                         if (ring->l2_accel_priv)
4522                                 continue;
4523                         j = ring->reg_idx;
4524                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4525                         vlnctrl |= IXGBE_RXDCTL_VME;
4526                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4527                 }
4528                 break;
4529         default:
4530                 break;
4531         }
4532 }
4533
4534 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4535 {
4536         struct ixgbe_hw *hw = &adapter->hw;
4537         u32 vlnctrl, i;
4538
4539         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4540
4541         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4542         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4543                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4544                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4545         } else {
4546                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4547                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4548                 return;
4549         }
4550
4551         /* Nothing to do for 82598 */
4552         if (hw->mac.type == ixgbe_mac_82598EB)
4553                 return;
4554
4555         /* We are already in VLAN promisc, nothing to do */
4556         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4557                 return;
4558
4559         /* Set flag so we don't redo unnecessary work */
4560         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4561
4562         /* Add PF to all active pools */
4563         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4564                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4565                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4566
4567                 vlvfb |= BIT(VMDQ_P(0) % 32);
4568                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4569         }
4570
4571         /* Set all bits in the VLAN filter table array */
4572         for (i = hw->mac.vft_size; i--;)
4573                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4574 }
4575
4576 #define VFTA_BLOCK_SIZE 8
4577 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4578 {
4579         struct ixgbe_hw *hw = &adapter->hw;
4580         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4581         u32 vid_start = vfta_offset * 32;
4582         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4583         u32 i, vid, word, bits;
4584
4585         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4586                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4587
4588                 /* pull VLAN ID from VLVF */
4589                 vid = vlvf & VLAN_VID_MASK;
4590
4591                 /* only concern outselves with a certain range */
4592                 if (vid < vid_start || vid >= vid_end)
4593                         continue;
4594
4595                 if (vlvf) {
4596                         /* record VLAN ID in VFTA */
4597                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4598
4599                         /* if PF is part of this then continue */
4600                         if (test_bit(vid, adapter->active_vlans))
4601                                 continue;
4602                 }
4603
4604                 /* remove PF from the pool */
4605                 word = i * 2 + VMDQ_P(0) / 32;
4606                 bits = ~BIT(VMDQ_P(0) % 32);
4607                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4608                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4609         }
4610
4611         /* extract values from active_vlans and write back to VFTA */
4612         for (i = VFTA_BLOCK_SIZE; i--;) {
4613                 vid = (vfta_offset + i) * 32;
4614                 word = vid / BITS_PER_LONG;
4615                 bits = vid % BITS_PER_LONG;
4616
4617                 vfta[i] |= adapter->active_vlans[word] >> bits;
4618
4619                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4620         }
4621 }
4622
4623 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4624 {
4625         struct ixgbe_hw *hw = &adapter->hw;
4626         u32 vlnctrl, i;
4627
4628         /* Set VLAN filtering to enabled */
4629         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4630         vlnctrl |= IXGBE_VLNCTRL_VFE;
4631         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4632
4633         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4634             hw->mac.type == ixgbe_mac_82598EB)
4635                 return;
4636
4637         /* We are not in VLAN promisc, nothing to do */
4638         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4639                 return;
4640
4641         /* Set flag so we don't redo unnecessary work */
4642         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4643
4644         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4645                 ixgbe_scrub_vfta(adapter, i);
4646 }
4647
4648 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4649 {
4650         u16 vid = 1;
4651
4652         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4653
4654         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4655                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4656 }
4657
4658 /**
4659  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4660  * @netdev: network interface device structure
4661  *
4662  * Writes multicast address list to the MTA hash table.
4663  * Returns: -ENOMEM on failure
4664  *                0 on no addresses written
4665  *                X on writing X addresses to MTA
4666  **/
4667 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4668 {
4669         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4670         struct ixgbe_hw *hw = &adapter->hw;
4671
4672         if (!netif_running(netdev))
4673                 return 0;
4674
4675         if (hw->mac.ops.update_mc_addr_list)
4676                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4677         else
4678                 return -ENOMEM;
4679
4680 #ifdef CONFIG_PCI_IOV
4681         ixgbe_restore_vf_multicasts(adapter);
4682 #endif
4683
4684         return netdev_mc_count(netdev);
4685 }
4686
4687 #ifdef CONFIG_PCI_IOV
4688 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4689 {
4690         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4691         struct ixgbe_hw *hw = &adapter->hw;
4692         int i;
4693
4694         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4695                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4696
4697                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4698                         hw->mac.ops.set_rar(hw, i,
4699                                             mac_table->addr,
4700                                             mac_table->pool,
4701                                             IXGBE_RAH_AV);
4702                 else
4703                         hw->mac.ops.clear_rar(hw, i);
4704         }
4705 }
4706
4707 #endif
4708 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4709 {
4710         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4711         struct ixgbe_hw *hw = &adapter->hw;
4712         int i;
4713
4714         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4715                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4716                         continue;
4717
4718                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4719
4720                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4721                         hw->mac.ops.set_rar(hw, i,
4722                                             mac_table->addr,
4723                                             mac_table->pool,
4724                                             IXGBE_RAH_AV);
4725                 else
4726                         hw->mac.ops.clear_rar(hw, i);
4727         }
4728 }
4729
4730 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4731 {
4732         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4733         struct ixgbe_hw *hw = &adapter->hw;
4734         int i;
4735
4736         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4737                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4738                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4739         }
4740
4741         ixgbe_sync_mac_table(adapter);
4742 }
4743
4744 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4745 {
4746         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4747         struct ixgbe_hw *hw = &adapter->hw;
4748         int i, count = 0;
4749
4750         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4751                 /* do not count default RAR as available */
4752                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4753                         continue;
4754
4755                 /* only count unused and addresses that belong to us */
4756                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4757                         if (mac_table->pool != pool)
4758                                 continue;
4759                 }
4760
4761                 count++;
4762         }
4763
4764         return count;
4765 }
4766
4767 /* this function destroys the first RAR entry */
4768 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4769 {
4770         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4771         struct ixgbe_hw *hw = &adapter->hw;
4772
4773         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4774         mac_table->pool = VMDQ_P(0);
4775
4776         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4777
4778         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4779                             IXGBE_RAH_AV);
4780 }
4781
4782 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4783                          const u8 *addr, u16 pool)
4784 {
4785         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4786         struct ixgbe_hw *hw = &adapter->hw;
4787         int i;
4788
4789         if (is_zero_ether_addr(addr))
4790                 return -EINVAL;
4791
4792         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4793                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4794                         continue;
4795
4796                 ether_addr_copy(mac_table->addr, addr);
4797                 mac_table->pool = pool;
4798
4799                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4800                                     IXGBE_MAC_STATE_IN_USE;
4801
4802                 ixgbe_sync_mac_table(adapter);
4803
4804                 return i;
4805         }
4806
4807         return -ENOMEM;
4808 }
4809
4810 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4811                          const u8 *addr, u16 pool)
4812 {
4813         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4814         struct ixgbe_hw *hw = &adapter->hw;
4815         int i;
4816
4817         if (is_zero_ether_addr(addr))
4818                 return -EINVAL;
4819
4820         /* search table for addr, if found clear IN_USE flag and sync */
4821         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4822                 /* we can only delete an entry if it is in use */
4823                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4824                         continue;
4825                 /* we only care about entries that belong to the given pool */
4826                 if (mac_table->pool != pool)
4827                         continue;
4828                 /* we only care about a specific MAC address */
4829                 if (!ether_addr_equal(addr, mac_table->addr))
4830                         continue;
4831
4832                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4833                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4834
4835                 ixgbe_sync_mac_table(adapter);
4836
4837                 return 0;
4838         }
4839
4840         return -ENOMEM;
4841 }
4842 /**
4843  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4844  * @netdev: network interface device structure
4845  *
4846  * Writes unicast address list to the RAR table.
4847  * Returns: -ENOMEM on failure/insufficient address space
4848  *                0 on no addresses written
4849  *                X on writing X addresses to the RAR table
4850  **/
4851 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4852 {
4853         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4854         int count = 0;
4855
4856         /* return ENOMEM indicating insufficient memory for addresses */
4857         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4858                 return -ENOMEM;
4859
4860         if (!netdev_uc_empty(netdev)) {
4861                 struct netdev_hw_addr *ha;
4862                 netdev_for_each_uc_addr(ha, netdev) {
4863                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4864                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4865                         count++;
4866                 }
4867         }
4868         return count;
4869 }
4870
4871 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4872 {
4873         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4874         int ret;
4875
4876         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4877
4878         return min_t(int, ret, 0);
4879 }
4880
4881 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4882 {
4883         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4884
4885         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4886
4887         return 0;
4888 }
4889
4890 /**
4891  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4892  * @netdev: network interface device structure
4893  *
4894  * The set_rx_method entry point is called whenever the unicast/multicast
4895  * address list or the network interface flags are updated.  This routine is
4896  * responsible for configuring the hardware for proper unicast, multicast and
4897  * promiscuous mode.
4898  **/
4899 void ixgbe_set_rx_mode(struct net_device *netdev)
4900 {
4901         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4902         struct ixgbe_hw *hw = &adapter->hw;
4903         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4904         netdev_features_t features = netdev->features;
4905         int count;
4906
4907         /* Check for Promiscuous and All Multicast modes */
4908         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4909
4910         /* set all bits that we expect to always be set */
4911         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4912         fctrl |= IXGBE_FCTRL_BAM;
4913         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4914         fctrl |= IXGBE_FCTRL_PMCF;
4915
4916         /* clear the bits we are changing the status of */
4917         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4918         if (netdev->flags & IFF_PROMISC) {
4919                 hw->addr_ctrl.user_set_promisc = true;
4920                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4921                 vmolr |= IXGBE_VMOLR_MPE;
4922                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4923         } else {
4924                 if (netdev->flags & IFF_ALLMULTI) {
4925                         fctrl |= IXGBE_FCTRL_MPE;
4926                         vmolr |= IXGBE_VMOLR_MPE;
4927                 }
4928                 hw->addr_ctrl.user_set_promisc = false;
4929         }
4930
4931         /*
4932          * Write addresses to available RAR registers, if there is not
4933          * sufficient space to store all the addresses then enable
4934          * unicast promiscuous mode
4935          */
4936         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4937                 fctrl |= IXGBE_FCTRL_UPE;
4938                 vmolr |= IXGBE_VMOLR_ROPE;
4939         }
4940
4941         /* Write addresses to the MTA, if the attempt fails
4942          * then we should just turn on promiscuous mode so
4943          * that we can at least receive multicast traffic
4944          */
4945         count = ixgbe_write_mc_addr_list(netdev);
4946         if (count < 0) {
4947                 fctrl |= IXGBE_FCTRL_MPE;
4948                 vmolr |= IXGBE_VMOLR_MPE;
4949         } else if (count) {
4950                 vmolr |= IXGBE_VMOLR_ROMPE;
4951         }
4952
4953         if (hw->mac.type != ixgbe_mac_82598EB) {
4954                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4955                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4956                            IXGBE_VMOLR_ROPE);
4957                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4958         }
4959
4960         /* This is useful for sniffing bad packets. */
4961         if (features & NETIF_F_RXALL) {
4962                 /* UPE and MPE will be handled by normal PROMISC logic
4963                  * in e1000e_set_rx_mode */
4964                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4965                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4966                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4967
4968                 fctrl &= ~(IXGBE_FCTRL_DPF);
4969                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4970         }
4971
4972         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4973
4974         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4975                 ixgbe_vlan_strip_enable(adapter);
4976         else
4977                 ixgbe_vlan_strip_disable(adapter);
4978
4979         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4980                 ixgbe_vlan_promisc_disable(adapter);
4981         else
4982                 ixgbe_vlan_promisc_enable(adapter);
4983 }
4984
4985 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4986 {
4987         int q_idx;
4988
4989         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4990                 napi_enable(&adapter->q_vector[q_idx]->napi);
4991 }
4992
4993 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4994 {
4995         int q_idx;
4996
4997         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4998                 napi_disable(&adapter->q_vector[q_idx]->napi);
4999 }
5000
5001 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5002 {
5003         struct ixgbe_hw *hw = &adapter->hw;
5004         u32 vxlanctrl;
5005
5006         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5007                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5008                 return;
5009
5010         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5011         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5012
5013         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5014                 adapter->vxlan_port = 0;
5015
5016         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5017                 adapter->geneve_port = 0;
5018 }
5019
5020 #ifdef CONFIG_IXGBE_DCB
5021 /**
5022  * ixgbe_configure_dcb - Configure DCB hardware
5023  * @adapter: ixgbe adapter struct
5024  *
5025  * This is called by the driver on open to configure the DCB hardware.
5026  * This is also called by the gennetlink interface when reconfiguring
5027  * the DCB state.
5028  */
5029 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5030 {
5031         struct ixgbe_hw *hw = &adapter->hw;
5032         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5033
5034         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5035                 if (hw->mac.type == ixgbe_mac_82598EB)
5036                         netif_set_gso_max_size(adapter->netdev, 65536);
5037                 return;
5038         }
5039
5040         if (hw->mac.type == ixgbe_mac_82598EB)
5041                 netif_set_gso_max_size(adapter->netdev, 32768);
5042
5043 #ifdef IXGBE_FCOE
5044         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5045                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5046 #endif
5047
5048         /* reconfigure the hardware */
5049         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5050                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5051                                                 DCB_TX_CONFIG);
5052                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5053                                                 DCB_RX_CONFIG);
5054                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5055         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5056                 ixgbe_dcb_hw_ets(&adapter->hw,
5057                                  adapter->ixgbe_ieee_ets,
5058                                  max_frame);
5059                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5060                                         adapter->ixgbe_ieee_pfc->pfc_en,
5061                                         adapter->ixgbe_ieee_ets->prio_tc);
5062         }
5063
5064         /* Enable RSS Hash per TC */
5065         if (hw->mac.type != ixgbe_mac_82598EB) {
5066                 u32 msb = 0;
5067                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5068
5069                 while (rss_i) {
5070                         msb++;
5071                         rss_i >>= 1;
5072                 }
5073
5074                 /* write msb to all 8 TCs in one write */
5075                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5076         }
5077 }
5078 #endif
5079
5080 /* Additional bittime to account for IXGBE framing */
5081 #define IXGBE_ETH_FRAMING 20
5082
5083 /**
5084  * ixgbe_hpbthresh - calculate high water mark for flow control
5085  *
5086  * @adapter: board private structure to calculate for
5087  * @pb: packet buffer to calculate
5088  */
5089 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5090 {
5091         struct ixgbe_hw *hw = &adapter->hw;
5092         struct net_device *dev = adapter->netdev;
5093         int link, tc, kb, marker;
5094         u32 dv_id, rx_pba;
5095
5096         /* Calculate max LAN frame size */
5097         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5098
5099 #ifdef IXGBE_FCOE
5100         /* FCoE traffic class uses FCOE jumbo frames */
5101         if ((dev->features & NETIF_F_FCOE_MTU) &&
5102             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5103             (pb == ixgbe_fcoe_get_tc(adapter)))
5104                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5105 #endif
5106
5107         /* Calculate delay value for device */
5108         switch (hw->mac.type) {
5109         case ixgbe_mac_X540:
5110         case ixgbe_mac_X550:
5111         case ixgbe_mac_X550EM_x:
5112         case ixgbe_mac_x550em_a:
5113                 dv_id = IXGBE_DV_X540(link, tc);
5114                 break;
5115         default:
5116                 dv_id = IXGBE_DV(link, tc);
5117                 break;
5118         }
5119
5120         /* Loopback switch introduces additional latency */
5121         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5122                 dv_id += IXGBE_B2BT(tc);
5123
5124         /* Delay value is calculated in bit times convert to KB */
5125         kb = IXGBE_BT2KB(dv_id);
5126         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5127
5128         marker = rx_pba - kb;
5129
5130         /* It is possible that the packet buffer is not large enough
5131          * to provide required headroom. In this case throw an error
5132          * to user and a do the best we can.
5133          */
5134         if (marker < 0) {
5135                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5136                             "headroom to support flow control."
5137                             "Decrease MTU or number of traffic classes\n", pb);
5138                 marker = tc + 1;
5139         }
5140
5141         return marker;
5142 }
5143
5144 /**
5145  * ixgbe_lpbthresh - calculate low water mark for for flow control
5146  *
5147  * @adapter: board private structure to calculate for
5148  * @pb: packet buffer to calculate
5149  */
5150 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5151 {
5152         struct ixgbe_hw *hw = &adapter->hw;
5153         struct net_device *dev = adapter->netdev;
5154         int tc;
5155         u32 dv_id;
5156
5157         /* Calculate max LAN frame size */
5158         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5159
5160 #ifdef IXGBE_FCOE
5161         /* FCoE traffic class uses FCOE jumbo frames */
5162         if ((dev->features & NETIF_F_FCOE_MTU) &&
5163             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5164             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5165                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5166 #endif
5167
5168         /* Calculate delay value for device */
5169         switch (hw->mac.type) {
5170         case ixgbe_mac_X540:
5171         case ixgbe_mac_X550:
5172         case ixgbe_mac_X550EM_x:
5173         case ixgbe_mac_x550em_a:
5174                 dv_id = IXGBE_LOW_DV_X540(tc);
5175                 break;
5176         default:
5177                 dv_id = IXGBE_LOW_DV(tc);
5178                 break;
5179         }
5180
5181         /* Delay value is calculated in bit times convert to KB */
5182         return IXGBE_BT2KB(dv_id);
5183 }
5184
5185 /*
5186  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5187  */
5188 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5189 {
5190         struct ixgbe_hw *hw = &adapter->hw;
5191         int num_tc = netdev_get_num_tc(adapter->netdev);
5192         int i;
5193
5194         if (!num_tc)
5195                 num_tc = 1;
5196
5197         for (i = 0; i < num_tc; i++) {
5198                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5199                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5200
5201                 /* Low water marks must not be larger than high water marks */
5202                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5203                         hw->fc.low_water[i] = 0;
5204         }
5205
5206         for (; i < MAX_TRAFFIC_CLASS; i++)
5207                 hw->fc.high_water[i] = 0;
5208 }
5209
5210 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5211 {
5212         struct ixgbe_hw *hw = &adapter->hw;
5213         int hdrm;
5214         u8 tc = netdev_get_num_tc(adapter->netdev);
5215
5216         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5217             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5218                 hdrm = 32 << adapter->fdir_pballoc;
5219         else
5220                 hdrm = 0;
5221
5222         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5223         ixgbe_pbthresh_setup(adapter);
5224 }
5225
5226 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5227 {
5228         struct ixgbe_hw *hw = &adapter->hw;
5229         struct hlist_node *node2;
5230         struct ixgbe_fdir_filter *filter;
5231
5232         spin_lock(&adapter->fdir_perfect_lock);
5233
5234         if (!hlist_empty(&adapter->fdir_filter_list))
5235                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5236
5237         hlist_for_each_entry_safe(filter, node2,
5238                                   &adapter->fdir_filter_list, fdir_node) {
5239                 ixgbe_fdir_write_perfect_filter_82599(hw,
5240                                 &filter->filter,
5241                                 filter->sw_idx,
5242                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5243                                 IXGBE_FDIR_DROP_QUEUE :
5244                                 adapter->rx_ring[filter->action]->reg_idx);
5245         }
5246
5247         spin_unlock(&adapter->fdir_perfect_lock);
5248 }
5249
5250 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
5251                                       struct ixgbe_adapter *adapter)
5252 {
5253         struct ixgbe_hw *hw = &adapter->hw;
5254         u32 vmolr;
5255
5256         /* No unicast promiscuous support for VMDQ devices. */
5257         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
5258         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
5259
5260         /* clear the affected bit */
5261         vmolr &= ~IXGBE_VMOLR_MPE;
5262
5263         if (dev->flags & IFF_ALLMULTI) {
5264                 vmolr |= IXGBE_VMOLR_MPE;
5265         } else {
5266                 vmolr |= IXGBE_VMOLR_ROMPE;
5267                 hw->mac.ops.update_mc_addr_list(hw, dev);
5268         }
5269         ixgbe_write_uc_addr_list(adapter->netdev, pool);
5270         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
5271 }
5272
5273 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
5274 {
5275         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5276         int rss_i = adapter->num_rx_queues_per_pool;
5277         struct ixgbe_hw *hw = &adapter->hw;
5278         u16 pool = vadapter->pool;
5279         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
5280                       IXGBE_PSRTYPE_UDPHDR |
5281                       IXGBE_PSRTYPE_IPV4HDR |
5282                       IXGBE_PSRTYPE_L2HDR |
5283                       IXGBE_PSRTYPE_IPV6HDR;
5284
5285         if (hw->mac.type == ixgbe_mac_82598EB)
5286                 return;
5287
5288         if (rss_i > 3)
5289                 psrtype |= 2u << 29;
5290         else if (rss_i > 1)
5291                 psrtype |= 1u << 29;
5292
5293         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
5294 }
5295
5296 /**
5297  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5298  * @rx_ring: ring to free buffers from
5299  **/
5300 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5301 {
5302         u16 i = rx_ring->next_to_clean;
5303         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5304
5305         /* Free all the Rx ring sk_buffs */
5306         while (i != rx_ring->next_to_alloc) {
5307                 if (rx_buffer->skb) {
5308                         struct sk_buff *skb = rx_buffer->skb;
5309                         if (IXGBE_CB(skb)->page_released)
5310                                 dma_unmap_page_attrs(rx_ring->dev,
5311                                                      IXGBE_CB(skb)->dma,
5312                                                      ixgbe_rx_pg_size(rx_ring),
5313                                                      DMA_FROM_DEVICE,
5314                                                      IXGBE_RX_DMA_ATTR);
5315                         dev_kfree_skb(skb);
5316                 }
5317
5318                 /* Invalidate cache lines that may have been written to by
5319                  * device so that we avoid corrupting memory.
5320                  */
5321                 dma_sync_single_range_for_cpu(rx_ring->dev,
5322                                               rx_buffer->dma,
5323                                               rx_buffer->page_offset,
5324                                               ixgbe_rx_bufsz(rx_ring),
5325                                               DMA_FROM_DEVICE);
5326
5327                 /* free resources associated with mapping */
5328                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5329                                      ixgbe_rx_pg_size(rx_ring),
5330                                      DMA_FROM_DEVICE,
5331                                      IXGBE_RX_DMA_ATTR);
5332                 __page_frag_cache_drain(rx_buffer->page,
5333                                         rx_buffer->pagecnt_bias);
5334
5335                 i++;
5336                 rx_buffer++;
5337                 if (i == rx_ring->count) {
5338                         i = 0;
5339                         rx_buffer = rx_ring->rx_buffer_info;
5340                 }
5341         }
5342
5343         rx_ring->next_to_alloc = 0;
5344         rx_ring->next_to_clean = 0;
5345         rx_ring->next_to_use = 0;
5346 }
5347
5348 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
5349                                    struct ixgbe_ring *rx_ring)
5350 {
5351         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5352         int index = rx_ring->queue_index + vadapter->rx_base_queue;
5353
5354         /* shutdown specific queue receive and wait for dma to settle */
5355         ixgbe_disable_rx_queue(adapter, rx_ring);
5356         usleep_range(10000, 20000);
5357         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
5358         ixgbe_clean_rx_ring(rx_ring);
5359         rx_ring->l2_accel_priv = NULL;
5360 }
5361
5362 static int ixgbe_fwd_ring_down(struct net_device *vdev,
5363                                struct ixgbe_fwd_adapter *accel)
5364 {
5365         struct ixgbe_adapter *adapter = accel->real_adapter;
5366         unsigned int rxbase = accel->rx_base_queue;
5367         unsigned int txbase = accel->tx_base_queue;
5368         int i;
5369
5370         netif_tx_stop_all_queues(vdev);
5371
5372         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5373                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5374                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
5375         }
5376
5377         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5378                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
5379                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
5380         }
5381
5382
5383         return 0;
5384 }
5385
5386 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5387                              struct ixgbe_fwd_adapter *accel)
5388 {
5389         struct ixgbe_adapter *adapter = accel->real_adapter;
5390         unsigned int rxbase, txbase, queues;
5391         int i, baseq, err = 0;
5392
5393         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
5394                 return 0;
5395
5396         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5397         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
5398                    accel->pool, adapter->num_rx_pools,
5399                    baseq, baseq + adapter->num_rx_queues_per_pool,
5400                    adapter->fwd_bitmask);
5401
5402         accel->netdev = vdev;
5403         accel->rx_base_queue = rxbase = baseq;
5404         accel->tx_base_queue = txbase = baseq;
5405
5406         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5407                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5408
5409         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5410                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5411                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5412                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5413         }
5414
5415         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5416                 adapter->tx_ring[txbase + i]->netdev = vdev;
5417                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5418         }
5419
5420         queues = min_t(unsigned int,
5421                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5422         err = netif_set_real_num_tx_queues(vdev, queues);
5423         if (err)
5424                 goto fwd_queue_err;
5425
5426         err = netif_set_real_num_rx_queues(vdev, queues);
5427         if (err)
5428                 goto fwd_queue_err;
5429
5430         if (is_valid_ether_addr(vdev->dev_addr))
5431                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5432
5433         ixgbe_fwd_psrtype(accel);
5434         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5435         return err;
5436 fwd_queue_err:
5437         ixgbe_fwd_ring_down(vdev, accel);
5438         return err;
5439 }
5440
5441 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5442 {
5443         if (netif_is_macvlan(upper)) {
5444                 struct macvlan_dev *dfwd = netdev_priv(upper);
5445                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5446
5447                 if (dfwd->fwd_priv)
5448                         ixgbe_fwd_ring_up(upper, vadapter);
5449         }
5450
5451         return 0;
5452 }
5453
5454 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5455 {
5456         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5457                                       ixgbe_upper_dev_walk, NULL);
5458 }
5459
5460 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5461 {
5462         struct ixgbe_hw *hw = &adapter->hw;
5463
5464         ixgbe_configure_pb(adapter);
5465 #ifdef CONFIG_IXGBE_DCB
5466         ixgbe_configure_dcb(adapter);
5467 #endif
5468         /*
5469          * We must restore virtualization before VLANs or else
5470          * the VLVF registers will not be populated
5471          */
5472         ixgbe_configure_virtualization(adapter);
5473
5474         ixgbe_set_rx_mode(adapter->netdev);
5475         ixgbe_restore_vlan(adapter);
5476
5477         switch (hw->mac.type) {
5478         case ixgbe_mac_82599EB:
5479         case ixgbe_mac_X540:
5480                 hw->mac.ops.disable_rx_buff(hw);
5481                 break;
5482         default:
5483                 break;
5484         }
5485
5486         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5487                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5488                                                 adapter->fdir_pballoc);
5489         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5490                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5491                                               adapter->fdir_pballoc);
5492                 ixgbe_fdir_filter_restore(adapter);
5493         }
5494
5495         switch (hw->mac.type) {
5496         case ixgbe_mac_82599EB:
5497         case ixgbe_mac_X540:
5498                 hw->mac.ops.enable_rx_buff(hw);
5499                 break;
5500         default:
5501                 break;
5502         }
5503
5504 #ifdef CONFIG_IXGBE_DCA
5505         /* configure DCA */
5506         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5507                 ixgbe_setup_dca(adapter);
5508 #endif /* CONFIG_IXGBE_DCA */
5509
5510 #ifdef IXGBE_FCOE
5511         /* configure FCoE L2 filters, redirection table, and Rx control */
5512         ixgbe_configure_fcoe(adapter);
5513
5514 #endif /* IXGBE_FCOE */
5515         ixgbe_configure_tx(adapter);
5516         ixgbe_configure_rx(adapter);
5517         ixgbe_configure_dfwd(adapter);
5518 }
5519
5520 /**
5521  * ixgbe_sfp_link_config - set up SFP+ link
5522  * @adapter: pointer to private adapter struct
5523  **/
5524 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5525 {
5526         /*
5527          * We are assuming the worst case scenario here, and that
5528          * is that an SFP was inserted/removed after the reset
5529          * but before SFP detection was enabled.  As such the best
5530          * solution is to just start searching as soon as we start
5531          */
5532         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5533                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5534
5535         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5536         adapter->sfp_poll_time = 0;
5537 }
5538
5539 /**
5540  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5541  * @hw: pointer to private hardware struct
5542  *
5543  * Returns 0 on success, negative on failure
5544  **/
5545 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5546 {
5547         u32 speed;
5548         bool autoneg, link_up = false;
5549         int ret = IXGBE_ERR_LINK_SETUP;
5550
5551         if (hw->mac.ops.check_link)
5552                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5553
5554         if (ret)
5555                 return ret;
5556
5557         speed = hw->phy.autoneg_advertised;
5558         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5559                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5560                                                         &autoneg);
5561         if (ret)
5562                 return ret;
5563
5564         if (hw->mac.ops.setup_link)
5565                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5566
5567         return ret;
5568 }
5569
5570 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5571 {
5572         struct ixgbe_hw *hw = &adapter->hw;
5573         u32 gpie = 0;
5574
5575         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5576                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5577                        IXGBE_GPIE_OCD;
5578                 gpie |= IXGBE_GPIE_EIAME;
5579                 /*
5580                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5581                  * this saves a register write for every interrupt
5582                  */
5583                 switch (hw->mac.type) {
5584                 case ixgbe_mac_82598EB:
5585                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5586                         break;
5587                 case ixgbe_mac_82599EB:
5588                 case ixgbe_mac_X540:
5589                 case ixgbe_mac_X550:
5590                 case ixgbe_mac_X550EM_x:
5591                 case ixgbe_mac_x550em_a:
5592                 default:
5593                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5594                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5595                         break;
5596                 }
5597         } else {
5598                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5599                  * specifically only auto mask tx and rx interrupts */
5600                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5601         }
5602
5603         /* XXX: to interrupt immediately for EICS writes, enable this */
5604         /* gpie |= IXGBE_GPIE_EIMEN; */
5605
5606         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5607                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5608
5609                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5610                 case IXGBE_82599_VMDQ_8Q_MASK:
5611                         gpie |= IXGBE_GPIE_VTMODE_16;
5612                         break;
5613                 case IXGBE_82599_VMDQ_4Q_MASK:
5614                         gpie |= IXGBE_GPIE_VTMODE_32;
5615                         break;
5616                 default:
5617                         gpie |= IXGBE_GPIE_VTMODE_64;
5618                         break;
5619                 }
5620         }
5621
5622         /* Enable Thermal over heat sensor interrupt */
5623         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5624                 switch (adapter->hw.mac.type) {
5625                 case ixgbe_mac_82599EB:
5626                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5627                         break;
5628                 default:
5629                         break;
5630                 }
5631         }
5632
5633         /* Enable fan failure interrupt */
5634         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5635                 gpie |= IXGBE_SDP1_GPIEN(hw);
5636
5637         switch (hw->mac.type) {
5638         case ixgbe_mac_82599EB:
5639                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5640                 break;
5641         case ixgbe_mac_X550EM_x:
5642         case ixgbe_mac_x550em_a:
5643                 gpie |= IXGBE_SDP0_GPIEN_X540;
5644                 break;
5645         default:
5646                 break;
5647         }
5648
5649         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5650 }
5651
5652 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5653 {
5654         struct ixgbe_hw *hw = &adapter->hw;
5655         int err;
5656         u32 ctrl_ext;
5657
5658         ixgbe_get_hw_control(adapter);
5659         ixgbe_setup_gpie(adapter);
5660
5661         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5662                 ixgbe_configure_msix(adapter);
5663         else
5664                 ixgbe_configure_msi_and_legacy(adapter);
5665
5666         /* enable the optics for 82599 SFP+ fiber */
5667         if (hw->mac.ops.enable_tx_laser)
5668                 hw->mac.ops.enable_tx_laser(hw);
5669
5670         if (hw->phy.ops.set_phy_power)
5671                 hw->phy.ops.set_phy_power(hw, true);
5672
5673         smp_mb__before_atomic();
5674         clear_bit(__IXGBE_DOWN, &adapter->state);
5675         ixgbe_napi_enable_all(adapter);
5676
5677         if (ixgbe_is_sfp(hw)) {
5678                 ixgbe_sfp_link_config(adapter);
5679         } else {
5680                 err = ixgbe_non_sfp_link_config(hw);
5681                 if (err)
5682                         e_err(probe, "link_config FAILED %d\n", err);
5683         }
5684
5685         /* clear any pending interrupts, may auto mask */
5686         IXGBE_READ_REG(hw, IXGBE_EICR);
5687         ixgbe_irq_enable(adapter, true, true);
5688
5689         /*
5690          * If this adapter has a fan, check to see if we had a failure
5691          * before we enabled the interrupt.
5692          */
5693         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5694                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5695                 if (esdp & IXGBE_ESDP_SDP1)
5696                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5697         }
5698
5699         /* bring the link up in the watchdog, this could race with our first
5700          * link up interrupt but shouldn't be a problem */
5701         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5702         adapter->link_check_timeout = jiffies;
5703         mod_timer(&adapter->service_timer, jiffies);
5704
5705         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5706         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5707         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5708         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5709 }
5710
5711 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5712 {
5713         WARN_ON(in_interrupt());
5714         /* put off any impending NetWatchDogTimeout */
5715         netif_trans_update(adapter->netdev);
5716
5717         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5718                 usleep_range(1000, 2000);
5719         if (adapter->hw.phy.type == ixgbe_phy_fw)
5720                 ixgbe_watchdog_link_is_down(adapter);
5721         ixgbe_down(adapter);
5722         /*
5723          * If SR-IOV enabled then wait a bit before bringing the adapter
5724          * back up to give the VFs time to respond to the reset.  The
5725          * two second wait is based upon the watchdog timer cycle in
5726          * the VF driver.
5727          */
5728         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5729                 msleep(2000);
5730         ixgbe_up(adapter);
5731         clear_bit(__IXGBE_RESETTING, &adapter->state);
5732 }
5733
5734 void ixgbe_up(struct ixgbe_adapter *adapter)
5735 {
5736         /* hardware has been reset, we need to reload some things */
5737         ixgbe_configure(adapter);
5738
5739         ixgbe_up_complete(adapter);
5740 }
5741
5742 void ixgbe_reset(struct ixgbe_adapter *adapter)
5743 {
5744         struct ixgbe_hw *hw = &adapter->hw;
5745         struct net_device *netdev = adapter->netdev;
5746         int err;
5747
5748         if (ixgbe_removed(hw->hw_addr))
5749                 return;
5750         /* lock SFP init bit to prevent race conditions with the watchdog */
5751         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5752                 usleep_range(1000, 2000);
5753
5754         /* clear all SFP and link config related flags while holding SFP_INIT */
5755         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5756                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5757         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5758
5759         err = hw->mac.ops.init_hw(hw);
5760         switch (err) {
5761         case 0:
5762         case IXGBE_ERR_SFP_NOT_PRESENT:
5763         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5764                 break;
5765         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5766                 e_dev_err("master disable timed out\n");
5767                 break;
5768         case IXGBE_ERR_EEPROM_VERSION:
5769                 /* We are running on a pre-production device, log a warning */
5770                 e_dev_warn("This device is a pre-production adapter/LOM. "
5771                            "Please be aware there may be issues associated with "
5772                            "your hardware.  If you are experiencing problems "
5773                            "please contact your Intel or hardware "
5774                            "representative who provided you with this "
5775                            "hardware.\n");
5776                 break;
5777         default:
5778                 e_dev_err("Hardware Error: %d\n", err);
5779         }
5780
5781         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5782
5783         /* flush entries out of MAC table */
5784         ixgbe_flush_sw_mac_table(adapter);
5785         __dev_uc_unsync(netdev, NULL);
5786
5787         /* do not flush user set addresses */
5788         ixgbe_mac_set_default_filter(adapter);
5789
5790         /* update SAN MAC vmdq pool selection */
5791         if (hw->mac.san_mac_rar_index)
5792                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5793
5794         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5795                 ixgbe_ptp_reset(adapter);
5796
5797         if (hw->phy.ops.set_phy_power) {
5798                 if (!netif_running(adapter->netdev) && !adapter->wol)
5799                         hw->phy.ops.set_phy_power(hw, false);
5800                 else
5801                         hw->phy.ops.set_phy_power(hw, true);
5802         }
5803 }
5804
5805 /**
5806  * ixgbe_clean_tx_ring - Free Tx Buffers
5807  * @tx_ring: ring to be cleaned
5808  **/
5809 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5810 {
5811         u16 i = tx_ring->next_to_clean;
5812         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5813
5814         while (i != tx_ring->next_to_use) {
5815                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5816
5817                 /* Free all the Tx ring sk_buffs */
5818                 if (ring_is_xdp(tx_ring))
5819                         page_frag_free(tx_buffer->data);
5820                 else
5821                         dev_kfree_skb_any(tx_buffer->skb);
5822
5823                 /* unmap skb header data */
5824                 dma_unmap_single(tx_ring->dev,
5825                                  dma_unmap_addr(tx_buffer, dma),
5826                                  dma_unmap_len(tx_buffer, len),
5827                                  DMA_TO_DEVICE);
5828
5829                 /* check for eop_desc to determine the end of the packet */
5830                 eop_desc = tx_buffer->next_to_watch;
5831                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5832
5833                 /* unmap remaining buffers */
5834                 while (tx_desc != eop_desc) {
5835                         tx_buffer++;
5836                         tx_desc++;
5837                         i++;
5838                         if (unlikely(i == tx_ring->count)) {
5839                                 i = 0;
5840                                 tx_buffer = tx_ring->tx_buffer_info;
5841                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5842                         }
5843
5844                         /* unmap any remaining paged data */
5845                         if (dma_unmap_len(tx_buffer, len))
5846                                 dma_unmap_page(tx_ring->dev,
5847                                                dma_unmap_addr(tx_buffer, dma),
5848                                                dma_unmap_len(tx_buffer, len),
5849                                                DMA_TO_DEVICE);
5850                 }
5851
5852                 /* move us one more past the eop_desc for start of next pkt */
5853                 tx_buffer++;
5854                 i++;
5855                 if (unlikely(i == tx_ring->count)) {
5856                         i = 0;
5857                         tx_buffer = tx_ring->tx_buffer_info;
5858                 }
5859         }
5860
5861         /* reset BQL for queue */
5862         if (!ring_is_xdp(tx_ring))
5863                 netdev_tx_reset_queue(txring_txq(tx_ring));
5864
5865         /* reset next_to_use and next_to_clean */
5866         tx_ring->next_to_use = 0;
5867         tx_ring->next_to_clean = 0;
5868 }
5869
5870 /**
5871  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5872  * @adapter: board private structure
5873  **/
5874 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5875 {
5876         int i;
5877
5878         for (i = 0; i < adapter->num_rx_queues; i++)
5879                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5880 }
5881
5882 /**
5883  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5884  * @adapter: board private structure
5885  **/
5886 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5887 {
5888         int i;
5889
5890         for (i = 0; i < adapter->num_tx_queues; i++)
5891                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5892         for (i = 0; i < adapter->num_xdp_queues; i++)
5893                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5894 }
5895
5896 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5897 {
5898         struct hlist_node *node2;
5899         struct ixgbe_fdir_filter *filter;
5900
5901         spin_lock(&adapter->fdir_perfect_lock);
5902
5903         hlist_for_each_entry_safe(filter, node2,
5904                                   &adapter->fdir_filter_list, fdir_node) {
5905                 hlist_del(&filter->fdir_node);
5906                 kfree(filter);
5907         }
5908         adapter->fdir_filter_count = 0;
5909
5910         spin_unlock(&adapter->fdir_perfect_lock);
5911 }
5912
5913 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5914 {
5915         if (netif_is_macvlan(upper)) {
5916                 struct macvlan_dev *vlan = netdev_priv(upper);
5917
5918                 if (vlan->fwd_priv) {
5919                         netif_tx_stop_all_queues(upper);
5920                         netif_carrier_off(upper);
5921                         netif_tx_disable(upper);
5922                 }
5923         }
5924
5925         return 0;
5926 }
5927
5928 void ixgbe_down(struct ixgbe_adapter *adapter)
5929 {
5930         struct net_device *netdev = adapter->netdev;
5931         struct ixgbe_hw *hw = &adapter->hw;
5932         int i;
5933
5934         /* signal that we are down to the interrupt handler */
5935         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5936                 return; /* do nothing if already down */
5937
5938         /* disable receives */
5939         hw->mac.ops.disable_rx(hw);
5940
5941         /* disable all enabled rx queues */
5942         for (i = 0; i < adapter->num_rx_queues; i++)
5943                 /* this call also flushes the previous write */
5944                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5945
5946         usleep_range(10000, 20000);
5947
5948         /* synchronize_sched() needed for pending XDP buffers to drain */
5949         if (adapter->xdp_ring[0])
5950                 synchronize_sched();
5951         netif_tx_stop_all_queues(netdev);
5952
5953         /* call carrier off first to avoid false dev_watchdog timeouts */
5954         netif_carrier_off(netdev);
5955         netif_tx_disable(netdev);
5956
5957         /* disable any upper devices */
5958         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5959                                       ixgbe_disable_macvlan, NULL);
5960
5961         ixgbe_irq_disable(adapter);
5962
5963         ixgbe_napi_disable_all(adapter);
5964
5965         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5966         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5967         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5968
5969         del_timer_sync(&adapter->service_timer);
5970
5971         if (adapter->num_vfs) {
5972                 /* Clear EITR Select mapping */
5973                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5974
5975                 /* Mark all the VFs as inactive */
5976                 for (i = 0 ; i < adapter->num_vfs; i++)
5977                         adapter->vfinfo[i].clear_to_send = false;
5978
5979                 /* ping all the active vfs to let them know we are going down */
5980                 ixgbe_ping_all_vfs(adapter);
5981
5982                 /* Disable all VFTE/VFRE TX/RX */
5983                 ixgbe_disable_tx_rx(adapter);
5984         }
5985
5986         /* disable transmits in the hardware now that interrupts are off */
5987         for (i = 0; i < adapter->num_tx_queues; i++) {
5988                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5989                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5990         }
5991         for (i = 0; i < adapter->num_xdp_queues; i++) {
5992                 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
5993
5994                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5995         }
5996
5997         /* Disable the Tx DMA engine on 82599 and later MAC */
5998         switch (hw->mac.type) {
5999         case ixgbe_mac_82599EB:
6000         case ixgbe_mac_X540:
6001         case ixgbe_mac_X550:
6002         case ixgbe_mac_X550EM_x:
6003         case ixgbe_mac_x550em_a:
6004                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
6005                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
6006                                  ~IXGBE_DMATXCTL_TE));
6007                 break;
6008         default:
6009                 break;
6010         }
6011
6012         if (!pci_channel_offline(adapter->pdev))
6013                 ixgbe_reset(adapter);
6014
6015         /* power down the optics for 82599 SFP+ fiber */
6016         if (hw->mac.ops.disable_tx_laser)
6017                 hw->mac.ops.disable_tx_laser(hw);
6018
6019         ixgbe_clean_all_tx_rings(adapter);
6020         ixgbe_clean_all_rx_rings(adapter);
6021 }
6022
6023 /**
6024  * ixgbe_eee_capable - helper function to determine EEE support on X550
6025  * @adapter: board private structure
6026  */
6027 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6028 {
6029         struct ixgbe_hw *hw = &adapter->hw;
6030
6031         switch (hw->device_id) {
6032         case IXGBE_DEV_ID_X550EM_A_1G_T:
6033         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6034                 if (!hw->phy.eee_speeds_supported)
6035                         break;
6036                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6037                 if (!hw->phy.eee_speeds_advertised)
6038                         break;
6039                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6040                 break;
6041         default:
6042                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6043                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6044                 break;
6045         }
6046 }
6047
6048 /**
6049  * ixgbe_tx_timeout - Respond to a Tx Hang
6050  * @netdev: network interface device structure
6051  **/
6052 static void ixgbe_tx_timeout(struct net_device *netdev)
6053 {
6054         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6055
6056         /* Do the reset outside of interrupt context */
6057         ixgbe_tx_timeout_reset(adapter);
6058 }
6059
6060 #ifdef CONFIG_IXGBE_DCB
6061 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6062 {
6063         struct ixgbe_hw *hw = &adapter->hw;
6064         struct tc_configuration *tc;
6065         int j;
6066
6067         switch (hw->mac.type) {
6068         case ixgbe_mac_82598EB:
6069         case ixgbe_mac_82599EB:
6070                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6071                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6072                 break;
6073         case ixgbe_mac_X540:
6074         case ixgbe_mac_X550:
6075                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6076                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6077                 break;
6078         case ixgbe_mac_X550EM_x:
6079         case ixgbe_mac_x550em_a:
6080         default:
6081                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6082                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6083                 break;
6084         }
6085
6086         /* Configure DCB traffic classes */
6087         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6088                 tc = &adapter->dcb_cfg.tc_config[j];
6089                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6090                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6091                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6092                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6093                 tc->dcb_pfc = pfc_disabled;
6094         }
6095
6096         /* Initialize default user to priority mapping, UPx->TC0 */
6097         tc = &adapter->dcb_cfg.tc_config[0];
6098         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6099         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6100
6101         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6102         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6103         adapter->dcb_cfg.pfc_mode_enable = false;
6104         adapter->dcb_set_bitmap = 0x00;
6105         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6106                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6107         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6108                sizeof(adapter->temp_dcb_cfg));
6109 }
6110 #endif
6111
6112 /**
6113  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6114  * @adapter: board private structure to initialize
6115  *
6116  * ixgbe_sw_init initializes the Adapter private data structure.
6117  * Fields are initialized based on PCI device information and
6118  * OS network device settings (MTU size).
6119  **/
6120 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6121                          const struct ixgbe_info *ii)
6122 {
6123         struct ixgbe_hw *hw = &adapter->hw;
6124         struct pci_dev *pdev = adapter->pdev;
6125         unsigned int rss, fdir;
6126         u32 fwsm;
6127         int i;
6128
6129         /* PCI config space info */
6130
6131         hw->vendor_id = pdev->vendor;
6132         hw->device_id = pdev->device;
6133         hw->revision_id = pdev->revision;
6134         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6135         hw->subsystem_device_id = pdev->subsystem_device;
6136
6137         /* get_invariants needs the device IDs */
6138         ii->get_invariants(hw);
6139
6140         /* Set common capability flags and settings */
6141         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6142         adapter->ring_feature[RING_F_RSS].limit = rss;
6143         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6144         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6145         adapter->atr_sample_rate = 20;
6146         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6147         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6148         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6149 #ifdef CONFIG_IXGBE_DCA
6150         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6151 #endif
6152 #ifdef CONFIG_IXGBE_DCB
6153         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6154         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6155 #endif
6156 #ifdef IXGBE_FCOE
6157         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6158         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6159 #ifdef CONFIG_IXGBE_DCB
6160         /* Default traffic class to use for FCoE */
6161         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6162 #endif /* CONFIG_IXGBE_DCB */
6163 #endif /* IXGBE_FCOE */
6164
6165         /* initialize static ixgbe jump table entries */
6166         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6167                                           GFP_KERNEL);
6168         if (!adapter->jump_tables[0])
6169                 return -ENOMEM;
6170         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6171
6172         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6173                 adapter->jump_tables[i] = NULL;
6174
6175         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
6176                                      hw->mac.num_rar_entries,
6177                                      GFP_ATOMIC);
6178         if (!adapter->mac_table)
6179                 return -ENOMEM;
6180
6181         if (ixgbe_init_rss_key(adapter))
6182                 return -ENOMEM;
6183
6184         /* Set MAC specific capability flags and exceptions */
6185         switch (hw->mac.type) {
6186         case ixgbe_mac_82598EB:
6187                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6188
6189                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6190                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6191
6192                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6193                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6194                 adapter->atr_sample_rate = 0;
6195                 adapter->fdir_pballoc = 0;
6196 #ifdef IXGBE_FCOE
6197                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6198                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6199 #ifdef CONFIG_IXGBE_DCB
6200                 adapter->fcoe.up = 0;
6201 #endif /* IXGBE_DCB */
6202 #endif /* IXGBE_FCOE */
6203                 break;
6204         case ixgbe_mac_82599EB:
6205                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6206                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6207                 break;
6208         case ixgbe_mac_X540:
6209                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6210                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6211                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6212                 break;
6213         case ixgbe_mac_x550em_a:
6214                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6215                 switch (hw->device_id) {
6216                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6217                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6218                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6219                         break;
6220                 default:
6221                         break;
6222                 }
6223         /* fall through */
6224         case ixgbe_mac_X550EM_x:
6225 #ifdef CONFIG_IXGBE_DCB
6226                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6227 #endif
6228 #ifdef IXGBE_FCOE
6229                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6230 #ifdef CONFIG_IXGBE_DCB
6231                 adapter->fcoe.up = 0;
6232 #endif /* IXGBE_DCB */
6233 #endif /* IXGBE_FCOE */
6234         /* Fall Through */
6235         case ixgbe_mac_X550:
6236                 if (hw->mac.type == ixgbe_mac_X550)
6237                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6238 #ifdef CONFIG_IXGBE_DCA
6239                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6240 #endif
6241                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6242                 break;
6243         default:
6244                 break;
6245         }
6246
6247 #ifdef IXGBE_FCOE
6248         /* FCoE support exists, always init the FCoE lock */
6249         spin_lock_init(&adapter->fcoe.lock);
6250
6251 #endif
6252         /* n-tuple support exists, always init our spinlock */
6253         spin_lock_init(&adapter->fdir_perfect_lock);
6254
6255 #ifdef CONFIG_IXGBE_DCB
6256         ixgbe_init_dcb(adapter);
6257 #endif
6258
6259         /* default flow control settings */
6260         hw->fc.requested_mode = ixgbe_fc_full;
6261         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6262         ixgbe_pbthresh_setup(adapter);
6263         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6264         hw->fc.send_xon = true;
6265         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6266
6267 #ifdef CONFIG_PCI_IOV
6268         if (max_vfs > 0)
6269                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6270
6271         /* assign number of SR-IOV VFs */
6272         if (hw->mac.type != ixgbe_mac_82598EB) {
6273                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6274                         max_vfs = 0;
6275                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6276                 }
6277         }
6278 #endif /* CONFIG_PCI_IOV */
6279
6280         /* enable itr by default in dynamic mode */
6281         adapter->rx_itr_setting = 1;
6282         adapter->tx_itr_setting = 1;
6283
6284         /* set default ring sizes */
6285         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6286         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6287
6288         /* set default work limits */
6289         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6290
6291         /* initialize eeprom parameters */
6292         if (ixgbe_init_eeprom_params_generic(hw)) {
6293                 e_dev_err("EEPROM initialization failed\n");
6294                 return -EIO;
6295         }
6296
6297         /* PF holds first pool slot */
6298         set_bit(0, &adapter->fwd_bitmask);
6299         set_bit(__IXGBE_DOWN, &adapter->state);
6300
6301         return 0;
6302 }
6303
6304 /**
6305  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6306  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6307  *
6308  * Return 0 on success, negative on failure
6309  **/
6310 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6311 {
6312         struct device *dev = tx_ring->dev;
6313         int orig_node = dev_to_node(dev);
6314         int ring_node = -1;
6315         int size;
6316
6317         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6318
6319         if (tx_ring->q_vector)
6320                 ring_node = tx_ring->q_vector->numa_node;
6321
6322         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6323         if (!tx_ring->tx_buffer_info)
6324                 tx_ring->tx_buffer_info = vmalloc(size);
6325         if (!tx_ring->tx_buffer_info)
6326                 goto err;
6327
6328         /* round up to nearest 4K */
6329         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6330         tx_ring->size = ALIGN(tx_ring->size, 4096);
6331
6332         set_dev_node(dev, ring_node);
6333         tx_ring->desc = dma_alloc_coherent(dev,
6334                                            tx_ring->size,
6335                                            &tx_ring->dma,
6336                                            GFP_KERNEL);
6337         set_dev_node(dev, orig_node);
6338         if (!tx_ring->desc)
6339                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6340                                                    &tx_ring->dma, GFP_KERNEL);
6341         if (!tx_ring->desc)
6342                 goto err;
6343
6344         tx_ring->next_to_use = 0;
6345         tx_ring->next_to_clean = 0;
6346         return 0;
6347
6348 err:
6349         vfree(tx_ring->tx_buffer_info);
6350         tx_ring->tx_buffer_info = NULL;
6351         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6352         return -ENOMEM;
6353 }
6354
6355 /**
6356  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6357  * @adapter: board private structure
6358  *
6359  * If this function returns with an error, then it's possible one or
6360  * more of the rings is populated (while the rest are not).  It is the
6361  * callers duty to clean those orphaned rings.
6362  *
6363  * Return 0 on success, negative on failure
6364  **/
6365 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6366 {
6367         int i, j = 0, err = 0;
6368
6369         for (i = 0; i < adapter->num_tx_queues; i++) {
6370                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6371                 if (!err)
6372                         continue;
6373
6374                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6375                 goto err_setup_tx;
6376         }
6377         for (j = 0; j < adapter->num_xdp_queues; j++) {
6378                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6379                 if (!err)
6380                         continue;
6381
6382                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6383                 goto err_setup_tx;
6384         }
6385
6386         return 0;
6387 err_setup_tx:
6388         /* rewind the index freeing the rings as we go */
6389         while (j--)
6390                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6391         while (i--)
6392                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6393         return err;
6394 }
6395
6396 /**
6397  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6398  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6399  *
6400  * Returns 0 on success, negative on failure
6401  **/
6402 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6403                              struct ixgbe_ring *rx_ring)
6404 {
6405         struct device *dev = rx_ring->dev;
6406         int orig_node = dev_to_node(dev);
6407         int ring_node = -1;
6408         int size;
6409
6410         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6411
6412         if (rx_ring->q_vector)
6413                 ring_node = rx_ring->q_vector->numa_node;
6414
6415         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6416         if (!rx_ring->rx_buffer_info)
6417                 rx_ring->rx_buffer_info = vmalloc(size);
6418         if (!rx_ring->rx_buffer_info)
6419                 goto err;
6420
6421         /* Round up to nearest 4K */
6422         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6423         rx_ring->size = ALIGN(rx_ring->size, 4096);
6424
6425         set_dev_node(dev, ring_node);
6426         rx_ring->desc = dma_alloc_coherent(dev,
6427                                            rx_ring->size,
6428                                            &rx_ring->dma,
6429                                            GFP_KERNEL);
6430         set_dev_node(dev, orig_node);
6431         if (!rx_ring->desc)
6432                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6433                                                    &rx_ring->dma, GFP_KERNEL);
6434         if (!rx_ring->desc)
6435                 goto err;
6436
6437         rx_ring->next_to_clean = 0;
6438         rx_ring->next_to_use = 0;
6439
6440         /* XDP RX-queue info */
6441         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6442                              rx_ring->queue_index) < 0)
6443                 goto err;
6444
6445         rx_ring->xdp_prog = adapter->xdp_prog;
6446
6447         return 0;
6448 err:
6449         vfree(rx_ring->rx_buffer_info);
6450         rx_ring->rx_buffer_info = NULL;
6451         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6452         return -ENOMEM;
6453 }
6454
6455 /**
6456  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6457  * @adapter: board private structure
6458  *
6459  * If this function returns with an error, then it's possible one or
6460  * more of the rings is populated (while the rest are not).  It is the
6461  * callers duty to clean those orphaned rings.
6462  *
6463  * Return 0 on success, negative on failure
6464  **/
6465 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6466 {
6467         int i, err = 0;
6468
6469         for (i = 0; i < adapter->num_rx_queues; i++) {
6470                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6471                 if (!err)
6472                         continue;
6473
6474                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6475                 goto err_setup_rx;
6476         }
6477
6478 #ifdef IXGBE_FCOE
6479         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6480         if (!err)
6481 #endif
6482                 return 0;
6483 err_setup_rx:
6484         /* rewind the index freeing the rings as we go */
6485         while (i--)
6486                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6487         return err;
6488 }
6489
6490 /**
6491  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6492  * @tx_ring: Tx descriptor ring for a specific queue
6493  *
6494  * Free all transmit software resources
6495  **/
6496 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6497 {
6498         ixgbe_clean_tx_ring(tx_ring);
6499
6500         vfree(tx_ring->tx_buffer_info);
6501         tx_ring->tx_buffer_info = NULL;
6502
6503         /* if not set, then don't free */
6504         if (!tx_ring->desc)
6505                 return;
6506
6507         dma_free_coherent(tx_ring->dev, tx_ring->size,
6508                           tx_ring->desc, tx_ring->dma);
6509
6510         tx_ring->desc = NULL;
6511 }
6512
6513 /**
6514  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6515  * @adapter: board private structure
6516  *
6517  * Free all transmit software resources
6518  **/
6519 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6520 {
6521         int i;
6522
6523         for (i = 0; i < adapter->num_tx_queues; i++)
6524                 if (adapter->tx_ring[i]->desc)
6525                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6526         for (i = 0; i < adapter->num_xdp_queues; i++)
6527                 if (adapter->xdp_ring[i]->desc)
6528                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6529 }
6530
6531 /**
6532  * ixgbe_free_rx_resources - Free Rx Resources
6533  * @rx_ring: ring to clean the resources from
6534  *
6535  * Free all receive software resources
6536  **/
6537 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6538 {
6539         ixgbe_clean_rx_ring(rx_ring);
6540
6541         rx_ring->xdp_prog = NULL;
6542         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6543         vfree(rx_ring->rx_buffer_info);
6544         rx_ring->rx_buffer_info = NULL;
6545
6546         /* if not set, then don't free */
6547         if (!rx_ring->desc)
6548                 return;
6549
6550         dma_free_coherent(rx_ring->dev, rx_ring->size,
6551                           rx_ring->desc, rx_ring->dma);
6552
6553         rx_ring->desc = NULL;
6554 }
6555
6556 /**
6557  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6558  * @adapter: board private structure
6559  *
6560  * Free all receive software resources
6561  **/
6562 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6563 {
6564         int i;
6565
6566 #ifdef IXGBE_FCOE
6567         ixgbe_free_fcoe_ddp_resources(adapter);
6568
6569 #endif
6570         for (i = 0; i < adapter->num_rx_queues; i++)
6571                 if (adapter->rx_ring[i]->desc)
6572                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6573 }
6574
6575 /**
6576  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6577  * @netdev: network interface device structure
6578  * @new_mtu: new value for maximum frame size
6579  *
6580  * Returns 0 on success, negative on failure
6581  **/
6582 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6583 {
6584         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6585
6586         /*
6587          * For 82599EB we cannot allow legacy VFs to enable their receive
6588          * paths when MTU greater than 1500 is configured.  So display a
6589          * warning that legacy VFs will be disabled.
6590          */
6591         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6592             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6593             (new_mtu > ETH_DATA_LEN))
6594                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6595
6596         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6597
6598         /* must set new MTU before calling down or up */
6599         netdev->mtu = new_mtu;
6600
6601         if (netif_running(netdev))
6602                 ixgbe_reinit_locked(adapter);
6603
6604         return 0;
6605 }
6606
6607 /**
6608  * ixgbe_open - Called when a network interface is made active
6609  * @netdev: network interface device structure
6610  *
6611  * Returns 0 on success, negative value on failure
6612  *
6613  * The open entry point is called when a network interface is made
6614  * active by the system (IFF_UP).  At this point all resources needed
6615  * for transmit and receive operations are allocated, the interrupt
6616  * handler is registered with the OS, the watchdog timer is started,
6617  * and the stack is notified that the interface is ready.
6618  **/
6619 int ixgbe_open(struct net_device *netdev)
6620 {
6621         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6622         struct ixgbe_hw *hw = &adapter->hw;
6623         int err, queues;
6624
6625         /* disallow open during test */
6626         if (test_bit(__IXGBE_TESTING, &adapter->state))
6627                 return -EBUSY;
6628
6629         netif_carrier_off(netdev);
6630
6631         /* allocate transmit descriptors */
6632         err = ixgbe_setup_all_tx_resources(adapter);
6633         if (err)
6634                 goto err_setup_tx;
6635
6636         /* allocate receive descriptors */
6637         err = ixgbe_setup_all_rx_resources(adapter);
6638         if (err)
6639                 goto err_setup_rx;
6640
6641         ixgbe_configure(adapter);
6642
6643         err = ixgbe_request_irq(adapter);
6644         if (err)
6645                 goto err_req_irq;
6646
6647         /* Notify the stack of the actual queue counts. */
6648         if (adapter->num_rx_pools > 1)
6649                 queues = adapter->num_rx_queues_per_pool;
6650         else
6651                 queues = adapter->num_tx_queues;
6652
6653         err = netif_set_real_num_tx_queues(netdev, queues);
6654         if (err)
6655                 goto err_set_queues;
6656
6657         if (adapter->num_rx_pools > 1 &&
6658             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6659                 queues = IXGBE_MAX_L2A_QUEUES;
6660         else
6661                 queues = adapter->num_rx_queues;
6662         err = netif_set_real_num_rx_queues(netdev, queues);
6663         if (err)
6664                 goto err_set_queues;
6665
6666         ixgbe_ptp_init(adapter);
6667
6668         ixgbe_up_complete(adapter);
6669
6670         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6671         udp_tunnel_get_rx_info(netdev);
6672
6673         return 0;
6674
6675 err_set_queues:
6676         ixgbe_free_irq(adapter);
6677 err_req_irq:
6678         ixgbe_free_all_rx_resources(adapter);
6679         if (hw->phy.ops.set_phy_power && !adapter->wol)
6680                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6681 err_setup_rx:
6682         ixgbe_free_all_tx_resources(adapter);
6683 err_setup_tx:
6684         ixgbe_reset(adapter);
6685
6686         return err;
6687 }
6688
6689 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6690 {
6691         ixgbe_ptp_suspend(adapter);
6692
6693         if (adapter->hw.phy.ops.enter_lplu) {
6694                 adapter->hw.phy.reset_disable = true;
6695                 ixgbe_down(adapter);
6696                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6697                 adapter->hw.phy.reset_disable = false;
6698         } else {
6699                 ixgbe_down(adapter);
6700         }
6701
6702         ixgbe_free_irq(adapter);
6703
6704         ixgbe_free_all_tx_resources(adapter);
6705         ixgbe_free_all_rx_resources(adapter);
6706 }
6707
6708 /**
6709  * ixgbe_close - Disables a network interface
6710  * @netdev: network interface device structure
6711  *
6712  * Returns 0, this is not allowed to fail
6713  *
6714  * The close entry point is called when an interface is de-activated
6715  * by the OS.  The hardware is still under the drivers control, but
6716  * needs to be disabled.  A global MAC reset is issued to stop the
6717  * hardware, and all transmit and receive resources are freed.
6718  **/
6719 int ixgbe_close(struct net_device *netdev)
6720 {
6721         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6722
6723         ixgbe_ptp_stop(adapter);
6724
6725         if (netif_device_present(netdev))
6726                 ixgbe_close_suspend(adapter);
6727
6728         ixgbe_fdir_filter_exit(adapter);
6729
6730         ixgbe_release_hw_control(adapter);
6731
6732         return 0;
6733 }
6734
6735 #ifdef CONFIG_PM
6736 static int ixgbe_resume(struct pci_dev *pdev)
6737 {
6738         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6739         struct net_device *netdev = adapter->netdev;
6740         u32 err;
6741
6742         adapter->hw.hw_addr = adapter->io_addr;
6743         pci_set_power_state(pdev, PCI_D0);
6744         pci_restore_state(pdev);
6745         /*
6746          * pci_restore_state clears dev->state_saved so call
6747          * pci_save_state to restore it.
6748          */
6749         pci_save_state(pdev);
6750
6751         err = pci_enable_device_mem(pdev);
6752         if (err) {
6753                 e_dev_err("Cannot enable PCI device from suspend\n");
6754                 return err;
6755         }
6756         smp_mb__before_atomic();
6757         clear_bit(__IXGBE_DISABLED, &adapter->state);
6758         pci_set_master(pdev);
6759
6760         pci_wake_from_d3(pdev, false);
6761
6762         ixgbe_reset(adapter);
6763
6764         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6765
6766         rtnl_lock();
6767         err = ixgbe_init_interrupt_scheme(adapter);
6768         if (!err && netif_running(netdev))
6769                 err = ixgbe_open(netdev);
6770
6771
6772         if (!err)
6773                 netif_device_attach(netdev);
6774         rtnl_unlock();
6775
6776         return err;
6777 }
6778 #endif /* CONFIG_PM */
6779
6780 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6781 {
6782         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6783         struct net_device *netdev = adapter->netdev;
6784         struct ixgbe_hw *hw = &adapter->hw;
6785         u32 ctrl;
6786         u32 wufc = adapter->wol;
6787 #ifdef CONFIG_PM
6788         int retval = 0;
6789 #endif
6790
6791         rtnl_lock();
6792         netif_device_detach(netdev);
6793
6794         if (netif_running(netdev))
6795                 ixgbe_close_suspend(adapter);
6796
6797         ixgbe_clear_interrupt_scheme(adapter);
6798         rtnl_unlock();
6799
6800 #ifdef CONFIG_PM
6801         retval = pci_save_state(pdev);
6802         if (retval)
6803                 return retval;
6804
6805 #endif
6806         if (hw->mac.ops.stop_link_on_d3)
6807                 hw->mac.ops.stop_link_on_d3(hw);
6808
6809         if (wufc) {
6810                 u32 fctrl;
6811
6812                 ixgbe_set_rx_mode(netdev);
6813
6814                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6815                 if (hw->mac.ops.enable_tx_laser)
6816                         hw->mac.ops.enable_tx_laser(hw);
6817
6818                 /* enable the reception of multicast packets */
6819                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6820                 fctrl |= IXGBE_FCTRL_MPE;
6821                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6822
6823                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6824                 ctrl |= IXGBE_CTRL_GIO_DIS;
6825                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6826
6827                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6828         } else {
6829                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6830                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6831         }
6832
6833         switch (hw->mac.type) {
6834         case ixgbe_mac_82598EB:
6835                 pci_wake_from_d3(pdev, false);
6836                 break;
6837         case ixgbe_mac_82599EB:
6838         case ixgbe_mac_X540:
6839         case ixgbe_mac_X550:
6840         case ixgbe_mac_X550EM_x:
6841         case ixgbe_mac_x550em_a:
6842                 pci_wake_from_d3(pdev, !!wufc);
6843                 break;
6844         default:
6845                 break;
6846         }
6847
6848         *enable_wake = !!wufc;
6849         if (hw->phy.ops.set_phy_power && !*enable_wake)
6850                 hw->phy.ops.set_phy_power(hw, false);
6851
6852         ixgbe_release_hw_control(adapter);
6853
6854         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6855                 pci_disable_device(pdev);
6856
6857         return 0;
6858 }
6859
6860 #ifdef CONFIG_PM
6861 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6862 {
6863         int retval;
6864         bool wake;
6865
6866         retval = __ixgbe_shutdown(pdev, &wake);
6867         if (retval)
6868                 return retval;
6869
6870         if (wake) {
6871                 pci_prepare_to_sleep(pdev);
6872         } else {
6873                 pci_wake_from_d3(pdev, false);
6874                 pci_set_power_state(pdev, PCI_D3hot);
6875         }
6876
6877         return 0;
6878 }
6879 #endif /* CONFIG_PM */
6880
6881 static void ixgbe_shutdown(struct pci_dev *pdev)
6882 {
6883         bool wake;
6884
6885         __ixgbe_shutdown(pdev, &wake);
6886
6887         if (system_state == SYSTEM_POWER_OFF) {
6888                 pci_wake_from_d3(pdev, wake);
6889                 pci_set_power_state(pdev, PCI_D3hot);
6890         }
6891 }
6892
6893 /**
6894  * ixgbe_update_stats - Update the board statistics counters.
6895  * @adapter: board private structure
6896  **/
6897 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6898 {
6899         struct net_device *netdev = adapter->netdev;
6900         struct ixgbe_hw *hw = &adapter->hw;
6901         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6902         u64 total_mpc = 0;
6903         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6904         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6905         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6906         u64 alloc_rx_page = 0;
6907         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6908
6909         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6910             test_bit(__IXGBE_RESETTING, &adapter->state))
6911                 return;
6912
6913         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6914                 u64 rsc_count = 0;
6915                 u64 rsc_flush = 0;
6916                 for (i = 0; i < adapter->num_rx_queues; i++) {
6917                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6918                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6919                 }
6920                 adapter->rsc_total_count = rsc_count;
6921                 adapter->rsc_total_flush = rsc_flush;
6922         }
6923
6924         for (i = 0; i < adapter->num_rx_queues; i++) {
6925                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6926                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6927                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
6928                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6929                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6930                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6931                 bytes += rx_ring->stats.bytes;
6932                 packets += rx_ring->stats.packets;
6933         }
6934         adapter->non_eop_descs = non_eop_descs;
6935         adapter->alloc_rx_page = alloc_rx_page;
6936         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6937         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6938         adapter->hw_csum_rx_error = hw_csum_rx_error;
6939         netdev->stats.rx_bytes = bytes;
6940         netdev->stats.rx_packets = packets;
6941
6942         bytes = 0;
6943         packets = 0;
6944         /* gather some stats to the adapter struct that are per queue */
6945         for (i = 0; i < adapter->num_tx_queues; i++) {
6946                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6947                 restart_queue += tx_ring->tx_stats.restart_queue;
6948                 tx_busy += tx_ring->tx_stats.tx_busy;
6949                 bytes += tx_ring->stats.bytes;
6950                 packets += tx_ring->stats.packets;
6951         }
6952         for (i = 0; i < adapter->num_xdp_queues; i++) {
6953                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6954
6955                 restart_queue += xdp_ring->tx_stats.restart_queue;
6956                 tx_busy += xdp_ring->tx_stats.tx_busy;
6957                 bytes += xdp_ring->stats.bytes;
6958                 packets += xdp_ring->stats.packets;
6959         }
6960         adapter->restart_queue = restart_queue;
6961         adapter->tx_busy = tx_busy;
6962         netdev->stats.tx_bytes = bytes;
6963         netdev->stats.tx_packets = packets;
6964
6965         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6966
6967         /* 8 register reads */
6968         for (i = 0; i < 8; i++) {
6969                 /* for packet buffers not used, the register should read 0 */
6970                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6971                 missed_rx += mpc;
6972                 hwstats->mpc[i] += mpc;
6973                 total_mpc += hwstats->mpc[i];
6974                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6975                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6976                 switch (hw->mac.type) {
6977                 case ixgbe_mac_82598EB:
6978                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6979                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6980                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6981                         hwstats->pxonrxc[i] +=
6982                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6983                         break;
6984                 case ixgbe_mac_82599EB:
6985                 case ixgbe_mac_X540:
6986                 case ixgbe_mac_X550:
6987                 case ixgbe_mac_X550EM_x:
6988                 case ixgbe_mac_x550em_a:
6989                         hwstats->pxonrxc[i] +=
6990                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6991                         break;
6992                 default:
6993                         break;
6994                 }
6995         }
6996
6997         /*16 register reads */
6998         for (i = 0; i < 16; i++) {
6999                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7000                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7001                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7002                     (hw->mac.type == ixgbe_mac_X540) ||
7003                     (hw->mac.type == ixgbe_mac_X550) ||
7004                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7005                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7006                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7007                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7008                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7009                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7010                 }
7011         }
7012
7013         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7014         /* work around hardware counting issue */
7015         hwstats->gprc -= missed_rx;
7016
7017         ixgbe_update_xoff_received(adapter);
7018
7019         /* 82598 hardware only has a 32 bit counter in the high register */
7020         switch (hw->mac.type) {
7021         case ixgbe_mac_82598EB:
7022                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7023                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7024                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7025                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7026                 break;
7027         case ixgbe_mac_X540:
7028         case ixgbe_mac_X550:
7029         case ixgbe_mac_X550EM_x:
7030         case ixgbe_mac_x550em_a:
7031                 /* OS2BMC stats are X540 and later */
7032                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7033                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7034                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7035                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7036                 /* fall through */
7037         case ixgbe_mac_82599EB:
7038                 for (i = 0; i < 16; i++)
7039                         adapter->hw_rx_no_dma_resources +=
7040                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7041                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7042                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7043                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7044                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7045                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7046                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7047                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7048                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7049                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7050 #ifdef IXGBE_FCOE
7051                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7052                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7053                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7054                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7055                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7056                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7057                 /* Add up per cpu counters for total ddp aloc fail */
7058                 if (adapter->fcoe.ddp_pool) {
7059                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7060                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7061                         unsigned int cpu;
7062                         u64 noddp = 0, noddp_ext_buff = 0;
7063                         for_each_possible_cpu(cpu) {
7064                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7065                                 noddp += ddp_pool->noddp;
7066                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7067                         }
7068                         hwstats->fcoe_noddp = noddp;
7069                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7070                 }
7071 #endif /* IXGBE_FCOE */
7072                 break;
7073         default:
7074                 break;
7075         }
7076         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7077         hwstats->bprc += bprc;
7078         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7079         if (hw->mac.type == ixgbe_mac_82598EB)
7080                 hwstats->mprc -= bprc;
7081         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7082         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7083         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7084         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7085         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7086         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7087         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7088         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7089         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7090         hwstats->lxontxc += lxon;
7091         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7092         hwstats->lxofftxc += lxoff;
7093         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7094         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7095         /*
7096          * 82598 errata - tx of flow control packets is included in tx counters
7097          */
7098         xon_off_tot = lxon + lxoff;
7099         hwstats->gptc -= xon_off_tot;
7100         hwstats->mptc -= xon_off_tot;
7101         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7102         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7103         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7104         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7105         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7106         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7107         hwstats->ptc64 -= xon_off_tot;
7108         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7109         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7110         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7111         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7112         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7113         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7114
7115         /* Fill out the OS statistics structure */
7116         netdev->stats.multicast = hwstats->mprc;
7117
7118         /* Rx Errors */
7119         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7120         netdev->stats.rx_dropped = 0;
7121         netdev->stats.rx_length_errors = hwstats->rlec;
7122         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7123         netdev->stats.rx_missed_errors = total_mpc;
7124 }
7125
7126 /**
7127  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7128  * @adapter: pointer to the device adapter structure
7129  **/
7130 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7131 {
7132         struct ixgbe_hw *hw = &adapter->hw;
7133         int i;
7134
7135         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7136                 return;
7137
7138         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7139
7140         /* if interface is down do nothing */
7141         if (test_bit(__IXGBE_DOWN, &adapter->state))
7142                 return;
7143
7144         /* do nothing if we are not using signature filters */
7145         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7146                 return;
7147
7148         adapter->fdir_overflow++;
7149
7150         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7151                 for (i = 0; i < adapter->num_tx_queues; i++)
7152                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7153                                 &(adapter->tx_ring[i]->state));
7154                 for (i = 0; i < adapter->num_xdp_queues; i++)
7155                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7156                                 &adapter->xdp_ring[i]->state);
7157                 /* re-enable flow director interrupts */
7158                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7159         } else {
7160                 e_err(probe, "failed to finish FDIR re-initialization, "
7161                       "ignored adding FDIR ATR filters\n");
7162         }
7163 }
7164
7165 /**
7166  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7167  * @adapter: pointer to the device adapter structure
7168  *
7169  * This function serves two purposes.  First it strobes the interrupt lines
7170  * in order to make certain interrupts are occurring.  Secondly it sets the
7171  * bits needed to check for TX hangs.  As a result we should immediately
7172  * determine if a hang has occurred.
7173  */
7174 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7175 {
7176         struct ixgbe_hw *hw = &adapter->hw;
7177         u64 eics = 0;
7178         int i;
7179
7180         /* If we're down, removing or resetting, just bail */
7181         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7182             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7183             test_bit(__IXGBE_RESETTING, &adapter->state))
7184                 return;
7185
7186         /* Force detection of hung controller */
7187         if (netif_carrier_ok(adapter->netdev)) {
7188                 for (i = 0; i < adapter->num_tx_queues; i++)
7189                         set_check_for_tx_hang(adapter->tx_ring[i]);
7190                 for (i = 0; i < adapter->num_xdp_queues; i++)
7191                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7192         }
7193
7194         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7195                 /*
7196                  * for legacy and MSI interrupts don't set any bits
7197                  * that are enabled for EIAM, because this operation
7198                  * would set *both* EIMS and EICS for any bit in EIAM
7199                  */
7200                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7201                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7202         } else {
7203                 /* get one bit for every active tx/rx interrupt vector */
7204                 for (i = 0; i < adapter->num_q_vectors; i++) {
7205                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7206                         if (qv->rx.ring || qv->tx.ring)
7207                                 eics |= BIT_ULL(i);
7208                 }
7209         }
7210
7211         /* Cause software interrupt to ensure rings are cleaned */
7212         ixgbe_irq_rearm_queues(adapter, eics);
7213 }
7214
7215 /**
7216  * ixgbe_watchdog_update_link - update the link status
7217  * @adapter: pointer to the device adapter structure
7218  * @link_speed: pointer to a u32 to store the link_speed
7219  **/
7220 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7221 {
7222         struct ixgbe_hw *hw = &adapter->hw;
7223         u32 link_speed = adapter->link_speed;
7224         bool link_up = adapter->link_up;
7225         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7226
7227         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7228                 return;
7229
7230         if (hw->mac.ops.check_link) {
7231                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7232         } else {
7233                 /* always assume link is up, if no check link function */
7234                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7235                 link_up = true;
7236         }
7237
7238         if (adapter->ixgbe_ieee_pfc)
7239                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7240
7241         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7242                 hw->mac.ops.fc_enable(hw);
7243                 ixgbe_set_rx_drop_en(adapter);
7244         }
7245
7246         if (link_up ||
7247             time_after(jiffies, (adapter->link_check_timeout +
7248                                  IXGBE_TRY_LINK_TIMEOUT))) {
7249                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7250                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7251                 IXGBE_WRITE_FLUSH(hw);
7252         }
7253
7254         adapter->link_up = link_up;
7255         adapter->link_speed = link_speed;
7256 }
7257
7258 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7259 {
7260 #ifdef CONFIG_IXGBE_DCB
7261         struct net_device *netdev = adapter->netdev;
7262         struct dcb_app app = {
7263                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7264                               .protocol = 0,
7265                              };
7266         u8 up = 0;
7267
7268         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7269                 up = dcb_ieee_getapp_mask(netdev, &app);
7270
7271         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7272 #endif
7273 }
7274
7275 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
7276 {
7277         if (netif_is_macvlan(upper)) {
7278                 struct macvlan_dev *vlan = netdev_priv(upper);
7279
7280                 if (vlan->fwd_priv)
7281                         netif_tx_wake_all_queues(upper);
7282         }
7283
7284         return 0;
7285 }
7286
7287 /**
7288  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7289  *                             print link up message
7290  * @adapter: pointer to the device adapter structure
7291  **/
7292 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7293 {
7294         struct net_device *netdev = adapter->netdev;
7295         struct ixgbe_hw *hw = &adapter->hw;
7296         u32 link_speed = adapter->link_speed;
7297         const char *speed_str;
7298         bool flow_rx, flow_tx;
7299
7300         /* only continue if link was previously down */
7301         if (netif_carrier_ok(netdev))
7302                 return;
7303
7304         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7305
7306         switch (hw->mac.type) {
7307         case ixgbe_mac_82598EB: {
7308                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7309                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7310                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7311                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7312         }
7313                 break;
7314         case ixgbe_mac_X540:
7315         case ixgbe_mac_X550:
7316         case ixgbe_mac_X550EM_x:
7317         case ixgbe_mac_x550em_a:
7318         case ixgbe_mac_82599EB: {
7319                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7320                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7321                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7322                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7323         }
7324                 break;
7325         default:
7326                 flow_tx = false;
7327                 flow_rx = false;
7328                 break;
7329         }
7330
7331         adapter->last_rx_ptp_check = jiffies;
7332
7333         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7334                 ixgbe_ptp_start_cyclecounter(adapter);
7335
7336         switch (link_speed) {
7337         case IXGBE_LINK_SPEED_10GB_FULL:
7338                 speed_str = "10 Gbps";
7339                 break;
7340         case IXGBE_LINK_SPEED_2_5GB_FULL:
7341                 speed_str = "2.5 Gbps";
7342                 break;
7343         case IXGBE_LINK_SPEED_1GB_FULL:
7344                 speed_str = "1 Gbps";
7345                 break;
7346         case IXGBE_LINK_SPEED_100_FULL:
7347                 speed_str = "100 Mbps";
7348                 break;
7349         case IXGBE_LINK_SPEED_10_FULL:
7350                 speed_str = "10 Mbps";
7351                 break;
7352         default:
7353                 speed_str = "unknown speed";
7354                 break;
7355         }
7356         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7357                ((flow_rx && flow_tx) ? "RX/TX" :
7358                (flow_rx ? "RX" :
7359                (flow_tx ? "TX" : "None"))));
7360
7361         netif_carrier_on(netdev);
7362         ixgbe_check_vf_rate_limit(adapter);
7363
7364         /* enable transmits */
7365         netif_tx_wake_all_queues(adapter->netdev);
7366
7367         /* enable any upper devices */
7368         rtnl_lock();
7369         netdev_walk_all_upper_dev_rcu(adapter->netdev,
7370                                       ixgbe_enable_macvlan, NULL);
7371         rtnl_unlock();
7372
7373         /* update the default user priority for VFs */
7374         ixgbe_update_default_up(adapter);
7375
7376         /* ping all the active vfs to let them know link has changed */
7377         ixgbe_ping_all_vfs(adapter);
7378 }
7379
7380 /**
7381  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7382  *                               print link down message
7383  * @adapter: pointer to the adapter structure
7384  **/
7385 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7386 {
7387         struct net_device *netdev = adapter->netdev;
7388         struct ixgbe_hw *hw = &adapter->hw;
7389
7390         adapter->link_up = false;
7391         adapter->link_speed = 0;
7392
7393         /* only continue if link was up previously */
7394         if (!netif_carrier_ok(netdev))
7395                 return;
7396
7397         /* poll for SFP+ cable when link is down */
7398         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7399                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7400
7401         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7402                 ixgbe_ptp_start_cyclecounter(adapter);
7403
7404         e_info(drv, "NIC Link is Down\n");
7405         netif_carrier_off(netdev);
7406
7407         /* ping all the active vfs to let them know link has changed */
7408         ixgbe_ping_all_vfs(adapter);
7409 }
7410
7411 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7412 {
7413         int i;
7414
7415         for (i = 0; i < adapter->num_tx_queues; i++) {
7416                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7417
7418                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7419                         return true;
7420         }
7421
7422         for (i = 0; i < adapter->num_xdp_queues; i++) {
7423                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7424
7425                 if (ring->next_to_use != ring->next_to_clean)
7426                         return true;
7427         }
7428
7429         return false;
7430 }
7431
7432 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7433 {
7434         struct ixgbe_hw *hw = &adapter->hw;
7435         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7436         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7437
7438         int i, j;
7439
7440         if (!adapter->num_vfs)
7441                 return false;
7442
7443         /* resetting the PF is only needed for MAC before X550 */
7444         if (hw->mac.type >= ixgbe_mac_X550)
7445                 return false;
7446
7447         for (i = 0; i < adapter->num_vfs; i++) {
7448                 for (j = 0; j < q_per_pool; j++) {
7449                         u32 h, t;
7450
7451                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7452                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7453
7454                         if (h != t)
7455                                 return true;
7456                 }
7457         }
7458
7459         return false;
7460 }
7461
7462 /**
7463  * ixgbe_watchdog_flush_tx - flush queues on link down
7464  * @adapter: pointer to the device adapter structure
7465  **/
7466 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7467 {
7468         if (!netif_carrier_ok(adapter->netdev)) {
7469                 if (ixgbe_ring_tx_pending(adapter) ||
7470                     ixgbe_vf_tx_pending(adapter)) {
7471                         /* We've lost link, so the controller stops DMA,
7472                          * but we've got queued Tx work that's never going
7473                          * to get done, so reset controller to flush Tx.
7474                          * (Do the reset outside of interrupt context).
7475                          */
7476                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7477                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7478                 }
7479         }
7480 }
7481
7482 #ifdef CONFIG_PCI_IOV
7483 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7484 {
7485         struct ixgbe_hw *hw = &adapter->hw;
7486         struct pci_dev *pdev = adapter->pdev;
7487         unsigned int vf;
7488         u32 gpc;
7489
7490         if (!(netif_carrier_ok(adapter->netdev)))
7491                 return;
7492
7493         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7494         if (gpc) /* If incrementing then no need for the check below */
7495                 return;
7496         /* Check to see if a bad DMA write target from an errant or
7497          * malicious VF has caused a PCIe error.  If so then we can
7498          * issue a VFLR to the offending VF(s) and then resume without
7499          * requesting a full slot reset.
7500          */
7501
7502         if (!pdev)
7503                 return;
7504
7505         /* check status reg for all VFs owned by this PF */
7506         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7507                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7508                 u16 status_reg;
7509
7510                 if (!vfdev)
7511                         continue;
7512                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7513                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7514                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7515                         pcie_flr(vfdev);
7516         }
7517 }
7518
7519 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7520 {
7521         u32 ssvpc;
7522
7523         /* Do not perform spoof check for 82598 or if not in IOV mode */
7524         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7525             adapter->num_vfs == 0)
7526                 return;
7527
7528         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7529
7530         /*
7531          * ssvpc register is cleared on read, if zero then no
7532          * spoofed packets in the last interval.
7533          */
7534         if (!ssvpc)
7535                 return;
7536
7537         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7538 }
7539 #else
7540 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7541 {
7542 }
7543
7544 static void
7545 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7546 {
7547 }
7548 #endif /* CONFIG_PCI_IOV */
7549
7550
7551 /**
7552  * ixgbe_watchdog_subtask - check and bring link up
7553  * @adapter: pointer to the device adapter structure
7554  **/
7555 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7556 {
7557         /* if interface is down, removing or resetting, do nothing */
7558         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7559             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7560             test_bit(__IXGBE_RESETTING, &adapter->state))
7561                 return;
7562
7563         ixgbe_watchdog_update_link(adapter);
7564
7565         if (adapter->link_up)
7566                 ixgbe_watchdog_link_is_up(adapter);
7567         else
7568                 ixgbe_watchdog_link_is_down(adapter);
7569
7570         ixgbe_check_for_bad_vf(adapter);
7571         ixgbe_spoof_check(adapter);
7572         ixgbe_update_stats(adapter);
7573
7574         ixgbe_watchdog_flush_tx(adapter);
7575 }
7576
7577 /**
7578  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7579  * @adapter: the ixgbe adapter structure
7580  **/
7581 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7582 {
7583         struct ixgbe_hw *hw = &adapter->hw;
7584         s32 err;
7585
7586         /* not searching for SFP so there is nothing to do here */
7587         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7588             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7589                 return;
7590
7591         if (adapter->sfp_poll_time &&
7592             time_after(adapter->sfp_poll_time, jiffies))
7593                 return; /* If not yet time to poll for SFP */
7594
7595         /* someone else is in init, wait until next service event */
7596         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7597                 return;
7598
7599         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7600
7601         err = hw->phy.ops.identify_sfp(hw);
7602         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7603                 goto sfp_out;
7604
7605         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7606                 /* If no cable is present, then we need to reset
7607                  * the next time we find a good cable. */
7608                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7609         }
7610
7611         /* exit on error */
7612         if (err)
7613                 goto sfp_out;
7614
7615         /* exit if reset not needed */
7616         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7617                 goto sfp_out;
7618
7619         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7620
7621         /*
7622          * A module may be identified correctly, but the EEPROM may not have
7623          * support for that module.  setup_sfp() will fail in that case, so
7624          * we should not allow that module to load.
7625          */
7626         if (hw->mac.type == ixgbe_mac_82598EB)
7627                 err = hw->phy.ops.reset(hw);
7628         else
7629                 err = hw->mac.ops.setup_sfp(hw);
7630
7631         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7632                 goto sfp_out;
7633
7634         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7635         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7636
7637 sfp_out:
7638         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7639
7640         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7641             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7642                 e_dev_err("failed to initialize because an unsupported "
7643                           "SFP+ module type was detected.\n");
7644                 e_dev_err("Reload the driver after installing a "
7645                           "supported module.\n");
7646                 unregister_netdev(adapter->netdev);
7647         }
7648 }
7649
7650 /**
7651  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7652  * @adapter: the ixgbe adapter structure
7653  **/
7654 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7655 {
7656         struct ixgbe_hw *hw = &adapter->hw;
7657         u32 cap_speed;
7658         u32 speed;
7659         bool autoneg = false;
7660
7661         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7662                 return;
7663
7664         /* someone else is in init, wait until next service event */
7665         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7666                 return;
7667
7668         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7669
7670         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7671
7672         /* advertise highest capable link speed */
7673         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7674                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7675         else
7676                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7677                                      IXGBE_LINK_SPEED_1GB_FULL);
7678
7679         if (hw->mac.ops.setup_link)
7680                 hw->mac.ops.setup_link(hw, speed, true);
7681
7682         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7683         adapter->link_check_timeout = jiffies;
7684         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7685 }
7686
7687 /**
7688  * ixgbe_service_timer - Timer Call-back
7689  * @data: pointer to adapter cast into an unsigned long
7690  **/
7691 static void ixgbe_service_timer(struct timer_list *t)
7692 {
7693         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7694         unsigned long next_event_offset;
7695
7696         /* poll faster when waiting for link */
7697         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7698                 next_event_offset = HZ / 10;
7699         else
7700                 next_event_offset = HZ * 2;
7701
7702         /* Reset the timer */
7703         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7704
7705         ixgbe_service_event_schedule(adapter);
7706 }
7707
7708 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7709 {
7710         struct ixgbe_hw *hw = &adapter->hw;
7711         u32 status;
7712
7713         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7714                 return;
7715
7716         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7717
7718         if (!hw->phy.ops.handle_lasi)
7719                 return;
7720
7721         status = hw->phy.ops.handle_lasi(&adapter->hw);
7722         if (status != IXGBE_ERR_OVERTEMP)
7723                 return;
7724
7725         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7726 }
7727
7728 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7729 {
7730         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7731                 return;
7732
7733         /* If we're already down, removing or resetting, just bail */
7734         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7735             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7736             test_bit(__IXGBE_RESETTING, &adapter->state))
7737                 return;
7738
7739         ixgbe_dump(adapter);
7740         netdev_err(adapter->netdev, "Reset adapter\n");
7741         adapter->tx_timeout_count++;
7742
7743         rtnl_lock();
7744         ixgbe_reinit_locked(adapter);
7745         rtnl_unlock();
7746 }
7747
7748 /**
7749  * ixgbe_service_task - manages and runs subtasks
7750  * @work: pointer to work_struct containing our data
7751  **/
7752 static void ixgbe_service_task(struct work_struct *work)
7753 {
7754         struct ixgbe_adapter *adapter = container_of(work,
7755                                                      struct ixgbe_adapter,
7756                                                      service_task);
7757         if (ixgbe_removed(adapter->hw.hw_addr)) {
7758                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7759                         rtnl_lock();
7760                         ixgbe_down(adapter);
7761                         rtnl_unlock();
7762                 }
7763                 ixgbe_service_event_complete(adapter);
7764                 return;
7765         }
7766         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7767                 rtnl_lock();
7768                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7769                 udp_tunnel_get_rx_info(adapter->netdev);
7770                 rtnl_unlock();
7771         }
7772         ixgbe_reset_subtask(adapter);
7773         ixgbe_phy_interrupt_subtask(adapter);
7774         ixgbe_sfp_detection_subtask(adapter);
7775         ixgbe_sfp_link_config_subtask(adapter);
7776         ixgbe_check_overtemp_subtask(adapter);
7777         ixgbe_watchdog_subtask(adapter);
7778         ixgbe_fdir_reinit_subtask(adapter);
7779         ixgbe_check_hang_subtask(adapter);
7780
7781         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7782                 ixgbe_ptp_overflow_check(adapter);
7783                 ixgbe_ptp_rx_hang(adapter);
7784                 ixgbe_ptp_tx_hang(adapter);
7785         }
7786
7787         ixgbe_service_event_complete(adapter);
7788 }
7789
7790 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7791                      struct ixgbe_tx_buffer *first,
7792                      u8 *hdr_len)
7793 {
7794         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7795         struct sk_buff *skb = first->skb;
7796         union {
7797                 struct iphdr *v4;
7798                 struct ipv6hdr *v6;
7799                 unsigned char *hdr;
7800         } ip;
7801         union {
7802                 struct tcphdr *tcp;
7803                 unsigned char *hdr;
7804         } l4;
7805         u32 paylen, l4_offset;
7806         int err;
7807
7808         if (skb->ip_summed != CHECKSUM_PARTIAL)
7809                 return 0;
7810
7811         if (!skb_is_gso(skb))
7812                 return 0;
7813
7814         err = skb_cow_head(skb, 0);
7815         if (err < 0)
7816                 return err;
7817
7818         if (eth_p_mpls(first->protocol))
7819                 ip.hdr = skb_inner_network_header(skb);
7820         else
7821                 ip.hdr = skb_network_header(skb);
7822         l4.hdr = skb_checksum_start(skb);
7823
7824         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7825         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7826
7827         /* initialize outer IP header fields */
7828         if (ip.v4->version == 4) {
7829                 unsigned char *csum_start = skb_checksum_start(skb);
7830                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7831
7832                 /* IP header will have to cancel out any data that
7833                  * is not a part of the outer IP header
7834                  */
7835                 ip.v4->check = csum_fold(csum_partial(trans_start,
7836                                                       csum_start - trans_start,
7837                                                       0));
7838                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7839
7840                 ip.v4->tot_len = 0;
7841                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7842                                    IXGBE_TX_FLAGS_CSUM |
7843                                    IXGBE_TX_FLAGS_IPV4;
7844         } else {
7845                 ip.v6->payload_len = 0;
7846                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7847                                    IXGBE_TX_FLAGS_CSUM;
7848         }
7849
7850         /* determine offset of inner transport header */
7851         l4_offset = l4.hdr - skb->data;
7852
7853         /* compute length of segmentation header */
7854         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7855
7856         /* remove payload length from inner checksum */
7857         paylen = skb->len - l4_offset;
7858         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7859
7860         /* update gso size and bytecount with header size */
7861         first->gso_segs = skb_shinfo(skb)->gso_segs;
7862         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7863
7864         /* mss_l4len_id: use 0 as index for TSO */
7865         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7866         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7867
7868         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7869         vlan_macip_lens = l4.hdr - ip.hdr;
7870         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7871         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7872
7873         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7874                           mss_l4len_idx);
7875
7876         return 1;
7877 }
7878
7879 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7880 {
7881         unsigned int offset = 0;
7882
7883         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7884
7885         return offset == skb_checksum_start_offset(skb);
7886 }
7887
7888 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7889                           struct ixgbe_tx_buffer *first)
7890 {
7891         struct sk_buff *skb = first->skb;
7892         u32 vlan_macip_lens = 0;
7893         u32 type_tucmd = 0;
7894
7895         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7896 csum_failed:
7897                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7898                                          IXGBE_TX_FLAGS_CC)))
7899                         return;
7900                 goto no_csum;
7901         }
7902
7903         switch (skb->csum_offset) {
7904         case offsetof(struct tcphdr, check):
7905                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7906                 /* fall through */
7907         case offsetof(struct udphdr, check):
7908                 break;
7909         case offsetof(struct sctphdr, checksum):
7910                 /* validate that this is actually an SCTP request */
7911                 if (((first->protocol == htons(ETH_P_IP)) &&
7912                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7913                     ((first->protocol == htons(ETH_P_IPV6)) &&
7914                      ixgbe_ipv6_csum_is_sctp(skb))) {
7915                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7916                         break;
7917                 }
7918                 /* fall through */
7919         default:
7920                 skb_checksum_help(skb);
7921                 goto csum_failed;
7922         }
7923
7924         /* update TX checksum flag */
7925         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7926         vlan_macip_lens = skb_checksum_start_offset(skb) -
7927                           skb_network_offset(skb);
7928 no_csum:
7929         /* vlan_macip_lens: MACLEN, VLAN tag */
7930         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7931         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7932
7933         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7934 }
7935
7936 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7937         ((_flag <= _result) ? \
7938          ((u32)(_input & _flag) * (_result / _flag)) : \
7939          ((u32)(_input & _flag) / (_flag / _result)))
7940
7941 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7942 {
7943         /* set type for advanced descriptor with frame checksum insertion */
7944         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7945                        IXGBE_ADVTXD_DCMD_DEXT |
7946                        IXGBE_ADVTXD_DCMD_IFCS;
7947
7948         /* set HW vlan bit if vlan is present */
7949         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7950                                    IXGBE_ADVTXD_DCMD_VLE);
7951
7952         /* set segmentation enable bits for TSO/FSO */
7953         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7954                                    IXGBE_ADVTXD_DCMD_TSE);
7955
7956         /* set timestamp bit if present */
7957         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7958                                    IXGBE_ADVTXD_MAC_TSTAMP);
7959
7960         /* insert frame checksum */
7961         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7962
7963         return cmd_type;
7964 }
7965
7966 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7967                                    u32 tx_flags, unsigned int paylen)
7968 {
7969         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7970
7971         /* enable L4 checksum for TSO and TX checksum offload */
7972         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7973                                         IXGBE_TX_FLAGS_CSUM,
7974                                         IXGBE_ADVTXD_POPTS_TXSM);
7975
7976         /* enble IPv4 checksum for TSO */
7977         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7978                                         IXGBE_TX_FLAGS_IPV4,
7979                                         IXGBE_ADVTXD_POPTS_IXSM);
7980
7981         /*
7982          * Check Context must be set if Tx switch is enabled, which it
7983          * always is for case where virtual functions are running
7984          */
7985         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7986                                         IXGBE_TX_FLAGS_CC,
7987                                         IXGBE_ADVTXD_CC);
7988
7989         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7990 }
7991
7992 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7993 {
7994         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7995
7996         /* Herbert's original patch had:
7997          *  smp_mb__after_netif_stop_queue();
7998          * but since that doesn't exist yet, just open code it.
7999          */
8000         smp_mb();
8001
8002         /* We need to check again in a case another CPU has just
8003          * made room available.
8004          */
8005         if (likely(ixgbe_desc_unused(tx_ring) < size))
8006                 return -EBUSY;
8007
8008         /* A reprieve! - use start_queue because it doesn't call schedule */
8009         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8010         ++tx_ring->tx_stats.restart_queue;
8011         return 0;
8012 }
8013
8014 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8015 {
8016         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8017                 return 0;
8018
8019         return __ixgbe_maybe_stop_tx(tx_ring, size);
8020 }
8021
8022 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
8023                        IXGBE_TXD_CMD_RS)
8024
8025 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8026                         struct ixgbe_tx_buffer *first,
8027                         const u8 hdr_len)
8028 {
8029         struct sk_buff *skb = first->skb;
8030         struct ixgbe_tx_buffer *tx_buffer;
8031         union ixgbe_adv_tx_desc *tx_desc;
8032         struct skb_frag_struct *frag;
8033         dma_addr_t dma;
8034         unsigned int data_len, size;
8035         u32 tx_flags = first->tx_flags;
8036         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8037         u16 i = tx_ring->next_to_use;
8038
8039         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8040
8041         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8042
8043         size = skb_headlen(skb);
8044         data_len = skb->data_len;
8045
8046 #ifdef IXGBE_FCOE
8047         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8048                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8049                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8050                         data_len = 0;
8051                 } else {
8052                         data_len -= sizeof(struct fcoe_crc_eof);
8053                 }
8054         }
8055
8056 #endif
8057         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8058
8059         tx_buffer = first;
8060
8061         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8062                 if (dma_mapping_error(tx_ring->dev, dma))
8063                         goto dma_error;
8064
8065                 /* record length, and DMA address */
8066                 dma_unmap_len_set(tx_buffer, len, size);
8067                 dma_unmap_addr_set(tx_buffer, dma, dma);
8068
8069                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8070
8071                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8072                         tx_desc->read.cmd_type_len =
8073                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8074
8075                         i++;
8076                         tx_desc++;
8077                         if (i == tx_ring->count) {
8078                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8079                                 i = 0;
8080                         }
8081                         tx_desc->read.olinfo_status = 0;
8082
8083                         dma += IXGBE_MAX_DATA_PER_TXD;
8084                         size -= IXGBE_MAX_DATA_PER_TXD;
8085
8086                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8087                 }
8088
8089                 if (likely(!data_len))
8090                         break;
8091
8092                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8093
8094                 i++;
8095                 tx_desc++;
8096                 if (i == tx_ring->count) {
8097                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8098                         i = 0;
8099                 }
8100                 tx_desc->read.olinfo_status = 0;
8101
8102 #ifdef IXGBE_FCOE
8103                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8104 #else
8105                 size = skb_frag_size(frag);
8106 #endif
8107                 data_len -= size;
8108
8109                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8110                                        DMA_TO_DEVICE);
8111
8112                 tx_buffer = &tx_ring->tx_buffer_info[i];
8113         }
8114
8115         /* write last descriptor with RS and EOP bits */
8116         cmd_type |= size | IXGBE_TXD_CMD;
8117         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8118
8119         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8120
8121         /* set the timestamp */
8122         first->time_stamp = jiffies;
8123
8124         /*
8125          * Force memory writes to complete before letting h/w know there
8126          * are new descriptors to fetch.  (Only applicable for weak-ordered
8127          * memory model archs, such as IA-64).
8128          *
8129          * We also need this memory barrier to make certain all of the
8130          * status bits have been updated before next_to_watch is written.
8131          */
8132         wmb();
8133
8134         /* set next_to_watch value indicating a packet is present */
8135         first->next_to_watch = tx_desc;
8136
8137         i++;
8138         if (i == tx_ring->count)
8139                 i = 0;
8140
8141         tx_ring->next_to_use = i;
8142
8143         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8144
8145         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8146                 writel(i, tx_ring->tail);
8147
8148                 /* we need this if more than one processor can write to our tail
8149                  * at a time, it synchronizes IO on IA64/Altix systems
8150                  */
8151                 mmiowb();
8152         }
8153
8154         return 0;
8155 dma_error:
8156         dev_err(tx_ring->dev, "TX DMA map failed\n");
8157
8158         /* clear dma mappings for failed tx_buffer_info map */
8159         for (;;) {
8160                 tx_buffer = &tx_ring->tx_buffer_info[i];
8161                 if (dma_unmap_len(tx_buffer, len))
8162                         dma_unmap_page(tx_ring->dev,
8163                                        dma_unmap_addr(tx_buffer, dma),
8164                                        dma_unmap_len(tx_buffer, len),
8165                                        DMA_TO_DEVICE);
8166                 dma_unmap_len_set(tx_buffer, len, 0);
8167                 if (tx_buffer == first)
8168                         break;
8169                 if (i == 0)
8170                         i += tx_ring->count;
8171                 i--;
8172         }
8173
8174         dev_kfree_skb_any(first->skb);
8175         first->skb = NULL;
8176
8177         tx_ring->next_to_use = i;
8178
8179         return -1;
8180 }
8181
8182 static void ixgbe_atr(struct ixgbe_ring *ring,
8183                       struct ixgbe_tx_buffer *first)
8184 {
8185         struct ixgbe_q_vector *q_vector = ring->q_vector;
8186         union ixgbe_atr_hash_dword input = { .dword = 0 };
8187         union ixgbe_atr_hash_dword common = { .dword = 0 };
8188         union {
8189                 unsigned char *network;
8190                 struct iphdr *ipv4;
8191                 struct ipv6hdr *ipv6;
8192         } hdr;
8193         struct tcphdr *th;
8194         unsigned int hlen;
8195         struct sk_buff *skb;
8196         __be16 vlan_id;
8197         int l4_proto;
8198
8199         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8200         if (!q_vector)
8201                 return;
8202
8203         /* do nothing if sampling is disabled */
8204         if (!ring->atr_sample_rate)
8205                 return;
8206
8207         ring->atr_count++;
8208
8209         /* currently only IPv4/IPv6 with TCP is supported */
8210         if ((first->protocol != htons(ETH_P_IP)) &&
8211             (first->protocol != htons(ETH_P_IPV6)))
8212                 return;
8213
8214         /* snag network header to get L4 type and address */
8215         skb = first->skb;
8216         hdr.network = skb_network_header(skb);
8217         if (unlikely(hdr.network <= skb->data))
8218                 return;
8219         if (skb->encapsulation &&
8220             first->protocol == htons(ETH_P_IP) &&
8221             hdr.ipv4->protocol == IPPROTO_UDP) {
8222                 struct ixgbe_adapter *adapter = q_vector->adapter;
8223
8224                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8225                              VXLAN_HEADROOM))
8226                         return;
8227
8228                 /* verify the port is recognized as VXLAN */
8229                 if (adapter->vxlan_port &&
8230                     udp_hdr(skb)->dest == adapter->vxlan_port)
8231                         hdr.network = skb_inner_network_header(skb);
8232
8233                 if (adapter->geneve_port &&
8234                     udp_hdr(skb)->dest == adapter->geneve_port)
8235                         hdr.network = skb_inner_network_header(skb);
8236         }
8237
8238         /* Make sure we have at least [minimum IPv4 header + TCP]
8239          * or [IPv6 header] bytes
8240          */
8241         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8242                 return;
8243
8244         /* Currently only IPv4/IPv6 with TCP is supported */
8245         switch (hdr.ipv4->version) {
8246         case IPVERSION:
8247                 /* access ihl as u8 to avoid unaligned access on ia64 */
8248                 hlen = (hdr.network[0] & 0x0F) << 2;
8249                 l4_proto = hdr.ipv4->protocol;
8250                 break;
8251         case 6:
8252                 hlen = hdr.network - skb->data;
8253                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8254                 hlen -= hdr.network - skb->data;
8255                 break;
8256         default:
8257                 return;
8258         }
8259
8260         if (l4_proto != IPPROTO_TCP)
8261                 return;
8262
8263         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8264                      hlen + sizeof(struct tcphdr)))
8265                 return;
8266
8267         th = (struct tcphdr *)(hdr.network + hlen);
8268
8269         /* skip this packet since the socket is closing */
8270         if (th->fin)
8271                 return;
8272
8273         /* sample on all syn packets or once every atr sample count */
8274         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8275                 return;
8276
8277         /* reset sample count */
8278         ring->atr_count = 0;
8279
8280         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8281
8282         /*
8283          * src and dst are inverted, think how the receiver sees them
8284          *
8285          * The input is broken into two sections, a non-compressed section
8286          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8287          * is XORed together and stored in the compressed dword.
8288          */
8289         input.formatted.vlan_id = vlan_id;
8290
8291         /*
8292          * since src port and flex bytes occupy the same word XOR them together
8293          * and write the value to source port portion of compressed dword
8294          */
8295         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8296                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8297         else
8298                 common.port.src ^= th->dest ^ first->protocol;
8299         common.port.dst ^= th->source;
8300
8301         switch (hdr.ipv4->version) {
8302         case IPVERSION:
8303                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8304                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8305                 break;
8306         case 6:
8307                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8308                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8309                              hdr.ipv6->saddr.s6_addr32[1] ^
8310                              hdr.ipv6->saddr.s6_addr32[2] ^
8311                              hdr.ipv6->saddr.s6_addr32[3] ^
8312                              hdr.ipv6->daddr.s6_addr32[0] ^
8313                              hdr.ipv6->daddr.s6_addr32[1] ^
8314                              hdr.ipv6->daddr.s6_addr32[2] ^
8315                              hdr.ipv6->daddr.s6_addr32[3];
8316                 break;
8317         default:
8318                 break;
8319         }
8320
8321         if (hdr.network != skb_network_header(skb))
8322                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8323
8324         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8325         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8326                                               input, common, ring->queue_index);
8327 }
8328
8329 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8330                               void *accel_priv, select_queue_fallback_t fallback)
8331 {
8332         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
8333 #ifdef IXGBE_FCOE
8334         struct ixgbe_adapter *adapter;
8335         struct ixgbe_ring_feature *f;
8336         int txq;
8337 #endif
8338
8339         if (fwd_adapter)
8340                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
8341
8342 #ifdef IXGBE_FCOE
8343
8344         /*
8345          * only execute the code below if protocol is FCoE
8346          * or FIP and we have FCoE enabled on the adapter
8347          */
8348         switch (vlan_get_protocol(skb)) {
8349         case htons(ETH_P_FCOE):
8350         case htons(ETH_P_FIP):
8351                 adapter = netdev_priv(dev);
8352
8353                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
8354                         break;
8355                 /* fall through */
8356         default:
8357                 return fallback(dev, skb);
8358         }
8359
8360         f = &adapter->ring_feature[RING_F_FCOE];
8361
8362         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8363                                            smp_processor_id();
8364
8365         while (txq >= f->indices)
8366                 txq -= f->indices;
8367
8368         return txq + f->offset;
8369 #else
8370         return fallback(dev, skb);
8371 #endif
8372 }
8373
8374 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8375                                struct xdp_buff *xdp)
8376 {
8377         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8378         struct ixgbe_tx_buffer *tx_buffer;
8379         union ixgbe_adv_tx_desc *tx_desc;
8380         u32 len, cmd_type;
8381         dma_addr_t dma;
8382         u16 i;
8383
8384         len = xdp->data_end - xdp->data;
8385
8386         if (unlikely(!ixgbe_desc_unused(ring)))
8387                 return IXGBE_XDP_CONSUMED;
8388
8389         dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
8390         if (dma_mapping_error(ring->dev, dma))
8391                 return IXGBE_XDP_CONSUMED;
8392
8393         /* record the location of the first descriptor for this packet */
8394         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8395         tx_buffer->bytecount = len;
8396         tx_buffer->gso_segs = 1;
8397         tx_buffer->protocol = 0;
8398
8399         i = ring->next_to_use;
8400         tx_desc = IXGBE_TX_DESC(ring, i);
8401
8402         dma_unmap_len_set(tx_buffer, len, len);
8403         dma_unmap_addr_set(tx_buffer, dma, dma);
8404         tx_buffer->data = xdp->data;
8405         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8406
8407         /* put descriptor type bits */
8408         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8409                    IXGBE_ADVTXD_DCMD_DEXT |
8410                    IXGBE_ADVTXD_DCMD_IFCS;
8411         cmd_type |= len | IXGBE_TXD_CMD;
8412         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8413         tx_desc->read.olinfo_status =
8414                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8415
8416         /* Avoid any potential race with xdp_xmit and cleanup */
8417         smp_wmb();
8418
8419         /* set next_to_watch value indicating a packet is present */
8420         i++;
8421         if (i == ring->count)
8422                 i = 0;
8423
8424         tx_buffer->next_to_watch = tx_desc;
8425         ring->next_to_use = i;
8426
8427         return IXGBE_XDP_TX;
8428 }
8429
8430 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8431                           struct ixgbe_adapter *adapter,
8432                           struct ixgbe_ring *tx_ring)
8433 {
8434         struct ixgbe_tx_buffer *first;
8435         int tso;
8436         u32 tx_flags = 0;
8437         unsigned short f;
8438         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8439         __be16 protocol = skb->protocol;
8440         u8 hdr_len = 0;
8441
8442         /*
8443          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8444          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8445          *       + 2 desc gap to keep tail from touching head,
8446          *       + 1 desc for context descriptor,
8447          * otherwise try next time
8448          */
8449         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8450                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8451
8452         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8453                 tx_ring->tx_stats.tx_busy++;
8454                 return NETDEV_TX_BUSY;
8455         }
8456
8457         /* record the location of the first descriptor for this packet */
8458         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8459         first->skb = skb;
8460         first->bytecount = skb->len;
8461         first->gso_segs = 1;
8462
8463         /* if we have a HW VLAN tag being added default to the HW one */
8464         if (skb_vlan_tag_present(skb)) {
8465                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8466                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8467         /* else if it is a SW VLAN check the next protocol and store the tag */
8468         } else if (protocol == htons(ETH_P_8021Q)) {
8469                 struct vlan_hdr *vhdr, _vhdr;
8470                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8471                 if (!vhdr)
8472                         goto out_drop;
8473
8474                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8475                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8476                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8477         }
8478         protocol = vlan_get_protocol(skb);
8479
8480         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8481             adapter->ptp_clock) {
8482                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8483                                            &adapter->state)) {
8484                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8485                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8486
8487                         /* schedule check for Tx timestamp */
8488                         adapter->ptp_tx_skb = skb_get(skb);
8489                         adapter->ptp_tx_start = jiffies;
8490                         schedule_work(&adapter->ptp_tx_work);
8491                 } else {
8492                         adapter->tx_hwtstamp_skipped++;
8493                 }
8494         }
8495
8496         skb_tx_timestamp(skb);
8497
8498 #ifdef CONFIG_PCI_IOV
8499         /*
8500          * Use the l2switch_enable flag - would be false if the DMA
8501          * Tx switch had been disabled.
8502          */
8503         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8504                 tx_flags |= IXGBE_TX_FLAGS_CC;
8505
8506 #endif
8507         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8508         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8509             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8510              (skb->priority != TC_PRIO_CONTROL))) {
8511                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8512                 tx_flags |= (skb->priority & 0x7) <<
8513                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8514                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8515                         struct vlan_ethhdr *vhdr;
8516
8517                         if (skb_cow_head(skb, 0))
8518                                 goto out_drop;
8519                         vhdr = (struct vlan_ethhdr *)skb->data;
8520                         vhdr->h_vlan_TCI = htons(tx_flags >>
8521                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8522                 } else {
8523                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8524                 }
8525         }
8526
8527         /* record initial flags and protocol */
8528         first->tx_flags = tx_flags;
8529         first->protocol = protocol;
8530
8531 #ifdef IXGBE_FCOE
8532         /* setup tx offload for FCoE */
8533         if ((protocol == htons(ETH_P_FCOE)) &&
8534             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8535                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8536                 if (tso < 0)
8537                         goto out_drop;
8538
8539                 goto xmit_fcoe;
8540         }
8541
8542 #endif /* IXGBE_FCOE */
8543         tso = ixgbe_tso(tx_ring, first, &hdr_len);
8544         if (tso < 0)
8545                 goto out_drop;
8546         else if (!tso)
8547                 ixgbe_tx_csum(tx_ring, first);
8548
8549         /* add the ATR filter if ATR is on */
8550         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8551                 ixgbe_atr(tx_ring, first);
8552
8553 #ifdef IXGBE_FCOE
8554 xmit_fcoe:
8555 #endif /* IXGBE_FCOE */
8556         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8557                 goto cleanup_tx_timestamp;
8558
8559         return NETDEV_TX_OK;
8560
8561 out_drop:
8562         dev_kfree_skb_any(first->skb);
8563         first->skb = NULL;
8564 cleanup_tx_timestamp:
8565         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8566                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8567                 adapter->ptp_tx_skb = NULL;
8568                 cancel_work_sync(&adapter->ptp_tx_work);
8569                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8570         }
8571
8572         return NETDEV_TX_OK;
8573 }
8574
8575 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8576                                       struct net_device *netdev,
8577                                       struct ixgbe_ring *ring)
8578 {
8579         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8580         struct ixgbe_ring *tx_ring;
8581
8582         /*
8583          * The minimum packet size for olinfo paylen is 17 so pad the skb
8584          * in order to meet this minimum size requirement.
8585          */
8586         if (skb_put_padto(skb, 17))
8587                 return NETDEV_TX_OK;
8588
8589         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8590
8591         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8592 }
8593
8594 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8595                                     struct net_device *netdev)
8596 {
8597         return __ixgbe_xmit_frame(skb, netdev, NULL);
8598 }
8599
8600 /**
8601  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8602  * @netdev: network interface device structure
8603  * @p: pointer to an address structure
8604  *
8605  * Returns 0 on success, negative on failure
8606  **/
8607 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8608 {
8609         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8610         struct ixgbe_hw *hw = &adapter->hw;
8611         struct sockaddr *addr = p;
8612
8613         if (!is_valid_ether_addr(addr->sa_data))
8614                 return -EADDRNOTAVAIL;
8615
8616         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8617         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8618
8619         ixgbe_mac_set_default_filter(adapter);
8620
8621         return 0;
8622 }
8623
8624 static int
8625 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8626 {
8627         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8628         struct ixgbe_hw *hw = &adapter->hw;
8629         u16 value;
8630         int rc;
8631
8632         if (prtad != hw->phy.mdio.prtad)
8633                 return -EINVAL;
8634         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8635         if (!rc)
8636                 rc = value;
8637         return rc;
8638 }
8639
8640 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8641                             u16 addr, u16 value)
8642 {
8643         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8644         struct ixgbe_hw *hw = &adapter->hw;
8645
8646         if (prtad != hw->phy.mdio.prtad)
8647                 return -EINVAL;
8648         return hw->phy.ops.write_reg(hw, addr, devad, value);
8649 }
8650
8651 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8652 {
8653         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8654
8655         switch (cmd) {
8656         case SIOCSHWTSTAMP:
8657                 return ixgbe_ptp_set_ts_config(adapter, req);
8658         case SIOCGHWTSTAMP:
8659                 return ixgbe_ptp_get_ts_config(adapter, req);
8660         case SIOCGMIIPHY:
8661                 if (!adapter->hw.phy.ops.read_reg)
8662                         return -EOPNOTSUPP;
8663                 /* fall through */
8664         default:
8665                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8666         }
8667 }
8668
8669 /**
8670  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8671  * netdev->dev_addrs
8672  * @netdev: network interface device structure
8673  *
8674  * Returns non-zero on failure
8675  **/
8676 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8677 {
8678         int err = 0;
8679         struct ixgbe_adapter *adapter = netdev_priv(dev);
8680         struct ixgbe_hw *hw = &adapter->hw;
8681
8682         if (is_valid_ether_addr(hw->mac.san_addr)) {
8683                 rtnl_lock();
8684                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8685                 rtnl_unlock();
8686
8687                 /* update SAN MAC vmdq pool selection */
8688                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8689         }
8690         return err;
8691 }
8692
8693 /**
8694  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8695  * netdev->dev_addrs
8696  * @netdev: network interface device structure
8697  *
8698  * Returns non-zero on failure
8699  **/
8700 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8701 {
8702         int err = 0;
8703         struct ixgbe_adapter *adapter = netdev_priv(dev);
8704         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8705
8706         if (is_valid_ether_addr(mac->san_addr)) {
8707                 rtnl_lock();
8708                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8709                 rtnl_unlock();
8710         }
8711         return err;
8712 }
8713
8714 #ifdef CONFIG_NET_POLL_CONTROLLER
8715 /*
8716  * Polling 'interrupt' - used by things like netconsole to send skbs
8717  * without having to re-enable interrupts. It's not called while
8718  * the interrupt routine is executing.
8719  */
8720 static void ixgbe_netpoll(struct net_device *netdev)
8721 {
8722         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8723         int i;
8724
8725         /* if interface is down do nothing */
8726         if (test_bit(__IXGBE_DOWN, &adapter->state))
8727                 return;
8728
8729         /* loop through and schedule all active queues */
8730         for (i = 0; i < adapter->num_q_vectors; i++)
8731                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8732 }
8733
8734 #endif
8735
8736 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8737                                    struct ixgbe_ring *ring)
8738 {
8739         u64 bytes, packets;
8740         unsigned int start;
8741
8742         if (ring) {
8743                 do {
8744                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8745                         packets = ring->stats.packets;
8746                         bytes   = ring->stats.bytes;
8747                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8748                 stats->tx_packets += packets;
8749                 stats->tx_bytes   += bytes;
8750         }
8751 }
8752
8753 static void ixgbe_get_stats64(struct net_device *netdev,
8754                               struct rtnl_link_stats64 *stats)
8755 {
8756         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8757         int i;
8758
8759         rcu_read_lock();
8760         for (i = 0; i < adapter->num_rx_queues; i++) {
8761                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8762                 u64 bytes, packets;
8763                 unsigned int start;
8764
8765                 if (ring) {
8766                         do {
8767                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8768                                 packets = ring->stats.packets;
8769                                 bytes   = ring->stats.bytes;
8770                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8771                         stats->rx_packets += packets;
8772                         stats->rx_bytes   += bytes;
8773                 }
8774         }
8775
8776         for (i = 0; i < adapter->num_tx_queues; i++) {
8777                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8778
8779                 ixgbe_get_ring_stats64(stats, ring);
8780         }
8781         for (i = 0; i < adapter->num_xdp_queues; i++) {
8782                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8783
8784                 ixgbe_get_ring_stats64(stats, ring);
8785         }
8786         rcu_read_unlock();
8787
8788         /* following stats updated by ixgbe_watchdog_task() */
8789         stats->multicast        = netdev->stats.multicast;
8790         stats->rx_errors        = netdev->stats.rx_errors;
8791         stats->rx_length_errors = netdev->stats.rx_length_errors;
8792         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8793         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8794 }
8795
8796 #ifdef CONFIG_IXGBE_DCB
8797 /**
8798  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8799  * @adapter: pointer to ixgbe_adapter
8800  * @tc: number of traffic classes currently enabled
8801  *
8802  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8803  * 802.1Q priority maps to a packet buffer that exists.
8804  */
8805 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8806 {
8807         struct ixgbe_hw *hw = &adapter->hw;
8808         u32 reg, rsave;
8809         int i;
8810
8811         /* 82598 have a static priority to TC mapping that can not
8812          * be changed so no validation is needed.
8813          */
8814         if (hw->mac.type == ixgbe_mac_82598EB)
8815                 return;
8816
8817         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8818         rsave = reg;
8819
8820         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8821                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8822
8823                 /* If up2tc is out of bounds default to zero */
8824                 if (up2tc > tc)
8825                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8826         }
8827
8828         if (reg != rsave)
8829                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8830
8831         return;
8832 }
8833
8834 /**
8835  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8836  * @adapter: Pointer to adapter struct
8837  *
8838  * Populate the netdev user priority to tc map
8839  */
8840 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8841 {
8842         struct net_device *dev = adapter->netdev;
8843         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8844         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8845         u8 prio;
8846
8847         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8848                 u8 tc = 0;
8849
8850                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8851                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8852                 else if (ets)
8853                         tc = ets->prio_tc[prio];
8854
8855                 netdev_set_prio_tc_map(dev, prio, tc);
8856         }
8857 }
8858
8859 #endif /* CONFIG_IXGBE_DCB */
8860 /**
8861  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8862  *
8863  * @netdev: net device to configure
8864  * @tc: number of traffic classes to enable
8865  */
8866 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8867 {
8868         struct ixgbe_adapter *adapter = netdev_priv(dev);
8869         struct ixgbe_hw *hw = &adapter->hw;
8870         bool pools;
8871
8872         /* Hardware supports up to 8 traffic classes */
8873         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8874                 return -EINVAL;
8875
8876         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8877                 return -EINVAL;
8878
8879         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8880         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8881                 return -EBUSY;
8882
8883         /* Hardware has to reinitialize queues and interrupts to
8884          * match packet buffer alignment. Unfortunately, the
8885          * hardware is not flexible enough to do this dynamically.
8886          */
8887         if (netif_running(dev))
8888                 ixgbe_close(dev);
8889         else
8890                 ixgbe_reset(adapter);
8891
8892         ixgbe_clear_interrupt_scheme(adapter);
8893
8894 #ifdef CONFIG_IXGBE_DCB
8895         if (tc) {
8896                 netdev_set_num_tc(dev, tc);
8897                 ixgbe_set_prio_tc_map(adapter);
8898
8899                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8900
8901                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8902                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8903                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8904                 }
8905         } else {
8906                 netdev_reset_tc(dev);
8907
8908                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8909                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8910
8911                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8912
8913                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8914                 adapter->dcb_cfg.pfc_mode_enable = false;
8915         }
8916
8917         ixgbe_validate_rtr(adapter, tc);
8918
8919 #endif /* CONFIG_IXGBE_DCB */
8920         ixgbe_init_interrupt_scheme(adapter);
8921
8922         if (netif_running(dev))
8923                 return ixgbe_open(dev);
8924
8925         return 0;
8926 }
8927
8928 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8929                                struct tc_cls_u32_offload *cls)
8930 {
8931         u32 hdl = cls->knode.handle;
8932         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8933         u32 loc = cls->knode.handle & 0xfffff;
8934         int err = 0, i, j;
8935         struct ixgbe_jump_table *jump = NULL;
8936
8937         if (loc > IXGBE_MAX_HW_ENTRIES)
8938                 return -EINVAL;
8939
8940         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8941                 return -EINVAL;
8942
8943         /* Clear this filter in the link data it is associated with */
8944         if (uhtid != 0x800) {
8945                 jump = adapter->jump_tables[uhtid];
8946                 if (!jump)
8947                         return -EINVAL;
8948                 if (!test_bit(loc - 1, jump->child_loc_map))
8949                         return -EINVAL;
8950                 clear_bit(loc - 1, jump->child_loc_map);
8951         }
8952
8953         /* Check if the filter being deleted is a link */
8954         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8955                 jump = adapter->jump_tables[i];
8956                 if (jump && jump->link_hdl == hdl) {
8957                         /* Delete filters in the hardware in the child hash
8958                          * table associated with this link
8959                          */
8960                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8961                                 if (!test_bit(j, jump->child_loc_map))
8962                                         continue;
8963                                 spin_lock(&adapter->fdir_perfect_lock);
8964                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8965                                                                       NULL,
8966                                                                       j + 1);
8967                                 spin_unlock(&adapter->fdir_perfect_lock);
8968                                 clear_bit(j, jump->child_loc_map);
8969                         }
8970                         /* Remove resources for this link */
8971                         kfree(jump->input);
8972                         kfree(jump->mask);
8973                         kfree(jump);
8974                         adapter->jump_tables[i] = NULL;
8975                         return err;
8976                 }
8977         }
8978
8979         spin_lock(&adapter->fdir_perfect_lock);
8980         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8981         spin_unlock(&adapter->fdir_perfect_lock);
8982         return err;
8983 }
8984
8985 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8986                                             struct tc_cls_u32_offload *cls)
8987 {
8988         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8989
8990         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8991                 return -EINVAL;
8992
8993         /* This ixgbe devices do not support hash tables at the moment
8994          * so abort when given hash tables.
8995          */
8996         if (cls->hnode.divisor > 0)
8997                 return -EINVAL;
8998
8999         set_bit(uhtid - 1, &adapter->tables);
9000         return 0;
9001 }
9002
9003 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9004                                             struct tc_cls_u32_offload *cls)
9005 {
9006         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9007
9008         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9009                 return -EINVAL;
9010
9011         clear_bit(uhtid - 1, &adapter->tables);
9012         return 0;
9013 }
9014
9015 #ifdef CONFIG_NET_CLS_ACT
9016 struct upper_walk_data {
9017         struct ixgbe_adapter *adapter;
9018         u64 action;
9019         int ifindex;
9020         u8 queue;
9021 };
9022
9023 static int get_macvlan_queue(struct net_device *upper, void *_data)
9024 {
9025         if (netif_is_macvlan(upper)) {
9026                 struct macvlan_dev *dfwd = netdev_priv(upper);
9027                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
9028                 struct upper_walk_data *data = _data;
9029                 struct ixgbe_adapter *adapter = data->adapter;
9030                 int ifindex = data->ifindex;
9031
9032                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
9033                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9034                         data->action = data->queue;
9035                         return 1;
9036                 }
9037         }
9038
9039         return 0;
9040 }
9041
9042 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9043                                   u8 *queue, u64 *action)
9044 {
9045         unsigned int num_vfs = adapter->num_vfs, vf;
9046         struct upper_walk_data data;
9047         struct net_device *upper;
9048
9049         /* redirect to a SRIOV VF */
9050         for (vf = 0; vf < num_vfs; ++vf) {
9051                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9052                 if (upper->ifindex == ifindex) {
9053                         if (adapter->num_rx_pools > 1)
9054                                 *queue = vf * 2;
9055                         else
9056                                 *queue = vf * adapter->num_rx_queues_per_pool;
9057
9058                         *action = vf + 1;
9059                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9060                         return 0;
9061                 }
9062         }
9063
9064         /* redirect to a offloaded macvlan netdev */
9065         data.adapter = adapter;
9066         data.ifindex = ifindex;
9067         data.action = 0;
9068         data.queue = 0;
9069         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9070                                           get_macvlan_queue, &data)) {
9071                 *action = data.action;
9072                 *queue = data.queue;
9073
9074                 return 0;
9075         }
9076
9077         return -EINVAL;
9078 }
9079
9080 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9081                             struct tcf_exts *exts, u64 *action, u8 *queue)
9082 {
9083         const struct tc_action *a;
9084         LIST_HEAD(actions);
9085         int err;
9086
9087         if (!tcf_exts_has_actions(exts))
9088                 return -EINVAL;
9089
9090         tcf_exts_to_list(exts, &actions);
9091         list_for_each_entry(a, &actions, list) {
9092
9093                 /* Drop action */
9094                 if (is_tcf_gact_shot(a)) {
9095                         *action = IXGBE_FDIR_DROP_QUEUE;
9096                         *queue = IXGBE_FDIR_DROP_QUEUE;
9097                         return 0;
9098                 }
9099
9100                 /* Redirect to a VF or a offloaded macvlan */
9101                 if (is_tcf_mirred_egress_redirect(a)) {
9102                         struct net_device *dev = tcf_mirred_dev(a);
9103
9104                         if (!dev)
9105                                 return -EINVAL;
9106                         err = handle_redirect_action(adapter, dev->ifindex, queue,
9107                                                      action);
9108                         if (err == 0)
9109                                 return err;
9110                 }
9111         }
9112
9113         return -EINVAL;
9114 }
9115 #else
9116 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9117                             struct tcf_exts *exts, u64 *action, u8 *queue)
9118 {
9119         return -EINVAL;
9120 }
9121 #endif /* CONFIG_NET_CLS_ACT */
9122
9123 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9124                                     union ixgbe_atr_input *mask,
9125                                     struct tc_cls_u32_offload *cls,
9126                                     struct ixgbe_mat_field *field_ptr,
9127                                     struct ixgbe_nexthdr *nexthdr)
9128 {
9129         int i, j, off;
9130         __be32 val, m;
9131         bool found_entry = false, found_jump_field = false;
9132
9133         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9134                 off = cls->knode.sel->keys[i].off;
9135                 val = cls->knode.sel->keys[i].val;
9136                 m = cls->knode.sel->keys[i].mask;
9137
9138                 for (j = 0; field_ptr[j].val; j++) {
9139                         if (field_ptr[j].off == off) {
9140                                 field_ptr[j].val(input, mask, val, m);
9141                                 input->filter.formatted.flow_type |=
9142                                         field_ptr[j].type;
9143                                 found_entry = true;
9144                                 break;
9145                         }
9146                 }
9147                 if (nexthdr) {
9148                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9149                             nexthdr->val == cls->knode.sel->keys[i].val &&
9150                             nexthdr->mask == cls->knode.sel->keys[i].mask)
9151                                 found_jump_field = true;
9152                         else
9153                                 continue;
9154                 }
9155         }
9156
9157         if (nexthdr && !found_jump_field)
9158                 return -EINVAL;
9159
9160         if (!found_entry)
9161                 return 0;
9162
9163         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9164                                     IXGBE_ATR_L4TYPE_MASK;
9165
9166         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9167                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9168
9169         return 0;
9170 }
9171
9172 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9173                                   struct tc_cls_u32_offload *cls)
9174 {
9175         __be16 protocol = cls->common.protocol;
9176         u32 loc = cls->knode.handle & 0xfffff;
9177         struct ixgbe_hw *hw = &adapter->hw;
9178         struct ixgbe_mat_field *field_ptr;
9179         struct ixgbe_fdir_filter *input = NULL;
9180         union ixgbe_atr_input *mask = NULL;
9181         struct ixgbe_jump_table *jump = NULL;
9182         int i, err = -EINVAL;
9183         u8 queue;
9184         u32 uhtid, link_uhtid;
9185
9186         uhtid = TC_U32_USERHTID(cls->knode.handle);
9187         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9188
9189         /* At the moment cls_u32 jumps to network layer and skips past
9190          * L2 headers. The canonical method to match L2 frames is to use
9191          * negative values. However this is error prone at best but really
9192          * just broken because there is no way to "know" what sort of hdr
9193          * is in front of the network layer. Fix cls_u32 to support L2
9194          * headers when needed.
9195          */
9196         if (protocol != htons(ETH_P_IP))
9197                 return err;
9198
9199         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9200                 e_err(drv, "Location out of range\n");
9201                 return err;
9202         }
9203
9204         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9205          * links and also the fields used to advance the parser across each
9206          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9207          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9208          * To add support for new nodes update ixgbe_model.h parse structures
9209          * this function _should_ be generic try not to hardcode values here.
9210          */
9211         if (uhtid == 0x800) {
9212                 field_ptr = (adapter->jump_tables[0])->mat;
9213         } else {
9214                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9215                         return err;
9216                 if (!adapter->jump_tables[uhtid])
9217                         return err;
9218                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9219         }
9220
9221         if (!field_ptr)
9222                 return err;
9223
9224         /* At this point we know the field_ptr is valid and need to either
9225          * build cls_u32 link or attach filter. Because adding a link to
9226          * a handle that does not exist is invalid and the same for adding
9227          * rules to handles that don't exist.
9228          */
9229
9230         if (link_uhtid) {
9231                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9232
9233                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9234                         return err;
9235
9236                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9237                         return err;
9238
9239                 /* Multiple filters as links to the same hash table are not
9240                  * supported. To add a new filter with the same next header
9241                  * but different match/jump conditions, create a new hash table
9242                  * and link to it.
9243                  */
9244                 if (adapter->jump_tables[link_uhtid] &&
9245                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9246                         e_err(drv, "Link filter exists for link: %x\n",
9247                               link_uhtid);
9248                         return err;
9249                 }
9250
9251                 for (i = 0; nexthdr[i].jump; i++) {
9252                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9253                             nexthdr[i].s != cls->knode.sel->offshift ||
9254                             nexthdr[i].m != cls->knode.sel->offmask)
9255                                 return err;
9256
9257                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9258                         if (!jump)
9259                                 return -ENOMEM;
9260                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9261                         if (!input) {
9262                                 err = -ENOMEM;
9263                                 goto free_jump;
9264                         }
9265                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9266                         if (!mask) {
9267                                 err = -ENOMEM;
9268                                 goto free_input;
9269                         }
9270                         jump->input = input;
9271                         jump->mask = mask;
9272                         jump->link_hdl = cls->knode.handle;
9273
9274                         err = ixgbe_clsu32_build_input(input, mask, cls,
9275                                                        field_ptr, &nexthdr[i]);
9276                         if (!err) {
9277                                 jump->mat = nexthdr[i].jump;
9278                                 adapter->jump_tables[link_uhtid] = jump;
9279                                 break;
9280                         }
9281                 }
9282                 return 0;
9283         }
9284
9285         input = kzalloc(sizeof(*input), GFP_KERNEL);
9286         if (!input)
9287                 return -ENOMEM;
9288         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9289         if (!mask) {
9290                 err = -ENOMEM;
9291                 goto free_input;
9292         }
9293
9294         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9295                 if ((adapter->jump_tables[uhtid])->input)
9296                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9297                                sizeof(*input));
9298                 if ((adapter->jump_tables[uhtid])->mask)
9299                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9300                                sizeof(*mask));
9301
9302                 /* Lookup in all child hash tables if this location is already
9303                  * filled with a filter
9304                  */
9305                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9306                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9307
9308                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9309                                 e_err(drv, "Filter exists in location: %x\n",
9310                                       loc);
9311                                 err = -EINVAL;
9312                                 goto err_out;
9313                         }
9314                 }
9315         }
9316         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9317         if (err)
9318                 goto err_out;
9319
9320         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9321                                &queue);
9322         if (err < 0)
9323                 goto err_out;
9324
9325         input->sw_idx = loc;
9326
9327         spin_lock(&adapter->fdir_perfect_lock);
9328
9329         if (hlist_empty(&adapter->fdir_filter_list)) {
9330                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9331                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9332                 if (err)
9333                         goto err_out_w_lock;
9334         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9335                 err = -EINVAL;
9336                 goto err_out_w_lock;
9337         }
9338
9339         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9340         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9341                                                     input->sw_idx, queue);
9342         if (!err)
9343                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9344         spin_unlock(&adapter->fdir_perfect_lock);
9345
9346         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9347                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9348
9349         kfree(mask);
9350         return err;
9351 err_out_w_lock:
9352         spin_unlock(&adapter->fdir_perfect_lock);
9353 err_out:
9354         kfree(mask);
9355 free_input:
9356         kfree(input);
9357 free_jump:
9358         kfree(jump);
9359         return err;
9360 }
9361
9362 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9363                                   struct tc_cls_u32_offload *cls_u32)
9364 {
9365         if (cls_u32->common.chain_index)
9366                 return -EOPNOTSUPP;
9367
9368         switch (cls_u32->command) {
9369         case TC_CLSU32_NEW_KNODE:
9370         case TC_CLSU32_REPLACE_KNODE:
9371                 return ixgbe_configure_clsu32(adapter, cls_u32);
9372         case TC_CLSU32_DELETE_KNODE:
9373                 return ixgbe_delete_clsu32(adapter, cls_u32);
9374         case TC_CLSU32_NEW_HNODE:
9375         case TC_CLSU32_REPLACE_HNODE:
9376                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9377         case TC_CLSU32_DELETE_HNODE:
9378                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9379         default:
9380                 return -EOPNOTSUPP;
9381         }
9382 }
9383
9384 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9385                                    void *cb_priv)
9386 {
9387         struct ixgbe_adapter *adapter = cb_priv;
9388
9389         if (!tc_can_offload(adapter->netdev))
9390                 return -EOPNOTSUPP;
9391
9392         switch (type) {
9393         case TC_SETUP_CLSU32:
9394                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9395         default:
9396                 return -EOPNOTSUPP;
9397         }
9398 }
9399
9400 static int ixgbe_setup_tc_block(struct net_device *dev,
9401                                 struct tc_block_offload *f)
9402 {
9403         struct ixgbe_adapter *adapter = netdev_priv(dev);
9404
9405         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9406                 return -EOPNOTSUPP;
9407
9408         switch (f->command) {
9409         case TC_BLOCK_BIND:
9410                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9411                                              adapter, adapter);
9412         case TC_BLOCK_UNBIND:
9413                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9414                                         adapter);
9415                 return 0;
9416         default:
9417                 return -EOPNOTSUPP;
9418         }
9419 }
9420
9421 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9422                                  struct tc_mqprio_qopt *mqprio)
9423 {
9424         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9425         return ixgbe_setup_tc(dev, mqprio->num_tc);
9426 }
9427
9428 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9429                             void *type_data)
9430 {
9431         switch (type) {
9432         case TC_SETUP_BLOCK:
9433                 return ixgbe_setup_tc_block(dev, type_data);
9434         case TC_SETUP_QDISC_MQPRIO:
9435                 return ixgbe_setup_tc_mqprio(dev, type_data);
9436         default:
9437                 return -EOPNOTSUPP;
9438         }
9439 }
9440
9441 #ifdef CONFIG_PCI_IOV
9442 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9443 {
9444         struct net_device *netdev = adapter->netdev;
9445
9446         rtnl_lock();
9447         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
9448         rtnl_unlock();
9449 }
9450
9451 #endif
9452 void ixgbe_do_reset(struct net_device *netdev)
9453 {
9454         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9455
9456         if (netif_running(netdev))
9457                 ixgbe_reinit_locked(adapter);
9458         else
9459                 ixgbe_reset(adapter);
9460 }
9461
9462 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9463                                             netdev_features_t features)
9464 {
9465         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9466
9467         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9468         if (!(features & NETIF_F_RXCSUM))
9469                 features &= ~NETIF_F_LRO;
9470
9471         /* Turn off LRO if not RSC capable */
9472         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9473                 features &= ~NETIF_F_LRO;
9474
9475         return features;
9476 }
9477
9478 static int ixgbe_set_features(struct net_device *netdev,
9479                               netdev_features_t features)
9480 {
9481         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9482         netdev_features_t changed = netdev->features ^ features;
9483         bool need_reset = false;
9484
9485         /* Make sure RSC matches LRO, reset if change */
9486         if (!(features & NETIF_F_LRO)) {
9487                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9488                         need_reset = true;
9489                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9490         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9491                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9492                 if (adapter->rx_itr_setting == 1 ||
9493                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9494                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9495                         need_reset = true;
9496                 } else if ((changed ^ features) & NETIF_F_LRO) {
9497                         e_info(probe, "rx-usecs set too low, "
9498                                "disabling RSC\n");
9499                 }
9500         }
9501
9502         /*
9503          * Check if Flow Director n-tuple support or hw_tc support was
9504          * enabled or disabled.  If the state changed, we need to reset.
9505          */
9506         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9507                 /* turn off ATR, enable perfect filters and reset */
9508                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9509                         need_reset = true;
9510
9511                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9512                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9513         } else {
9514                 /* turn off perfect filters, enable ATR and reset */
9515                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9516                         need_reset = true;
9517
9518                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9519
9520                 /* We cannot enable ATR if SR-IOV is enabled */
9521                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9522                     /* We cannot enable ATR if we have 2 or more tcs */
9523                     (netdev_get_num_tc(netdev) > 1) ||
9524                     /* We cannot enable ATR if RSS is disabled */
9525                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9526                     /* A sample rate of 0 indicates ATR disabled */
9527                     (!adapter->atr_sample_rate))
9528                         ; /* do nothing not supported */
9529                 else /* otherwise supported and set the flag */
9530                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9531         }
9532
9533         if (changed & NETIF_F_RXALL)
9534                 need_reset = true;
9535
9536         netdev->features = features;
9537
9538         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9539                 if (features & NETIF_F_RXCSUM) {
9540                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9541                 } else {
9542                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9543
9544                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9545                 }
9546         }
9547
9548         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9549                 if (features & NETIF_F_RXCSUM) {
9550                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9551                 } else {
9552                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9553
9554                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9555                 }
9556         }
9557
9558         if (need_reset)
9559                 ixgbe_do_reset(netdev);
9560         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9561                             NETIF_F_HW_VLAN_CTAG_FILTER))
9562                 ixgbe_set_rx_mode(netdev);
9563
9564         return 0;
9565 }
9566
9567 /**
9568  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9569  * @dev: The port's netdev
9570  * @ti: Tunnel endpoint information
9571  **/
9572 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9573                                       struct udp_tunnel_info *ti)
9574 {
9575         struct ixgbe_adapter *adapter = netdev_priv(dev);
9576         struct ixgbe_hw *hw = &adapter->hw;
9577         __be16 port = ti->port;
9578         u32 port_shift = 0;
9579         u32 reg;
9580
9581         if (ti->sa_family != AF_INET)
9582                 return;
9583
9584         switch (ti->type) {
9585         case UDP_TUNNEL_TYPE_VXLAN:
9586                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9587                         return;
9588
9589                 if (adapter->vxlan_port == port)
9590                         return;
9591
9592                 if (adapter->vxlan_port) {
9593                         netdev_info(dev,
9594                                     "VXLAN port %d set, not adding port %d\n",
9595                                     ntohs(adapter->vxlan_port),
9596                                     ntohs(port));
9597                         return;
9598                 }
9599
9600                 adapter->vxlan_port = port;
9601                 break;
9602         case UDP_TUNNEL_TYPE_GENEVE:
9603                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9604                         return;
9605
9606                 if (adapter->geneve_port == port)
9607                         return;
9608
9609                 if (adapter->geneve_port) {
9610                         netdev_info(dev,
9611                                     "GENEVE port %d set, not adding port %d\n",
9612                                     ntohs(adapter->geneve_port),
9613                                     ntohs(port));
9614                         return;
9615                 }
9616
9617                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9618                 adapter->geneve_port = port;
9619                 break;
9620         default:
9621                 return;
9622         }
9623
9624         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9625         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9626 }
9627
9628 /**
9629  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9630  * @dev: The port's netdev
9631  * @ti: Tunnel endpoint information
9632  **/
9633 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9634                                       struct udp_tunnel_info *ti)
9635 {
9636         struct ixgbe_adapter *adapter = netdev_priv(dev);
9637         u32 port_mask;
9638
9639         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9640             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9641                 return;
9642
9643         if (ti->sa_family != AF_INET)
9644                 return;
9645
9646         switch (ti->type) {
9647         case UDP_TUNNEL_TYPE_VXLAN:
9648                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9649                         return;
9650
9651                 if (adapter->vxlan_port != ti->port) {
9652                         netdev_info(dev, "VXLAN port %d not found\n",
9653                                     ntohs(ti->port));
9654                         return;
9655                 }
9656
9657                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9658                 break;
9659         case UDP_TUNNEL_TYPE_GENEVE:
9660                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9661                         return;
9662
9663                 if (adapter->geneve_port != ti->port) {
9664                         netdev_info(dev, "GENEVE port %d not found\n",
9665                                     ntohs(ti->port));
9666                         return;
9667                 }
9668
9669                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9670                 break;
9671         default:
9672                 return;
9673         }
9674
9675         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9676         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9677 }
9678
9679 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9680                              struct net_device *dev,
9681                              const unsigned char *addr, u16 vid,
9682                              u16 flags)
9683 {
9684         /* guarantee we can provide a unique filter for the unicast address */
9685         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9686                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9687                 u16 pool = VMDQ_P(0);
9688
9689                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9690                         return -ENOMEM;
9691         }
9692
9693         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9694 }
9695
9696 /**
9697  * ixgbe_configure_bridge_mode - set various bridge modes
9698  * @adapter - the private structure
9699  * @mode - requested bridge mode
9700  *
9701  * Configure some settings require for various bridge modes.
9702  **/
9703 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9704                                        __u16 mode)
9705 {
9706         struct ixgbe_hw *hw = &adapter->hw;
9707         unsigned int p, num_pools;
9708         u32 vmdctl;
9709
9710         switch (mode) {
9711         case BRIDGE_MODE_VEPA:
9712                 /* disable Tx loopback, rely on switch hairpin mode */
9713                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9714
9715                 /* must enable Rx switching replication to allow multicast
9716                  * packet reception on all VFs, and to enable source address
9717                  * pruning.
9718                  */
9719                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9720                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9721                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9722
9723                 /* enable Rx source address pruning. Note, this requires
9724                  * replication to be enabled or else it does nothing.
9725                  */
9726                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9727                 for (p = 0; p < num_pools; p++) {
9728                         if (hw->mac.ops.set_source_address_pruning)
9729                                 hw->mac.ops.set_source_address_pruning(hw,
9730                                                                        true,
9731                                                                        p);
9732                 }
9733                 break;
9734         case BRIDGE_MODE_VEB:
9735                 /* enable Tx loopback for internal VF/PF communication */
9736                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9737                                 IXGBE_PFDTXGSWC_VT_LBEN);
9738
9739                 /* disable Rx switching replication unless we have SR-IOV
9740                  * virtual functions
9741                  */
9742                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9743                 if (!adapter->num_vfs)
9744                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9745                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9746
9747                 /* disable Rx source address pruning, since we don't expect to
9748                  * be receiving external loopback of our transmitted frames.
9749                  */
9750                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9751                 for (p = 0; p < num_pools; p++) {
9752                         if (hw->mac.ops.set_source_address_pruning)
9753                                 hw->mac.ops.set_source_address_pruning(hw,
9754                                                                        false,
9755                                                                        p);
9756                 }
9757                 break;
9758         default:
9759                 return -EINVAL;
9760         }
9761
9762         adapter->bridge_mode = mode;
9763
9764         e_info(drv, "enabling bridge mode: %s\n",
9765                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9766
9767         return 0;
9768 }
9769
9770 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9771                                     struct nlmsghdr *nlh, u16 flags)
9772 {
9773         struct ixgbe_adapter *adapter = netdev_priv(dev);
9774         struct nlattr *attr, *br_spec;
9775         int rem;
9776
9777         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9778                 return -EOPNOTSUPP;
9779
9780         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9781         if (!br_spec)
9782                 return -EINVAL;
9783
9784         nla_for_each_nested(attr, br_spec, rem) {
9785                 int status;
9786                 __u16 mode;
9787
9788                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9789                         continue;
9790
9791                 if (nla_len(attr) < sizeof(mode))
9792                         return -EINVAL;
9793
9794                 mode = nla_get_u16(attr);
9795                 status = ixgbe_configure_bridge_mode(adapter, mode);
9796                 if (status)
9797                         return status;
9798
9799                 break;
9800         }
9801
9802         return 0;
9803 }
9804
9805 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9806                                     struct net_device *dev,
9807                                     u32 filter_mask, int nlflags)
9808 {
9809         struct ixgbe_adapter *adapter = netdev_priv(dev);
9810
9811         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9812                 return 0;
9813
9814         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9815                                        adapter->bridge_mode, 0, 0, nlflags,
9816                                        filter_mask, NULL);
9817 }
9818
9819 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9820 {
9821         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9822         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9823         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9824         unsigned int limit;
9825         int pool, err;
9826
9827         /* Hardware has a limited number of available pools. Each VF, and the
9828          * PF require a pool. Check to ensure we don't attempt to use more
9829          * then the available number of pools.
9830          */
9831         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9832                 return ERR_PTR(-EINVAL);
9833
9834 #ifdef CONFIG_RPS
9835         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9836                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9837                             vdev->name);
9838                 return ERR_PTR(-EINVAL);
9839         }
9840 #endif
9841         /* Check for hardware restriction on number of rx/tx queues */
9842         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9843             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9844                 netdev_info(pdev,
9845                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9846                             pdev->name);
9847                 return ERR_PTR(-EINVAL);
9848         }
9849
9850         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9851               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9852             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9853                 return ERR_PTR(-EBUSY);
9854
9855         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9856         if (!fwd_adapter)
9857                 return ERR_PTR(-ENOMEM);
9858
9859         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9860         adapter->num_rx_pools++;
9861         set_bit(pool, &adapter->fwd_bitmask);
9862         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9863
9864         /* Enable VMDq flag so device will be set in VM mode */
9865         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9866         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9867         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9868
9869         /* Force reinit of ring allocation with VMDQ enabled */
9870         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9871         if (err)
9872                 goto fwd_add_err;
9873         fwd_adapter->pool = pool;
9874         fwd_adapter->real_adapter = adapter;
9875
9876         if (netif_running(pdev)) {
9877                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9878                 if (err)
9879                         goto fwd_add_err;
9880                 netif_tx_start_all_queues(vdev);
9881         }
9882
9883         return fwd_adapter;
9884 fwd_add_err:
9885         /* unwind counter and free adapter struct */
9886         netdev_info(pdev,
9887                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9888         clear_bit(pool, &adapter->fwd_bitmask);
9889         adapter->num_rx_pools--;
9890         kfree(fwd_adapter);
9891         return ERR_PTR(err);
9892 }
9893
9894 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9895 {
9896         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9897         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9898         unsigned int limit;
9899
9900         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9901         adapter->num_rx_pools--;
9902
9903         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9904         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9905         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9906
9907         /* go back to full RSS if we're done with our VMQs */
9908         if (adapter->ring_feature[RING_F_VMDQ].limit == 1) {
9909                 int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9910                                 num_online_cpus());
9911
9912                 adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED;
9913                 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
9914                 adapter->ring_feature[RING_F_RSS].limit = rss;
9915         }
9916
9917         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9918         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9919                    fwd_adapter->pool, adapter->num_rx_pools,
9920                    fwd_adapter->rx_base_queue,
9921                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9922                    adapter->fwd_bitmask);
9923         kfree(fwd_adapter);
9924 }
9925
9926 #define IXGBE_MAX_MAC_HDR_LEN           127
9927 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9928
9929 static netdev_features_t
9930 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9931                      netdev_features_t features)
9932 {
9933         unsigned int network_hdr_len, mac_hdr_len;
9934
9935         /* Make certain the headers can be described by a context descriptor */
9936         mac_hdr_len = skb_network_header(skb) - skb->data;
9937         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9938                 return features & ~(NETIF_F_HW_CSUM |
9939                                     NETIF_F_SCTP_CRC |
9940                                     NETIF_F_HW_VLAN_CTAG_TX |
9941                                     NETIF_F_TSO |
9942                                     NETIF_F_TSO6);
9943
9944         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9945         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9946                 return features & ~(NETIF_F_HW_CSUM |
9947                                     NETIF_F_SCTP_CRC |
9948                                     NETIF_F_TSO |
9949                                     NETIF_F_TSO6);
9950
9951         /* We can only support IPV4 TSO in tunnels if we can mangle the
9952          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9953          */
9954         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9955                 features &= ~NETIF_F_TSO;
9956
9957         return features;
9958 }
9959
9960 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
9961 {
9962         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
9963         struct ixgbe_adapter *adapter = netdev_priv(dev);
9964         struct bpf_prog *old_prog;
9965
9966         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
9967                 return -EINVAL;
9968
9969         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
9970                 return -EINVAL;
9971
9972         /* verify ixgbe ring attributes are sufficient for XDP */
9973         for (i = 0; i < adapter->num_rx_queues; i++) {
9974                 struct ixgbe_ring *ring = adapter->rx_ring[i];
9975
9976                 if (ring_is_rsc_enabled(ring))
9977                         return -EINVAL;
9978
9979                 if (frame_size > ixgbe_rx_bufsz(ring))
9980                         return -EINVAL;
9981         }
9982
9983         if (nr_cpu_ids > MAX_XDP_QUEUES)
9984                 return -ENOMEM;
9985
9986         old_prog = xchg(&adapter->xdp_prog, prog);
9987
9988         /* If transitioning XDP modes reconfigure rings */
9989         if (!!prog != !!old_prog) {
9990                 int err = ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
9991
9992                 if (err) {
9993                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
9994                         return -EINVAL;
9995                 }
9996         } else {
9997                 for (i = 0; i < adapter->num_rx_queues; i++)
9998                         xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
9999         }
10000
10001         if (old_prog)
10002                 bpf_prog_put(old_prog);
10003
10004         return 0;
10005 }
10006
10007 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10008 {
10009         struct ixgbe_adapter *adapter = netdev_priv(dev);
10010
10011         switch (xdp->command) {
10012         case XDP_SETUP_PROG:
10013                 return ixgbe_xdp_setup(dev, xdp->prog);
10014         case XDP_QUERY_PROG:
10015                 xdp->prog_attached = !!(adapter->xdp_prog);
10016                 xdp->prog_id = adapter->xdp_prog ?
10017                         adapter->xdp_prog->aux->id : 0;
10018                 return 0;
10019         default:
10020                 return -EINVAL;
10021         }
10022 }
10023
10024 static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp)
10025 {
10026         struct ixgbe_adapter *adapter = netdev_priv(dev);
10027         struct ixgbe_ring *ring;
10028         int err;
10029
10030         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10031                 return -ENETDOWN;
10032
10033         /* During program transitions its possible adapter->xdp_prog is assigned
10034          * but ring has not been configured yet. In this case simply abort xmit.
10035          */
10036         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10037         if (unlikely(!ring))
10038                 return -ENXIO;
10039
10040         err = ixgbe_xmit_xdp_ring(adapter, xdp);
10041         if (err != IXGBE_XDP_TX)
10042                 return -ENOSPC;
10043
10044         return 0;
10045 }
10046
10047 static void ixgbe_xdp_flush(struct net_device *dev)
10048 {
10049         struct ixgbe_adapter *adapter = netdev_priv(dev);
10050         struct ixgbe_ring *ring;
10051
10052         /* Its possible the device went down between xdp xmit and flush so
10053          * we need to ensure device is still up.
10054          */
10055         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10056                 return;
10057
10058         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10059         if (unlikely(!ring))
10060                 return;
10061
10062         /* Force memory writes to complete before letting h/w know there
10063          * are new descriptors to fetch.
10064          */
10065         wmb();
10066         writel(ring->next_to_use, ring->tail);
10067
10068         return;
10069 }
10070
10071 static const struct net_device_ops ixgbe_netdev_ops = {
10072         .ndo_open               = ixgbe_open,
10073         .ndo_stop               = ixgbe_close,
10074         .ndo_start_xmit         = ixgbe_xmit_frame,
10075         .ndo_select_queue       = ixgbe_select_queue,
10076         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10077         .ndo_validate_addr      = eth_validate_addr,
10078         .ndo_set_mac_address    = ixgbe_set_mac,
10079         .ndo_change_mtu         = ixgbe_change_mtu,
10080         .ndo_tx_timeout         = ixgbe_tx_timeout,
10081         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10082         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10083         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10084         .ndo_do_ioctl           = ixgbe_ioctl,
10085         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10086         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10087         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10088         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10089         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10090         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10091         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10092         .ndo_get_stats64        = ixgbe_get_stats64,
10093         .ndo_setup_tc           = __ixgbe_setup_tc,
10094 #ifdef CONFIG_NET_POLL_CONTROLLER
10095         .ndo_poll_controller    = ixgbe_netpoll,
10096 #endif
10097 #ifdef IXGBE_FCOE
10098         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10099         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10100         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10101         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10102         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10103         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10104         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10105 #endif /* IXGBE_FCOE */
10106         .ndo_set_features = ixgbe_set_features,
10107         .ndo_fix_features = ixgbe_fix_features,
10108         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10109         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10110         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10111         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10112         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10113         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10114         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10115         .ndo_features_check     = ixgbe_features_check,
10116         .ndo_bpf                = ixgbe_xdp,
10117         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10118         .ndo_xdp_flush          = ixgbe_xdp_flush,
10119 };
10120
10121 /**
10122  * ixgbe_enumerate_functions - Get the number of ports this device has
10123  * @adapter: adapter structure
10124  *
10125  * This function enumerates the phsyical functions co-located on a single slot,
10126  * in order to determine how many ports a device has. This is most useful in
10127  * determining the required GT/s of PCIe bandwidth necessary for optimal
10128  * performance.
10129  **/
10130 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10131 {
10132         struct pci_dev *entry, *pdev = adapter->pdev;
10133         int physfns = 0;
10134
10135         /* Some cards can not use the generic count PCIe functions method,
10136          * because they are behind a parent switch, so we hardcode these with
10137          * the correct number of functions.
10138          */
10139         if (ixgbe_pcie_from_parent(&adapter->hw))
10140                 physfns = 4;
10141
10142         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10143                 /* don't count virtual functions */
10144                 if (entry->is_virtfn)
10145                         continue;
10146
10147                 /* When the devices on the bus don't all match our device ID,
10148                  * we can't reliably determine the correct number of
10149                  * functions. This can occur if a function has been direct
10150                  * attached to a virtual machine using VT-d, for example. In
10151                  * this case, simply return -1 to indicate this.
10152                  */
10153                 if ((entry->vendor != pdev->vendor) ||
10154                     (entry->device != pdev->device))
10155                         return -1;
10156
10157                 physfns++;
10158         }
10159
10160         return physfns;
10161 }
10162
10163 /**
10164  * ixgbe_wol_supported - Check whether device supports WoL
10165  * @adapter: the adapter private structure
10166  * @device_id: the device ID
10167  * @subdev_id: the subsystem device ID
10168  *
10169  * This function is used by probe and ethtool to determine
10170  * which devices have WoL support
10171  *
10172  **/
10173 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10174                          u16 subdevice_id)
10175 {
10176         struct ixgbe_hw *hw = &adapter->hw;
10177         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10178
10179         /* WOL not supported on 82598 */
10180         if (hw->mac.type == ixgbe_mac_82598EB)
10181                 return false;
10182
10183         /* check eeprom to see if WOL is enabled for X540 and newer */
10184         if (hw->mac.type >= ixgbe_mac_X540) {
10185                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10186                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10187                      (hw->bus.func == 0)))
10188                         return true;
10189         }
10190
10191         /* WOL is determined based on device IDs for 82599 MACs */
10192         switch (device_id) {
10193         case IXGBE_DEV_ID_82599_SFP:
10194                 /* Only these subdevices could supports WOL */
10195                 switch (subdevice_id) {
10196                 case IXGBE_SUBDEV_ID_82599_560FLR:
10197                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10198                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10199                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10200                         /* only support first port */
10201                         if (hw->bus.func != 0)
10202                                 break;
10203                         /* fall through */
10204                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10205                 case IXGBE_SUBDEV_ID_82599_SFP:
10206                 case IXGBE_SUBDEV_ID_82599_RNDC:
10207                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10208                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10209                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10210                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10211                         return true;
10212                 }
10213                 break;
10214         case IXGBE_DEV_ID_82599EN_SFP:
10215                 /* Only these subdevices support WOL */
10216                 switch (subdevice_id) {
10217                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10218                         return true;
10219                 }
10220                 break;
10221         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10222                 /* All except this subdevice support WOL */
10223                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10224                         return true;
10225                 break;
10226         case IXGBE_DEV_ID_82599_KX4:
10227                 return  true;
10228         default:
10229                 break;
10230         }
10231
10232         return false;
10233 }
10234
10235 /**
10236  * ixgbe_set_fw_version - Set FW version
10237  * @adapter: the adapter private structure
10238  *
10239  * This function is used by probe and ethtool to determine the FW version to
10240  * format to display. The FW version is taken from the EEPROM/NVM.
10241  */
10242 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10243 {
10244         struct ixgbe_hw *hw = &adapter->hw;
10245         struct ixgbe_nvm_version nvm_ver;
10246
10247         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10248         if (nvm_ver.oem_valid) {
10249                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10250                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10251                          nvm_ver.oem_release);
10252                 return;
10253         }
10254
10255         ixgbe_get_etk_id(hw, &nvm_ver);
10256         ixgbe_get_orom_version(hw, &nvm_ver);
10257
10258         if (nvm_ver.or_valid) {
10259                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10260                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10261                          nvm_ver.or_build, nvm_ver.or_patch);
10262                 return;
10263         }
10264
10265         /* Set ETrack ID format */
10266         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10267                  "0x%08x", nvm_ver.etk_id);
10268 }
10269
10270 /**
10271  * ixgbe_probe - Device Initialization Routine
10272  * @pdev: PCI device information struct
10273  * @ent: entry in ixgbe_pci_tbl
10274  *
10275  * Returns 0 on success, negative on failure
10276  *
10277  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10278  * The OS initialization, configuring of the adapter private structure,
10279  * and a hardware reset occur.
10280  **/
10281 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10282 {
10283         struct net_device *netdev;
10284         struct ixgbe_adapter *adapter = NULL;
10285         struct ixgbe_hw *hw;
10286         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10287         int i, err, pci_using_dac, expected_gts;
10288         unsigned int indices = MAX_TX_QUEUES;
10289         u8 part_str[IXGBE_PBANUM_LENGTH];
10290         bool disable_dev = false;
10291 #ifdef IXGBE_FCOE
10292         u16 device_caps;
10293 #endif
10294         u32 eec;
10295
10296         /* Catch broken hardware that put the wrong VF device ID in
10297          * the PCIe SR-IOV capability.
10298          */
10299         if (pdev->is_virtfn) {
10300                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10301                      pci_name(pdev), pdev->vendor, pdev->device);
10302                 return -EINVAL;
10303         }
10304
10305         err = pci_enable_device_mem(pdev);
10306         if (err)
10307                 return err;
10308
10309         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10310                 pci_using_dac = 1;
10311         } else {
10312                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10313                 if (err) {
10314                         dev_err(&pdev->dev,
10315                                 "No usable DMA configuration, aborting\n");
10316                         goto err_dma;
10317                 }
10318                 pci_using_dac = 0;
10319         }
10320
10321         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10322         if (err) {
10323                 dev_err(&pdev->dev,
10324                         "pci_request_selected_regions failed 0x%x\n", err);
10325                 goto err_pci_reg;
10326         }
10327
10328         pci_enable_pcie_error_reporting(pdev);
10329
10330         pci_set_master(pdev);
10331         pci_save_state(pdev);
10332
10333         if (ii->mac == ixgbe_mac_82598EB) {
10334 #ifdef CONFIG_IXGBE_DCB
10335                 /* 8 TC w/ 4 queues per TC */
10336                 indices = 4 * MAX_TRAFFIC_CLASS;
10337 #else
10338                 indices = IXGBE_MAX_RSS_INDICES;
10339 #endif
10340         }
10341
10342         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10343         if (!netdev) {
10344                 err = -ENOMEM;
10345                 goto err_alloc_etherdev;
10346         }
10347
10348         SET_NETDEV_DEV(netdev, &pdev->dev);
10349
10350         adapter = netdev_priv(netdev);
10351
10352         adapter->netdev = netdev;
10353         adapter->pdev = pdev;
10354         hw = &adapter->hw;
10355         hw->back = adapter;
10356         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10357
10358         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10359                               pci_resource_len(pdev, 0));
10360         adapter->io_addr = hw->hw_addr;
10361         if (!hw->hw_addr) {
10362                 err = -EIO;
10363                 goto err_ioremap;
10364         }
10365
10366         netdev->netdev_ops = &ixgbe_netdev_ops;
10367         ixgbe_set_ethtool_ops(netdev);
10368         netdev->watchdog_timeo = 5 * HZ;
10369         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10370
10371         /* Setup hw api */
10372         hw->mac.ops   = *ii->mac_ops;
10373         hw->mac.type  = ii->mac;
10374         hw->mvals     = ii->mvals;
10375         if (ii->link_ops)
10376                 hw->link.ops  = *ii->link_ops;
10377
10378         /* EEPROM */
10379         hw->eeprom.ops = *ii->eeprom_ops;
10380         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10381         if (ixgbe_removed(hw->hw_addr)) {
10382                 err = -EIO;
10383                 goto err_ioremap;
10384         }
10385         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10386         if (!(eec & BIT(8)))
10387                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10388
10389         /* PHY */
10390         hw->phy.ops = *ii->phy_ops;
10391         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10392         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10393         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10394         hw->phy.mdio.mmds = 0;
10395         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10396         hw->phy.mdio.dev = netdev;
10397         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10398         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10399
10400         /* setup the private structure */
10401         err = ixgbe_sw_init(adapter, ii);
10402         if (err)
10403                 goto err_sw_init;
10404
10405         /* Make sure the SWFW semaphore is in a valid state */
10406         if (hw->mac.ops.init_swfw_sync)
10407                 hw->mac.ops.init_swfw_sync(hw);
10408
10409         /* Make it possible the adapter to be woken up via WOL */
10410         switch (adapter->hw.mac.type) {
10411         case ixgbe_mac_82599EB:
10412         case ixgbe_mac_X540:
10413         case ixgbe_mac_X550:
10414         case ixgbe_mac_X550EM_x:
10415         case ixgbe_mac_x550em_a:
10416                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10417                 break;
10418         default:
10419                 break;
10420         }
10421
10422         /*
10423          * If there is a fan on this device and it has failed log the
10424          * failure.
10425          */
10426         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10427                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10428                 if (esdp & IXGBE_ESDP_SDP1)
10429                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10430         }
10431
10432         if (allow_unsupported_sfp)
10433                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10434
10435         /* reset_hw fills in the perm_addr as well */
10436         hw->phy.reset_if_overtemp = true;
10437         err = hw->mac.ops.reset_hw(hw);
10438         hw->phy.reset_if_overtemp = false;
10439         ixgbe_set_eee_capable(adapter);
10440         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10441                 err = 0;
10442         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10443                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10444                 e_dev_err("Reload the driver after installing a supported module.\n");
10445                 goto err_sw_init;
10446         } else if (err) {
10447                 e_dev_err("HW Init failed: %d\n", err);
10448                 goto err_sw_init;
10449         }
10450
10451 #ifdef CONFIG_PCI_IOV
10452         /* SR-IOV not supported on the 82598 */
10453         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10454                 goto skip_sriov;
10455         /* Mailbox */
10456         ixgbe_init_mbx_params_pf(hw);
10457         hw->mbx.ops = ii->mbx_ops;
10458         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10459         ixgbe_enable_sriov(adapter, max_vfs);
10460 skip_sriov:
10461
10462 #endif
10463         netdev->features = NETIF_F_SG |
10464                            NETIF_F_TSO |
10465                            NETIF_F_TSO6 |
10466                            NETIF_F_RXHASH |
10467                            NETIF_F_RXCSUM |
10468                            NETIF_F_HW_CSUM;
10469
10470 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10471                                     NETIF_F_GSO_GRE_CSUM | \
10472                                     NETIF_F_GSO_IPXIP4 | \
10473                                     NETIF_F_GSO_IPXIP6 | \
10474                                     NETIF_F_GSO_UDP_TUNNEL | \
10475                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10476
10477         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10478         netdev->features |= NETIF_F_GSO_PARTIAL |
10479                             IXGBE_GSO_PARTIAL_FEATURES;
10480
10481         if (hw->mac.type >= ixgbe_mac_82599EB)
10482                 netdev->features |= NETIF_F_SCTP_CRC;
10483
10484         /* copy netdev features into list of user selectable features */
10485         netdev->hw_features |= netdev->features |
10486                                NETIF_F_HW_VLAN_CTAG_FILTER |
10487                                NETIF_F_HW_VLAN_CTAG_RX |
10488                                NETIF_F_HW_VLAN_CTAG_TX |
10489                                NETIF_F_RXALL |
10490                                NETIF_F_HW_L2FW_DOFFLOAD;
10491
10492         if (hw->mac.type >= ixgbe_mac_82599EB)
10493                 netdev->hw_features |= NETIF_F_NTUPLE |
10494                                        NETIF_F_HW_TC;
10495
10496         if (pci_using_dac)
10497                 netdev->features |= NETIF_F_HIGHDMA;
10498
10499         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10500         netdev->hw_enc_features |= netdev->vlan_features;
10501         netdev->mpls_features |= NETIF_F_SG |
10502                                  NETIF_F_TSO |
10503                                  NETIF_F_TSO6 |
10504                                  NETIF_F_HW_CSUM;
10505         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10506
10507         /* set this bit last since it cannot be part of vlan_features */
10508         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10509                             NETIF_F_HW_VLAN_CTAG_RX |
10510                             NETIF_F_HW_VLAN_CTAG_TX;
10511
10512         netdev->priv_flags |= IFF_UNICAST_FLT;
10513         netdev->priv_flags |= IFF_SUPP_NOFCS;
10514
10515         /* MTU range: 68 - 9710 */
10516         netdev->min_mtu = ETH_MIN_MTU;
10517         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10518
10519 #ifdef CONFIG_IXGBE_DCB
10520         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10521                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10522 #endif
10523
10524 #ifdef IXGBE_FCOE
10525         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10526                 unsigned int fcoe_l;
10527
10528                 if (hw->mac.ops.get_device_caps) {
10529                         hw->mac.ops.get_device_caps(hw, &device_caps);
10530                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10531                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10532                 }
10533
10534
10535                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10536                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10537
10538                 netdev->features |= NETIF_F_FSO |
10539                                     NETIF_F_FCOE_CRC;
10540
10541                 netdev->vlan_features |= NETIF_F_FSO |
10542                                          NETIF_F_FCOE_CRC |
10543                                          NETIF_F_FCOE_MTU;
10544         }
10545 #endif /* IXGBE_FCOE */
10546
10547         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10548                 netdev->hw_features |= NETIF_F_LRO;
10549         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10550                 netdev->features |= NETIF_F_LRO;
10551
10552         /* make sure the EEPROM is good */
10553         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10554                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10555                 err = -EIO;
10556                 goto err_sw_init;
10557         }
10558
10559         eth_platform_get_mac_address(&adapter->pdev->dev,
10560                                      adapter->hw.mac.perm_addr);
10561
10562         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10563
10564         if (!is_valid_ether_addr(netdev->dev_addr)) {
10565                 e_dev_err("invalid MAC address\n");
10566                 err = -EIO;
10567                 goto err_sw_init;
10568         }
10569
10570         /* Set hw->mac.addr to permanent MAC address */
10571         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10572         ixgbe_mac_set_default_filter(adapter);
10573
10574         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10575
10576         if (ixgbe_removed(hw->hw_addr)) {
10577                 err = -EIO;
10578                 goto err_sw_init;
10579         }
10580         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10581         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10582         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10583
10584         err = ixgbe_init_interrupt_scheme(adapter);
10585         if (err)
10586                 goto err_sw_init;
10587
10588         for (i = 0; i < adapter->num_rx_queues; i++)
10589                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10590         for (i = 0; i < adapter->num_tx_queues; i++)
10591                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10592         for (i = 0; i < adapter->num_xdp_queues; i++)
10593                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10594
10595         /* WOL not supported for all devices */
10596         adapter->wol = 0;
10597         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10598         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10599                                                 pdev->subsystem_device);
10600         if (hw->wol_enabled)
10601                 adapter->wol = IXGBE_WUFC_MAG;
10602
10603         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10604
10605         /* save off EEPROM version number */
10606         ixgbe_set_fw_version(adapter);
10607
10608         /* pick up the PCI bus settings for reporting later */
10609         if (ixgbe_pcie_from_parent(hw))
10610                 ixgbe_get_parent_bus_info(adapter);
10611         else
10612                  hw->mac.ops.get_bus_info(hw);
10613
10614         /* calculate the expected PCIe bandwidth required for optimal
10615          * performance. Note that some older parts will never have enough
10616          * bandwidth due to being older generation PCIe parts. We clamp these
10617          * parts to ensure no warning is displayed if it can't be fixed.
10618          */
10619         switch (hw->mac.type) {
10620         case ixgbe_mac_82598EB:
10621                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10622                 break;
10623         default:
10624                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10625                 break;
10626         }
10627
10628         /* don't check link if we failed to enumerate functions */
10629         if (expected_gts > 0)
10630                 ixgbe_check_minimum_link(adapter, expected_gts);
10631
10632         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10633         if (err)
10634                 strlcpy(part_str, "Unknown", sizeof(part_str));
10635         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10636                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10637                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10638                            part_str);
10639         else
10640                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10641                            hw->mac.type, hw->phy.type, part_str);
10642
10643         e_dev_info("%pM\n", netdev->dev_addr);
10644
10645         /* reset the hardware with the new settings */
10646         err = hw->mac.ops.start_hw(hw);
10647         if (err == IXGBE_ERR_EEPROM_VERSION) {
10648                 /* We are running on a pre-production device, log a warning */
10649                 e_dev_warn("This device is a pre-production adapter/LOM. "
10650                            "Please be aware there may be issues associated "
10651                            "with your hardware.  If you are experiencing "
10652                            "problems please contact your Intel or hardware "
10653                            "representative who provided you with this "
10654                            "hardware.\n");
10655         }
10656         strcpy(netdev->name, "eth%d");
10657         pci_set_drvdata(pdev, adapter);
10658         err = register_netdev(netdev);
10659         if (err)
10660                 goto err_register;
10661
10662
10663         /* power down the optics for 82599 SFP+ fiber */
10664         if (hw->mac.ops.disable_tx_laser)
10665                 hw->mac.ops.disable_tx_laser(hw);
10666
10667         /* carrier off reporting is important to ethtool even BEFORE open */
10668         netif_carrier_off(netdev);
10669
10670 #ifdef CONFIG_IXGBE_DCA
10671         if (dca_add_requester(&pdev->dev) == 0) {
10672                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10673                 ixgbe_setup_dca(adapter);
10674         }
10675 #endif
10676         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10677                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10678                 for (i = 0; i < adapter->num_vfs; i++)
10679                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10680         }
10681
10682         /* firmware requires driver version to be 0xFFFFFFFF
10683          * since os does not support feature
10684          */
10685         if (hw->mac.ops.set_fw_drv_ver)
10686                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10687                                            sizeof(ixgbe_driver_version) - 1,
10688                                            ixgbe_driver_version);
10689
10690         /* add san mac addr to netdev */
10691         ixgbe_add_sanmac_netdev(netdev);
10692
10693         e_dev_info("%s\n", ixgbe_default_device_descr);
10694
10695 #ifdef CONFIG_IXGBE_HWMON
10696         if (ixgbe_sysfs_init(adapter))
10697                 e_err(probe, "failed to allocate sysfs resources\n");
10698 #endif /* CONFIG_IXGBE_HWMON */
10699
10700         ixgbe_dbg_adapter_init(adapter);
10701
10702         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10703         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10704                 hw->mac.ops.setup_link(hw,
10705                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10706                         true);
10707
10708         return 0;
10709
10710 err_register:
10711         ixgbe_release_hw_control(adapter);
10712         ixgbe_clear_interrupt_scheme(adapter);
10713 err_sw_init:
10714         ixgbe_disable_sriov(adapter);
10715         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10716         iounmap(adapter->io_addr);
10717         kfree(adapter->jump_tables[0]);
10718         kfree(adapter->mac_table);
10719         kfree(adapter->rss_key);
10720 err_ioremap:
10721         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10722         free_netdev(netdev);
10723 err_alloc_etherdev:
10724         pci_release_mem_regions(pdev);
10725 err_pci_reg:
10726 err_dma:
10727         if (!adapter || disable_dev)
10728                 pci_disable_device(pdev);
10729         return err;
10730 }
10731
10732 /**
10733  * ixgbe_remove - Device Removal Routine
10734  * @pdev: PCI device information struct
10735  *
10736  * ixgbe_remove is called by the PCI subsystem to alert the driver
10737  * that it should release a PCI device.  The could be caused by a
10738  * Hot-Plug event, or because the driver is going to be removed from
10739  * memory.
10740  **/
10741 static void ixgbe_remove(struct pci_dev *pdev)
10742 {
10743         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10744         struct net_device *netdev;
10745         bool disable_dev;
10746         int i;
10747
10748         /* if !adapter then we already cleaned up in probe */
10749         if (!adapter)
10750                 return;
10751
10752         netdev  = adapter->netdev;
10753         ixgbe_dbg_adapter_exit(adapter);
10754
10755         set_bit(__IXGBE_REMOVING, &adapter->state);
10756         cancel_work_sync(&adapter->service_task);
10757
10758
10759 #ifdef CONFIG_IXGBE_DCA
10760         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10761                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10762                 dca_remove_requester(&pdev->dev);
10763                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10764                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10765         }
10766
10767 #endif
10768 #ifdef CONFIG_IXGBE_HWMON
10769         ixgbe_sysfs_exit(adapter);
10770 #endif /* CONFIG_IXGBE_HWMON */
10771
10772         /* remove the added san mac */
10773         ixgbe_del_sanmac_netdev(netdev);
10774
10775 #ifdef CONFIG_PCI_IOV
10776         ixgbe_disable_sriov(adapter);
10777 #endif
10778         if (netdev->reg_state == NETREG_REGISTERED)
10779                 unregister_netdev(netdev);
10780
10781         ixgbe_clear_interrupt_scheme(adapter);
10782
10783         ixgbe_release_hw_control(adapter);
10784
10785 #ifdef CONFIG_DCB
10786         kfree(adapter->ixgbe_ieee_pfc);
10787         kfree(adapter->ixgbe_ieee_ets);
10788
10789 #endif
10790         iounmap(adapter->io_addr);
10791         pci_release_mem_regions(pdev);
10792
10793         e_dev_info("complete\n");
10794
10795         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10796                 if (adapter->jump_tables[i]) {
10797                         kfree(adapter->jump_tables[i]->input);
10798                         kfree(adapter->jump_tables[i]->mask);
10799                 }
10800                 kfree(adapter->jump_tables[i]);
10801         }
10802
10803         kfree(adapter->mac_table);
10804         kfree(adapter->rss_key);
10805         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10806         free_netdev(netdev);
10807
10808         pci_disable_pcie_error_reporting(pdev);
10809
10810         if (disable_dev)
10811                 pci_disable_device(pdev);
10812 }
10813
10814 /**
10815  * ixgbe_io_error_detected - called when PCI error is detected
10816  * @pdev: Pointer to PCI device
10817  * @state: The current pci connection state
10818  *
10819  * This function is called after a PCI bus error affecting
10820  * this device has been detected.
10821  */
10822 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10823                                                 pci_channel_state_t state)
10824 {
10825         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10826         struct net_device *netdev = adapter->netdev;
10827
10828 #ifdef CONFIG_PCI_IOV
10829         struct ixgbe_hw *hw = &adapter->hw;
10830         struct pci_dev *bdev, *vfdev;
10831         u32 dw0, dw1, dw2, dw3;
10832         int vf, pos;
10833         u16 req_id, pf_func;
10834
10835         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10836             adapter->num_vfs == 0)
10837                 goto skip_bad_vf_detection;
10838
10839         bdev = pdev->bus->self;
10840         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10841                 bdev = bdev->bus->self;
10842
10843         if (!bdev)
10844                 goto skip_bad_vf_detection;
10845
10846         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10847         if (!pos)
10848                 goto skip_bad_vf_detection;
10849
10850         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10851         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10852         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10853         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10854         if (ixgbe_removed(hw->hw_addr))
10855                 goto skip_bad_vf_detection;
10856
10857         req_id = dw1 >> 16;
10858         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10859         if (!(req_id & 0x0080))
10860                 goto skip_bad_vf_detection;
10861
10862         pf_func = req_id & 0x01;
10863         if ((pf_func & 1) == (pdev->devfn & 1)) {
10864                 unsigned int device_id;
10865
10866                 vf = (req_id & 0x7F) >> 1;
10867                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10868                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10869                                 "%8.8x\tdw3: %8.8x\n",
10870                 dw0, dw1, dw2, dw3);
10871                 switch (adapter->hw.mac.type) {
10872                 case ixgbe_mac_82599EB:
10873                         device_id = IXGBE_82599_VF_DEVICE_ID;
10874                         break;
10875                 case ixgbe_mac_X540:
10876                         device_id = IXGBE_X540_VF_DEVICE_ID;
10877                         break;
10878                 case ixgbe_mac_X550:
10879                         device_id = IXGBE_DEV_ID_X550_VF;
10880                         break;
10881                 case ixgbe_mac_X550EM_x:
10882                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10883                         break;
10884                 case ixgbe_mac_x550em_a:
10885                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10886                         break;
10887                 default:
10888                         device_id = 0;
10889                         break;
10890                 }
10891
10892                 /* Find the pci device of the offending VF */
10893                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10894                 while (vfdev) {
10895                         if (vfdev->devfn == (req_id & 0xFF))
10896                                 break;
10897                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10898                                                device_id, vfdev);
10899                 }
10900                 /*
10901                  * There's a slim chance the VF could have been hot plugged,
10902                  * so if it is no longer present we don't need to issue the
10903                  * VFLR.  Just clean up the AER in that case.
10904                  */
10905                 if (vfdev) {
10906                         pcie_flr(vfdev);
10907                         /* Free device reference count */
10908                         pci_dev_put(vfdev);
10909                 }
10910
10911                 pci_cleanup_aer_uncorrect_error_status(pdev);
10912         }
10913
10914         /*
10915          * Even though the error may have occurred on the other port
10916          * we still need to increment the vf error reference count for
10917          * both ports because the I/O resume function will be called
10918          * for both of them.
10919          */
10920         adapter->vferr_refcount++;
10921
10922         return PCI_ERS_RESULT_RECOVERED;
10923
10924 skip_bad_vf_detection:
10925 #endif /* CONFIG_PCI_IOV */
10926         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10927                 return PCI_ERS_RESULT_DISCONNECT;
10928
10929         if (!netif_device_present(netdev))
10930                 return PCI_ERS_RESULT_DISCONNECT;
10931
10932         rtnl_lock();
10933         netif_device_detach(netdev);
10934
10935         if (state == pci_channel_io_perm_failure) {
10936                 rtnl_unlock();
10937                 return PCI_ERS_RESULT_DISCONNECT;
10938         }
10939
10940         if (netif_running(netdev))
10941                 ixgbe_close_suspend(adapter);
10942
10943         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10944                 pci_disable_device(pdev);
10945         rtnl_unlock();
10946
10947         /* Request a slot reset. */
10948         return PCI_ERS_RESULT_NEED_RESET;
10949 }
10950
10951 /**
10952  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10953  * @pdev: Pointer to PCI device
10954  *
10955  * Restart the card from scratch, as if from a cold-boot.
10956  */
10957 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10958 {
10959         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10960         pci_ers_result_t result;
10961         int err;
10962
10963         if (pci_enable_device_mem(pdev)) {
10964                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10965                 result = PCI_ERS_RESULT_DISCONNECT;
10966         } else {
10967                 smp_mb__before_atomic();
10968                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10969                 adapter->hw.hw_addr = adapter->io_addr;
10970                 pci_set_master(pdev);
10971                 pci_restore_state(pdev);
10972                 pci_save_state(pdev);
10973
10974                 pci_wake_from_d3(pdev, false);
10975
10976                 ixgbe_reset(adapter);
10977                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10978                 result = PCI_ERS_RESULT_RECOVERED;
10979         }
10980
10981         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10982         if (err) {
10983                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10984                           "failed 0x%0x\n", err);
10985                 /* non-fatal, continue */
10986         }
10987
10988         return result;
10989 }
10990
10991 /**
10992  * ixgbe_io_resume - called when traffic can start flowing again.
10993  * @pdev: Pointer to PCI device
10994  *
10995  * This callback is called when the error recovery driver tells us that
10996  * its OK to resume normal operation.
10997  */
10998 static void ixgbe_io_resume(struct pci_dev *pdev)
10999 {
11000         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11001         struct net_device *netdev = adapter->netdev;
11002
11003 #ifdef CONFIG_PCI_IOV
11004         if (adapter->vferr_refcount) {
11005                 e_info(drv, "Resuming after VF err\n");
11006                 adapter->vferr_refcount--;
11007                 return;
11008         }
11009
11010 #endif
11011         rtnl_lock();
11012         if (netif_running(netdev))
11013                 ixgbe_open(netdev);
11014
11015         netif_device_attach(netdev);
11016         rtnl_unlock();
11017 }
11018
11019 static const struct pci_error_handlers ixgbe_err_handler = {
11020         .error_detected = ixgbe_io_error_detected,
11021         .slot_reset = ixgbe_io_slot_reset,
11022         .resume = ixgbe_io_resume,
11023 };
11024
11025 static struct pci_driver ixgbe_driver = {
11026         .name     = ixgbe_driver_name,
11027         .id_table = ixgbe_pci_tbl,
11028         .probe    = ixgbe_probe,
11029         .remove   = ixgbe_remove,
11030 #ifdef CONFIG_PM
11031         .suspend  = ixgbe_suspend,
11032         .resume   = ixgbe_resume,
11033 #endif
11034         .shutdown = ixgbe_shutdown,
11035         .sriov_configure = ixgbe_pci_sriov_configure,
11036         .err_handler = &ixgbe_err_handler
11037 };
11038
11039 /**
11040  * ixgbe_init_module - Driver Registration Routine
11041  *
11042  * ixgbe_init_module is the first routine called when the driver is
11043  * loaded. All it does is register with the PCI subsystem.
11044  **/
11045 static int __init ixgbe_init_module(void)
11046 {
11047         int ret;
11048         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11049         pr_info("%s\n", ixgbe_copyright);
11050
11051         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11052         if (!ixgbe_wq) {
11053                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11054                 return -ENOMEM;
11055         }
11056
11057         ixgbe_dbg_init();
11058
11059         ret = pci_register_driver(&ixgbe_driver);
11060         if (ret) {
11061                 destroy_workqueue(ixgbe_wq);
11062                 ixgbe_dbg_exit();
11063                 return ret;
11064         }
11065
11066 #ifdef CONFIG_IXGBE_DCA
11067         dca_register_notify(&dca_notifier);
11068 #endif
11069
11070         return 0;
11071 }
11072
11073 module_init(ixgbe_init_module);
11074
11075 /**
11076  * ixgbe_exit_module - Driver Exit Cleanup Routine
11077  *
11078  * ixgbe_exit_module is called just before the driver is removed
11079  * from memory.
11080  **/
11081 static void __exit ixgbe_exit_module(void)
11082 {
11083 #ifdef CONFIG_IXGBE_DCA
11084         dca_unregister_notify(&dca_notifier);
11085 #endif
11086         pci_unregister_driver(&ixgbe_driver);
11087
11088         ixgbe_dbg_exit();
11089         if (ixgbe_wq) {
11090                 destroy_workqueue(ixgbe_wq);
11091                 ixgbe_wq = NULL;
11092         }
11093 }
11094
11095 #ifdef CONFIG_IXGBE_DCA
11096 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11097                             void *p)
11098 {
11099         int ret_val;
11100
11101         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11102                                          __ixgbe_notify_dca);
11103
11104         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11105 }
11106
11107 #endif /* CONFIG_IXGBE_DCA */
11108
11109 module_exit(ixgbe_exit_module);
11110
11111 /* ixgbe_main.c */