drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/bpf.h>
  53 #include <linux/bpf_trace.h>
  54 #include <linux/atomic.h>
  55 #include <scsi/fc/fc_fcoe.h>
  56 #include <net/udp_tunnel.h>
  57 #include <net/pkt_cls.h>
  58 #include <net/tc_act/tc_gact.h>
  59 #include <net/tc_act/tc_mirred.h>
  60 #include <net/vxlan.h>
  61 #include <net/mpls.h>
  62
  63 #include "ixgbe.h"
  64 #include "ixgbe_common.h"
  65 #include "ixgbe_dcb_82599.h"
  66 #include "ixgbe_sriov.h"
  67 #include "ixgbe_model.h"
  68
  69 char ixgbe_driver_name[] = "ixgbe";
  70 static const char ixgbe_driver_string[] =
  71                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  72 #ifdef IXGBE_FCOE
  73 char ixgbe_default_device_descr[] =
  74                               "Intel(R) 10 Gigabit Network Connection";
  75 #else
  76 static char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #endif
  79 #define DRV_VERSION "5.1.0-k"
  80 const char ixgbe_driver_version[] = DRV_VERSION;
  81 static const char ixgbe_copyright[] =
  82                                 "Copyright (c) 1999-2016 Intel Corporation.";
  83
  84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  85
  86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  87         [board_82598]           = &ixgbe_82598_info,
  88         [board_82599]           = &ixgbe_82599_info,
  89         [board_X540]            = &ixgbe_X540_info,
  90         [board_X550]            = &ixgbe_X550_info,
  91         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  92         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  93         [board_x550em_a]        = &ixgbe_x550em_a_info,
  94         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 146         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 147         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 148         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 149         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 150         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 151         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 152         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 153         /* required last entry */
 154         {0, }
 155 };
 156 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 157
 158 #ifdef CONFIG_IXGBE_DCA
 159 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 160                             void *p);
 161 static struct notifier_block dca_notifier = {
 162         .notifier_call = ixgbe_notify_dca,
 163         .next          = NULL,
 164         .priority      = 0
 165 };
 166 #endif
 167
 168 #ifdef CONFIG_PCI_IOV
 169 static unsigned int max_vfs;
 170 module_param(max_vfs, uint, 0);
 171 MODULE_PARM_DESC(max_vfs,
 172                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 173 #endif /* CONFIG_PCI_IOV */
 174
 175 static unsigned int allow_unsupported_sfp;
 176 module_param(allow_unsupported_sfp, uint, 0);
 177 MODULE_PARM_DESC(allow_unsupported_sfp,
 178                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 179
 180 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 181 static int debug = -1;
 182 module_param(debug, int, 0);
 183 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 184
 185 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 186 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 187 MODULE_LICENSE("GPL");
 188 MODULE_VERSION(DRV_VERSION);
 189
 190 static struct workqueue_struct *ixgbe_wq;
 191
 192 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 193 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 194
 195 static const struct net_device_ops ixgbe_netdev_ops;
 196
 197 static bool netif_is_ixgbe(struct net_device *dev)
 198 {
 199         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 200 }
 201
 202 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 203                                           u32 reg, u16 *value)
 204 {
 205         struct pci_dev *parent_dev;
 206         struct pci_bus *parent_bus;
 207
 208         parent_bus = adapter->pdev->bus->parent;
 209         if (!parent_bus)
 210                 return -1;
 211
 212         parent_dev = parent_bus->self;
 213         if (!parent_dev)
 214                 return -1;
 215
 216         if (!pci_is_pcie(parent_dev))
 217                 return -1;
 218
 219         pcie_capability_read_word(parent_dev, reg, value);
 220         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 221             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 222                 return -1;
 223         return 0;
 224 }
 225
 226 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 227 {
 228         struct ixgbe_hw *hw = &adapter->hw;
 229         u16 link_status = 0;
 230         int err;
 231
 232         hw->bus.type = ixgbe_bus_type_pci_express;
 233
 234         /* Get the negotiated link width and speed from PCI config space of the
 235          * parent, as this device is behind a switch
 236          */
 237         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 238
 239         /* assume caller will handle error case */
 240         if (err)
 241                 return err;
 242
 243         hw->bus.width = ixgbe_convert_bus_width(link_status);
 244         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 245
 246         return 0;
 247 }
 248
 249 /**
 250  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 251  * @hw: hw specific details
 252  *
 253  * This function is used by probe to determine whether a device's PCI-Express
 254  * bandwidth details should be gathered from the parent bus instead of from the
 255  * device. Used to ensure that various locations all have the correct device ID
 256  * checks.
 257  */
 258 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 259 {
 260         switch (hw->device_id) {
 261         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 262         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 263                 return true;
 264         default:
 265                 return false;
 266         }
 267 }
 268
 269 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 270                                      int expected_gts)
 271 {
 272         struct ixgbe_hw *hw = &adapter->hw;
 273         int max_gts = 0;
 274         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 275         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 276         struct pci_dev *pdev;
 277
 278         /* Some devices are not connected over PCIe and thus do not negotiate
 279          * speed. These devices do not have valid bus info, and thus any report
 280          * we generate may not be correct.
 281          */
 282         if (hw->bus.type == ixgbe_bus_type_internal)
 283                 return;
 284
 285         /* determine whether to use the parent device */
 286         if (ixgbe_pcie_from_parent(&adapter->hw))
 287                 pdev = adapter->pdev->bus->parent->self;
 288         else
 289                 pdev = adapter->pdev;
 290
 291         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 292             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 293                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 294                 return;
 295         }
 296
 297         switch (speed) {
 298         case PCIE_SPEED_2_5GT:
 299                 /* 8b/10b encoding reduces max throughput by 20% */
 300                 max_gts = 2 * width;
 301                 break;
 302         case PCIE_SPEED_5_0GT:
 303                 /* 8b/10b encoding reduces max throughput by 20% */
 304                 max_gts = 4 * width;
 305                 break;
 306         case PCIE_SPEED_8_0GT:
 307                 /* 128b/130b encoding reduces throughput by less than 2% */
 308                 max_gts = 8 * width;
 309                 break;
 310         default:
 311                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 312                 return;
 313         }
 314
 315         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 316                    max_gts);
 317         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 318                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 319                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 320                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 321                     "Unknown"),
 322                    width,
 323                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 324                     speed == PCIE_SPEED_5_0GT ? "20%" :
 325                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 326                     "Unknown"));
 327
 328         if (max_gts < expected_gts) {
 329                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 330                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 331                         expected_gts);
 332                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 333         }
 334 }
 335
 336 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 337 {
 338         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 339             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 340             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 341                 queue_work(ixgbe_wq, &adapter->service_task);
 342 }
 343
 344 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 345 {
 346         struct ixgbe_adapter *adapter = hw->back;
 347
 348         if (!hw->hw_addr)
 349                 return;
 350         hw->hw_addr = NULL;
 351         e_dev_err("Adapter removed\n");
 352         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 353                 ixgbe_service_event_schedule(adapter);
 354 }
 355
 356 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 357 {
 358         u32 value;
 359
 360         /* The following check not only optimizes a bit by not
 361          * performing a read on the status register when the
 362          * register just read was a status register read that
 363          * returned IXGBE_FAILED_READ_REG. It also blocks any
 364          * potential recursion.
 365          */
 366         if (reg == IXGBE_STATUS) {
 367                 ixgbe_remove_adapter(hw);
 368                 return;
 369         }
 370         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 371         if (value == IXGBE_FAILED_READ_REG)
 372                 ixgbe_remove_adapter(hw);
 373 }
 374
 375 /**
 376  * ixgbe_read_reg - Read from device register
 377  * @hw: hw specific details
 378  * @reg: offset of register to read
 379  *
 380  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 381  *
 382  * This function is used to read device registers. It checks for device
 383  * removal by confirming any read that returns all ones by checking the
 384  * status register value for all ones. This function avoids reading from
 385  * the hardware if a removal was previously detected in which case it
 386  * returns IXGBE_FAILED_READ_REG (all ones).
 387  */
 388 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 389 {
 390         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 391         u32 value;
 392
 393         if (ixgbe_removed(reg_addr))
 394                 return IXGBE_FAILED_READ_REG;
 395         if (unlikely(hw->phy.nw_mng_if_sel &
 396                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 397                 struct ixgbe_adapter *adapter;
 398                 int i;
 399
 400                 for (i = 0; i < 200; ++i) {
 401                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 402                         if (likely(!value))
 403                                 goto writes_completed;
 404                         if (value == IXGBE_FAILED_READ_REG) {
 405                                 ixgbe_remove_adapter(hw);
 406                                 return IXGBE_FAILED_READ_REG;
 407                         }
 408                         udelay(5);
 409                 }
 410
 411                 adapter = hw->back;
 412                 e_warn(hw, "register writes incomplete %08x\n", value);
 413         }
 414
 415 writes_completed:
 416         value = readl(reg_addr + reg);
 417         if (unlikely(value == IXGBE_FAILED_READ_REG))
 418                 ixgbe_check_remove(hw, reg);
 419         return value;
 420 }
 421
 422 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 423 {
 424         u16 value;
 425
 426         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 427         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 428                 ixgbe_remove_adapter(hw);
 429                 return true;
 430         }
 431         return false;
 432 }
 433
 434 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 435 {
 436         struct ixgbe_adapter *adapter = hw->back;
 437         u16 value;
 438
 439         if (ixgbe_removed(hw->hw_addr))
 440                 return IXGBE_FAILED_READ_CFG_WORD;
 441         pci_read_config_word(adapter->pdev, reg, &value);
 442         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 443             ixgbe_check_cfg_remove(hw, adapter->pdev))
 444                 return IXGBE_FAILED_READ_CFG_WORD;
 445         return value;
 446 }
 447
 448 #ifdef CONFIG_PCI_IOV
 449 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 450 {
 451         struct ixgbe_adapter *adapter = hw->back;
 452         u32 value;
 453
 454         if (ixgbe_removed(hw->hw_addr))
 455                 return IXGBE_FAILED_READ_CFG_DWORD;
 456         pci_read_config_dword(adapter->pdev, reg, &value);
 457         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 458             ixgbe_check_cfg_remove(hw, adapter->pdev))
 459                 return IXGBE_FAILED_READ_CFG_DWORD;
 460         return value;
 461 }
 462 #endif /* CONFIG_PCI_IOV */
 463
 464 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 465 {
 466         struct ixgbe_adapter *adapter = hw->back;
 467
 468         if (ixgbe_removed(hw->hw_addr))
 469                 return;
 470         pci_write_config_word(adapter->pdev, reg, value);
 471 }
 472
 473 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 474 {
 475         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 476
 477         /* flush memory to make sure state is correct before next watchdog */
 478         smp_mb__before_atomic();
 479         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 480 }
 481
 482 struct ixgbe_reg_info {
 483         u32 ofs;
 484         char *name;
 485 };
 486
 487 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 488
 489         /* General Registers */
 490         {IXGBE_CTRL, "CTRL"},
 491         {IXGBE_STATUS, "STATUS"},
 492         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 493
 494         /* Interrupt Registers */
 495         {IXGBE_EICR, "EICR"},
 496
 497         /* RX Registers */
 498         {IXGBE_SRRCTL(0), "SRRCTL"},
 499         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 500         {IXGBE_RDLEN(0), "RDLEN"},
 501         {IXGBE_RDH(0), "RDH"},
 502         {IXGBE_RDT(0), "RDT"},
 503         {IXGBE_RXDCTL(0), "RXDCTL"},
 504         {IXGBE_RDBAL(0), "RDBAL"},
 505         {IXGBE_RDBAH(0), "RDBAH"},
 506
 507         /* TX Registers */
 508         {IXGBE_TDBAL(0), "TDBAL"},
 509         {IXGBE_TDBAH(0), "TDBAH"},
 510         {IXGBE_TDLEN(0), "TDLEN"},
 511         {IXGBE_TDH(0), "TDH"},
 512         {IXGBE_TDT(0), "TDT"},
 513         {IXGBE_TXDCTL(0), "TXDCTL"},
 514
 515         /* List Terminator */
 516         { .name = NULL }
 517 };
 518
 519
 520 /*
 521  * ixgbe_regdump - register printout routine
 522  */
 523 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 524 {
 525         int i;
 526         char rname[16];
 527         u32 regs[64];
 528
 529         switch (reginfo->ofs) {
 530         case IXGBE_SRRCTL(0):
 531                 for (i = 0; i < 64; i++)
 532                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 533                 break;
 534         case IXGBE_DCA_RXCTRL(0):
 535                 for (i = 0; i < 64; i++)
 536                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 537                 break;
 538         case IXGBE_RDLEN(0):
 539                 for (i = 0; i < 64; i++)
 540                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 541                 break;
 542         case IXGBE_RDH(0):
 543                 for (i = 0; i < 64; i++)
 544                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 545                 break;
 546         case IXGBE_RDT(0):
 547                 for (i = 0; i < 64; i++)
 548                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 549                 break;
 550         case IXGBE_RXDCTL(0):
 551                 for (i = 0; i < 64; i++)
 552                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 553                 break;
 554         case IXGBE_RDBAL(0):
 555                 for (i = 0; i < 64; i++)
 556                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 557                 break;
 558         case IXGBE_RDBAH(0):
 559                 for (i = 0; i < 64; i++)
 560                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 561                 break;
 562         case IXGBE_TDBAL(0):
 563                 for (i = 0; i < 64; i++)
 564                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 565                 break;
 566         case IXGBE_TDBAH(0):
 567                 for (i = 0; i < 64; i++)
 568                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 569                 break;
 570         case IXGBE_TDLEN(0):
 571                 for (i = 0; i < 64; i++)
 572                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 573                 break;
 574         case IXGBE_TDH(0):
 575                 for (i = 0; i < 64; i++)
 576                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 577                 break;
 578         case IXGBE_TDT(0):
 579                 for (i = 0; i < 64; i++)
 580                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 581                 break;
 582         case IXGBE_TXDCTL(0):
 583                 for (i = 0; i < 64; i++)
 584                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 585                 break;
 586         default:
 587                 pr_info("%-15s %08x\n",
 588                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 589                 return;
 590         }
 591
 592         i = 0;
 593         while (i < 64) {
 594                 int j;
 595                 char buf[9 * 8 + 1];
 596                 char *p = buf;
 597
 598                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 599                 for (j = 0; j < 8; j++)
 600                         p += sprintf(p, " %08x", regs[i++]);
 601                 pr_err("%-15s%s\n", rname, buf);
 602         }
 603
 604 }
 605
 606 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 607 {
 608         struct ixgbe_tx_buffer *tx_buffer;
 609
 610         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 611         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 612                 n, ring->next_to_use, ring->next_to_clean,
 613                 (u64)dma_unmap_addr(tx_buffer, dma),
 614                 dma_unmap_len(tx_buffer, len),
 615                 tx_buffer->next_to_watch,
 616                 (u64)tx_buffer->time_stamp);
 617 }
 618
 619 /*
 620  * ixgbe_dump - Print registers, tx-rings and rx-rings
 621  */
 622 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 623 {
 624         struct net_device *netdev = adapter->netdev;
 625         struct ixgbe_hw *hw = &adapter->hw;
 626         struct ixgbe_reg_info *reginfo;
 627         int n = 0;
 628         struct ixgbe_ring *ring;
 629         struct ixgbe_tx_buffer *tx_buffer;
 630         union ixgbe_adv_tx_desc *tx_desc;
 631         struct my_u0 { u64 a; u64 b; } *u0;
 632         struct ixgbe_ring *rx_ring;
 633         union ixgbe_adv_rx_desc *rx_desc;
 634         struct ixgbe_rx_buffer *rx_buffer_info;
 635         int i = 0;
 636
 637         if (!netif_msg_hw(adapter))
 638                 return;
 639
 640         /* Print netdevice Info */
 641         if (netdev) {
 642                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 643                 pr_info("Device Name     state            "
 644                         "trans_start\n");
 645                 pr_info("%-15s %016lX %016lX\n",
 646                         netdev->name,
 647                         netdev->state,
 648                         dev_trans_start(netdev));
 649         }
 650
 651         /* Print Registers */
 652         dev_info(&adapter->pdev->dev, "Register Dump\n");
 653         pr_info(" Register Name   Value\n");
 654         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 655              reginfo->name; reginfo++) {
 656                 ixgbe_regdump(hw, reginfo);
 657         }
 658
 659         /* Print TX Ring Summary */
 660         if (!netdev || !netif_running(netdev))
 661                 return;
 662
 663         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 664         pr_info(" %s     %s              %s        %s\n",
 665                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 666                 "leng", "ntw", "timestamp");
 667         for (n = 0; n < adapter->num_tx_queues; n++) {
 668                 ring = adapter->tx_ring[n];
 669                 ixgbe_print_buffer(ring, n);
 670         }
 671
 672         for (n = 0; n < adapter->num_xdp_queues; n++) {
 673                 ring = adapter->xdp_ring[n];
 674                 ixgbe_print_buffer(ring, n);
 675         }
 676
 677         /* Print TX Rings */
 678         if (!netif_msg_tx_done(adapter))
 679                 goto rx_ring_summary;
 680
 681         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 682
 683         /* Transmit Descriptor Formats
 684          *
 685          * 82598 Advanced Transmit Descriptor
 686          *   +--------------------------------------------------------------+
 687          * 0 |         Buffer Address [63:0]                                |
 688          *   +--------------------------------------------------------------+
 689          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 690          *   +--------------------------------------------------------------+
 691          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 692          *
 693          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 694          *   +--------------------------------------------------------------+
 695          * 0 |                          RSV [63:0]                          |
 696          *   +--------------------------------------------------------------+
 697          * 8 |            RSV           |  STA  |          NXTSEQ           |
 698          *   +--------------------------------------------------------------+
 699          *   63                       36 35   32 31                         0
 700          *
 701          * 82599+ Advanced Transmit Descriptor
 702          *   +--------------------------------------------------------------+
 703          * 0 |         Buffer Address [63:0]                                |
 704          *   +--------------------------------------------------------------+
 705          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 706          *   +--------------------------------------------------------------+
 707          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 708          *
 709          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 710          *   +--------------------------------------------------------------+
 711          * 0 |                          RSV [63:0]                          |
 712          *   +--------------------------------------------------------------+
 713          * 8 |            RSV           |  STA  |           RSV             |
 714          *   +--------------------------------------------------------------+
 715          *   63                       36 35   32 31                         0
 716          */
 717
 718         for (n = 0; n < adapter->num_tx_queues; n++) {
 719                 ring = adapter->tx_ring[n];
 720                 pr_info("------------------------------------\n");
 721                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 722                 pr_info("------------------------------------\n");
 723                 pr_info("%s%s    %s              %s        %s          %s\n",
 724                         "T [desc]     [address 63:0  ] ",
 725                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 726                         "leng", "ntw", "timestamp", "bi->skb");
 727
 728                 for (i = 0; ring->desc && (i < ring->count); i++) {
 729                         tx_desc = IXGBE_TX_DESC(ring, i);
 730                         tx_buffer = &ring->tx_buffer_info[i];
 731                         u0 = (struct my_u0 *)tx_desc;
 732                         if (dma_unmap_len(tx_buffer, len) > 0) {
 733                                 const char *ring_desc;
 734
 735                                 if (i == ring->next_to_use &&
 736                                     i == ring->next_to_clean)
 737                                         ring_desc = " NTC/U";
 738                                 else if (i == ring->next_to_use)
 739                                         ring_desc = " NTU";
 740                                 else if (i == ring->next_to_clean)
 741                                         ring_desc = " NTC";
 742                                 else
 743                                         ring_desc = "";
 744                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 745                                         i,
 746                                         le64_to_cpu(u0->a),
 747                                         le64_to_cpu(u0->b),
 748                                         (u64)dma_unmap_addr(tx_buffer, dma),
 749                                         dma_unmap_len(tx_buffer, len),
 750                                         tx_buffer->next_to_watch,
 751                                         (u64)tx_buffer->time_stamp,
 752                                         tx_buffer->skb,
 753                                         ring_desc);
 754
 755                                 if (netif_msg_pktdata(adapter) &&
 756                                     tx_buffer->skb)
 757                                         print_hex_dump(KERN_INFO, "",
 758                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 759                                                 tx_buffer->skb->data,
 760                                                 dma_unmap_len(tx_buffer, len),
 761                                                 true);
 762                         }
 763                 }
 764         }
 765
 766         /* Print RX Rings Summary */
 767 rx_ring_summary:
 768         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 769         pr_info("Queue [NTU] [NTC]\n");
 770         for (n = 0; n < adapter->num_rx_queues; n++) {
 771                 rx_ring = adapter->rx_ring[n];
 772                 pr_info("%5d %5X %5X\n",
 773                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 774         }
 775
 776         /* Print RX Rings */
 777         if (!netif_msg_rx_status(adapter))
 778                 return;
 779
 780         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 781
 782         /* Receive Descriptor Formats
 783          *
 784          * 82598 Advanced Receive Descriptor (Read) Format
 785          *    63                                           1        0
 786          *    +-----------------------------------------------------+
 787          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 788          *    +----------------------------------------------+------+
 789          *  8 |       Header Buffer Address [63:1]           |  DD  |
 790          *    +-----------------------------------------------------+
 791          *
 792          *
 793          * 82598 Advanced Receive Descriptor (Write-Back) Format
 794          *
 795          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 796          *   +------------------------------------------------------+
 797          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 798          *   | Packet   | IP     |   |          |     | Type | Type |
 799          *   | Checksum | Ident  |   |          |     |      |      |
 800          *   +------------------------------------------------------+
 801          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 802          *   +------------------------------------------------------+
 803          *   63       48 47    32 31            20 19               0
 804          *
 805          * 82599+ Advanced Receive Descriptor (Read) Format
 806          *    63                                           1        0
 807          *    +-----------------------------------------------------+
 808          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 809          *    +----------------------------------------------+------+
 810          *  8 |       Header Buffer Address [63:1]           |  DD  |
 811          *    +-----------------------------------------------------+
 812          *
 813          *
 814          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 815          *
 816          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 817          *   +------------------------------------------------------+
 818          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 819          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 820          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 821          *   +------------------------------------------------------+
 822          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 823          *   +------------------------------------------------------+
 824          *   63       48 47    32 31          20 19                 0
 825          */
 826
 827         for (n = 0; n < adapter->num_rx_queues; n++) {
 828                 rx_ring = adapter->rx_ring[n];
 829                 pr_info("------------------------------------\n");
 830                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 831                 pr_info("------------------------------------\n");
 832                 pr_info("%s%s%s\n",
 833                         "R  [desc]      [ PktBuf     A0] ",
 834                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 835                         "<-- Adv Rx Read format");
 836                 pr_info("%s%s%s\n",
 837                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 838                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 839                         "<-- Adv Rx Write-Back format");
 840
 841                 for (i = 0; i < rx_ring->count; i++) {
 842                         const char *ring_desc;
 843
 844                         if (i == rx_ring->next_to_use)
 845                                 ring_desc = " NTU";
 846                         else if (i == rx_ring->next_to_clean)
 847                                 ring_desc = " NTC";
 848                         else
 849                                 ring_desc = "";
 850
 851                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 852                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 853                         u0 = (struct my_u0 *)rx_desc;
 854                         if (rx_desc->wb.upper.length) {
 855                                 /* Descriptor Done */
 856                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 857                                         i,
 858                                         le64_to_cpu(u0->a),
 859                                         le64_to_cpu(u0->b),
 860                                         rx_buffer_info->skb,
 861                                         ring_desc);
 862                         } else {
 863                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 864                                         i,
 865                                         le64_to_cpu(u0->a),
 866                                         le64_to_cpu(u0->b),
 867                                         (u64)rx_buffer_info->dma,
 868                                         rx_buffer_info->skb,
 869                                         ring_desc);
 870
 871                                 if (netif_msg_pktdata(adapter) &&
 872                                     rx_buffer_info->dma) {
 873                                         print_hex_dump(KERN_INFO, "",
 874                                            DUMP_PREFIX_ADDRESS, 16, 1,
 875                                            page_address(rx_buffer_info->page) +
 876                                                     rx_buffer_info->page_offset,
 877                                            ixgbe_rx_bufsz(rx_ring), true);
 878                                 }
 879                         }
 880                 }
 881         }
 882 }
 883
 884 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 885 {
 886         u32 ctrl_ext;
 887
 888         /* Let firmware take over control of h/w */
 889         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 890         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 891                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 892 }
 893
 894 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 895 {
 896         u32 ctrl_ext;
 897
 898         /* Let firmware know the driver has taken over */
 899         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 900         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 901                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 902 }
 903
 904 /**
 905  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 906  * @adapter: pointer to adapter struct
 907  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 908  * @queue: queue to map the corresponding interrupt to
 909  * @msix_vector: the vector to map to the corresponding queue
 910  *
 911  */
 912 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 913                            u8 queue, u8 msix_vector)
 914 {
 915         u32 ivar, index;
 916         struct ixgbe_hw *hw = &adapter->hw;
 917         switch (hw->mac.type) {
 918         case ixgbe_mac_82598EB:
 919                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 920                 if (direction == -1)
 921                         direction = 0;
 922                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 923                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 924                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 925                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 926                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 927                 break;
 928         case ixgbe_mac_82599EB:
 929         case ixgbe_mac_X540:
 930         case ixgbe_mac_X550:
 931         case ixgbe_mac_X550EM_x:
 932         case ixgbe_mac_x550em_a:
 933                 if (direction == -1) {
 934                         /* other causes */
 935                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 936                         index = ((queue & 1) * 8);
 937                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 938                         ivar &= ~(0xFF << index);
 939                         ivar |= (msix_vector << index);
 940                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 941                         break;
 942                 } else {
 943                         /* tx or rx causes */
 944                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 945                         index = ((16 * (queue & 1)) + (8 * direction));
 946                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 947                         ivar &= ~(0xFF << index);
 948                         ivar |= (msix_vector << index);
 949                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 950                         break;
 951                 }
 952         default:
 953                 break;
 954         }
 955 }
 956
 957 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 958                                           u64 qmask)
 959 {
 960         u32 mask;
 961
 962         switch (adapter->hw.mac.type) {
 963         case ixgbe_mac_82598EB:
 964                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 965                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 966                 break;
 967         case ixgbe_mac_82599EB:
 968         case ixgbe_mac_X540:
 969         case ixgbe_mac_X550:
 970         case ixgbe_mac_X550EM_x:
 971         case ixgbe_mac_x550em_a:
 972                 mask = (qmask & 0xFFFFFFFF);
 973                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 974                 mask = (qmask >> 32);
 975                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 976                 break;
 977         default:
 978                 break;
 979         }
 980 }
 981
 982 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 983 {
 984         struct ixgbe_hw *hw = &adapter->hw;
 985         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 986         int i;
 987         u32 data;
 988
 989         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 990             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 991                 return;
 992
 993         switch (hw->mac.type) {
 994         case ixgbe_mac_82598EB:
 995                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 996                 break;
 997         default:
 998                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 999         }
1000         hwstats->lxoffrxc += data;
1001
1002         /* refill credits (no tx hang) if we received xoff */
1003         if (!data)
1004                 return;
1005
1006         for (i = 0; i < adapter->num_tx_queues; i++)
1007                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1008                           &adapter->tx_ring[i]->state);
1009
1010         for (i = 0; i < adapter->num_xdp_queues; i++)
1011                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1012                           &adapter->xdp_ring[i]->state);
1013 }
1014
1015 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1016 {
1017         struct ixgbe_hw *hw = &adapter->hw;
1018         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1019         u32 xoff[8] = {0};
1020         u8 tc;
1021         int i;
1022         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1023
1024         if (adapter->ixgbe_ieee_pfc)
1025                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1026
1027         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1028                 ixgbe_update_xoff_rx_lfc(adapter);
1029                 return;
1030         }
1031
1032         /* update stats for each tc, only valid with PFC enabled */
1033         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1034                 u32 pxoffrxc;
1035
1036                 switch (hw->mac.type) {
1037                 case ixgbe_mac_82598EB:
1038                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1039                         break;
1040                 default:
1041                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1042                 }
1043                 hwstats->pxoffrxc[i] += pxoffrxc;
1044                 /* Get the TC for given UP */
1045                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1046                 xoff[tc] += pxoffrxc;
1047         }
1048
1049         /* disarm tx queues that have received xoff frames */
1050         for (i = 0; i < adapter->num_tx_queues; i++) {
1051                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1052
1053                 tc = tx_ring->dcb_tc;
1054                 if (xoff[tc])
1055                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1056         }
1057
1058         for (i = 0; i < adapter->num_xdp_queues; i++) {
1059                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1060
1061                 tc = xdp_ring->dcb_tc;
1062                 if (xoff[tc])
1063                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1064         }
1065 }
1066
1067 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1068 {
1069         return ring->stats.packets;
1070 }
1071
1072 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1073 {
1074         unsigned int head, tail;
1075
1076         head = ring->next_to_clean;
1077         tail = ring->next_to_use;
1078
1079         return ((head <= tail) ? tail : tail + ring->count) - head;
1080 }
1081
1082 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1083 {
1084         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1085         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1086         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1087
1088         clear_check_for_tx_hang(tx_ring);
1089
1090         /*
1091          * Check for a hung queue, but be thorough. This verifies
1092          * that a transmit has been completed since the previous
1093          * check AND there is at least one packet pending. The
1094          * ARMED bit is set to indicate a potential hang. The
1095          * bit is cleared if a pause frame is received to remove
1096          * false hang detection due to PFC or 802.3x frames. By
1097          * requiring this to fail twice we avoid races with
1098          * pfc clearing the ARMED bit and conditions where we
1099          * run the check_tx_hang logic with a transmit completion
1100          * pending but without time to complete it yet.
1101          */
1102         if (tx_done_old == tx_done && tx_pending)
1103                 /* make sure it is true for two checks in a row */
1104                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1105                                         &tx_ring->state);
1106         /* update completed stats and continue */
1107         tx_ring->tx_stats.tx_done_old = tx_done;
1108         /* reset the countdown */
1109         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1110
1111         return false;
1112 }
1113
1114 /**
1115  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1116  * @adapter: driver private struct
1117  **/
1118 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1119 {
1120
1121         /* Do the reset outside of interrupt context */
1122         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1123                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1124                 e_warn(drv, "initiating reset due to tx timeout\n");
1125                 ixgbe_service_event_schedule(adapter);
1126         }
1127 }
1128
1129 /**
1130  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1131  **/
1132 static int ixgbe_tx_maxrate(struct net_device *netdev,
1133                             int queue_index, u32 maxrate)
1134 {
1135         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1136         struct ixgbe_hw *hw = &adapter->hw;
1137         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1138
1139         if (!maxrate)
1140                 return 0;
1141
1142         /* Calculate the rate factor values to set */
1143         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1144         bcnrc_val /= maxrate;
1145
1146         /* clear everything but the rate factor */
1147         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1148         IXGBE_RTTBCNRC_RF_DEC_MASK;
1149
1150         /* enable the rate scheduler */
1151         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1152
1153         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1154         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1155
1156         return 0;
1157 }
1158
1159 /**
1160  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1161  * @q_vector: structure containing interrupt and ring information
1162  * @tx_ring: tx ring to clean
1163  * @napi_budget: Used to determine if we are in netpoll
1164  **/
1165 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1166                                struct ixgbe_ring *tx_ring, int napi_budget)
1167 {
1168         struct ixgbe_adapter *adapter = q_vector->adapter;
1169         struct ixgbe_tx_buffer *tx_buffer;
1170         union ixgbe_adv_tx_desc *tx_desc;
1171         unsigned int total_bytes = 0, total_packets = 0;
1172         unsigned int budget = q_vector->tx.work_limit;
1173         unsigned int i = tx_ring->next_to_clean;
1174
1175         if (test_bit(__IXGBE_DOWN, &adapter->state))
1176                 return true;
1177
1178         tx_buffer = &tx_ring->tx_buffer_info[i];
1179         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1180         i -= tx_ring->count;
1181
1182         do {
1183                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1184
1185                 /* if next_to_watch is not set then there is no work pending */
1186                 if (!eop_desc)
1187                         break;
1188
1189                 /* prevent any other reads prior to eop_desc */
1190                 smp_rmb();
1191
1192                 /* if DD is not set pending work has not been completed */
1193                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1194                         break;
1195
1196                 /* clear next_to_watch to prevent false hangs */
1197                 tx_buffer->next_to_watch = NULL;
1198
1199                 /* update the statistics for this packet */
1200                 total_bytes += tx_buffer->bytecount;
1201                 total_packets += tx_buffer->gso_segs;
1202
1203                 /* free the skb */
1204                 if (ring_is_xdp(tx_ring))
1205                         page_frag_free(tx_buffer->data);
1206                 else
1207                         napi_consume_skb(tx_buffer->skb, napi_budget);
1208
1209                 /* unmap skb header data */
1210                 dma_unmap_single(tx_ring->dev,
1211                                  dma_unmap_addr(tx_buffer, dma),
1212                                  dma_unmap_len(tx_buffer, len),
1213                                  DMA_TO_DEVICE);
1214
1215                 /* clear tx_buffer data */
1216                 dma_unmap_len_set(tx_buffer, len, 0);
1217
1218                 /* unmap remaining buffers */
1219                 while (tx_desc != eop_desc) {
1220                         tx_buffer++;
1221                         tx_desc++;
1222                         i++;
1223                         if (unlikely(!i)) {
1224                                 i -= tx_ring->count;
1225                                 tx_buffer = tx_ring->tx_buffer_info;
1226                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1227                         }
1228
1229                         /* unmap any remaining paged data */
1230                         if (dma_unmap_len(tx_buffer, len)) {
1231                                 dma_unmap_page(tx_ring->dev,
1232                                                dma_unmap_addr(tx_buffer, dma),
1233                                                dma_unmap_len(tx_buffer, len),
1234                                                DMA_TO_DEVICE);
1235                                 dma_unmap_len_set(tx_buffer, len, 0);
1236                         }
1237                 }
1238
1239                 /* move us one more past the eop_desc for start of next pkt */
1240                 tx_buffer++;
1241                 tx_desc++;
1242                 i++;
1243                 if (unlikely(!i)) {
1244                         i -= tx_ring->count;
1245                         tx_buffer = tx_ring->tx_buffer_info;
1246                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1247                 }
1248
1249                 /* issue prefetch for next Tx descriptor */
1250                 prefetch(tx_desc);
1251
1252                 /* update budget accounting */
1253                 budget--;
1254         } while (likely(budget));
1255
1256         i += tx_ring->count;
1257         tx_ring->next_to_clean = i;
1258         u64_stats_update_begin(&tx_ring->syncp);
1259         tx_ring->stats.bytes += total_bytes;
1260         tx_ring->stats.packets += total_packets;
1261         u64_stats_update_end(&tx_ring->syncp);
1262         q_vector->tx.total_bytes += total_bytes;
1263         q_vector->tx.total_packets += total_packets;
1264
1265         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1266                 /* schedule immediate reset if we believe we hung */
1267                 struct ixgbe_hw *hw = &adapter->hw;
1268                 e_err(drv, "Detected Tx Unit Hang %s\n"
1269                         "  Tx Queue             <%d>\n"
1270                         "  TDH, TDT             <%x>, <%x>\n"
1271                         "  next_to_use          <%x>\n"
1272                         "  next_to_clean        <%x>\n"
1273                         "tx_buffer_info[next_to_clean]\n"
1274                         "  time_stamp           <%lx>\n"
1275                         "  jiffies              <%lx>\n",
1276                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1277                         tx_ring->queue_index,
1278                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1279                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1280                         tx_ring->next_to_use, i,
1281                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1282
1283                 if (!ring_is_xdp(tx_ring))
1284                         netif_stop_subqueue(tx_ring->netdev,
1285                                             tx_ring->queue_index);
1286
1287                 e_info(probe,
1288                        "tx hang %d detected on queue %d, resetting adapter\n",
1289                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1290
1291                 /* schedule immediate reset if we believe we hung */
1292                 ixgbe_tx_timeout_reset(adapter);
1293
1294                 /* the adapter is about to reset, no point in enabling stuff */
1295                 return true;
1296         }
1297
1298         if (ring_is_xdp(tx_ring))
1299                 return !!budget;
1300
1301         netdev_tx_completed_queue(txring_txq(tx_ring),
1302                                   total_packets, total_bytes);
1303
1304 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1305         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1306                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1307                 /* Make sure that anybody stopping the queue after this
1308                  * sees the new next_to_clean.
1309                  */
1310                 smp_mb();
1311                 if (__netif_subqueue_stopped(tx_ring->netdev,
1312                                              tx_ring->queue_index)
1313                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1314                         netif_wake_subqueue(tx_ring->netdev,
1315                                             tx_ring->queue_index);
1316                         ++tx_ring->tx_stats.restart_queue;
1317                 }
1318         }
1319
1320         return !!budget;
1321 }
1322
1323 #ifdef CONFIG_IXGBE_DCA
1324 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1325                                 struct ixgbe_ring *tx_ring,
1326                                 int cpu)
1327 {
1328         struct ixgbe_hw *hw = &adapter->hw;
1329         u32 txctrl = 0;
1330         u16 reg_offset;
1331
1332         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1333                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1334
1335         switch (hw->mac.type) {
1336         case ixgbe_mac_82598EB:
1337                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1338                 break;
1339         case ixgbe_mac_82599EB:
1340         case ixgbe_mac_X540:
1341                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1342                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1343                 break;
1344         default:
1345                 /* for unknown hardware do not write register */
1346                 return;
1347         }
1348
1349         /*
1350          * We can enable relaxed ordering for reads, but not writes when
1351          * DCA is enabled.  This is due to a known issue in some chipsets
1352          * which will cause the DCA tag to be cleared.
1353          */
1354         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1355                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1356                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1357
1358         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1359 }
1360
1361 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1362                                 struct ixgbe_ring *rx_ring,
1363                                 int cpu)
1364 {
1365         struct ixgbe_hw *hw = &adapter->hw;
1366         u32 rxctrl = 0;
1367         u8 reg_idx = rx_ring->reg_idx;
1368
1369         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1370                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1371
1372         switch (hw->mac.type) {
1373         case ixgbe_mac_82599EB:
1374         case ixgbe_mac_X540:
1375                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1376                 break;
1377         default:
1378                 break;
1379         }
1380
1381         /*
1382          * We can enable relaxed ordering for reads, but not writes when
1383          * DCA is enabled.  This is due to a known issue in some chipsets
1384          * which will cause the DCA tag to be cleared.
1385          */
1386         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1387                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1388                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1389
1390         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1391 }
1392
1393 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1394 {
1395         struct ixgbe_adapter *adapter = q_vector->adapter;
1396         struct ixgbe_ring *ring;
1397         int cpu = get_cpu();
1398
1399         if (q_vector->cpu == cpu)
1400                 goto out_no_update;
1401
1402         ixgbe_for_each_ring(ring, q_vector->tx)
1403                 ixgbe_update_tx_dca(adapter, ring, cpu);
1404
1405         ixgbe_for_each_ring(ring, q_vector->rx)
1406                 ixgbe_update_rx_dca(adapter, ring, cpu);
1407
1408         q_vector->cpu = cpu;
1409 out_no_update:
1410         put_cpu();
1411 }
1412
1413 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1414 {
1415         int i;
1416
1417         /* always use CB2 mode, difference is masked in the CB driver */
1418         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1419                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1420                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1421         else
1422                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1423                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1424
1425         for (i = 0; i < adapter->num_q_vectors; i++) {
1426                 adapter->q_vector[i]->cpu = -1;
1427                 ixgbe_update_dca(adapter->q_vector[i]);
1428         }
1429 }
1430
1431 static int __ixgbe_notify_dca(struct device *dev, void *data)
1432 {
1433         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1434         unsigned long event = *(unsigned long *)data;
1435
1436         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1437                 return 0;
1438
1439         switch (event) {
1440         case DCA_PROVIDER_ADD:
1441                 /* if we're already enabled, don't do it again */
1442                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1443                         break;
1444                 if (dca_add_requester(dev) == 0) {
1445                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1446                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1447                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1448                         break;
1449                 }
1450                 /* fall through - DCA is disabled. */
1451         case DCA_PROVIDER_REMOVE:
1452                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1453                         dca_remove_requester(dev);
1454                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1455                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1456                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1457                 }
1458                 break;
1459         }
1460
1461         return 0;
1462 }
1463
1464 #endif /* CONFIG_IXGBE_DCA */
1465
1466 #define IXGBE_RSS_L4_TYPES_MASK \
1467         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1468          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1469          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1470          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1471
1472 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1473                                  union ixgbe_adv_rx_desc *rx_desc,
1474                                  struct sk_buff *skb)
1475 {
1476         u16 rss_type;
1477
1478         if (!(ring->netdev->features & NETIF_F_RXHASH))
1479                 return;
1480
1481         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1482                    IXGBE_RXDADV_RSSTYPE_MASK;
1483
1484         if (!rss_type)
1485                 return;
1486
1487         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1488                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1489                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1490 }
1491
1492 #ifdef IXGBE_FCOE
1493 /**
1494  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1495  * @ring: structure containing ring specific data
1496  * @rx_desc: advanced rx descriptor
1497  *
1498  * Returns : true if it is FCoE pkt
1499  */
1500 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1501                                     union ixgbe_adv_rx_desc *rx_desc)
1502 {
1503         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1504
1505         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1506                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1507                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1508                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1509 }
1510
1511 #endif /* IXGBE_FCOE */
1512 /**
1513  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1514  * @ring: structure containing ring specific data
1515  * @rx_desc: current Rx descriptor being processed
1516  * @skb: skb currently being received and modified
1517  **/
1518 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1519                                      union ixgbe_adv_rx_desc *rx_desc,
1520                                      struct sk_buff *skb)
1521 {
1522         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1523         bool encap_pkt = false;
1524
1525         skb_checksum_none_assert(skb);
1526
1527         /* Rx csum disabled */
1528         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1529                 return;
1530
1531         /* check for VXLAN and Geneve packets */
1532         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1533                 encap_pkt = true;
1534                 skb->encapsulation = 1;
1535         }
1536
1537         /* if IP and error */
1538         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1539             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1540                 ring->rx_stats.csum_err++;
1541                 return;
1542         }
1543
1544         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1545                 return;
1546
1547         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1548                 /*
1549                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1550                  * checksum errors.
1551                  */
1552                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1553                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1554                         return;
1555
1556                 ring->rx_stats.csum_err++;
1557                 return;
1558         }
1559
1560         /* It must be a TCP or UDP packet with a valid checksum */
1561         skb->ip_summed = CHECKSUM_UNNECESSARY;
1562         if (encap_pkt) {
1563                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1564                         return;
1565
1566                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1567                         skb->ip_summed = CHECKSUM_NONE;
1568                         return;
1569                 }
1570                 /* If we checked the outer header let the stack know */
1571                 skb->csum_level = 1;
1572         }
1573 }
1574
1575 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1576 {
1577         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1578 }
1579
1580 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1581                                     struct ixgbe_rx_buffer *bi)
1582 {
1583         struct page *page = bi->page;
1584         dma_addr_t dma;
1585
1586         /* since we are recycling buffers we should seldom need to alloc */
1587         if (likely(page))
1588                 return true;
1589
1590         /* alloc new page for storage */
1591         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1592         if (unlikely(!page)) {
1593                 rx_ring->rx_stats.alloc_rx_page_failed++;
1594                 return false;
1595         }
1596
1597         /* map page for use */
1598         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1599                                  ixgbe_rx_pg_size(rx_ring),
1600                                  DMA_FROM_DEVICE,
1601                                  IXGBE_RX_DMA_ATTR);
1602
1603         /*
1604          * if mapping failed free memory back to system since
1605          * there isn't much point in holding memory we can't use
1606          */
1607         if (dma_mapping_error(rx_ring->dev, dma)) {
1608                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1609
1610                 rx_ring->rx_stats.alloc_rx_page_failed++;
1611                 return false;
1612         }
1613
1614         bi->dma = dma;
1615         bi->page = page;
1616         bi->page_offset = ixgbe_rx_offset(rx_ring);
1617         bi->pagecnt_bias = 1;
1618         rx_ring->rx_stats.alloc_rx_page++;
1619
1620         return true;
1621 }
1622
1623 /**
1624  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1625  * @rx_ring: ring to place buffers on
1626  * @cleaned_count: number of buffers to replace
1627  **/
1628 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1629 {
1630         union ixgbe_adv_rx_desc *rx_desc;
1631         struct ixgbe_rx_buffer *bi;
1632         u16 i = rx_ring->next_to_use;
1633         u16 bufsz;
1634
1635         /* nothing to do */
1636         if (!cleaned_count)
1637                 return;
1638
1639         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1640         bi = &rx_ring->rx_buffer_info[i];
1641         i -= rx_ring->count;
1642
1643         bufsz = ixgbe_rx_bufsz(rx_ring);
1644
1645         do {
1646                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1647                         break;
1648
1649                 /* sync the buffer for use by the device */
1650                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1651                                                  bi->page_offset, bufsz,
1652                                                  DMA_FROM_DEVICE);
1653
1654                 /*
1655                  * Refresh the desc even if buffer_addrs didn't change
1656                  * because each write-back erases this info.
1657                  */
1658                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1659
1660                 rx_desc++;
1661                 bi++;
1662                 i++;
1663                 if (unlikely(!i)) {
1664                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1665                         bi = rx_ring->rx_buffer_info;
1666                         i -= rx_ring->count;
1667                 }
1668
1669                 /* clear the length for the next_to_use descriptor */
1670                 rx_desc->wb.upper.length = 0;
1671
1672                 cleaned_count--;
1673         } while (cleaned_count);
1674
1675         i += rx_ring->count;
1676
1677         if (rx_ring->next_to_use != i) {
1678                 rx_ring->next_to_use = i;
1679
1680                 /* update next to alloc since we have filled the ring */
1681                 rx_ring->next_to_alloc = i;
1682
1683                 /* Force memory writes to complete before letting h/w
1684                  * know there are new descriptors to fetch.  (Only
1685                  * applicable for weak-ordered memory model archs,
1686                  * such as IA-64).
1687                  */
1688                 wmb();
1689                 writel(i, rx_ring->tail);
1690         }
1691 }
1692
1693 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1694                                    struct sk_buff *skb)
1695 {
1696         u16 hdr_len = skb_headlen(skb);
1697
1698         /* set gso_size to avoid messing up TCP MSS */
1699         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1700                                                  IXGBE_CB(skb)->append_cnt);
1701         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1702 }
1703
1704 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1705                                    struct sk_buff *skb)
1706 {
1707         /* if append_cnt is 0 then frame is not RSC */
1708         if (!IXGBE_CB(skb)->append_cnt)
1709                 return;
1710
1711         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1712         rx_ring->rx_stats.rsc_flush++;
1713
1714         ixgbe_set_rsc_gso_size(rx_ring, skb);
1715
1716         /* gso_size is computed using append_cnt so always clear it last */
1717         IXGBE_CB(skb)->append_cnt = 0;
1718 }
1719
1720 /**
1721  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1722  * @rx_ring: rx descriptor ring packet is being transacted on
1723  * @rx_desc: pointer to the EOP Rx descriptor
1724  * @skb: pointer to current skb being populated
1725  *
1726  * This function checks the ring, descriptor, and packet information in
1727  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1728  * other fields within the skb.
1729  **/
1730 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1731                                      union ixgbe_adv_rx_desc *rx_desc,
1732                                      struct sk_buff *skb)
1733 {
1734         struct net_device *dev = rx_ring->netdev;
1735         u32 flags = rx_ring->q_vector->adapter->flags;
1736
1737         ixgbe_update_rsc_stats(rx_ring, skb);
1738
1739         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1740
1741         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1742
1743         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1744                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1745
1746         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1747             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1748                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1749                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1750         }
1751
1752         skb_record_rx_queue(skb, rx_ring->queue_index);
1753
1754         skb->protocol = eth_type_trans(skb, dev);
1755 }
1756
1757 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1758                          struct sk_buff *skb)
1759 {
1760         napi_gro_receive(&q_vector->napi, skb);
1761 }
1762
1763 /**
1764  * ixgbe_is_non_eop - process handling of non-EOP buffers
1765  * @rx_ring: Rx ring being processed
1766  * @rx_desc: Rx descriptor for current buffer
1767  * @skb: Current socket buffer containing buffer in progress
1768  *
1769  * This function updates next to clean.  If the buffer is an EOP buffer
1770  * this function exits returning false, otherwise it will place the
1771  * sk_buff in the next buffer to be chained and return true indicating
1772  * that this is in fact a non-EOP buffer.
1773  **/
1774 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1775                              union ixgbe_adv_rx_desc *rx_desc,
1776                              struct sk_buff *skb)
1777 {
1778         u32 ntc = rx_ring->next_to_clean + 1;
1779
1780         /* fetch, update, and store next to clean */
1781         ntc = (ntc < rx_ring->count) ? ntc : 0;
1782         rx_ring->next_to_clean = ntc;
1783
1784         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1785
1786         /* update RSC append count if present */
1787         if (ring_is_rsc_enabled(rx_ring)) {
1788                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1789                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1790
1791                 if (unlikely(rsc_enabled)) {
1792                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1793
1794                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1795                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1796
1797                         /* update ntc based on RSC value */
1798                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1799                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1800                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1801                 }
1802         }
1803
1804         /* if we are the last buffer then there is nothing else to do */
1805         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1806                 return false;
1807
1808         /* place skb in next buffer to be received */
1809         rx_ring->rx_buffer_info[ntc].skb = skb;
1810         rx_ring->rx_stats.non_eop_descs++;
1811
1812         return true;
1813 }
1814
1815 /**
1816  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1817  * @rx_ring: rx descriptor ring packet is being transacted on
1818  * @skb: pointer to current skb being adjusted
1819  *
1820  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1821  * main difference between this version and the original function is that
1822  * this function can make several assumptions about the state of things
1823  * that allow for significant optimizations versus the standard function.
1824  * As a result we can do things like drop a frag and maintain an accurate
1825  * truesize for the skb.
1826  */
1827 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1828                             struct sk_buff *skb)
1829 {
1830         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1831         unsigned char *va;
1832         unsigned int pull_len;
1833
1834         /*
1835          * it is valid to use page_address instead of kmap since we are
1836          * working with pages allocated out of the lomem pool per
1837          * alloc_page(GFP_ATOMIC)
1838          */
1839         va = skb_frag_address(frag);
1840
1841         /*
1842          * we need the header to contain the greater of either ETH_HLEN or
1843          * 60 bytes if the skb->len is less than 60 for skb_pad.
1844          */
1845         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1846
1847         /* align pull length to size of long to optimize memcpy performance */
1848         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1849
1850         /* update all of the pointers */
1851         skb_frag_size_sub(frag, pull_len);
1852         frag->page_offset += pull_len;
1853         skb->data_len -= pull_len;
1854         skb->tail += pull_len;
1855 }
1856
1857 /**
1858  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1859  * @rx_ring: rx descriptor ring packet is being transacted on
1860  * @skb: pointer to current skb being updated
1861  *
1862  * This function provides a basic DMA sync up for the first fragment of an
1863  * skb.  The reason for doing this is that the first fragment cannot be
1864  * unmapped until we have reached the end of packet descriptor for a buffer
1865  * chain.
1866  */
1867 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1868                                 struct sk_buff *skb)
1869 {
1870         /* if the page was released unmap it, else just sync our portion */
1871         if (unlikely(IXGBE_CB(skb)->page_released)) {
1872                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1873                                      ixgbe_rx_pg_size(rx_ring),
1874                                      DMA_FROM_DEVICE,
1875                                      IXGBE_RX_DMA_ATTR);
1876         } else {
1877                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1878
1879                 dma_sync_single_range_for_cpu(rx_ring->dev,
1880                                               IXGBE_CB(skb)->dma,
1881                                               frag->page_offset,
1882                                               skb_frag_size(frag),
1883                                               DMA_FROM_DEVICE);
1884         }
1885 }
1886
1887 /**
1888  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1889  * @rx_ring: rx descriptor ring packet is being transacted on
1890  * @rx_desc: pointer to the EOP Rx descriptor
1891  * @skb: pointer to current skb being fixed
1892  *
1893  * Check if the skb is valid in the XDP case it will be an error pointer.
1894  * Return true in this case to abort processing and advance to next
1895  * descriptor.
1896  *
1897  * Check for corrupted packet headers caused by senders on the local L2
1898  * embedded NIC switch not setting up their Tx Descriptors right.  These
1899  * should be very rare.
1900  *
1901  * Also address the case where we are pulling data in on pages only
1902  * and as such no data is present in the skb header.
1903  *
1904  * In addition if skb is not at least 60 bytes we need to pad it so that
1905  * it is large enough to qualify as a valid Ethernet frame.
1906  *
1907  * Returns true if an error was encountered and skb was freed.
1908  **/
1909 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1910                                   union ixgbe_adv_rx_desc *rx_desc,
1911                                   struct sk_buff *skb)
1912 {
1913         struct net_device *netdev = rx_ring->netdev;
1914
1915         /* XDP packets use error pointer so abort at this point */
1916         if (IS_ERR(skb))
1917                 return true;
1918
1919         /* verify that the packet does not have any known errors */
1920         if (unlikely(ixgbe_test_staterr(rx_desc,
1921                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1922             !(netdev->features & NETIF_F_RXALL))) {
1923                 dev_kfree_skb_any(skb);
1924                 return true;
1925         }
1926
1927         /* place header in linear portion of buffer */
1928         if (!skb_headlen(skb))
1929                 ixgbe_pull_tail(rx_ring, skb);
1930
1931 #ifdef IXGBE_FCOE
1932         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1933         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1934                 return false;
1935
1936 #endif
1937         /* if eth_skb_pad returns an error the skb was freed */
1938         if (eth_skb_pad(skb))
1939                 return true;
1940
1941         return false;
1942 }
1943
1944 /**
1945  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1946  * @rx_ring: rx descriptor ring to store buffers on
1947  * @old_buff: donor buffer to have page reused
1948  *
1949  * Synchronizes page for reuse by the adapter
1950  **/
1951 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1952                                 struct ixgbe_rx_buffer *old_buff)
1953 {
1954         struct ixgbe_rx_buffer *new_buff;
1955         u16 nta = rx_ring->next_to_alloc;
1956
1957         new_buff = &rx_ring->rx_buffer_info[nta];
1958
1959         /* update, and store next to alloc */
1960         nta++;
1961         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1962
1963         /* Transfer page from old buffer to new buffer.
1964          * Move each member individually to avoid possible store
1965          * forwarding stalls and unnecessary copy of skb.
1966          */
1967         new_buff->dma           = old_buff->dma;
1968         new_buff->page          = old_buff->page;
1969         new_buff->page_offset   = old_buff->page_offset;
1970         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1971 }
1972
1973 static inline bool ixgbe_page_is_reserved(struct page *page)
1974 {
1975         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1976 }
1977
1978 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1979 {
1980         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1981         struct page *page = rx_buffer->page;
1982
1983         /* avoid re-using remote pages */
1984         if (unlikely(ixgbe_page_is_reserved(page)))
1985                 return false;
1986
1987 #if (PAGE_SIZE < 8192)
1988         /* if we are only owner of page we can reuse it */
1989         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1990                 return false;
1991 #else
1992         /* The last offset is a bit aggressive in that we assume the
1993          * worst case of FCoE being enabled and using a 3K buffer.
1994          * However this should have minimal impact as the 1K extra is
1995          * still less than one buffer in size.
1996          */
1997 #define IXGBE_LAST_OFFSET \
1998         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1999         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
2000                 return false;
2001 #endif
2002
2003         /* If we have drained the page fragment pool we need to update
2004          * the pagecnt_bias and page count so that we fully restock the
2005          * number of references the driver holds.
2006          */
2007         if (unlikely(!pagecnt_bias)) {
2008                 page_ref_add(page, USHRT_MAX);
2009                 rx_buffer->pagecnt_bias = USHRT_MAX;
2010         }
2011
2012         return true;
2013 }
2014
2015 /**
2016  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
2017  * @rx_ring: rx descriptor ring to transact packets on
2018  * @rx_buffer: buffer containing page to add
2019  * @rx_desc: descriptor containing length of buffer written by hardware
2020  * @skb: sk_buff to place the data into
2021  *
2022  * This function will add the data contained in rx_buffer->page to the skb.
2023  * This is done either through a direct copy if the data in the buffer is
2024  * less than the skb header size, otherwise it will just attach the page as
2025  * a frag to the skb.
2026  *
2027  * The function will then update the page offset if necessary and return
2028  * true if the buffer can be reused by the adapter.
2029  **/
2030 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2031                               struct ixgbe_rx_buffer *rx_buffer,
2032                               struct sk_buff *skb,
2033                               unsigned int size)
2034 {
2035 #if (PAGE_SIZE < 8192)
2036         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2037 #else
2038         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2039                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2040                                 SKB_DATA_ALIGN(size);
2041 #endif
2042         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2043                         rx_buffer->page_offset, size, truesize);
2044 #if (PAGE_SIZE < 8192)
2045         rx_buffer->page_offset ^= truesize;
2046 #else
2047         rx_buffer->page_offset += truesize;
2048 #endif
2049 }
2050
2051 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2052                                                    union ixgbe_adv_rx_desc *rx_desc,
2053                                                    struct sk_buff **skb,
2054                                                    const unsigned int size)
2055 {
2056         struct ixgbe_rx_buffer *rx_buffer;
2057
2058         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2059         prefetchw(rx_buffer->page);
2060         *skb = rx_buffer->skb;
2061
2062         /* Delay unmapping of the first packet. It carries the header
2063          * information, HW may still access the header after the writeback.
2064          * Only unmap it when EOP is reached
2065          */
2066         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2067                 if (!*skb)
2068                         goto skip_sync;
2069         } else {
2070                 if (*skb)
2071                         ixgbe_dma_sync_frag(rx_ring, *skb);
2072         }
2073
2074         /* we are reusing so sync this buffer for CPU use */
2075         dma_sync_single_range_for_cpu(rx_ring->dev,
2076                                       rx_buffer->dma,
2077                                       rx_buffer->page_offset,
2078                                       size,
2079                                       DMA_FROM_DEVICE);
2080 skip_sync:
2081         rx_buffer->pagecnt_bias--;
2082
2083         return rx_buffer;
2084 }
2085
2086 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2087                                 struct ixgbe_rx_buffer *rx_buffer,
2088                                 struct sk_buff *skb)
2089 {
2090         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2091                 /* hand second half of page back to the ring */
2092                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2093         } else {
2094                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2095                         /* the page has been released from the ring */
2096                         IXGBE_CB(skb)->page_released = true;
2097                 } else {
2098                         /* we are not reusing the buffer so unmap it */
2099                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2100                                              ixgbe_rx_pg_size(rx_ring),
2101                                              DMA_FROM_DEVICE,
2102                                              IXGBE_RX_DMA_ATTR);
2103                 }
2104                 __page_frag_cache_drain(rx_buffer->page,
2105                                         rx_buffer->pagecnt_bias);
2106         }
2107
2108         /* clear contents of rx_buffer */
2109         rx_buffer->page = NULL;
2110         rx_buffer->skb = NULL;
2111 }
2112
2113 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2114                                            struct ixgbe_rx_buffer *rx_buffer,
2115                                            struct xdp_buff *xdp,
2116                                            union ixgbe_adv_rx_desc *rx_desc)
2117 {
2118         unsigned int size = xdp->data_end - xdp->data;
2119 #if (PAGE_SIZE < 8192)
2120         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2121 #else
2122         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2123                                                xdp->data_hard_start);
2124 #endif
2125         struct sk_buff *skb;
2126
2127         /* prefetch first cache line of first page */
2128         prefetch(xdp->data);
2129 #if L1_CACHE_BYTES < 128
2130         prefetch(xdp->data + L1_CACHE_BYTES);
2131 #endif
2132         /* Note, we get here by enabling legacy-rx via:
2133          *
2134          *    ethtool --set-priv-flags <dev> legacy-rx on
2135          *
2136          * In this mode, we currently get 0 extra XDP headroom as
2137          * opposed to having legacy-rx off, where we process XDP
2138          * packets going to stack via ixgbe_build_skb(). The latter
2139          * provides us currently with 192 bytes of headroom.
2140          *
2141          * For ixgbe_construct_skb() mode it means that the
2142          * xdp->data_meta will always point to xdp->data, since
2143          * the helper cannot expand the head. Should this ever
2144          * change in future for legacy-rx mode on, then lets also
2145          * add xdp->data_meta handling here.
2146          */
2147
2148         /* allocate a skb to store the frags */
2149         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2150         if (unlikely(!skb))
2151                 return NULL;
2152
2153         if (size > IXGBE_RX_HDR_SIZE) {
2154                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2155                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2156
2157                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2158                                 xdp->data - page_address(rx_buffer->page),
2159                                 size, truesize);
2160 #if (PAGE_SIZE < 8192)
2161                 rx_buffer->page_offset ^= truesize;
2162 #else
2163                 rx_buffer->page_offset += truesize;
2164 #endif
2165         } else {
2166                 memcpy(__skb_put(skb, size),
2167                        xdp->data, ALIGN(size, sizeof(long)));
2168                 rx_buffer->pagecnt_bias++;
2169         }
2170
2171         return skb;
2172 }
2173
2174 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2175                                        struct ixgbe_rx_buffer *rx_buffer,
2176                                        struct xdp_buff *xdp,
2177                                        union ixgbe_adv_rx_desc *rx_desc)
2178 {
2179         unsigned int metasize = xdp->data - xdp->data_meta;
2180 #if (PAGE_SIZE < 8192)
2181         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2182 #else
2183         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2184                                 SKB_DATA_ALIGN(xdp->data_end -
2185                                                xdp->data_hard_start);
2186 #endif
2187         struct sk_buff *skb;
2188
2189         /* Prefetch first cache line of first page. If xdp->data_meta
2190          * is unused, this points extactly as xdp->data, otherwise we
2191          * likely have a consumer accessing first few bytes of meta
2192          * data, and then actual data.
2193          */
2194         prefetch(xdp->data_meta);
2195 #if L1_CACHE_BYTES < 128
2196         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2197 #endif
2198
2199         /* build an skb to around the page buffer */
2200         skb = build_skb(xdp->data_hard_start, truesize);
2201         if (unlikely(!skb))
2202                 return NULL;
2203
2204         /* update pointers within the skb to store the data */
2205         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2206         __skb_put(skb, xdp->data_end - xdp->data);
2207         if (metasize)
2208                 skb_metadata_set(skb, metasize);
2209
2210         /* record DMA address if this is the start of a chain of buffers */
2211         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2212                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2213
2214         /* update buffer offset */
2215 #if (PAGE_SIZE < 8192)
2216         rx_buffer->page_offset ^= truesize;
2217 #else
2218         rx_buffer->page_offset += truesize;
2219 #endif
2220
2221         return skb;
2222 }
2223
2224 #define IXGBE_XDP_PASS 0
2225 #define IXGBE_XDP_CONSUMED 1
2226 #define IXGBE_XDP_TX 2
2227
2228 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2229                                struct xdp_buff *xdp);
2230
2231 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2232                                      struct ixgbe_ring *rx_ring,
2233                                      struct xdp_buff *xdp)
2234 {
2235         int err, result = IXGBE_XDP_PASS;
2236         struct bpf_prog *xdp_prog;
2237         u32 act;
2238
2239         rcu_read_lock();
2240         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2241
2242         if (!xdp_prog)
2243                 goto xdp_out;
2244
2245         act = bpf_prog_run_xdp(xdp_prog, xdp);
2246         switch (act) {
2247         case XDP_PASS:
2248                 break;
2249         case XDP_TX:
2250                 result = ixgbe_xmit_xdp_ring(adapter, xdp);
2251                 break;
2252         case XDP_REDIRECT:
2253                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2254                 if (!err)
2255                         result = IXGBE_XDP_TX;
2256                 else
2257                         result = IXGBE_XDP_CONSUMED;
2258                 break;
2259         default:
2260                 bpf_warn_invalid_xdp_action(act);
2261                 /* fallthrough */
2262         case XDP_ABORTED:
2263                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2264                 /* fallthrough -- handle aborts by dropping packet */
2265         case XDP_DROP:
2266                 result = IXGBE_XDP_CONSUMED;
2267                 break;
2268         }
2269 xdp_out:
2270         rcu_read_unlock();
2271         return ERR_PTR(-result);
2272 }
2273
2274 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2275                                  struct ixgbe_rx_buffer *rx_buffer,
2276                                  unsigned int size)
2277 {
2278 #if (PAGE_SIZE < 8192)
2279         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2280
2281         rx_buffer->page_offset ^= truesize;
2282 #else
2283         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2284                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2285                                 SKB_DATA_ALIGN(size);
2286
2287         rx_buffer->page_offset += truesize;
2288 #endif
2289 }
2290
2291 /**
2292  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2293  * @q_vector: structure containing interrupt and ring information
2294  * @rx_ring: rx descriptor ring to transact packets on
2295  * @budget: Total limit on number of packets to process
2296  *
2297  * This function provides a "bounce buffer" approach to Rx interrupt
2298  * processing.  The advantage to this is that on systems that have
2299  * expensive overhead for IOMMU access this provides a means of avoiding
2300  * it by maintaining the mapping of the page to the syste.
2301  *
2302  * Returns amount of work completed
2303  **/
2304 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2305                                struct ixgbe_ring *rx_ring,
2306                                const int budget)
2307 {
2308         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2309         struct ixgbe_adapter *adapter = q_vector->adapter;
2310 #ifdef IXGBE_FCOE
2311         int ddp_bytes;
2312         unsigned int mss = 0;
2313 #endif /* IXGBE_FCOE */
2314         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2315         bool xdp_xmit = false;
2316         struct xdp_buff xdp;
2317
2318         xdp.rxq = &rx_ring->xdp_rxq;
2319
2320         while (likely(total_rx_packets < budget)) {
2321                 union ixgbe_adv_rx_desc *rx_desc;
2322                 struct ixgbe_rx_buffer *rx_buffer;
2323                 struct sk_buff *skb;
2324                 unsigned int size;
2325
2326                 /* return some buffers to hardware, one at a time is too slow */
2327                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2328                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2329                         cleaned_count = 0;
2330                 }
2331
2332                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2333                 size = le16_to_cpu(rx_desc->wb.upper.length);
2334                 if (!size)
2335                         break;
2336
2337                 /* This memory barrier is needed to keep us from reading
2338                  * any other fields out of the rx_desc until we know the
2339                  * descriptor has been written back
2340                  */
2341                 dma_rmb();
2342
2343                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2344
2345                 /* retrieve a buffer from the ring */
2346                 if (!skb) {
2347                         xdp.data = page_address(rx_buffer->page) +
2348                                    rx_buffer->page_offset;
2349                         xdp.data_meta = xdp.data;
2350                         xdp.data_hard_start = xdp.data -
2351                                               ixgbe_rx_offset(rx_ring);
2352                         xdp.data_end = xdp.data + size;
2353
2354                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2355                 }
2356
2357                 if (IS_ERR(skb)) {
2358                         if (PTR_ERR(skb) == -IXGBE_XDP_TX) {
2359                                 xdp_xmit = true;
2360                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2361                         } else {
2362                                 rx_buffer->pagecnt_bias++;
2363                         }
2364                         total_rx_packets++;
2365                         total_rx_bytes += size;
2366                 } else if (skb) {
2367                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2368                 } else if (ring_uses_build_skb(rx_ring)) {
2369                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2370                                               &xdp, rx_desc);
2371                 } else {
2372                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2373                                                   &xdp, rx_desc);
2374                 }
2375
2376                 /* exit if we failed to retrieve a buffer */
2377                 if (!skb) {
2378                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2379                         rx_buffer->pagecnt_bias++;
2380                         break;
2381                 }
2382
2383                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2384                 cleaned_count++;
2385
2386                 /* place incomplete frames back on ring for completion */
2387                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2388                         continue;
2389
2390                 /* verify the packet layout is correct */
2391                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2392                         continue;
2393
2394                 /* probably a little skewed due to removing CRC */
2395                 total_rx_bytes += skb->len;
2396
2397                 /* populate checksum, timestamp, VLAN, and protocol */
2398                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2399
2400 #ifdef IXGBE_FCOE
2401                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2402                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2403                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2404                         /* include DDPed FCoE data */
2405                         if (ddp_bytes > 0) {
2406                                 if (!mss) {
2407                                         mss = rx_ring->netdev->mtu -
2408                                                 sizeof(struct fcoe_hdr) -
2409                                                 sizeof(struct fc_frame_header) -
2410                                                 sizeof(struct fcoe_crc_eof);
2411                                         if (mss > 512)
2412                                                 mss &= ~511;
2413                                 }
2414                                 total_rx_bytes += ddp_bytes;
2415                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2416                                                                  mss);
2417                         }
2418                         if (!ddp_bytes) {
2419                                 dev_kfree_skb_any(skb);
2420                                 continue;
2421                         }
2422                 }
2423
2424 #endif /* IXGBE_FCOE */
2425                 ixgbe_rx_skb(q_vector, skb);
2426
2427                 /* update budget accounting */
2428                 total_rx_packets++;
2429         }
2430
2431         if (xdp_xmit) {
2432                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2433
2434                 /* Force memory writes to complete before letting h/w
2435                  * know there are new descriptors to fetch.
2436                  */
2437                 wmb();
2438                 writel(ring->next_to_use, ring->tail);
2439
2440                 xdp_do_flush_map();
2441         }
2442
2443         u64_stats_update_begin(&rx_ring->syncp);
2444         rx_ring->stats.packets += total_rx_packets;
2445         rx_ring->stats.bytes += total_rx_bytes;
2446         u64_stats_update_end(&rx_ring->syncp);
2447         q_vector->rx.total_packets += total_rx_packets;
2448         q_vector->rx.total_bytes += total_rx_bytes;
2449
2450         return total_rx_packets;
2451 }
2452
2453 /**
2454  * ixgbe_configure_msix - Configure MSI-X hardware
2455  * @adapter: board private structure
2456  *
2457  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2458  * interrupts.
2459  **/
2460 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2461 {
2462         struct ixgbe_q_vector *q_vector;
2463         int v_idx;
2464         u32 mask;
2465
2466         /* Populate MSIX to EITR Select */
2467         if (adapter->num_vfs > 32) {
2468                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2469                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2470         }
2471
2472         /*
2473          * Populate the IVAR table and set the ITR values to the
2474          * corresponding register.
2475          */
2476         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2477                 struct ixgbe_ring *ring;
2478                 q_vector = adapter->q_vector[v_idx];
2479
2480                 ixgbe_for_each_ring(ring, q_vector->rx)
2481                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2482
2483                 ixgbe_for_each_ring(ring, q_vector->tx)
2484                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2485
2486                 ixgbe_write_eitr(q_vector);
2487         }
2488
2489         switch (adapter->hw.mac.type) {
2490         case ixgbe_mac_82598EB:
2491                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2492                                v_idx);
2493                 break;
2494         case ixgbe_mac_82599EB:
2495         case ixgbe_mac_X540:
2496         case ixgbe_mac_X550:
2497         case ixgbe_mac_X550EM_x:
2498         case ixgbe_mac_x550em_a:
2499                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2500                 break;
2501         default:
2502                 break;
2503         }
2504         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2505
2506         /* set up to autoclear timer, and the vectors */
2507         mask = IXGBE_EIMS_ENABLE_MASK;
2508         mask &= ~(IXGBE_EIMS_OTHER |
2509                   IXGBE_EIMS_MAILBOX |
2510                   IXGBE_EIMS_LSC);
2511
2512         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2513 }
2514
2515 /**
2516  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2517  * @q_vector: structure containing interrupt and ring information
2518  * @ring_container: structure containing ring performance data
2519  *
2520  *      Stores a new ITR value based on packets and byte
2521  *      counts during the last interrupt.  The advantage of per interrupt
2522  *      computation is faster updates and more accurate ITR for the current
2523  *      traffic pattern.  Constants in this function were computed
2524  *      based on theoretical maximum wire speed and thresholds were set based
2525  *      on testing data as well as attempting to minimize response time
2526  *      while increasing bulk throughput.
2527  **/
2528 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2529                              struct ixgbe_ring_container *ring_container)
2530 {
2531         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2532                            IXGBE_ITR_ADAPTIVE_LATENCY;
2533         unsigned int avg_wire_size, packets, bytes;
2534         unsigned long next_update = jiffies;
2535
2536         /* If we don't have any rings just leave ourselves set for maximum
2537          * possible latency so we take ourselves out of the equation.
2538          */
2539         if (!ring_container->ring)
2540                 return;
2541
2542         /* If we didn't update within up to 1 - 2 jiffies we can assume
2543          * that either packets are coming in so slow there hasn't been
2544          * any work, or that there is so much work that NAPI is dealing
2545          * with interrupt moderation and we don't need to do anything.
2546          */
2547         if (time_after(next_update, ring_container->next_update))
2548                 goto clear_counts;
2549
2550         packets = ring_container->total_packets;
2551
2552         /* We have no packets to actually measure against. This means
2553          * either one of the other queues on this vector is active or
2554          * we are a Tx queue doing TSO with too high of an interrupt rate.
2555          *
2556          * When this occurs just tick up our delay by the minimum value
2557          * and hope that this extra delay will prevent us from being called
2558          * without any work on our queue.
2559          */
2560         if (!packets) {
2561                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2562                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2563                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2564                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2565                 goto clear_counts;
2566         }
2567
2568         bytes = ring_container->total_bytes;
2569
2570         /* If packets are less than 4 or bytes are less than 9000 assume
2571          * insufficient data to use bulk rate limiting approach. We are
2572          * likely latency driven.
2573          */
2574         if (packets < 4 && bytes < 9000) {
2575                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2576                 goto adjust_by_size;
2577         }
2578
2579         /* Between 4 and 48 we can assume that our current interrupt delay
2580          * is only slightly too low. As such we should increase it by a small
2581          * fixed amount.
2582          */
2583         if (packets < 48) {
2584                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2585                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2586                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2587                 goto clear_counts;
2588         }
2589
2590         /* Between 48 and 96 is our "goldilocks" zone where we are working
2591          * out "just right". Just report that our current ITR is good for us.
2592          */
2593         if (packets < 96) {
2594                 itr = q_vector->itr >> 2;
2595                 goto clear_counts;
2596         }
2597
2598         /* If packet count is 96 or greater we are likely looking at a slight
2599          * overrun of the delay we want. Try halving our delay to see if that
2600          * will cut the number of packets in half per interrupt.
2601          */
2602         if (packets < 256) {
2603                 itr = q_vector->itr >> 3;
2604                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2605                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2606                 goto clear_counts;
2607         }
2608
2609         /* The paths below assume we are dealing with a bulk ITR since number
2610          * of packets is 256 or greater. We are just going to have to compute
2611          * a value and try to bring the count under control, though for smaller
2612          * packet sizes there isn't much we can do as NAPI polling will likely
2613          * be kicking in sooner rather than later.
2614          */
2615         itr = IXGBE_ITR_ADAPTIVE_BULK;
2616
2617 adjust_by_size:
2618         /* If packet counts are 256 or greater we can assume we have a gross
2619          * overestimation of what the rate should be. Instead of trying to fine
2620          * tune it just use the formula below to try and dial in an exact value
2621          * give the current packet size of the frame.
2622          */
2623         avg_wire_size = bytes / packets;
2624
2625         /* The following is a crude approximation of:
2626          *  wmem_default / (size + overhead) = desired_pkts_per_int
2627          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2628          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2629          *
2630          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2631          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2632          * formula down to
2633          *
2634          *  (170 * (size + 24)) / (size + 640) = ITR
2635          *
2636          * We first do some math on the packet size and then finally bitshift
2637          * by 8 after rounding up. We also have to account for PCIe link speed
2638          * difference as ITR scales based on this.
2639          */
2640         if (avg_wire_size <= 60) {
2641                 /* Start at 50k ints/sec */
2642                 avg_wire_size = 5120;
2643         } else if (avg_wire_size <= 316) {
2644                 /* 50K ints/sec to 16K ints/sec */
2645                 avg_wire_size *= 40;
2646                 avg_wire_size += 2720;
2647         } else if (avg_wire_size <= 1084) {
2648                 /* 16K ints/sec to 9.2K ints/sec */
2649                 avg_wire_size *= 15;
2650                 avg_wire_size += 11452;
2651         } else if (avg_wire_size <= 1980) {
2652                 /* 9.2K ints/sec to 8K ints/sec */
2653                 avg_wire_size *= 5;
2654                 avg_wire_size += 22420;
2655         } else {
2656                 /* plateau at a limit of 8K ints/sec */
2657                 avg_wire_size = 32256;
2658         }
2659
2660         /* If we are in low latency mode half our delay which doubles the rate
2661          * to somewhere between 100K to 16K ints/sec
2662          */
2663         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2664                 avg_wire_size >>= 1;
2665
2666         /* Resultant value is 256 times larger than it needs to be. This
2667          * gives us room to adjust the value as needed to either increase
2668          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2669          *
2670          * Use addition as we have already recorded the new latency flag
2671          * for the ITR value.
2672          */
2673         switch (q_vector->adapter->link_speed) {
2674         case IXGBE_LINK_SPEED_10GB_FULL:
2675         case IXGBE_LINK_SPEED_100_FULL:
2676         default:
2677                 itr += DIV_ROUND_UP(avg_wire_size,
2678                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2679                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2680                 break;
2681         case IXGBE_LINK_SPEED_2_5GB_FULL:
2682         case IXGBE_LINK_SPEED_1GB_FULL:
2683         case IXGBE_LINK_SPEED_10_FULL:
2684                 itr += DIV_ROUND_UP(avg_wire_size,
2685                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2686                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2687                 break;
2688         }
2689
2690 clear_counts:
2691         /* write back value */
2692         ring_container->itr = itr;
2693
2694         /* next update should occur within next jiffy */
2695         ring_container->next_update = next_update + 1;
2696
2697         ring_container->total_bytes = 0;
2698         ring_container->total_packets = 0;
2699 }
2700
2701 /**
2702  * ixgbe_write_eitr - write EITR register in hardware specific way
2703  * @q_vector: structure containing interrupt and ring information
2704  *
2705  * This function is made to be called by ethtool and by the driver
2706  * when it needs to update EITR registers at runtime.  Hardware
2707  * specific quirks/differences are taken care of here.
2708  */
2709 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2710 {
2711         struct ixgbe_adapter *adapter = q_vector->adapter;
2712         struct ixgbe_hw *hw = &adapter->hw;
2713         int v_idx = q_vector->v_idx;
2714         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2715
2716         switch (adapter->hw.mac.type) {
2717         case ixgbe_mac_82598EB:
2718                 /* must write high and low 16 bits to reset counter */
2719                 itr_reg |= (itr_reg << 16);
2720                 break;
2721         case ixgbe_mac_82599EB:
2722         case ixgbe_mac_X540:
2723         case ixgbe_mac_X550:
2724         case ixgbe_mac_X550EM_x:
2725         case ixgbe_mac_x550em_a:
2726                 /*
2727                  * set the WDIS bit to not clear the timer bits and cause an
2728                  * immediate assertion of the interrupt
2729                  */
2730                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2731                 break;
2732         default:
2733                 break;
2734         }
2735         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2736 }
2737
2738 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2739 {
2740         u32 new_itr;
2741
2742         ixgbe_update_itr(q_vector, &q_vector->tx);
2743         ixgbe_update_itr(q_vector, &q_vector->rx);
2744
2745         /* use the smallest value of new ITR delay calculations */
2746         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2747
2748         /* Clear latency flag if set, shift into correct position */
2749         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2750         new_itr <<= 2;
2751
2752         if (new_itr != q_vector->itr) {
2753                 /* save the algorithm value here */
2754                 q_vector->itr = new_itr;
2755
2756                 ixgbe_write_eitr(q_vector);
2757         }
2758 }
2759
2760 /**
2761  * ixgbe_check_overtemp_subtask - check for over temperature
2762  * @adapter: pointer to adapter
2763  **/
2764 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2765 {
2766         struct ixgbe_hw *hw = &adapter->hw;
2767         u32 eicr = adapter->interrupt_event;
2768         s32 rc;
2769
2770         if (test_bit(__IXGBE_DOWN, &adapter->state))
2771                 return;
2772
2773         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2774                 return;
2775
2776         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2777
2778         switch (hw->device_id) {
2779         case IXGBE_DEV_ID_82599_T3_LOM:
2780                 /*
2781                  * Since the warning interrupt is for both ports
2782                  * we don't have to check if:
2783                  *  - This interrupt wasn't for our port.
2784                  *  - We may have missed the interrupt so always have to
2785                  *    check if we  got a LSC
2786                  */
2787                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2788                     !(eicr & IXGBE_EICR_LSC))
2789                         return;
2790
2791                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2792                         u32 speed;
2793                         bool link_up = false;
2794
2795                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2796
2797                         if (link_up)
2798                                 return;
2799                 }
2800
2801                 /* Check if this is not due to overtemp */
2802                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2803                         return;
2804
2805                 break;
2806         case IXGBE_DEV_ID_X550EM_A_1G_T:
2807         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2808                 rc = hw->phy.ops.check_overtemp(hw);
2809                 if (rc != IXGBE_ERR_OVERTEMP)
2810                         return;
2811                 break;
2812         default:
2813                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2814                         return;
2815                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2816                         return;
2817                 break;
2818         }
2819         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2820
2821         adapter->interrupt_event = 0;
2822 }
2823
2824 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2825 {
2826         struct ixgbe_hw *hw = &adapter->hw;
2827
2828         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2829             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2830                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2831                 /* write to clear the interrupt */
2832                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2833         }
2834 }
2835
2836 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2837 {
2838         struct ixgbe_hw *hw = &adapter->hw;
2839
2840         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2841                 return;
2842
2843         switch (adapter->hw.mac.type) {
2844         case ixgbe_mac_82599EB:
2845                 /*
2846                  * Need to check link state so complete overtemp check
2847                  * on service task
2848                  */
2849                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2850                      (eicr & IXGBE_EICR_LSC)) &&
2851                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2852                         adapter->interrupt_event = eicr;
2853                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2854                         ixgbe_service_event_schedule(adapter);
2855                         return;
2856                 }
2857                 return;
2858         case ixgbe_mac_x550em_a:
2859                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2860                         adapter->interrupt_event = eicr;
2861                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2862                         ixgbe_service_event_schedule(adapter);
2863                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2864                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2865                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2866                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2867                 }
2868                 return;
2869         case ixgbe_mac_X550:
2870         case ixgbe_mac_X540:
2871                 if (!(eicr & IXGBE_EICR_TS))
2872                         return;
2873                 break;
2874         default:
2875                 return;
2876         }
2877
2878         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2879 }
2880
2881 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2882 {
2883         switch (hw->mac.type) {
2884         case ixgbe_mac_82598EB:
2885                 if (hw->phy.type == ixgbe_phy_nl)
2886                         return true;
2887                 return false;
2888         case ixgbe_mac_82599EB:
2889         case ixgbe_mac_X550EM_x:
2890         case ixgbe_mac_x550em_a:
2891                 switch (hw->mac.ops.get_media_type(hw)) {
2892                 case ixgbe_media_type_fiber:
2893                 case ixgbe_media_type_fiber_qsfp:
2894                         return true;
2895                 default:
2896                         return false;
2897                 }
2898         default:
2899                 return false;
2900         }
2901 }
2902
2903 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2904 {
2905         struct ixgbe_hw *hw = &adapter->hw;
2906         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2907
2908         if (!ixgbe_is_sfp(hw))
2909                 return;
2910
2911         /* Later MAC's use different SDP */
2912         if (hw->mac.type >= ixgbe_mac_X540)
2913                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2914
2915         if (eicr & eicr_mask) {
2916                 /* Clear the interrupt */
2917                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2918                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2919                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2920                         adapter->sfp_poll_time = 0;
2921                         ixgbe_service_event_schedule(adapter);
2922                 }
2923         }
2924
2925         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2926             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2927                 /* Clear the interrupt */
2928                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2929                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2930                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2931                         ixgbe_service_event_schedule(adapter);
2932                 }
2933         }
2934 }
2935
2936 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2937 {
2938         struct ixgbe_hw *hw = &adapter->hw;
2939
2940         adapter->lsc_int++;
2941         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2942         adapter->link_check_timeout = jiffies;
2943         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2944                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2945                 IXGBE_WRITE_FLUSH(hw);
2946                 ixgbe_service_event_schedule(adapter);
2947         }
2948 }
2949
2950 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2951                                            u64 qmask)
2952 {
2953         u32 mask;
2954         struct ixgbe_hw *hw = &adapter->hw;
2955
2956         switch (hw->mac.type) {
2957         case ixgbe_mac_82598EB:
2958                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2959                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2960                 break;
2961         case ixgbe_mac_82599EB:
2962         case ixgbe_mac_X540:
2963         case ixgbe_mac_X550:
2964         case ixgbe_mac_X550EM_x:
2965         case ixgbe_mac_x550em_a:
2966                 mask = (qmask & 0xFFFFFFFF);
2967                 if (mask)
2968                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2969                 mask = (qmask >> 32);
2970                 if (mask)
2971                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2972                 break;
2973         default:
2974                 break;
2975         }
2976         /* skip the flush */
2977 }
2978
2979 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2980                                             u64 qmask)
2981 {
2982         u32 mask;
2983         struct ixgbe_hw *hw = &adapter->hw;
2984
2985         switch (hw->mac.type) {
2986         case ixgbe_mac_82598EB:
2987                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2988                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2989                 break;
2990         case ixgbe_mac_82599EB:
2991         case ixgbe_mac_X540:
2992         case ixgbe_mac_X550:
2993         case ixgbe_mac_X550EM_x:
2994         case ixgbe_mac_x550em_a:
2995                 mask = (qmask & 0xFFFFFFFF);
2996                 if (mask)
2997                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2998                 mask = (qmask >> 32);
2999                 if (mask)
3000                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
3001                 break;
3002         default:
3003                 break;
3004         }
3005         /* skip the flush */
3006 }
3007
3008 /**
3009  * ixgbe_irq_enable - Enable default interrupt generation settings
3010  * @adapter: board private structure
3011  **/
3012 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
3013                                     bool flush)
3014 {
3015         struct ixgbe_hw *hw = &adapter->hw;
3016         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
3017
3018         /* don't reenable LSC while waiting for link */
3019         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
3020                 mask &= ~IXGBE_EIMS_LSC;
3021
3022         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3023                 switch (adapter->hw.mac.type) {
3024                 case ixgbe_mac_82599EB:
3025                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3026                         break;
3027                 case ixgbe_mac_X540:
3028                 case ixgbe_mac_X550:
3029                 case ixgbe_mac_X550EM_x:
3030                 case ixgbe_mac_x550em_a:
3031                         mask |= IXGBE_EIMS_TS;
3032                         break;
3033                 default:
3034                         break;
3035                 }
3036         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3037                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3038         switch (adapter->hw.mac.type) {
3039         case ixgbe_mac_82599EB:
3040                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3041                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3042                 /* fall through */
3043         case ixgbe_mac_X540:
3044         case ixgbe_mac_X550:
3045         case ixgbe_mac_X550EM_x:
3046         case ixgbe_mac_x550em_a:
3047                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3048                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3049                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3050                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3051                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3052                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3053                 mask |= IXGBE_EIMS_ECC;
3054                 mask |= IXGBE_EIMS_MAILBOX;
3055                 break;
3056         default:
3057                 break;
3058         }
3059
3060         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3061             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3062                 mask |= IXGBE_EIMS_FLOW_DIR;
3063
3064         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3065         if (queues)
3066                 ixgbe_irq_enable_queues(adapter, ~0);
3067         if (flush)
3068                 IXGBE_WRITE_FLUSH(&adapter->hw);
3069 }
3070
3071 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3072 {
3073         struct ixgbe_adapter *adapter = data;
3074         struct ixgbe_hw *hw = &adapter->hw;
3075         u32 eicr;
3076
3077         /*
3078          * Workaround for Silicon errata.  Use clear-by-write instead
3079          * of clear-by-read.  Reading with EICS will return the
3080          * interrupt causes without clearing, which later be done
3081          * with the write to EICR.
3082          */
3083         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3084
3085         /* The lower 16bits of the EICR register are for the queue interrupts
3086          * which should be masked here in order to not accidentally clear them if
3087          * the bits are high when ixgbe_msix_other is called. There is a race
3088          * condition otherwise which results in possible performance loss
3089          * especially if the ixgbe_msix_other interrupt is triggering
3090          * consistently (as it would when PPS is turned on for the X540 device)
3091          */
3092         eicr &= 0xFFFF0000;
3093
3094         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3095
3096         if (eicr & IXGBE_EICR_LSC)
3097                 ixgbe_check_lsc(adapter);
3098
3099         if (eicr & IXGBE_EICR_MAILBOX)
3100                 ixgbe_msg_task(adapter);
3101
3102         switch (hw->mac.type) {
3103         case ixgbe_mac_82599EB:
3104         case ixgbe_mac_X540:
3105         case ixgbe_mac_X550:
3106         case ixgbe_mac_X550EM_x:
3107         case ixgbe_mac_x550em_a:
3108                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3109                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3110                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3111                         ixgbe_service_event_schedule(adapter);
3112                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3113                                         IXGBE_EICR_GPI_SDP0_X540);
3114                 }
3115                 if (eicr & IXGBE_EICR_ECC) {
3116                         e_info(link, "Received ECC Err, initiating reset\n");
3117                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3118                         ixgbe_service_event_schedule(adapter);
3119                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3120                 }
3121                 /* Handle Flow Director Full threshold interrupt */
3122                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3123                         int reinit_count = 0;
3124                         int i;
3125                         for (i = 0; i < adapter->num_tx_queues; i++) {
3126                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3127                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3128                                                        &ring->state))
3129                                         reinit_count++;
3130                         }
3131                         if (reinit_count) {
3132                                 /* no more flow director interrupts until after init */
3133                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3134                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3135                                 ixgbe_service_event_schedule(adapter);
3136                         }
3137                 }
3138                 ixgbe_check_sfp_event(adapter, eicr);
3139                 ixgbe_check_overtemp_event(adapter, eicr);
3140                 break;
3141         default:
3142                 break;
3143         }
3144
3145         ixgbe_check_fan_failure(adapter, eicr);
3146
3147         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3148                 ixgbe_ptp_check_pps_event(adapter);
3149
3150         /* re-enable the original interrupt state, no lsc, no queues */
3151         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3152                 ixgbe_irq_enable(adapter, false, false);
3153
3154         return IRQ_HANDLED;
3155 }
3156
3157 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3158 {
3159         struct ixgbe_q_vector *q_vector = data;
3160
3161         /* EIAM disabled interrupts (on this vector) for us */
3162
3163         if (q_vector->rx.ring || q_vector->tx.ring)
3164                 napi_schedule_irqoff(&q_vector->napi);
3165
3166         return IRQ_HANDLED;
3167 }
3168
3169 /**
3170  * ixgbe_poll - NAPI Rx polling callback
3171  * @napi: structure for representing this polling device
3172  * @budget: how many packets driver is allowed to clean
3173  *
3174  * This function is used for legacy and MSI, NAPI mode
3175  **/
3176 int ixgbe_poll(struct napi_struct *napi, int budget)
3177 {
3178         struct ixgbe_q_vector *q_vector =
3179                                 container_of(napi, struct ixgbe_q_vector, napi);
3180         struct ixgbe_adapter *adapter = q_vector->adapter;
3181         struct ixgbe_ring *ring;
3182         int per_ring_budget, work_done = 0;
3183         bool clean_complete = true;
3184
3185 #ifdef CONFIG_IXGBE_DCA
3186         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3187                 ixgbe_update_dca(q_vector);
3188 #endif
3189
3190         ixgbe_for_each_ring(ring, q_vector->tx) {
3191                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3192                         clean_complete = false;
3193         }
3194
3195         /* Exit if we are called by netpoll */
3196         if (budget <= 0)
3197                 return budget;
3198
3199         /* attempt to distribute budget to each queue fairly, but don't allow
3200          * the budget to go below 1 because we'll exit polling */
3201         if (q_vector->rx.count > 1)
3202                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3203         else
3204                 per_ring_budget = budget;
3205
3206         ixgbe_for_each_ring(ring, q_vector->rx) {
3207                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3208                                                  per_ring_budget);
3209
3210                 work_done += cleaned;
3211                 if (cleaned >= per_ring_budget)
3212                         clean_complete = false;
3213         }
3214
3215         /* If all work not completed, return budget and keep polling */
3216         if (!clean_complete)
3217                 return budget;
3218
3219         /* all work done, exit the polling mode */
3220         napi_complete_done(napi, work_done);
3221         if (adapter->rx_itr_setting & 1)
3222                 ixgbe_set_itr(q_vector);
3223         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3224                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3225
3226         return min(work_done, budget - 1);
3227 }
3228
3229 /**
3230  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3231  * @adapter: board private structure
3232  *
3233  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3234  * interrupts from the kernel.
3235  **/
3236 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3237 {
3238         struct net_device *netdev = adapter->netdev;
3239         unsigned int ri = 0, ti = 0;
3240         int vector, err;
3241
3242         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3243                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3244                 struct msix_entry *entry = &adapter->msix_entries[vector];
3245
3246                 if (q_vector->tx.ring && q_vector->rx.ring) {
3247                         snprintf(q_vector->name, sizeof(q_vector->name),
3248                                  "%s-TxRx-%u", netdev->name, ri++);
3249                         ti++;
3250                 } else if (q_vector->rx.ring) {
3251                         snprintf(q_vector->name, sizeof(q_vector->name),
3252                                  "%s-rx-%u", netdev->name, ri++);
3253                 } else if (q_vector->tx.ring) {
3254                         snprintf(q_vector->name, sizeof(q_vector->name),
3255                                  "%s-tx-%u", netdev->name, ti++);
3256                 } else {
3257                         /* skip this unused q_vector */
3258                         continue;
3259                 }
3260                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3261                                   q_vector->name, q_vector);
3262                 if (err) {
3263                         e_err(probe, "request_irq failed for MSIX interrupt "
3264                               "Error: %d\n", err);
3265                         goto free_queue_irqs;
3266                 }
3267                 /* If Flow Director is enabled, set interrupt affinity */
3268                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3269                         /* assign the mask for this irq */
3270                         irq_set_affinity_hint(entry->vector,
3271                                               &q_vector->affinity_mask);
3272                 }
3273         }
3274
3275         err = request_irq(adapter->msix_entries[vector].vector,
3276                           ixgbe_msix_other, 0, netdev->name, adapter);
3277         if (err) {
3278                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3279                 goto free_queue_irqs;
3280         }
3281
3282         return 0;
3283
3284 free_queue_irqs:
3285         while (vector) {
3286                 vector--;
3287                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3288                                       NULL);
3289                 free_irq(adapter->msix_entries[vector].vector,
3290                          adapter->q_vector[vector]);
3291         }
3292         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3293         pci_disable_msix(adapter->pdev);
3294         kfree(adapter->msix_entries);
3295         adapter->msix_entries = NULL;
3296         return err;
3297 }
3298
3299 /**
3300  * ixgbe_intr - legacy mode Interrupt Handler
3301  * @irq: interrupt number
3302  * @data: pointer to a network interface device structure
3303  **/
3304 static irqreturn_t ixgbe_intr(int irq, void *data)
3305 {
3306         struct ixgbe_adapter *adapter = data;
3307         struct ixgbe_hw *hw = &adapter->hw;
3308         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3309         u32 eicr;
3310
3311         /*
3312          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3313          * before the read of EICR.
3314          */
3315         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3316
3317         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3318          * therefore no explicit interrupt disable is necessary */
3319         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3320         if (!eicr) {
3321                 /*
3322                  * shared interrupt alert!
3323                  * make sure interrupts are enabled because the read will
3324                  * have disabled interrupts due to EIAM
3325                  * finish the workaround of silicon errata on 82598.  Unmask
3326                  * the interrupt that we masked before the EICR read.
3327                  */
3328                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3329                         ixgbe_irq_enable(adapter, true, true);
3330                 return IRQ_NONE;        /* Not our interrupt */
3331         }
3332
3333         if (eicr & IXGBE_EICR_LSC)
3334                 ixgbe_check_lsc(adapter);
3335
3336         switch (hw->mac.type) {
3337         case ixgbe_mac_82599EB:
3338                 ixgbe_check_sfp_event(adapter, eicr);
3339                 /* Fall through */
3340         case ixgbe_mac_X540:
3341         case ixgbe_mac_X550:
3342         case ixgbe_mac_X550EM_x:
3343         case ixgbe_mac_x550em_a:
3344                 if (eicr & IXGBE_EICR_ECC) {
3345                         e_info(link, "Received ECC Err, initiating reset\n");
3346                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3347                         ixgbe_service_event_schedule(adapter);
3348                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3349                 }
3350                 ixgbe_check_overtemp_event(adapter, eicr);
3351                 break;
3352         default:
3353                 break;
3354         }
3355
3356         ixgbe_check_fan_failure(adapter, eicr);
3357         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3358                 ixgbe_ptp_check_pps_event(adapter);
3359
3360         /* would disable interrupts here but EIAM disabled it */
3361         napi_schedule_irqoff(&q_vector->napi);
3362
3363         /*
3364          * re-enable link(maybe) and non-queue interrupts, no flush.
3365          * ixgbe_poll will re-enable the queue interrupts
3366          */
3367         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3368                 ixgbe_irq_enable(adapter, false, false);
3369
3370         return IRQ_HANDLED;
3371 }
3372
3373 /**
3374  * ixgbe_request_irq - initialize interrupts
3375  * @adapter: board private structure
3376  *
3377  * Attempts to configure interrupts using the best available
3378  * capabilities of the hardware and kernel.
3379  **/
3380 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3381 {
3382         struct net_device *netdev = adapter->netdev;
3383         int err;
3384
3385         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3386                 err = ixgbe_request_msix_irqs(adapter);
3387         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3388                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3389                                   netdev->name, adapter);
3390         else
3391                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3392                                   netdev->name, adapter);
3393
3394         if (err)
3395                 e_err(probe, "request_irq failed, Error %d\n", err);
3396
3397         return err;
3398 }
3399
3400 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3401 {
3402         int vector;
3403
3404         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3405                 free_irq(adapter->pdev->irq, adapter);
3406                 return;
3407         }
3408
3409         if (!adapter->msix_entries)
3410                 return;
3411
3412         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3413                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3414                 struct msix_entry *entry = &adapter->msix_entries[vector];
3415
3416                 /* free only the irqs that were actually requested */
3417                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3418                         continue;
3419
3420                 /* clear the affinity_mask in the IRQ descriptor */
3421                 irq_set_affinity_hint(entry->vector, NULL);
3422
3423                 free_irq(entry->vector, q_vector);
3424         }
3425
3426         free_irq(adapter->msix_entries[vector].vector, adapter);
3427 }
3428
3429 /**
3430  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3431  * @adapter: board private structure
3432  **/
3433 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3434 {
3435         switch (adapter->hw.mac.type) {
3436         case ixgbe_mac_82598EB:
3437                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3438                 break;
3439         case ixgbe_mac_82599EB:
3440         case ixgbe_mac_X540:
3441         case ixgbe_mac_X550:
3442         case ixgbe_mac_X550EM_x:
3443         case ixgbe_mac_x550em_a:
3444                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3445                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3446                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3447                 break;
3448         default:
3449                 break;
3450         }
3451         IXGBE_WRITE_FLUSH(&adapter->hw);
3452         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3453                 int vector;
3454
3455                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3456                         synchronize_irq(adapter->msix_entries[vector].vector);
3457
3458                 synchronize_irq(adapter->msix_entries[vector++].vector);
3459         } else {
3460                 synchronize_irq(adapter->pdev->irq);
3461         }
3462 }
3463
3464 /**
3465  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3466  *
3467  **/
3468 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3469 {
3470         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3471
3472         ixgbe_write_eitr(q_vector);
3473
3474         ixgbe_set_ivar(adapter, 0, 0, 0);
3475         ixgbe_set_ivar(adapter, 1, 0, 0);
3476
3477         e_info(hw, "Legacy interrupt IVAR setup done\n");
3478 }
3479
3480 /**
3481  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3482  * @adapter: board private structure
3483  * @ring: structure containing ring specific data
3484  *
3485  * Configure the Tx descriptor ring after a reset.
3486  **/
3487 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3488                              struct ixgbe_ring *ring)
3489 {
3490         struct ixgbe_hw *hw = &adapter->hw;
3491         u64 tdba = ring->dma;
3492         int wait_loop = 10;
3493         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3494         u8 reg_idx = ring->reg_idx;
3495
3496         /* disable queue to avoid issues while updating state */
3497         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3498         IXGBE_WRITE_FLUSH(hw);
3499
3500         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3501                         (tdba & DMA_BIT_MASK(32)));
3502         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3503         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3504                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3505         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3506         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3507         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3508
3509         /*
3510          * set WTHRESH to encourage burst writeback, it should not be set
3511          * higher than 1 when:
3512          * - ITR is 0 as it could cause false TX hangs
3513          * - ITR is set to > 100k int/sec and BQL is enabled
3514          *
3515          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3516          * to or less than the number of on chip descriptors, which is
3517          * currently 40.
3518          */
3519         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3520                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3521         else
3522                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3523
3524         /*
3525          * Setting PTHRESH to 32 both improves performance
3526          * and avoids a TX hang with DFP enabled
3527          */
3528         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3529                    32;          /* PTHRESH = 32 */
3530
3531         /* reinitialize flowdirector state */
3532         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3533                 ring->atr_sample_rate = adapter->atr_sample_rate;
3534                 ring->atr_count = 0;
3535                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3536         } else {
3537                 ring->atr_sample_rate = 0;
3538         }
3539
3540         /* initialize XPS */
3541         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3542                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3543
3544                 if (q_vector)
3545                         netif_set_xps_queue(ring->netdev,
3546                                             &q_vector->affinity_mask,
3547                                             ring->queue_index);
3548         }
3549
3550         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3551
3552         /* reinitialize tx_buffer_info */
3553         memset(ring->tx_buffer_info, 0,
3554                sizeof(struct ixgbe_tx_buffer) * ring->count);
3555
3556         /* enable queue */
3557         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3558
3559         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3560         if (hw->mac.type == ixgbe_mac_82598EB &&
3561             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3562                 return;
3563
3564         /* poll to verify queue is enabled */
3565         do {
3566                 usleep_range(1000, 2000);
3567                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3568         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3569         if (!wait_loop)
3570                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3571 }
3572
3573 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3574 {
3575         struct ixgbe_hw *hw = &adapter->hw;
3576         u32 rttdcs, mtqc;
3577         u8 tcs = netdev_get_num_tc(adapter->netdev);
3578
3579         if (hw->mac.type == ixgbe_mac_82598EB)
3580                 return;
3581
3582         /* disable the arbiter while setting MTQC */
3583         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3584         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3585         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3586
3587         /* set transmit pool layout */
3588         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3589                 mtqc = IXGBE_MTQC_VT_ENA;
3590                 if (tcs > 4)
3591                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3592                 else if (tcs > 1)
3593                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3594                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3595                          IXGBE_82599_VMDQ_4Q_MASK)
3596                         mtqc |= IXGBE_MTQC_32VF;
3597                 else
3598                         mtqc |= IXGBE_MTQC_64VF;
3599         } else {
3600                 if (tcs > 4)
3601                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3602                 else if (tcs > 1)
3603                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3604                 else
3605                         mtqc = IXGBE_MTQC_64Q_1PB;
3606         }
3607
3608         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3609
3610         /* Enable Security TX Buffer IFG for multiple pb */
3611         if (tcs) {
3612                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3613                 sectx |= IXGBE_SECTX_DCB;
3614                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3615         }
3616
3617         /* re-enable the arbiter */
3618         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3619         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3620 }
3621
3622 /**
3623  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3624  * @adapter: board private structure
3625  *
3626  * Configure the Tx unit of the MAC after a reset.
3627  **/
3628 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3629 {
3630         struct ixgbe_hw *hw = &adapter->hw;
3631         u32 dmatxctl;
3632         u32 i;
3633
3634         ixgbe_setup_mtqc(adapter);
3635
3636         if (hw->mac.type != ixgbe_mac_82598EB) {
3637                 /* DMATXCTL.EN must be before Tx queues are enabled */
3638                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3639                 dmatxctl |= IXGBE_DMATXCTL_TE;
3640                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3641         }
3642
3643         /* Setup the HW Tx Head and Tail descriptor pointers */
3644         for (i = 0; i < adapter->num_tx_queues; i++)
3645                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3646         for (i = 0; i < adapter->num_xdp_queues; i++)
3647                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3648 }
3649
3650 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3651                                  struct ixgbe_ring *ring)
3652 {
3653         struct ixgbe_hw *hw = &adapter->hw;
3654         u8 reg_idx = ring->reg_idx;
3655         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3656
3657         srrctl |= IXGBE_SRRCTL_DROP_EN;
3658
3659         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3660 }
3661
3662 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3663                                   struct ixgbe_ring *ring)
3664 {
3665         struct ixgbe_hw *hw = &adapter->hw;
3666         u8 reg_idx = ring->reg_idx;
3667         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3668
3669         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3670
3671         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3672 }
3673
3674 #ifdef CONFIG_IXGBE_DCB
3675 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3676 #else
3677 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3678 #endif
3679 {
3680         int i;
3681         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3682
3683         if (adapter->ixgbe_ieee_pfc)
3684                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3685
3686         /*
3687          * We should set the drop enable bit if:
3688          *  SR-IOV is enabled
3689          *   or
3690          *  Number of Rx queues > 1 and flow control is disabled
3691          *
3692          *  This allows us to avoid head of line blocking for security
3693          *  and performance reasons.
3694          */
3695         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3696             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3697                 for (i = 0; i < adapter->num_rx_queues; i++)
3698                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3699         } else {
3700                 for (i = 0; i < adapter->num_rx_queues; i++)
3701                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3702         }
3703 }
3704
3705 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3706
3707 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3708                                    struct ixgbe_ring *rx_ring)
3709 {
3710         struct ixgbe_hw *hw = &adapter->hw;
3711         u32 srrctl;
3712         u8 reg_idx = rx_ring->reg_idx;
3713
3714         if (hw->mac.type == ixgbe_mac_82598EB) {
3715                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3716
3717                 /*
3718                  * if VMDq is not active we must program one srrctl register
3719                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3720                  */
3721                 reg_idx &= mask;
3722         }
3723
3724         /* configure header buffer length, needed for RSC */
3725         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3726
3727         /* configure the packet buffer length */
3728         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3729                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3730         else
3731                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3732
3733         /* configure descriptor type */
3734         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3735
3736         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3737 }
3738
3739 /**
3740  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3741  * @adapter: device handle
3742  *
3743  *  - 82598/82599/X540:     128
3744  *  - X550(non-SRIOV mode): 512
3745  *  - X550(SRIOV mode):     64
3746  */
3747 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3748 {
3749         if (adapter->hw.mac.type < ixgbe_mac_X550)
3750                 return 128;
3751         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3752                 return 64;
3753         else
3754                 return 512;
3755 }
3756
3757 /**
3758  * ixgbe_store_key - Write the RSS key to HW
3759  * @adapter: device handle
3760  *
3761  * Write the RSS key stored in adapter.rss_key to HW.
3762  */
3763 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3764 {
3765         struct ixgbe_hw *hw = &adapter->hw;
3766         int i;
3767
3768         for (i = 0; i < 10; i++)
3769                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3770 }
3771
3772 /**
3773  * ixgbe_init_rss_key - Initialize adapter RSS key
3774  * @adapter: device handle
3775  *
3776  * Allocates and initializes the RSS key if it is not allocated.
3777  **/
3778 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3779 {
3780         u32 *rss_key;
3781
3782         if (!adapter->rss_key) {
3783                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3784                 if (unlikely(!rss_key))
3785                         return -ENOMEM;
3786
3787                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3788                 adapter->rss_key = rss_key;
3789         }
3790
3791         return 0;
3792 }
3793
3794 /**
3795  * ixgbe_store_reta - Write the RETA table to HW
3796  * @adapter: device handle
3797  *
3798  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3799  */
3800 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3801 {
3802         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3803         struct ixgbe_hw *hw = &adapter->hw;
3804         u32 reta = 0;
3805         u32 indices_multi;
3806         u8 *indir_tbl = adapter->rss_indir_tbl;
3807
3808         /* Fill out the redirection table as follows:
3809          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3810          *    indices.
3811          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3812          *  - X550:       8 bit wide entries containing 6 bit RSS index
3813          */
3814         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3815                 indices_multi = 0x11;
3816         else
3817                 indices_multi = 0x1;
3818
3819         /* Write redirection table to HW */
3820         for (i = 0; i < reta_entries; i++) {
3821                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3822                 if ((i & 3) == 3) {
3823                         if (i < 128)
3824                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3825                         else
3826                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3827                                                 reta);
3828                         reta = 0;
3829                 }
3830         }
3831 }
3832
3833 /**
3834  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3835  * @adapter: device handle
3836  *
3837  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3838  */
3839 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3840 {
3841         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3842         struct ixgbe_hw *hw = &adapter->hw;
3843         u32 vfreta = 0;
3844
3845         /* Write redirection table to HW */
3846         for (i = 0; i < reta_entries; i++) {
3847                 u16 pool = adapter->num_rx_pools;
3848
3849                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3850                 if ((i & 3) != 3)
3851                         continue;
3852
3853                 while (pool--)
3854                         IXGBE_WRITE_REG(hw,
3855                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3856                                         vfreta);
3857                 vfreta = 0;
3858         }
3859 }
3860
3861 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3862 {
3863         u32 i, j;
3864         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3865         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3866
3867         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3868          * make full use of any rings they may have.  We will use the
3869          * PSRTYPE register to control how many rings we use within the PF.
3870          */
3871         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3872                 rss_i = 4;
3873
3874         /* Fill out hash function seeds */
3875         ixgbe_store_key(adapter);
3876
3877         /* Fill out redirection table */
3878         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3879
3880         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3881                 if (j == rss_i)
3882                         j = 0;
3883
3884                 adapter->rss_indir_tbl[i] = j;
3885         }
3886
3887         ixgbe_store_reta(adapter);
3888 }
3889
3890 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3891 {
3892         struct ixgbe_hw *hw = &adapter->hw;
3893         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3894         int i, j;
3895
3896         /* Fill out hash function seeds */
3897         for (i = 0; i < 10; i++) {
3898                 u16 pool = adapter->num_rx_pools;
3899
3900                 while (pool--)
3901                         IXGBE_WRITE_REG(hw,
3902                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3903                                         *(adapter->rss_key + i));
3904         }
3905
3906         /* Fill out the redirection table */
3907         for (i = 0, j = 0; i < 64; i++, j++) {
3908                 if (j == rss_i)
3909                         j = 0;
3910
3911                 adapter->rss_indir_tbl[i] = j;
3912         }
3913
3914         ixgbe_store_vfreta(adapter);
3915 }
3916
3917 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3918 {
3919         struct ixgbe_hw *hw = &adapter->hw;
3920         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3921         u32 rxcsum;
3922
3923         /* Disable indicating checksum in descriptor, enables RSS hash */
3924         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3925         rxcsum |= IXGBE_RXCSUM_PCSD;
3926         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3927
3928         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3929                 if (adapter->ring_feature[RING_F_RSS].mask)
3930                         mrqc = IXGBE_MRQC_RSSEN;
3931         } else {
3932                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3933
3934                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3935                         if (tcs > 4)
3936                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3937                         else if (tcs > 1)
3938                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3939                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3940                                  IXGBE_82599_VMDQ_4Q_MASK)
3941                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3942                         else
3943                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3944
3945                         /* Enable L3/L4 for Tx Switched packets */
3946                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3947                 } else {
3948                         if (tcs > 4)
3949                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3950                         else if (tcs > 1)
3951                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3952                         else
3953                                 mrqc = IXGBE_MRQC_RSSEN;
3954                 }
3955         }
3956
3957         /* Perform hash on these packet types */
3958         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3959                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3960                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3961                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3962
3963         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3964                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3965         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3966                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3967
3968         if ((hw->mac.type >= ixgbe_mac_X550) &&
3969             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3970                 u16 pool = adapter->num_rx_pools;
3971
3972                 /* Enable VF RSS mode */
3973                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3974                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3975
3976                 /* Setup RSS through the VF registers */
3977                 ixgbe_setup_vfreta(adapter);
3978                 vfmrqc = IXGBE_MRQC_RSSEN;
3979                 vfmrqc |= rss_field;
3980
3981                 while (pool--)
3982                         IXGBE_WRITE_REG(hw,
3983                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3984                                         vfmrqc);
3985         } else {
3986                 ixgbe_setup_reta(adapter);
3987                 mrqc |= rss_field;
3988                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3989         }
3990 }
3991
3992 /**
3993  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3994  * @adapter:    address of board private structure
3995  * @index:      index of ring to set
3996  **/
3997 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3998                                    struct ixgbe_ring *ring)
3999 {
4000         struct ixgbe_hw *hw = &adapter->hw;
4001         u32 rscctrl;
4002         u8 reg_idx = ring->reg_idx;
4003
4004         if (!ring_is_rsc_enabled(ring))
4005                 return;
4006
4007         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4008         rscctrl |= IXGBE_RSCCTL_RSCEN;
4009         /*
4010          * we must limit the number of descriptors so that the
4011          * total size of max desc * buf_len is not greater
4012          * than 65536
4013          */
4014         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4015         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4016 }
4017
4018 #define IXGBE_MAX_RX_DESC_POLL 10
4019 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4020                                        struct ixgbe_ring *ring)
4021 {
4022         struct ixgbe_hw *hw = &adapter->hw;
4023         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4024         u32 rxdctl;
4025         u8 reg_idx = ring->reg_idx;
4026
4027         if (ixgbe_removed(hw->hw_addr))
4028                 return;
4029         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4030         if (hw->mac.type == ixgbe_mac_82598EB &&
4031             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4032                 return;
4033
4034         do {
4035                 usleep_range(1000, 2000);
4036                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4037         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4038
4039         if (!wait_loop) {
4040                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4041                       "the polling period\n", reg_idx);
4042         }
4043 }
4044
4045 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
4046                             struct ixgbe_ring *ring)
4047 {
4048         struct ixgbe_hw *hw = &adapter->hw;
4049         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4050         u32 rxdctl;
4051         u8 reg_idx = ring->reg_idx;
4052
4053         if (ixgbe_removed(hw->hw_addr))
4054                 return;
4055         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4056         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4057
4058         /* write value back with RXDCTL.ENABLE bit cleared */
4059         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4060
4061         if (hw->mac.type == ixgbe_mac_82598EB &&
4062             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4063                 return;
4064
4065         /* the hardware may take up to 100us to really disable the rx queue */
4066         do {
4067                 udelay(10);
4068                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4069         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
4070
4071         if (!wait_loop) {
4072                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
4073                       "the polling period\n", reg_idx);
4074         }
4075 }
4076
4077 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4078                              struct ixgbe_ring *ring)
4079 {
4080         struct ixgbe_hw *hw = &adapter->hw;
4081         union ixgbe_adv_rx_desc *rx_desc;
4082         u64 rdba = ring->dma;
4083         u32 rxdctl;
4084         u8 reg_idx = ring->reg_idx;
4085
4086         /* disable queue to avoid issues while updating state */
4087         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4088         ixgbe_disable_rx_queue(adapter, ring);
4089
4090         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4091         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4092         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4093                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4094         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4095         IXGBE_WRITE_FLUSH(hw);
4096
4097         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4098         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4099         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4100
4101         ixgbe_configure_srrctl(adapter, ring);
4102         ixgbe_configure_rscctl(adapter, ring);
4103
4104         if (hw->mac.type == ixgbe_mac_82598EB) {
4105                 /*
4106                  * enable cache line friendly hardware writes:
4107                  * PTHRESH=32 descriptors (half the internal cache),
4108                  * this also removes ugly rx_no_buffer_count increment
4109                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4110                  * WTHRESH=8 burst writeback up to two cache lines
4111                  */
4112                 rxdctl &= ~0x3FFFFF;
4113                 rxdctl |=  0x080420;
4114 #if (PAGE_SIZE < 8192)
4115         } else {
4116                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4117                             IXGBE_RXDCTL_RLPML_EN);
4118
4119                 /* Limit the maximum frame size so we don't overrun the skb */
4120                 if (ring_uses_build_skb(ring) &&
4121                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4122                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4123                                   IXGBE_RXDCTL_RLPML_EN;
4124 #endif
4125         }
4126
4127         /* initialize rx_buffer_info */
4128         memset(ring->rx_buffer_info, 0,
4129                sizeof(struct ixgbe_rx_buffer) * ring->count);
4130
4131         /* initialize Rx descriptor 0 */
4132         rx_desc = IXGBE_RX_DESC(ring, 0);
4133         rx_desc->wb.upper.length = 0;
4134
4135         /* enable receive descriptor ring */
4136         rxdctl |= IXGBE_RXDCTL_ENABLE;
4137         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4138
4139         ixgbe_rx_desc_queue_enable(adapter, ring);
4140         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4141 }
4142
4143 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4144 {
4145         struct ixgbe_hw *hw = &adapter->hw;
4146         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4147         u16 pool = adapter->num_rx_pools;
4148
4149         /* PSRTYPE must be initialized in non 82598 adapters */
4150         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4151                       IXGBE_PSRTYPE_UDPHDR |
4152                       IXGBE_PSRTYPE_IPV4HDR |
4153                       IXGBE_PSRTYPE_L2HDR |
4154                       IXGBE_PSRTYPE_IPV6HDR;
4155
4156         if (hw->mac.type == ixgbe_mac_82598EB)
4157                 return;
4158
4159         if (rss_i > 3)
4160                 psrtype |= 2u << 29;
4161         else if (rss_i > 1)
4162                 psrtype |= 1u << 29;
4163
4164         while (pool--)
4165                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4166 }
4167
4168 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4169 {
4170         struct ixgbe_hw *hw = &adapter->hw;
4171         u32 reg_offset, vf_shift;
4172         u32 gcr_ext, vmdctl;
4173         int i;
4174
4175         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4176                 return;
4177
4178         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4179         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4180         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4181         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4182         vmdctl |= IXGBE_VT_CTL_REPLEN;
4183         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4184
4185         vf_shift = VMDQ_P(0) % 32;
4186         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4187
4188         /* Enable only the PF's pool for Tx/Rx */
4189         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4190         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4191         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4192         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4193         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4194                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4195
4196         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4197         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4198
4199         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4200         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4201
4202         /*
4203          * Set up VF register offsets for selected VT Mode,
4204          * i.e. 32 or 64 VFs for SR-IOV
4205          */
4206         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4207         case IXGBE_82599_VMDQ_8Q_MASK:
4208                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4209                 break;
4210         case IXGBE_82599_VMDQ_4Q_MASK:
4211                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4212                 break;
4213         default:
4214                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4215                 break;
4216         }
4217
4218         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4219
4220         for (i = 0; i < adapter->num_vfs; i++) {
4221                 /* configure spoof checking */
4222                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4223                                           adapter->vfinfo[i].spoofchk_enabled);
4224
4225                 /* Enable/Disable RSS query feature  */
4226                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4227                                           adapter->vfinfo[i].rss_query_enabled);
4228         }
4229 }
4230
4231 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4232 {
4233         struct ixgbe_hw *hw = &adapter->hw;
4234         struct net_device *netdev = adapter->netdev;
4235         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4236         struct ixgbe_ring *rx_ring;
4237         int i;
4238         u32 mhadd, hlreg0;
4239
4240 #ifdef IXGBE_FCOE
4241         /* adjust max frame to be able to do baby jumbo for FCoE */
4242         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4243             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4244                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4245
4246 #endif /* IXGBE_FCOE */
4247
4248         /* adjust max frame to be at least the size of a standard frame */
4249         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4250                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4251
4252         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4253         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4254                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4255                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4256
4257                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4258         }
4259
4260         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4261         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4262         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4263         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4264
4265         /*
4266          * Setup the HW Rx Head and Tail Descriptor Pointers and
4267          * the Base and Length of the Rx Descriptor Ring
4268          */
4269         for (i = 0; i < adapter->num_rx_queues; i++) {
4270                 rx_ring = adapter->rx_ring[i];
4271
4272                 clear_ring_rsc_enabled(rx_ring);
4273                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4274                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4275
4276                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4277                         set_ring_rsc_enabled(rx_ring);
4278
4279                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4280                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4281
4282                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4283                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4284                         continue;
4285
4286                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4287
4288 #if (PAGE_SIZE < 8192)
4289                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4290                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4291
4292                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4293                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4294                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4295 #endif
4296         }
4297 }
4298
4299 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4300 {
4301         struct ixgbe_hw *hw = &adapter->hw;
4302         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4303
4304         switch (hw->mac.type) {
4305         case ixgbe_mac_82598EB:
4306                 /*
4307                  * For VMDq support of different descriptor types or
4308                  * buffer sizes through the use of multiple SRRCTL
4309                  * registers, RDRXCTL.MVMEN must be set to 1
4310                  *
4311                  * also, the manual doesn't mention it clearly but DCA hints
4312                  * will only use queue 0's tags unless this bit is set.  Side
4313                  * effects of setting this bit are only that SRRCTL must be
4314                  * fully programmed [0..15]
4315                  */
4316                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4317                 break;
4318         case ixgbe_mac_X550:
4319         case ixgbe_mac_X550EM_x:
4320         case ixgbe_mac_x550em_a:
4321                 if (adapter->num_vfs)
4322                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4323                 /* fall through */
4324         case ixgbe_mac_82599EB:
4325         case ixgbe_mac_X540:
4326                 /* Disable RSC for ACK packets */
4327                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4328                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4329                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4330                 /* hardware requires some bits to be set by default */
4331                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4332                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4333                 break;
4334         default:
4335                 /* We should do nothing since we don't know this hardware */
4336                 return;
4337         }
4338
4339         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4340 }
4341
4342 /**
4343  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4344  * @adapter: board private structure
4345  *
4346  * Configure the Rx unit of the MAC after a reset.
4347  **/
4348 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4349 {
4350         struct ixgbe_hw *hw = &adapter->hw;
4351         int i;
4352         u32 rxctrl, rfctl;
4353
4354         /* disable receives while setting up the descriptors */
4355         hw->mac.ops.disable_rx(hw);
4356
4357         ixgbe_setup_psrtype(adapter);
4358         ixgbe_setup_rdrxctl(adapter);
4359
4360         /* RSC Setup */
4361         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4362         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4363         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4364                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4365
4366         /* disable NFS filtering */
4367         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4368         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4369
4370         /* Program registers for the distribution of queues */
4371         ixgbe_setup_mrqc(adapter);
4372
4373         /* set_rx_buffer_len must be called before ring initialization */
4374         ixgbe_set_rx_buffer_len(adapter);
4375
4376         /*
4377          * Setup the HW Rx Head and Tail Descriptor Pointers and
4378          * the Base and Length of the Rx Descriptor Ring
4379          */
4380         for (i = 0; i < adapter->num_rx_queues; i++)
4381                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4382
4383         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4384         /* disable drop enable for 82598 parts */
4385         if (hw->mac.type == ixgbe_mac_82598EB)
4386                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4387
4388         /* enable all receives */
4389         rxctrl |= IXGBE_RXCTRL_RXEN;
4390         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4391 }
4392
4393 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4394                                  __be16 proto, u16 vid)
4395 {
4396         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4397         struct ixgbe_hw *hw = &adapter->hw;
4398
4399         /* add VID to filter table */
4400         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4401                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4402
4403         set_bit(vid, adapter->active_vlans);
4404
4405         return 0;
4406 }
4407
4408 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4409 {
4410         u32 vlvf;
4411         int idx;
4412
4413         /* short cut the special case */
4414         if (vlan == 0)
4415                 return 0;
4416
4417         /* Search for the vlan id in the VLVF entries */
4418         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4419                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4420                 if ((vlvf & VLAN_VID_MASK) == vlan)
4421                         break;
4422         }
4423
4424         return idx;
4425 }
4426
4427 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4428 {
4429         struct ixgbe_hw *hw = &adapter->hw;
4430         u32 bits, word;
4431         int idx;
4432
4433         idx = ixgbe_find_vlvf_entry(hw, vid);
4434         if (!idx)
4435                 return;
4436
4437         /* See if any other pools are set for this VLAN filter
4438          * entry other than the PF.
4439          */
4440         word = idx * 2 + (VMDQ_P(0) / 32);
4441         bits = ~BIT(VMDQ_P(0) % 32);
4442         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4443
4444         /* Disable the filter so this falls into the default pool. */
4445         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4446                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4447                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4448                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4449         }
4450 }
4451
4452 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4453                                   __be16 proto, u16 vid)
4454 {
4455         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4456         struct ixgbe_hw *hw = &adapter->hw;
4457
4458         /* remove VID from filter table */
4459         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4460                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4461
4462         clear_bit(vid, adapter->active_vlans);
4463
4464         return 0;
4465 }
4466
4467 /**
4468  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4469  * @adapter: driver data
4470  */
4471 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4472 {
4473         struct ixgbe_hw *hw = &adapter->hw;
4474         u32 vlnctrl;
4475         int i, j;
4476
4477         switch (hw->mac.type) {
4478         case ixgbe_mac_82598EB:
4479                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4480                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4481                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4482                 break;
4483         case ixgbe_mac_82599EB:
4484         case ixgbe_mac_X540:
4485         case ixgbe_mac_X550:
4486         case ixgbe_mac_X550EM_x:
4487         case ixgbe_mac_x550em_a:
4488                 for (i = 0; i < adapter->num_rx_queues; i++) {
4489                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4490
4491                         if (!netif_is_ixgbe(ring->netdev))
4492                                 continue;
4493
4494                         j = ring->reg_idx;
4495                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4496                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4497                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4498                 }
4499                 break;
4500         default:
4501                 break;
4502         }
4503 }
4504
4505 /**
4506  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4507  * @adapter: driver data
4508  */
4509 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4510 {
4511         struct ixgbe_hw *hw = &adapter->hw;
4512         u32 vlnctrl;
4513         int i, j;
4514
4515         switch (hw->mac.type) {
4516         case ixgbe_mac_82598EB:
4517                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4518                 vlnctrl |= IXGBE_VLNCTRL_VME;
4519                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4520                 break;
4521         case ixgbe_mac_82599EB:
4522         case ixgbe_mac_X540:
4523         case ixgbe_mac_X550:
4524         case ixgbe_mac_X550EM_x:
4525         case ixgbe_mac_x550em_a:
4526                 for (i = 0; i < adapter->num_rx_queues; i++) {
4527                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4528
4529                         if (!netif_is_ixgbe(ring->netdev))
4530                                 continue;
4531
4532                         j = ring->reg_idx;
4533                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4534                         vlnctrl |= IXGBE_RXDCTL_VME;
4535                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4536                 }
4537                 break;
4538         default:
4539                 break;
4540         }
4541 }
4542
4543 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4544 {
4545         struct ixgbe_hw *hw = &adapter->hw;
4546         u32 vlnctrl, i;
4547
4548         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4549
4550         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4551         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4552                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4553                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4554         } else {
4555                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4556                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4557                 return;
4558         }
4559
4560         /* Nothing to do for 82598 */
4561         if (hw->mac.type == ixgbe_mac_82598EB)
4562                 return;
4563
4564         /* We are already in VLAN promisc, nothing to do */
4565         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4566                 return;
4567
4568         /* Set flag so we don't redo unnecessary work */
4569         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4570
4571         /* Add PF to all active pools */
4572         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4573                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4574                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4575
4576                 vlvfb |= BIT(VMDQ_P(0) % 32);
4577                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4578         }
4579
4580         /* Set all bits in the VLAN filter table array */
4581         for (i = hw->mac.vft_size; i--;)
4582                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4583 }
4584
4585 #define VFTA_BLOCK_SIZE 8
4586 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4587 {
4588         struct ixgbe_hw *hw = &adapter->hw;
4589         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4590         u32 vid_start = vfta_offset * 32;
4591         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4592         u32 i, vid, word, bits;
4593
4594         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4595                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4596
4597                 /* pull VLAN ID from VLVF */
4598                 vid = vlvf & VLAN_VID_MASK;
4599
4600                 /* only concern outselves with a certain range */
4601                 if (vid < vid_start || vid >= vid_end)
4602                         continue;
4603
4604                 if (vlvf) {
4605                         /* record VLAN ID in VFTA */
4606                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4607
4608                         /* if PF is part of this then continue */
4609                         if (test_bit(vid, adapter->active_vlans))
4610                                 continue;
4611                 }
4612
4613                 /* remove PF from the pool */
4614                 word = i * 2 + VMDQ_P(0) / 32;
4615                 bits = ~BIT(VMDQ_P(0) % 32);
4616                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4617                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4618         }
4619
4620         /* extract values from active_vlans and write back to VFTA */
4621         for (i = VFTA_BLOCK_SIZE; i--;) {
4622                 vid = (vfta_offset + i) * 32;
4623                 word = vid / BITS_PER_LONG;
4624                 bits = vid % BITS_PER_LONG;
4625
4626                 vfta[i] |= adapter->active_vlans[word] >> bits;
4627
4628                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4629         }
4630 }
4631
4632 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4633 {
4634         struct ixgbe_hw *hw = &adapter->hw;
4635         u32 vlnctrl, i;
4636
4637         /* Set VLAN filtering to enabled */
4638         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4639         vlnctrl |= IXGBE_VLNCTRL_VFE;
4640         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4641
4642         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4643             hw->mac.type == ixgbe_mac_82598EB)
4644                 return;
4645
4646         /* We are not in VLAN promisc, nothing to do */
4647         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4648                 return;
4649
4650         /* Set flag so we don't redo unnecessary work */
4651         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4652
4653         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4654                 ixgbe_scrub_vfta(adapter, i);
4655 }
4656
4657 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4658 {
4659         u16 vid = 1;
4660
4661         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4662
4663         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4664                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4665 }
4666
4667 /**
4668  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4669  * @netdev: network interface device structure
4670  *
4671  * Writes multicast address list to the MTA hash table.
4672  * Returns: -ENOMEM on failure
4673  *                0 on no addresses written
4674  *                X on writing X addresses to MTA
4675  **/
4676 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4677 {
4678         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4679         struct ixgbe_hw *hw = &adapter->hw;
4680
4681         if (!netif_running(netdev))
4682                 return 0;
4683
4684         if (hw->mac.ops.update_mc_addr_list)
4685                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4686         else
4687                 return -ENOMEM;
4688
4689 #ifdef CONFIG_PCI_IOV
4690         ixgbe_restore_vf_multicasts(adapter);
4691 #endif
4692
4693         return netdev_mc_count(netdev);
4694 }
4695
4696 #ifdef CONFIG_PCI_IOV
4697 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4698 {
4699         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4700         struct ixgbe_hw *hw = &adapter->hw;
4701         int i;
4702
4703         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4704                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4705
4706                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4707                         hw->mac.ops.set_rar(hw, i,
4708                                             mac_table->addr,
4709                                             mac_table->pool,
4710                                             IXGBE_RAH_AV);
4711                 else
4712                         hw->mac.ops.clear_rar(hw, i);
4713         }
4714 }
4715
4716 #endif
4717 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4718 {
4719         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4720         struct ixgbe_hw *hw = &adapter->hw;
4721         int i;
4722
4723         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4724                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4725                         continue;
4726
4727                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4728
4729                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4730                         hw->mac.ops.set_rar(hw, i,
4731                                             mac_table->addr,
4732                                             mac_table->pool,
4733                                             IXGBE_RAH_AV);
4734                 else
4735                         hw->mac.ops.clear_rar(hw, i);
4736         }
4737 }
4738
4739 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4740 {
4741         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4742         struct ixgbe_hw *hw = &adapter->hw;
4743         int i;
4744
4745         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4746                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4747                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4748         }
4749
4750         ixgbe_sync_mac_table(adapter);
4751 }
4752
4753 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4754 {
4755         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4756         struct ixgbe_hw *hw = &adapter->hw;
4757         int i, count = 0;
4758
4759         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4760                 /* do not count default RAR as available */
4761                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4762                         continue;
4763
4764                 /* only count unused and addresses that belong to us */
4765                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4766                         if (mac_table->pool != pool)
4767                                 continue;
4768                 }
4769
4770                 count++;
4771         }
4772
4773         return count;
4774 }
4775
4776 /* this function destroys the first RAR entry */
4777 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4778 {
4779         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4780         struct ixgbe_hw *hw = &adapter->hw;
4781
4782         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4783         mac_table->pool = VMDQ_P(0);
4784
4785         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4786
4787         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4788                             IXGBE_RAH_AV);
4789 }
4790
4791 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4792                          const u8 *addr, u16 pool)
4793 {
4794         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4795         struct ixgbe_hw *hw = &adapter->hw;
4796         int i;
4797
4798         if (is_zero_ether_addr(addr))
4799                 return -EINVAL;
4800
4801         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4802                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4803                         continue;
4804
4805                 ether_addr_copy(mac_table->addr, addr);
4806                 mac_table->pool = pool;
4807
4808                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4809                                     IXGBE_MAC_STATE_IN_USE;
4810
4811                 ixgbe_sync_mac_table(adapter);
4812
4813                 return i;
4814         }
4815
4816         return -ENOMEM;
4817 }
4818
4819 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4820                          const u8 *addr, u16 pool)
4821 {
4822         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4823         struct ixgbe_hw *hw = &adapter->hw;
4824         int i;
4825
4826         if (is_zero_ether_addr(addr))
4827                 return -EINVAL;
4828
4829         /* search table for addr, if found clear IN_USE flag and sync */
4830         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4831                 /* we can only delete an entry if it is in use */
4832                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4833                         continue;
4834                 /* we only care about entries that belong to the given pool */
4835                 if (mac_table->pool != pool)
4836                         continue;
4837                 /* we only care about a specific MAC address */
4838                 if (!ether_addr_equal(addr, mac_table->addr))
4839                         continue;
4840
4841                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4842                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4843
4844                 ixgbe_sync_mac_table(adapter);
4845
4846                 return 0;
4847         }
4848
4849         return -ENOMEM;
4850 }
4851 /**
4852  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4853  * @netdev: network interface device structure
4854  *
4855  * Writes unicast address list to the RAR table.
4856  * Returns: -ENOMEM on failure/insufficient address space
4857  *                0 on no addresses written
4858  *                X on writing X addresses to the RAR table
4859  **/
4860 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4861 {
4862         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4863         int count = 0;
4864
4865         /* return ENOMEM indicating insufficient memory for addresses */
4866         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4867                 return -ENOMEM;
4868
4869         if (!netdev_uc_empty(netdev)) {
4870                 struct netdev_hw_addr *ha;
4871                 netdev_for_each_uc_addr(ha, netdev) {
4872                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4873                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4874                         count++;
4875                 }
4876         }
4877         return count;
4878 }
4879
4880 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4881 {
4882         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4883         int ret;
4884
4885         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4886
4887         return min_t(int, ret, 0);
4888 }
4889
4890 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4891 {
4892         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4893
4894         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4895
4896         return 0;
4897 }
4898
4899 /**
4900  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4901  * @netdev: network interface device structure
4902  *
4903  * The set_rx_method entry point is called whenever the unicast/multicast
4904  * address list or the network interface flags are updated.  This routine is
4905  * responsible for configuring the hardware for proper unicast, multicast and
4906  * promiscuous mode.
4907  **/
4908 void ixgbe_set_rx_mode(struct net_device *netdev)
4909 {
4910         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4911         struct ixgbe_hw *hw = &adapter->hw;
4912         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4913         netdev_features_t features = netdev->features;
4914         int count;
4915
4916         /* Check for Promiscuous and All Multicast modes */
4917         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4918
4919         /* set all bits that we expect to always be set */
4920         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4921         fctrl |= IXGBE_FCTRL_BAM;
4922         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4923         fctrl |= IXGBE_FCTRL_PMCF;
4924
4925         /* clear the bits we are changing the status of */
4926         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4927         if (netdev->flags & IFF_PROMISC) {
4928                 hw->addr_ctrl.user_set_promisc = true;
4929                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4930                 vmolr |= IXGBE_VMOLR_MPE;
4931                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4932         } else {
4933                 if (netdev->flags & IFF_ALLMULTI) {
4934                         fctrl |= IXGBE_FCTRL_MPE;
4935                         vmolr |= IXGBE_VMOLR_MPE;
4936                 }
4937                 hw->addr_ctrl.user_set_promisc = false;
4938         }
4939
4940         /*
4941          * Write addresses to available RAR registers, if there is not
4942          * sufficient space to store all the addresses then enable
4943          * unicast promiscuous mode
4944          */
4945         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4946                 fctrl |= IXGBE_FCTRL_UPE;
4947                 vmolr |= IXGBE_VMOLR_ROPE;
4948         }
4949
4950         /* Write addresses to the MTA, if the attempt fails
4951          * then we should just turn on promiscuous mode so
4952          * that we can at least receive multicast traffic
4953          */
4954         count = ixgbe_write_mc_addr_list(netdev);
4955         if (count < 0) {
4956                 fctrl |= IXGBE_FCTRL_MPE;
4957                 vmolr |= IXGBE_VMOLR_MPE;
4958         } else if (count) {
4959                 vmolr |= IXGBE_VMOLR_ROMPE;
4960         }
4961
4962         if (hw->mac.type != ixgbe_mac_82598EB) {
4963                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4964                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4965                            IXGBE_VMOLR_ROPE);
4966                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4967         }
4968
4969         /* This is useful for sniffing bad packets. */
4970         if (features & NETIF_F_RXALL) {
4971                 /* UPE and MPE will be handled by normal PROMISC logic
4972                  * in e1000e_set_rx_mode */
4973                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4974                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4975                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4976
4977                 fctrl &= ~(IXGBE_FCTRL_DPF);
4978                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4979         }
4980
4981         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4982
4983         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4984                 ixgbe_vlan_strip_enable(adapter);
4985         else
4986                 ixgbe_vlan_strip_disable(adapter);
4987
4988         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4989                 ixgbe_vlan_promisc_disable(adapter);
4990         else
4991                 ixgbe_vlan_promisc_enable(adapter);
4992 }
4993
4994 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4995 {
4996         int q_idx;
4997
4998         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4999                 napi_enable(&adapter->q_vector[q_idx]->napi);
5000 }
5001
5002 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
5003 {
5004         int q_idx;
5005
5006         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5007                 napi_disable(&adapter->q_vector[q_idx]->napi);
5008 }
5009
5010 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5011 {
5012         struct ixgbe_hw *hw = &adapter->hw;
5013         u32 vxlanctrl;
5014
5015         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5016                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5017                 return;
5018
5019         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5020         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5021
5022         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5023                 adapter->vxlan_port = 0;
5024
5025         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5026                 adapter->geneve_port = 0;
5027 }
5028
5029 #ifdef CONFIG_IXGBE_DCB
5030 /**
5031  * ixgbe_configure_dcb - Configure DCB hardware
5032  * @adapter: ixgbe adapter struct
5033  *
5034  * This is called by the driver on open to configure the DCB hardware.
5035  * This is also called by the gennetlink interface when reconfiguring
5036  * the DCB state.
5037  */
5038 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5039 {
5040         struct ixgbe_hw *hw = &adapter->hw;
5041         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5042
5043         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5044                 if (hw->mac.type == ixgbe_mac_82598EB)
5045                         netif_set_gso_max_size(adapter->netdev, 65536);
5046                 return;
5047         }
5048
5049         if (hw->mac.type == ixgbe_mac_82598EB)
5050                 netif_set_gso_max_size(adapter->netdev, 32768);
5051
5052 #ifdef IXGBE_FCOE
5053         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5054                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5055 #endif
5056
5057         /* reconfigure the hardware */
5058         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5059                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5060                                                 DCB_TX_CONFIG);
5061                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5062                                                 DCB_RX_CONFIG);
5063                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5064         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5065                 ixgbe_dcb_hw_ets(&adapter->hw,
5066                                  adapter->ixgbe_ieee_ets,
5067                                  max_frame);
5068                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5069                                         adapter->ixgbe_ieee_pfc->pfc_en,
5070                                         adapter->ixgbe_ieee_ets->prio_tc);
5071         }
5072
5073         /* Enable RSS Hash per TC */
5074         if (hw->mac.type != ixgbe_mac_82598EB) {
5075                 u32 msb = 0;
5076                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5077
5078                 while (rss_i) {
5079                         msb++;
5080                         rss_i >>= 1;
5081                 }
5082
5083                 /* write msb to all 8 TCs in one write */
5084                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5085         }
5086 }
5087 #endif
5088
5089 /* Additional bittime to account for IXGBE framing */
5090 #define IXGBE_ETH_FRAMING 20
5091
5092 /**
5093  * ixgbe_hpbthresh - calculate high water mark for flow control
5094  *
5095  * @adapter: board private structure to calculate for
5096  * @pb: packet buffer to calculate
5097  */
5098 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5099 {
5100         struct ixgbe_hw *hw = &adapter->hw;
5101         struct net_device *dev = adapter->netdev;
5102         int link, tc, kb, marker;
5103         u32 dv_id, rx_pba;
5104
5105         /* Calculate max LAN frame size */
5106         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5107
5108 #ifdef IXGBE_FCOE
5109         /* FCoE traffic class uses FCOE jumbo frames */
5110         if ((dev->features & NETIF_F_FCOE_MTU) &&
5111             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5112             (pb == ixgbe_fcoe_get_tc(adapter)))
5113                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5114 #endif
5115
5116         /* Calculate delay value for device */
5117         switch (hw->mac.type) {
5118         case ixgbe_mac_X540:
5119         case ixgbe_mac_X550:
5120         case ixgbe_mac_X550EM_x:
5121         case ixgbe_mac_x550em_a:
5122                 dv_id = IXGBE_DV_X540(link, tc);
5123                 break;
5124         default:
5125                 dv_id = IXGBE_DV(link, tc);
5126                 break;
5127         }
5128
5129         /* Loopback switch introduces additional latency */
5130         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5131                 dv_id += IXGBE_B2BT(tc);
5132
5133         /* Delay value is calculated in bit times convert to KB */
5134         kb = IXGBE_BT2KB(dv_id);
5135         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5136
5137         marker = rx_pba - kb;
5138
5139         /* It is possible that the packet buffer is not large enough
5140          * to provide required headroom. In this case throw an error
5141          * to user and a do the best we can.
5142          */
5143         if (marker < 0) {
5144                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5145                             "headroom to support flow control."
5146                             "Decrease MTU or number of traffic classes\n", pb);
5147                 marker = tc + 1;
5148         }
5149
5150         return marker;
5151 }
5152
5153 /**
5154  * ixgbe_lpbthresh - calculate low water mark for for flow control
5155  *
5156  * @adapter: board private structure to calculate for
5157  * @pb: packet buffer to calculate
5158  */
5159 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5160 {
5161         struct ixgbe_hw *hw = &adapter->hw;
5162         struct net_device *dev = adapter->netdev;
5163         int tc;
5164         u32 dv_id;
5165
5166         /* Calculate max LAN frame size */
5167         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5168
5169 #ifdef IXGBE_FCOE
5170         /* FCoE traffic class uses FCOE jumbo frames */
5171         if ((dev->features & NETIF_F_FCOE_MTU) &&
5172             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5173             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5174                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5175 #endif
5176
5177         /* Calculate delay value for device */
5178         switch (hw->mac.type) {
5179         case ixgbe_mac_X540:
5180         case ixgbe_mac_X550:
5181         case ixgbe_mac_X550EM_x:
5182         case ixgbe_mac_x550em_a:
5183                 dv_id = IXGBE_LOW_DV_X540(tc);
5184                 break;
5185         default:
5186                 dv_id = IXGBE_LOW_DV(tc);
5187                 break;
5188         }
5189
5190         /* Delay value is calculated in bit times convert to KB */
5191         return IXGBE_BT2KB(dv_id);
5192 }
5193
5194 /*
5195  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5196  */
5197 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5198 {
5199         struct ixgbe_hw *hw = &adapter->hw;
5200         int num_tc = netdev_get_num_tc(adapter->netdev);
5201         int i;
5202
5203         if (!num_tc)
5204                 num_tc = 1;
5205
5206         for (i = 0; i < num_tc; i++) {
5207                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5208                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5209
5210                 /* Low water marks must not be larger than high water marks */
5211                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5212                         hw->fc.low_water[i] = 0;
5213         }
5214
5215         for (; i < MAX_TRAFFIC_CLASS; i++)
5216                 hw->fc.high_water[i] = 0;
5217 }
5218
5219 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5220 {
5221         struct ixgbe_hw *hw = &adapter->hw;
5222         int hdrm;
5223         u8 tc = netdev_get_num_tc(adapter->netdev);
5224
5225         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5226             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5227                 hdrm = 32 << adapter->fdir_pballoc;
5228         else
5229                 hdrm = 0;
5230
5231         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5232         ixgbe_pbthresh_setup(adapter);
5233 }
5234
5235 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5236 {
5237         struct ixgbe_hw *hw = &adapter->hw;
5238         struct hlist_node *node2;
5239         struct ixgbe_fdir_filter *filter;
5240
5241         spin_lock(&adapter->fdir_perfect_lock);
5242
5243         if (!hlist_empty(&adapter->fdir_filter_list))
5244                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5245
5246         hlist_for_each_entry_safe(filter, node2,
5247                                   &adapter->fdir_filter_list, fdir_node) {
5248                 ixgbe_fdir_write_perfect_filter_82599(hw,
5249                                 &filter->filter,
5250                                 filter->sw_idx,
5251                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5252                                 IXGBE_FDIR_DROP_QUEUE :
5253                                 adapter->rx_ring[filter->action]->reg_idx);
5254         }
5255
5256         spin_unlock(&adapter->fdir_perfect_lock);
5257 }
5258
5259 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
5260                                       struct ixgbe_adapter *adapter)
5261 {
5262         struct ixgbe_hw *hw = &adapter->hw;
5263         u32 vmolr;
5264
5265         /* No unicast promiscuous support for VMDQ devices. */
5266         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
5267         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
5268
5269         /* clear the affected bit */
5270         vmolr &= ~IXGBE_VMOLR_MPE;
5271
5272         if (dev->flags & IFF_ALLMULTI) {
5273                 vmolr |= IXGBE_VMOLR_MPE;
5274         } else {
5275                 vmolr |= IXGBE_VMOLR_ROMPE;
5276                 hw->mac.ops.update_mc_addr_list(hw, dev);
5277         }
5278         ixgbe_write_uc_addr_list(adapter->netdev, pool);
5279         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
5280 }
5281
5282 /**
5283  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5284  * @rx_ring: ring to free buffers from
5285  **/
5286 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5287 {
5288         u16 i = rx_ring->next_to_clean;
5289         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5290
5291         /* Free all the Rx ring sk_buffs */
5292         while (i != rx_ring->next_to_alloc) {
5293                 if (rx_buffer->skb) {
5294                         struct sk_buff *skb = rx_buffer->skb;
5295                         if (IXGBE_CB(skb)->page_released)
5296                                 dma_unmap_page_attrs(rx_ring->dev,
5297                                                      IXGBE_CB(skb)->dma,
5298                                                      ixgbe_rx_pg_size(rx_ring),
5299                                                      DMA_FROM_DEVICE,
5300                                                      IXGBE_RX_DMA_ATTR);
5301                         dev_kfree_skb(skb);
5302                 }
5303
5304                 /* Invalidate cache lines that may have been written to by
5305                  * device so that we avoid corrupting memory.
5306                  */
5307                 dma_sync_single_range_for_cpu(rx_ring->dev,
5308                                               rx_buffer->dma,
5309                                               rx_buffer->page_offset,
5310                                               ixgbe_rx_bufsz(rx_ring),
5311                                               DMA_FROM_DEVICE);
5312
5313                 /* free resources associated with mapping */
5314                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5315                                      ixgbe_rx_pg_size(rx_ring),
5316                                      DMA_FROM_DEVICE,
5317                                      IXGBE_RX_DMA_ATTR);
5318                 __page_frag_cache_drain(rx_buffer->page,
5319                                         rx_buffer->pagecnt_bias);
5320
5321                 i++;
5322                 rx_buffer++;
5323                 if (i == rx_ring->count) {
5324                         i = 0;
5325                         rx_buffer = rx_ring->rx_buffer_info;
5326                 }
5327         }
5328
5329         rx_ring->next_to_alloc = 0;
5330         rx_ring->next_to_clean = 0;
5331         rx_ring->next_to_use = 0;
5332 }
5333
5334 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
5335                                    struct ixgbe_ring *rx_ring)
5336 {
5337         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5338         int index = rx_ring->queue_index + vadapter->rx_base_queue;
5339
5340         /* shutdown specific queue receive and wait for dma to settle */
5341         ixgbe_disable_rx_queue(adapter, rx_ring);
5342         usleep_range(10000, 20000);
5343         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
5344         ixgbe_clean_rx_ring(rx_ring);
5345 }
5346
5347 static int ixgbe_fwd_ring_down(struct net_device *vdev,
5348                                struct ixgbe_fwd_adapter *accel)
5349 {
5350         struct ixgbe_adapter *adapter = accel->real_adapter;
5351         unsigned int rxbase = accel->rx_base_queue;
5352         unsigned int txbase = accel->tx_base_queue;
5353         int i;
5354
5355         netif_tx_stop_all_queues(vdev);
5356
5357         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5358                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5359                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
5360         }
5361
5362         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5363                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
5364
5365
5366         return 0;
5367 }
5368
5369 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5370                              struct ixgbe_fwd_adapter *accel)
5371 {
5372         struct ixgbe_adapter *adapter = accel->real_adapter;
5373         unsigned int rxbase, txbase, queues;
5374         int i, baseq, err = 0;
5375
5376         if (!test_bit(accel->pool, adapter->fwd_bitmask))
5377                 return 0;
5378
5379         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5380         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5381                    accel->pool, adapter->num_rx_pools,
5382                    baseq, baseq + adapter->num_rx_queues_per_pool);
5383
5384         accel->netdev = vdev;
5385         accel->rx_base_queue = rxbase = baseq;
5386         accel->tx_base_queue = txbase = baseq;
5387
5388         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5389                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5390
5391         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5392                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5393                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5394         }
5395
5396         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5397                 adapter->tx_ring[txbase + i]->netdev = vdev;
5398
5399         queues = min_t(unsigned int,
5400                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5401         err = netif_set_real_num_tx_queues(vdev, queues);
5402         if (err)
5403                 goto fwd_queue_err;
5404
5405         err = netif_set_real_num_rx_queues(vdev, queues);
5406         if (err)
5407                 goto fwd_queue_err;
5408
5409         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5410          * need to only treat it as an error value if it is negative.
5411          */
5412         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5413                                    VMDQ_P(accel->pool));
5414         if (err < 0)
5415                 goto fwd_queue_err;
5416
5417         ixgbe_macvlan_set_rx_mode(vdev, VMDQ_P(accel->pool), adapter);
5418         return 0;
5419 fwd_queue_err:
5420         ixgbe_fwd_ring_down(vdev, accel);
5421         return err;
5422 }
5423
5424 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5425 {
5426         if (netif_is_macvlan(upper)) {
5427                 struct macvlan_dev *dfwd = netdev_priv(upper);
5428                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5429
5430                 if (dfwd->fwd_priv)
5431                         ixgbe_fwd_ring_up(upper, vadapter);
5432         }
5433
5434         return 0;
5435 }
5436
5437 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5438 {
5439         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5440                                       ixgbe_upper_dev_walk, NULL);
5441 }
5442
5443 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5444 {
5445         struct ixgbe_hw *hw = &adapter->hw;
5446
5447         ixgbe_configure_pb(adapter);
5448 #ifdef CONFIG_IXGBE_DCB
5449         ixgbe_configure_dcb(adapter);
5450 #endif
5451         /*
5452          * We must restore virtualization before VLANs or else
5453          * the VLVF registers will not be populated
5454          */
5455         ixgbe_configure_virtualization(adapter);
5456
5457         ixgbe_set_rx_mode(adapter->netdev);
5458         ixgbe_restore_vlan(adapter);
5459
5460         switch (hw->mac.type) {
5461         case ixgbe_mac_82599EB:
5462         case ixgbe_mac_X540:
5463                 hw->mac.ops.disable_rx_buff(hw);
5464                 break;
5465         default:
5466                 break;
5467         }
5468
5469         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5470                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5471                                                 adapter->fdir_pballoc);
5472         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5473                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5474                                               adapter->fdir_pballoc);
5475                 ixgbe_fdir_filter_restore(adapter);
5476         }
5477
5478         switch (hw->mac.type) {
5479         case ixgbe_mac_82599EB:
5480         case ixgbe_mac_X540:
5481                 hw->mac.ops.enable_rx_buff(hw);
5482                 break;
5483         default:
5484                 break;
5485         }
5486
5487 #ifdef CONFIG_IXGBE_DCA
5488         /* configure DCA */
5489         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5490                 ixgbe_setup_dca(adapter);
5491 #endif /* CONFIG_IXGBE_DCA */
5492
5493 #ifdef IXGBE_FCOE
5494         /* configure FCoE L2 filters, redirection table, and Rx control */
5495         ixgbe_configure_fcoe(adapter);
5496
5497 #endif /* IXGBE_FCOE */
5498         ixgbe_configure_tx(adapter);
5499         ixgbe_configure_rx(adapter);
5500         ixgbe_configure_dfwd(adapter);
5501 }
5502
5503 /**
5504  * ixgbe_sfp_link_config - set up SFP+ link
5505  * @adapter: pointer to private adapter struct
5506  **/
5507 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5508 {
5509         /*
5510          * We are assuming the worst case scenario here, and that
5511          * is that an SFP was inserted/removed after the reset
5512          * but before SFP detection was enabled.  As such the best
5513          * solution is to just start searching as soon as we start
5514          */
5515         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5516                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5517
5518         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5519         adapter->sfp_poll_time = 0;
5520 }
5521
5522 /**
5523  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5524  * @hw: pointer to private hardware struct
5525  *
5526  * Returns 0 on success, negative on failure
5527  **/
5528 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5529 {
5530         u32 speed;
5531         bool autoneg, link_up = false;
5532         int ret = IXGBE_ERR_LINK_SETUP;
5533
5534         if (hw->mac.ops.check_link)
5535                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5536
5537         if (ret)
5538                 return ret;
5539
5540         speed = hw->phy.autoneg_advertised;
5541         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5542                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5543                                                         &autoneg);
5544         if (ret)
5545                 return ret;
5546
5547         if (hw->mac.ops.setup_link)
5548                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5549
5550         return ret;
5551 }
5552
5553 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5554 {
5555         struct ixgbe_hw *hw = &adapter->hw;
5556         u32 gpie = 0;
5557
5558         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5559                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5560                        IXGBE_GPIE_OCD;
5561                 gpie |= IXGBE_GPIE_EIAME;
5562                 /*
5563                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5564                  * this saves a register write for every interrupt
5565                  */
5566                 switch (hw->mac.type) {
5567                 case ixgbe_mac_82598EB:
5568                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5569                         break;
5570                 case ixgbe_mac_82599EB:
5571                 case ixgbe_mac_X540:
5572                 case ixgbe_mac_X550:
5573                 case ixgbe_mac_X550EM_x:
5574                 case ixgbe_mac_x550em_a:
5575                 default:
5576                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5577                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5578                         break;
5579                 }
5580         } else {
5581                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5582                  * specifically only auto mask tx and rx interrupts */
5583                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5584         }
5585
5586         /* XXX: to interrupt immediately for EICS writes, enable this */
5587         /* gpie |= IXGBE_GPIE_EIMEN; */
5588
5589         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5590                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5591
5592                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5593                 case IXGBE_82599_VMDQ_8Q_MASK:
5594                         gpie |= IXGBE_GPIE_VTMODE_16;
5595                         break;
5596                 case IXGBE_82599_VMDQ_4Q_MASK:
5597                         gpie |= IXGBE_GPIE_VTMODE_32;
5598                         break;
5599                 default:
5600                         gpie |= IXGBE_GPIE_VTMODE_64;
5601                         break;
5602                 }
5603         }
5604
5605         /* Enable Thermal over heat sensor interrupt */
5606         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5607                 switch (adapter->hw.mac.type) {
5608                 case ixgbe_mac_82599EB:
5609                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5610                         break;
5611                 default:
5612                         break;
5613                 }
5614         }
5615
5616         /* Enable fan failure interrupt */
5617         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5618                 gpie |= IXGBE_SDP1_GPIEN(hw);
5619
5620         switch (hw->mac.type) {
5621         case ixgbe_mac_82599EB:
5622                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5623                 break;
5624         case ixgbe_mac_X550EM_x:
5625         case ixgbe_mac_x550em_a:
5626                 gpie |= IXGBE_SDP0_GPIEN_X540;
5627                 break;
5628         default:
5629                 break;
5630         }
5631
5632         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5633 }
5634
5635 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5636 {
5637         struct ixgbe_hw *hw = &adapter->hw;
5638         int err;
5639         u32 ctrl_ext;
5640
5641         ixgbe_get_hw_control(adapter);
5642         ixgbe_setup_gpie(adapter);
5643
5644         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5645                 ixgbe_configure_msix(adapter);
5646         else
5647                 ixgbe_configure_msi_and_legacy(adapter);
5648
5649         /* enable the optics for 82599 SFP+ fiber */
5650         if (hw->mac.ops.enable_tx_laser)
5651                 hw->mac.ops.enable_tx_laser(hw);
5652
5653         if (hw->phy.ops.set_phy_power)
5654                 hw->phy.ops.set_phy_power(hw, true);
5655
5656         smp_mb__before_atomic();
5657         clear_bit(__IXGBE_DOWN, &adapter->state);
5658         ixgbe_napi_enable_all(adapter);
5659
5660         if (ixgbe_is_sfp(hw)) {
5661                 ixgbe_sfp_link_config(adapter);
5662         } else {
5663                 err = ixgbe_non_sfp_link_config(hw);
5664                 if (err)
5665                         e_err(probe, "link_config FAILED %d\n", err);
5666         }
5667
5668         /* clear any pending interrupts, may auto mask */
5669         IXGBE_READ_REG(hw, IXGBE_EICR);
5670         ixgbe_irq_enable(adapter, true, true);
5671
5672         /*
5673          * If this adapter has a fan, check to see if we had a failure
5674          * before we enabled the interrupt.
5675          */
5676         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5677                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5678                 if (esdp & IXGBE_ESDP_SDP1)
5679                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5680         }
5681
5682         /* bring the link up in the watchdog, this could race with our first
5683          * link up interrupt but shouldn't be a problem */
5684         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5685         adapter->link_check_timeout = jiffies;
5686         mod_timer(&adapter->service_timer, jiffies);
5687
5688         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5689         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5690         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5691         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5692 }
5693
5694 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5695 {
5696         WARN_ON(in_interrupt());
5697         /* put off any impending NetWatchDogTimeout */
5698         netif_trans_update(adapter->netdev);
5699
5700         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5701                 usleep_range(1000, 2000);
5702         if (adapter->hw.phy.type == ixgbe_phy_fw)
5703                 ixgbe_watchdog_link_is_down(adapter);
5704         ixgbe_down(adapter);
5705         /*
5706          * If SR-IOV enabled then wait a bit before bringing the adapter
5707          * back up to give the VFs time to respond to the reset.  The
5708          * two second wait is based upon the watchdog timer cycle in
5709          * the VF driver.
5710          */
5711         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5712                 msleep(2000);
5713         ixgbe_up(adapter);
5714         clear_bit(__IXGBE_RESETTING, &adapter->state);
5715 }
5716
5717 void ixgbe_up(struct ixgbe_adapter *adapter)
5718 {
5719         /* hardware has been reset, we need to reload some things */
5720         ixgbe_configure(adapter);
5721
5722         ixgbe_up_complete(adapter);
5723 }
5724
5725 void ixgbe_reset(struct ixgbe_adapter *adapter)
5726 {
5727         struct ixgbe_hw *hw = &adapter->hw;
5728         struct net_device *netdev = adapter->netdev;
5729         int err;
5730
5731         if (ixgbe_removed(hw->hw_addr))
5732                 return;
5733         /* lock SFP init bit to prevent race conditions with the watchdog */
5734         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5735                 usleep_range(1000, 2000);
5736
5737         /* clear all SFP and link config related flags while holding SFP_INIT */
5738         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5739                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5740         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5741
5742         err = hw->mac.ops.init_hw(hw);
5743         switch (err) {
5744         case 0:
5745         case IXGBE_ERR_SFP_NOT_PRESENT:
5746         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5747                 break;
5748         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5749                 e_dev_err("master disable timed out\n");
5750                 break;
5751         case IXGBE_ERR_EEPROM_VERSION:
5752                 /* We are running on a pre-production device, log a warning */
5753                 e_dev_warn("This device is a pre-production adapter/LOM. "
5754                            "Please be aware there may be issues associated with "
5755                            "your hardware.  If you are experiencing problems "
5756                            "please contact your Intel or hardware "
5757                            "representative who provided you with this "
5758                            "hardware.\n");
5759                 break;
5760         default:
5761                 e_dev_err("Hardware Error: %d\n", err);
5762         }
5763
5764         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5765
5766         /* flush entries out of MAC table */
5767         ixgbe_flush_sw_mac_table(adapter);
5768         __dev_uc_unsync(netdev, NULL);
5769
5770         /* do not flush user set addresses */
5771         ixgbe_mac_set_default_filter(adapter);
5772
5773         /* update SAN MAC vmdq pool selection */
5774         if (hw->mac.san_mac_rar_index)
5775                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5776
5777         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5778                 ixgbe_ptp_reset(adapter);
5779
5780         if (hw->phy.ops.set_phy_power) {
5781                 if (!netif_running(adapter->netdev) && !adapter->wol)
5782                         hw->phy.ops.set_phy_power(hw, false);
5783                 else
5784                         hw->phy.ops.set_phy_power(hw, true);
5785         }
5786 }
5787
5788 /**
5789  * ixgbe_clean_tx_ring - Free Tx Buffers
5790  * @tx_ring: ring to be cleaned
5791  **/
5792 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5793 {
5794         u16 i = tx_ring->next_to_clean;
5795         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5796
5797         while (i != tx_ring->next_to_use) {
5798                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5799
5800                 /* Free all the Tx ring sk_buffs */
5801                 if (ring_is_xdp(tx_ring))
5802                         page_frag_free(tx_buffer->data);
5803                 else
5804                         dev_kfree_skb_any(tx_buffer->skb);
5805
5806                 /* unmap skb header data */
5807                 dma_unmap_single(tx_ring->dev,
5808                                  dma_unmap_addr(tx_buffer, dma),
5809                                  dma_unmap_len(tx_buffer, len),
5810                                  DMA_TO_DEVICE);
5811
5812                 /* check for eop_desc to determine the end of the packet */
5813                 eop_desc = tx_buffer->next_to_watch;
5814                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5815
5816                 /* unmap remaining buffers */
5817                 while (tx_desc != eop_desc) {
5818                         tx_buffer++;
5819                         tx_desc++;
5820                         i++;
5821                         if (unlikely(i == tx_ring->count)) {
5822                                 i = 0;
5823                                 tx_buffer = tx_ring->tx_buffer_info;
5824                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5825                         }
5826
5827                         /* unmap any remaining paged data */
5828                         if (dma_unmap_len(tx_buffer, len))
5829                                 dma_unmap_page(tx_ring->dev,
5830                                                dma_unmap_addr(tx_buffer, dma),
5831                                                dma_unmap_len(tx_buffer, len),
5832                                                DMA_TO_DEVICE);
5833                 }
5834
5835                 /* move us one more past the eop_desc for start of next pkt */
5836                 tx_buffer++;
5837                 i++;
5838                 if (unlikely(i == tx_ring->count)) {
5839                         i = 0;
5840                         tx_buffer = tx_ring->tx_buffer_info;
5841                 }
5842         }
5843
5844         /* reset BQL for queue */
5845         if (!ring_is_xdp(tx_ring))
5846                 netdev_tx_reset_queue(txring_txq(tx_ring));
5847
5848         /* reset next_to_use and next_to_clean */
5849         tx_ring->next_to_use = 0;
5850         tx_ring->next_to_clean = 0;
5851 }
5852
5853 /**
5854  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5855  * @adapter: board private structure
5856  **/
5857 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5858 {
5859         int i;
5860
5861         for (i = 0; i < adapter->num_rx_queues; i++)
5862                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5863 }
5864
5865 /**
5866  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5867  * @adapter: board private structure
5868  **/
5869 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5870 {
5871         int i;
5872
5873         for (i = 0; i < adapter->num_tx_queues; i++)
5874                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5875         for (i = 0; i < adapter->num_xdp_queues; i++)
5876                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5877 }
5878
5879 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5880 {
5881         struct hlist_node *node2;
5882         struct ixgbe_fdir_filter *filter;
5883
5884         spin_lock(&adapter->fdir_perfect_lock);
5885
5886         hlist_for_each_entry_safe(filter, node2,
5887                                   &adapter->fdir_filter_list, fdir_node) {
5888                 hlist_del(&filter->fdir_node);
5889                 kfree(filter);
5890         }
5891         adapter->fdir_filter_count = 0;
5892
5893         spin_unlock(&adapter->fdir_perfect_lock);
5894 }
5895
5896 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5897 {
5898         if (netif_is_macvlan(upper)) {
5899                 struct macvlan_dev *vlan = netdev_priv(upper);
5900
5901                 if (vlan->fwd_priv) {
5902                         netif_tx_stop_all_queues(upper);
5903                         netif_carrier_off(upper);
5904                         netif_tx_disable(upper);
5905                 }
5906         }
5907
5908         return 0;
5909 }
5910
5911 void ixgbe_down(struct ixgbe_adapter *adapter)
5912 {
5913         struct net_device *netdev = adapter->netdev;
5914         struct ixgbe_hw *hw = &adapter->hw;
5915         int i;
5916
5917         /* signal that we are down to the interrupt handler */
5918         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5919                 return; /* do nothing if already down */
5920
5921         /* disable receives */
5922         hw->mac.ops.disable_rx(hw);
5923
5924         /* disable all enabled rx queues */
5925         for (i = 0; i < adapter->num_rx_queues; i++)
5926                 /* this call also flushes the previous write */
5927                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5928
5929         usleep_range(10000, 20000);
5930
5931         /* synchronize_sched() needed for pending XDP buffers to drain */
5932         if (adapter->xdp_ring[0])
5933                 synchronize_sched();
5934         netif_tx_stop_all_queues(netdev);
5935
5936         /* call carrier off first to avoid false dev_watchdog timeouts */
5937         netif_carrier_off(netdev);
5938         netif_tx_disable(netdev);
5939
5940         /* disable any upper devices */
5941         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5942                                       ixgbe_disable_macvlan, NULL);
5943
5944         ixgbe_irq_disable(adapter);
5945
5946         ixgbe_napi_disable_all(adapter);
5947
5948         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5949         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5950         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5951
5952         del_timer_sync(&adapter->service_timer);
5953
5954         if (adapter->num_vfs) {
5955                 /* Clear EITR Select mapping */
5956                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5957
5958                 /* Mark all the VFs as inactive */
5959                 for (i = 0 ; i < adapter->num_vfs; i++)
5960                         adapter->vfinfo[i].clear_to_send = false;
5961
5962                 /* ping all the active vfs to let them know we are going down */
5963                 ixgbe_ping_all_vfs(adapter);
5964
5965                 /* Disable all VFTE/VFRE TX/RX */
5966                 ixgbe_disable_tx_rx(adapter);
5967         }
5968
5969         /* disable transmits in the hardware now that interrupts are off */
5970         for (i = 0; i < adapter->num_tx_queues; i++) {
5971                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5972                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5973         }
5974         for (i = 0; i < adapter->num_xdp_queues; i++) {
5975                 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
5976
5977                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5978         }
5979
5980         /* Disable the Tx DMA engine on 82599 and later MAC */
5981         switch (hw->mac.type) {
5982         case ixgbe_mac_82599EB:
5983         case ixgbe_mac_X540:
5984         case ixgbe_mac_X550:
5985         case ixgbe_mac_X550EM_x:
5986         case ixgbe_mac_x550em_a:
5987                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5988                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5989                                  ~IXGBE_DMATXCTL_TE));
5990                 break;
5991         default:
5992                 break;
5993         }
5994
5995         if (!pci_channel_offline(adapter->pdev))
5996                 ixgbe_reset(adapter);
5997
5998         /* power down the optics for 82599 SFP+ fiber */
5999         if (hw->mac.ops.disable_tx_laser)
6000                 hw->mac.ops.disable_tx_laser(hw);
6001
6002         ixgbe_clean_all_tx_rings(adapter);
6003         ixgbe_clean_all_rx_rings(adapter);
6004 }
6005
6006 /**
6007  * ixgbe_eee_capable - helper function to determine EEE support on X550
6008  * @adapter: board private structure
6009  */
6010 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6011 {
6012         struct ixgbe_hw *hw = &adapter->hw;
6013
6014         switch (hw->device_id) {
6015         case IXGBE_DEV_ID_X550EM_A_1G_T:
6016         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6017                 if (!hw->phy.eee_speeds_supported)
6018                         break;
6019                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6020                 if (!hw->phy.eee_speeds_advertised)
6021                         break;
6022                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6023                 break;
6024         default:
6025                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6026                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6027                 break;
6028         }
6029 }
6030
6031 /**
6032  * ixgbe_tx_timeout - Respond to a Tx Hang
6033  * @netdev: network interface device structure
6034  **/
6035 static void ixgbe_tx_timeout(struct net_device *netdev)
6036 {
6037         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6038
6039         /* Do the reset outside of interrupt context */
6040         ixgbe_tx_timeout_reset(adapter);
6041 }
6042
6043 #ifdef CONFIG_IXGBE_DCB
6044 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6045 {
6046         struct ixgbe_hw *hw = &adapter->hw;
6047         struct tc_configuration *tc;
6048         int j;
6049
6050         switch (hw->mac.type) {
6051         case ixgbe_mac_82598EB:
6052         case ixgbe_mac_82599EB:
6053                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6054                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6055                 break;
6056         case ixgbe_mac_X540:
6057         case ixgbe_mac_X550:
6058                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6059                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6060                 break;
6061         case ixgbe_mac_X550EM_x:
6062         case ixgbe_mac_x550em_a:
6063         default:
6064                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6065                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6066                 break;
6067         }
6068
6069         /* Configure DCB traffic classes */
6070         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6071                 tc = &adapter->dcb_cfg.tc_config[j];
6072                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6073                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6074                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6075                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6076                 tc->dcb_pfc = pfc_disabled;
6077         }
6078
6079         /* Initialize default user to priority mapping, UPx->TC0 */
6080         tc = &adapter->dcb_cfg.tc_config[0];
6081         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6082         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6083
6084         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6085         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6086         adapter->dcb_cfg.pfc_mode_enable = false;
6087         adapter->dcb_set_bitmap = 0x00;
6088         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6089                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6090         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6091                sizeof(adapter->temp_dcb_cfg));
6092 }
6093 #endif
6094
6095 /**
6096  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6097  * @adapter: board private structure to initialize
6098  *
6099  * ixgbe_sw_init initializes the Adapter private data structure.
6100  * Fields are initialized based on PCI device information and
6101  * OS network device settings (MTU size).
6102  **/
6103 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6104                          const struct ixgbe_info *ii)
6105 {
6106         struct ixgbe_hw *hw = &adapter->hw;
6107         struct pci_dev *pdev = adapter->pdev;
6108         unsigned int rss, fdir;
6109         u32 fwsm;
6110         int i;
6111
6112         /* PCI config space info */
6113
6114         hw->vendor_id = pdev->vendor;
6115         hw->device_id = pdev->device;
6116         hw->revision_id = pdev->revision;
6117         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6118         hw->subsystem_device_id = pdev->subsystem_device;
6119
6120         /* get_invariants needs the device IDs */
6121         ii->get_invariants(hw);
6122
6123         /* Set common capability flags and settings */
6124         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6125         adapter->ring_feature[RING_F_RSS].limit = rss;
6126         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6127         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6128         adapter->atr_sample_rate = 20;
6129         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6130         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6131         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6132 #ifdef CONFIG_IXGBE_DCA
6133         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6134 #endif
6135 #ifdef CONFIG_IXGBE_DCB
6136         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6137         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6138 #endif
6139 #ifdef IXGBE_FCOE
6140         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6141         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6142 #ifdef CONFIG_IXGBE_DCB
6143         /* Default traffic class to use for FCoE */
6144         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6145 #endif /* CONFIG_IXGBE_DCB */
6146 #endif /* IXGBE_FCOE */
6147
6148         /* initialize static ixgbe jump table entries */
6149         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6150                                           GFP_KERNEL);
6151         if (!adapter->jump_tables[0])
6152                 return -ENOMEM;
6153         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6154
6155         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6156                 adapter->jump_tables[i] = NULL;
6157
6158         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
6159                                      hw->mac.num_rar_entries,
6160                                      GFP_ATOMIC);
6161         if (!adapter->mac_table)
6162                 return -ENOMEM;
6163
6164         if (ixgbe_init_rss_key(adapter))
6165                 return -ENOMEM;
6166
6167         /* Set MAC specific capability flags and exceptions */
6168         switch (hw->mac.type) {
6169         case ixgbe_mac_82598EB:
6170                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6171
6172                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6173                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6174
6175                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6176                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6177                 adapter->atr_sample_rate = 0;
6178                 adapter->fdir_pballoc = 0;
6179 #ifdef IXGBE_FCOE
6180                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6181                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6182 #ifdef CONFIG_IXGBE_DCB
6183                 adapter->fcoe.up = 0;
6184 #endif /* IXGBE_DCB */
6185 #endif /* IXGBE_FCOE */
6186                 break;
6187         case ixgbe_mac_82599EB:
6188                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6189                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6190                 break;
6191         case ixgbe_mac_X540:
6192                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6193                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6194                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6195                 break;
6196         case ixgbe_mac_x550em_a:
6197                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6198                 switch (hw->device_id) {
6199                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6200                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6201                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6202                         break;
6203                 default:
6204                         break;
6205                 }
6206         /* fall through */
6207         case ixgbe_mac_X550EM_x:
6208 #ifdef CONFIG_IXGBE_DCB
6209                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6210 #endif
6211 #ifdef IXGBE_FCOE
6212                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6213 #ifdef CONFIG_IXGBE_DCB
6214                 adapter->fcoe.up = 0;
6215 #endif /* IXGBE_DCB */
6216 #endif /* IXGBE_FCOE */
6217         /* Fall Through */
6218         case ixgbe_mac_X550:
6219                 if (hw->mac.type == ixgbe_mac_X550)
6220                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6221 #ifdef CONFIG_IXGBE_DCA
6222                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6223 #endif
6224                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6225                 break;
6226         default:
6227                 break;
6228         }
6229
6230 #ifdef IXGBE_FCOE
6231         /* FCoE support exists, always init the FCoE lock */
6232         spin_lock_init(&adapter->fcoe.lock);
6233
6234 #endif
6235         /* n-tuple support exists, always init our spinlock */
6236         spin_lock_init(&adapter->fdir_perfect_lock);
6237
6238 #ifdef CONFIG_IXGBE_DCB
6239         ixgbe_init_dcb(adapter);
6240 #endif
6241
6242         /* default flow control settings */
6243         hw->fc.requested_mode = ixgbe_fc_full;
6244         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6245         ixgbe_pbthresh_setup(adapter);
6246         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6247         hw->fc.send_xon = true;
6248         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6249
6250 #ifdef CONFIG_PCI_IOV
6251         if (max_vfs > 0)
6252                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6253
6254         /* assign number of SR-IOV VFs */
6255         if (hw->mac.type != ixgbe_mac_82598EB) {
6256                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6257                         max_vfs = 0;
6258                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6259                 }
6260         }
6261 #endif /* CONFIG_PCI_IOV */
6262
6263         /* enable itr by default in dynamic mode */
6264         adapter->rx_itr_setting = 1;
6265         adapter->tx_itr_setting = 1;
6266
6267         /* set default ring sizes */
6268         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6269         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6270
6271         /* set default work limits */
6272         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6273
6274         /* initialize eeprom parameters */
6275         if (ixgbe_init_eeprom_params_generic(hw)) {
6276                 e_dev_err("EEPROM initialization failed\n");
6277                 return -EIO;
6278         }
6279
6280         /* PF holds first pool slot */
6281         set_bit(0, adapter->fwd_bitmask);
6282         set_bit(__IXGBE_DOWN, &adapter->state);
6283
6284         return 0;
6285 }
6286
6287 /**
6288  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6289  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6290  *
6291  * Return 0 on success, negative on failure
6292  **/
6293 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6294 {
6295         struct device *dev = tx_ring->dev;
6296         int orig_node = dev_to_node(dev);
6297         int ring_node = -1;
6298         int size;
6299
6300         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6301
6302         if (tx_ring->q_vector)
6303                 ring_node = tx_ring->q_vector->numa_node;
6304
6305         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6306         if (!tx_ring->tx_buffer_info)
6307                 tx_ring->tx_buffer_info = vmalloc(size);
6308         if (!tx_ring->tx_buffer_info)
6309                 goto err;
6310
6311         /* round up to nearest 4K */
6312         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6313         tx_ring->size = ALIGN(tx_ring->size, 4096);
6314
6315         set_dev_node(dev, ring_node);
6316         tx_ring->desc = dma_alloc_coherent(dev,
6317                                            tx_ring->size,
6318                                            &tx_ring->dma,
6319                                            GFP_KERNEL);
6320         set_dev_node(dev, orig_node);
6321         if (!tx_ring->desc)
6322                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6323                                                    &tx_ring->dma, GFP_KERNEL);
6324         if (!tx_ring->desc)
6325                 goto err;
6326
6327         tx_ring->next_to_use = 0;
6328         tx_ring->next_to_clean = 0;
6329         return 0;
6330
6331 err:
6332         vfree(tx_ring->tx_buffer_info);
6333         tx_ring->tx_buffer_info = NULL;
6334         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6335         return -ENOMEM;
6336 }
6337
6338 /**
6339  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6340  * @adapter: board private structure
6341  *
6342  * If this function returns with an error, then it's possible one or
6343  * more of the rings is populated (while the rest are not).  It is the
6344  * callers duty to clean those orphaned rings.
6345  *
6346  * Return 0 on success, negative on failure
6347  **/
6348 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6349 {
6350         int i, j = 0, err = 0;
6351
6352         for (i = 0; i < adapter->num_tx_queues; i++) {
6353                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6354                 if (!err)
6355                         continue;
6356
6357                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6358                 goto err_setup_tx;
6359         }
6360         for (j = 0; j < adapter->num_xdp_queues; j++) {
6361                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6362                 if (!err)
6363                         continue;
6364
6365                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6366                 goto err_setup_tx;
6367         }
6368
6369         return 0;
6370 err_setup_tx:
6371         /* rewind the index freeing the rings as we go */
6372         while (j--)
6373                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6374         while (i--)
6375                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6376         return err;
6377 }
6378
6379 /**
6380  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6381  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6382  *
6383  * Returns 0 on success, negative on failure
6384  **/
6385 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6386                              struct ixgbe_ring *rx_ring)
6387 {
6388         struct device *dev = rx_ring->dev;
6389         int orig_node = dev_to_node(dev);
6390         int ring_node = -1;
6391         int size;
6392
6393         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6394
6395         if (rx_ring->q_vector)
6396                 ring_node = rx_ring->q_vector->numa_node;
6397
6398         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6399         if (!rx_ring->rx_buffer_info)
6400                 rx_ring->rx_buffer_info = vmalloc(size);
6401         if (!rx_ring->rx_buffer_info)
6402                 goto err;
6403
6404         /* Round up to nearest 4K */
6405         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6406         rx_ring->size = ALIGN(rx_ring->size, 4096);
6407
6408         set_dev_node(dev, ring_node);
6409         rx_ring->desc = dma_alloc_coherent(dev,
6410                                            rx_ring->size,
6411                                            &rx_ring->dma,
6412                                            GFP_KERNEL);
6413         set_dev_node(dev, orig_node);
6414         if (!rx_ring->desc)
6415                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6416                                                    &rx_ring->dma, GFP_KERNEL);
6417         if (!rx_ring->desc)
6418                 goto err;
6419
6420         rx_ring->next_to_clean = 0;
6421         rx_ring->next_to_use = 0;
6422
6423         /* XDP RX-queue info */
6424         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6425                              rx_ring->queue_index) < 0)
6426                 goto err;
6427
6428         rx_ring->xdp_prog = adapter->xdp_prog;
6429
6430         return 0;
6431 err:
6432         vfree(rx_ring->rx_buffer_info);
6433         rx_ring->rx_buffer_info = NULL;
6434         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6435         return -ENOMEM;
6436 }
6437
6438 /**
6439  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6440  * @adapter: board private structure
6441  *
6442  * If this function returns with an error, then it's possible one or
6443  * more of the rings is populated (while the rest are not).  It is the
6444  * callers duty to clean those orphaned rings.
6445  *
6446  * Return 0 on success, negative on failure
6447  **/
6448 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6449 {
6450         int i, err = 0;
6451
6452         for (i = 0; i < adapter->num_rx_queues; i++) {
6453                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6454                 if (!err)
6455                         continue;
6456
6457                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6458                 goto err_setup_rx;
6459         }
6460
6461 #ifdef IXGBE_FCOE
6462         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6463         if (!err)
6464 #endif
6465                 return 0;
6466 err_setup_rx:
6467         /* rewind the index freeing the rings as we go */
6468         while (i--)
6469                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6470         return err;
6471 }
6472
6473 /**
6474  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6475  * @tx_ring: Tx descriptor ring for a specific queue
6476  *
6477  * Free all transmit software resources
6478  **/
6479 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6480 {
6481         ixgbe_clean_tx_ring(tx_ring);
6482
6483         vfree(tx_ring->tx_buffer_info);
6484         tx_ring->tx_buffer_info = NULL;
6485
6486         /* if not set, then don't free */
6487         if (!tx_ring->desc)
6488                 return;
6489
6490         dma_free_coherent(tx_ring->dev, tx_ring->size,
6491                           tx_ring->desc, tx_ring->dma);
6492
6493         tx_ring->desc = NULL;
6494 }
6495
6496 /**
6497  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6498  * @adapter: board private structure
6499  *
6500  * Free all transmit software resources
6501  **/
6502 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6503 {
6504         int i;
6505
6506         for (i = 0; i < adapter->num_tx_queues; i++)
6507                 if (adapter->tx_ring[i]->desc)
6508                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6509         for (i = 0; i < adapter->num_xdp_queues; i++)
6510                 if (adapter->xdp_ring[i]->desc)
6511                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6512 }
6513
6514 /**
6515  * ixgbe_free_rx_resources - Free Rx Resources
6516  * @rx_ring: ring to clean the resources from
6517  *
6518  * Free all receive software resources
6519  **/
6520 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6521 {
6522         ixgbe_clean_rx_ring(rx_ring);
6523
6524         rx_ring->xdp_prog = NULL;
6525         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6526         vfree(rx_ring->rx_buffer_info);
6527         rx_ring->rx_buffer_info = NULL;
6528
6529         /* if not set, then don't free */
6530         if (!rx_ring->desc)
6531                 return;
6532
6533         dma_free_coherent(rx_ring->dev, rx_ring->size,
6534                           rx_ring->desc, rx_ring->dma);
6535
6536         rx_ring->desc = NULL;
6537 }
6538
6539 /**
6540  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6541  * @adapter: board private structure
6542  *
6543  * Free all receive software resources
6544  **/
6545 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6546 {
6547         int i;
6548
6549 #ifdef IXGBE_FCOE
6550         ixgbe_free_fcoe_ddp_resources(adapter);
6551
6552 #endif
6553         for (i = 0; i < adapter->num_rx_queues; i++)
6554                 if (adapter->rx_ring[i]->desc)
6555                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6556 }
6557
6558 /**
6559  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6560  * @netdev: network interface device structure
6561  * @new_mtu: new value for maximum frame size
6562  *
6563  * Returns 0 on success, negative on failure
6564  **/
6565 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6566 {
6567         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6568
6569         /*
6570          * For 82599EB we cannot allow legacy VFs to enable their receive
6571          * paths when MTU greater than 1500 is configured.  So display a
6572          * warning that legacy VFs will be disabled.
6573          */
6574         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6575             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6576             (new_mtu > ETH_DATA_LEN))
6577                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6578
6579         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6580
6581         /* must set new MTU before calling down or up */
6582         netdev->mtu = new_mtu;
6583
6584         if (netif_running(netdev))
6585                 ixgbe_reinit_locked(adapter);
6586
6587         return 0;
6588 }
6589
6590 /**
6591  * ixgbe_open - Called when a network interface is made active
6592  * @netdev: network interface device structure
6593  *
6594  * Returns 0 on success, negative value on failure
6595  *
6596  * The open entry point is called when a network interface is made
6597  * active by the system (IFF_UP).  At this point all resources needed
6598  * for transmit and receive operations are allocated, the interrupt
6599  * handler is registered with the OS, the watchdog timer is started,
6600  * and the stack is notified that the interface is ready.
6601  **/
6602 int ixgbe_open(struct net_device *netdev)
6603 {
6604         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6605         struct ixgbe_hw *hw = &adapter->hw;
6606         int err, queues;
6607
6608         /* disallow open during test */
6609         if (test_bit(__IXGBE_TESTING, &adapter->state))
6610                 return -EBUSY;
6611
6612         netif_carrier_off(netdev);
6613
6614         /* allocate transmit descriptors */
6615         err = ixgbe_setup_all_tx_resources(adapter);
6616         if (err)
6617                 goto err_setup_tx;
6618
6619         /* allocate receive descriptors */
6620         err = ixgbe_setup_all_rx_resources(adapter);
6621         if (err)
6622                 goto err_setup_rx;
6623
6624         ixgbe_configure(adapter);
6625
6626         err = ixgbe_request_irq(adapter);
6627         if (err)
6628                 goto err_req_irq;
6629
6630         /* Notify the stack of the actual queue counts. */
6631         if (adapter->num_rx_pools > 1)
6632                 queues = adapter->num_rx_queues_per_pool;
6633         else
6634                 queues = adapter->num_tx_queues;
6635
6636         err = netif_set_real_num_tx_queues(netdev, queues);
6637         if (err)
6638                 goto err_set_queues;
6639
6640         if (adapter->num_rx_pools > 1 &&
6641             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6642                 queues = IXGBE_MAX_L2A_QUEUES;
6643         else
6644                 queues = adapter->num_rx_queues;
6645         err = netif_set_real_num_rx_queues(netdev, queues);
6646         if (err)
6647                 goto err_set_queues;
6648
6649         ixgbe_ptp_init(adapter);
6650
6651         ixgbe_up_complete(adapter);
6652
6653         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6654         udp_tunnel_get_rx_info(netdev);
6655
6656         return 0;
6657
6658 err_set_queues:
6659         ixgbe_free_irq(adapter);
6660 err_req_irq:
6661         ixgbe_free_all_rx_resources(adapter);
6662         if (hw->phy.ops.set_phy_power && !adapter->wol)
6663                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6664 err_setup_rx:
6665         ixgbe_free_all_tx_resources(adapter);
6666 err_setup_tx:
6667         ixgbe_reset(adapter);
6668
6669         return err;
6670 }
6671
6672 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6673 {
6674         ixgbe_ptp_suspend(adapter);
6675
6676         if (adapter->hw.phy.ops.enter_lplu) {
6677                 adapter->hw.phy.reset_disable = true;
6678                 ixgbe_down(adapter);
6679                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6680                 adapter->hw.phy.reset_disable = false;
6681         } else {
6682                 ixgbe_down(adapter);
6683         }
6684
6685         ixgbe_free_irq(adapter);
6686
6687         ixgbe_free_all_tx_resources(adapter);
6688         ixgbe_free_all_rx_resources(adapter);
6689 }
6690
6691 /**
6692  * ixgbe_close - Disables a network interface
6693  * @netdev: network interface device structure
6694  *
6695  * Returns 0, this is not allowed to fail
6696  *
6697  * The close entry point is called when an interface is de-activated
6698  * by the OS.  The hardware is still under the drivers control, but
6699  * needs to be disabled.  A global MAC reset is issued to stop the
6700  * hardware, and all transmit and receive resources are freed.
6701  **/
6702 int ixgbe_close(struct net_device *netdev)
6703 {
6704         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6705
6706         ixgbe_ptp_stop(adapter);
6707
6708         if (netif_device_present(netdev))
6709                 ixgbe_close_suspend(adapter);
6710
6711         ixgbe_fdir_filter_exit(adapter);
6712
6713         ixgbe_release_hw_control(adapter);
6714
6715         return 0;
6716 }
6717
6718 #ifdef CONFIG_PM
6719 static int ixgbe_resume(struct pci_dev *pdev)
6720 {
6721         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6722         struct net_device *netdev = adapter->netdev;
6723         u32 err;
6724
6725         adapter->hw.hw_addr = adapter->io_addr;
6726         pci_set_power_state(pdev, PCI_D0);
6727         pci_restore_state(pdev);
6728         /*
6729          * pci_restore_state clears dev->state_saved so call
6730          * pci_save_state to restore it.
6731          */
6732         pci_save_state(pdev);
6733
6734         err = pci_enable_device_mem(pdev);
6735         if (err) {
6736                 e_dev_err("Cannot enable PCI device from suspend\n");
6737                 return err;
6738         }
6739         smp_mb__before_atomic();
6740         clear_bit(__IXGBE_DISABLED, &adapter->state);
6741         pci_set_master(pdev);
6742
6743         pci_wake_from_d3(pdev, false);
6744
6745         ixgbe_reset(adapter);
6746
6747         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6748
6749         rtnl_lock();
6750         err = ixgbe_init_interrupt_scheme(adapter);
6751         if (!err && netif_running(netdev))
6752                 err = ixgbe_open(netdev);
6753
6754
6755         if (!err)
6756                 netif_device_attach(netdev);
6757         rtnl_unlock();
6758
6759         return err;
6760 }
6761 #endif /* CONFIG_PM */
6762
6763 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6764 {
6765         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6766         struct net_device *netdev = adapter->netdev;
6767         struct ixgbe_hw *hw = &adapter->hw;
6768         u32 ctrl;
6769         u32 wufc = adapter->wol;
6770 #ifdef CONFIG_PM
6771         int retval = 0;
6772 #endif
6773
6774         rtnl_lock();
6775         netif_device_detach(netdev);
6776
6777         if (netif_running(netdev))
6778                 ixgbe_close_suspend(adapter);
6779
6780         ixgbe_clear_interrupt_scheme(adapter);
6781         rtnl_unlock();
6782
6783 #ifdef CONFIG_PM
6784         retval = pci_save_state(pdev);
6785         if (retval)
6786                 return retval;
6787
6788 #endif
6789         if (hw->mac.ops.stop_link_on_d3)
6790                 hw->mac.ops.stop_link_on_d3(hw);
6791
6792         if (wufc) {
6793                 u32 fctrl;
6794
6795                 ixgbe_set_rx_mode(netdev);
6796
6797                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6798                 if (hw->mac.ops.enable_tx_laser)
6799                         hw->mac.ops.enable_tx_laser(hw);
6800
6801                 /* enable the reception of multicast packets */
6802                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6803                 fctrl |= IXGBE_FCTRL_MPE;
6804                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6805
6806                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6807                 ctrl |= IXGBE_CTRL_GIO_DIS;
6808                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6809
6810                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6811         } else {
6812                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6813                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6814         }
6815
6816         switch (hw->mac.type) {
6817         case ixgbe_mac_82598EB:
6818                 pci_wake_from_d3(pdev, false);
6819                 break;
6820         case ixgbe_mac_82599EB:
6821         case ixgbe_mac_X540:
6822         case ixgbe_mac_X550:
6823         case ixgbe_mac_X550EM_x:
6824         case ixgbe_mac_x550em_a:
6825                 pci_wake_from_d3(pdev, !!wufc);
6826                 break;
6827         default:
6828                 break;
6829         }
6830
6831         *enable_wake = !!wufc;
6832         if (hw->phy.ops.set_phy_power && !*enable_wake)
6833                 hw->phy.ops.set_phy_power(hw, false);
6834
6835         ixgbe_release_hw_control(adapter);
6836
6837         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6838                 pci_disable_device(pdev);
6839
6840         return 0;
6841 }
6842
6843 #ifdef CONFIG_PM
6844 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6845 {
6846         int retval;
6847         bool wake;
6848
6849         retval = __ixgbe_shutdown(pdev, &wake);
6850         if (retval)
6851                 return retval;
6852
6853         if (wake) {
6854                 pci_prepare_to_sleep(pdev);
6855         } else {
6856                 pci_wake_from_d3(pdev, false);
6857                 pci_set_power_state(pdev, PCI_D3hot);
6858         }
6859
6860         return 0;
6861 }
6862 #endif /* CONFIG_PM */
6863
6864 static void ixgbe_shutdown(struct pci_dev *pdev)
6865 {
6866         bool wake;
6867
6868         __ixgbe_shutdown(pdev, &wake);
6869
6870         if (system_state == SYSTEM_POWER_OFF) {
6871                 pci_wake_from_d3(pdev, wake);
6872                 pci_set_power_state(pdev, PCI_D3hot);
6873         }
6874 }
6875
6876 /**
6877  * ixgbe_update_stats - Update the board statistics counters.
6878  * @adapter: board private structure
6879  **/
6880 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6881 {
6882         struct net_device *netdev = adapter->netdev;
6883         struct ixgbe_hw *hw = &adapter->hw;
6884         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6885         u64 total_mpc = 0;
6886         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6887         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6888         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6889         u64 alloc_rx_page = 0;
6890         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6891
6892         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6893             test_bit(__IXGBE_RESETTING, &adapter->state))
6894                 return;
6895
6896         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6897                 u64 rsc_count = 0;
6898                 u64 rsc_flush = 0;
6899                 for (i = 0; i < adapter->num_rx_queues; i++) {
6900                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6901                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6902                 }
6903                 adapter->rsc_total_count = rsc_count;
6904                 adapter->rsc_total_flush = rsc_flush;
6905         }
6906
6907         for (i = 0; i < adapter->num_rx_queues; i++) {
6908                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6909                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6910                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
6911                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6912                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6913                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6914                 bytes += rx_ring->stats.bytes;
6915                 packets += rx_ring->stats.packets;
6916         }
6917         adapter->non_eop_descs = non_eop_descs;
6918         adapter->alloc_rx_page = alloc_rx_page;
6919         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6920         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6921         adapter->hw_csum_rx_error = hw_csum_rx_error;
6922         netdev->stats.rx_bytes = bytes;
6923         netdev->stats.rx_packets = packets;
6924
6925         bytes = 0;
6926         packets = 0;
6927         /* gather some stats to the adapter struct that are per queue */
6928         for (i = 0; i < adapter->num_tx_queues; i++) {
6929                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6930                 restart_queue += tx_ring->tx_stats.restart_queue;
6931                 tx_busy += tx_ring->tx_stats.tx_busy;
6932                 bytes += tx_ring->stats.bytes;
6933                 packets += tx_ring->stats.packets;
6934         }
6935         for (i = 0; i < adapter->num_xdp_queues; i++) {
6936                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6937
6938                 restart_queue += xdp_ring->tx_stats.restart_queue;
6939                 tx_busy += xdp_ring->tx_stats.tx_busy;
6940                 bytes += xdp_ring->stats.bytes;
6941                 packets += xdp_ring->stats.packets;
6942         }
6943         adapter->restart_queue = restart_queue;
6944         adapter->tx_busy = tx_busy;
6945         netdev->stats.tx_bytes = bytes;
6946         netdev->stats.tx_packets = packets;
6947
6948         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6949
6950         /* 8 register reads */
6951         for (i = 0; i < 8; i++) {
6952                 /* for packet buffers not used, the register should read 0 */
6953                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6954                 missed_rx += mpc;
6955                 hwstats->mpc[i] += mpc;
6956                 total_mpc += hwstats->mpc[i];
6957                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6958                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6959                 switch (hw->mac.type) {
6960                 case ixgbe_mac_82598EB:
6961                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6962                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6963                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6964                         hwstats->pxonrxc[i] +=
6965                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6966                         break;
6967                 case ixgbe_mac_82599EB:
6968                 case ixgbe_mac_X540:
6969                 case ixgbe_mac_X550:
6970                 case ixgbe_mac_X550EM_x:
6971                 case ixgbe_mac_x550em_a:
6972                         hwstats->pxonrxc[i] +=
6973                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6974                         break;
6975                 default:
6976                         break;
6977                 }
6978         }
6979
6980         /*16 register reads */
6981         for (i = 0; i < 16; i++) {
6982                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6983                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6984                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6985                     (hw->mac.type == ixgbe_mac_X540) ||
6986                     (hw->mac.type == ixgbe_mac_X550) ||
6987                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6988                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6989                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6990                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6991                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6992                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6993                 }
6994         }
6995
6996         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6997         /* work around hardware counting issue */
6998         hwstats->gprc -= missed_rx;
6999
7000         ixgbe_update_xoff_received(adapter);
7001
7002         /* 82598 hardware only has a 32 bit counter in the high register */
7003         switch (hw->mac.type) {
7004         case ixgbe_mac_82598EB:
7005                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7006                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7007                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7008                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7009                 break;
7010         case ixgbe_mac_X540:
7011         case ixgbe_mac_X550:
7012         case ixgbe_mac_X550EM_x:
7013         case ixgbe_mac_x550em_a:
7014                 /* OS2BMC stats are X540 and later */
7015                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7016                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7017                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7018                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7019                 /* fall through */
7020         case ixgbe_mac_82599EB:
7021                 for (i = 0; i < 16; i++)
7022                         adapter->hw_rx_no_dma_resources +=
7023                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7024                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7025                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7026                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7027                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7028                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7029                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7030                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7031                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7032                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7033 #ifdef IXGBE_FCOE
7034                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7035                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7036                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7037                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7038                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7039                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7040                 /* Add up per cpu counters for total ddp aloc fail */
7041                 if (adapter->fcoe.ddp_pool) {
7042                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7043                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7044                         unsigned int cpu;
7045                         u64 noddp = 0, noddp_ext_buff = 0;
7046                         for_each_possible_cpu(cpu) {
7047                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7048                                 noddp += ddp_pool->noddp;
7049                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7050                         }
7051                         hwstats->fcoe_noddp = noddp;
7052                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7053                 }
7054 #endif /* IXGBE_FCOE */
7055                 break;
7056         default:
7057                 break;
7058         }
7059         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7060         hwstats->bprc += bprc;
7061         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7062         if (hw->mac.type == ixgbe_mac_82598EB)
7063                 hwstats->mprc -= bprc;
7064         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7065         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7066         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7067         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7068         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7069         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7070         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7071         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7072         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7073         hwstats->lxontxc += lxon;
7074         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7075         hwstats->lxofftxc += lxoff;
7076         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7077         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7078         /*
7079          * 82598 errata - tx of flow control packets is included in tx counters
7080          */
7081         xon_off_tot = lxon + lxoff;
7082         hwstats->gptc -= xon_off_tot;
7083         hwstats->mptc -= xon_off_tot;
7084         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7085         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7086         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7087         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7088         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7089         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7090         hwstats->ptc64 -= xon_off_tot;
7091         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7092         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7093         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7094         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7095         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7096         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7097
7098         /* Fill out the OS statistics structure */
7099         netdev->stats.multicast = hwstats->mprc;
7100
7101         /* Rx Errors */
7102         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7103         netdev->stats.rx_dropped = 0;
7104         netdev->stats.rx_length_errors = hwstats->rlec;
7105         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7106         netdev->stats.rx_missed_errors = total_mpc;
7107 }
7108
7109 /**
7110  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7111  * @adapter: pointer to the device adapter structure
7112  **/
7113 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7114 {
7115         struct ixgbe_hw *hw = &adapter->hw;
7116         int i;
7117
7118         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7119                 return;
7120
7121         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7122
7123         /* if interface is down do nothing */
7124         if (test_bit(__IXGBE_DOWN, &adapter->state))
7125                 return;
7126
7127         /* do nothing if we are not using signature filters */
7128         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7129                 return;
7130
7131         adapter->fdir_overflow++;
7132
7133         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7134                 for (i = 0; i < adapter->num_tx_queues; i++)
7135                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7136                                 &(adapter->tx_ring[i]->state));
7137                 for (i = 0; i < adapter->num_xdp_queues; i++)
7138                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7139                                 &adapter->xdp_ring[i]->state);
7140                 /* re-enable flow director interrupts */
7141                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7142         } else {
7143                 e_err(probe, "failed to finish FDIR re-initialization, "
7144                       "ignored adding FDIR ATR filters\n");
7145         }
7146 }
7147
7148 /**
7149  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7150  * @adapter: pointer to the device adapter structure
7151  *
7152  * This function serves two purposes.  First it strobes the interrupt lines
7153  * in order to make certain interrupts are occurring.  Secondly it sets the
7154  * bits needed to check for TX hangs.  As a result we should immediately
7155  * determine if a hang has occurred.
7156  */
7157 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7158 {
7159         struct ixgbe_hw *hw = &adapter->hw;
7160         u64 eics = 0;
7161         int i;
7162
7163         /* If we're down, removing or resetting, just bail */
7164         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7165             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7166             test_bit(__IXGBE_RESETTING, &adapter->state))
7167                 return;
7168
7169         /* Force detection of hung controller */
7170         if (netif_carrier_ok(adapter->netdev)) {
7171                 for (i = 0; i < adapter->num_tx_queues; i++)
7172                         set_check_for_tx_hang(adapter->tx_ring[i]);
7173                 for (i = 0; i < adapter->num_xdp_queues; i++)
7174                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7175         }
7176
7177         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7178                 /*
7179                  * for legacy and MSI interrupts don't set any bits
7180                  * that are enabled for EIAM, because this operation
7181                  * would set *both* EIMS and EICS for any bit in EIAM
7182                  */
7183                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7184                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7185         } else {
7186                 /* get one bit for every active tx/rx interrupt vector */
7187                 for (i = 0; i < adapter->num_q_vectors; i++) {
7188                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7189                         if (qv->rx.ring || qv->tx.ring)
7190                                 eics |= BIT_ULL(i);
7191                 }
7192         }
7193
7194         /* Cause software interrupt to ensure rings are cleaned */
7195         ixgbe_irq_rearm_queues(adapter, eics);
7196 }
7197
7198 /**
7199  * ixgbe_watchdog_update_link - update the link status
7200  * @adapter: pointer to the device adapter structure
7201  * @link_speed: pointer to a u32 to store the link_speed
7202  **/
7203 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7204 {
7205         struct ixgbe_hw *hw = &adapter->hw;
7206         u32 link_speed = adapter->link_speed;
7207         bool link_up = adapter->link_up;
7208         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7209
7210         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7211                 return;
7212
7213         if (hw->mac.ops.check_link) {
7214                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7215         } else {
7216                 /* always assume link is up, if no check link function */
7217                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7218                 link_up = true;
7219         }
7220
7221         if (adapter->ixgbe_ieee_pfc)
7222                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7223
7224         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7225                 hw->mac.ops.fc_enable(hw);
7226                 ixgbe_set_rx_drop_en(adapter);
7227         }
7228
7229         if (link_up ||
7230             time_after(jiffies, (adapter->link_check_timeout +
7231                                  IXGBE_TRY_LINK_TIMEOUT))) {
7232                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7233                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7234                 IXGBE_WRITE_FLUSH(hw);
7235         }
7236
7237         adapter->link_up = link_up;
7238         adapter->link_speed = link_speed;
7239 }
7240
7241 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7242 {
7243 #ifdef CONFIG_IXGBE_DCB
7244         struct net_device *netdev = adapter->netdev;
7245         struct dcb_app app = {
7246                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7247                               .protocol = 0,
7248                              };
7249         u8 up = 0;
7250
7251         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7252                 up = dcb_ieee_getapp_mask(netdev, &app);
7253
7254         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7255 #endif
7256 }
7257
7258 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
7259 {
7260         if (netif_is_macvlan(upper)) {
7261                 struct macvlan_dev *vlan = netdev_priv(upper);
7262
7263                 if (vlan->fwd_priv)
7264                         netif_tx_wake_all_queues(upper);
7265         }
7266
7267         return 0;
7268 }
7269
7270 /**
7271  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7272  *                             print link up message
7273  * @adapter: pointer to the device adapter structure
7274  **/
7275 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7276 {
7277         struct net_device *netdev = adapter->netdev;
7278         struct ixgbe_hw *hw = &adapter->hw;
7279         u32 link_speed = adapter->link_speed;
7280         const char *speed_str;
7281         bool flow_rx, flow_tx;
7282
7283         /* only continue if link was previously down */
7284         if (netif_carrier_ok(netdev))
7285                 return;
7286
7287         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7288
7289         switch (hw->mac.type) {
7290         case ixgbe_mac_82598EB: {
7291                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7292                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7293                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7294                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7295         }
7296                 break;
7297         case ixgbe_mac_X540:
7298         case ixgbe_mac_X550:
7299         case ixgbe_mac_X550EM_x:
7300         case ixgbe_mac_x550em_a:
7301         case ixgbe_mac_82599EB: {
7302                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7303                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7304                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7305                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7306         }
7307                 break;
7308         default:
7309                 flow_tx = false;
7310                 flow_rx = false;
7311                 break;
7312         }
7313
7314         adapter->last_rx_ptp_check = jiffies;
7315
7316         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7317                 ixgbe_ptp_start_cyclecounter(adapter);
7318
7319         switch (link_speed) {
7320         case IXGBE_LINK_SPEED_10GB_FULL:
7321                 speed_str = "10 Gbps";
7322                 break;
7323         case IXGBE_LINK_SPEED_2_5GB_FULL:
7324                 speed_str = "2.5 Gbps";
7325                 break;
7326         case IXGBE_LINK_SPEED_1GB_FULL:
7327                 speed_str = "1 Gbps";
7328                 break;
7329         case IXGBE_LINK_SPEED_100_FULL:
7330                 speed_str = "100 Mbps";
7331                 break;
7332         case IXGBE_LINK_SPEED_10_FULL:
7333                 speed_str = "10 Mbps";
7334                 break;
7335         default:
7336                 speed_str = "unknown speed";
7337                 break;
7338         }
7339         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7340                ((flow_rx && flow_tx) ? "RX/TX" :
7341                (flow_rx ? "RX" :
7342                (flow_tx ? "TX" : "None"))));
7343
7344         netif_carrier_on(netdev);
7345         ixgbe_check_vf_rate_limit(adapter);
7346
7347         /* enable transmits */
7348         netif_tx_wake_all_queues(adapter->netdev);
7349
7350         /* enable any upper devices */
7351         rtnl_lock();
7352         netdev_walk_all_upper_dev_rcu(adapter->netdev,
7353                                       ixgbe_enable_macvlan, NULL);
7354         rtnl_unlock();
7355
7356         /* update the default user priority for VFs */
7357         ixgbe_update_default_up(adapter);
7358
7359         /* ping all the active vfs to let them know link has changed */
7360         ixgbe_ping_all_vfs(adapter);
7361 }
7362
7363 /**
7364  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7365  *                               print link down message
7366  * @adapter: pointer to the adapter structure
7367  **/
7368 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7369 {
7370         struct net_device *netdev = adapter->netdev;
7371         struct ixgbe_hw *hw = &adapter->hw;
7372
7373         adapter->link_up = false;
7374         adapter->link_speed = 0;
7375
7376         /* only continue if link was up previously */
7377         if (!netif_carrier_ok(netdev))
7378                 return;
7379
7380         /* poll for SFP+ cable when link is down */
7381         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7382                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7383
7384         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7385                 ixgbe_ptp_start_cyclecounter(adapter);
7386
7387         e_info(drv, "NIC Link is Down\n");
7388         netif_carrier_off(netdev);
7389
7390         /* ping all the active vfs to let them know link has changed */
7391         ixgbe_ping_all_vfs(adapter);
7392 }
7393
7394 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7395 {
7396         int i;
7397
7398         for (i = 0; i < adapter->num_tx_queues; i++) {
7399                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7400
7401                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7402                         return true;
7403         }
7404
7405         for (i = 0; i < adapter->num_xdp_queues; i++) {
7406                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7407
7408                 if (ring->next_to_use != ring->next_to_clean)
7409                         return true;
7410         }
7411
7412         return false;
7413 }
7414
7415 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7416 {
7417         struct ixgbe_hw *hw = &adapter->hw;
7418         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7419         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7420
7421         int i, j;
7422
7423         if (!adapter->num_vfs)
7424                 return false;
7425
7426         /* resetting the PF is only needed for MAC before X550 */
7427         if (hw->mac.type >= ixgbe_mac_X550)
7428                 return false;
7429
7430         for (i = 0; i < adapter->num_vfs; i++) {
7431                 for (j = 0; j < q_per_pool; j++) {
7432                         u32 h, t;
7433
7434                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7435                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7436
7437                         if (h != t)
7438                                 return true;
7439                 }
7440         }
7441
7442         return false;
7443 }
7444
7445 /**
7446  * ixgbe_watchdog_flush_tx - flush queues on link down
7447  * @adapter: pointer to the device adapter structure
7448  **/
7449 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7450 {
7451         if (!netif_carrier_ok(adapter->netdev)) {
7452                 if (ixgbe_ring_tx_pending(adapter) ||
7453                     ixgbe_vf_tx_pending(adapter)) {
7454                         /* We've lost link, so the controller stops DMA,
7455                          * but we've got queued Tx work that's never going
7456                          * to get done, so reset controller to flush Tx.
7457                          * (Do the reset outside of interrupt context).
7458                          */
7459                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7460                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7461                 }
7462         }
7463 }
7464
7465 #ifdef CONFIG_PCI_IOV
7466 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7467 {
7468         struct ixgbe_hw *hw = &adapter->hw;
7469         struct pci_dev *pdev = adapter->pdev;
7470         unsigned int vf;
7471         u32 gpc;
7472
7473         if (!(netif_carrier_ok(adapter->netdev)))
7474                 return;
7475
7476         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7477         if (gpc) /* If incrementing then no need for the check below */
7478                 return;
7479         /* Check to see if a bad DMA write target from an errant or
7480          * malicious VF has caused a PCIe error.  If so then we can
7481          * issue a VFLR to the offending VF(s) and then resume without
7482          * requesting a full slot reset.
7483          */
7484
7485         if (!pdev)
7486                 return;
7487
7488         /* check status reg for all VFs owned by this PF */
7489         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7490                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7491                 u16 status_reg;
7492
7493                 if (!vfdev)
7494                         continue;
7495                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7496                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7497                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7498                         pcie_flr(vfdev);
7499         }
7500 }
7501
7502 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7503 {
7504         u32 ssvpc;
7505
7506         /* Do not perform spoof check for 82598 or if not in IOV mode */
7507         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7508             adapter->num_vfs == 0)
7509                 return;
7510
7511         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7512
7513         /*
7514          * ssvpc register is cleared on read, if zero then no
7515          * spoofed packets in the last interval.
7516          */
7517         if (!ssvpc)
7518                 return;
7519
7520         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7521 }
7522 #else
7523 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7524 {
7525 }
7526
7527 static void
7528 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7529 {
7530 }
7531 #endif /* CONFIG_PCI_IOV */
7532
7533
7534 /**
7535  * ixgbe_watchdog_subtask - check and bring link up
7536  * @adapter: pointer to the device adapter structure
7537  **/
7538 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7539 {
7540         /* if interface is down, removing or resetting, do nothing */
7541         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7542             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7543             test_bit(__IXGBE_RESETTING, &adapter->state))
7544                 return;
7545
7546         ixgbe_watchdog_update_link(adapter);
7547
7548         if (adapter->link_up)
7549                 ixgbe_watchdog_link_is_up(adapter);
7550         else
7551                 ixgbe_watchdog_link_is_down(adapter);
7552
7553         ixgbe_check_for_bad_vf(adapter);
7554         ixgbe_spoof_check(adapter);
7555         ixgbe_update_stats(adapter);
7556
7557         ixgbe_watchdog_flush_tx(adapter);
7558 }
7559
7560 /**
7561  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7562  * @adapter: the ixgbe adapter structure
7563  **/
7564 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7565 {
7566         struct ixgbe_hw *hw = &adapter->hw;
7567         s32 err;
7568
7569         /* not searching for SFP so there is nothing to do here */
7570         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7571             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7572                 return;
7573
7574         if (adapter->sfp_poll_time &&
7575             time_after(adapter->sfp_poll_time, jiffies))
7576                 return; /* If not yet time to poll for SFP */
7577
7578         /* someone else is in init, wait until next service event */
7579         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7580                 return;
7581
7582         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7583
7584         err = hw->phy.ops.identify_sfp(hw);
7585         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7586                 goto sfp_out;
7587
7588         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7589                 /* If no cable is present, then we need to reset
7590                  * the next time we find a good cable. */
7591                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7592         }
7593
7594         /* exit on error */
7595         if (err)
7596                 goto sfp_out;
7597
7598         /* exit if reset not needed */
7599         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7600                 goto sfp_out;
7601
7602         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7603
7604         /*
7605          * A module may be identified correctly, but the EEPROM may not have
7606          * support for that module.  setup_sfp() will fail in that case, so
7607          * we should not allow that module to load.
7608          */
7609         if (hw->mac.type == ixgbe_mac_82598EB)
7610                 err = hw->phy.ops.reset(hw);
7611         else
7612                 err = hw->mac.ops.setup_sfp(hw);
7613
7614         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7615                 goto sfp_out;
7616
7617         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7618         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7619
7620 sfp_out:
7621         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7622
7623         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7624             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7625                 e_dev_err("failed to initialize because an unsupported "
7626                           "SFP+ module type was detected.\n");
7627                 e_dev_err("Reload the driver after installing a "
7628                           "supported module.\n");
7629                 unregister_netdev(adapter->netdev);
7630         }
7631 }
7632
7633 /**
7634  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7635  * @adapter: the ixgbe adapter structure
7636  **/
7637 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7638 {
7639         struct ixgbe_hw *hw = &adapter->hw;
7640         u32 cap_speed;
7641         u32 speed;
7642         bool autoneg = false;
7643
7644         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7645                 return;
7646
7647         /* someone else is in init, wait until next service event */
7648         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7649                 return;
7650
7651         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7652
7653         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7654
7655         /* advertise highest capable link speed */
7656         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7657                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7658         else
7659                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7660                                      IXGBE_LINK_SPEED_1GB_FULL);
7661
7662         if (hw->mac.ops.setup_link)
7663                 hw->mac.ops.setup_link(hw, speed, true);
7664
7665         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7666         adapter->link_check_timeout = jiffies;
7667         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7668 }
7669
7670 /**
7671  * ixgbe_service_timer - Timer Call-back
7672  * @data: pointer to adapter cast into an unsigned long
7673  **/
7674 static void ixgbe_service_timer(struct timer_list *t)
7675 {
7676         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7677         unsigned long next_event_offset;
7678
7679         /* poll faster when waiting for link */
7680         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7681                 next_event_offset = HZ / 10;
7682         else
7683                 next_event_offset = HZ * 2;
7684
7685         /* Reset the timer */
7686         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7687
7688         ixgbe_service_event_schedule(adapter);
7689 }
7690
7691 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7692 {
7693         struct ixgbe_hw *hw = &adapter->hw;
7694         u32 status;
7695
7696         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7697                 return;
7698
7699         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7700
7701         if (!hw->phy.ops.handle_lasi)
7702                 return;
7703
7704         status = hw->phy.ops.handle_lasi(&adapter->hw);
7705         if (status != IXGBE_ERR_OVERTEMP)
7706                 return;
7707
7708         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7709 }
7710
7711 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7712 {
7713         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7714                 return;
7715
7716         /* If we're already down, removing or resetting, just bail */
7717         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7718             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7719             test_bit(__IXGBE_RESETTING, &adapter->state))
7720                 return;
7721
7722         ixgbe_dump(adapter);
7723         netdev_err(adapter->netdev, "Reset adapter\n");
7724         adapter->tx_timeout_count++;
7725
7726         rtnl_lock();
7727         ixgbe_reinit_locked(adapter);
7728         rtnl_unlock();
7729 }
7730
7731 /**
7732  * ixgbe_service_task - manages and runs subtasks
7733  * @work: pointer to work_struct containing our data
7734  **/
7735 static void ixgbe_service_task(struct work_struct *work)
7736 {
7737         struct ixgbe_adapter *adapter = container_of(work,
7738                                                      struct ixgbe_adapter,
7739                                                      service_task);
7740         if (ixgbe_removed(adapter->hw.hw_addr)) {
7741                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7742                         rtnl_lock();
7743                         ixgbe_down(adapter);
7744                         rtnl_unlock();
7745                 }
7746                 ixgbe_service_event_complete(adapter);
7747                 return;
7748         }
7749         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7750                 rtnl_lock();
7751                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7752                 udp_tunnel_get_rx_info(adapter->netdev);
7753                 rtnl_unlock();
7754         }
7755         ixgbe_reset_subtask(adapter);
7756         ixgbe_phy_interrupt_subtask(adapter);
7757         ixgbe_sfp_detection_subtask(adapter);
7758         ixgbe_sfp_link_config_subtask(adapter);
7759         ixgbe_check_overtemp_subtask(adapter);
7760         ixgbe_watchdog_subtask(adapter);
7761         ixgbe_fdir_reinit_subtask(adapter);
7762         ixgbe_check_hang_subtask(adapter);
7763
7764         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7765                 ixgbe_ptp_overflow_check(adapter);
7766                 ixgbe_ptp_rx_hang(adapter);
7767                 ixgbe_ptp_tx_hang(adapter);
7768         }
7769
7770         ixgbe_service_event_complete(adapter);
7771 }
7772
7773 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7774                      struct ixgbe_tx_buffer *first,
7775                      u8 *hdr_len)
7776 {
7777         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7778         struct sk_buff *skb = first->skb;
7779         union {
7780                 struct iphdr *v4;
7781                 struct ipv6hdr *v6;
7782                 unsigned char *hdr;
7783         } ip;
7784         union {
7785                 struct tcphdr *tcp;
7786                 unsigned char *hdr;
7787         } l4;
7788         u32 paylen, l4_offset;
7789         int err;
7790
7791         if (skb->ip_summed != CHECKSUM_PARTIAL)
7792                 return 0;
7793
7794         if (!skb_is_gso(skb))
7795                 return 0;
7796
7797         err = skb_cow_head(skb, 0);
7798         if (err < 0)
7799                 return err;
7800
7801         if (eth_p_mpls(first->protocol))
7802                 ip.hdr = skb_inner_network_header(skb);
7803         else
7804                 ip.hdr = skb_network_header(skb);
7805         l4.hdr = skb_checksum_start(skb);
7806
7807         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7808         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7809
7810         /* initialize outer IP header fields */
7811         if (ip.v4->version == 4) {
7812                 unsigned char *csum_start = skb_checksum_start(skb);
7813                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7814
7815                 /* IP header will have to cancel out any data that
7816                  * is not a part of the outer IP header
7817                  */
7818                 ip.v4->check = csum_fold(csum_partial(trans_start,
7819                                                       csum_start - trans_start,
7820                                                       0));
7821                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7822
7823                 ip.v4->tot_len = 0;
7824                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7825                                    IXGBE_TX_FLAGS_CSUM |
7826                                    IXGBE_TX_FLAGS_IPV4;
7827         } else {
7828                 ip.v6->payload_len = 0;
7829                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7830                                    IXGBE_TX_FLAGS_CSUM;
7831         }
7832
7833         /* determine offset of inner transport header */
7834         l4_offset = l4.hdr - skb->data;
7835
7836         /* compute length of segmentation header */
7837         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7838
7839         /* remove payload length from inner checksum */
7840         paylen = skb->len - l4_offset;
7841         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7842
7843         /* update gso size and bytecount with header size */
7844         first->gso_segs = skb_shinfo(skb)->gso_segs;
7845         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7846
7847         /* mss_l4len_id: use 0 as index for TSO */
7848         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7849         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7850
7851         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7852         vlan_macip_lens = l4.hdr - ip.hdr;
7853         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7854         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7855
7856         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7857                           mss_l4len_idx);
7858
7859         return 1;
7860 }
7861
7862 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7863 {
7864         unsigned int offset = 0;
7865
7866         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7867
7868         return offset == skb_checksum_start_offset(skb);
7869 }
7870
7871 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7872                           struct ixgbe_tx_buffer *first)
7873 {
7874         struct sk_buff *skb = first->skb;
7875         u32 vlan_macip_lens = 0;
7876         u32 type_tucmd = 0;
7877
7878         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7879 csum_failed:
7880                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7881                                          IXGBE_TX_FLAGS_CC)))
7882                         return;
7883                 goto no_csum;
7884         }
7885
7886         switch (skb->csum_offset) {
7887         case offsetof(struct tcphdr, check):
7888                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7889                 /* fall through */
7890         case offsetof(struct udphdr, check):
7891                 break;
7892         case offsetof(struct sctphdr, checksum):
7893                 /* validate that this is actually an SCTP request */
7894                 if (((first->protocol == htons(ETH_P_IP)) &&
7895                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7896                     ((first->protocol == htons(ETH_P_IPV6)) &&
7897                      ixgbe_ipv6_csum_is_sctp(skb))) {
7898                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7899                         break;
7900                 }
7901                 /* fall through */
7902         default:
7903                 skb_checksum_help(skb);
7904                 goto csum_failed;
7905         }
7906
7907         /* update TX checksum flag */
7908         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7909         vlan_macip_lens = skb_checksum_start_offset(skb) -
7910                           skb_network_offset(skb);
7911 no_csum:
7912         /* vlan_macip_lens: MACLEN, VLAN tag */
7913         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7914         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7915
7916         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7917 }
7918
7919 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7920         ((_flag <= _result) ? \
7921          ((u32)(_input & _flag) * (_result / _flag)) : \
7922          ((u32)(_input & _flag) / (_flag / _result)))
7923
7924 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7925 {
7926         /* set type for advanced descriptor with frame checksum insertion */
7927         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7928                        IXGBE_ADVTXD_DCMD_DEXT |
7929                        IXGBE_ADVTXD_DCMD_IFCS;
7930
7931         /* set HW vlan bit if vlan is present */
7932         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7933                                    IXGBE_ADVTXD_DCMD_VLE);
7934
7935         /* set segmentation enable bits for TSO/FSO */
7936         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7937                                    IXGBE_ADVTXD_DCMD_TSE);
7938
7939         /* set timestamp bit if present */
7940         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7941                                    IXGBE_ADVTXD_MAC_TSTAMP);
7942
7943         /* insert frame checksum */
7944         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7945
7946         return cmd_type;
7947 }
7948
7949 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7950                                    u32 tx_flags, unsigned int paylen)
7951 {
7952         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7953
7954         /* enable L4 checksum for TSO and TX checksum offload */
7955         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7956                                         IXGBE_TX_FLAGS_CSUM,
7957                                         IXGBE_ADVTXD_POPTS_TXSM);
7958
7959         /* enble IPv4 checksum for TSO */
7960         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7961                                         IXGBE_TX_FLAGS_IPV4,
7962                                         IXGBE_ADVTXD_POPTS_IXSM);
7963
7964         /*
7965          * Check Context must be set if Tx switch is enabled, which it
7966          * always is for case where virtual functions are running
7967          */
7968         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7969                                         IXGBE_TX_FLAGS_CC,
7970                                         IXGBE_ADVTXD_CC);
7971
7972         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7973 }
7974
7975 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7976 {
7977         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7978
7979         /* Herbert's original patch had:
7980          *  smp_mb__after_netif_stop_queue();
7981          * but since that doesn't exist yet, just open code it.
7982          */
7983         smp_mb();
7984
7985         /* We need to check again in a case another CPU has just
7986          * made room available.
7987          */
7988         if (likely(ixgbe_desc_unused(tx_ring) < size))
7989                 return -EBUSY;
7990
7991         /* A reprieve! - use start_queue because it doesn't call schedule */
7992         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7993         ++tx_ring->tx_stats.restart_queue;
7994         return 0;
7995 }
7996
7997 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7998 {
7999         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8000                 return 0;
8001
8002         return __ixgbe_maybe_stop_tx(tx_ring, size);
8003 }
8004
8005 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
8006                        IXGBE_TXD_CMD_RS)
8007
8008 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8009                         struct ixgbe_tx_buffer *first,
8010                         const u8 hdr_len)
8011 {
8012         struct sk_buff *skb = first->skb;
8013         struct ixgbe_tx_buffer *tx_buffer;
8014         union ixgbe_adv_tx_desc *tx_desc;
8015         struct skb_frag_struct *frag;
8016         dma_addr_t dma;
8017         unsigned int data_len, size;
8018         u32 tx_flags = first->tx_flags;
8019         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8020         u16 i = tx_ring->next_to_use;
8021
8022         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8023
8024         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8025
8026         size = skb_headlen(skb);
8027         data_len = skb->data_len;
8028
8029 #ifdef IXGBE_FCOE
8030         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8031                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8032                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8033                         data_len = 0;
8034                 } else {
8035                         data_len -= sizeof(struct fcoe_crc_eof);
8036                 }
8037         }
8038
8039 #endif
8040         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8041
8042         tx_buffer = first;
8043
8044         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8045                 if (dma_mapping_error(tx_ring->dev, dma))
8046                         goto dma_error;
8047
8048                 /* record length, and DMA address */
8049                 dma_unmap_len_set(tx_buffer, len, size);
8050                 dma_unmap_addr_set(tx_buffer, dma, dma);
8051
8052                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8053
8054                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8055                         tx_desc->read.cmd_type_len =
8056                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8057
8058                         i++;
8059                         tx_desc++;
8060                         if (i == tx_ring->count) {
8061                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8062                                 i = 0;
8063                         }
8064                         tx_desc->read.olinfo_status = 0;
8065
8066                         dma += IXGBE_MAX_DATA_PER_TXD;
8067                         size -= IXGBE_MAX_DATA_PER_TXD;
8068
8069                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8070                 }
8071
8072                 if (likely(!data_len))
8073                         break;
8074
8075                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8076
8077                 i++;
8078                 tx_desc++;
8079                 if (i == tx_ring->count) {
8080                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8081                         i = 0;
8082                 }
8083                 tx_desc->read.olinfo_status = 0;
8084
8085 #ifdef IXGBE_FCOE
8086                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8087 #else
8088                 size = skb_frag_size(frag);
8089 #endif
8090                 data_len -= size;
8091
8092                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8093                                        DMA_TO_DEVICE);
8094
8095                 tx_buffer = &tx_ring->tx_buffer_info[i];
8096         }
8097
8098         /* write last descriptor with RS and EOP bits */
8099         cmd_type |= size | IXGBE_TXD_CMD;
8100         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8101
8102         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8103
8104         /* set the timestamp */
8105         first->time_stamp = jiffies;
8106
8107         /*
8108          * Force memory writes to complete before letting h/w know there
8109          * are new descriptors to fetch.  (Only applicable for weak-ordered
8110          * memory model archs, such as IA-64).
8111          *
8112          * We also need this memory barrier to make certain all of the
8113          * status bits have been updated before next_to_watch is written.
8114          */
8115         wmb();
8116
8117         /* set next_to_watch value indicating a packet is present */
8118         first->next_to_watch = tx_desc;
8119
8120         i++;
8121         if (i == tx_ring->count)
8122                 i = 0;
8123
8124         tx_ring->next_to_use = i;
8125
8126         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8127
8128         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8129                 writel(i, tx_ring->tail);
8130
8131                 /* we need this if more than one processor can write to our tail
8132                  * at a time, it synchronizes IO on IA64/Altix systems
8133                  */
8134                 mmiowb();
8135         }
8136
8137         return 0;
8138 dma_error:
8139         dev_err(tx_ring->dev, "TX DMA map failed\n");
8140
8141         /* clear dma mappings for failed tx_buffer_info map */
8142         for (;;) {
8143                 tx_buffer = &tx_ring->tx_buffer_info[i];
8144                 if (dma_unmap_len(tx_buffer, len))
8145                         dma_unmap_page(tx_ring->dev,
8146                                        dma_unmap_addr(tx_buffer, dma),
8147                                        dma_unmap_len(tx_buffer, len),
8148                                        DMA_TO_DEVICE);
8149                 dma_unmap_len_set(tx_buffer, len, 0);
8150                 if (tx_buffer == first)
8151                         break;
8152                 if (i == 0)
8153                         i += tx_ring->count;
8154                 i--;
8155         }
8156
8157         dev_kfree_skb_any(first->skb);
8158         first->skb = NULL;
8159
8160         tx_ring->next_to_use = i;
8161
8162         return -1;
8163 }
8164
8165 static void ixgbe_atr(struct ixgbe_ring *ring,
8166                       struct ixgbe_tx_buffer *first)
8167 {
8168         struct ixgbe_q_vector *q_vector = ring->q_vector;
8169         union ixgbe_atr_hash_dword input = { .dword = 0 };
8170         union ixgbe_atr_hash_dword common = { .dword = 0 };
8171         union {
8172                 unsigned char *network;
8173                 struct iphdr *ipv4;
8174                 struct ipv6hdr *ipv6;
8175         } hdr;
8176         struct tcphdr *th;
8177         unsigned int hlen;
8178         struct sk_buff *skb;
8179         __be16 vlan_id;
8180         int l4_proto;
8181
8182         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8183         if (!q_vector)
8184                 return;
8185
8186         /* do nothing if sampling is disabled */
8187         if (!ring->atr_sample_rate)
8188                 return;
8189
8190         ring->atr_count++;
8191
8192         /* currently only IPv4/IPv6 with TCP is supported */
8193         if ((first->protocol != htons(ETH_P_IP)) &&
8194             (first->protocol != htons(ETH_P_IPV6)))
8195                 return;
8196
8197         /* snag network header to get L4 type and address */
8198         skb = first->skb;
8199         hdr.network = skb_network_header(skb);
8200         if (unlikely(hdr.network <= skb->data))
8201                 return;
8202         if (skb->encapsulation &&
8203             first->protocol == htons(ETH_P_IP) &&
8204             hdr.ipv4->protocol == IPPROTO_UDP) {
8205                 struct ixgbe_adapter *adapter = q_vector->adapter;
8206
8207                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8208                              VXLAN_HEADROOM))
8209                         return;
8210
8211                 /* verify the port is recognized as VXLAN */
8212                 if (adapter->vxlan_port &&
8213                     udp_hdr(skb)->dest == adapter->vxlan_port)
8214                         hdr.network = skb_inner_network_header(skb);
8215
8216                 if (adapter->geneve_port &&
8217                     udp_hdr(skb)->dest == adapter->geneve_port)
8218                         hdr.network = skb_inner_network_header(skb);
8219         }
8220
8221         /* Make sure we have at least [minimum IPv4 header + TCP]
8222          * or [IPv6 header] bytes
8223          */
8224         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8225                 return;
8226
8227         /* Currently only IPv4/IPv6 with TCP is supported */
8228         switch (hdr.ipv4->version) {
8229         case IPVERSION:
8230                 /* access ihl as u8 to avoid unaligned access on ia64 */
8231                 hlen = (hdr.network[0] & 0x0F) << 2;
8232                 l4_proto = hdr.ipv4->protocol;
8233                 break;
8234         case 6:
8235                 hlen = hdr.network - skb->data;
8236                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8237                 hlen -= hdr.network - skb->data;
8238                 break;
8239         default:
8240                 return;
8241         }
8242
8243         if (l4_proto != IPPROTO_TCP)
8244                 return;
8245
8246         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8247                      hlen + sizeof(struct tcphdr)))
8248                 return;
8249
8250         th = (struct tcphdr *)(hdr.network + hlen);
8251
8252         /* skip this packet since the socket is closing */
8253         if (th->fin)
8254                 return;
8255
8256         /* sample on all syn packets or once every atr sample count */
8257         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8258                 return;
8259
8260         /* reset sample count */
8261         ring->atr_count = 0;
8262
8263         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8264
8265         /*
8266          * src and dst are inverted, think how the receiver sees them
8267          *
8268          * The input is broken into two sections, a non-compressed section
8269          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8270          * is XORed together and stored in the compressed dword.
8271          */
8272         input.formatted.vlan_id = vlan_id;
8273
8274         /*
8275          * since src port and flex bytes occupy the same word XOR them together
8276          * and write the value to source port portion of compressed dword
8277          */
8278         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8279                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8280         else
8281                 common.port.src ^= th->dest ^ first->protocol;
8282         common.port.dst ^= th->source;
8283
8284         switch (hdr.ipv4->version) {
8285         case IPVERSION:
8286                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8287                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8288                 break;
8289         case 6:
8290                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8291                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8292                              hdr.ipv6->saddr.s6_addr32[1] ^
8293                              hdr.ipv6->saddr.s6_addr32[2] ^
8294                              hdr.ipv6->saddr.s6_addr32[3] ^
8295                              hdr.ipv6->daddr.s6_addr32[0] ^
8296                              hdr.ipv6->daddr.s6_addr32[1] ^
8297                              hdr.ipv6->daddr.s6_addr32[2] ^
8298                              hdr.ipv6->daddr.s6_addr32[3];
8299                 break;
8300         default:
8301                 break;
8302         }
8303
8304         if (hdr.network != skb_network_header(skb))
8305                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8306
8307         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8308         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8309                                               input, common, ring->queue_index);
8310 }
8311
8312 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8313                               void *accel_priv, select_queue_fallback_t fallback)
8314 {
8315         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
8316 #ifdef IXGBE_FCOE
8317         struct ixgbe_adapter *adapter;
8318         struct ixgbe_ring_feature *f;
8319         int txq;
8320 #endif
8321
8322         if (fwd_adapter)
8323                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
8324
8325 #ifdef IXGBE_FCOE
8326
8327         /*
8328          * only execute the code below if protocol is FCoE
8329          * or FIP and we have FCoE enabled on the adapter
8330          */
8331         switch (vlan_get_protocol(skb)) {
8332         case htons(ETH_P_FCOE):
8333         case htons(ETH_P_FIP):
8334                 adapter = netdev_priv(dev);
8335
8336                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
8337                         break;
8338                 /* fall through */
8339         default:
8340                 return fallback(dev, skb);
8341         }
8342
8343         f = &adapter->ring_feature[RING_F_FCOE];
8344
8345         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8346                                            smp_processor_id();
8347
8348         while (txq >= f->indices)
8349                 txq -= f->indices;
8350
8351         return txq + f->offset;
8352 #else
8353         return fallback(dev, skb);
8354 #endif
8355 }
8356
8357 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8358                                struct xdp_buff *xdp)
8359 {
8360         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8361         struct ixgbe_tx_buffer *tx_buffer;
8362         union ixgbe_adv_tx_desc *tx_desc;
8363         u32 len, cmd_type;
8364         dma_addr_t dma;
8365         u16 i;
8366
8367         len = xdp->data_end - xdp->data;
8368
8369         if (unlikely(!ixgbe_desc_unused(ring)))
8370                 return IXGBE_XDP_CONSUMED;
8371
8372         dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
8373         if (dma_mapping_error(ring->dev, dma))
8374                 return IXGBE_XDP_CONSUMED;
8375
8376         /* record the location of the first descriptor for this packet */
8377         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8378         tx_buffer->bytecount = len;
8379         tx_buffer->gso_segs = 1;
8380         tx_buffer->protocol = 0;
8381
8382         i = ring->next_to_use;
8383         tx_desc = IXGBE_TX_DESC(ring, i);
8384
8385         dma_unmap_len_set(tx_buffer, len, len);
8386         dma_unmap_addr_set(tx_buffer, dma, dma);
8387         tx_buffer->data = xdp->data;
8388         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8389
8390         /* put descriptor type bits */
8391         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8392                    IXGBE_ADVTXD_DCMD_DEXT |
8393                    IXGBE_ADVTXD_DCMD_IFCS;
8394         cmd_type |= len | IXGBE_TXD_CMD;
8395         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8396         tx_desc->read.olinfo_status =
8397                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8398
8399         /* Avoid any potential race with xdp_xmit and cleanup */
8400         smp_wmb();
8401
8402         /* set next_to_watch value indicating a packet is present */
8403         i++;
8404         if (i == ring->count)
8405                 i = 0;
8406
8407         tx_buffer->next_to_watch = tx_desc;
8408         ring->next_to_use = i;
8409
8410         return IXGBE_XDP_TX;
8411 }
8412
8413 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8414                           struct ixgbe_adapter *adapter,
8415                           struct ixgbe_ring *tx_ring)
8416 {
8417         struct ixgbe_tx_buffer *first;
8418         int tso;
8419         u32 tx_flags = 0;
8420         unsigned short f;
8421         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8422         __be16 protocol = skb->protocol;
8423         u8 hdr_len = 0;
8424
8425         /*
8426          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8427          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8428          *       + 2 desc gap to keep tail from touching head,
8429          *       + 1 desc for context descriptor,
8430          * otherwise try next time
8431          */
8432         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8433                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8434
8435         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8436                 tx_ring->tx_stats.tx_busy++;
8437                 return NETDEV_TX_BUSY;
8438         }
8439
8440         /* record the location of the first descriptor for this packet */
8441         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8442         first->skb = skb;
8443         first->bytecount = skb->len;
8444         first->gso_segs = 1;
8445
8446         /* if we have a HW VLAN tag being added default to the HW one */
8447         if (skb_vlan_tag_present(skb)) {
8448                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8449                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8450         /* else if it is a SW VLAN check the next protocol and store the tag */
8451         } else if (protocol == htons(ETH_P_8021Q)) {
8452                 struct vlan_hdr *vhdr, _vhdr;
8453                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8454                 if (!vhdr)
8455                         goto out_drop;
8456
8457                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8458                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8459                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8460         }
8461         protocol = vlan_get_protocol(skb);
8462
8463         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8464             adapter->ptp_clock) {
8465                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8466                                            &adapter->state)) {
8467                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8468                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8469
8470                         /* schedule check for Tx timestamp */
8471                         adapter->ptp_tx_skb = skb_get(skb);
8472                         adapter->ptp_tx_start = jiffies;
8473                         schedule_work(&adapter->ptp_tx_work);
8474                 } else {
8475                         adapter->tx_hwtstamp_skipped++;
8476                 }
8477         }
8478
8479         skb_tx_timestamp(skb);
8480
8481 #ifdef CONFIG_PCI_IOV
8482         /*
8483          * Use the l2switch_enable flag - would be false if the DMA
8484          * Tx switch had been disabled.
8485          */
8486         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8487                 tx_flags |= IXGBE_TX_FLAGS_CC;
8488
8489 #endif
8490         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8491         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8492             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8493              (skb->priority != TC_PRIO_CONTROL))) {
8494                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8495                 tx_flags |= (skb->priority & 0x7) <<
8496                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8497                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8498                         struct vlan_ethhdr *vhdr;
8499
8500                         if (skb_cow_head(skb, 0))
8501                                 goto out_drop;
8502                         vhdr = (struct vlan_ethhdr *)skb->data;
8503                         vhdr->h_vlan_TCI = htons(tx_flags >>
8504                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8505                 } else {
8506                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8507                 }
8508         }
8509
8510         /* record initial flags and protocol */
8511         first->tx_flags = tx_flags;
8512         first->protocol = protocol;
8513
8514 #ifdef IXGBE_FCOE
8515         /* setup tx offload for FCoE */
8516         if ((protocol == htons(ETH_P_FCOE)) &&
8517             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8518                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8519                 if (tso < 0)
8520                         goto out_drop;
8521
8522                 goto xmit_fcoe;
8523         }
8524
8525 #endif /* IXGBE_FCOE */
8526         tso = ixgbe_tso(tx_ring, first, &hdr_len);
8527         if (tso < 0)
8528                 goto out_drop;
8529         else if (!tso)
8530                 ixgbe_tx_csum(tx_ring, first);
8531
8532         /* add the ATR filter if ATR is on */
8533         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8534                 ixgbe_atr(tx_ring, first);
8535
8536 #ifdef IXGBE_FCOE
8537 xmit_fcoe:
8538 #endif /* IXGBE_FCOE */
8539         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8540                 goto cleanup_tx_timestamp;
8541
8542         return NETDEV_TX_OK;
8543
8544 out_drop:
8545         dev_kfree_skb_any(first->skb);
8546         first->skb = NULL;
8547 cleanup_tx_timestamp:
8548         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8549                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8550                 adapter->ptp_tx_skb = NULL;
8551                 cancel_work_sync(&adapter->ptp_tx_work);
8552                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8553         }
8554
8555         return NETDEV_TX_OK;
8556 }
8557
8558 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8559                                       struct net_device *netdev,
8560                                       struct ixgbe_ring *ring)
8561 {
8562         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8563         struct ixgbe_ring *tx_ring;
8564
8565         /*
8566          * The minimum packet size for olinfo paylen is 17 so pad the skb
8567          * in order to meet this minimum size requirement.
8568          */
8569         if (skb_put_padto(skb, 17))
8570                 return NETDEV_TX_OK;
8571
8572         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8573
8574         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8575 }
8576
8577 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8578                                     struct net_device *netdev)
8579 {
8580         return __ixgbe_xmit_frame(skb, netdev, NULL);
8581 }
8582
8583 /**
8584  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8585  * @netdev: network interface device structure
8586  * @p: pointer to an address structure
8587  *
8588  * Returns 0 on success, negative on failure
8589  **/
8590 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8591 {
8592         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8593         struct ixgbe_hw *hw = &adapter->hw;
8594         struct sockaddr *addr = p;
8595
8596         if (!is_valid_ether_addr(addr->sa_data))
8597                 return -EADDRNOTAVAIL;
8598
8599         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8600         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8601
8602         ixgbe_mac_set_default_filter(adapter);
8603
8604         return 0;
8605 }
8606
8607 static int
8608 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8609 {
8610         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8611         struct ixgbe_hw *hw = &adapter->hw;
8612         u16 value;
8613         int rc;
8614
8615         if (prtad != hw->phy.mdio.prtad)
8616                 return -EINVAL;
8617         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8618         if (!rc)
8619                 rc = value;
8620         return rc;
8621 }
8622
8623 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8624                             u16 addr, u16 value)
8625 {
8626         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8627         struct ixgbe_hw *hw = &adapter->hw;
8628
8629         if (prtad != hw->phy.mdio.prtad)
8630                 return -EINVAL;
8631         return hw->phy.ops.write_reg(hw, addr, devad, value);
8632 }
8633
8634 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8635 {
8636         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8637
8638         switch (cmd) {
8639         case SIOCSHWTSTAMP:
8640                 return ixgbe_ptp_set_ts_config(adapter, req);
8641         case SIOCGHWTSTAMP:
8642                 return ixgbe_ptp_get_ts_config(adapter, req);
8643         case SIOCGMIIPHY:
8644                 if (!adapter->hw.phy.ops.read_reg)
8645                         return -EOPNOTSUPP;
8646                 /* fall through */
8647         default:
8648                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8649         }
8650 }
8651
8652 /**
8653  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8654  * netdev->dev_addrs
8655  * @netdev: network interface device structure
8656  *
8657  * Returns non-zero on failure
8658  **/
8659 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8660 {
8661         int err = 0;
8662         struct ixgbe_adapter *adapter = netdev_priv(dev);
8663         struct ixgbe_hw *hw = &adapter->hw;
8664
8665         if (is_valid_ether_addr(hw->mac.san_addr)) {
8666                 rtnl_lock();
8667                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8668                 rtnl_unlock();
8669
8670                 /* update SAN MAC vmdq pool selection */
8671                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8672         }
8673         return err;
8674 }
8675
8676 /**
8677  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8678  * netdev->dev_addrs
8679  * @netdev: network interface device structure
8680  *
8681  * Returns non-zero on failure
8682  **/
8683 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8684 {
8685         int err = 0;
8686         struct ixgbe_adapter *adapter = netdev_priv(dev);
8687         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8688
8689         if (is_valid_ether_addr(mac->san_addr)) {
8690                 rtnl_lock();
8691                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8692                 rtnl_unlock();
8693         }
8694         return err;
8695 }
8696
8697 #ifdef CONFIG_NET_POLL_CONTROLLER
8698 /*
8699  * Polling 'interrupt' - used by things like netconsole to send skbs
8700  * without having to re-enable interrupts. It's not called while
8701  * the interrupt routine is executing.
8702  */
8703 static void ixgbe_netpoll(struct net_device *netdev)
8704 {
8705         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8706         int i;
8707
8708         /* if interface is down do nothing */
8709         if (test_bit(__IXGBE_DOWN, &adapter->state))
8710                 return;
8711
8712         /* loop through and schedule all active queues */
8713         for (i = 0; i < adapter->num_q_vectors; i++)
8714                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8715 }
8716
8717 #endif
8718
8719 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8720                                    struct ixgbe_ring *ring)
8721 {
8722         u64 bytes, packets;
8723         unsigned int start;
8724
8725         if (ring) {
8726                 do {
8727                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8728                         packets = ring->stats.packets;
8729                         bytes   = ring->stats.bytes;
8730                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8731                 stats->tx_packets += packets;
8732                 stats->tx_bytes   += bytes;
8733         }
8734 }
8735
8736 static void ixgbe_get_stats64(struct net_device *netdev,
8737                               struct rtnl_link_stats64 *stats)
8738 {
8739         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8740         int i;
8741
8742         rcu_read_lock();
8743         for (i = 0; i < adapter->num_rx_queues; i++) {
8744                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8745                 u64 bytes, packets;
8746                 unsigned int start;
8747
8748                 if (ring) {
8749                         do {
8750                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8751                                 packets = ring->stats.packets;
8752                                 bytes   = ring->stats.bytes;
8753                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8754                         stats->rx_packets += packets;
8755                         stats->rx_bytes   += bytes;
8756                 }
8757         }
8758
8759         for (i = 0; i < adapter->num_tx_queues; i++) {
8760                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8761
8762                 ixgbe_get_ring_stats64(stats, ring);
8763         }
8764         for (i = 0; i < adapter->num_xdp_queues; i++) {
8765                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8766
8767                 ixgbe_get_ring_stats64(stats, ring);
8768         }
8769         rcu_read_unlock();
8770
8771         /* following stats updated by ixgbe_watchdog_task() */
8772         stats->multicast        = netdev->stats.multicast;
8773         stats->rx_errors        = netdev->stats.rx_errors;
8774         stats->rx_length_errors = netdev->stats.rx_length_errors;
8775         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8776         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8777 }
8778
8779 #ifdef CONFIG_IXGBE_DCB
8780 /**
8781  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8782  * @adapter: pointer to ixgbe_adapter
8783  * @tc: number of traffic classes currently enabled
8784  *
8785  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8786  * 802.1Q priority maps to a packet buffer that exists.
8787  */
8788 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8789 {
8790         struct ixgbe_hw *hw = &adapter->hw;
8791         u32 reg, rsave;
8792         int i;
8793
8794         /* 82598 have a static priority to TC mapping that can not
8795          * be changed so no validation is needed.
8796          */
8797         if (hw->mac.type == ixgbe_mac_82598EB)
8798                 return;
8799
8800         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8801         rsave = reg;
8802
8803         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8804                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8805
8806                 /* If up2tc is out of bounds default to zero */
8807                 if (up2tc > tc)
8808                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8809         }
8810
8811         if (reg != rsave)
8812                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8813
8814         return;
8815 }
8816
8817 /**
8818  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8819  * @adapter: Pointer to adapter struct
8820  *
8821  * Populate the netdev user priority to tc map
8822  */
8823 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8824 {
8825         struct net_device *dev = adapter->netdev;
8826         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8827         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8828         u8 prio;
8829
8830         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8831                 u8 tc = 0;
8832
8833                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8834                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8835                 else if (ets)
8836                         tc = ets->prio_tc[prio];
8837
8838                 netdev_set_prio_tc_map(dev, prio, tc);
8839         }
8840 }
8841
8842 #endif /* CONFIG_IXGBE_DCB */
8843 /**
8844  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8845  *
8846  * @netdev: net device to configure
8847  * @tc: number of traffic classes to enable
8848  */
8849 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8850 {
8851         struct ixgbe_adapter *adapter = netdev_priv(dev);
8852         struct ixgbe_hw *hw = &adapter->hw;
8853
8854         /* Hardware supports up to 8 traffic classes */
8855         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8856                 return -EINVAL;
8857
8858         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8859                 return -EINVAL;
8860
8861         /* Hardware has to reinitialize queues and interrupts to
8862          * match packet buffer alignment. Unfortunately, the
8863          * hardware is not flexible enough to do this dynamically.
8864          */
8865         if (netif_running(dev))
8866                 ixgbe_close(dev);
8867         else
8868                 ixgbe_reset(adapter);
8869
8870         ixgbe_clear_interrupt_scheme(adapter);
8871
8872 #ifdef CONFIG_IXGBE_DCB
8873         if (tc) {
8874                 netdev_set_num_tc(dev, tc);
8875                 ixgbe_set_prio_tc_map(adapter);
8876
8877                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8878
8879                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8880                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8881                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8882                 }
8883         } else {
8884                 netdev_reset_tc(dev);
8885
8886                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8887                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8888
8889                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8890
8891                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8892                 adapter->dcb_cfg.pfc_mode_enable = false;
8893         }
8894
8895         ixgbe_validate_rtr(adapter, tc);
8896
8897 #endif /* CONFIG_IXGBE_DCB */
8898         ixgbe_init_interrupt_scheme(adapter);
8899
8900         if (netif_running(dev))
8901                 return ixgbe_open(dev);
8902
8903         return 0;
8904 }
8905
8906 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8907                                struct tc_cls_u32_offload *cls)
8908 {
8909         u32 hdl = cls->knode.handle;
8910         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8911         u32 loc = cls->knode.handle & 0xfffff;
8912         int err = 0, i, j;
8913         struct ixgbe_jump_table *jump = NULL;
8914
8915         if (loc > IXGBE_MAX_HW_ENTRIES)
8916                 return -EINVAL;
8917
8918         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8919                 return -EINVAL;
8920
8921         /* Clear this filter in the link data it is associated with */
8922         if (uhtid != 0x800) {
8923                 jump = adapter->jump_tables[uhtid];
8924                 if (!jump)
8925                         return -EINVAL;
8926                 if (!test_bit(loc - 1, jump->child_loc_map))
8927                         return -EINVAL;
8928                 clear_bit(loc - 1, jump->child_loc_map);
8929         }
8930
8931         /* Check if the filter being deleted is a link */
8932         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8933                 jump = adapter->jump_tables[i];
8934                 if (jump && jump->link_hdl == hdl) {
8935                         /* Delete filters in the hardware in the child hash
8936                          * table associated with this link
8937                          */
8938                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8939                                 if (!test_bit(j, jump->child_loc_map))
8940                                         continue;
8941                                 spin_lock(&adapter->fdir_perfect_lock);
8942                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8943                                                                       NULL,
8944                                                                       j + 1);
8945                                 spin_unlock(&adapter->fdir_perfect_lock);
8946                                 clear_bit(j, jump->child_loc_map);
8947                         }
8948                         /* Remove resources for this link */
8949                         kfree(jump->input);
8950                         kfree(jump->mask);
8951                         kfree(jump);
8952                         adapter->jump_tables[i] = NULL;
8953                         return err;
8954                 }
8955         }
8956
8957         spin_lock(&adapter->fdir_perfect_lock);
8958         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8959         spin_unlock(&adapter->fdir_perfect_lock);
8960         return err;
8961 }
8962
8963 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8964                                             struct tc_cls_u32_offload *cls)
8965 {
8966         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8967
8968         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8969                 return -EINVAL;
8970
8971         /* This ixgbe devices do not support hash tables at the moment
8972          * so abort when given hash tables.
8973          */
8974         if (cls->hnode.divisor > 0)
8975                 return -EINVAL;
8976
8977         set_bit(uhtid - 1, &adapter->tables);
8978         return 0;
8979 }
8980
8981 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8982                                             struct tc_cls_u32_offload *cls)
8983 {
8984         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8985
8986         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8987                 return -EINVAL;
8988
8989         clear_bit(uhtid - 1, &adapter->tables);
8990         return 0;
8991 }
8992
8993 #ifdef CONFIG_NET_CLS_ACT
8994 struct upper_walk_data {
8995         struct ixgbe_adapter *adapter;
8996         u64 action;
8997         int ifindex;
8998         u8 queue;
8999 };
9000
9001 static int get_macvlan_queue(struct net_device *upper, void *_data)
9002 {
9003         if (netif_is_macvlan(upper)) {
9004                 struct macvlan_dev *dfwd = netdev_priv(upper);
9005                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
9006                 struct upper_walk_data *data = _data;
9007                 struct ixgbe_adapter *adapter = data->adapter;
9008                 int ifindex = data->ifindex;
9009
9010                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
9011                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9012                         data->action = data->queue;
9013                         return 1;
9014                 }
9015         }
9016
9017         return 0;
9018 }
9019
9020 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9021                                   u8 *queue, u64 *action)
9022 {
9023         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9024         unsigned int num_vfs = adapter->num_vfs, vf;
9025         struct upper_walk_data data;
9026         struct net_device *upper;
9027
9028         /* redirect to a SRIOV VF */
9029         for (vf = 0; vf < num_vfs; ++vf) {
9030                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9031                 if (upper->ifindex == ifindex) {
9032                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9033                         *action = vf + 1;
9034                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9035                         return 0;
9036                 }
9037         }
9038
9039         /* redirect to a offloaded macvlan netdev */
9040         data.adapter = adapter;
9041         data.ifindex = ifindex;
9042         data.action = 0;
9043         data.queue = 0;
9044         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9045                                           get_macvlan_queue, &data)) {
9046                 *action = data.action;
9047                 *queue = data.queue;
9048
9049                 return 0;
9050         }
9051
9052         return -EINVAL;
9053 }
9054
9055 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9056                             struct tcf_exts *exts, u64 *action, u8 *queue)
9057 {
9058         const struct tc_action *a;
9059         LIST_HEAD(actions);
9060         int err;
9061
9062         if (!tcf_exts_has_actions(exts))
9063                 return -EINVAL;
9064
9065         tcf_exts_to_list(exts, &actions);
9066         list_for_each_entry(a, &actions, list) {
9067
9068                 /* Drop action */
9069                 if (is_tcf_gact_shot(a)) {
9070                         *action = IXGBE_FDIR_DROP_QUEUE;
9071                         *queue = IXGBE_FDIR_DROP_QUEUE;
9072                         return 0;
9073                 }
9074
9075                 /* Redirect to a VF or a offloaded macvlan */
9076                 if (is_tcf_mirred_egress_redirect(a)) {
9077                         struct net_device *dev = tcf_mirred_dev(a);
9078
9079                         if (!dev)
9080                                 return -EINVAL;
9081                         err = handle_redirect_action(adapter, dev->ifindex, queue,
9082                                                      action);
9083                         if (err == 0)
9084                                 return err;
9085                 }
9086         }
9087
9088         return -EINVAL;
9089 }
9090 #else
9091 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9092                             struct tcf_exts *exts, u64 *action, u8 *queue)
9093 {
9094         return -EINVAL;
9095 }
9096 #endif /* CONFIG_NET_CLS_ACT */
9097
9098 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9099                                     union ixgbe_atr_input *mask,
9100                                     struct tc_cls_u32_offload *cls,
9101                                     struct ixgbe_mat_field *field_ptr,
9102                                     struct ixgbe_nexthdr *nexthdr)
9103 {
9104         int i, j, off;
9105         __be32 val, m;
9106         bool found_entry = false, found_jump_field = false;
9107
9108         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9109                 off = cls->knode.sel->keys[i].off;
9110                 val = cls->knode.sel->keys[i].val;
9111                 m = cls->knode.sel->keys[i].mask;
9112
9113                 for (j = 0; field_ptr[j].val; j++) {
9114                         if (field_ptr[j].off == off) {
9115                                 field_ptr[j].val(input, mask, val, m);
9116                                 input->filter.formatted.flow_type |=
9117                                         field_ptr[j].type;
9118                                 found_entry = true;
9119                                 break;
9120                         }
9121                 }
9122                 if (nexthdr) {
9123                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9124                             nexthdr->val == cls->knode.sel->keys[i].val &&
9125                             nexthdr->mask == cls->knode.sel->keys[i].mask)
9126                                 found_jump_field = true;
9127                         else
9128                                 continue;
9129                 }
9130         }
9131
9132         if (nexthdr && !found_jump_field)
9133                 return -EINVAL;
9134
9135         if (!found_entry)
9136                 return 0;
9137
9138         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9139                                     IXGBE_ATR_L4TYPE_MASK;
9140
9141         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9142                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9143
9144         return 0;
9145 }
9146
9147 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9148                                   struct tc_cls_u32_offload *cls)
9149 {
9150         __be16 protocol = cls->common.protocol;
9151         u32 loc = cls->knode.handle & 0xfffff;
9152         struct ixgbe_hw *hw = &adapter->hw;
9153         struct ixgbe_mat_field *field_ptr;
9154         struct ixgbe_fdir_filter *input = NULL;
9155         union ixgbe_atr_input *mask = NULL;
9156         struct ixgbe_jump_table *jump = NULL;
9157         int i, err = -EINVAL;
9158         u8 queue;
9159         u32 uhtid, link_uhtid;
9160
9161         uhtid = TC_U32_USERHTID(cls->knode.handle);
9162         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9163
9164         /* At the moment cls_u32 jumps to network layer and skips past
9165          * L2 headers. The canonical method to match L2 frames is to use
9166          * negative values. However this is error prone at best but really
9167          * just broken because there is no way to "know" what sort of hdr
9168          * is in front of the network layer. Fix cls_u32 to support L2
9169          * headers when needed.
9170          */
9171         if (protocol != htons(ETH_P_IP))
9172                 return err;
9173
9174         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9175                 e_err(drv, "Location out of range\n");
9176                 return err;
9177         }
9178
9179         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9180          * links and also the fields used to advance the parser across each
9181          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9182          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9183          * To add support for new nodes update ixgbe_model.h parse structures
9184          * this function _should_ be generic try not to hardcode values here.
9185          */
9186         if (uhtid == 0x800) {
9187                 field_ptr = (adapter->jump_tables[0])->mat;
9188         } else {
9189                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9190                         return err;
9191                 if (!adapter->jump_tables[uhtid])
9192                         return err;
9193                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9194         }
9195
9196         if (!field_ptr)
9197                 return err;
9198
9199         /* At this point we know the field_ptr is valid and need to either
9200          * build cls_u32 link or attach filter. Because adding a link to
9201          * a handle that does not exist is invalid and the same for adding
9202          * rules to handles that don't exist.
9203          */
9204
9205         if (link_uhtid) {
9206                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9207
9208                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9209                         return err;
9210
9211                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9212                         return err;
9213
9214                 /* Multiple filters as links to the same hash table are not
9215                  * supported. To add a new filter with the same next header
9216                  * but different match/jump conditions, create a new hash table
9217                  * and link to it.
9218                  */
9219                 if (adapter->jump_tables[link_uhtid] &&
9220                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9221                         e_err(drv, "Link filter exists for link: %x\n",
9222                               link_uhtid);
9223                         return err;
9224                 }
9225
9226                 for (i = 0; nexthdr[i].jump; i++) {
9227                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9228                             nexthdr[i].s != cls->knode.sel->offshift ||
9229                             nexthdr[i].m != cls->knode.sel->offmask)
9230                                 return err;
9231
9232                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9233                         if (!jump)
9234                                 return -ENOMEM;
9235                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9236                         if (!input) {
9237                                 err = -ENOMEM;
9238                                 goto free_jump;
9239                         }
9240                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9241                         if (!mask) {
9242                                 err = -ENOMEM;
9243                                 goto free_input;
9244                         }
9245                         jump->input = input;
9246                         jump->mask = mask;
9247                         jump->link_hdl = cls->knode.handle;
9248
9249                         err = ixgbe_clsu32_build_input(input, mask, cls,
9250                                                        field_ptr, &nexthdr[i]);
9251                         if (!err) {
9252                                 jump->mat = nexthdr[i].jump;
9253                                 adapter->jump_tables[link_uhtid] = jump;
9254                                 break;
9255                         }
9256                 }
9257                 return 0;
9258         }
9259
9260         input = kzalloc(sizeof(*input), GFP_KERNEL);
9261         if (!input)
9262                 return -ENOMEM;
9263         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9264         if (!mask) {
9265                 err = -ENOMEM;
9266                 goto free_input;
9267         }
9268
9269         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9270                 if ((adapter->jump_tables[uhtid])->input)
9271                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9272                                sizeof(*input));
9273                 if ((adapter->jump_tables[uhtid])->mask)
9274                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9275                                sizeof(*mask));
9276
9277                 /* Lookup in all child hash tables if this location is already
9278                  * filled with a filter
9279                  */
9280                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9281                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9282
9283                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9284                                 e_err(drv, "Filter exists in location: %x\n",
9285                                       loc);
9286                                 err = -EINVAL;
9287                                 goto err_out;
9288                         }
9289                 }
9290         }
9291         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9292         if (err)
9293                 goto err_out;
9294
9295         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9296                                &queue);
9297         if (err < 0)
9298                 goto err_out;
9299
9300         input->sw_idx = loc;
9301
9302         spin_lock(&adapter->fdir_perfect_lock);
9303
9304         if (hlist_empty(&adapter->fdir_filter_list)) {
9305                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9306                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9307                 if (err)
9308                         goto err_out_w_lock;
9309         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9310                 err = -EINVAL;
9311                 goto err_out_w_lock;
9312         }
9313
9314         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9315         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9316                                                     input->sw_idx, queue);
9317         if (!err)
9318                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9319         spin_unlock(&adapter->fdir_perfect_lock);
9320
9321         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9322                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9323
9324         kfree(mask);
9325         return err;
9326 err_out_w_lock:
9327         spin_unlock(&adapter->fdir_perfect_lock);
9328 err_out:
9329         kfree(mask);
9330 free_input:
9331         kfree(input);
9332 free_jump:
9333         kfree(jump);
9334         return err;
9335 }
9336
9337 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9338                                   struct tc_cls_u32_offload *cls_u32)
9339 {
9340         if (cls_u32->common.chain_index)
9341                 return -EOPNOTSUPP;
9342
9343         switch (cls_u32->command) {
9344         case TC_CLSU32_NEW_KNODE:
9345         case TC_CLSU32_REPLACE_KNODE:
9346                 return ixgbe_configure_clsu32(adapter, cls_u32);
9347         case TC_CLSU32_DELETE_KNODE:
9348                 return ixgbe_delete_clsu32(adapter, cls_u32);
9349         case TC_CLSU32_NEW_HNODE:
9350         case TC_CLSU32_REPLACE_HNODE:
9351                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9352         case TC_CLSU32_DELETE_HNODE:
9353                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9354         default:
9355                 return -EOPNOTSUPP;
9356         }
9357 }
9358
9359 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9360                                    void *cb_priv)
9361 {
9362         struct ixgbe_adapter *adapter = cb_priv;
9363
9364         if (!tc_can_offload(adapter->netdev))
9365                 return -EOPNOTSUPP;
9366
9367         switch (type) {
9368         case TC_SETUP_CLSU32:
9369                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9370         default:
9371                 return -EOPNOTSUPP;
9372         }
9373 }
9374
9375 static int ixgbe_setup_tc_block(struct net_device *dev,
9376                                 struct tc_block_offload *f)
9377 {
9378         struct ixgbe_adapter *adapter = netdev_priv(dev);
9379
9380         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9381                 return -EOPNOTSUPP;
9382
9383         switch (f->command) {
9384         case TC_BLOCK_BIND:
9385                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9386                                              adapter, adapter);
9387         case TC_BLOCK_UNBIND:
9388                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9389                                         adapter);
9390                 return 0;
9391         default:
9392                 return -EOPNOTSUPP;
9393         }
9394 }
9395
9396 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9397                                  struct tc_mqprio_qopt *mqprio)
9398 {
9399         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9400         return ixgbe_setup_tc(dev, mqprio->num_tc);
9401 }
9402
9403 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9404                             void *type_data)
9405 {
9406         switch (type) {
9407         case TC_SETUP_BLOCK:
9408                 return ixgbe_setup_tc_block(dev, type_data);
9409         case TC_SETUP_QDISC_MQPRIO:
9410                 return ixgbe_setup_tc_mqprio(dev, type_data);
9411         default:
9412                 return -EOPNOTSUPP;
9413         }
9414 }
9415
9416 #ifdef CONFIG_PCI_IOV
9417 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9418 {
9419         struct net_device *netdev = adapter->netdev;
9420
9421         rtnl_lock();
9422         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
9423         rtnl_unlock();
9424 }
9425
9426 #endif
9427 void ixgbe_do_reset(struct net_device *netdev)
9428 {
9429         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9430
9431         if (netif_running(netdev))
9432                 ixgbe_reinit_locked(adapter);
9433         else
9434                 ixgbe_reset(adapter);
9435 }
9436
9437 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9438                                             netdev_features_t features)
9439 {
9440         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9441
9442         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9443         if (!(features & NETIF_F_RXCSUM))
9444                 features &= ~NETIF_F_LRO;
9445
9446         /* Turn off LRO if not RSC capable */
9447         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9448                 features &= ~NETIF_F_LRO;
9449
9450         return features;
9451 }
9452
9453 static int ixgbe_set_features(struct net_device *netdev,
9454                               netdev_features_t features)
9455 {
9456         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9457         netdev_features_t changed = netdev->features ^ features;
9458         bool need_reset = false;
9459
9460         /* Make sure RSC matches LRO, reset if change */
9461         if (!(features & NETIF_F_LRO)) {
9462                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9463                         need_reset = true;
9464                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9465         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9466                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9467                 if (adapter->rx_itr_setting == 1 ||
9468                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9469                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9470                         need_reset = true;
9471                 } else if ((changed ^ features) & NETIF_F_LRO) {
9472                         e_info(probe, "rx-usecs set too low, "
9473                                "disabling RSC\n");
9474                 }
9475         }
9476
9477         /*
9478          * Check if Flow Director n-tuple support or hw_tc support was
9479          * enabled or disabled.  If the state changed, we need to reset.
9480          */
9481         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9482                 /* turn off ATR, enable perfect filters and reset */
9483                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9484                         need_reset = true;
9485
9486                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9487                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9488         } else {
9489                 /* turn off perfect filters, enable ATR and reset */
9490                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9491                         need_reset = true;
9492
9493                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9494
9495                 /* We cannot enable ATR if SR-IOV is enabled */
9496                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9497                     /* We cannot enable ATR if we have 2 or more tcs */
9498                     (netdev_get_num_tc(netdev) > 1) ||
9499                     /* We cannot enable ATR if RSS is disabled */
9500                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9501                     /* A sample rate of 0 indicates ATR disabled */
9502                     (!adapter->atr_sample_rate))
9503                         ; /* do nothing not supported */
9504                 else /* otherwise supported and set the flag */
9505                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9506         }
9507
9508         if (changed & NETIF_F_RXALL)
9509                 need_reset = true;
9510
9511         netdev->features = features;
9512
9513         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9514                 if (features & NETIF_F_RXCSUM) {
9515                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9516                 } else {
9517                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9518
9519                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9520                 }
9521         }
9522
9523         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9524                 if (features & NETIF_F_RXCSUM) {
9525                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9526                 } else {
9527                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9528
9529                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9530                 }
9531         }
9532
9533         if (need_reset)
9534                 ixgbe_do_reset(netdev);
9535         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9536                             NETIF_F_HW_VLAN_CTAG_FILTER))
9537                 ixgbe_set_rx_mode(netdev);
9538
9539         return 0;
9540 }
9541
9542 /**
9543  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9544  * @dev: The port's netdev
9545  * @ti: Tunnel endpoint information
9546  **/
9547 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9548                                       struct udp_tunnel_info *ti)
9549 {
9550         struct ixgbe_adapter *adapter = netdev_priv(dev);
9551         struct ixgbe_hw *hw = &adapter->hw;
9552         __be16 port = ti->port;
9553         u32 port_shift = 0;
9554         u32 reg;
9555
9556         if (ti->sa_family != AF_INET)
9557                 return;
9558
9559         switch (ti->type) {
9560         case UDP_TUNNEL_TYPE_VXLAN:
9561                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9562                         return;
9563
9564                 if (adapter->vxlan_port == port)
9565                         return;
9566
9567                 if (adapter->vxlan_port) {
9568                         netdev_info(dev,
9569                                     "VXLAN port %d set, not adding port %d\n",
9570                                     ntohs(adapter->vxlan_port),
9571                                     ntohs(port));
9572                         return;
9573                 }
9574
9575                 adapter->vxlan_port = port;
9576                 break;
9577         case UDP_TUNNEL_TYPE_GENEVE:
9578                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9579                         return;
9580
9581                 if (adapter->geneve_port == port)
9582                         return;
9583
9584                 if (adapter->geneve_port) {
9585                         netdev_info(dev,
9586                                     "GENEVE port %d set, not adding port %d\n",
9587                                     ntohs(adapter->geneve_port),
9588                                     ntohs(port));
9589                         return;
9590                 }
9591
9592                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9593                 adapter->geneve_port = port;
9594                 break;
9595         default:
9596                 return;
9597         }
9598
9599         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9600         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9601 }
9602
9603 /**
9604  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9605  * @dev: The port's netdev
9606  * @ti: Tunnel endpoint information
9607  **/
9608 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9609                                       struct udp_tunnel_info *ti)
9610 {
9611         struct ixgbe_adapter *adapter = netdev_priv(dev);
9612         u32 port_mask;
9613
9614         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9615             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9616                 return;
9617
9618         if (ti->sa_family != AF_INET)
9619                 return;
9620
9621         switch (ti->type) {
9622         case UDP_TUNNEL_TYPE_VXLAN:
9623                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9624                         return;
9625
9626                 if (adapter->vxlan_port != ti->port) {
9627                         netdev_info(dev, "VXLAN port %d not found\n",
9628                                     ntohs(ti->port));
9629                         return;
9630                 }
9631
9632                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9633                 break;
9634         case UDP_TUNNEL_TYPE_GENEVE:
9635                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9636                         return;
9637
9638                 if (adapter->geneve_port != ti->port) {
9639                         netdev_info(dev, "GENEVE port %d not found\n",
9640                                     ntohs(ti->port));
9641                         return;
9642                 }
9643
9644                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9645                 break;
9646         default:
9647                 return;
9648         }
9649
9650         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9651         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9652 }
9653
9654 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9655                              struct net_device *dev,
9656                              const unsigned char *addr, u16 vid,
9657                              u16 flags)
9658 {
9659         /* guarantee we can provide a unique filter for the unicast address */
9660         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9661                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9662                 u16 pool = VMDQ_P(0);
9663
9664                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9665                         return -ENOMEM;
9666         }
9667
9668         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9669 }
9670
9671 /**
9672  * ixgbe_configure_bridge_mode - set various bridge modes
9673  * @adapter - the private structure
9674  * @mode - requested bridge mode
9675  *
9676  * Configure some settings require for various bridge modes.
9677  **/
9678 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9679                                        __u16 mode)
9680 {
9681         struct ixgbe_hw *hw = &adapter->hw;
9682         unsigned int p, num_pools;
9683         u32 vmdctl;
9684
9685         switch (mode) {
9686         case BRIDGE_MODE_VEPA:
9687                 /* disable Tx loopback, rely on switch hairpin mode */
9688                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9689
9690                 /* must enable Rx switching replication to allow multicast
9691                  * packet reception on all VFs, and to enable source address
9692                  * pruning.
9693                  */
9694                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9695                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9696                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9697
9698                 /* enable Rx source address pruning. Note, this requires
9699                  * replication to be enabled or else it does nothing.
9700                  */
9701                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9702                 for (p = 0; p < num_pools; p++) {
9703                         if (hw->mac.ops.set_source_address_pruning)
9704                                 hw->mac.ops.set_source_address_pruning(hw,
9705                                                                        true,
9706                                                                        p);
9707                 }
9708                 break;
9709         case BRIDGE_MODE_VEB:
9710                 /* enable Tx loopback for internal VF/PF communication */
9711                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9712                                 IXGBE_PFDTXGSWC_VT_LBEN);
9713
9714                 /* disable Rx switching replication unless we have SR-IOV
9715                  * virtual functions
9716                  */
9717                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9718                 if (!adapter->num_vfs)
9719                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9720                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9721
9722                 /* disable Rx source address pruning, since we don't expect to
9723                  * be receiving external loopback of our transmitted frames.
9724                  */
9725                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9726                 for (p = 0; p < num_pools; p++) {
9727                         if (hw->mac.ops.set_source_address_pruning)
9728                                 hw->mac.ops.set_source_address_pruning(hw,
9729                                                                        false,
9730                                                                        p);
9731                 }
9732                 break;
9733         default:
9734                 return -EINVAL;
9735         }
9736
9737         adapter->bridge_mode = mode;
9738
9739         e_info(drv, "enabling bridge mode: %s\n",
9740                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9741
9742         return 0;
9743 }
9744
9745 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9746                                     struct nlmsghdr *nlh, u16 flags)
9747 {
9748         struct ixgbe_adapter *adapter = netdev_priv(dev);
9749         struct nlattr *attr, *br_spec;
9750         int rem;
9751
9752         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9753                 return -EOPNOTSUPP;
9754
9755         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9756         if (!br_spec)
9757                 return -EINVAL;
9758
9759         nla_for_each_nested(attr, br_spec, rem) {
9760                 int status;
9761                 __u16 mode;
9762
9763                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9764                         continue;
9765
9766                 if (nla_len(attr) < sizeof(mode))
9767                         return -EINVAL;
9768
9769                 mode = nla_get_u16(attr);
9770                 status = ixgbe_configure_bridge_mode(adapter, mode);
9771                 if (status)
9772                         return status;
9773
9774                 break;
9775         }
9776
9777         return 0;
9778 }
9779
9780 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9781                                     struct net_device *dev,
9782                                     u32 filter_mask, int nlflags)
9783 {
9784         struct ixgbe_adapter *adapter = netdev_priv(dev);
9785
9786         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9787                 return 0;
9788
9789         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9790                                        adapter->bridge_mode, 0, 0, nlflags,
9791                                        filter_mask, NULL);
9792 }
9793
9794 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9795 {
9796         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9797         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9798         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9799         int tcs = netdev_get_num_tc(pdev) ? : 1;
9800         unsigned int limit;
9801         int pool, err;
9802
9803         /* Hardware has a limited number of available pools. Each VF, and the
9804          * PF require a pool. Check to ensure we don't attempt to use more
9805          * then the available number of pools.
9806          */
9807         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9808                 return ERR_PTR(-EINVAL);
9809
9810 #ifdef CONFIG_RPS
9811         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9812                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9813                             vdev->name);
9814                 return ERR_PTR(-EINVAL);
9815         }
9816 #endif
9817         /* Check for hardware restriction on number of rx/tx queues */
9818         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9819             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9820                 netdev_info(pdev,
9821                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9822                             pdev->name);
9823                 return ERR_PTR(-EINVAL);
9824         }
9825
9826         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9827               adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9828             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9829                 return ERR_PTR(-EBUSY);
9830
9831         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9832         if (!fwd_adapter)
9833                 return ERR_PTR(-ENOMEM);
9834
9835         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9836         set_bit(pool, adapter->fwd_bitmask);
9837         limit = find_last_bit(adapter->fwd_bitmask, adapter->num_rx_pools + 1);
9838
9839         /* Enable VMDq flag so device will be set in VM mode */
9840         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9841         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9842         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9843
9844         /* Force reinit of ring allocation with VMDQ enabled */
9845         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9846         if (err)
9847                 goto fwd_add_err;
9848         fwd_adapter->pool = pool;
9849         fwd_adapter->real_adapter = adapter;
9850
9851         if (netif_running(pdev)) {
9852                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9853                 if (err)
9854                         goto fwd_add_err;
9855                 netif_tx_start_all_queues(vdev);
9856         }
9857
9858         return fwd_adapter;
9859 fwd_add_err:
9860         /* unwind counter and free adapter struct */
9861         netdev_info(pdev,
9862                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9863         clear_bit(pool, adapter->fwd_bitmask);
9864         kfree(fwd_adapter);
9865         return ERR_PTR(err);
9866 }
9867
9868 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9869 {
9870         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9871         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9872         unsigned int limit;
9873
9874         clear_bit(fwd_adapter->pool, adapter->fwd_bitmask);
9875
9876         limit = find_last_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9877         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9878         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9879
9880         /* go back to full RSS if we're done with our VMQs */
9881         if (adapter->ring_feature[RING_F_VMDQ].limit == 1) {
9882                 int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9883                                 num_online_cpus());
9884
9885                 adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED;
9886                 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
9887                 adapter->ring_feature[RING_F_RSS].limit = rss;
9888         }
9889
9890         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9891         netdev_dbg(pdev, "pool %i:%i queues %i:%i\n",
9892                    fwd_adapter->pool, adapter->num_rx_pools,
9893                    fwd_adapter->rx_base_queue,
9894                    fwd_adapter->rx_base_queue +
9895                    adapter->num_rx_queues_per_pool);
9896         kfree(fwd_adapter);
9897 }
9898
9899 #define IXGBE_MAX_MAC_HDR_LEN           127
9900 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9901
9902 static netdev_features_t
9903 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9904                      netdev_features_t features)
9905 {
9906         unsigned int network_hdr_len, mac_hdr_len;
9907
9908         /* Make certain the headers can be described by a context descriptor */
9909         mac_hdr_len = skb_network_header(skb) - skb->data;
9910         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9911                 return features & ~(NETIF_F_HW_CSUM |
9912                                     NETIF_F_SCTP_CRC |
9913                                     NETIF_F_HW_VLAN_CTAG_TX |
9914                                     NETIF_F_TSO |
9915                                     NETIF_F_TSO6);
9916
9917         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9918         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9919                 return features & ~(NETIF_F_HW_CSUM |
9920                                     NETIF_F_SCTP_CRC |
9921                                     NETIF_F_TSO |
9922                                     NETIF_F_TSO6);
9923
9924         /* We can only support IPV4 TSO in tunnels if we can mangle the
9925          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9926          */
9927         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9928                 features &= ~NETIF_F_TSO;
9929
9930         return features;
9931 }
9932
9933 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
9934 {
9935         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
9936         struct ixgbe_adapter *adapter = netdev_priv(dev);
9937         struct bpf_prog *old_prog;
9938
9939         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
9940                 return -EINVAL;
9941
9942         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
9943                 return -EINVAL;
9944
9945         /* verify ixgbe ring attributes are sufficient for XDP */
9946         for (i = 0; i < adapter->num_rx_queues; i++) {
9947                 struct ixgbe_ring *ring = adapter->rx_ring[i];
9948
9949                 if (ring_is_rsc_enabled(ring))
9950                         return -EINVAL;
9951
9952                 if (frame_size > ixgbe_rx_bufsz(ring))
9953                         return -EINVAL;
9954         }
9955
9956         if (nr_cpu_ids > MAX_XDP_QUEUES)
9957                 return -ENOMEM;
9958
9959         old_prog = xchg(&adapter->xdp_prog, prog);
9960
9961         /* If transitioning XDP modes reconfigure rings */
9962         if (!!prog != !!old_prog) {
9963                 int err = ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
9964
9965                 if (err) {
9966                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
9967                         return -EINVAL;
9968                 }
9969         } else {
9970                 for (i = 0; i < adapter->num_rx_queues; i++)
9971                         xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
9972         }
9973
9974         if (old_prog)
9975                 bpf_prog_put(old_prog);
9976
9977         return 0;
9978 }
9979
9980 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
9981 {
9982         struct ixgbe_adapter *adapter = netdev_priv(dev);
9983
9984         switch (xdp->command) {
9985         case XDP_SETUP_PROG:
9986                 return ixgbe_xdp_setup(dev, xdp->prog);
9987         case XDP_QUERY_PROG:
9988                 xdp->prog_attached = !!(adapter->xdp_prog);
9989                 xdp->prog_id = adapter->xdp_prog ?
9990                         adapter->xdp_prog->aux->id : 0;
9991                 return 0;
9992         default:
9993                 return -EINVAL;
9994         }
9995 }
9996
9997 static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp)
9998 {
9999         struct ixgbe_adapter *adapter = netdev_priv(dev);
10000         struct ixgbe_ring *ring;
10001         int err;
10002
10003         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10004                 return -ENETDOWN;
10005
10006         /* During program transitions its possible adapter->xdp_prog is assigned
10007          * but ring has not been configured yet. In this case simply abort xmit.
10008          */
10009         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10010         if (unlikely(!ring))
10011                 return -ENXIO;
10012
10013         err = ixgbe_xmit_xdp_ring(adapter, xdp);
10014         if (err != IXGBE_XDP_TX)
10015                 return -ENOSPC;
10016
10017         return 0;
10018 }
10019
10020 static void ixgbe_xdp_flush(struct net_device *dev)
10021 {
10022         struct ixgbe_adapter *adapter = netdev_priv(dev);
10023         struct ixgbe_ring *ring;
10024
10025         /* Its possible the device went down between xdp xmit and flush so
10026          * we need to ensure device is still up.
10027          */
10028         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10029                 return;
10030
10031         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10032         if (unlikely(!ring))
10033                 return;
10034
10035         /* Force memory writes to complete before letting h/w know there
10036          * are new descriptors to fetch.
10037          */
10038         wmb();
10039         writel(ring->next_to_use, ring->tail);
10040
10041         return;
10042 }
10043
10044 static const struct net_device_ops ixgbe_netdev_ops = {
10045         .ndo_open               = ixgbe_open,
10046         .ndo_stop               = ixgbe_close,
10047         .ndo_start_xmit         = ixgbe_xmit_frame,
10048         .ndo_select_queue       = ixgbe_select_queue,
10049         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10050         .ndo_validate_addr      = eth_validate_addr,
10051         .ndo_set_mac_address    = ixgbe_set_mac,
10052         .ndo_change_mtu         = ixgbe_change_mtu,
10053         .ndo_tx_timeout         = ixgbe_tx_timeout,
10054         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10055         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10056         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10057         .ndo_do_ioctl           = ixgbe_ioctl,
10058         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10059         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10060         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10061         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10062         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10063         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10064         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10065         .ndo_get_stats64        = ixgbe_get_stats64,
10066         .ndo_setup_tc           = __ixgbe_setup_tc,
10067 #ifdef CONFIG_NET_POLL_CONTROLLER
10068         .ndo_poll_controller    = ixgbe_netpoll,
10069 #endif
10070 #ifdef IXGBE_FCOE
10071         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10072         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10073         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10074         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10075         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10076         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10077         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10078 #endif /* IXGBE_FCOE */
10079         .ndo_set_features = ixgbe_set_features,
10080         .ndo_fix_features = ixgbe_fix_features,
10081         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10082         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10083         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10084         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10085         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10086         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10087         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10088         .ndo_features_check     = ixgbe_features_check,
10089         .ndo_bpf                = ixgbe_xdp,
10090         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10091         .ndo_xdp_flush          = ixgbe_xdp_flush,
10092 };
10093
10094 /**
10095  * ixgbe_enumerate_functions - Get the number of ports this device has
10096  * @adapter: adapter structure
10097  *
10098  * This function enumerates the phsyical functions co-located on a single slot,
10099  * in order to determine how many ports a device has. This is most useful in
10100  * determining the required GT/s of PCIe bandwidth necessary for optimal
10101  * performance.
10102  **/
10103 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10104 {
10105         struct pci_dev *entry, *pdev = adapter->pdev;
10106         int physfns = 0;
10107
10108         /* Some cards can not use the generic count PCIe functions method,
10109          * because they are behind a parent switch, so we hardcode these with
10110          * the correct number of functions.
10111          */
10112         if (ixgbe_pcie_from_parent(&adapter->hw))
10113                 physfns = 4;
10114
10115         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10116                 /* don't count virtual functions */
10117                 if (entry->is_virtfn)
10118                         continue;
10119
10120                 /* When the devices on the bus don't all match our device ID,
10121                  * we can't reliably determine the correct number of
10122                  * functions. This can occur if a function has been direct
10123                  * attached to a virtual machine using VT-d, for example. In
10124                  * this case, simply return -1 to indicate this.
10125                  */
10126                 if ((entry->vendor != pdev->vendor) ||
10127                     (entry->device != pdev->device))
10128                         return -1;
10129
10130                 physfns++;
10131         }
10132
10133         return physfns;
10134 }
10135
10136 /**
10137  * ixgbe_wol_supported - Check whether device supports WoL
10138  * @adapter: the adapter private structure
10139  * @device_id: the device ID
10140  * @subdev_id: the subsystem device ID
10141  *
10142  * This function is used by probe and ethtool to determine
10143  * which devices have WoL support
10144  *
10145  **/
10146 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10147                          u16 subdevice_id)
10148 {
10149         struct ixgbe_hw *hw = &adapter->hw;
10150         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10151
10152         /* WOL not supported on 82598 */
10153         if (hw->mac.type == ixgbe_mac_82598EB)
10154                 return false;
10155
10156         /* check eeprom to see if WOL is enabled for X540 and newer */
10157         if (hw->mac.type >= ixgbe_mac_X540) {
10158                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10159                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10160                      (hw->bus.func == 0)))
10161                         return true;
10162         }
10163
10164         /* WOL is determined based on device IDs for 82599 MACs */
10165         switch (device_id) {
10166         case IXGBE_DEV_ID_82599_SFP:
10167                 /* Only these subdevices could supports WOL */
10168                 switch (subdevice_id) {
10169                 case IXGBE_SUBDEV_ID_82599_560FLR:
10170                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10171                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10172                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10173                         /* only support first port */
10174                         if (hw->bus.func != 0)
10175                                 break;
10176                         /* fall through */
10177                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10178                 case IXGBE_SUBDEV_ID_82599_SFP:
10179                 case IXGBE_SUBDEV_ID_82599_RNDC:
10180                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10181                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10182                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10183                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10184                         return true;
10185                 }
10186                 break;
10187         case IXGBE_DEV_ID_82599EN_SFP:
10188                 /* Only these subdevices support WOL */
10189                 switch (subdevice_id) {
10190                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10191                         return true;
10192                 }
10193                 break;
10194         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10195                 /* All except this subdevice support WOL */
10196                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10197                         return true;
10198                 break;
10199         case IXGBE_DEV_ID_82599_KX4:
10200                 return  true;
10201         default:
10202                 break;
10203         }
10204
10205         return false;
10206 }
10207
10208 /**
10209  * ixgbe_set_fw_version - Set FW version
10210  * @adapter: the adapter private structure
10211  *
10212  * This function is used by probe and ethtool to determine the FW version to
10213  * format to display. The FW version is taken from the EEPROM/NVM.
10214  */
10215 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10216 {
10217         struct ixgbe_hw *hw = &adapter->hw;
10218         struct ixgbe_nvm_version nvm_ver;
10219
10220         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10221         if (nvm_ver.oem_valid) {
10222                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10223                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10224                          nvm_ver.oem_release);
10225                 return;
10226         }
10227
10228         ixgbe_get_etk_id(hw, &nvm_ver);
10229         ixgbe_get_orom_version(hw, &nvm_ver);
10230
10231         if (nvm_ver.or_valid) {
10232                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10233                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10234                          nvm_ver.or_build, nvm_ver.or_patch);
10235                 return;
10236         }
10237
10238         /* Set ETrack ID format */
10239         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10240                  "0x%08x", nvm_ver.etk_id);
10241 }
10242
10243 /**
10244  * ixgbe_probe - Device Initialization Routine
10245  * @pdev: PCI device information struct
10246  * @ent: entry in ixgbe_pci_tbl
10247  *
10248  * Returns 0 on success, negative on failure
10249  *
10250  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10251  * The OS initialization, configuring of the adapter private structure,
10252  * and a hardware reset occur.
10253  **/
10254 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10255 {
10256         struct net_device *netdev;
10257         struct ixgbe_adapter *adapter = NULL;
10258         struct ixgbe_hw *hw;
10259         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10260         int i, err, pci_using_dac, expected_gts;
10261         unsigned int indices = MAX_TX_QUEUES;
10262         u8 part_str[IXGBE_PBANUM_LENGTH];
10263         bool disable_dev = false;
10264 #ifdef IXGBE_FCOE
10265         u16 device_caps;
10266 #endif
10267         u32 eec;
10268
10269         /* Catch broken hardware that put the wrong VF device ID in
10270          * the PCIe SR-IOV capability.
10271          */
10272         if (pdev->is_virtfn) {
10273                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10274                      pci_name(pdev), pdev->vendor, pdev->device);
10275                 return -EINVAL;
10276         }
10277
10278         err = pci_enable_device_mem(pdev);
10279         if (err)
10280                 return err;
10281
10282         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10283                 pci_using_dac = 1;
10284         } else {
10285                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10286                 if (err) {
10287                         dev_err(&pdev->dev,
10288                                 "No usable DMA configuration, aborting\n");
10289                         goto err_dma;
10290                 }
10291                 pci_using_dac = 0;
10292         }
10293
10294         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10295         if (err) {
10296                 dev_err(&pdev->dev,
10297                         "pci_request_selected_regions failed 0x%x\n", err);
10298                 goto err_pci_reg;
10299         }
10300
10301         pci_enable_pcie_error_reporting(pdev);
10302
10303         pci_set_master(pdev);
10304         pci_save_state(pdev);
10305
10306         if (ii->mac == ixgbe_mac_82598EB) {
10307 #ifdef CONFIG_IXGBE_DCB
10308                 /* 8 TC w/ 4 queues per TC */
10309                 indices = 4 * MAX_TRAFFIC_CLASS;
10310 #else
10311                 indices = IXGBE_MAX_RSS_INDICES;
10312 #endif
10313         }
10314
10315         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10316         if (!netdev) {
10317                 err = -ENOMEM;
10318                 goto err_alloc_etherdev;
10319         }
10320
10321         SET_NETDEV_DEV(netdev, &pdev->dev);
10322
10323         adapter = netdev_priv(netdev);
10324
10325         adapter->netdev = netdev;
10326         adapter->pdev = pdev;
10327         hw = &adapter->hw;
10328         hw->back = adapter;
10329         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10330
10331         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10332                               pci_resource_len(pdev, 0));
10333         adapter->io_addr = hw->hw_addr;
10334         if (!hw->hw_addr) {
10335                 err = -EIO;
10336                 goto err_ioremap;
10337         }
10338
10339         netdev->netdev_ops = &ixgbe_netdev_ops;
10340         ixgbe_set_ethtool_ops(netdev);
10341         netdev->watchdog_timeo = 5 * HZ;
10342         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10343
10344         /* Setup hw api */
10345         hw->mac.ops   = *ii->mac_ops;
10346         hw->mac.type  = ii->mac;
10347         hw->mvals     = ii->mvals;
10348         if (ii->link_ops)
10349                 hw->link.ops  = *ii->link_ops;
10350
10351         /* EEPROM */
10352         hw->eeprom.ops = *ii->eeprom_ops;
10353         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10354         if (ixgbe_removed(hw->hw_addr)) {
10355                 err = -EIO;
10356                 goto err_ioremap;
10357         }
10358         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10359         if (!(eec & BIT(8)))
10360                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10361
10362         /* PHY */
10363         hw->phy.ops = *ii->phy_ops;
10364         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10365         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10366         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10367         hw->phy.mdio.mmds = 0;
10368         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10369         hw->phy.mdio.dev = netdev;
10370         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10371         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10372
10373         /* setup the private structure */
10374         err = ixgbe_sw_init(adapter, ii);
10375         if (err)
10376                 goto err_sw_init;
10377
10378         /* Make sure the SWFW semaphore is in a valid state */
10379         if (hw->mac.ops.init_swfw_sync)
10380                 hw->mac.ops.init_swfw_sync(hw);
10381
10382         /* Make it possible the adapter to be woken up via WOL */
10383         switch (adapter->hw.mac.type) {
10384         case ixgbe_mac_82599EB:
10385         case ixgbe_mac_X540:
10386         case ixgbe_mac_X550:
10387         case ixgbe_mac_X550EM_x:
10388         case ixgbe_mac_x550em_a:
10389                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10390                 break;
10391         default:
10392                 break;
10393         }
10394
10395         /*
10396          * If there is a fan on this device and it has failed log the
10397          * failure.
10398          */
10399         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10400                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10401                 if (esdp & IXGBE_ESDP_SDP1)
10402                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10403         }
10404
10405         if (allow_unsupported_sfp)
10406                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10407
10408         /* reset_hw fills in the perm_addr as well */
10409         hw->phy.reset_if_overtemp = true;
10410         err = hw->mac.ops.reset_hw(hw);
10411         hw->phy.reset_if_overtemp = false;
10412         ixgbe_set_eee_capable(adapter);
10413         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10414                 err = 0;
10415         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10416                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10417                 e_dev_err("Reload the driver after installing a supported module.\n");
10418                 goto err_sw_init;
10419         } else if (err) {
10420                 e_dev_err("HW Init failed: %d\n", err);
10421                 goto err_sw_init;
10422         }
10423
10424 #ifdef CONFIG_PCI_IOV
10425         /* SR-IOV not supported on the 82598 */
10426         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10427                 goto skip_sriov;
10428         /* Mailbox */
10429         ixgbe_init_mbx_params_pf(hw);
10430         hw->mbx.ops = ii->mbx_ops;
10431         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10432         ixgbe_enable_sriov(adapter, max_vfs);
10433 skip_sriov:
10434
10435 #endif
10436         netdev->features = NETIF_F_SG |
10437                            NETIF_F_TSO |
10438                            NETIF_F_TSO6 |
10439                            NETIF_F_RXHASH |
10440                            NETIF_F_RXCSUM |
10441                            NETIF_F_HW_CSUM;
10442
10443 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10444                                     NETIF_F_GSO_GRE_CSUM | \
10445                                     NETIF_F_GSO_IPXIP4 | \
10446                                     NETIF_F_GSO_IPXIP6 | \
10447                                     NETIF_F_GSO_UDP_TUNNEL | \
10448                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10449
10450         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10451         netdev->features |= NETIF_F_GSO_PARTIAL |
10452                             IXGBE_GSO_PARTIAL_FEATURES;
10453
10454         if (hw->mac.type >= ixgbe_mac_82599EB)
10455                 netdev->features |= NETIF_F_SCTP_CRC;
10456
10457         /* copy netdev features into list of user selectable features */
10458         netdev->hw_features |= netdev->features |
10459                                NETIF_F_HW_VLAN_CTAG_FILTER |
10460                                NETIF_F_HW_VLAN_CTAG_RX |
10461                                NETIF_F_HW_VLAN_CTAG_TX |
10462                                NETIF_F_RXALL |
10463                                NETIF_F_HW_L2FW_DOFFLOAD;
10464
10465         if (hw->mac.type >= ixgbe_mac_82599EB)
10466                 netdev->hw_features |= NETIF_F_NTUPLE |
10467                                        NETIF_F_HW_TC;
10468
10469         if (pci_using_dac)
10470                 netdev->features |= NETIF_F_HIGHDMA;
10471
10472         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10473         netdev->hw_enc_features |= netdev->vlan_features;
10474         netdev->mpls_features |= NETIF_F_SG |
10475                                  NETIF_F_TSO |
10476                                  NETIF_F_TSO6 |
10477                                  NETIF_F_HW_CSUM;
10478         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10479
10480         /* set this bit last since it cannot be part of vlan_features */
10481         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10482                             NETIF_F_HW_VLAN_CTAG_RX |
10483                             NETIF_F_HW_VLAN_CTAG_TX;
10484
10485         netdev->priv_flags |= IFF_UNICAST_FLT;
10486         netdev->priv_flags |= IFF_SUPP_NOFCS;
10487
10488         /* MTU range: 68 - 9710 */
10489         netdev->min_mtu = ETH_MIN_MTU;
10490         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10491
10492 #ifdef CONFIG_IXGBE_DCB
10493         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10494                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10495 #endif
10496
10497 #ifdef IXGBE_FCOE
10498         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10499                 unsigned int fcoe_l;
10500
10501                 if (hw->mac.ops.get_device_caps) {
10502                         hw->mac.ops.get_device_caps(hw, &device_caps);
10503                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10504                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10505                 }
10506
10507
10508                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10509                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10510
10511                 netdev->features |= NETIF_F_FSO |
10512                                     NETIF_F_FCOE_CRC;
10513
10514                 netdev->vlan_features |= NETIF_F_FSO |
10515                                          NETIF_F_FCOE_CRC |
10516                                          NETIF_F_FCOE_MTU;
10517         }
10518 #endif /* IXGBE_FCOE */
10519
10520         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10521                 netdev->hw_features |= NETIF_F_LRO;
10522         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10523                 netdev->features |= NETIF_F_LRO;
10524
10525         /* make sure the EEPROM is good */
10526         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10527                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10528                 err = -EIO;
10529                 goto err_sw_init;
10530         }
10531
10532         eth_platform_get_mac_address(&adapter->pdev->dev,
10533                                      adapter->hw.mac.perm_addr);
10534
10535         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10536
10537         if (!is_valid_ether_addr(netdev->dev_addr)) {
10538                 e_dev_err("invalid MAC address\n");
10539                 err = -EIO;
10540                 goto err_sw_init;
10541         }
10542
10543         /* Set hw->mac.addr to permanent MAC address */
10544         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10545         ixgbe_mac_set_default_filter(adapter);
10546
10547         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10548
10549         if (ixgbe_removed(hw->hw_addr)) {
10550                 err = -EIO;
10551                 goto err_sw_init;
10552         }
10553         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10554         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10555         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10556
10557         err = ixgbe_init_interrupt_scheme(adapter);
10558         if (err)
10559                 goto err_sw_init;
10560
10561         for (i = 0; i < adapter->num_rx_queues; i++)
10562                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10563         for (i = 0; i < adapter->num_tx_queues; i++)
10564                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10565         for (i = 0; i < adapter->num_xdp_queues; i++)
10566                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10567
10568         /* WOL not supported for all devices */
10569         adapter->wol = 0;
10570         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10571         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10572                                                 pdev->subsystem_device);
10573         if (hw->wol_enabled)
10574                 adapter->wol = IXGBE_WUFC_MAG;
10575
10576         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10577
10578         /* save off EEPROM version number */
10579         ixgbe_set_fw_version(adapter);
10580
10581         /* pick up the PCI bus settings for reporting later */
10582         if (ixgbe_pcie_from_parent(hw))
10583                 ixgbe_get_parent_bus_info(adapter);
10584         else
10585                  hw->mac.ops.get_bus_info(hw);
10586
10587         /* calculate the expected PCIe bandwidth required for optimal
10588          * performance. Note that some older parts will never have enough
10589          * bandwidth due to being older generation PCIe parts. We clamp these
10590          * parts to ensure no warning is displayed if it can't be fixed.
10591          */
10592         switch (hw->mac.type) {
10593         case ixgbe_mac_82598EB:
10594                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10595                 break;
10596         default:
10597                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10598                 break;
10599         }
10600
10601         /* don't check link if we failed to enumerate functions */
10602         if (expected_gts > 0)
10603                 ixgbe_check_minimum_link(adapter, expected_gts);
10604
10605         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10606         if (err)
10607                 strlcpy(part_str, "Unknown", sizeof(part_str));
10608         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10609                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10610                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10611                            part_str);
10612         else
10613                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10614                            hw->mac.type, hw->phy.type, part_str);
10615
10616         e_dev_info("%pM\n", netdev->dev_addr);
10617
10618         /* reset the hardware with the new settings */
10619         err = hw->mac.ops.start_hw(hw);
10620         if (err == IXGBE_ERR_EEPROM_VERSION) {
10621                 /* We are running on a pre-production device, log a warning */
10622                 e_dev_warn("This device is a pre-production adapter/LOM. "
10623                            "Please be aware there may be issues associated "
10624                            "with your hardware.  If you are experiencing "
10625                            "problems please contact your Intel or hardware "
10626                            "representative who provided you with this "
10627                            "hardware.\n");
10628         }
10629         strcpy(netdev->name, "eth%d");
10630         pci_set_drvdata(pdev, adapter);
10631         err = register_netdev(netdev);
10632         if (err)
10633                 goto err_register;
10634
10635
10636         /* power down the optics for 82599 SFP+ fiber */
10637         if (hw->mac.ops.disable_tx_laser)
10638                 hw->mac.ops.disable_tx_laser(hw);
10639
10640         /* carrier off reporting is important to ethtool even BEFORE open */
10641         netif_carrier_off(netdev);
10642
10643 #ifdef CONFIG_IXGBE_DCA
10644         if (dca_add_requester(&pdev->dev) == 0) {
10645                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10646                 ixgbe_setup_dca(adapter);
10647         }
10648 #endif
10649         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10650                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10651                 for (i = 0; i < adapter->num_vfs; i++)
10652                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10653         }
10654
10655         /* firmware requires driver version to be 0xFFFFFFFF
10656          * since os does not support feature
10657          */
10658         if (hw->mac.ops.set_fw_drv_ver)
10659                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10660                                            sizeof(ixgbe_driver_version) - 1,
10661                                            ixgbe_driver_version);
10662
10663         /* add san mac addr to netdev */
10664         ixgbe_add_sanmac_netdev(netdev);
10665
10666         e_dev_info("%s\n", ixgbe_default_device_descr);
10667
10668 #ifdef CONFIG_IXGBE_HWMON
10669         if (ixgbe_sysfs_init(adapter))
10670                 e_err(probe, "failed to allocate sysfs resources\n");
10671 #endif /* CONFIG_IXGBE_HWMON */
10672
10673         ixgbe_dbg_adapter_init(adapter);
10674
10675         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10676         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10677                 hw->mac.ops.setup_link(hw,
10678                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10679                         true);
10680
10681         return 0;
10682
10683 err_register:
10684         ixgbe_release_hw_control(adapter);
10685         ixgbe_clear_interrupt_scheme(adapter);
10686 err_sw_init:
10687         ixgbe_disable_sriov(adapter);
10688         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10689         iounmap(adapter->io_addr);
10690         kfree(adapter->jump_tables[0]);
10691         kfree(adapter->mac_table);
10692         kfree(adapter->rss_key);
10693 err_ioremap:
10694         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10695         free_netdev(netdev);
10696 err_alloc_etherdev:
10697         pci_release_mem_regions(pdev);
10698 err_pci_reg:
10699 err_dma:
10700         if (!adapter || disable_dev)
10701                 pci_disable_device(pdev);
10702         return err;
10703 }
10704
10705 /**
10706  * ixgbe_remove - Device Removal Routine
10707  * @pdev: PCI device information struct
10708  *
10709  * ixgbe_remove is called by the PCI subsystem to alert the driver
10710  * that it should release a PCI device.  The could be caused by a
10711  * Hot-Plug event, or because the driver is going to be removed from
10712  * memory.
10713  **/
10714 static void ixgbe_remove(struct pci_dev *pdev)
10715 {
10716         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10717         struct net_device *netdev;
10718         bool disable_dev;
10719         int i;
10720
10721         /* if !adapter then we already cleaned up in probe */
10722         if (!adapter)
10723                 return;
10724
10725         netdev  = adapter->netdev;
10726         ixgbe_dbg_adapter_exit(adapter);
10727
10728         set_bit(__IXGBE_REMOVING, &adapter->state);
10729         cancel_work_sync(&adapter->service_task);
10730
10731
10732 #ifdef CONFIG_IXGBE_DCA
10733         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10734                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10735                 dca_remove_requester(&pdev->dev);
10736                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10737                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10738         }
10739
10740 #endif
10741 #ifdef CONFIG_IXGBE_HWMON
10742         ixgbe_sysfs_exit(adapter);
10743 #endif /* CONFIG_IXGBE_HWMON */
10744
10745         /* remove the added san mac */
10746         ixgbe_del_sanmac_netdev(netdev);
10747
10748 #ifdef CONFIG_PCI_IOV
10749         ixgbe_disable_sriov(adapter);
10750 #endif
10751         if (netdev->reg_state == NETREG_REGISTERED)
10752                 unregister_netdev(netdev);
10753
10754         ixgbe_clear_interrupt_scheme(adapter);
10755
10756         ixgbe_release_hw_control(adapter);
10757
10758 #ifdef CONFIG_DCB
10759         kfree(adapter->ixgbe_ieee_pfc);
10760         kfree(adapter->ixgbe_ieee_ets);
10761
10762 #endif
10763         iounmap(adapter->io_addr);
10764         pci_release_mem_regions(pdev);
10765
10766         e_dev_info("complete\n");
10767
10768         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10769                 if (adapter->jump_tables[i]) {
10770                         kfree(adapter->jump_tables[i]->input);
10771                         kfree(adapter->jump_tables[i]->mask);
10772                 }
10773                 kfree(adapter->jump_tables[i]);
10774         }
10775
10776         kfree(adapter->mac_table);
10777         kfree(adapter->rss_key);
10778         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10779         free_netdev(netdev);
10780
10781         pci_disable_pcie_error_reporting(pdev);
10782
10783         if (disable_dev)
10784                 pci_disable_device(pdev);
10785 }
10786
10787 /**
10788  * ixgbe_io_error_detected - called when PCI error is detected
10789  * @pdev: Pointer to PCI device
10790  * @state: The current pci connection state
10791  *
10792  * This function is called after a PCI bus error affecting
10793  * this device has been detected.
10794  */
10795 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10796                                                 pci_channel_state_t state)
10797 {
10798         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10799         struct net_device *netdev = adapter->netdev;
10800
10801 #ifdef CONFIG_PCI_IOV
10802         struct ixgbe_hw *hw = &adapter->hw;
10803         struct pci_dev *bdev, *vfdev;
10804         u32 dw0, dw1, dw2, dw3;
10805         int vf, pos;
10806         u16 req_id, pf_func;
10807
10808         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10809             adapter->num_vfs == 0)
10810                 goto skip_bad_vf_detection;
10811
10812         bdev = pdev->bus->self;
10813         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10814                 bdev = bdev->bus->self;
10815
10816         if (!bdev)
10817                 goto skip_bad_vf_detection;
10818
10819         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10820         if (!pos)
10821                 goto skip_bad_vf_detection;
10822
10823         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10824         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10825         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10826         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10827         if (ixgbe_removed(hw->hw_addr))
10828                 goto skip_bad_vf_detection;
10829
10830         req_id = dw1 >> 16;
10831         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10832         if (!(req_id & 0x0080))
10833                 goto skip_bad_vf_detection;
10834
10835         pf_func = req_id & 0x01;
10836         if ((pf_func & 1) == (pdev->devfn & 1)) {
10837                 unsigned int device_id;
10838
10839                 vf = (req_id & 0x7F) >> 1;
10840                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10841                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10842                                 "%8.8x\tdw3: %8.8x\n",
10843                 dw0, dw1, dw2, dw3);
10844                 switch (adapter->hw.mac.type) {
10845                 case ixgbe_mac_82599EB:
10846                         device_id = IXGBE_82599_VF_DEVICE_ID;
10847                         break;
10848                 case ixgbe_mac_X540:
10849                         device_id = IXGBE_X540_VF_DEVICE_ID;
10850                         break;
10851                 case ixgbe_mac_X550:
10852                         device_id = IXGBE_DEV_ID_X550_VF;
10853                         break;
10854                 case ixgbe_mac_X550EM_x:
10855                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10856                         break;
10857                 case ixgbe_mac_x550em_a:
10858                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10859                         break;
10860                 default:
10861                         device_id = 0;
10862                         break;
10863                 }
10864
10865                 /* Find the pci device of the offending VF */
10866                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10867                 while (vfdev) {
10868                         if (vfdev->devfn == (req_id & 0xFF))
10869                                 break;
10870                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10871                                                device_id, vfdev);
10872                 }
10873                 /*
10874                  * There's a slim chance the VF could have been hot plugged,
10875                  * so if it is no longer present we don't need to issue the
10876                  * VFLR.  Just clean up the AER in that case.
10877                  */
10878                 if (vfdev) {
10879                         pcie_flr(vfdev);
10880                         /* Free device reference count */
10881                         pci_dev_put(vfdev);
10882                 }
10883
10884                 pci_cleanup_aer_uncorrect_error_status(pdev);
10885         }
10886
10887         /*
10888          * Even though the error may have occurred on the other port
10889          * we still need to increment the vf error reference count for
10890          * both ports because the I/O resume function will be called
10891          * for both of them.
10892          */
10893         adapter->vferr_refcount++;
10894
10895         return PCI_ERS_RESULT_RECOVERED;
10896
10897 skip_bad_vf_detection:
10898 #endif /* CONFIG_PCI_IOV */
10899         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10900                 return PCI_ERS_RESULT_DISCONNECT;
10901
10902         if (!netif_device_present(netdev))
10903                 return PCI_ERS_RESULT_DISCONNECT;
10904
10905         rtnl_lock();
10906         netif_device_detach(netdev);
10907
10908         if (state == pci_channel_io_perm_failure) {
10909                 rtnl_unlock();
10910                 return PCI_ERS_RESULT_DISCONNECT;
10911         }
10912
10913         if (netif_running(netdev))
10914                 ixgbe_close_suspend(adapter);
10915
10916         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10917                 pci_disable_device(pdev);
10918         rtnl_unlock();
10919
10920         /* Request a slot reset. */
10921         return PCI_ERS_RESULT_NEED_RESET;
10922 }
10923
10924 /**
10925  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10926  * @pdev: Pointer to PCI device
10927  *
10928  * Restart the card from scratch, as if from a cold-boot.
10929  */
10930 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10931 {
10932         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10933         pci_ers_result_t result;
10934         int err;
10935
10936         if (pci_enable_device_mem(pdev)) {
10937                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10938                 result = PCI_ERS_RESULT_DISCONNECT;
10939         } else {
10940                 smp_mb__before_atomic();
10941                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10942                 adapter->hw.hw_addr = adapter->io_addr;
10943                 pci_set_master(pdev);
10944                 pci_restore_state(pdev);
10945                 pci_save_state(pdev);
10946
10947                 pci_wake_from_d3(pdev, false);
10948
10949                 ixgbe_reset(adapter);
10950                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10951                 result = PCI_ERS_RESULT_RECOVERED;
10952         }
10953
10954         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10955         if (err) {
10956                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10957                           "failed 0x%0x\n", err);
10958                 /* non-fatal, continue */
10959         }
10960
10961         return result;
10962 }
10963
10964 /**
10965  * ixgbe_io_resume - called when traffic can start flowing again.
10966  * @pdev: Pointer to PCI device
10967  *
10968  * This callback is called when the error recovery driver tells us that
10969  * its OK to resume normal operation.
10970  */
10971 static void ixgbe_io_resume(struct pci_dev *pdev)
10972 {
10973         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10974         struct net_device *netdev = adapter->netdev;
10975
10976 #ifdef CONFIG_PCI_IOV
10977         if (adapter->vferr_refcount) {
10978                 e_info(drv, "Resuming after VF err\n");
10979                 adapter->vferr_refcount--;
10980                 return;
10981         }
10982
10983 #endif
10984         rtnl_lock();
10985         if (netif_running(netdev))
10986                 ixgbe_open(netdev);
10987
10988         netif_device_attach(netdev);
10989         rtnl_unlock();
10990 }
10991
10992 static const struct pci_error_handlers ixgbe_err_handler = {
10993         .error_detected = ixgbe_io_error_detected,
10994         .slot_reset = ixgbe_io_slot_reset,
10995         .resume = ixgbe_io_resume,
10996 };
10997
10998 static struct pci_driver ixgbe_driver = {
10999         .name     = ixgbe_driver_name,
11000         .id_table = ixgbe_pci_tbl,
11001         .probe    = ixgbe_probe,
11002         .remove   = ixgbe_remove,
11003 #ifdef CONFIG_PM
11004         .suspend  = ixgbe_suspend,
11005         .resume   = ixgbe_resume,
11006 #endif
11007         .shutdown = ixgbe_shutdown,
11008         .sriov_configure = ixgbe_pci_sriov_configure,
11009         .err_handler = &ixgbe_err_handler
11010 };
11011
11012 /**
11013  * ixgbe_init_module - Driver Registration Routine
11014  *
11015  * ixgbe_init_module is the first routine called when the driver is
11016  * loaded. All it does is register with the PCI subsystem.
11017  **/
11018 static int __init ixgbe_init_module(void)
11019 {
11020         int ret;
11021         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11022         pr_info("%s\n", ixgbe_copyright);
11023
11024         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11025         if (!ixgbe_wq) {
11026                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11027                 return -ENOMEM;
11028         }
11029
11030         ixgbe_dbg_init();
11031
11032         ret = pci_register_driver(&ixgbe_driver);
11033         if (ret) {
11034                 destroy_workqueue(ixgbe_wq);
11035                 ixgbe_dbg_exit();
11036                 return ret;
11037         }
11038
11039 #ifdef CONFIG_IXGBE_DCA
11040         dca_register_notify(&dca_notifier);
11041 #endif
11042
11043         return 0;
11044 }
11045
11046 module_init(ixgbe_init_module);
11047
11048 /**
11049  * ixgbe_exit_module - Driver Exit Cleanup Routine
11050  *
11051  * ixgbe_exit_module is called just before the driver is removed
11052  * from memory.
11053  **/
11054 static void __exit ixgbe_exit_module(void)
11055 {
11056 #ifdef CONFIG_IXGBE_DCA
11057         dca_unregister_notify(&dca_notifier);
11058 #endif
11059         pci_unregister_driver(&ixgbe_driver);
11060
11061         ixgbe_dbg_exit();
11062         if (ixgbe_wq) {
11063                 destroy_workqueue(ixgbe_wq);
11064                 ixgbe_wq = NULL;
11065         }
11066 }
11067
11068 #ifdef CONFIG_IXGBE_DCA
11069 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11070                             void *p)
11071 {
11072         int ret_val;
11073
11074         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11075                                          __ixgbe_notify_dca);
11076
11077         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11078 }
11079
11080 #endif /* CONFIG_IXGBE_DCA */
11081
11082 module_exit(ixgbe_exit_module);
11083
11084 /* ixgbe_main.c */