drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <linux/numa.h>
  31 #include <generated/utsrelease.h>
  32 #include <scsi/fc/fc_fcoe.h>
  33 #include <net/udp_tunnel.h>
  34 #include <net/pkt_cls.h>
  35 #include <net/tc_act/tc_gact.h>
  36 #include <net/tc_act/tc_mirred.h>
  37 #include <net/vxlan.h>
  38 #include <net/mpls.h>
  39 #include <net/xdp_sock_drv.h>
  40 #include <net/xfrm.h>
  41
  42 #include "ixgbe.h"
  43 #include "ixgbe_common.h"
  44 #include "ixgbe_dcb_82599.h"
  45 #include "ixgbe_phy.h"
  46 #include "ixgbe_sriov.h"
  47 #include "ixgbe_model.h"
  48 #include "ixgbe_txrx_common.h"
  49
  50 char ixgbe_driver_name[] = "ixgbe";
  51 static const char ixgbe_driver_string[] =
  52                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  53 #ifdef IXGBE_FCOE
  54 char ixgbe_default_device_descr[] =
  55                               "Intel(R) 10 Gigabit Network Connection";
  56 #else
  57 static char ixgbe_default_device_descr[] =
  58                               "Intel(R) 10 Gigabit Network Connection";
  59 #endif
  60 static const char ixgbe_copyright[] =
  61                                 "Copyright (c) 1999-2016 Intel Corporation.";
  62
  63 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  64
  65 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  66         [board_82598]           = &ixgbe_82598_info,
  67         [board_82599]           = &ixgbe_82599_info,
  68         [board_X540]            = &ixgbe_X540_info,
  69         [board_X550]            = &ixgbe_X550_info,
  70         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  71         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  72         [board_x550em_a]        = &ixgbe_x550em_a_info,
  73         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  74 };
  75
  76 /* ixgbe_pci_tbl - PCI Device ID Table
  77  *
  78  * Wildcard entries (PCI_ANY_ID) should come last
  79  * Last entry must be all 0s
  80  *
  81  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  82  *   Class, Class Mask, private data (not used) }
  83  */
  84 static const struct pci_device_id ixgbe_pci_tbl[] = {
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 132         /* required last entry */
 133         {0, }
 134 };
 135 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 136
 137 #ifdef CONFIG_IXGBE_DCA
 138 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 139                             void *p);
 140 static struct notifier_block dca_notifier = {
 141         .notifier_call = ixgbe_notify_dca,
 142         .next          = NULL,
 143         .priority      = 0
 144 };
 145 #endif
 146
 147 #ifdef CONFIG_PCI_IOV
 148 static unsigned int max_vfs;
 149 module_param(max_vfs, uint, 0);
 150 MODULE_PARM_DESC(max_vfs,
 151                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 152 #endif /* CONFIG_PCI_IOV */
 153
 154 static unsigned int allow_unsupported_sfp;
 155 module_param(allow_unsupported_sfp, uint, 0);
 156 MODULE_PARM_DESC(allow_unsupported_sfp,
 157                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 158
 159 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 160 static int debug = -1;
 161 module_param(debug, int, 0);
 162 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 163
 164 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 165 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 166 MODULE_LICENSE("GPL v2");
 167
 168 static struct workqueue_struct *ixgbe_wq;
 169
 170 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 171 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 172
 173 static const struct net_device_ops ixgbe_netdev_ops;
 174
 175 static bool netif_is_ixgbe(struct net_device *dev)
 176 {
 177         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 178 }
 179
 180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 181                                           u32 reg, u16 *value)
 182 {
 183         struct pci_dev *parent_dev;
 184         struct pci_bus *parent_bus;
 185
 186         parent_bus = adapter->pdev->bus->parent;
 187         if (!parent_bus)
 188                 return -1;
 189
 190         parent_dev = parent_bus->self;
 191         if (!parent_dev)
 192                 return -1;
 193
 194         if (!pci_is_pcie(parent_dev))
 195                 return -1;
 196
 197         pcie_capability_read_word(parent_dev, reg, value);
 198         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 199             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 200                 return -1;
 201         return 0;
 202 }
 203
 204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 205 {
 206         struct ixgbe_hw *hw = &adapter->hw;
 207         u16 link_status = 0;
 208         int err;
 209
 210         hw->bus.type = ixgbe_bus_type_pci_express;
 211
 212         /* Get the negotiated link width and speed from PCI config space of the
 213          * parent, as this device is behind a switch
 214          */
 215         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 216
 217         /* assume caller will handle error case */
 218         if (err)
 219                 return err;
 220
 221         hw->bus.width = ixgbe_convert_bus_width(link_status);
 222         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 223
 224         return 0;
 225 }
 226
 227 /**
 228  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 229  * @hw: hw specific details
 230  *
 231  * This function is used by probe to determine whether a device's PCI-Express
 232  * bandwidth details should be gathered from the parent bus instead of from the
 233  * device. Used to ensure that various locations all have the correct device ID
 234  * checks.
 235  */
 236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 237 {
 238         switch (hw->device_id) {
 239         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 240         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 241                 return true;
 242         default:
 243                 return false;
 244         }
 245 }
 246
 247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 248                                      int expected_gts)
 249 {
 250         struct ixgbe_hw *hw = &adapter->hw;
 251         struct pci_dev *pdev;
 252
 253         /* Some devices are not connected over PCIe and thus do not negotiate
 254          * speed. These devices do not have valid bus info, and thus any report
 255          * we generate may not be correct.
 256          */
 257         if (hw->bus.type == ixgbe_bus_type_internal)
 258                 return;
 259
 260         /* determine whether to use the parent device */
 261         if (ixgbe_pcie_from_parent(&adapter->hw))
 262                 pdev = adapter->pdev->bus->parent->self;
 263         else
 264                 pdev = adapter->pdev;
 265
 266         pcie_print_link_status(pdev);
 267 }
 268
 269 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 270 {
 271         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 272             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 273             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 274                 queue_work(ixgbe_wq, &adapter->service_task);
 275 }
 276
 277 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 278 {
 279         struct ixgbe_adapter *adapter = hw->back;
 280
 281         if (!hw->hw_addr)
 282                 return;
 283         hw->hw_addr = NULL;
 284         e_dev_err("Adapter removed\n");
 285         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 286                 ixgbe_service_event_schedule(adapter);
 287 }
 288
 289 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 290 {
 291         u8 __iomem *reg_addr;
 292         u32 value;
 293         int i;
 294
 295         reg_addr = READ_ONCE(hw->hw_addr);
 296         if (ixgbe_removed(reg_addr))
 297                 return IXGBE_FAILED_READ_REG;
 298
 299         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 300          * so perform several status register reads to determine if the adapter
 301          * has been removed.
 302          */
 303         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 304                 value = readl(reg_addr + IXGBE_STATUS);
 305                 if (value != IXGBE_FAILED_READ_REG)
 306                         break;
 307                 mdelay(3);
 308         }
 309
 310         if (value == IXGBE_FAILED_READ_REG)
 311                 ixgbe_remove_adapter(hw);
 312         else
 313                 value = readl(reg_addr + reg);
 314         return value;
 315 }
 316
 317 /**
 318  * ixgbe_read_reg - Read from device register
 319  * @hw: hw specific details
 320  * @reg: offset of register to read
 321  *
 322  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 323  *
 324  * This function is used to read device registers. It checks for device
 325  * removal by confirming any read that returns all ones by checking the
 326  * status register value for all ones. This function avoids reading from
 327  * the hardware if a removal was previously detected in which case it
 328  * returns IXGBE_FAILED_READ_REG (all ones).
 329  */
 330 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 331 {
 332         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 333         u32 value;
 334
 335         if (ixgbe_removed(reg_addr))
 336                 return IXGBE_FAILED_READ_REG;
 337         if (unlikely(hw->phy.nw_mng_if_sel &
 338                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 339                 struct ixgbe_adapter *adapter;
 340                 int i;
 341
 342                 for (i = 0; i < 200; ++i) {
 343                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 344                         if (likely(!value))
 345                                 goto writes_completed;
 346                         if (value == IXGBE_FAILED_READ_REG) {
 347                                 ixgbe_remove_adapter(hw);
 348                                 return IXGBE_FAILED_READ_REG;
 349                         }
 350                         udelay(5);
 351                 }
 352
 353                 adapter = hw->back;
 354                 e_warn(hw, "register writes incomplete %08x\n", value);
 355         }
 356
 357 writes_completed:
 358         value = readl(reg_addr + reg);
 359         if (unlikely(value == IXGBE_FAILED_READ_REG))
 360                 value = ixgbe_check_remove(hw, reg);
 361         return value;
 362 }
 363
 364 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 365 {
 366         u16 value;
 367
 368         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 369         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 370                 ixgbe_remove_adapter(hw);
 371                 return true;
 372         }
 373         return false;
 374 }
 375
 376 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 377 {
 378         struct ixgbe_adapter *adapter = hw->back;
 379         u16 value;
 380
 381         if (ixgbe_removed(hw->hw_addr))
 382                 return IXGBE_FAILED_READ_CFG_WORD;
 383         pci_read_config_word(adapter->pdev, reg, &value);
 384         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 385             ixgbe_check_cfg_remove(hw, adapter->pdev))
 386                 return IXGBE_FAILED_READ_CFG_WORD;
 387         return value;
 388 }
 389
 390 #ifdef CONFIG_PCI_IOV
 391 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 392 {
 393         struct ixgbe_adapter *adapter = hw->back;
 394         u32 value;
 395
 396         if (ixgbe_removed(hw->hw_addr))
 397                 return IXGBE_FAILED_READ_CFG_DWORD;
 398         pci_read_config_dword(adapter->pdev, reg, &value);
 399         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 400             ixgbe_check_cfg_remove(hw, adapter->pdev))
 401                 return IXGBE_FAILED_READ_CFG_DWORD;
 402         return value;
 403 }
 404 #endif /* CONFIG_PCI_IOV */
 405
 406 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 407 {
 408         struct ixgbe_adapter *adapter = hw->back;
 409
 410         if (ixgbe_removed(hw->hw_addr))
 411                 return;
 412         pci_write_config_word(adapter->pdev, reg, value);
 413 }
 414
 415 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 416 {
 417         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 418
 419         /* flush memory to make sure state is correct before next watchdog */
 420         smp_mb__before_atomic();
 421         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 422 }
 423
 424 struct ixgbe_reg_info {
 425         u32 ofs;
 426         char *name;
 427 };
 428
 429 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 430
 431         /* General Registers */
 432         {IXGBE_CTRL, "CTRL"},
 433         {IXGBE_STATUS, "STATUS"},
 434         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 435
 436         /* Interrupt Registers */
 437         {IXGBE_EICR, "EICR"},
 438
 439         /* RX Registers */
 440         {IXGBE_SRRCTL(0), "SRRCTL"},
 441         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 442         {IXGBE_RDLEN(0), "RDLEN"},
 443         {IXGBE_RDH(0), "RDH"},
 444         {IXGBE_RDT(0), "RDT"},
 445         {IXGBE_RXDCTL(0), "RXDCTL"},
 446         {IXGBE_RDBAL(0), "RDBAL"},
 447         {IXGBE_RDBAH(0), "RDBAH"},
 448
 449         /* TX Registers */
 450         {IXGBE_TDBAL(0), "TDBAL"},
 451         {IXGBE_TDBAH(0), "TDBAH"},
 452         {IXGBE_TDLEN(0), "TDLEN"},
 453         {IXGBE_TDH(0), "TDH"},
 454         {IXGBE_TDT(0), "TDT"},
 455         {IXGBE_TXDCTL(0), "TXDCTL"},
 456
 457         /* List Terminator */
 458         { .name = NULL }
 459 };
 460
 461
 462 /*
 463  * ixgbe_regdump - register printout routine
 464  */
 465 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 466 {
 467         int i;
 468         char rname[16];
 469         u32 regs[64];
 470
 471         switch (reginfo->ofs) {
 472         case IXGBE_SRRCTL(0):
 473                 for (i = 0; i < 64; i++)
 474                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 475                 break;
 476         case IXGBE_DCA_RXCTRL(0):
 477                 for (i = 0; i < 64; i++)
 478                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 479                 break;
 480         case IXGBE_RDLEN(0):
 481                 for (i = 0; i < 64; i++)
 482                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 483                 break;
 484         case IXGBE_RDH(0):
 485                 for (i = 0; i < 64; i++)
 486                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 487                 break;
 488         case IXGBE_RDT(0):
 489                 for (i = 0; i < 64; i++)
 490                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 491                 break;
 492         case IXGBE_RXDCTL(0):
 493                 for (i = 0; i < 64; i++)
 494                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 495                 break;
 496         case IXGBE_RDBAL(0):
 497                 for (i = 0; i < 64; i++)
 498                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 499                 break;
 500         case IXGBE_RDBAH(0):
 501                 for (i = 0; i < 64; i++)
 502                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 503                 break;
 504         case IXGBE_TDBAL(0):
 505                 for (i = 0; i < 64; i++)
 506                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 507                 break;
 508         case IXGBE_TDBAH(0):
 509                 for (i = 0; i < 64; i++)
 510                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 511                 break;
 512         case IXGBE_TDLEN(0):
 513                 for (i = 0; i < 64; i++)
 514                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 515                 break;
 516         case IXGBE_TDH(0):
 517                 for (i = 0; i < 64; i++)
 518                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 519                 break;
 520         case IXGBE_TDT(0):
 521                 for (i = 0; i < 64; i++)
 522                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 523                 break;
 524         case IXGBE_TXDCTL(0):
 525                 for (i = 0; i < 64; i++)
 526                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 527                 break;
 528         default:
 529                 pr_info("%-15s %08x\n",
 530                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 531                 return;
 532         }
 533
 534         i = 0;
 535         while (i < 64) {
 536                 int j;
 537                 char buf[9 * 8 + 1];
 538                 char *p = buf;
 539
 540                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 541                 for (j = 0; j < 8; j++)
 542                         p += sprintf(p, " %08x", regs[i++]);
 543                 pr_err("%-15s%s\n", rname, buf);
 544         }
 545
 546 }
 547
 548 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 549 {
 550         struct ixgbe_tx_buffer *tx_buffer;
 551
 552         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 553         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 554                 n, ring->next_to_use, ring->next_to_clean,
 555                 (u64)dma_unmap_addr(tx_buffer, dma),
 556                 dma_unmap_len(tx_buffer, len),
 557                 tx_buffer->next_to_watch,
 558                 (u64)tx_buffer->time_stamp);
 559 }
 560
 561 /*
 562  * ixgbe_dump - Print registers, tx-rings and rx-rings
 563  */
 564 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 565 {
 566         struct net_device *netdev = adapter->netdev;
 567         struct ixgbe_hw *hw = &adapter->hw;
 568         struct ixgbe_reg_info *reginfo;
 569         int n = 0;
 570         struct ixgbe_ring *ring;
 571         struct ixgbe_tx_buffer *tx_buffer;
 572         union ixgbe_adv_tx_desc *tx_desc;
 573         struct my_u0 { u64 a; u64 b; } *u0;
 574         struct ixgbe_ring *rx_ring;
 575         union ixgbe_adv_rx_desc *rx_desc;
 576         struct ixgbe_rx_buffer *rx_buffer_info;
 577         int i = 0;
 578
 579         if (!netif_msg_hw(adapter))
 580                 return;
 581
 582         /* Print netdevice Info */
 583         if (netdev) {
 584                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 585                 pr_info("Device Name     state            "
 586                         "trans_start\n");
 587                 pr_info("%-15s %016lX %016lX\n",
 588                         netdev->name,
 589                         netdev->state,
 590                         dev_trans_start(netdev));
 591         }
 592
 593         /* Print Registers */
 594         dev_info(&adapter->pdev->dev, "Register Dump\n");
 595         pr_info(" Register Name   Value\n");
 596         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 597              reginfo->name; reginfo++) {
 598                 ixgbe_regdump(hw, reginfo);
 599         }
 600
 601         /* Print TX Ring Summary */
 602         if (!netdev || !netif_running(netdev))
 603                 return;
 604
 605         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 606         pr_info(" %s     %s              %s        %s\n",
 607                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 608                 "leng", "ntw", "timestamp");
 609         for (n = 0; n < adapter->num_tx_queues; n++) {
 610                 ring = adapter->tx_ring[n];
 611                 ixgbe_print_buffer(ring, n);
 612         }
 613
 614         for (n = 0; n < adapter->num_xdp_queues; n++) {
 615                 ring = adapter->xdp_ring[n];
 616                 ixgbe_print_buffer(ring, n);
 617         }
 618
 619         /* Print TX Rings */
 620         if (!netif_msg_tx_done(adapter))
 621                 goto rx_ring_summary;
 622
 623         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 624
 625         /* Transmit Descriptor Formats
 626          *
 627          * 82598 Advanced Transmit Descriptor
 628          *   +--------------------------------------------------------------+
 629          * 0 |         Buffer Address [63:0]                                |
 630          *   +--------------------------------------------------------------+
 631          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 632          *   +--------------------------------------------------------------+
 633          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 634          *
 635          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 636          *   +--------------------------------------------------------------+
 637          * 0 |                          RSV [63:0]                          |
 638          *   +--------------------------------------------------------------+
 639          * 8 |            RSV           |  STA  |          NXTSEQ           |
 640          *   +--------------------------------------------------------------+
 641          *   63                       36 35   32 31                         0
 642          *
 643          * 82599+ Advanced Transmit Descriptor
 644          *   +--------------------------------------------------------------+
 645          * 0 |         Buffer Address [63:0]                                |
 646          *   +--------------------------------------------------------------+
 647          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 648          *   +--------------------------------------------------------------+
 649          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 650          *
 651          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 652          *   +--------------------------------------------------------------+
 653          * 0 |                          RSV [63:0]                          |
 654          *   +--------------------------------------------------------------+
 655          * 8 |            RSV           |  STA  |           RSV             |
 656          *   +--------------------------------------------------------------+
 657          *   63                       36 35   32 31                         0
 658          */
 659
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 ring = adapter->tx_ring[n];
 662                 pr_info("------------------------------------\n");
 663                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 664                 pr_info("------------------------------------\n");
 665                 pr_info("%s%s    %s              %s        %s          %s\n",
 666                         "T [desc]     [address 63:0  ] ",
 667                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 668                         "leng", "ntw", "timestamp", "bi->skb");
 669
 670                 for (i = 0; ring->desc && (i < ring->count); i++) {
 671                         tx_desc = IXGBE_TX_DESC(ring, i);
 672                         tx_buffer = &ring->tx_buffer_info[i];
 673                         u0 = (struct my_u0 *)tx_desc;
 674                         if (dma_unmap_len(tx_buffer, len) > 0) {
 675                                 const char *ring_desc;
 676
 677                                 if (i == ring->next_to_use &&
 678                                     i == ring->next_to_clean)
 679                                         ring_desc = " NTC/U";
 680                                 else if (i == ring->next_to_use)
 681                                         ring_desc = " NTU";
 682                                 else if (i == ring->next_to_clean)
 683                                         ring_desc = " NTC";
 684                                 else
 685                                         ring_desc = "";
 686                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 687                                         i,
 688                                         le64_to_cpu((__force __le64)u0->a),
 689                                         le64_to_cpu((__force __le64)u0->b),
 690                                         (u64)dma_unmap_addr(tx_buffer, dma),
 691                                         dma_unmap_len(tx_buffer, len),
 692                                         tx_buffer->next_to_watch,
 693                                         (u64)tx_buffer->time_stamp,
 694                                         tx_buffer->skb,
 695                                         ring_desc);
 696
 697                                 if (netif_msg_pktdata(adapter) &&
 698                                     tx_buffer->skb)
 699                                         print_hex_dump(KERN_INFO, "",
 700                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 701                                                 tx_buffer->skb->data,
 702                                                 dma_unmap_len(tx_buffer, len),
 703                                                 true);
 704                         }
 705                 }
 706         }
 707
 708         /* Print RX Rings Summary */
 709 rx_ring_summary:
 710         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 711         pr_info("Queue [NTU] [NTC]\n");
 712         for (n = 0; n < adapter->num_rx_queues; n++) {
 713                 rx_ring = adapter->rx_ring[n];
 714                 pr_info("%5d %5X %5X\n",
 715                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 716         }
 717
 718         /* Print RX Rings */
 719         if (!netif_msg_rx_status(adapter))
 720                 return;
 721
 722         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 723
 724         /* Receive Descriptor Formats
 725          *
 726          * 82598 Advanced Receive Descriptor (Read) Format
 727          *    63                                           1        0
 728          *    +-----------------------------------------------------+
 729          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 730          *    +----------------------------------------------+------+
 731          *  8 |       Header Buffer Address [63:1]           |  DD  |
 732          *    +-----------------------------------------------------+
 733          *
 734          *
 735          * 82598 Advanced Receive Descriptor (Write-Back) Format
 736          *
 737          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 738          *   +------------------------------------------------------+
 739          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 740          *   | Packet   | IP     |   |          |     | Type | Type |
 741          *   | Checksum | Ident  |   |          |     |      |      |
 742          *   +------------------------------------------------------+
 743          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 744          *   +------------------------------------------------------+
 745          *   63       48 47    32 31            20 19               0
 746          *
 747          * 82599+ Advanced Receive Descriptor (Read) Format
 748          *    63                                           1        0
 749          *    +-----------------------------------------------------+
 750          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 751          *    +----------------------------------------------+------+
 752          *  8 |       Header Buffer Address [63:1]           |  DD  |
 753          *    +-----------------------------------------------------+
 754          *
 755          *
 756          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 757          *
 758          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 759          *   +------------------------------------------------------+
 760          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 761          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 762          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 763          *   +------------------------------------------------------+
 764          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 765          *   +------------------------------------------------------+
 766          *   63       48 47    32 31          20 19                 0
 767          */
 768
 769         for (n = 0; n < adapter->num_rx_queues; n++) {
 770                 rx_ring = adapter->rx_ring[n];
 771                 pr_info("------------------------------------\n");
 772                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 773                 pr_info("------------------------------------\n");
 774                 pr_info("%s%s%s\n",
 775                         "R  [desc]      [ PktBuf     A0] ",
 776                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 777                         "<-- Adv Rx Read format");
 778                 pr_info("%s%s%s\n",
 779                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 780                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 781                         "<-- Adv Rx Write-Back format");
 782
 783                 for (i = 0; i < rx_ring->count; i++) {
 784                         const char *ring_desc;
 785
 786                         if (i == rx_ring->next_to_use)
 787                                 ring_desc = " NTU";
 788                         else if (i == rx_ring->next_to_clean)
 789                                 ring_desc = " NTC";
 790                         else
 791                                 ring_desc = "";
 792
 793                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 794                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 795                         u0 = (struct my_u0 *)rx_desc;
 796                         if (rx_desc->wb.upper.length) {
 797                                 /* Descriptor Done */
 798                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 799                                         i,
 800                                         le64_to_cpu((__force __le64)u0->a),
 801                                         le64_to_cpu((__force __le64)u0->b),
 802                                         rx_buffer_info->skb,
 803                                         ring_desc);
 804                         } else {
 805                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 806                                         i,
 807                                         le64_to_cpu((__force __le64)u0->a),
 808                                         le64_to_cpu((__force __le64)u0->b),
 809                                         (u64)rx_buffer_info->dma,
 810                                         rx_buffer_info->skb,
 811                                         ring_desc);
 812
 813                                 if (netif_msg_pktdata(adapter) &&
 814                                     rx_buffer_info->dma) {
 815                                         print_hex_dump(KERN_INFO, "",
 816                                            DUMP_PREFIX_ADDRESS, 16, 1,
 817                                            page_address(rx_buffer_info->page) +
 818                                                     rx_buffer_info->page_offset,
 819                                            ixgbe_rx_bufsz(rx_ring), true);
 820                                 }
 821                         }
 822                 }
 823         }
 824 }
 825
 826 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 827 {
 828         u32 ctrl_ext;
 829
 830         /* Let firmware take over control of h/w */
 831         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 832         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 833                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 834 }
 835
 836 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 837 {
 838         u32 ctrl_ext;
 839
 840         /* Let firmware know the driver has taken over */
 841         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 842         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 843                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 844 }
 845
 846 /**
 847  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 848  * @adapter: pointer to adapter struct
 849  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 850  * @queue: queue to map the corresponding interrupt to
 851  * @msix_vector: the vector to map to the corresponding queue
 852  *
 853  */
 854 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 855                            u8 queue, u8 msix_vector)
 856 {
 857         u32 ivar, index;
 858         struct ixgbe_hw *hw = &adapter->hw;
 859         switch (hw->mac.type) {
 860         case ixgbe_mac_82598EB:
 861                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 862                 if (direction == -1)
 863                         direction = 0;
 864                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 865                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 866                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 867                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 868                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 869                 break;
 870         case ixgbe_mac_82599EB:
 871         case ixgbe_mac_X540:
 872         case ixgbe_mac_X550:
 873         case ixgbe_mac_X550EM_x:
 874         case ixgbe_mac_x550em_a:
 875                 if (direction == -1) {
 876                         /* other causes */
 877                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 878                         index = ((queue & 1) * 8);
 879                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 880                         ivar &= ~(0xFF << index);
 881                         ivar |= (msix_vector << index);
 882                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 883                         break;
 884                 } else {
 885                         /* tx or rx causes */
 886                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 887                         index = ((16 * (queue & 1)) + (8 * direction));
 888                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 889                         ivar &= ~(0xFF << index);
 890                         ivar |= (msix_vector << index);
 891                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 892                         break;
 893                 }
 894         default:
 895                 break;
 896         }
 897 }
 898
 899 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 900                             u64 qmask)
 901 {
 902         u32 mask;
 903
 904         switch (adapter->hw.mac.type) {
 905         case ixgbe_mac_82598EB:
 906                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 907                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 908                 break;
 909         case ixgbe_mac_82599EB:
 910         case ixgbe_mac_X540:
 911         case ixgbe_mac_X550:
 912         case ixgbe_mac_X550EM_x:
 913         case ixgbe_mac_x550em_a:
 914                 mask = (qmask & 0xFFFFFFFF);
 915                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 916                 mask = (qmask >> 32);
 917                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 918                 break;
 919         default:
 920                 break;
 921         }
 922 }
 923
 924 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 925 {
 926         struct ixgbe_hw *hw = &adapter->hw;
 927         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 928         int i;
 929         u32 data;
 930
 931         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 932             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 933                 return;
 934
 935         switch (hw->mac.type) {
 936         case ixgbe_mac_82598EB:
 937                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 938                 break;
 939         default:
 940                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 941         }
 942         hwstats->lxoffrxc += data;
 943
 944         /* refill credits (no tx hang) if we received xoff */
 945         if (!data)
 946                 return;
 947
 948         for (i = 0; i < adapter->num_tx_queues; i++)
 949                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 950                           &adapter->tx_ring[i]->state);
 951
 952         for (i = 0; i < adapter->num_xdp_queues; i++)
 953                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 954                           &adapter->xdp_ring[i]->state);
 955 }
 956
 957 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 958 {
 959         struct ixgbe_hw *hw = &adapter->hw;
 960         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 961         u32 xoff[8] = {0};
 962         u8 tc;
 963         int i;
 964         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 965
 966         if (adapter->ixgbe_ieee_pfc)
 967                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 968
 969         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 970                 ixgbe_update_xoff_rx_lfc(adapter);
 971                 return;
 972         }
 973
 974         /* update stats for each tc, only valid with PFC enabled */
 975         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 976                 u32 pxoffrxc;
 977
 978                 switch (hw->mac.type) {
 979                 case ixgbe_mac_82598EB:
 980                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 981                         break;
 982                 default:
 983                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 984                 }
 985                 hwstats->pxoffrxc[i] += pxoffrxc;
 986                 /* Get the TC for given UP */
 987                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 988                 xoff[tc] += pxoffrxc;
 989         }
 990
 991         /* disarm tx queues that have received xoff frames */
 992         for (i = 0; i < adapter->num_tx_queues; i++) {
 993                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 994
 995                 tc = tx_ring->dcb_tc;
 996                 if (xoff[tc])
 997                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 998         }
 999
1000         for (i = 0; i < adapter->num_xdp_queues; i++) {
1001                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1002
1003                 tc = xdp_ring->dcb_tc;
1004                 if (xoff[tc])
1005                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1006         }
1007 }
1008
1009 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1010 {
1011         return ring->stats.packets;
1012 }
1013
1014 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1015 {
1016         unsigned int head, tail;
1017
1018         head = ring->next_to_clean;
1019         tail = ring->next_to_use;
1020
1021         return ((head <= tail) ? tail : tail + ring->count) - head;
1022 }
1023
1024 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1025 {
1026         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1027         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1028         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1029
1030         clear_check_for_tx_hang(tx_ring);
1031
1032         /*
1033          * Check for a hung queue, but be thorough. This verifies
1034          * that a transmit has been completed since the previous
1035          * check AND there is at least one packet pending. The
1036          * ARMED bit is set to indicate a potential hang. The
1037          * bit is cleared if a pause frame is received to remove
1038          * false hang detection due to PFC or 802.3x frames. By
1039          * requiring this to fail twice we avoid races with
1040          * pfc clearing the ARMED bit and conditions where we
1041          * run the check_tx_hang logic with a transmit completion
1042          * pending but without time to complete it yet.
1043          */
1044         if (tx_done_old == tx_done && tx_pending)
1045                 /* make sure it is true for two checks in a row */
1046                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1047                                         &tx_ring->state);
1048         /* update completed stats and continue */
1049         tx_ring->tx_stats.tx_done_old = tx_done;
1050         /* reset the countdown */
1051         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1052
1053         return false;
1054 }
1055
1056 /**
1057  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1058  * @adapter: driver private struct
1059  **/
1060 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1061 {
1062
1063         /* Do the reset outside of interrupt context */
1064         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1065                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1066                 e_warn(drv, "initiating reset due to tx timeout\n");
1067                 ixgbe_service_event_schedule(adapter);
1068         }
1069 }
1070
1071 /**
1072  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1073  * @netdev: network interface device structure
1074  * @queue_index: Tx queue to set
1075  * @maxrate: desired maximum transmit bitrate
1076  **/
1077 static int ixgbe_tx_maxrate(struct net_device *netdev,
1078                             int queue_index, u32 maxrate)
1079 {
1080         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1081         struct ixgbe_hw *hw = &adapter->hw;
1082         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1083
1084         if (!maxrate)
1085                 return 0;
1086
1087         /* Calculate the rate factor values to set */
1088         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1089         bcnrc_val /= maxrate;
1090
1091         /* clear everything but the rate factor */
1092         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1093         IXGBE_RTTBCNRC_RF_DEC_MASK;
1094
1095         /* enable the rate scheduler */
1096         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1097
1098         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1099         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1100
1101         return 0;
1102 }
1103
1104 /**
1105  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1106  * @q_vector: structure containing interrupt and ring information
1107  * @tx_ring: tx ring to clean
1108  * @napi_budget: Used to determine if we are in netpoll
1109  **/
1110 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1111                                struct ixgbe_ring *tx_ring, int napi_budget)
1112 {
1113         struct ixgbe_adapter *adapter = q_vector->adapter;
1114         struct ixgbe_tx_buffer *tx_buffer;
1115         union ixgbe_adv_tx_desc *tx_desc;
1116         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1117         unsigned int budget = q_vector->tx.work_limit;
1118         unsigned int i = tx_ring->next_to_clean;
1119
1120         if (test_bit(__IXGBE_DOWN, &adapter->state))
1121                 return true;
1122
1123         tx_buffer = &tx_ring->tx_buffer_info[i];
1124         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1125         i -= tx_ring->count;
1126
1127         do {
1128                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1129
1130                 /* if next_to_watch is not set then there is no work pending */
1131                 if (!eop_desc)
1132                         break;
1133
1134                 /* prevent any other reads prior to eop_desc */
1135                 smp_rmb();
1136
1137                 /* if DD is not set pending work has not been completed */
1138                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1139                         break;
1140
1141                 /* clear next_to_watch to prevent false hangs */
1142                 tx_buffer->next_to_watch = NULL;
1143
1144                 /* update the statistics for this packet */
1145                 total_bytes += tx_buffer->bytecount;
1146                 total_packets += tx_buffer->gso_segs;
1147                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1148                         total_ipsec++;
1149
1150                 /* free the skb */
1151                 if (ring_is_xdp(tx_ring))
1152                         xdp_return_frame(tx_buffer->xdpf);
1153                 else
1154                         napi_consume_skb(tx_buffer->skb, napi_budget);
1155
1156                 /* unmap skb header data */
1157                 dma_unmap_single(tx_ring->dev,
1158                                  dma_unmap_addr(tx_buffer, dma),
1159                                  dma_unmap_len(tx_buffer, len),
1160                                  DMA_TO_DEVICE);
1161
1162                 /* clear tx_buffer data */
1163                 dma_unmap_len_set(tx_buffer, len, 0);
1164
1165                 /* unmap remaining buffers */
1166                 while (tx_desc != eop_desc) {
1167                         tx_buffer++;
1168                         tx_desc++;
1169                         i++;
1170                         if (unlikely(!i)) {
1171                                 i -= tx_ring->count;
1172                                 tx_buffer = tx_ring->tx_buffer_info;
1173                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1174                         }
1175
1176                         /* unmap any remaining paged data */
1177                         if (dma_unmap_len(tx_buffer, len)) {
1178                                 dma_unmap_page(tx_ring->dev,
1179                                                dma_unmap_addr(tx_buffer, dma),
1180                                                dma_unmap_len(tx_buffer, len),
1181                                                DMA_TO_DEVICE);
1182                                 dma_unmap_len_set(tx_buffer, len, 0);
1183                         }
1184                 }
1185
1186                 /* move us one more past the eop_desc for start of next pkt */
1187                 tx_buffer++;
1188                 tx_desc++;
1189                 i++;
1190                 if (unlikely(!i)) {
1191                         i -= tx_ring->count;
1192                         tx_buffer = tx_ring->tx_buffer_info;
1193                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1194                 }
1195
1196                 /* issue prefetch for next Tx descriptor */
1197                 prefetch(tx_desc);
1198
1199                 /* update budget accounting */
1200                 budget--;
1201         } while (likely(budget));
1202
1203         i += tx_ring->count;
1204         tx_ring->next_to_clean = i;
1205         u64_stats_update_begin(&tx_ring->syncp);
1206         tx_ring->stats.bytes += total_bytes;
1207         tx_ring->stats.packets += total_packets;
1208         u64_stats_update_end(&tx_ring->syncp);
1209         q_vector->tx.total_bytes += total_bytes;
1210         q_vector->tx.total_packets += total_packets;
1211         adapter->tx_ipsec += total_ipsec;
1212
1213         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1214                 /* schedule immediate reset if we believe we hung */
1215                 struct ixgbe_hw *hw = &adapter->hw;
1216                 e_err(drv, "Detected Tx Unit Hang %s\n"
1217                         "  Tx Queue             <%d>\n"
1218                         "  TDH, TDT             <%x>, <%x>\n"
1219                         "  next_to_use          <%x>\n"
1220                         "  next_to_clean        <%x>\n"
1221                         "tx_buffer_info[next_to_clean]\n"
1222                         "  time_stamp           <%lx>\n"
1223                         "  jiffies              <%lx>\n",
1224                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1225                         tx_ring->queue_index,
1226                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1227                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1228                         tx_ring->next_to_use, i,
1229                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1230
1231                 if (!ring_is_xdp(tx_ring))
1232                         netif_stop_subqueue(tx_ring->netdev,
1233                                             tx_ring->queue_index);
1234
1235                 e_info(probe,
1236                        "tx hang %d detected on queue %d, resetting adapter\n",
1237                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1238
1239                 /* schedule immediate reset if we believe we hung */
1240                 ixgbe_tx_timeout_reset(adapter);
1241
1242                 /* the adapter is about to reset, no point in enabling stuff */
1243                 return true;
1244         }
1245
1246         if (ring_is_xdp(tx_ring))
1247                 return !!budget;
1248
1249         netdev_tx_completed_queue(txring_txq(tx_ring),
1250                                   total_packets, total_bytes);
1251
1252 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1253         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1254                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1255                 /* Make sure that anybody stopping the queue after this
1256                  * sees the new next_to_clean.
1257                  */
1258                 smp_mb();
1259                 if (__netif_subqueue_stopped(tx_ring->netdev,
1260                                              tx_ring->queue_index)
1261                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1262                         netif_wake_subqueue(tx_ring->netdev,
1263                                             tx_ring->queue_index);
1264                         ++tx_ring->tx_stats.restart_queue;
1265                 }
1266         }
1267
1268         return !!budget;
1269 }
1270
1271 #ifdef CONFIG_IXGBE_DCA
1272 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1273                                 struct ixgbe_ring *tx_ring,
1274                                 int cpu)
1275 {
1276         struct ixgbe_hw *hw = &adapter->hw;
1277         u32 txctrl = 0;
1278         u16 reg_offset;
1279
1280         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1281                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1282
1283         switch (hw->mac.type) {
1284         case ixgbe_mac_82598EB:
1285                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1286                 break;
1287         case ixgbe_mac_82599EB:
1288         case ixgbe_mac_X540:
1289                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1290                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1291                 break;
1292         default:
1293                 /* for unknown hardware do not write register */
1294                 return;
1295         }
1296
1297         /*
1298          * We can enable relaxed ordering for reads, but not writes when
1299          * DCA is enabled.  This is due to a known issue in some chipsets
1300          * which will cause the DCA tag to be cleared.
1301          */
1302         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1303                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1304                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1305
1306         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1307 }
1308
1309 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1310                                 struct ixgbe_ring *rx_ring,
1311                                 int cpu)
1312 {
1313         struct ixgbe_hw *hw = &adapter->hw;
1314         u32 rxctrl = 0;
1315         u8 reg_idx = rx_ring->reg_idx;
1316
1317         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1318                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1319
1320         switch (hw->mac.type) {
1321         case ixgbe_mac_82599EB:
1322         case ixgbe_mac_X540:
1323                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1324                 break;
1325         default:
1326                 break;
1327         }
1328
1329         /*
1330          * We can enable relaxed ordering for reads, but not writes when
1331          * DCA is enabled.  This is due to a known issue in some chipsets
1332          * which will cause the DCA tag to be cleared.
1333          */
1334         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1335                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1336                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1337
1338         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1339 }
1340
1341 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1342 {
1343         struct ixgbe_adapter *adapter = q_vector->adapter;
1344         struct ixgbe_ring *ring;
1345         int cpu = get_cpu();
1346
1347         if (q_vector->cpu == cpu)
1348                 goto out_no_update;
1349
1350         ixgbe_for_each_ring(ring, q_vector->tx)
1351                 ixgbe_update_tx_dca(adapter, ring, cpu);
1352
1353         ixgbe_for_each_ring(ring, q_vector->rx)
1354                 ixgbe_update_rx_dca(adapter, ring, cpu);
1355
1356         q_vector->cpu = cpu;
1357 out_no_update:
1358         put_cpu();
1359 }
1360
1361 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1362 {
1363         int i;
1364
1365         /* always use CB2 mode, difference is masked in the CB driver */
1366         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1367                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1368                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1369         else
1370                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1371                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1372
1373         for (i = 0; i < adapter->num_q_vectors; i++) {
1374                 adapter->q_vector[i]->cpu = -1;
1375                 ixgbe_update_dca(adapter->q_vector[i]);
1376         }
1377 }
1378
1379 static int __ixgbe_notify_dca(struct device *dev, void *data)
1380 {
1381         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1382         unsigned long event = *(unsigned long *)data;
1383
1384         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1385                 return 0;
1386
1387         switch (event) {
1388         case DCA_PROVIDER_ADD:
1389                 /* if we're already enabled, don't do it again */
1390                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1391                         break;
1392                 if (dca_add_requester(dev) == 0) {
1393                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1394                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1395                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1396                         break;
1397                 }
1398                 fallthrough; /* DCA is disabled. */
1399         case DCA_PROVIDER_REMOVE:
1400                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1401                         dca_remove_requester(dev);
1402                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1403                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1404                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1405                 }
1406                 break;
1407         }
1408
1409         return 0;
1410 }
1411
1412 #endif /* CONFIG_IXGBE_DCA */
1413
1414 #define IXGBE_RSS_L4_TYPES_MASK \
1415         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1416          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1417          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1418          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1419
1420 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1421                                  union ixgbe_adv_rx_desc *rx_desc,
1422                                  struct sk_buff *skb)
1423 {
1424         u16 rss_type;
1425
1426         if (!(ring->netdev->features & NETIF_F_RXHASH))
1427                 return;
1428
1429         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1430                    IXGBE_RXDADV_RSSTYPE_MASK;
1431
1432         if (!rss_type)
1433                 return;
1434
1435         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1436                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1437                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1438 }
1439
1440 #ifdef IXGBE_FCOE
1441 /**
1442  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1443  * @ring: structure containing ring specific data
1444  * @rx_desc: advanced rx descriptor
1445  *
1446  * Returns : true if it is FCoE pkt
1447  */
1448 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1449                                     union ixgbe_adv_rx_desc *rx_desc)
1450 {
1451         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1452
1453         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1454                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1455                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1456                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1457 }
1458
1459 #endif /* IXGBE_FCOE */
1460 /**
1461  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1462  * @ring: structure containing ring specific data
1463  * @rx_desc: current Rx descriptor being processed
1464  * @skb: skb currently being received and modified
1465  **/
1466 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1467                                      union ixgbe_adv_rx_desc *rx_desc,
1468                                      struct sk_buff *skb)
1469 {
1470         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1471         bool encap_pkt = false;
1472
1473         skb_checksum_none_assert(skb);
1474
1475         /* Rx csum disabled */
1476         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1477                 return;
1478
1479         /* check for VXLAN and Geneve packets */
1480         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1481                 encap_pkt = true;
1482                 skb->encapsulation = 1;
1483         }
1484
1485         /* if IP and error */
1486         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1487             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1488                 ring->rx_stats.csum_err++;
1489                 return;
1490         }
1491
1492         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1493                 return;
1494
1495         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1496                 /*
1497                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1498                  * checksum errors.
1499                  */
1500                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1501                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1502                         return;
1503
1504                 ring->rx_stats.csum_err++;
1505                 return;
1506         }
1507
1508         /* It must be a TCP or UDP packet with a valid checksum */
1509         skb->ip_summed = CHECKSUM_UNNECESSARY;
1510         if (encap_pkt) {
1511                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1512                         return;
1513
1514                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1515                         skb->ip_summed = CHECKSUM_NONE;
1516                         return;
1517                 }
1518                 /* If we checked the outer header let the stack know */
1519                 skb->csum_level = 1;
1520         }
1521 }
1522
1523 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1524 {
1525         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1526 }
1527
1528 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1529                                     struct ixgbe_rx_buffer *bi)
1530 {
1531         struct page *page = bi->page;
1532         dma_addr_t dma;
1533
1534         /* since we are recycling buffers we should seldom need to alloc */
1535         if (likely(page))
1536                 return true;
1537
1538         /* alloc new page for storage */
1539         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1540         if (unlikely(!page)) {
1541                 rx_ring->rx_stats.alloc_rx_page_failed++;
1542                 return false;
1543         }
1544
1545         /* map page for use */
1546         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1547                                  ixgbe_rx_pg_size(rx_ring),
1548                                  DMA_FROM_DEVICE,
1549                                  IXGBE_RX_DMA_ATTR);
1550
1551         /*
1552          * if mapping failed free memory back to system since
1553          * there isn't much point in holding memory we can't use
1554          */
1555         if (dma_mapping_error(rx_ring->dev, dma)) {
1556                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1557
1558                 rx_ring->rx_stats.alloc_rx_page_failed++;
1559                 return false;
1560         }
1561
1562         bi->dma = dma;
1563         bi->page = page;
1564         bi->page_offset = ixgbe_rx_offset(rx_ring);
1565         page_ref_add(page, USHRT_MAX - 1);
1566         bi->pagecnt_bias = USHRT_MAX;
1567         rx_ring->rx_stats.alloc_rx_page++;
1568
1569         return true;
1570 }
1571
1572 /**
1573  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1574  * @rx_ring: ring to place buffers on
1575  * @cleaned_count: number of buffers to replace
1576  **/
1577 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1578 {
1579         union ixgbe_adv_rx_desc *rx_desc;
1580         struct ixgbe_rx_buffer *bi;
1581         u16 i = rx_ring->next_to_use;
1582         u16 bufsz;
1583
1584         /* nothing to do */
1585         if (!cleaned_count)
1586                 return;
1587
1588         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1589         bi = &rx_ring->rx_buffer_info[i];
1590         i -= rx_ring->count;
1591
1592         bufsz = ixgbe_rx_bufsz(rx_ring);
1593
1594         do {
1595                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1596                         break;
1597
1598                 /* sync the buffer for use by the device */
1599                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1600                                                  bi->page_offset, bufsz,
1601                                                  DMA_FROM_DEVICE);
1602
1603                 /*
1604                  * Refresh the desc even if buffer_addrs didn't change
1605                  * because each write-back erases this info.
1606                  */
1607                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1608
1609                 rx_desc++;
1610                 bi++;
1611                 i++;
1612                 if (unlikely(!i)) {
1613                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1614                         bi = rx_ring->rx_buffer_info;
1615                         i -= rx_ring->count;
1616                 }
1617
1618                 /* clear the length for the next_to_use descriptor */
1619                 rx_desc->wb.upper.length = 0;
1620
1621                 cleaned_count--;
1622         } while (cleaned_count);
1623
1624         i += rx_ring->count;
1625
1626         if (rx_ring->next_to_use != i) {
1627                 rx_ring->next_to_use = i;
1628
1629                 /* update next to alloc since we have filled the ring */
1630                 rx_ring->next_to_alloc = i;
1631
1632                 /* Force memory writes to complete before letting h/w
1633                  * know there are new descriptors to fetch.  (Only
1634                  * applicable for weak-ordered memory model archs,
1635                  * such as IA-64).
1636                  */
1637                 wmb();
1638                 writel(i, rx_ring->tail);
1639         }
1640 }
1641
1642 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1643                                    struct sk_buff *skb)
1644 {
1645         u16 hdr_len = skb_headlen(skb);
1646
1647         /* set gso_size to avoid messing up TCP MSS */
1648         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1649                                                  IXGBE_CB(skb)->append_cnt);
1650         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1651 }
1652
1653 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1654                                    struct sk_buff *skb)
1655 {
1656         /* if append_cnt is 0 then frame is not RSC */
1657         if (!IXGBE_CB(skb)->append_cnt)
1658                 return;
1659
1660         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1661         rx_ring->rx_stats.rsc_flush++;
1662
1663         ixgbe_set_rsc_gso_size(rx_ring, skb);
1664
1665         /* gso_size is computed using append_cnt so always clear it last */
1666         IXGBE_CB(skb)->append_cnt = 0;
1667 }
1668
1669 /**
1670  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1671  * @rx_ring: rx descriptor ring packet is being transacted on
1672  * @rx_desc: pointer to the EOP Rx descriptor
1673  * @skb: pointer to current skb being populated
1674  *
1675  * This function checks the ring, descriptor, and packet information in
1676  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1677  * other fields within the skb.
1678  **/
1679 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1680                               union ixgbe_adv_rx_desc *rx_desc,
1681                               struct sk_buff *skb)
1682 {
1683         struct net_device *dev = rx_ring->netdev;
1684         u32 flags = rx_ring->q_vector->adapter->flags;
1685
1686         ixgbe_update_rsc_stats(rx_ring, skb);
1687
1688         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1689
1690         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1691
1692         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1693                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1694
1695         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1696             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1697                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1698                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1699         }
1700
1701         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1702                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1703
1704         /* record Rx queue, or update MACVLAN statistics */
1705         if (netif_is_ixgbe(dev))
1706                 skb_record_rx_queue(skb, rx_ring->queue_index);
1707         else
1708                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1709                                  false);
1710
1711         skb->protocol = eth_type_trans(skb, dev);
1712 }
1713
1714 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1715                   struct sk_buff *skb)
1716 {
1717         napi_gro_receive(&q_vector->napi, skb);
1718 }
1719
1720 /**
1721  * ixgbe_is_non_eop - process handling of non-EOP buffers
1722  * @rx_ring: Rx ring being processed
1723  * @rx_desc: Rx descriptor for current buffer
1724  * @skb: Current socket buffer containing buffer in progress
1725  *
1726  * This function updates next to clean.  If the buffer is an EOP buffer
1727  * this function exits returning false, otherwise it will place the
1728  * sk_buff in the next buffer to be chained and return true indicating
1729  * that this is in fact a non-EOP buffer.
1730  **/
1731 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1732                              union ixgbe_adv_rx_desc *rx_desc,
1733                              struct sk_buff *skb)
1734 {
1735         u32 ntc = rx_ring->next_to_clean + 1;
1736
1737         /* fetch, update, and store next to clean */
1738         ntc = (ntc < rx_ring->count) ? ntc : 0;
1739         rx_ring->next_to_clean = ntc;
1740
1741         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1742
1743         /* update RSC append count if present */
1744         if (ring_is_rsc_enabled(rx_ring)) {
1745                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1746                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1747
1748                 if (unlikely(rsc_enabled)) {
1749                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1750
1751                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1752                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1753
1754                         /* update ntc based on RSC value */
1755                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1756                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1757                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1758                 }
1759         }
1760
1761         /* if we are the last buffer then there is nothing else to do */
1762         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1763                 return false;
1764
1765         /* place skb in next buffer to be received */
1766         rx_ring->rx_buffer_info[ntc].skb = skb;
1767         rx_ring->rx_stats.non_eop_descs++;
1768
1769         return true;
1770 }
1771
1772 /**
1773  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1774  * @rx_ring: rx descriptor ring packet is being transacted on
1775  * @skb: pointer to current skb being adjusted
1776  *
1777  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1778  * main difference between this version and the original function is that
1779  * this function can make several assumptions about the state of things
1780  * that allow for significant optimizations versus the standard function.
1781  * As a result we can do things like drop a frag and maintain an accurate
1782  * truesize for the skb.
1783  */
1784 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1785                             struct sk_buff *skb)
1786 {
1787         skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1788         unsigned char *va;
1789         unsigned int pull_len;
1790
1791         /*
1792          * it is valid to use page_address instead of kmap since we are
1793          * working with pages allocated out of the lomem pool per
1794          * alloc_page(GFP_ATOMIC)
1795          */
1796         va = skb_frag_address(frag);
1797
1798         /*
1799          * we need the header to contain the greater of either ETH_HLEN or
1800          * 60 bytes if the skb->len is less than 60 for skb_pad.
1801          */
1802         pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE);
1803
1804         /* align pull length to size of long to optimize memcpy performance */
1805         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1806
1807         /* update all of the pointers */
1808         skb_frag_size_sub(frag, pull_len);
1809         skb_frag_off_add(frag, pull_len);
1810         skb->data_len -= pull_len;
1811         skb->tail += pull_len;
1812 }
1813
1814 /**
1815  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1816  * @rx_ring: rx descriptor ring packet is being transacted on
1817  * @skb: pointer to current skb being updated
1818  *
1819  * This function provides a basic DMA sync up for the first fragment of an
1820  * skb.  The reason for doing this is that the first fragment cannot be
1821  * unmapped until we have reached the end of packet descriptor for a buffer
1822  * chain.
1823  */
1824 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1825                                 struct sk_buff *skb)
1826 {
1827         if (ring_uses_build_skb(rx_ring)) {
1828                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1829
1830                 dma_sync_single_range_for_cpu(rx_ring->dev,
1831                                               IXGBE_CB(skb)->dma,
1832                                               offset,
1833                                               skb_headlen(skb),
1834                                               DMA_FROM_DEVICE);
1835         } else {
1836                 skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1837
1838                 dma_sync_single_range_for_cpu(rx_ring->dev,
1839                                               IXGBE_CB(skb)->dma,
1840                                               skb_frag_off(frag),
1841                                               skb_frag_size(frag),
1842                                               DMA_FROM_DEVICE);
1843         }
1844
1845         /* If the page was released, just unmap it. */
1846         if (unlikely(IXGBE_CB(skb)->page_released)) {
1847                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1848                                      ixgbe_rx_pg_size(rx_ring),
1849                                      DMA_FROM_DEVICE,
1850                                      IXGBE_RX_DMA_ATTR);
1851         }
1852 }
1853
1854 /**
1855  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1856  * @rx_ring: rx descriptor ring packet is being transacted on
1857  * @rx_desc: pointer to the EOP Rx descriptor
1858  * @skb: pointer to current skb being fixed
1859  *
1860  * Check if the skb is valid in the XDP case it will be an error pointer.
1861  * Return true in this case to abort processing and advance to next
1862  * descriptor.
1863  *
1864  * Check for corrupted packet headers caused by senders on the local L2
1865  * embedded NIC switch not setting up their Tx Descriptors right.  These
1866  * should be very rare.
1867  *
1868  * Also address the case where we are pulling data in on pages only
1869  * and as such no data is present in the skb header.
1870  *
1871  * In addition if skb is not at least 60 bytes we need to pad it so that
1872  * it is large enough to qualify as a valid Ethernet frame.
1873  *
1874  * Returns true if an error was encountered and skb was freed.
1875  **/
1876 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1877                            union ixgbe_adv_rx_desc *rx_desc,
1878                            struct sk_buff *skb)
1879 {
1880         struct net_device *netdev = rx_ring->netdev;
1881
1882         /* XDP packets use error pointer so abort at this point */
1883         if (IS_ERR(skb))
1884                 return true;
1885
1886         /* Verify netdev is present, and that packet does not have any
1887          * errors that would be unacceptable to the netdev.
1888          */
1889         if (!netdev ||
1890             (unlikely(ixgbe_test_staterr(rx_desc,
1891                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1892              !(netdev->features & NETIF_F_RXALL)))) {
1893                 dev_kfree_skb_any(skb);
1894                 return true;
1895         }
1896
1897         /* place header in linear portion of buffer */
1898         if (!skb_headlen(skb))
1899                 ixgbe_pull_tail(rx_ring, skb);
1900
1901 #ifdef IXGBE_FCOE
1902         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1903         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1904                 return false;
1905
1906 #endif
1907         /* if eth_skb_pad returns an error the skb was freed */
1908         if (eth_skb_pad(skb))
1909                 return true;
1910
1911         return false;
1912 }
1913
1914 /**
1915  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1916  * @rx_ring: rx descriptor ring to store buffers on
1917  * @old_buff: donor buffer to have page reused
1918  *
1919  * Synchronizes page for reuse by the adapter
1920  **/
1921 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1922                                 struct ixgbe_rx_buffer *old_buff)
1923 {
1924         struct ixgbe_rx_buffer *new_buff;
1925         u16 nta = rx_ring->next_to_alloc;
1926
1927         new_buff = &rx_ring->rx_buffer_info[nta];
1928
1929         /* update, and store next to alloc */
1930         nta++;
1931         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1932
1933         /* Transfer page from old buffer to new buffer.
1934          * Move each member individually to avoid possible store
1935          * forwarding stalls and unnecessary copy of skb.
1936          */
1937         new_buff->dma           = old_buff->dma;
1938         new_buff->page          = old_buff->page;
1939         new_buff->page_offset   = old_buff->page_offset;
1940         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1941 }
1942
1943 static inline bool ixgbe_page_is_reserved(struct page *page)
1944 {
1945         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1946 }
1947
1948 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1949 {
1950         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1951         struct page *page = rx_buffer->page;
1952
1953         /* avoid re-using remote pages */
1954         if (unlikely(ixgbe_page_is_reserved(page)))
1955                 return false;
1956
1957 #if (PAGE_SIZE < 8192)
1958         /* if we are only owner of page we can reuse it */
1959         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1960                 return false;
1961 #else
1962         /* The last offset is a bit aggressive in that we assume the
1963          * worst case of FCoE being enabled and using a 3K buffer.
1964          * However this should have minimal impact as the 1K extra is
1965          * still less than one buffer in size.
1966          */
1967 #define IXGBE_LAST_OFFSET \
1968         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1969         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1970                 return false;
1971 #endif
1972
1973         /* If we have drained the page fragment pool we need to update
1974          * the pagecnt_bias and page count so that we fully restock the
1975          * number of references the driver holds.
1976          */
1977         if (unlikely(pagecnt_bias == 1)) {
1978                 page_ref_add(page, USHRT_MAX - 1);
1979                 rx_buffer->pagecnt_bias = USHRT_MAX;
1980         }
1981
1982         return true;
1983 }
1984
1985 /**
1986  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1987  * @rx_ring: rx descriptor ring to transact packets on
1988  * @rx_buffer: buffer containing page to add
1989  * @skb: sk_buff to place the data into
1990  * @size: size of data in rx_buffer
1991  *
1992  * This function will add the data contained in rx_buffer->page to the skb.
1993  * This is done either through a direct copy if the data in the buffer is
1994  * less than the skb header size, otherwise it will just attach the page as
1995  * a frag to the skb.
1996  *
1997  * The function will then update the page offset if necessary and return
1998  * true if the buffer can be reused by the adapter.
1999  **/
2000 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2001                               struct ixgbe_rx_buffer *rx_buffer,
2002                               struct sk_buff *skb,
2003                               unsigned int size)
2004 {
2005 #if (PAGE_SIZE < 8192)
2006         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2007 #else
2008         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2009                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2010                                 SKB_DATA_ALIGN(size);
2011 #endif
2012         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2013                         rx_buffer->page_offset, size, truesize);
2014 #if (PAGE_SIZE < 8192)
2015         rx_buffer->page_offset ^= truesize;
2016 #else
2017         rx_buffer->page_offset += truesize;
2018 #endif
2019 }
2020
2021 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2022                                                    union ixgbe_adv_rx_desc *rx_desc,
2023                                                    struct sk_buff **skb,
2024                                                    const unsigned int size)
2025 {
2026         struct ixgbe_rx_buffer *rx_buffer;
2027
2028         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2029         prefetchw(rx_buffer->page);
2030         *skb = rx_buffer->skb;
2031
2032         /* Delay unmapping of the first packet. It carries the header
2033          * information, HW may still access the header after the writeback.
2034          * Only unmap it when EOP is reached
2035          */
2036         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2037                 if (!*skb)
2038                         goto skip_sync;
2039         } else {
2040                 if (*skb)
2041                         ixgbe_dma_sync_frag(rx_ring, *skb);
2042         }
2043
2044         /* we are reusing so sync this buffer for CPU use */
2045         dma_sync_single_range_for_cpu(rx_ring->dev,
2046                                       rx_buffer->dma,
2047                                       rx_buffer->page_offset,
2048                                       size,
2049                                       DMA_FROM_DEVICE);
2050 skip_sync:
2051         rx_buffer->pagecnt_bias--;
2052
2053         return rx_buffer;
2054 }
2055
2056 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2057                                 struct ixgbe_rx_buffer *rx_buffer,
2058                                 struct sk_buff *skb)
2059 {
2060         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2061                 /* hand second half of page back to the ring */
2062                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2063         } else {
2064                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2065                         /* the page has been released from the ring */
2066                         IXGBE_CB(skb)->page_released = true;
2067                 } else {
2068                         /* we are not reusing the buffer so unmap it */
2069                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2070                                              ixgbe_rx_pg_size(rx_ring),
2071                                              DMA_FROM_DEVICE,
2072                                              IXGBE_RX_DMA_ATTR);
2073                 }
2074                 __page_frag_cache_drain(rx_buffer->page,
2075                                         rx_buffer->pagecnt_bias);
2076         }
2077
2078         /* clear contents of rx_buffer */
2079         rx_buffer->page = NULL;
2080         rx_buffer->skb = NULL;
2081 }
2082
2083 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2084                                            struct ixgbe_rx_buffer *rx_buffer,
2085                                            struct xdp_buff *xdp,
2086                                            union ixgbe_adv_rx_desc *rx_desc)
2087 {
2088         unsigned int size = xdp->data_end - xdp->data;
2089 #if (PAGE_SIZE < 8192)
2090         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2091 #else
2092         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2093                                                xdp->data_hard_start);
2094 #endif
2095         struct sk_buff *skb;
2096
2097         /* prefetch first cache line of first page */
2098         prefetch(xdp->data);
2099 #if L1_CACHE_BYTES < 128
2100         prefetch(xdp->data + L1_CACHE_BYTES);
2101 #endif
2102         /* Note, we get here by enabling legacy-rx via:
2103          *
2104          *    ethtool --set-priv-flags <dev> legacy-rx on
2105          *
2106          * In this mode, we currently get 0 extra XDP headroom as
2107          * opposed to having legacy-rx off, where we process XDP
2108          * packets going to stack via ixgbe_build_skb(). The latter
2109          * provides us currently with 192 bytes of headroom.
2110          *
2111          * For ixgbe_construct_skb() mode it means that the
2112          * xdp->data_meta will always point to xdp->data, since
2113          * the helper cannot expand the head. Should this ever
2114          * change in future for legacy-rx mode on, then lets also
2115          * add xdp->data_meta handling here.
2116          */
2117
2118         /* allocate a skb to store the frags */
2119         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2120         if (unlikely(!skb))
2121                 return NULL;
2122
2123         if (size > IXGBE_RX_HDR_SIZE) {
2124                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2125                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2126
2127                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2128                                 xdp->data - page_address(rx_buffer->page),
2129                                 size, truesize);
2130 #if (PAGE_SIZE < 8192)
2131                 rx_buffer->page_offset ^= truesize;
2132 #else
2133                 rx_buffer->page_offset += truesize;
2134 #endif
2135         } else {
2136                 memcpy(__skb_put(skb, size),
2137                        xdp->data, ALIGN(size, sizeof(long)));
2138                 rx_buffer->pagecnt_bias++;
2139         }
2140
2141         return skb;
2142 }
2143
2144 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2145                                        struct ixgbe_rx_buffer *rx_buffer,
2146                                        struct xdp_buff *xdp,
2147                                        union ixgbe_adv_rx_desc *rx_desc)
2148 {
2149         unsigned int metasize = xdp->data - xdp->data_meta;
2150 #if (PAGE_SIZE < 8192)
2151         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2152 #else
2153         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2154                                 SKB_DATA_ALIGN(xdp->data_end -
2155                                                xdp->data_hard_start);
2156 #endif
2157         struct sk_buff *skb;
2158
2159         /* Prefetch first cache line of first page. If xdp->data_meta
2160          * is unused, this points extactly as xdp->data, otherwise we
2161          * likely have a consumer accessing first few bytes of meta
2162          * data, and then actual data.
2163          */
2164         prefetch(xdp->data_meta);
2165 #if L1_CACHE_BYTES < 128
2166         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2167 #endif
2168
2169         /* build an skb to around the page buffer */
2170         skb = build_skb(xdp->data_hard_start, truesize);
2171         if (unlikely(!skb))
2172                 return NULL;
2173
2174         /* update pointers within the skb to store the data */
2175         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2176         __skb_put(skb, xdp->data_end - xdp->data);
2177         if (metasize)
2178                 skb_metadata_set(skb, metasize);
2179
2180         /* record DMA address if this is the start of a chain of buffers */
2181         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2182                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2183
2184         /* update buffer offset */
2185 #if (PAGE_SIZE < 8192)
2186         rx_buffer->page_offset ^= truesize;
2187 #else
2188         rx_buffer->page_offset += truesize;
2189 #endif
2190
2191         return skb;
2192 }
2193
2194 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2195                                      struct ixgbe_ring *rx_ring,
2196                                      struct xdp_buff *xdp)
2197 {
2198         int err, result = IXGBE_XDP_PASS;
2199         struct bpf_prog *xdp_prog;
2200         struct xdp_frame *xdpf;
2201         u32 act;
2202
2203         rcu_read_lock();
2204         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2205
2206         if (!xdp_prog)
2207                 goto xdp_out;
2208
2209         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2210
2211         act = bpf_prog_run_xdp(xdp_prog, xdp);
2212         switch (act) {
2213         case XDP_PASS:
2214                 break;
2215         case XDP_TX:
2216                 xdpf = xdp_convert_buff_to_frame(xdp);
2217                 if (unlikely(!xdpf)) {
2218                         result = IXGBE_XDP_CONSUMED;
2219                         break;
2220                 }
2221                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2222                 break;
2223         case XDP_REDIRECT:
2224                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2225                 if (!err)
2226                         result = IXGBE_XDP_REDIR;
2227                 else
2228                         result = IXGBE_XDP_CONSUMED;
2229                 break;
2230         default:
2231                 bpf_warn_invalid_xdp_action(act);
2232                 fallthrough;
2233         case XDP_ABORTED:
2234                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2235                 fallthrough; /* handle aborts by dropping packet */
2236         case XDP_DROP:
2237                 result = IXGBE_XDP_CONSUMED;
2238                 break;
2239         }
2240 xdp_out:
2241         rcu_read_unlock();
2242         return ERR_PTR(-result);
2243 }
2244
2245 static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring,
2246                                             unsigned int size)
2247 {
2248         unsigned int truesize;
2249
2250 #if (PAGE_SIZE < 8192)
2251         truesize = ixgbe_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
2252 #else
2253         truesize = ring_uses_build_skb(rx_ring) ?
2254                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) +
2255                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
2256                 SKB_DATA_ALIGN(size);
2257 #endif
2258         return truesize;
2259 }
2260
2261 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2262                                  struct ixgbe_rx_buffer *rx_buffer,
2263                                  unsigned int size)
2264 {
2265         unsigned int truesize = ixgbe_rx_frame_truesize(rx_ring, size);
2266 #if (PAGE_SIZE < 8192)
2267         rx_buffer->page_offset ^= truesize;
2268 #else
2269         rx_buffer->page_offset += truesize;
2270 #endif
2271 }
2272
2273 /**
2274  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2275  * @q_vector: structure containing interrupt and ring information
2276  * @rx_ring: rx descriptor ring to transact packets on
2277  * @budget: Total limit on number of packets to process
2278  *
2279  * This function provides a "bounce buffer" approach to Rx interrupt
2280  * processing.  The advantage to this is that on systems that have
2281  * expensive overhead for IOMMU access this provides a means of avoiding
2282  * it by maintaining the mapping of the page to the syste.
2283  *
2284  * Returns amount of work completed
2285  **/
2286 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2287                                struct ixgbe_ring *rx_ring,
2288                                const int budget)
2289 {
2290         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2291         struct ixgbe_adapter *adapter = q_vector->adapter;
2292 #ifdef IXGBE_FCOE
2293         int ddp_bytes;
2294         unsigned int mss = 0;
2295 #endif /* IXGBE_FCOE */
2296         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2297         unsigned int xdp_xmit = 0;
2298         struct xdp_buff xdp;
2299
2300         xdp.rxq = &rx_ring->xdp_rxq;
2301
2302         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
2303 #if (PAGE_SIZE < 8192)
2304         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, 0);
2305 #endif
2306
2307         while (likely(total_rx_packets < budget)) {
2308                 union ixgbe_adv_rx_desc *rx_desc;
2309                 struct ixgbe_rx_buffer *rx_buffer;
2310                 struct sk_buff *skb;
2311                 unsigned int size;
2312
2313                 /* return some buffers to hardware, one at a time is too slow */
2314                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2315                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2316                         cleaned_count = 0;
2317                 }
2318
2319                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2320                 size = le16_to_cpu(rx_desc->wb.upper.length);
2321                 if (!size)
2322                         break;
2323
2324                 /* This memory barrier is needed to keep us from reading
2325                  * any other fields out of the rx_desc until we know the
2326                  * descriptor has been written back
2327                  */
2328                 dma_rmb();
2329
2330                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2331
2332                 /* retrieve a buffer from the ring */
2333                 if (!skb) {
2334                         xdp.data = page_address(rx_buffer->page) +
2335                                    rx_buffer->page_offset;
2336                         xdp.data_meta = xdp.data;
2337                         xdp.data_hard_start = xdp.data -
2338                                               ixgbe_rx_offset(rx_ring);
2339                         xdp.data_end = xdp.data + size;
2340 #if (PAGE_SIZE > 4096)
2341                         /* At larger PAGE_SIZE, frame_sz depend on len size */
2342                         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size);
2343 #endif
2344                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2345                 }
2346
2347                 if (IS_ERR(skb)) {
2348                         unsigned int xdp_res = -PTR_ERR(skb);
2349
2350                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2351                                 xdp_xmit |= xdp_res;
2352                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2353                         } else {
2354                                 rx_buffer->pagecnt_bias++;
2355                         }
2356                         total_rx_packets++;
2357                         total_rx_bytes += size;
2358                 } else if (skb) {
2359                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2360                 } else if (ring_uses_build_skb(rx_ring)) {
2361                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2362                                               &xdp, rx_desc);
2363                 } else {
2364                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2365                                                   &xdp, rx_desc);
2366                 }
2367
2368                 /* exit if we failed to retrieve a buffer */
2369                 if (!skb) {
2370                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2371                         rx_buffer->pagecnt_bias++;
2372                         break;
2373                 }
2374
2375                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2376                 cleaned_count++;
2377
2378                 /* place incomplete frames back on ring for completion */
2379                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2380                         continue;
2381
2382                 /* verify the packet layout is correct */
2383                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2384                         continue;
2385
2386                 /* probably a little skewed due to removing CRC */
2387                 total_rx_bytes += skb->len;
2388
2389                 /* populate checksum, timestamp, VLAN, and protocol */
2390                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2391
2392 #ifdef IXGBE_FCOE
2393                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2394                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2395                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2396                         /* include DDPed FCoE data */
2397                         if (ddp_bytes > 0) {
2398                                 if (!mss) {
2399                                         mss = rx_ring->netdev->mtu -
2400                                                 sizeof(struct fcoe_hdr) -
2401                                                 sizeof(struct fc_frame_header) -
2402                                                 sizeof(struct fcoe_crc_eof);
2403                                         if (mss > 512)
2404                                                 mss &= ~511;
2405                                 }
2406                                 total_rx_bytes += ddp_bytes;
2407                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2408                                                                  mss);
2409                         }
2410                         if (!ddp_bytes) {
2411                                 dev_kfree_skb_any(skb);
2412                                 continue;
2413                         }
2414                 }
2415
2416 #endif /* IXGBE_FCOE */
2417                 ixgbe_rx_skb(q_vector, skb);
2418
2419                 /* update budget accounting */
2420                 total_rx_packets++;
2421         }
2422
2423         if (xdp_xmit & IXGBE_XDP_REDIR)
2424                 xdp_do_flush_map();
2425
2426         if (xdp_xmit & IXGBE_XDP_TX) {
2427                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2428
2429                 /* Force memory writes to complete before letting h/w
2430                  * know there are new descriptors to fetch.
2431                  */
2432                 wmb();
2433                 writel(ring->next_to_use, ring->tail);
2434         }
2435
2436         u64_stats_update_begin(&rx_ring->syncp);
2437         rx_ring->stats.packets += total_rx_packets;
2438         rx_ring->stats.bytes += total_rx_bytes;
2439         u64_stats_update_end(&rx_ring->syncp);
2440         q_vector->rx.total_packets += total_rx_packets;
2441         q_vector->rx.total_bytes += total_rx_bytes;
2442
2443         return total_rx_packets;
2444 }
2445
2446 /**
2447  * ixgbe_configure_msix - Configure MSI-X hardware
2448  * @adapter: board private structure
2449  *
2450  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2451  * interrupts.
2452  **/
2453 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2454 {
2455         struct ixgbe_q_vector *q_vector;
2456         int v_idx;
2457         u32 mask;
2458
2459         /* Populate MSIX to EITR Select */
2460         if (adapter->num_vfs > 32) {
2461                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2462                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2463         }
2464
2465         /*
2466          * Populate the IVAR table and set the ITR values to the
2467          * corresponding register.
2468          */
2469         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2470                 struct ixgbe_ring *ring;
2471                 q_vector = adapter->q_vector[v_idx];
2472
2473                 ixgbe_for_each_ring(ring, q_vector->rx)
2474                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2475
2476                 ixgbe_for_each_ring(ring, q_vector->tx)
2477                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2478
2479                 ixgbe_write_eitr(q_vector);
2480         }
2481
2482         switch (adapter->hw.mac.type) {
2483         case ixgbe_mac_82598EB:
2484                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2485                                v_idx);
2486                 break;
2487         case ixgbe_mac_82599EB:
2488         case ixgbe_mac_X540:
2489         case ixgbe_mac_X550:
2490         case ixgbe_mac_X550EM_x:
2491         case ixgbe_mac_x550em_a:
2492                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2493                 break;
2494         default:
2495                 break;
2496         }
2497         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2498
2499         /* set up to autoclear timer, and the vectors */
2500         mask = IXGBE_EIMS_ENABLE_MASK;
2501         mask &= ~(IXGBE_EIMS_OTHER |
2502                   IXGBE_EIMS_MAILBOX |
2503                   IXGBE_EIMS_LSC);
2504
2505         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2506 }
2507
2508 /**
2509  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2510  * @q_vector: structure containing interrupt and ring information
2511  * @ring_container: structure containing ring performance data
2512  *
2513  *      Stores a new ITR value based on packets and byte
2514  *      counts during the last interrupt.  The advantage of per interrupt
2515  *      computation is faster updates and more accurate ITR for the current
2516  *      traffic pattern.  Constants in this function were computed
2517  *      based on theoretical maximum wire speed and thresholds were set based
2518  *      on testing data as well as attempting to minimize response time
2519  *      while increasing bulk throughput.
2520  **/
2521 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2522                              struct ixgbe_ring_container *ring_container)
2523 {
2524         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2525                            IXGBE_ITR_ADAPTIVE_LATENCY;
2526         unsigned int avg_wire_size, packets, bytes;
2527         unsigned long next_update = jiffies;
2528
2529         /* If we don't have any rings just leave ourselves set for maximum
2530          * possible latency so we take ourselves out of the equation.
2531          */
2532         if (!ring_container->ring)
2533                 return;
2534
2535         /* If we didn't update within up to 1 - 2 jiffies we can assume
2536          * that either packets are coming in so slow there hasn't been
2537          * any work, or that there is so much work that NAPI is dealing
2538          * with interrupt moderation and we don't need to do anything.
2539          */
2540         if (time_after(next_update, ring_container->next_update))
2541                 goto clear_counts;
2542
2543         packets = ring_container->total_packets;
2544
2545         /* We have no packets to actually measure against. This means
2546          * either one of the other queues on this vector is active or
2547          * we are a Tx queue doing TSO with too high of an interrupt rate.
2548          *
2549          * When this occurs just tick up our delay by the minimum value
2550          * and hope that this extra delay will prevent us from being called
2551          * without any work on our queue.
2552          */
2553         if (!packets) {
2554                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2555                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2556                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2557                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2558                 goto clear_counts;
2559         }
2560
2561         bytes = ring_container->total_bytes;
2562
2563         /* If packets are less than 4 or bytes are less than 9000 assume
2564          * insufficient data to use bulk rate limiting approach. We are
2565          * likely latency driven.
2566          */
2567         if (packets < 4 && bytes < 9000) {
2568                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2569                 goto adjust_by_size;
2570         }
2571
2572         /* Between 4 and 48 we can assume that our current interrupt delay
2573          * is only slightly too low. As such we should increase it by a small
2574          * fixed amount.
2575          */
2576         if (packets < 48) {
2577                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2578                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2579                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2580                 goto clear_counts;
2581         }
2582
2583         /* Between 48 and 96 is our "goldilocks" zone where we are working
2584          * out "just right". Just report that our current ITR is good for us.
2585          */
2586         if (packets < 96) {
2587                 itr = q_vector->itr >> 2;
2588                 goto clear_counts;
2589         }
2590
2591         /* If packet count is 96 or greater we are likely looking at a slight
2592          * overrun of the delay we want. Try halving our delay to see if that
2593          * will cut the number of packets in half per interrupt.
2594          */
2595         if (packets < 256) {
2596                 itr = q_vector->itr >> 3;
2597                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2598                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2599                 goto clear_counts;
2600         }
2601
2602         /* The paths below assume we are dealing with a bulk ITR since number
2603          * of packets is 256 or greater. We are just going to have to compute
2604          * a value and try to bring the count under control, though for smaller
2605          * packet sizes there isn't much we can do as NAPI polling will likely
2606          * be kicking in sooner rather than later.
2607          */
2608         itr = IXGBE_ITR_ADAPTIVE_BULK;
2609
2610 adjust_by_size:
2611         /* If packet counts are 256 or greater we can assume we have a gross
2612          * overestimation of what the rate should be. Instead of trying to fine
2613          * tune it just use the formula below to try and dial in an exact value
2614          * give the current packet size of the frame.
2615          */
2616         avg_wire_size = bytes / packets;
2617
2618         /* The following is a crude approximation of:
2619          *  wmem_default / (size + overhead) = desired_pkts_per_int
2620          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2621          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2622          *
2623          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2624          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2625          * formula down to
2626          *
2627          *  (170 * (size + 24)) / (size + 640) = ITR
2628          *
2629          * We first do some math on the packet size and then finally bitshift
2630          * by 8 after rounding up. We also have to account for PCIe link speed
2631          * difference as ITR scales based on this.
2632          */
2633         if (avg_wire_size <= 60) {
2634                 /* Start at 50k ints/sec */
2635                 avg_wire_size = 5120;
2636         } else if (avg_wire_size <= 316) {
2637                 /* 50K ints/sec to 16K ints/sec */
2638                 avg_wire_size *= 40;
2639                 avg_wire_size += 2720;
2640         } else if (avg_wire_size <= 1084) {
2641                 /* 16K ints/sec to 9.2K ints/sec */
2642                 avg_wire_size *= 15;
2643                 avg_wire_size += 11452;
2644         } else if (avg_wire_size < 1968) {
2645                 /* 9.2K ints/sec to 8K ints/sec */
2646                 avg_wire_size *= 5;
2647                 avg_wire_size += 22420;
2648         } else {
2649                 /* plateau at a limit of 8K ints/sec */
2650                 avg_wire_size = 32256;
2651         }
2652
2653         /* If we are in low latency mode half our delay which doubles the rate
2654          * to somewhere between 100K to 16K ints/sec
2655          */
2656         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2657                 avg_wire_size >>= 1;
2658
2659         /* Resultant value is 256 times larger than it needs to be. This
2660          * gives us room to adjust the value as needed to either increase
2661          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2662          *
2663          * Use addition as we have already recorded the new latency flag
2664          * for the ITR value.
2665          */
2666         switch (q_vector->adapter->link_speed) {
2667         case IXGBE_LINK_SPEED_10GB_FULL:
2668         case IXGBE_LINK_SPEED_100_FULL:
2669         default:
2670                 itr += DIV_ROUND_UP(avg_wire_size,
2671                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2672                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2673                 break;
2674         case IXGBE_LINK_SPEED_2_5GB_FULL:
2675         case IXGBE_LINK_SPEED_1GB_FULL:
2676         case IXGBE_LINK_SPEED_10_FULL:
2677                 if (avg_wire_size > 8064)
2678                         avg_wire_size = 8064;
2679                 itr += DIV_ROUND_UP(avg_wire_size,
2680                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2681                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2682                 break;
2683         }
2684
2685 clear_counts:
2686         /* write back value */
2687         ring_container->itr = itr;
2688
2689         /* next update should occur within next jiffy */
2690         ring_container->next_update = next_update + 1;
2691
2692         ring_container->total_bytes = 0;
2693         ring_container->total_packets = 0;
2694 }
2695
2696 /**
2697  * ixgbe_write_eitr - write EITR register in hardware specific way
2698  * @q_vector: structure containing interrupt and ring information
2699  *
2700  * This function is made to be called by ethtool and by the driver
2701  * when it needs to update EITR registers at runtime.  Hardware
2702  * specific quirks/differences are taken care of here.
2703  */
2704 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2705 {
2706         struct ixgbe_adapter *adapter = q_vector->adapter;
2707         struct ixgbe_hw *hw = &adapter->hw;
2708         int v_idx = q_vector->v_idx;
2709         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2710
2711         switch (adapter->hw.mac.type) {
2712         case ixgbe_mac_82598EB:
2713                 /* must write high and low 16 bits to reset counter */
2714                 itr_reg |= (itr_reg << 16);
2715                 break;
2716         case ixgbe_mac_82599EB:
2717         case ixgbe_mac_X540:
2718         case ixgbe_mac_X550:
2719         case ixgbe_mac_X550EM_x:
2720         case ixgbe_mac_x550em_a:
2721                 /*
2722                  * set the WDIS bit to not clear the timer bits and cause an
2723                  * immediate assertion of the interrupt
2724                  */
2725                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2726                 break;
2727         default:
2728                 break;
2729         }
2730         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2731 }
2732
2733 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2734 {
2735         u32 new_itr;
2736
2737         ixgbe_update_itr(q_vector, &q_vector->tx);
2738         ixgbe_update_itr(q_vector, &q_vector->rx);
2739
2740         /* use the smallest value of new ITR delay calculations */
2741         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2742
2743         /* Clear latency flag if set, shift into correct position */
2744         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2745         new_itr <<= 2;
2746
2747         if (new_itr != q_vector->itr) {
2748                 /* save the algorithm value here */
2749                 q_vector->itr = new_itr;
2750
2751                 ixgbe_write_eitr(q_vector);
2752         }
2753 }
2754
2755 /**
2756  * ixgbe_check_overtemp_subtask - check for over temperature
2757  * @adapter: pointer to adapter
2758  **/
2759 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2760 {
2761         struct ixgbe_hw *hw = &adapter->hw;
2762         u32 eicr = adapter->interrupt_event;
2763         s32 rc;
2764
2765         if (test_bit(__IXGBE_DOWN, &adapter->state))
2766                 return;
2767
2768         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2769                 return;
2770
2771         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2772
2773         switch (hw->device_id) {
2774         case IXGBE_DEV_ID_82599_T3_LOM:
2775                 /*
2776                  * Since the warning interrupt is for both ports
2777                  * we don't have to check if:
2778                  *  - This interrupt wasn't for our port.
2779                  *  - We may have missed the interrupt so always have to
2780                  *    check if we  got a LSC
2781                  */
2782                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2783                     !(eicr & IXGBE_EICR_LSC))
2784                         return;
2785
2786                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2787                         u32 speed;
2788                         bool link_up = false;
2789
2790                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2791
2792                         if (link_up)
2793                                 return;
2794                 }
2795
2796                 /* Check if this is not due to overtemp */
2797                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2798                         return;
2799
2800                 break;
2801         case IXGBE_DEV_ID_X550EM_A_1G_T:
2802         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2803                 rc = hw->phy.ops.check_overtemp(hw);
2804                 if (rc != IXGBE_ERR_OVERTEMP)
2805                         return;
2806                 break;
2807         default:
2808                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2809                         return;
2810                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2811                         return;
2812                 break;
2813         }
2814         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2815
2816         adapter->interrupt_event = 0;
2817 }
2818
2819 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2820 {
2821         struct ixgbe_hw *hw = &adapter->hw;
2822
2823         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2824             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2825                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2826                 /* write to clear the interrupt */
2827                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2828         }
2829 }
2830
2831 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2832 {
2833         struct ixgbe_hw *hw = &adapter->hw;
2834
2835         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2836                 return;
2837
2838         switch (adapter->hw.mac.type) {
2839         case ixgbe_mac_82599EB:
2840                 /*
2841                  * Need to check link state so complete overtemp check
2842                  * on service task
2843                  */
2844                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2845                      (eicr & IXGBE_EICR_LSC)) &&
2846                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2847                         adapter->interrupt_event = eicr;
2848                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2849                         ixgbe_service_event_schedule(adapter);
2850                         return;
2851                 }
2852                 return;
2853         case ixgbe_mac_x550em_a:
2854                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2855                         adapter->interrupt_event = eicr;
2856                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2857                         ixgbe_service_event_schedule(adapter);
2858                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2859                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2860                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2861                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2862                 }
2863                 return;
2864         case ixgbe_mac_X550:
2865         case ixgbe_mac_X540:
2866                 if (!(eicr & IXGBE_EICR_TS))
2867                         return;
2868                 break;
2869         default:
2870                 return;
2871         }
2872
2873         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2874 }
2875
2876 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2877 {
2878         switch (hw->mac.type) {
2879         case ixgbe_mac_82598EB:
2880                 if (hw->phy.type == ixgbe_phy_nl)
2881                         return true;
2882                 return false;
2883         case ixgbe_mac_82599EB:
2884         case ixgbe_mac_X550EM_x:
2885         case ixgbe_mac_x550em_a:
2886                 switch (hw->mac.ops.get_media_type(hw)) {
2887                 case ixgbe_media_type_fiber:
2888                 case ixgbe_media_type_fiber_qsfp:
2889                         return true;
2890                 default:
2891                         return false;
2892                 }
2893         default:
2894                 return false;
2895         }
2896 }
2897
2898 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2899 {
2900         struct ixgbe_hw *hw = &adapter->hw;
2901         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2902
2903         if (!ixgbe_is_sfp(hw))
2904                 return;
2905
2906         /* Later MAC's use different SDP */
2907         if (hw->mac.type >= ixgbe_mac_X540)
2908                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2909
2910         if (eicr & eicr_mask) {
2911                 /* Clear the interrupt */
2912                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2913                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2914                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2915                         adapter->sfp_poll_time = 0;
2916                         ixgbe_service_event_schedule(adapter);
2917                 }
2918         }
2919
2920         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2921             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2922                 /* Clear the interrupt */
2923                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2924                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2925                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2926                         ixgbe_service_event_schedule(adapter);
2927                 }
2928         }
2929 }
2930
2931 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2932 {
2933         struct ixgbe_hw *hw = &adapter->hw;
2934
2935         adapter->lsc_int++;
2936         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2937         adapter->link_check_timeout = jiffies;
2938         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2939                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2940                 IXGBE_WRITE_FLUSH(hw);
2941                 ixgbe_service_event_schedule(adapter);
2942         }
2943 }
2944
2945 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2946                                            u64 qmask)
2947 {
2948         u32 mask;
2949         struct ixgbe_hw *hw = &adapter->hw;
2950
2951         switch (hw->mac.type) {
2952         case ixgbe_mac_82598EB:
2953                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2954                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2955                 break;
2956         case ixgbe_mac_82599EB:
2957         case ixgbe_mac_X540:
2958         case ixgbe_mac_X550:
2959         case ixgbe_mac_X550EM_x:
2960         case ixgbe_mac_x550em_a:
2961                 mask = (qmask & 0xFFFFFFFF);
2962                 if (mask)
2963                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2964                 mask = (qmask >> 32);
2965                 if (mask)
2966                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2967                 break;
2968         default:
2969                 break;
2970         }
2971         /* skip the flush */
2972 }
2973
2974 /**
2975  * ixgbe_irq_enable - Enable default interrupt generation settings
2976  * @adapter: board private structure
2977  * @queues: enable irqs for queues
2978  * @flush: flush register write
2979  **/
2980 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2981                                     bool flush)
2982 {
2983         struct ixgbe_hw *hw = &adapter->hw;
2984         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2985
2986         /* don't reenable LSC while waiting for link */
2987         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2988                 mask &= ~IXGBE_EIMS_LSC;
2989
2990         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2991                 switch (adapter->hw.mac.type) {
2992                 case ixgbe_mac_82599EB:
2993                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2994                         break;
2995                 case ixgbe_mac_X540:
2996                 case ixgbe_mac_X550:
2997                 case ixgbe_mac_X550EM_x:
2998                 case ixgbe_mac_x550em_a:
2999                         mask |= IXGBE_EIMS_TS;
3000                         break;
3001                 default:
3002                         break;
3003                 }
3004         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3005                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3006         switch (adapter->hw.mac.type) {
3007         case ixgbe_mac_82599EB:
3008                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3009                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3010                 fallthrough;
3011         case ixgbe_mac_X540:
3012         case ixgbe_mac_X550:
3013         case ixgbe_mac_X550EM_x:
3014         case ixgbe_mac_x550em_a:
3015                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3016                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3017                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3018                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3019                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3020                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3021                 mask |= IXGBE_EIMS_ECC;
3022                 mask |= IXGBE_EIMS_MAILBOX;
3023                 break;
3024         default:
3025                 break;
3026         }
3027
3028         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3029             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3030                 mask |= IXGBE_EIMS_FLOW_DIR;
3031
3032         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3033         if (queues)
3034                 ixgbe_irq_enable_queues(adapter, ~0);
3035         if (flush)
3036                 IXGBE_WRITE_FLUSH(&adapter->hw);
3037 }
3038
3039 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3040 {
3041         struct ixgbe_adapter *adapter = data;
3042         struct ixgbe_hw *hw = &adapter->hw;
3043         u32 eicr;
3044
3045         /*
3046          * Workaround for Silicon errata.  Use clear-by-write instead
3047          * of clear-by-read.  Reading with EICS will return the
3048          * interrupt causes without clearing, which later be done
3049          * with the write to EICR.
3050          */
3051         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3052
3053         /* The lower 16bits of the EICR register are for the queue interrupts
3054          * which should be masked here in order to not accidentally clear them if
3055          * the bits are high when ixgbe_msix_other is called. There is a race
3056          * condition otherwise which results in possible performance loss
3057          * especially if the ixgbe_msix_other interrupt is triggering
3058          * consistently (as it would when PPS is turned on for the X540 device)
3059          */
3060         eicr &= 0xFFFF0000;
3061
3062         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3063
3064         if (eicr & IXGBE_EICR_LSC)
3065                 ixgbe_check_lsc(adapter);
3066
3067         if (eicr & IXGBE_EICR_MAILBOX)
3068                 ixgbe_msg_task(adapter);
3069
3070         switch (hw->mac.type) {
3071         case ixgbe_mac_82599EB:
3072         case ixgbe_mac_X540:
3073         case ixgbe_mac_X550:
3074         case ixgbe_mac_X550EM_x:
3075         case ixgbe_mac_x550em_a:
3076                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3077                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3078                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3079                         ixgbe_service_event_schedule(adapter);
3080                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3081                                         IXGBE_EICR_GPI_SDP0_X540);
3082                 }
3083                 if (eicr & IXGBE_EICR_ECC) {
3084                         e_info(link, "Received ECC Err, initiating reset\n");
3085                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3086                         ixgbe_service_event_schedule(adapter);
3087                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3088                 }
3089                 /* Handle Flow Director Full threshold interrupt */
3090                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3091                         int reinit_count = 0;
3092                         int i;
3093                         for (i = 0; i < adapter->num_tx_queues; i++) {
3094                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3095                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3096                                                        &ring->state))
3097                                         reinit_count++;
3098                         }
3099                         if (reinit_count) {
3100                                 /* no more flow director interrupts until after init */
3101                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3102                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3103                                 ixgbe_service_event_schedule(adapter);
3104                         }
3105                 }
3106                 ixgbe_check_sfp_event(adapter, eicr);
3107                 ixgbe_check_overtemp_event(adapter, eicr);
3108                 break;
3109         default:
3110                 break;
3111         }
3112
3113         ixgbe_check_fan_failure(adapter, eicr);
3114
3115         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3116                 ixgbe_ptp_check_pps_event(adapter);
3117
3118         /* re-enable the original interrupt state, no lsc, no queues */
3119         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3120                 ixgbe_irq_enable(adapter, false, false);
3121
3122         return IRQ_HANDLED;
3123 }
3124
3125 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3126 {
3127         struct ixgbe_q_vector *q_vector = data;
3128
3129         /* EIAM disabled interrupts (on this vector) for us */
3130
3131         if (q_vector->rx.ring || q_vector->tx.ring)
3132                 napi_schedule_irqoff(&q_vector->napi);
3133
3134         return IRQ_HANDLED;
3135 }
3136
3137 /**
3138  * ixgbe_poll - NAPI Rx polling callback
3139  * @napi: structure for representing this polling device
3140  * @budget: how many packets driver is allowed to clean
3141  *
3142  * This function is used for legacy and MSI, NAPI mode
3143  **/
3144 int ixgbe_poll(struct napi_struct *napi, int budget)
3145 {
3146         struct ixgbe_q_vector *q_vector =
3147                                 container_of(napi, struct ixgbe_q_vector, napi);
3148         struct ixgbe_adapter *adapter = q_vector->adapter;
3149         struct ixgbe_ring *ring;
3150         int per_ring_budget, work_done = 0;
3151         bool clean_complete = true;
3152
3153 #ifdef CONFIG_IXGBE_DCA
3154         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3155                 ixgbe_update_dca(q_vector);
3156 #endif
3157
3158         ixgbe_for_each_ring(ring, q_vector->tx) {
3159                 bool wd = ring->xsk_umem ?
3160                           ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3161                           ixgbe_clean_tx_irq(q_vector, ring, budget);
3162
3163                 if (!wd)
3164                         clean_complete = false;
3165         }
3166
3167         /* Exit if we are called by netpoll */
3168         if (budget <= 0)
3169                 return budget;
3170
3171         /* attempt to distribute budget to each queue fairly, but don't allow
3172          * the budget to go below 1 because we'll exit polling */
3173         if (q_vector->rx.count > 1)
3174                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3175         else
3176                 per_ring_budget = budget;
3177
3178         ixgbe_for_each_ring(ring, q_vector->rx) {
3179                 int cleaned = ring->xsk_umem ?
3180                               ixgbe_clean_rx_irq_zc(q_vector, ring,
3181                                                     per_ring_budget) :
3182                               ixgbe_clean_rx_irq(q_vector, ring,
3183                                                  per_ring_budget);
3184
3185                 work_done += cleaned;
3186                 if (cleaned >= per_ring_budget)
3187                         clean_complete = false;
3188         }
3189
3190         /* If all work not completed, return budget and keep polling */
3191         if (!clean_complete)
3192                 return budget;
3193
3194         /* all work done, exit the polling mode */
3195         if (likely(napi_complete_done(napi, work_done))) {
3196                 if (adapter->rx_itr_setting & 1)
3197                         ixgbe_set_itr(q_vector);
3198                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3199                         ixgbe_irq_enable_queues(adapter,
3200                                                 BIT_ULL(q_vector->v_idx));
3201         }
3202
3203         return min(work_done, budget - 1);
3204 }
3205
3206 /**
3207  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3208  * @adapter: board private structure
3209  *
3210  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3211  * interrupts from the kernel.
3212  **/
3213 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3214 {
3215         struct net_device *netdev = adapter->netdev;
3216         unsigned int ri = 0, ti = 0;
3217         int vector, err;
3218
3219         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3220                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3221                 struct msix_entry *entry = &adapter->msix_entries[vector];
3222
3223                 if (q_vector->tx.ring && q_vector->rx.ring) {
3224                         snprintf(q_vector->name, sizeof(q_vector->name),
3225                                  "%s-TxRx-%u", netdev->name, ri++);
3226                         ti++;
3227                 } else if (q_vector->rx.ring) {
3228                         snprintf(q_vector->name, sizeof(q_vector->name),
3229                                  "%s-rx-%u", netdev->name, ri++);
3230                 } else if (q_vector->tx.ring) {
3231                         snprintf(q_vector->name, sizeof(q_vector->name),
3232                                  "%s-tx-%u", netdev->name, ti++);
3233                 } else {
3234                         /* skip this unused q_vector */
3235                         continue;
3236                 }
3237                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3238                                   q_vector->name, q_vector);
3239                 if (err) {
3240                         e_err(probe, "request_irq failed for MSIX interrupt "
3241                               "Error: %d\n", err);
3242                         goto free_queue_irqs;
3243                 }
3244                 /* If Flow Director is enabled, set interrupt affinity */
3245                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3246                         /* assign the mask for this irq */
3247                         irq_set_affinity_hint(entry->vector,
3248                                               &q_vector->affinity_mask);
3249                 }
3250         }
3251
3252         err = request_irq(adapter->msix_entries[vector].vector,
3253                           ixgbe_msix_other, 0, netdev->name, adapter);
3254         if (err) {
3255                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3256                 goto free_queue_irqs;
3257         }
3258
3259         return 0;
3260
3261 free_queue_irqs:
3262         while (vector) {
3263                 vector--;
3264                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3265                                       NULL);
3266                 free_irq(adapter->msix_entries[vector].vector,
3267                          adapter->q_vector[vector]);
3268         }
3269         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3270         pci_disable_msix(adapter->pdev);
3271         kfree(adapter->msix_entries);
3272         adapter->msix_entries = NULL;
3273         return err;
3274 }
3275
3276 /**
3277  * ixgbe_intr - legacy mode Interrupt Handler
3278  * @irq: interrupt number
3279  * @data: pointer to a network interface device structure
3280  **/
3281 static irqreturn_t ixgbe_intr(int irq, void *data)
3282 {
3283         struct ixgbe_adapter *adapter = data;
3284         struct ixgbe_hw *hw = &adapter->hw;
3285         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3286         u32 eicr;
3287
3288         /*
3289          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3290          * before the read of EICR.
3291          */
3292         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3293
3294         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3295          * therefore no explicit interrupt disable is necessary */
3296         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3297         if (!eicr) {
3298                 /*
3299                  * shared interrupt alert!
3300                  * make sure interrupts are enabled because the read will
3301                  * have disabled interrupts due to EIAM
3302                  * finish the workaround of silicon errata on 82598.  Unmask
3303                  * the interrupt that we masked before the EICR read.
3304                  */
3305                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3306                         ixgbe_irq_enable(adapter, true, true);
3307                 return IRQ_NONE;        /* Not our interrupt */
3308         }
3309
3310         if (eicr & IXGBE_EICR_LSC)
3311                 ixgbe_check_lsc(adapter);
3312
3313         switch (hw->mac.type) {
3314         case ixgbe_mac_82599EB:
3315                 ixgbe_check_sfp_event(adapter, eicr);
3316                 fallthrough;
3317         case ixgbe_mac_X540:
3318         case ixgbe_mac_X550:
3319         case ixgbe_mac_X550EM_x:
3320         case ixgbe_mac_x550em_a:
3321                 if (eicr & IXGBE_EICR_ECC) {
3322                         e_info(link, "Received ECC Err, initiating reset\n");
3323                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3324                         ixgbe_service_event_schedule(adapter);
3325                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3326                 }
3327                 ixgbe_check_overtemp_event(adapter, eicr);
3328                 break;
3329         default:
3330                 break;
3331         }
3332
3333         ixgbe_check_fan_failure(adapter, eicr);
3334         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3335                 ixgbe_ptp_check_pps_event(adapter);
3336
3337         /* would disable interrupts here but EIAM disabled it */
3338         napi_schedule_irqoff(&q_vector->napi);
3339
3340         /*
3341          * re-enable link(maybe) and non-queue interrupts, no flush.
3342          * ixgbe_poll will re-enable the queue interrupts
3343          */
3344         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3345                 ixgbe_irq_enable(adapter, false, false);
3346
3347         return IRQ_HANDLED;
3348 }
3349
3350 /**
3351  * ixgbe_request_irq - initialize interrupts
3352  * @adapter: board private structure
3353  *
3354  * Attempts to configure interrupts using the best available
3355  * capabilities of the hardware and kernel.
3356  **/
3357 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3358 {
3359         struct net_device *netdev = adapter->netdev;
3360         int err;
3361
3362         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3363                 err = ixgbe_request_msix_irqs(adapter);
3364         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3365                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3366                                   netdev->name, adapter);
3367         else
3368                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3369                                   netdev->name, adapter);
3370
3371         if (err)
3372                 e_err(probe, "request_irq failed, Error %d\n", err);
3373
3374         return err;
3375 }
3376
3377 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3378 {
3379         int vector;
3380
3381         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3382                 free_irq(adapter->pdev->irq, adapter);
3383                 return;
3384         }
3385
3386         if (!adapter->msix_entries)
3387                 return;
3388
3389         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3390                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3391                 struct msix_entry *entry = &adapter->msix_entries[vector];
3392
3393                 /* free only the irqs that were actually requested */
3394                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3395                         continue;
3396
3397                 /* clear the affinity_mask in the IRQ descriptor */
3398                 irq_set_affinity_hint(entry->vector, NULL);
3399
3400                 free_irq(entry->vector, q_vector);
3401         }
3402
3403         free_irq(adapter->msix_entries[vector].vector, adapter);
3404 }
3405
3406 /**
3407  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3408  * @adapter: board private structure
3409  **/
3410 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3411 {
3412         switch (adapter->hw.mac.type) {
3413         case ixgbe_mac_82598EB:
3414                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3415                 break;
3416         case ixgbe_mac_82599EB:
3417         case ixgbe_mac_X540:
3418         case ixgbe_mac_X550:
3419         case ixgbe_mac_X550EM_x:
3420         case ixgbe_mac_x550em_a:
3421                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3422                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3423                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3424                 break;
3425         default:
3426                 break;
3427         }
3428         IXGBE_WRITE_FLUSH(&adapter->hw);
3429         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3430                 int vector;
3431
3432                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3433                         synchronize_irq(adapter->msix_entries[vector].vector);
3434
3435                 synchronize_irq(adapter->msix_entries[vector++].vector);
3436         } else {
3437                 synchronize_irq(adapter->pdev->irq);
3438         }
3439 }
3440
3441 /**
3442  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3443  * @adapter: board private structure
3444  *
3445  **/
3446 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3447 {
3448         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3449
3450         ixgbe_write_eitr(q_vector);
3451
3452         ixgbe_set_ivar(adapter, 0, 0, 0);
3453         ixgbe_set_ivar(adapter, 1, 0, 0);
3454
3455         e_info(hw, "Legacy interrupt IVAR setup done\n");
3456 }
3457
3458 /**
3459  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3460  * @adapter: board private structure
3461  * @ring: structure containing ring specific data
3462  *
3463  * Configure the Tx descriptor ring after a reset.
3464  **/
3465 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3466                              struct ixgbe_ring *ring)
3467 {
3468         struct ixgbe_hw *hw = &adapter->hw;
3469         u64 tdba = ring->dma;
3470         int wait_loop = 10;
3471         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3472         u8 reg_idx = ring->reg_idx;
3473
3474         ring->xsk_umem = NULL;
3475         if (ring_is_xdp(ring))
3476                 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
3477
3478         /* disable queue to avoid issues while updating state */
3479         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3480         IXGBE_WRITE_FLUSH(hw);
3481
3482         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3483                         (tdba & DMA_BIT_MASK(32)));
3484         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3485         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3486                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3487         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3488         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3489         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3490
3491         /*
3492          * set WTHRESH to encourage burst writeback, it should not be set
3493          * higher than 1 when:
3494          * - ITR is 0 as it could cause false TX hangs
3495          * - ITR is set to > 100k int/sec and BQL is enabled
3496          *
3497          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3498          * to or less than the number of on chip descriptors, which is
3499          * currently 40.
3500          */
3501         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3502                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3503         else
3504                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3505
3506         /*
3507          * Setting PTHRESH to 32 both improves performance
3508          * and avoids a TX hang with DFP enabled
3509          */
3510         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3511                    32;          /* PTHRESH = 32 */
3512
3513         /* reinitialize flowdirector state */
3514         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3515                 ring->atr_sample_rate = adapter->atr_sample_rate;
3516                 ring->atr_count = 0;
3517                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3518         } else {
3519                 ring->atr_sample_rate = 0;
3520         }
3521
3522         /* initialize XPS */
3523         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3524                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3525
3526                 if (q_vector)
3527                         netif_set_xps_queue(ring->netdev,
3528                                             &q_vector->affinity_mask,
3529                                             ring->queue_index);
3530         }
3531
3532         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3533
3534         /* reinitialize tx_buffer_info */
3535         memset(ring->tx_buffer_info, 0,
3536                sizeof(struct ixgbe_tx_buffer) * ring->count);
3537
3538         /* enable queue */
3539         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3540
3541         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3542         if (hw->mac.type == ixgbe_mac_82598EB &&
3543             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3544                 return;
3545
3546         /* poll to verify queue is enabled */
3547         do {
3548                 usleep_range(1000, 2000);
3549                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3550         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3551         if (!wait_loop)
3552                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3553 }
3554
3555 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3556 {
3557         struct ixgbe_hw *hw = &adapter->hw;
3558         u32 rttdcs, mtqc;
3559         u8 tcs = adapter->hw_tcs;
3560
3561         if (hw->mac.type == ixgbe_mac_82598EB)
3562                 return;
3563
3564         /* disable the arbiter while setting MTQC */
3565         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3566         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3567         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3568
3569         /* set transmit pool layout */
3570         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3571                 mtqc = IXGBE_MTQC_VT_ENA;
3572                 if (tcs > 4)
3573                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3574                 else if (tcs > 1)
3575                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3576                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3577                          IXGBE_82599_VMDQ_4Q_MASK)
3578                         mtqc |= IXGBE_MTQC_32VF;
3579                 else
3580                         mtqc |= IXGBE_MTQC_64VF;
3581         } else {
3582                 if (tcs > 4) {
3583                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3584                 } else if (tcs > 1) {
3585                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3586                 } else {
3587                         u8 max_txq = adapter->num_tx_queues +
3588                                 adapter->num_xdp_queues;
3589                         if (max_txq > 63)
3590                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3591                         else
3592                                 mtqc = IXGBE_MTQC_64Q_1PB;
3593                 }
3594         }
3595
3596         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3597
3598         /* Enable Security TX Buffer IFG for multiple pb */
3599         if (tcs) {
3600                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3601                 sectx |= IXGBE_SECTX_DCB;
3602                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3603         }
3604
3605         /* re-enable the arbiter */
3606         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3607         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3608 }
3609
3610 /**
3611  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3612  * @adapter: board private structure
3613  *
3614  * Configure the Tx unit of the MAC after a reset.
3615  **/
3616 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3617 {
3618         struct ixgbe_hw *hw = &adapter->hw;
3619         u32 dmatxctl;
3620         u32 i;
3621
3622         ixgbe_setup_mtqc(adapter);
3623
3624         if (hw->mac.type != ixgbe_mac_82598EB) {
3625                 /* DMATXCTL.EN must be before Tx queues are enabled */
3626                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3627                 dmatxctl |= IXGBE_DMATXCTL_TE;
3628                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3629         }
3630
3631         /* Setup the HW Tx Head and Tail descriptor pointers */
3632         for (i = 0; i < adapter->num_tx_queues; i++)
3633                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3634         for (i = 0; i < adapter->num_xdp_queues; i++)
3635                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3636 }
3637
3638 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3639                                  struct ixgbe_ring *ring)
3640 {
3641         struct ixgbe_hw *hw = &adapter->hw;
3642         u8 reg_idx = ring->reg_idx;
3643         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3644
3645         srrctl |= IXGBE_SRRCTL_DROP_EN;
3646
3647         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3648 }
3649
3650 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3651                                   struct ixgbe_ring *ring)
3652 {
3653         struct ixgbe_hw *hw = &adapter->hw;
3654         u8 reg_idx = ring->reg_idx;
3655         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3656
3657         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3658
3659         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3660 }
3661
3662 #ifdef CONFIG_IXGBE_DCB
3663 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3664 #else
3665 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3666 #endif
3667 {
3668         int i;
3669         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3670
3671         if (adapter->ixgbe_ieee_pfc)
3672                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3673
3674         /*
3675          * We should set the drop enable bit if:
3676          *  SR-IOV is enabled
3677          *   or
3678          *  Number of Rx queues > 1 and flow control is disabled
3679          *
3680          *  This allows us to avoid head of line blocking for security
3681          *  and performance reasons.
3682          */
3683         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3684             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3685                 for (i = 0; i < adapter->num_rx_queues; i++)
3686                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3687         } else {
3688                 for (i = 0; i < adapter->num_rx_queues; i++)
3689                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3690         }
3691 }
3692
3693 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3694
3695 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3696                                    struct ixgbe_ring *rx_ring)
3697 {
3698         struct ixgbe_hw *hw = &adapter->hw;
3699         u32 srrctl;
3700         u8 reg_idx = rx_ring->reg_idx;
3701
3702         if (hw->mac.type == ixgbe_mac_82598EB) {
3703                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3704
3705                 /*
3706                  * if VMDq is not active we must program one srrctl register
3707                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3708                  */
3709                 reg_idx &= mask;
3710         }
3711
3712         /* configure header buffer length, needed for RSC */
3713         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3714
3715         /* configure the packet buffer length */
3716         if (rx_ring->xsk_umem) {
3717                 u32 xsk_buf_len = xsk_umem_get_rx_frame_size(rx_ring->xsk_umem);
3718
3719                 /* If the MAC support setting RXDCTL.RLPML, the
3720                  * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3721                  * RXDCTL.RLPML is set to the actual UMEM buffer
3722                  * size. If not, then we are stuck with a 1k buffer
3723                  * size resolution. In this case frames larger than
3724                  * the UMEM buffer size viewed in a 1k resolution will
3725                  * be dropped.
3726                  */
3727                 if (hw->mac.type != ixgbe_mac_82599EB)
3728                         srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3729                 else
3730                         srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3731         } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3732                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3733         } else {
3734                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3735         }
3736
3737         /* configure descriptor type */
3738         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3739
3740         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3741 }
3742
3743 /**
3744  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3745  * @adapter: device handle
3746  *
3747  *  - 82598/82599/X540:     128
3748  *  - X550(non-SRIOV mode): 512
3749  *  - X550(SRIOV mode):     64
3750  */
3751 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3752 {
3753         if (adapter->hw.mac.type < ixgbe_mac_X550)
3754                 return 128;
3755         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3756                 return 64;
3757         else
3758                 return 512;
3759 }
3760
3761 /**
3762  * ixgbe_store_key - Write the RSS key to HW
3763  * @adapter: device handle
3764  *
3765  * Write the RSS key stored in adapter.rss_key to HW.
3766  */
3767 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3768 {
3769         struct ixgbe_hw *hw = &adapter->hw;
3770         int i;
3771
3772         for (i = 0; i < 10; i++)
3773                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3774 }
3775
3776 /**
3777  * ixgbe_init_rss_key - Initialize adapter RSS key
3778  * @adapter: device handle
3779  *
3780  * Allocates and initializes the RSS key if it is not allocated.
3781  **/
3782 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3783 {
3784         u32 *rss_key;
3785
3786         if (!adapter->rss_key) {
3787                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3788                 if (unlikely(!rss_key))
3789                         return -ENOMEM;
3790
3791                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3792                 adapter->rss_key = rss_key;
3793         }
3794
3795         return 0;
3796 }
3797
3798 /**
3799  * ixgbe_store_reta - Write the RETA table to HW
3800  * @adapter: device handle
3801  *
3802  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3803  */
3804 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3805 {
3806         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3807         struct ixgbe_hw *hw = &adapter->hw;
3808         u32 reta = 0;
3809         u32 indices_multi;
3810         u8 *indir_tbl = adapter->rss_indir_tbl;
3811
3812         /* Fill out the redirection table as follows:
3813          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3814          *    indices.
3815          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3816          *  - X550:       8 bit wide entries containing 6 bit RSS index
3817          */
3818         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3819                 indices_multi = 0x11;
3820         else
3821                 indices_multi = 0x1;
3822
3823         /* Write redirection table to HW */
3824         for (i = 0; i < reta_entries; i++) {
3825                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3826                 if ((i & 3) == 3) {
3827                         if (i < 128)
3828                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3829                         else
3830                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3831                                                 reta);
3832                         reta = 0;
3833                 }
3834         }
3835 }
3836
3837 /**
3838  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3839  * @adapter: device handle
3840  *
3841  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3842  */
3843 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3844 {
3845         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3846         struct ixgbe_hw *hw = &adapter->hw;
3847         u32 vfreta = 0;
3848
3849         /* Write redirection table to HW */
3850         for (i = 0; i < reta_entries; i++) {
3851                 u16 pool = adapter->num_rx_pools;
3852
3853                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3854                 if ((i & 3) != 3)
3855                         continue;
3856
3857                 while (pool--)
3858                         IXGBE_WRITE_REG(hw,
3859                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3860                                         vfreta);
3861                 vfreta = 0;
3862         }
3863 }
3864
3865 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3866 {
3867         u32 i, j;
3868         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3869         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3870
3871         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3872          * make full use of any rings they may have.  We will use the
3873          * PSRTYPE register to control how many rings we use within the PF.
3874          */
3875         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3876                 rss_i = 4;
3877
3878         /* Fill out hash function seeds */
3879         ixgbe_store_key(adapter);
3880
3881         /* Fill out redirection table */
3882         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3883
3884         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3885                 if (j == rss_i)
3886                         j = 0;
3887
3888                 adapter->rss_indir_tbl[i] = j;
3889         }
3890
3891         ixgbe_store_reta(adapter);
3892 }
3893
3894 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3895 {
3896         struct ixgbe_hw *hw = &adapter->hw;
3897         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3898         int i, j;
3899
3900         /* Fill out hash function seeds */
3901         for (i = 0; i < 10; i++) {
3902                 u16 pool = adapter->num_rx_pools;
3903
3904                 while (pool--)
3905                         IXGBE_WRITE_REG(hw,
3906                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3907                                         *(adapter->rss_key + i));
3908         }
3909
3910         /* Fill out the redirection table */
3911         for (i = 0, j = 0; i < 64; i++, j++) {
3912                 if (j == rss_i)
3913                         j = 0;
3914
3915                 adapter->rss_indir_tbl[i] = j;
3916         }
3917
3918         ixgbe_store_vfreta(adapter);
3919 }
3920
3921 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3922 {
3923         struct ixgbe_hw *hw = &adapter->hw;
3924         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3925         u32 rxcsum;
3926
3927         /* Disable indicating checksum in descriptor, enables RSS hash */
3928         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3929         rxcsum |= IXGBE_RXCSUM_PCSD;
3930         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3931
3932         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3933                 if (adapter->ring_feature[RING_F_RSS].mask)
3934                         mrqc = IXGBE_MRQC_RSSEN;
3935         } else {
3936                 u8 tcs = adapter->hw_tcs;
3937
3938                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3939                         if (tcs > 4)
3940                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3941                         else if (tcs > 1)
3942                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3943                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3944                                  IXGBE_82599_VMDQ_4Q_MASK)
3945                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3946                         else
3947                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3948
3949                         /* Enable L3/L4 for Tx Switched packets only for X550,
3950                          * older devices do not support this feature
3951                          */
3952                         if (hw->mac.type >= ixgbe_mac_X550)
3953                                 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3954                 } else {
3955                         if (tcs > 4)
3956                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3957                         else if (tcs > 1)
3958                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3959                         else
3960                                 mrqc = IXGBE_MRQC_RSSEN;
3961                 }
3962         }
3963
3964         /* Perform hash on these packet types */
3965         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3966                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3967                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3968                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3969
3970         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3971                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3972         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3973                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3974
3975         if ((hw->mac.type >= ixgbe_mac_X550) &&
3976             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3977                 u16 pool = adapter->num_rx_pools;
3978
3979                 /* Enable VF RSS mode */
3980                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3981                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3982
3983                 /* Setup RSS through the VF registers */
3984                 ixgbe_setup_vfreta(adapter);
3985                 vfmrqc = IXGBE_MRQC_RSSEN;
3986                 vfmrqc |= rss_field;
3987
3988                 while (pool--)
3989                         IXGBE_WRITE_REG(hw,
3990                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3991                                         vfmrqc);
3992         } else {
3993                 ixgbe_setup_reta(adapter);
3994                 mrqc |= rss_field;
3995                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3996         }
3997 }
3998
3999 /**
4000  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4001  * @adapter: address of board private structure
4002  * @ring: structure containing ring specific data
4003  **/
4004 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4005                                    struct ixgbe_ring *ring)
4006 {
4007         struct ixgbe_hw *hw = &adapter->hw;
4008         u32 rscctrl;
4009         u8 reg_idx = ring->reg_idx;
4010
4011         if (!ring_is_rsc_enabled(ring))
4012                 return;
4013
4014         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4015         rscctrl |= IXGBE_RSCCTL_RSCEN;
4016         /*
4017          * we must limit the number of descriptors so that the
4018          * total size of max desc * buf_len is not greater
4019          * than 65536
4020          */
4021         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4022         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4023 }
4024
4025 #define IXGBE_MAX_RX_DESC_POLL 10
4026 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4027                                        struct ixgbe_ring *ring)
4028 {
4029         struct ixgbe_hw *hw = &adapter->hw;
4030         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4031         u32 rxdctl;
4032         u8 reg_idx = ring->reg_idx;
4033
4034         if (ixgbe_removed(hw->hw_addr))
4035                 return;
4036         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4037         if (hw->mac.type == ixgbe_mac_82598EB &&
4038             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4039                 return;
4040
4041         do {
4042                 usleep_range(1000, 2000);
4043                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4044         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4045
4046         if (!wait_loop) {
4047                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4048                       "the polling period\n", reg_idx);
4049         }
4050 }
4051
4052 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4053                              struct ixgbe_ring *ring)
4054 {
4055         struct ixgbe_hw *hw = &adapter->hw;
4056         union ixgbe_adv_rx_desc *rx_desc;
4057         u64 rdba = ring->dma;
4058         u32 rxdctl;
4059         u8 reg_idx = ring->reg_idx;
4060
4061         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4062         ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
4063         if (ring->xsk_umem) {
4064                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4065                                                    MEM_TYPE_XSK_BUFF_POOL,
4066                                                    NULL));
4067                 xsk_buff_set_rxq_info(ring->xsk_umem, &ring->xdp_rxq);
4068         } else {
4069                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4070                                                    MEM_TYPE_PAGE_SHARED, NULL));
4071         }
4072
4073         /* disable queue to avoid use of these values while updating state */
4074         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4075         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4076
4077         /* write value back with RXDCTL.ENABLE bit cleared */
4078         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4079         IXGBE_WRITE_FLUSH(hw);
4080
4081         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4082         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4083         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4084                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4085         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4086         IXGBE_WRITE_FLUSH(hw);
4087
4088         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4089         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4090         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4091
4092         ixgbe_configure_srrctl(adapter, ring);
4093         ixgbe_configure_rscctl(adapter, ring);
4094
4095         if (hw->mac.type == ixgbe_mac_82598EB) {
4096                 /*
4097                  * enable cache line friendly hardware writes:
4098                  * PTHRESH=32 descriptors (half the internal cache),
4099                  * this also removes ugly rx_no_buffer_count increment
4100                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4101                  * WTHRESH=8 burst writeback up to two cache lines
4102                  */
4103                 rxdctl &= ~0x3FFFFF;
4104                 rxdctl |=  0x080420;
4105 #if (PAGE_SIZE < 8192)
4106         /* RXDCTL.RLPML does not work on 82599 */
4107         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4108                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4109                             IXGBE_RXDCTL_RLPML_EN);
4110
4111                 /* Limit the maximum frame size so we don't overrun the skb.
4112                  * This can happen in SRIOV mode when the MTU of the VF is
4113                  * higher than the MTU of the PF.
4114                  */
4115                 if (ring_uses_build_skb(ring) &&
4116                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4117                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4118                                   IXGBE_RXDCTL_RLPML_EN;
4119 #endif
4120         }
4121
4122         if (ring->xsk_umem && hw->mac.type != ixgbe_mac_82599EB) {
4123                 u32 xsk_buf_len = xsk_umem_get_rx_frame_size(ring->xsk_umem);
4124
4125                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4126                             IXGBE_RXDCTL_RLPML_EN);
4127                 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4128
4129                 ring->rx_buf_len = xsk_buf_len;
4130         }
4131
4132         /* initialize rx_buffer_info */
4133         memset(ring->rx_buffer_info, 0,
4134                sizeof(struct ixgbe_rx_buffer) * ring->count);
4135
4136         /* initialize Rx descriptor 0 */
4137         rx_desc = IXGBE_RX_DESC(ring, 0);
4138         rx_desc->wb.upper.length = 0;
4139
4140         /* enable receive descriptor ring */
4141         rxdctl |= IXGBE_RXDCTL_ENABLE;
4142         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4143
4144         ixgbe_rx_desc_queue_enable(adapter, ring);
4145         if (ring->xsk_umem)
4146                 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4147         else
4148                 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4149 }
4150
4151 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4152 {
4153         struct ixgbe_hw *hw = &adapter->hw;
4154         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4155         u16 pool = adapter->num_rx_pools;
4156
4157         /* PSRTYPE must be initialized in non 82598 adapters */
4158         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4159                       IXGBE_PSRTYPE_UDPHDR |
4160                       IXGBE_PSRTYPE_IPV4HDR |
4161                       IXGBE_PSRTYPE_L2HDR |
4162                       IXGBE_PSRTYPE_IPV6HDR;
4163
4164         if (hw->mac.type == ixgbe_mac_82598EB)
4165                 return;
4166
4167         if (rss_i > 3)
4168                 psrtype |= 2u << 29;
4169         else if (rss_i > 1)
4170                 psrtype |= 1u << 29;
4171
4172         while (pool--)
4173                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4174 }
4175
4176 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4177 {
4178         struct ixgbe_hw *hw = &adapter->hw;
4179         u16 pool = adapter->num_rx_pools;
4180         u32 reg_offset, vf_shift, vmolr;
4181         u32 gcr_ext, vmdctl;
4182         int i;
4183
4184         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4185                 return;
4186
4187         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4188         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4189         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4190         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4191         vmdctl |= IXGBE_VT_CTL_REPLEN;
4192         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4193
4194         /* accept untagged packets until a vlan tag is
4195          * specifically set for the VMDQ queue/pool
4196          */
4197         vmolr = IXGBE_VMOLR_AUPE;
4198         while (pool--)
4199                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4200
4201         vf_shift = VMDQ_P(0) % 32;
4202         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4203
4204         /* Enable only the PF's pool for Tx/Rx */
4205         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4206         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4207         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4208         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4209         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4210                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4211
4212         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4213         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4214
4215         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4216         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4217
4218         /*
4219          * Set up VF register offsets for selected VT Mode,
4220          * i.e. 32 or 64 VFs for SR-IOV
4221          */
4222         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4223         case IXGBE_82599_VMDQ_8Q_MASK:
4224                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4225                 break;
4226         case IXGBE_82599_VMDQ_4Q_MASK:
4227                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4228                 break;
4229         default:
4230                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4231                 break;
4232         }
4233
4234         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4235
4236         for (i = 0; i < adapter->num_vfs; i++) {
4237                 /* configure spoof checking */
4238                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4239                                           adapter->vfinfo[i].spoofchk_enabled);
4240
4241                 /* Enable/Disable RSS query feature  */
4242                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4243                                           adapter->vfinfo[i].rss_query_enabled);
4244         }
4245 }
4246
4247 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4248 {
4249         struct ixgbe_hw *hw = &adapter->hw;
4250         struct net_device *netdev = adapter->netdev;
4251         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4252         struct ixgbe_ring *rx_ring;
4253         int i;
4254         u32 mhadd, hlreg0;
4255
4256 #ifdef IXGBE_FCOE
4257         /* adjust max frame to be able to do baby jumbo for FCoE */
4258         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4259             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4260                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4261
4262 #endif /* IXGBE_FCOE */
4263
4264         /* adjust max frame to be at least the size of a standard frame */
4265         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4266                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4267
4268         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4269         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4270                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4271                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4272
4273                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4274         }
4275
4276         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4277         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4278         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4279         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4280
4281         /*
4282          * Setup the HW Rx Head and Tail Descriptor Pointers and
4283          * the Base and Length of the Rx Descriptor Ring
4284          */
4285         for (i = 0; i < adapter->num_rx_queues; i++) {
4286                 rx_ring = adapter->rx_ring[i];
4287
4288                 clear_ring_rsc_enabled(rx_ring);
4289                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4290                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4291
4292                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4293                         set_ring_rsc_enabled(rx_ring);
4294
4295                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4296                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4297
4298                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4299                         continue;
4300
4301                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4302
4303 #if (PAGE_SIZE < 8192)
4304                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4305                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4306
4307                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4308                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4309                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4310 #endif
4311         }
4312 }
4313
4314 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4315 {
4316         struct ixgbe_hw *hw = &adapter->hw;
4317         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4318
4319         switch (hw->mac.type) {
4320         case ixgbe_mac_82598EB:
4321                 /*
4322                  * For VMDq support of different descriptor types or
4323                  * buffer sizes through the use of multiple SRRCTL
4324                  * registers, RDRXCTL.MVMEN must be set to 1
4325                  *
4326                  * also, the manual doesn't mention it clearly but DCA hints
4327                  * will only use queue 0's tags unless this bit is set.  Side
4328                  * effects of setting this bit are only that SRRCTL must be
4329                  * fully programmed [0..15]
4330                  */
4331                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4332                 break;
4333         case ixgbe_mac_X550:
4334         case ixgbe_mac_X550EM_x:
4335         case ixgbe_mac_x550em_a:
4336                 if (adapter->num_vfs)
4337                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4338                 fallthrough;
4339         case ixgbe_mac_82599EB:
4340         case ixgbe_mac_X540:
4341                 /* Disable RSC for ACK packets */
4342                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4343                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4344                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4345                 /* hardware requires some bits to be set by default */
4346                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4347                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4348                 break;
4349         default:
4350                 /* We should do nothing since we don't know this hardware */
4351                 return;
4352         }
4353
4354         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4355 }
4356
4357 /**
4358  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4359  * @adapter: board private structure
4360  *
4361  * Configure the Rx unit of the MAC after a reset.
4362  **/
4363 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4364 {
4365         struct ixgbe_hw *hw = &adapter->hw;
4366         int i;
4367         u32 rxctrl, rfctl;
4368
4369         /* disable receives while setting up the descriptors */
4370         hw->mac.ops.disable_rx(hw);
4371
4372         ixgbe_setup_psrtype(adapter);
4373         ixgbe_setup_rdrxctl(adapter);
4374
4375         /* RSC Setup */
4376         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4377         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4378         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4379                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4380
4381         /* disable NFS filtering */
4382         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4383         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4384
4385         /* Program registers for the distribution of queues */
4386         ixgbe_setup_mrqc(adapter);
4387
4388         /* set_rx_buffer_len must be called before ring initialization */
4389         ixgbe_set_rx_buffer_len(adapter);
4390
4391         /*
4392          * Setup the HW Rx Head and Tail Descriptor Pointers and
4393          * the Base and Length of the Rx Descriptor Ring
4394          */
4395         for (i = 0; i < adapter->num_rx_queues; i++)
4396                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4397
4398         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4399         /* disable drop enable for 82598 parts */
4400         if (hw->mac.type == ixgbe_mac_82598EB)
4401                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4402
4403         /* enable all receives */
4404         rxctrl |= IXGBE_RXCTRL_RXEN;
4405         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4406 }
4407
4408 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4409                                  __be16 proto, u16 vid)
4410 {
4411         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4412         struct ixgbe_hw *hw = &adapter->hw;
4413
4414         /* add VID to filter table */
4415         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4416                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4417
4418         set_bit(vid, adapter->active_vlans);
4419
4420         return 0;
4421 }
4422
4423 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4424 {
4425         u32 vlvf;
4426         int idx;
4427
4428         /* short cut the special case */
4429         if (vlan == 0)
4430                 return 0;
4431
4432         /* Search for the vlan id in the VLVF entries */
4433         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4434                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4435                 if ((vlvf & VLAN_VID_MASK) == vlan)
4436                         break;
4437         }
4438
4439         return idx;
4440 }
4441
4442 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4443 {
4444         struct ixgbe_hw *hw = &adapter->hw;
4445         u32 bits, word;
4446         int idx;
4447
4448         idx = ixgbe_find_vlvf_entry(hw, vid);
4449         if (!idx)
4450                 return;
4451
4452         /* See if any other pools are set for this VLAN filter
4453          * entry other than the PF.
4454          */
4455         word = idx * 2 + (VMDQ_P(0) / 32);
4456         bits = ~BIT(VMDQ_P(0) % 32);
4457         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4458
4459         /* Disable the filter so this falls into the default pool. */
4460         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4461                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4462                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4463                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4464         }
4465 }
4466
4467 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4468                                   __be16 proto, u16 vid)
4469 {
4470         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4471         struct ixgbe_hw *hw = &adapter->hw;
4472
4473         /* remove VID from filter table */
4474         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4475                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4476
4477         clear_bit(vid, adapter->active_vlans);
4478
4479         return 0;
4480 }
4481
4482 /**
4483  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4484  * @adapter: driver data
4485  */
4486 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4487 {
4488         struct ixgbe_hw *hw = &adapter->hw;
4489         u32 vlnctrl;
4490         int i, j;
4491
4492         switch (hw->mac.type) {
4493         case ixgbe_mac_82598EB:
4494                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4495                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4496                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4497                 break;
4498         case ixgbe_mac_82599EB:
4499         case ixgbe_mac_X540:
4500         case ixgbe_mac_X550:
4501         case ixgbe_mac_X550EM_x:
4502         case ixgbe_mac_x550em_a:
4503                 for (i = 0; i < adapter->num_rx_queues; i++) {
4504                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4505
4506                         if (!netif_is_ixgbe(ring->netdev))
4507                                 continue;
4508
4509                         j = ring->reg_idx;
4510                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4511                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4512                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4513                 }
4514                 break;
4515         default:
4516                 break;
4517         }
4518 }
4519
4520 /**
4521  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4522  * @adapter: driver data
4523  */
4524 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4525 {
4526         struct ixgbe_hw *hw = &adapter->hw;
4527         u32 vlnctrl;
4528         int i, j;
4529
4530         switch (hw->mac.type) {
4531         case ixgbe_mac_82598EB:
4532                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4533                 vlnctrl |= IXGBE_VLNCTRL_VME;
4534                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4535                 break;
4536         case ixgbe_mac_82599EB:
4537         case ixgbe_mac_X540:
4538         case ixgbe_mac_X550:
4539         case ixgbe_mac_X550EM_x:
4540         case ixgbe_mac_x550em_a:
4541                 for (i = 0; i < adapter->num_rx_queues; i++) {
4542                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4543
4544                         if (!netif_is_ixgbe(ring->netdev))
4545                                 continue;
4546
4547                         j = ring->reg_idx;
4548                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4549                         vlnctrl |= IXGBE_RXDCTL_VME;
4550                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4551                 }
4552                 break;
4553         default:
4554                 break;
4555         }
4556 }
4557
4558 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4559 {
4560         struct ixgbe_hw *hw = &adapter->hw;
4561         u32 vlnctrl, i;
4562
4563         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4564
4565         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4566         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4567                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4568                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4569         } else {
4570                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4571                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4572                 return;
4573         }
4574
4575         /* Nothing to do for 82598 */
4576         if (hw->mac.type == ixgbe_mac_82598EB)
4577                 return;
4578
4579         /* We are already in VLAN promisc, nothing to do */
4580         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4581                 return;
4582
4583         /* Set flag so we don't redo unnecessary work */
4584         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4585
4586         /* Add PF to all active pools */
4587         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4588                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4589                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4590
4591                 vlvfb |= BIT(VMDQ_P(0) % 32);
4592                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4593         }
4594
4595         /* Set all bits in the VLAN filter table array */
4596         for (i = hw->mac.vft_size; i--;)
4597                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4598 }
4599
4600 #define VFTA_BLOCK_SIZE 8
4601 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4602 {
4603         struct ixgbe_hw *hw = &adapter->hw;
4604         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4605         u32 vid_start = vfta_offset * 32;
4606         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4607         u32 i, vid, word, bits;
4608
4609         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4610                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4611
4612                 /* pull VLAN ID from VLVF */
4613                 vid = vlvf & VLAN_VID_MASK;
4614
4615                 /* only concern outselves with a certain range */
4616                 if (vid < vid_start || vid >= vid_end)
4617                         continue;
4618
4619                 if (vlvf) {
4620                         /* record VLAN ID in VFTA */
4621                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4622
4623                         /* if PF is part of this then continue */
4624                         if (test_bit(vid, adapter->active_vlans))
4625                                 continue;
4626                 }
4627
4628                 /* remove PF from the pool */
4629                 word = i * 2 + VMDQ_P(0) / 32;
4630                 bits = ~BIT(VMDQ_P(0) % 32);
4631                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4632                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4633         }
4634
4635         /* extract values from active_vlans and write back to VFTA */
4636         for (i = VFTA_BLOCK_SIZE; i--;) {
4637                 vid = (vfta_offset + i) * 32;
4638                 word = vid / BITS_PER_LONG;
4639                 bits = vid % BITS_PER_LONG;
4640
4641                 vfta[i] |= adapter->active_vlans[word] >> bits;
4642
4643                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4644         }
4645 }
4646
4647 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4648 {
4649         struct ixgbe_hw *hw = &adapter->hw;
4650         u32 vlnctrl, i;
4651
4652         /* Set VLAN filtering to enabled */
4653         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4654         vlnctrl |= IXGBE_VLNCTRL_VFE;
4655         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4656
4657         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4658             hw->mac.type == ixgbe_mac_82598EB)
4659                 return;
4660
4661         /* We are not in VLAN promisc, nothing to do */
4662         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4663                 return;
4664
4665         /* Set flag so we don't redo unnecessary work */
4666         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4667
4668         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4669                 ixgbe_scrub_vfta(adapter, i);
4670 }
4671
4672 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4673 {
4674         u16 vid = 1;
4675
4676         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4677
4678         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4679                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4680 }
4681
4682 /**
4683  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4684  * @netdev: network interface device structure
4685  *
4686  * Writes multicast address list to the MTA hash table.
4687  * Returns: -ENOMEM on failure
4688  *                0 on no addresses written
4689  *                X on writing X addresses to MTA
4690  **/
4691 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4692 {
4693         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4694         struct ixgbe_hw *hw = &adapter->hw;
4695
4696         if (!netif_running(netdev))
4697                 return 0;
4698
4699         if (hw->mac.ops.update_mc_addr_list)
4700                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4701         else
4702                 return -ENOMEM;
4703
4704 #ifdef CONFIG_PCI_IOV
4705         ixgbe_restore_vf_multicasts(adapter);
4706 #endif
4707
4708         return netdev_mc_count(netdev);
4709 }
4710
4711 #ifdef CONFIG_PCI_IOV
4712 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4713 {
4714         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4715         struct ixgbe_hw *hw = &adapter->hw;
4716         int i;
4717
4718         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4719                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4720
4721                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4722                         hw->mac.ops.set_rar(hw, i,
4723                                             mac_table->addr,
4724                                             mac_table->pool,
4725                                             IXGBE_RAH_AV);
4726                 else
4727                         hw->mac.ops.clear_rar(hw, i);
4728         }
4729 }
4730
4731 #endif
4732 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4733 {
4734         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4735         struct ixgbe_hw *hw = &adapter->hw;
4736         int i;
4737
4738         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4739                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4740                         continue;
4741
4742                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4743
4744                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4745                         hw->mac.ops.set_rar(hw, i,
4746                                             mac_table->addr,
4747                                             mac_table->pool,
4748                                             IXGBE_RAH_AV);
4749                 else
4750                         hw->mac.ops.clear_rar(hw, i);
4751         }
4752 }
4753
4754 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4755 {
4756         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4757         struct ixgbe_hw *hw = &adapter->hw;
4758         int i;
4759
4760         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4761                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4762                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4763         }
4764
4765         ixgbe_sync_mac_table(adapter);
4766 }
4767
4768 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4769 {
4770         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4771         struct ixgbe_hw *hw = &adapter->hw;
4772         int i, count = 0;
4773
4774         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4775                 /* do not count default RAR as available */
4776                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4777                         continue;
4778
4779                 /* only count unused and addresses that belong to us */
4780                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4781                         if (mac_table->pool != pool)
4782                                 continue;
4783                 }
4784
4785                 count++;
4786         }
4787
4788         return count;
4789 }
4790
4791 /* this function destroys the first RAR entry */
4792 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4793 {
4794         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4795         struct ixgbe_hw *hw = &adapter->hw;
4796
4797         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4798         mac_table->pool = VMDQ_P(0);
4799
4800         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4801
4802         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4803                             IXGBE_RAH_AV);
4804 }
4805
4806 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4807                          const u8 *addr, u16 pool)
4808 {
4809         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4810         struct ixgbe_hw *hw = &adapter->hw;
4811         int i;
4812
4813         if (is_zero_ether_addr(addr))
4814                 return -EINVAL;
4815
4816         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4817                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4818                         continue;
4819
4820                 ether_addr_copy(mac_table->addr, addr);
4821                 mac_table->pool = pool;
4822
4823                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4824                                     IXGBE_MAC_STATE_IN_USE;
4825
4826                 ixgbe_sync_mac_table(adapter);
4827
4828                 return i;
4829         }
4830
4831         return -ENOMEM;
4832 }
4833
4834 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4835                          const u8 *addr, u16 pool)
4836 {
4837         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4838         struct ixgbe_hw *hw = &adapter->hw;
4839         int i;
4840
4841         if (is_zero_ether_addr(addr))
4842                 return -EINVAL;
4843
4844         /* search table for addr, if found clear IN_USE flag and sync */
4845         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4846                 /* we can only delete an entry if it is in use */
4847                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4848                         continue;
4849                 /* we only care about entries that belong to the given pool */
4850                 if (mac_table->pool != pool)
4851                         continue;
4852                 /* we only care about a specific MAC address */
4853                 if (!ether_addr_equal(addr, mac_table->addr))
4854                         continue;
4855
4856                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4857                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4858
4859                 ixgbe_sync_mac_table(adapter);
4860
4861                 return 0;
4862         }
4863
4864         return -ENOMEM;
4865 }
4866
4867 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4868 {
4869         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4870         int ret;
4871
4872         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4873
4874         return min_t(int, ret, 0);
4875 }
4876
4877 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4878 {
4879         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4880
4881         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4882
4883         return 0;
4884 }
4885
4886 /**
4887  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4888  * @netdev: network interface device structure
4889  *
4890  * The set_rx_method entry point is called whenever the unicast/multicast
4891  * address list or the network interface flags are updated.  This routine is
4892  * responsible for configuring the hardware for proper unicast, multicast and
4893  * promiscuous mode.
4894  **/
4895 void ixgbe_set_rx_mode(struct net_device *netdev)
4896 {
4897         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4898         struct ixgbe_hw *hw = &adapter->hw;
4899         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4900         netdev_features_t features = netdev->features;
4901         int count;
4902
4903         /* Check for Promiscuous and All Multicast modes */
4904         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4905
4906         /* set all bits that we expect to always be set */
4907         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4908         fctrl |= IXGBE_FCTRL_BAM;
4909         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4910         fctrl |= IXGBE_FCTRL_PMCF;
4911
4912         /* clear the bits we are changing the status of */
4913         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4914         if (netdev->flags & IFF_PROMISC) {
4915                 hw->addr_ctrl.user_set_promisc = true;
4916                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4917                 vmolr |= IXGBE_VMOLR_MPE;
4918                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4919         } else {
4920                 if (netdev->flags & IFF_ALLMULTI) {
4921                         fctrl |= IXGBE_FCTRL_MPE;
4922                         vmolr |= IXGBE_VMOLR_MPE;
4923                 }
4924                 hw->addr_ctrl.user_set_promisc = false;
4925         }
4926
4927         /*
4928          * Write addresses to available RAR registers, if there is not
4929          * sufficient space to store all the addresses then enable
4930          * unicast promiscuous mode
4931          */
4932         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4933                 fctrl |= IXGBE_FCTRL_UPE;
4934                 vmolr |= IXGBE_VMOLR_ROPE;
4935         }
4936
4937         /* Write addresses to the MTA, if the attempt fails
4938          * then we should just turn on promiscuous mode so
4939          * that we can at least receive multicast traffic
4940          */
4941         count = ixgbe_write_mc_addr_list(netdev);
4942         if (count < 0) {
4943                 fctrl |= IXGBE_FCTRL_MPE;
4944                 vmolr |= IXGBE_VMOLR_MPE;
4945         } else if (count) {
4946                 vmolr |= IXGBE_VMOLR_ROMPE;
4947         }
4948
4949         if (hw->mac.type != ixgbe_mac_82598EB) {
4950                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4951                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4952                            IXGBE_VMOLR_ROPE);
4953                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4954         }
4955
4956         /* This is useful for sniffing bad packets. */
4957         if (features & NETIF_F_RXALL) {
4958                 /* UPE and MPE will be handled by normal PROMISC logic
4959                  * in e1000e_set_rx_mode */
4960                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4961                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4962                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4963
4964                 fctrl &= ~(IXGBE_FCTRL_DPF);
4965                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4966         }
4967
4968         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4969
4970         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4971                 ixgbe_vlan_strip_enable(adapter);
4972         else
4973                 ixgbe_vlan_strip_disable(adapter);
4974
4975         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4976                 ixgbe_vlan_promisc_disable(adapter);
4977         else
4978                 ixgbe_vlan_promisc_enable(adapter);
4979 }
4980
4981 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4982 {
4983         int q_idx;
4984
4985         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4986                 napi_enable(&adapter->q_vector[q_idx]->napi);
4987 }
4988
4989 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4990 {
4991         int q_idx;
4992
4993         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4994                 napi_disable(&adapter->q_vector[q_idx]->napi);
4995 }
4996
4997 static int ixgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table)
4998 {
4999         struct ixgbe_adapter *adapter = netdev_priv(dev);
5000         struct ixgbe_hw *hw = &adapter->hw;
5001         struct udp_tunnel_info ti;
5002
5003         udp_tunnel_nic_get_port(dev, table, 0, &ti);
5004         if (ti.type == UDP_TUNNEL_TYPE_VXLAN)
5005                 adapter->vxlan_port = ti.port;
5006         else
5007                 adapter->geneve_port = ti.port;
5008
5009         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL,
5010                         ntohs(adapter->vxlan_port) |
5011                         ntohs(adapter->geneve_port) <<
5012                                 IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT);
5013         return 0;
5014 }
5015
5016 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550 = {
5017         .sync_table     = ixgbe_udp_tunnel_sync,
5018         .flags          = UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
5019         .tables         = {
5020                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },
5021         },
5022 };
5023
5024 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550em_a = {
5025         .sync_table     = ixgbe_udp_tunnel_sync,
5026         .flags          = UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
5027         .tables         = {
5028                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },
5029                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },
5030         },
5031 };
5032
5033 #ifdef CONFIG_IXGBE_DCB
5034 /**
5035  * ixgbe_configure_dcb - Configure DCB hardware
5036  * @adapter: ixgbe adapter struct
5037  *
5038  * This is called by the driver on open to configure the DCB hardware.
5039  * This is also called by the gennetlink interface when reconfiguring
5040  * the DCB state.
5041  */
5042 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5043 {
5044         struct ixgbe_hw *hw = &adapter->hw;
5045         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5046
5047         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5048                 if (hw->mac.type == ixgbe_mac_82598EB)
5049                         netif_set_gso_max_size(adapter->netdev, 65536);
5050                 return;
5051         }
5052
5053         if (hw->mac.type == ixgbe_mac_82598EB)
5054                 netif_set_gso_max_size(adapter->netdev, 32768);
5055
5056 #ifdef IXGBE_FCOE
5057         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5058                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5059 #endif
5060
5061         /* reconfigure the hardware */
5062         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5063                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5064                                                 DCB_TX_CONFIG);
5065                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5066                                                 DCB_RX_CONFIG);
5067                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5068         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5069                 ixgbe_dcb_hw_ets(&adapter->hw,
5070                                  adapter->ixgbe_ieee_ets,
5071                                  max_frame);
5072                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5073                                         adapter->ixgbe_ieee_pfc->pfc_en,
5074                                         adapter->ixgbe_ieee_ets->prio_tc);
5075         }
5076
5077         /* Enable RSS Hash per TC */
5078         if (hw->mac.type != ixgbe_mac_82598EB) {
5079                 u32 msb = 0;
5080                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5081
5082                 while (rss_i) {
5083                         msb++;
5084                         rss_i >>= 1;
5085                 }
5086
5087                 /* write msb to all 8 TCs in one write */
5088                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5089         }
5090 }
5091 #endif
5092
5093 /* Additional bittime to account for IXGBE framing */
5094 #define IXGBE_ETH_FRAMING 20
5095
5096 /**
5097  * ixgbe_hpbthresh - calculate high water mark for flow control
5098  *
5099  * @adapter: board private structure to calculate for
5100  * @pb: packet buffer to calculate
5101  */
5102 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5103 {
5104         struct ixgbe_hw *hw = &adapter->hw;
5105         struct net_device *dev = adapter->netdev;
5106         int link, tc, kb, marker;
5107         u32 dv_id, rx_pba;
5108
5109         /* Calculate max LAN frame size */
5110         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5111
5112 #ifdef IXGBE_FCOE
5113         /* FCoE traffic class uses FCOE jumbo frames */
5114         if ((dev->features & NETIF_F_FCOE_MTU) &&
5115             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5116             (pb == ixgbe_fcoe_get_tc(adapter)))
5117                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5118 #endif
5119
5120         /* Calculate delay value for device */
5121         switch (hw->mac.type) {
5122         case ixgbe_mac_X540:
5123         case ixgbe_mac_X550:
5124         case ixgbe_mac_X550EM_x:
5125         case ixgbe_mac_x550em_a:
5126                 dv_id = IXGBE_DV_X540(link, tc);
5127                 break;
5128         default:
5129                 dv_id = IXGBE_DV(link, tc);
5130                 break;
5131         }
5132
5133         /* Loopback switch introduces additional latency */
5134         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5135                 dv_id += IXGBE_B2BT(tc);
5136
5137         /* Delay value is calculated in bit times convert to KB */
5138         kb = IXGBE_BT2KB(dv_id);
5139         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5140
5141         marker = rx_pba - kb;
5142
5143         /* It is possible that the packet buffer is not large enough
5144          * to provide required headroom. In this case throw an error
5145          * to user and a do the best we can.
5146          */
5147         if (marker < 0) {
5148                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5149                             "headroom to support flow control."
5150                             "Decrease MTU or number of traffic classes\n", pb);
5151                 marker = tc + 1;
5152         }
5153
5154         return marker;
5155 }
5156
5157 /**
5158  * ixgbe_lpbthresh - calculate low water mark for for flow control
5159  *
5160  * @adapter: board private structure to calculate for
5161  * @pb: packet buffer to calculate
5162  */
5163 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5164 {
5165         struct ixgbe_hw *hw = &adapter->hw;
5166         struct net_device *dev = adapter->netdev;
5167         int tc;
5168         u32 dv_id;
5169
5170         /* Calculate max LAN frame size */
5171         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5172
5173 #ifdef IXGBE_FCOE
5174         /* FCoE traffic class uses FCOE jumbo frames */
5175         if ((dev->features & NETIF_F_FCOE_MTU) &&
5176             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5177             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5178                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5179 #endif
5180
5181         /* Calculate delay value for device */
5182         switch (hw->mac.type) {
5183         case ixgbe_mac_X540:
5184         case ixgbe_mac_X550:
5185         case ixgbe_mac_X550EM_x:
5186         case ixgbe_mac_x550em_a:
5187                 dv_id = IXGBE_LOW_DV_X540(tc);
5188                 break;
5189         default:
5190                 dv_id = IXGBE_LOW_DV(tc);
5191                 break;
5192         }
5193
5194         /* Delay value is calculated in bit times convert to KB */
5195         return IXGBE_BT2KB(dv_id);
5196 }
5197
5198 /*
5199  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5200  */
5201 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5202 {
5203         struct ixgbe_hw *hw = &adapter->hw;
5204         int num_tc = adapter->hw_tcs;
5205         int i;
5206
5207         if (!num_tc)
5208                 num_tc = 1;
5209
5210         for (i = 0; i < num_tc; i++) {
5211                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5212                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5213
5214                 /* Low water marks must not be larger than high water marks */
5215                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5216                         hw->fc.low_water[i] = 0;
5217         }
5218
5219         for (; i < MAX_TRAFFIC_CLASS; i++)
5220                 hw->fc.high_water[i] = 0;
5221 }
5222
5223 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5224 {
5225         struct ixgbe_hw *hw = &adapter->hw;
5226         int hdrm;
5227         u8 tc = adapter->hw_tcs;
5228
5229         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5230             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5231                 hdrm = 32 << adapter->fdir_pballoc;
5232         else
5233                 hdrm = 0;
5234
5235         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5236         ixgbe_pbthresh_setup(adapter);
5237 }
5238
5239 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5240 {
5241         struct ixgbe_hw *hw = &adapter->hw;
5242         struct hlist_node *node2;
5243         struct ixgbe_fdir_filter *filter;
5244         u8 queue;
5245
5246         spin_lock(&adapter->fdir_perfect_lock);
5247
5248         if (!hlist_empty(&adapter->fdir_filter_list))
5249                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5250
5251         hlist_for_each_entry_safe(filter, node2,
5252                                   &adapter->fdir_filter_list, fdir_node) {
5253                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
5254                         queue = IXGBE_FDIR_DROP_QUEUE;
5255                 } else {
5256                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
5257                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
5258
5259                         if (!vf && (ring >= adapter->num_rx_queues)) {
5260                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
5261                                       ring);
5262                                 continue;
5263                         } else if (vf &&
5264                                    ((vf > adapter->num_vfs) ||
5265                                      ring >= adapter->num_rx_queues_per_pool)) {
5266                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5267                                       vf, ring);
5268                                 continue;
5269                         }
5270
5271                         /* Map the ring onto the absolute queue index */
5272                         if (!vf)
5273                                 queue = adapter->rx_ring[ring]->reg_idx;
5274                         else
5275                                 queue = ((vf - 1) *
5276                                         adapter->num_rx_queues_per_pool) + ring;
5277                 }
5278
5279                 ixgbe_fdir_write_perfect_filter_82599(hw,
5280                                 &filter->filter, filter->sw_idx, queue);
5281         }
5282
5283         spin_unlock(&adapter->fdir_perfect_lock);
5284 }
5285
5286 /**
5287  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5288  * @rx_ring: ring to free buffers from
5289  **/
5290 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5291 {
5292         u16 i = rx_ring->next_to_clean;
5293         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5294
5295         if (rx_ring->xsk_umem) {
5296                 ixgbe_xsk_clean_rx_ring(rx_ring);
5297                 goto skip_free;
5298         }
5299
5300         /* Free all the Rx ring sk_buffs */
5301         while (i != rx_ring->next_to_alloc) {
5302                 if (rx_buffer->skb) {
5303                         struct sk_buff *skb = rx_buffer->skb;
5304                         if (IXGBE_CB(skb)->page_released)
5305                                 dma_unmap_page_attrs(rx_ring->dev,
5306                                                      IXGBE_CB(skb)->dma,
5307                                                      ixgbe_rx_pg_size(rx_ring),
5308                                                      DMA_FROM_DEVICE,
5309                                                      IXGBE_RX_DMA_ATTR);
5310                         dev_kfree_skb(skb);
5311                 }
5312
5313                 /* Invalidate cache lines that may have been written to by
5314                  * device so that we avoid corrupting memory.
5315                  */
5316                 dma_sync_single_range_for_cpu(rx_ring->dev,
5317                                               rx_buffer->dma,
5318                                               rx_buffer->page_offset,
5319                                               ixgbe_rx_bufsz(rx_ring),
5320                                               DMA_FROM_DEVICE);
5321
5322                 /* free resources associated with mapping */
5323                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5324                                      ixgbe_rx_pg_size(rx_ring),
5325                                      DMA_FROM_DEVICE,
5326                                      IXGBE_RX_DMA_ATTR);
5327                 __page_frag_cache_drain(rx_buffer->page,
5328                                         rx_buffer->pagecnt_bias);
5329
5330                 i++;
5331                 rx_buffer++;
5332                 if (i == rx_ring->count) {
5333                         i = 0;
5334                         rx_buffer = rx_ring->rx_buffer_info;
5335                 }
5336         }
5337
5338 skip_free:
5339         rx_ring->next_to_alloc = 0;
5340         rx_ring->next_to_clean = 0;
5341         rx_ring->next_to_use = 0;
5342 }
5343
5344 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5345                              struct ixgbe_fwd_adapter *accel)
5346 {
5347         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5348         int num_tc = netdev_get_num_tc(adapter->netdev);
5349         struct net_device *vdev = accel->netdev;
5350         int i, baseq, err;
5351
5352         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5353         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5354                    accel->pool, adapter->num_rx_pools,
5355                    baseq, baseq + adapter->num_rx_queues_per_pool);
5356
5357         accel->rx_base_queue = baseq;
5358         accel->tx_base_queue = baseq;
5359
5360         /* record configuration for macvlan interface in vdev */
5361         for (i = 0; i < num_tc; i++)
5362                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5363                                              i, rss_i, baseq + (rss_i * i));
5364
5365         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5366                 adapter->rx_ring[baseq + i]->netdev = vdev;
5367
5368         /* Guarantee all rings are updated before we update the
5369          * MAC address filter.
5370          */
5371         wmb();
5372
5373         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5374          * need to only treat it as an error value if it is negative.
5375          */
5376         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5377                                    VMDQ_P(accel->pool));
5378         if (err >= 0)
5379                 return 0;
5380
5381         /* if we cannot add the MAC rule then disable the offload */
5382         macvlan_release_l2fw_offload(vdev);
5383
5384         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5385                 adapter->rx_ring[baseq + i]->netdev = NULL;
5386
5387         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5388
5389         /* unbind the queues and drop the subordinate channel config */
5390         netdev_unbind_sb_channel(adapter->netdev, vdev);
5391         netdev_set_sb_channel(vdev, 0);
5392
5393         clear_bit(accel->pool, adapter->fwd_bitmask);
5394         kfree(accel);
5395
5396         return err;
5397 }
5398
5399 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5400 {
5401         struct ixgbe_adapter *adapter = data;
5402         struct ixgbe_fwd_adapter *accel;
5403
5404         if (!netif_is_macvlan(vdev))
5405                 return 0;
5406
5407         accel = macvlan_accel_priv(vdev);
5408         if (!accel)
5409                 return 0;
5410
5411         ixgbe_fwd_ring_up(adapter, accel);
5412
5413         return 0;
5414 }
5415
5416 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5417 {
5418         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5419                                       ixgbe_macvlan_up, adapter);
5420 }
5421
5422 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5423 {
5424         struct ixgbe_hw *hw = &adapter->hw;
5425
5426         ixgbe_configure_pb(adapter);
5427 #ifdef CONFIG_IXGBE_DCB
5428         ixgbe_configure_dcb(adapter);
5429 #endif
5430         /*
5431          * We must restore virtualization before VLANs or else
5432          * the VLVF registers will not be populated
5433          */
5434         ixgbe_configure_virtualization(adapter);
5435
5436         ixgbe_set_rx_mode(adapter->netdev);
5437         ixgbe_restore_vlan(adapter);
5438         ixgbe_ipsec_restore(adapter);
5439
5440         switch (hw->mac.type) {
5441         case ixgbe_mac_82599EB:
5442         case ixgbe_mac_X540:
5443                 hw->mac.ops.disable_rx_buff(hw);
5444                 break;
5445         default:
5446                 break;
5447         }
5448
5449         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5450                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5451                                                 adapter->fdir_pballoc);
5452         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5453                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5454                                               adapter->fdir_pballoc);
5455                 ixgbe_fdir_filter_restore(adapter);
5456         }
5457
5458         switch (hw->mac.type) {
5459         case ixgbe_mac_82599EB:
5460         case ixgbe_mac_X540:
5461                 hw->mac.ops.enable_rx_buff(hw);
5462                 break;
5463         default:
5464                 break;
5465         }
5466
5467 #ifdef CONFIG_IXGBE_DCA
5468         /* configure DCA */
5469         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5470                 ixgbe_setup_dca(adapter);
5471 #endif /* CONFIG_IXGBE_DCA */
5472
5473 #ifdef IXGBE_FCOE
5474         /* configure FCoE L2 filters, redirection table, and Rx control */
5475         ixgbe_configure_fcoe(adapter);
5476
5477 #endif /* IXGBE_FCOE */
5478         ixgbe_configure_tx(adapter);
5479         ixgbe_configure_rx(adapter);
5480         ixgbe_configure_dfwd(adapter);
5481 }
5482
5483 /**
5484  * ixgbe_sfp_link_config - set up SFP+ link
5485  * @adapter: pointer to private adapter struct
5486  **/
5487 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5488 {
5489         /*
5490          * We are assuming the worst case scenario here, and that
5491          * is that an SFP was inserted/removed after the reset
5492          * but before SFP detection was enabled.  As such the best
5493          * solution is to just start searching as soon as we start
5494          */
5495         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5496                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5497
5498         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5499         adapter->sfp_poll_time = 0;
5500 }
5501
5502 /**
5503  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5504  * @hw: pointer to private hardware struct
5505  *
5506  * Returns 0 on success, negative on failure
5507  **/
5508 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5509 {
5510         u32 speed;
5511         bool autoneg, link_up = false;
5512         int ret = IXGBE_ERR_LINK_SETUP;
5513
5514         if (hw->mac.ops.check_link)
5515                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5516
5517         if (ret)
5518                 return ret;
5519
5520         speed = hw->phy.autoneg_advertised;
5521         if (!speed && hw->mac.ops.get_link_capabilities) {
5522                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5523                                                         &autoneg);
5524                 speed &= ~(IXGBE_LINK_SPEED_5GB_FULL |
5525                            IXGBE_LINK_SPEED_2_5GB_FULL);
5526         }
5527
5528         if (ret)
5529                 return ret;
5530
5531         if (hw->mac.ops.setup_link)
5532                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5533
5534         return ret;
5535 }
5536
5537 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5538 {
5539         struct ixgbe_hw *hw = &adapter->hw;
5540         u32 gpie = 0;
5541
5542         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5543                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5544                        IXGBE_GPIE_OCD;
5545                 gpie |= IXGBE_GPIE_EIAME;
5546                 /*
5547                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5548                  * this saves a register write for every interrupt
5549                  */
5550                 switch (hw->mac.type) {
5551                 case ixgbe_mac_82598EB:
5552                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5553                         break;
5554                 case ixgbe_mac_82599EB:
5555                 case ixgbe_mac_X540:
5556                 case ixgbe_mac_X550:
5557                 case ixgbe_mac_X550EM_x:
5558                 case ixgbe_mac_x550em_a:
5559                 default:
5560                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5561                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5562                         break;
5563                 }
5564         } else {
5565                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5566                  * specifically only auto mask tx and rx interrupts */
5567                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5568         }
5569
5570         /* XXX: to interrupt immediately for EICS writes, enable this */
5571         /* gpie |= IXGBE_GPIE_EIMEN; */
5572
5573         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5574                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5575
5576                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5577                 case IXGBE_82599_VMDQ_8Q_MASK:
5578                         gpie |= IXGBE_GPIE_VTMODE_16;
5579                         break;
5580                 case IXGBE_82599_VMDQ_4Q_MASK:
5581                         gpie |= IXGBE_GPIE_VTMODE_32;
5582                         break;
5583                 default:
5584                         gpie |= IXGBE_GPIE_VTMODE_64;
5585                         break;
5586                 }
5587         }
5588
5589         /* Enable Thermal over heat sensor interrupt */
5590         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5591                 switch (adapter->hw.mac.type) {
5592                 case ixgbe_mac_82599EB:
5593                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5594                         break;
5595                 default:
5596                         break;
5597                 }
5598         }
5599
5600         /* Enable fan failure interrupt */
5601         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5602                 gpie |= IXGBE_SDP1_GPIEN(hw);
5603
5604         switch (hw->mac.type) {
5605         case ixgbe_mac_82599EB:
5606                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5607                 break;
5608         case ixgbe_mac_X550EM_x:
5609         case ixgbe_mac_x550em_a:
5610                 gpie |= IXGBE_SDP0_GPIEN_X540;
5611                 break;
5612         default:
5613                 break;
5614         }
5615
5616         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5617 }
5618
5619 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5620 {
5621         struct ixgbe_hw *hw = &adapter->hw;
5622         int err;
5623         u32 ctrl_ext;
5624
5625         ixgbe_get_hw_control(adapter);
5626         ixgbe_setup_gpie(adapter);
5627
5628         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5629                 ixgbe_configure_msix(adapter);
5630         else
5631                 ixgbe_configure_msi_and_legacy(adapter);
5632
5633         /* enable the optics for 82599 SFP+ fiber */
5634         if (hw->mac.ops.enable_tx_laser)
5635                 hw->mac.ops.enable_tx_laser(hw);
5636
5637         if (hw->phy.ops.set_phy_power)
5638                 hw->phy.ops.set_phy_power(hw, true);
5639
5640         smp_mb__before_atomic();
5641         clear_bit(__IXGBE_DOWN, &adapter->state);
5642         ixgbe_napi_enable_all(adapter);
5643
5644         if (ixgbe_is_sfp(hw)) {
5645                 ixgbe_sfp_link_config(adapter);
5646         } else {
5647                 err = ixgbe_non_sfp_link_config(hw);
5648                 if (err)
5649                         e_err(probe, "link_config FAILED %d\n", err);
5650         }
5651
5652         /* clear any pending interrupts, may auto mask */
5653         IXGBE_READ_REG(hw, IXGBE_EICR);
5654         ixgbe_irq_enable(adapter, true, true);
5655
5656         /*
5657          * If this adapter has a fan, check to see if we had a failure
5658          * before we enabled the interrupt.
5659          */
5660         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5661                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5662                 if (esdp & IXGBE_ESDP_SDP1)
5663                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5664         }
5665
5666         /* bring the link up in the watchdog, this could race with our first
5667          * link up interrupt but shouldn't be a problem */
5668         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5669         adapter->link_check_timeout = jiffies;
5670         mod_timer(&adapter->service_timer, jiffies);
5671
5672         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5673         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5674         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5675         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5676 }
5677
5678 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5679 {
5680         WARN_ON(in_interrupt());
5681         /* put off any impending NetWatchDogTimeout */
5682         netif_trans_update(adapter->netdev);
5683
5684         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5685                 usleep_range(1000, 2000);
5686         if (adapter->hw.phy.type == ixgbe_phy_fw)
5687                 ixgbe_watchdog_link_is_down(adapter);
5688         ixgbe_down(adapter);
5689         /*
5690          * If SR-IOV enabled then wait a bit before bringing the adapter
5691          * back up to give the VFs time to respond to the reset.  The
5692          * two second wait is based upon the watchdog timer cycle in
5693          * the VF driver.
5694          */
5695         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5696                 msleep(2000);
5697         ixgbe_up(adapter);
5698         clear_bit(__IXGBE_RESETTING, &adapter->state);
5699 }
5700
5701 void ixgbe_up(struct ixgbe_adapter *adapter)
5702 {
5703         /* hardware has been reset, we need to reload some things */
5704         ixgbe_configure(adapter);
5705
5706         ixgbe_up_complete(adapter);
5707 }
5708
5709 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5710 {
5711         u16 devctl2;
5712
5713         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5714
5715         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5716         case IXGBE_PCIDEVCTRL2_17_34s:
5717         case IXGBE_PCIDEVCTRL2_4_8s:
5718                 /* For now we cap the upper limit on delay to 2 seconds
5719                  * as we end up going up to 34 seconds of delay in worst
5720                  * case timeout value.
5721                  */
5722         case IXGBE_PCIDEVCTRL2_1_2s:
5723                 return 2000000ul;       /* 2.0 s */
5724         case IXGBE_PCIDEVCTRL2_260_520ms:
5725                 return 520000ul;        /* 520 ms */
5726         case IXGBE_PCIDEVCTRL2_65_130ms:
5727                 return 130000ul;        /* 130 ms */
5728         case IXGBE_PCIDEVCTRL2_16_32ms:
5729                 return 32000ul;         /* 32 ms */
5730         case IXGBE_PCIDEVCTRL2_1_2ms:
5731                 return 2000ul;          /* 2 ms */
5732         case IXGBE_PCIDEVCTRL2_50_100us:
5733                 return 100ul;           /* 100 us */
5734         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5735                 return 32000ul;         /* 32 ms */
5736         default:
5737                 break;
5738         }
5739
5740         /* We shouldn't need to hit this path, but just in case default as
5741          * though completion timeout is not supported and support 32ms.
5742          */
5743         return 32000ul;
5744 }
5745
5746 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5747 {
5748         unsigned long wait_delay, delay_interval;
5749         struct ixgbe_hw *hw = &adapter->hw;
5750         int i, wait_loop;
5751         u32 rxdctl;
5752
5753         /* disable receives */
5754         hw->mac.ops.disable_rx(hw);
5755
5756         if (ixgbe_removed(hw->hw_addr))
5757                 return;
5758
5759         /* disable all enabled Rx queues */
5760         for (i = 0; i < adapter->num_rx_queues; i++) {
5761                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5762                 u8 reg_idx = ring->reg_idx;
5763
5764                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5765                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5766                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5767
5768                 /* write value back with RXDCTL.ENABLE bit cleared */
5769                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5770         }
5771
5772         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5773         if (hw->mac.type == ixgbe_mac_82598EB &&
5774             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5775                 return;
5776
5777         /* Determine our minimum delay interval. We will increase this value
5778          * with each subsequent test. This way if the device returns quickly
5779          * we should spend as little time as possible waiting, however as
5780          * the time increases we will wait for larger periods of time.
5781          *
5782          * The trick here is that we increase the interval using the
5783          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5784          * of that wait is that it totals up to 100x whatever interval we
5785          * choose. Since our minimum wait is 100us we can just divide the
5786          * total timeout by 100 to get our minimum delay interval.
5787          */
5788         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5789
5790         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5791         wait_delay = delay_interval;
5792
5793         while (wait_loop--) {
5794                 usleep_range(wait_delay, wait_delay + 10);
5795                 wait_delay += delay_interval * 2;
5796                 rxdctl = 0;
5797
5798                 /* OR together the reading of all the active RXDCTL registers,
5799                  * and then test the result. We need the disable to complete
5800                  * before we start freeing the memory and invalidating the
5801                  * DMA mappings.
5802                  */
5803                 for (i = 0; i < adapter->num_rx_queues; i++) {
5804                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5805                         u8 reg_idx = ring->reg_idx;
5806
5807                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5808                 }
5809
5810                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5811                         return;
5812         }
5813
5814         e_err(drv,
5815               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5816 }
5817
5818 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5819 {
5820         unsigned long wait_delay, delay_interval;
5821         struct ixgbe_hw *hw = &adapter->hw;
5822         int i, wait_loop;
5823         u32 txdctl;
5824
5825         if (ixgbe_removed(hw->hw_addr))
5826                 return;
5827
5828         /* disable all enabled Tx queues */
5829         for (i = 0; i < adapter->num_tx_queues; i++) {
5830                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5831                 u8 reg_idx = ring->reg_idx;
5832
5833                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5834         }
5835
5836         /* disable all enabled XDP Tx queues */
5837         for (i = 0; i < adapter->num_xdp_queues; i++) {
5838                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5839                 u8 reg_idx = ring->reg_idx;
5840
5841                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5842         }
5843
5844         /* If the link is not up there shouldn't be much in the way of
5845          * pending transactions. Those that are left will be flushed out
5846          * when the reset logic goes through the flush sequence to clean out
5847          * the pending Tx transactions.
5848          */
5849         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5850                 goto dma_engine_disable;
5851
5852         /* Determine our minimum delay interval. We will increase this value
5853          * with each subsequent test. This way if the device returns quickly
5854          * we should spend as little time as possible waiting, however as
5855          * the time increases we will wait for larger periods of time.
5856          *
5857          * The trick here is that we increase the interval using the
5858          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5859          * of that wait is that it totals up to 100x whatever interval we
5860          * choose. Since our minimum wait is 100us we can just divide the
5861          * total timeout by 100 to get our minimum delay interval.
5862          */
5863         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5864
5865         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5866         wait_delay = delay_interval;
5867
5868         while (wait_loop--) {
5869                 usleep_range(wait_delay, wait_delay + 10);
5870                 wait_delay += delay_interval * 2;
5871                 txdctl = 0;
5872
5873                 /* OR together the reading of all the active TXDCTL registers,
5874                  * and then test the result. We need the disable to complete
5875                  * before we start freeing the memory and invalidating the
5876                  * DMA mappings.
5877                  */
5878                 for (i = 0; i < adapter->num_tx_queues; i++) {
5879                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5880                         u8 reg_idx = ring->reg_idx;
5881
5882                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5883                 }
5884                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5885                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5886                         u8 reg_idx = ring->reg_idx;
5887
5888                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5889                 }
5890
5891                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5892                         goto dma_engine_disable;
5893         }
5894
5895         e_err(drv,
5896               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5897
5898 dma_engine_disable:
5899         /* Disable the Tx DMA engine on 82599 and later MAC */
5900         switch (hw->mac.type) {
5901         case ixgbe_mac_82599EB:
5902         case ixgbe_mac_X540:
5903         case ixgbe_mac_X550:
5904         case ixgbe_mac_X550EM_x:
5905         case ixgbe_mac_x550em_a:
5906                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5907                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5908                                  ~IXGBE_DMATXCTL_TE));
5909                 fallthrough;
5910         default:
5911                 break;
5912         }
5913 }
5914
5915 void ixgbe_reset(struct ixgbe_adapter *adapter)
5916 {
5917         struct ixgbe_hw *hw = &adapter->hw;
5918         struct net_device *netdev = adapter->netdev;
5919         int err;
5920
5921         if (ixgbe_removed(hw->hw_addr))
5922                 return;
5923         /* lock SFP init bit to prevent race conditions with the watchdog */
5924         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5925                 usleep_range(1000, 2000);
5926
5927         /* clear all SFP and link config related flags while holding SFP_INIT */
5928         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5929                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5930         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5931
5932         err = hw->mac.ops.init_hw(hw);
5933         switch (err) {
5934         case 0:
5935         case IXGBE_ERR_SFP_NOT_PRESENT:
5936         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5937                 break;
5938         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5939                 e_dev_err("master disable timed out\n");
5940                 break;
5941         case IXGBE_ERR_EEPROM_VERSION:
5942                 /* We are running on a pre-production device, log a warning */
5943                 e_dev_warn("This device is a pre-production adapter/LOM. "
5944                            "Please be aware there may be issues associated with "
5945                            "your hardware.  If you are experiencing problems "
5946                            "please contact your Intel or hardware "
5947                            "representative who provided you with this "
5948                            "hardware.\n");
5949                 break;
5950         default:
5951                 e_dev_err("Hardware Error: %d\n", err);
5952         }
5953
5954         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5955
5956         /* flush entries out of MAC table */
5957         ixgbe_flush_sw_mac_table(adapter);
5958         __dev_uc_unsync(netdev, NULL);
5959
5960         /* do not flush user set addresses */
5961         ixgbe_mac_set_default_filter(adapter);
5962
5963         /* update SAN MAC vmdq pool selection */
5964         if (hw->mac.san_mac_rar_index)
5965                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5966
5967         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5968                 ixgbe_ptp_reset(adapter);
5969
5970         if (hw->phy.ops.set_phy_power) {
5971                 if (!netif_running(adapter->netdev) && !adapter->wol)
5972                         hw->phy.ops.set_phy_power(hw, false);
5973                 else
5974                         hw->phy.ops.set_phy_power(hw, true);
5975         }
5976 }
5977
5978 /**
5979  * ixgbe_clean_tx_ring - Free Tx Buffers
5980  * @tx_ring: ring to be cleaned
5981  **/
5982 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5983 {
5984         u16 i = tx_ring->next_to_clean;
5985         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5986
5987         if (tx_ring->xsk_umem) {
5988                 ixgbe_xsk_clean_tx_ring(tx_ring);
5989                 goto out;
5990         }
5991
5992         while (i != tx_ring->next_to_use) {
5993                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5994
5995                 /* Free all the Tx ring sk_buffs */
5996                 if (ring_is_xdp(tx_ring))
5997                         xdp_return_frame(tx_buffer->xdpf);
5998                 else
5999                         dev_kfree_skb_any(tx_buffer->skb);
6000
6001                 /* unmap skb header data */
6002                 dma_unmap_single(tx_ring->dev,
6003                                  dma_unmap_addr(tx_buffer, dma),
6004                                  dma_unmap_len(tx_buffer, len),
6005                                  DMA_TO_DEVICE);
6006
6007                 /* check for eop_desc to determine the end of the packet */
6008                 eop_desc = tx_buffer->next_to_watch;
6009                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6010
6011                 /* unmap remaining buffers */
6012                 while (tx_desc != eop_desc) {
6013                         tx_buffer++;
6014                         tx_desc++;
6015                         i++;
6016                         if (unlikely(i == tx_ring->count)) {
6017                                 i = 0;
6018                                 tx_buffer = tx_ring->tx_buffer_info;
6019                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6020                         }
6021
6022                         /* unmap any remaining paged data */
6023                         if (dma_unmap_len(tx_buffer, len))
6024                                 dma_unmap_page(tx_ring->dev,
6025                                                dma_unmap_addr(tx_buffer, dma),
6026                                                dma_unmap_len(tx_buffer, len),
6027                                                DMA_TO_DEVICE);
6028                 }
6029
6030                 /* move us one more past the eop_desc for start of next pkt */
6031                 tx_buffer++;
6032                 i++;
6033                 if (unlikely(i == tx_ring->count)) {
6034                         i = 0;
6035                         tx_buffer = tx_ring->tx_buffer_info;
6036                 }
6037         }
6038
6039         /* reset BQL for queue */
6040         if (!ring_is_xdp(tx_ring))
6041                 netdev_tx_reset_queue(txring_txq(tx_ring));
6042
6043 out:
6044         /* reset next_to_use and next_to_clean */
6045         tx_ring->next_to_use = 0;
6046         tx_ring->next_to_clean = 0;
6047 }
6048
6049 /**
6050  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6051  * @adapter: board private structure
6052  **/
6053 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6054 {
6055         int i;
6056
6057         for (i = 0; i < adapter->num_rx_queues; i++)
6058                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6059 }
6060
6061 /**
6062  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6063  * @adapter: board private structure
6064  **/
6065 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6066 {
6067         int i;
6068
6069         for (i = 0; i < adapter->num_tx_queues; i++)
6070                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6071         for (i = 0; i < adapter->num_xdp_queues; i++)
6072                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6073 }
6074
6075 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6076 {
6077         struct hlist_node *node2;
6078         struct ixgbe_fdir_filter *filter;
6079
6080         spin_lock(&adapter->fdir_perfect_lock);
6081
6082         hlist_for_each_entry_safe(filter, node2,
6083                                   &adapter->fdir_filter_list, fdir_node) {
6084                 hlist_del(&filter->fdir_node);
6085                 kfree(filter);
6086         }
6087         adapter->fdir_filter_count = 0;
6088
6089         spin_unlock(&adapter->fdir_perfect_lock);
6090 }
6091
6092 void ixgbe_down(struct ixgbe_adapter *adapter)
6093 {
6094         struct net_device *netdev = adapter->netdev;
6095         struct ixgbe_hw *hw = &adapter->hw;
6096         int i;
6097
6098         /* signal that we are down to the interrupt handler */
6099         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6100                 return; /* do nothing if already down */
6101
6102         /* Shut off incoming Tx traffic */
6103         netif_tx_stop_all_queues(netdev);
6104
6105         /* call carrier off first to avoid false dev_watchdog timeouts */
6106         netif_carrier_off(netdev);
6107         netif_tx_disable(netdev);
6108
6109         /* Disable Rx */
6110         ixgbe_disable_rx(adapter);
6111
6112         /* synchronize_rcu() needed for pending XDP buffers to drain */
6113         if (adapter->xdp_ring[0])
6114                 synchronize_rcu();
6115
6116         ixgbe_irq_disable(adapter);
6117
6118         ixgbe_napi_disable_all(adapter);
6119
6120         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6121         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6122         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6123
6124         del_timer_sync(&adapter->service_timer);
6125
6126         if (adapter->num_vfs) {
6127                 /* Clear EITR Select mapping */
6128                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6129
6130                 /* Mark all the VFs as inactive */
6131                 for (i = 0 ; i < adapter->num_vfs; i++)
6132                         adapter->vfinfo[i].clear_to_send = false;
6133
6134                 /* ping all the active vfs to let them know we are going down */
6135                 ixgbe_ping_all_vfs(adapter);
6136
6137                 /* Disable all VFTE/VFRE TX/RX */
6138                 ixgbe_disable_tx_rx(adapter);
6139         }
6140
6141         /* disable transmits in the hardware now that interrupts are off */
6142         ixgbe_disable_tx(adapter);
6143
6144         if (!pci_channel_offline(adapter->pdev))
6145                 ixgbe_reset(adapter);
6146
6147         /* power down the optics for 82599 SFP+ fiber */
6148         if (hw->mac.ops.disable_tx_laser)
6149                 hw->mac.ops.disable_tx_laser(hw);
6150
6151         ixgbe_clean_all_tx_rings(adapter);
6152         ixgbe_clean_all_rx_rings(adapter);
6153 }
6154
6155 /**
6156  * ixgbe_eee_capable - helper function to determine EEE support on X550
6157  * @adapter: board private structure
6158  */
6159 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6160 {
6161         struct ixgbe_hw *hw = &adapter->hw;
6162
6163         switch (hw->device_id) {
6164         case IXGBE_DEV_ID_X550EM_A_1G_T:
6165         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6166                 if (!hw->phy.eee_speeds_supported)
6167                         break;
6168                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6169                 if (!hw->phy.eee_speeds_advertised)
6170                         break;
6171                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6172                 break;
6173         default:
6174                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6175                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6176                 break;
6177         }
6178 }
6179
6180 /**
6181  * ixgbe_tx_timeout - Respond to a Tx Hang
6182  * @netdev: network interface device structure
6183  **/
6184 static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int txqueue)
6185 {
6186         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6187
6188         /* Do the reset outside of interrupt context */
6189         ixgbe_tx_timeout_reset(adapter);
6190 }
6191
6192 #ifdef CONFIG_IXGBE_DCB
6193 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6194 {
6195         struct ixgbe_hw *hw = &adapter->hw;
6196         struct tc_configuration *tc;
6197         int j;
6198
6199         switch (hw->mac.type) {
6200         case ixgbe_mac_82598EB:
6201         case ixgbe_mac_82599EB:
6202                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6203                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6204                 break;
6205         case ixgbe_mac_X540:
6206         case ixgbe_mac_X550:
6207                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6208                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6209                 break;
6210         case ixgbe_mac_X550EM_x:
6211         case ixgbe_mac_x550em_a:
6212         default:
6213                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6214                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6215                 break;
6216         }
6217
6218         /* Configure DCB traffic classes */
6219         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6220                 tc = &adapter->dcb_cfg.tc_config[j];
6221                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6222                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6223                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6224                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6225                 tc->dcb_pfc = pfc_disabled;
6226         }
6227
6228         /* Initialize default user to priority mapping, UPx->TC0 */
6229         tc = &adapter->dcb_cfg.tc_config[0];
6230         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6231         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6232
6233         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6234         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6235         adapter->dcb_cfg.pfc_mode_enable = false;
6236         adapter->dcb_set_bitmap = 0x00;
6237         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6238                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6239         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6240                sizeof(adapter->temp_dcb_cfg));
6241 }
6242 #endif
6243
6244 /**
6245  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6246  * @adapter: board private structure to initialize
6247  * @ii: pointer to ixgbe_info for device
6248  *
6249  * ixgbe_sw_init initializes the Adapter private data structure.
6250  * Fields are initialized based on PCI device information and
6251  * OS network device settings (MTU size).
6252  **/
6253 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6254                          const struct ixgbe_info *ii)
6255 {
6256         struct ixgbe_hw *hw = &adapter->hw;
6257         struct pci_dev *pdev = adapter->pdev;
6258         unsigned int rss, fdir;
6259         u32 fwsm;
6260         int i;
6261
6262         /* PCI config space info */
6263
6264         hw->vendor_id = pdev->vendor;
6265         hw->device_id = pdev->device;
6266         hw->revision_id = pdev->revision;
6267         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6268         hw->subsystem_device_id = pdev->subsystem_device;
6269
6270         /* get_invariants needs the device IDs */
6271         ii->get_invariants(hw);
6272
6273         /* Set common capability flags and settings */
6274         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6275         adapter->ring_feature[RING_F_RSS].limit = rss;
6276         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6277         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6278         adapter->atr_sample_rate = 20;
6279         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6280         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6281         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6282         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6283 #ifdef CONFIG_IXGBE_DCA
6284         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6285 #endif
6286 #ifdef CONFIG_IXGBE_DCB
6287         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6288         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6289 #endif
6290 #ifdef IXGBE_FCOE
6291         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6292         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6293 #ifdef CONFIG_IXGBE_DCB
6294         /* Default traffic class to use for FCoE */
6295         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6296 #endif /* CONFIG_IXGBE_DCB */
6297 #endif /* IXGBE_FCOE */
6298
6299         /* initialize static ixgbe jump table entries */
6300         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6301                                           GFP_KERNEL);
6302         if (!adapter->jump_tables[0])
6303                 return -ENOMEM;
6304         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6305
6306         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6307                 adapter->jump_tables[i] = NULL;
6308
6309         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6310                                      sizeof(struct ixgbe_mac_addr),
6311                                      GFP_KERNEL);
6312         if (!adapter->mac_table)
6313                 return -ENOMEM;
6314
6315         if (ixgbe_init_rss_key(adapter))
6316                 return -ENOMEM;
6317
6318         adapter->af_xdp_zc_qps = bitmap_zalloc(MAX_XDP_QUEUES, GFP_KERNEL);
6319         if (!adapter->af_xdp_zc_qps)
6320                 return -ENOMEM;
6321
6322         /* Set MAC specific capability flags and exceptions */
6323         switch (hw->mac.type) {
6324         case ixgbe_mac_82598EB:
6325                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6326
6327                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6328                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6329
6330                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6331                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6332                 adapter->atr_sample_rate = 0;
6333                 adapter->fdir_pballoc = 0;
6334 #ifdef IXGBE_FCOE
6335                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6336                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6337 #ifdef CONFIG_IXGBE_DCB
6338                 adapter->fcoe.up = 0;
6339 #endif /* IXGBE_DCB */
6340 #endif /* IXGBE_FCOE */
6341                 break;
6342         case ixgbe_mac_82599EB:
6343                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6344                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6345                 break;
6346         case ixgbe_mac_X540:
6347                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6348                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6349                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6350                 break;
6351         case ixgbe_mac_x550em_a:
6352                 switch (hw->device_id) {
6353                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6354                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6355                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6356                         break;
6357                 default:
6358                         break;
6359                 }
6360                 fallthrough;
6361         case ixgbe_mac_X550EM_x:
6362 #ifdef CONFIG_IXGBE_DCB
6363                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6364 #endif
6365 #ifdef IXGBE_FCOE
6366                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6367 #ifdef CONFIG_IXGBE_DCB
6368                 adapter->fcoe.up = 0;
6369 #endif /* IXGBE_DCB */
6370 #endif /* IXGBE_FCOE */
6371                 fallthrough;
6372         case ixgbe_mac_X550:
6373                 if (hw->mac.type == ixgbe_mac_X550)
6374                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6375 #ifdef CONFIG_IXGBE_DCA
6376                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6377 #endif
6378                 break;
6379         default:
6380                 break;
6381         }
6382
6383 #ifdef IXGBE_FCOE
6384         /* FCoE support exists, always init the FCoE lock */
6385         spin_lock_init(&adapter->fcoe.lock);
6386
6387 #endif
6388         /* n-tuple support exists, always init our spinlock */
6389         spin_lock_init(&adapter->fdir_perfect_lock);
6390
6391 #ifdef CONFIG_IXGBE_DCB
6392         ixgbe_init_dcb(adapter);
6393 #endif
6394         ixgbe_init_ipsec_offload(adapter);
6395
6396         /* default flow control settings */
6397         hw->fc.requested_mode = ixgbe_fc_full;
6398         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6399         ixgbe_pbthresh_setup(adapter);
6400         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6401         hw->fc.send_xon = true;
6402         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6403
6404 #ifdef CONFIG_PCI_IOV
6405         if (max_vfs > 0)
6406                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6407
6408         /* assign number of SR-IOV VFs */
6409         if (hw->mac.type != ixgbe_mac_82598EB) {
6410                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6411                         max_vfs = 0;
6412                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6413                 }
6414         }
6415 #endif /* CONFIG_PCI_IOV */
6416
6417         /* enable itr by default in dynamic mode */
6418         adapter->rx_itr_setting = 1;
6419         adapter->tx_itr_setting = 1;
6420
6421         /* set default ring sizes */
6422         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6423         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6424
6425         /* set default work limits */
6426         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6427
6428         /* initialize eeprom parameters */
6429         if (ixgbe_init_eeprom_params_generic(hw)) {
6430                 e_dev_err("EEPROM initialization failed\n");
6431                 return -EIO;
6432         }
6433
6434         /* PF holds first pool slot */
6435         set_bit(0, adapter->fwd_bitmask);
6436         set_bit(__IXGBE_DOWN, &adapter->state);
6437
6438         return 0;
6439 }
6440
6441 /**
6442  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6443  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6444  *
6445  * Return 0 on success, negative on failure
6446  **/
6447 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6448 {
6449         struct device *dev = tx_ring->dev;
6450         int orig_node = dev_to_node(dev);
6451         int ring_node = NUMA_NO_NODE;
6452         int size;
6453
6454         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6455
6456         if (tx_ring->q_vector)
6457                 ring_node = tx_ring->q_vector->numa_node;
6458
6459         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6460         if (!tx_ring->tx_buffer_info)
6461                 tx_ring->tx_buffer_info = vmalloc(size);
6462         if (!tx_ring->tx_buffer_info)
6463                 goto err;
6464
6465         /* round up to nearest 4K */
6466         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6467         tx_ring->size = ALIGN(tx_ring->size, 4096);
6468
6469         set_dev_node(dev, ring_node);
6470         tx_ring->desc = dma_alloc_coherent(dev,
6471                                            tx_ring->size,
6472                                            &tx_ring->dma,
6473                                            GFP_KERNEL);
6474         set_dev_node(dev, orig_node);
6475         if (!tx_ring->desc)
6476                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6477                                                    &tx_ring->dma, GFP_KERNEL);
6478         if (!tx_ring->desc)
6479                 goto err;
6480
6481         tx_ring->next_to_use = 0;
6482         tx_ring->next_to_clean = 0;
6483         return 0;
6484
6485 err:
6486         vfree(tx_ring->tx_buffer_info);
6487         tx_ring->tx_buffer_info = NULL;
6488         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6489         return -ENOMEM;
6490 }
6491
6492 /**
6493  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6494  * @adapter: board private structure
6495  *
6496  * If this function returns with an error, then it's possible one or
6497  * more of the rings is populated (while the rest are not).  It is the
6498  * callers duty to clean those orphaned rings.
6499  *
6500  * Return 0 on success, negative on failure
6501  **/
6502 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6503 {
6504         int i, j = 0, err = 0;
6505
6506         for (i = 0; i < adapter->num_tx_queues; i++) {
6507                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6508                 if (!err)
6509                         continue;
6510
6511                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6512                 goto err_setup_tx;
6513         }
6514         for (j = 0; j < adapter->num_xdp_queues; j++) {
6515                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6516                 if (!err)
6517                         continue;
6518
6519                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6520                 goto err_setup_tx;
6521         }
6522
6523         return 0;
6524 err_setup_tx:
6525         /* rewind the index freeing the rings as we go */
6526         while (j--)
6527                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6528         while (i--)
6529                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6530         return err;
6531 }
6532
6533 /**
6534  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6535  * @adapter: pointer to ixgbe_adapter
6536  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6537  *
6538  * Returns 0 on success, negative on failure
6539  **/
6540 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6541                              struct ixgbe_ring *rx_ring)
6542 {
6543         struct device *dev = rx_ring->dev;
6544         int orig_node = dev_to_node(dev);
6545         int ring_node = NUMA_NO_NODE;
6546         int size;
6547
6548         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6549
6550         if (rx_ring->q_vector)
6551                 ring_node = rx_ring->q_vector->numa_node;
6552
6553         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6554         if (!rx_ring->rx_buffer_info)
6555                 rx_ring->rx_buffer_info = vmalloc(size);
6556         if (!rx_ring->rx_buffer_info)
6557                 goto err;
6558
6559         /* Round up to nearest 4K */
6560         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6561         rx_ring->size = ALIGN(rx_ring->size, 4096);
6562
6563         set_dev_node(dev, ring_node);
6564         rx_ring->desc = dma_alloc_coherent(dev,
6565                                            rx_ring->size,
6566                                            &rx_ring->dma,
6567                                            GFP_KERNEL);
6568         set_dev_node(dev, orig_node);
6569         if (!rx_ring->desc)
6570                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6571                                                    &rx_ring->dma, GFP_KERNEL);
6572         if (!rx_ring->desc)
6573                 goto err;
6574
6575         rx_ring->next_to_clean = 0;
6576         rx_ring->next_to_use = 0;
6577
6578         /* XDP RX-queue info */
6579         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6580                              rx_ring->queue_index) < 0)
6581                 goto err;
6582
6583         rx_ring->xdp_prog = adapter->xdp_prog;
6584
6585         return 0;
6586 err:
6587         vfree(rx_ring->rx_buffer_info);
6588         rx_ring->rx_buffer_info = NULL;
6589         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6590         return -ENOMEM;
6591 }
6592
6593 /**
6594  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6595  * @adapter: board private structure
6596  *
6597  * If this function returns with an error, then it's possible one or
6598  * more of the rings is populated (while the rest are not).  It is the
6599  * callers duty to clean those orphaned rings.
6600  *
6601  * Return 0 on success, negative on failure
6602  **/
6603 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6604 {
6605         int i, err = 0;
6606
6607         for (i = 0; i < adapter->num_rx_queues; i++) {
6608                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6609                 if (!err)
6610                         continue;
6611
6612                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6613                 goto err_setup_rx;
6614         }
6615
6616 #ifdef IXGBE_FCOE
6617         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6618         if (!err)
6619 #endif
6620                 return 0;
6621 err_setup_rx:
6622         /* rewind the index freeing the rings as we go */
6623         while (i--)
6624                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6625         return err;
6626 }
6627
6628 /**
6629  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6630  * @tx_ring: Tx descriptor ring for a specific queue
6631  *
6632  * Free all transmit software resources
6633  **/
6634 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6635 {
6636         ixgbe_clean_tx_ring(tx_ring);
6637
6638         vfree(tx_ring->tx_buffer_info);
6639         tx_ring->tx_buffer_info = NULL;
6640
6641         /* if not set, then don't free */
6642         if (!tx_ring->desc)
6643                 return;
6644
6645         dma_free_coherent(tx_ring->dev, tx_ring->size,
6646                           tx_ring->desc, tx_ring->dma);
6647
6648         tx_ring->desc = NULL;
6649 }
6650
6651 /**
6652  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6653  * @adapter: board private structure
6654  *
6655  * Free all transmit software resources
6656  **/
6657 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6658 {
6659         int i;
6660
6661         for (i = 0; i < adapter->num_tx_queues; i++)
6662                 if (adapter->tx_ring[i]->desc)
6663                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6664         for (i = 0; i < adapter->num_xdp_queues; i++)
6665                 if (adapter->xdp_ring[i]->desc)
6666                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6667 }
6668
6669 /**
6670  * ixgbe_free_rx_resources - Free Rx Resources
6671  * @rx_ring: ring to clean the resources from
6672  *
6673  * Free all receive software resources
6674  **/
6675 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6676 {
6677         ixgbe_clean_rx_ring(rx_ring);
6678
6679         rx_ring->xdp_prog = NULL;
6680         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6681         vfree(rx_ring->rx_buffer_info);
6682         rx_ring->rx_buffer_info = NULL;
6683
6684         /* if not set, then don't free */
6685         if (!rx_ring->desc)
6686                 return;
6687
6688         dma_free_coherent(rx_ring->dev, rx_ring->size,
6689                           rx_ring->desc, rx_ring->dma);
6690
6691         rx_ring->desc = NULL;
6692 }
6693
6694 /**
6695  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6696  * @adapter: board private structure
6697  *
6698  * Free all receive software resources
6699  **/
6700 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6701 {
6702         int i;
6703
6704 #ifdef IXGBE_FCOE
6705         ixgbe_free_fcoe_ddp_resources(adapter);
6706
6707 #endif
6708         for (i = 0; i < adapter->num_rx_queues; i++)
6709                 if (adapter->rx_ring[i]->desc)
6710                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6711 }
6712
6713 /**
6714  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6715  * @netdev: network interface device structure
6716  * @new_mtu: new value for maximum frame size
6717  *
6718  * Returns 0 on success, negative on failure
6719  **/
6720 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6721 {
6722         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6723
6724         if (adapter->xdp_prog) {
6725                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6726                                      VLAN_HLEN;
6727                 int i;
6728
6729                 for (i = 0; i < adapter->num_rx_queues; i++) {
6730                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6731
6732                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6733                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6734                                 return -EINVAL;
6735                         }
6736                 }
6737         }
6738
6739         /*
6740          * For 82599EB we cannot allow legacy VFs to enable their receive
6741          * paths when MTU greater than 1500 is configured.  So display a
6742          * warning that legacy VFs will be disabled.
6743          */
6744         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6745             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6746             (new_mtu > ETH_DATA_LEN))
6747                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6748
6749         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6750                    netdev->mtu, new_mtu);
6751
6752         /* must set new MTU before calling down or up */
6753         netdev->mtu = new_mtu;
6754
6755         if (netif_running(netdev))
6756                 ixgbe_reinit_locked(adapter);
6757
6758         return 0;
6759 }
6760
6761 /**
6762  * ixgbe_open - Called when a network interface is made active
6763  * @netdev: network interface device structure
6764  *
6765  * Returns 0 on success, negative value on failure
6766  *
6767  * The open entry point is called when a network interface is made
6768  * active by the system (IFF_UP).  At this point all resources needed
6769  * for transmit and receive operations are allocated, the interrupt
6770  * handler is registered with the OS, the watchdog timer is started,
6771  * and the stack is notified that the interface is ready.
6772  **/
6773 int ixgbe_open(struct net_device *netdev)
6774 {
6775         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6776         struct ixgbe_hw *hw = &adapter->hw;
6777         int err, queues;
6778
6779         /* disallow open during test */
6780         if (test_bit(__IXGBE_TESTING, &adapter->state))
6781                 return -EBUSY;
6782
6783         netif_carrier_off(netdev);
6784
6785         /* allocate transmit descriptors */
6786         err = ixgbe_setup_all_tx_resources(adapter);
6787         if (err)
6788                 goto err_setup_tx;
6789
6790         /* allocate receive descriptors */
6791         err = ixgbe_setup_all_rx_resources(adapter);
6792         if (err)
6793                 goto err_setup_rx;
6794
6795         ixgbe_configure(adapter);
6796
6797         err = ixgbe_request_irq(adapter);
6798         if (err)
6799                 goto err_req_irq;
6800
6801         /* Notify the stack of the actual queue counts. */
6802         queues = adapter->num_tx_queues;
6803         err = netif_set_real_num_tx_queues(netdev, queues);
6804         if (err)
6805                 goto err_set_queues;
6806
6807         queues = adapter->num_rx_queues;
6808         err = netif_set_real_num_rx_queues(netdev, queues);
6809         if (err)
6810                 goto err_set_queues;
6811
6812         ixgbe_ptp_init(adapter);
6813
6814         ixgbe_up_complete(adapter);
6815
6816         udp_tunnel_nic_reset_ntf(netdev);
6817
6818         return 0;
6819
6820 err_set_queues:
6821         ixgbe_free_irq(adapter);
6822 err_req_irq:
6823         ixgbe_free_all_rx_resources(adapter);
6824         if (hw->phy.ops.set_phy_power && !adapter->wol)
6825                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6826 err_setup_rx:
6827         ixgbe_free_all_tx_resources(adapter);
6828 err_setup_tx:
6829         ixgbe_reset(adapter);
6830
6831         return err;
6832 }
6833
6834 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6835 {
6836         ixgbe_ptp_suspend(adapter);
6837
6838         if (adapter->hw.phy.ops.enter_lplu) {
6839                 adapter->hw.phy.reset_disable = true;
6840                 ixgbe_down(adapter);
6841                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6842                 adapter->hw.phy.reset_disable = false;
6843         } else {
6844                 ixgbe_down(adapter);
6845         }
6846
6847         ixgbe_free_irq(adapter);
6848
6849         ixgbe_free_all_tx_resources(adapter);
6850         ixgbe_free_all_rx_resources(adapter);
6851 }
6852
6853 /**
6854  * ixgbe_close - Disables a network interface
6855  * @netdev: network interface device structure
6856  *
6857  * Returns 0, this is not allowed to fail
6858  *
6859  * The close entry point is called when an interface is de-activated
6860  * by the OS.  The hardware is still under the drivers control, but
6861  * needs to be disabled.  A global MAC reset is issued to stop the
6862  * hardware, and all transmit and receive resources are freed.
6863  **/
6864 int ixgbe_close(struct net_device *netdev)
6865 {
6866         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6867
6868         ixgbe_ptp_stop(adapter);
6869
6870         if (netif_device_present(netdev))
6871                 ixgbe_close_suspend(adapter);
6872
6873         ixgbe_fdir_filter_exit(adapter);
6874
6875         ixgbe_release_hw_control(adapter);
6876
6877         return 0;
6878 }
6879
6880 #ifdef CONFIG_PM
6881 static int ixgbe_resume(struct pci_dev *pdev)
6882 {
6883         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6884         struct net_device *netdev = adapter->netdev;
6885         u32 err;
6886
6887         adapter->hw.hw_addr = adapter->io_addr;
6888         pci_set_power_state(pdev, PCI_D0);
6889         pci_restore_state(pdev);
6890         /*
6891          * pci_restore_state clears dev->state_saved so call
6892          * pci_save_state to restore it.
6893          */
6894         pci_save_state(pdev);
6895
6896         err = pci_enable_device_mem(pdev);
6897         if (err) {
6898                 e_dev_err("Cannot enable PCI device from suspend\n");
6899                 return err;
6900         }
6901         smp_mb__before_atomic();
6902         clear_bit(__IXGBE_DISABLED, &adapter->state);
6903         pci_set_master(pdev);
6904
6905         pci_wake_from_d3(pdev, false);
6906
6907         ixgbe_reset(adapter);
6908
6909         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6910
6911         rtnl_lock();
6912         err = ixgbe_init_interrupt_scheme(adapter);
6913         if (!err && netif_running(netdev))
6914                 err = ixgbe_open(netdev);
6915
6916
6917         if (!err)
6918                 netif_device_attach(netdev);
6919         rtnl_unlock();
6920
6921         return err;
6922 }
6923 #endif /* CONFIG_PM */
6924
6925 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6926 {
6927         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6928         struct net_device *netdev = adapter->netdev;
6929         struct ixgbe_hw *hw = &adapter->hw;
6930         u32 ctrl;
6931         u32 wufc = adapter->wol;
6932 #ifdef CONFIG_PM
6933         int retval = 0;
6934 #endif
6935
6936         rtnl_lock();
6937         netif_device_detach(netdev);
6938
6939         if (netif_running(netdev))
6940                 ixgbe_close_suspend(adapter);
6941
6942         ixgbe_clear_interrupt_scheme(adapter);
6943         rtnl_unlock();
6944
6945 #ifdef CONFIG_PM
6946         retval = pci_save_state(pdev);
6947         if (retval)
6948                 return retval;
6949
6950 #endif
6951         if (hw->mac.ops.stop_link_on_d3)
6952                 hw->mac.ops.stop_link_on_d3(hw);
6953
6954         if (wufc) {
6955                 u32 fctrl;
6956
6957                 ixgbe_set_rx_mode(netdev);
6958
6959                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6960                 if (hw->mac.ops.enable_tx_laser)
6961                         hw->mac.ops.enable_tx_laser(hw);
6962
6963                 /* enable the reception of multicast packets */
6964                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6965                 fctrl |= IXGBE_FCTRL_MPE;
6966                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6967
6968                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6969                 ctrl |= IXGBE_CTRL_GIO_DIS;
6970                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6971
6972                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6973         } else {
6974                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6975                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6976         }
6977
6978         switch (hw->mac.type) {
6979         case ixgbe_mac_82598EB:
6980                 pci_wake_from_d3(pdev, false);
6981                 break;
6982         case ixgbe_mac_82599EB:
6983         case ixgbe_mac_X540:
6984         case ixgbe_mac_X550:
6985         case ixgbe_mac_X550EM_x:
6986         case ixgbe_mac_x550em_a:
6987                 pci_wake_from_d3(pdev, !!wufc);
6988                 break;
6989         default:
6990                 break;
6991         }
6992
6993         *enable_wake = !!wufc;
6994         if (hw->phy.ops.set_phy_power && !*enable_wake)
6995                 hw->phy.ops.set_phy_power(hw, false);
6996
6997         ixgbe_release_hw_control(adapter);
6998
6999         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
7000                 pci_disable_device(pdev);
7001
7002         return 0;
7003 }
7004
7005 #ifdef CONFIG_PM
7006 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
7007 {
7008         int retval;
7009         bool wake;
7010
7011         retval = __ixgbe_shutdown(pdev, &wake);
7012         if (retval)
7013                 return retval;
7014
7015         if (wake) {
7016                 pci_prepare_to_sleep(pdev);
7017         } else {
7018                 pci_wake_from_d3(pdev, false);
7019                 pci_set_power_state(pdev, PCI_D3hot);
7020         }
7021
7022         return 0;
7023 }
7024 #endif /* CONFIG_PM */
7025
7026 static void ixgbe_shutdown(struct pci_dev *pdev)
7027 {
7028         bool wake;
7029
7030         __ixgbe_shutdown(pdev, &wake);
7031
7032         if (system_state == SYSTEM_POWER_OFF) {
7033                 pci_wake_from_d3(pdev, wake);
7034                 pci_set_power_state(pdev, PCI_D3hot);
7035         }
7036 }
7037
7038 /**
7039  * ixgbe_update_stats - Update the board statistics counters.
7040  * @adapter: board private structure
7041  **/
7042 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7043 {
7044         struct net_device *netdev = adapter->netdev;
7045         struct ixgbe_hw *hw = &adapter->hw;
7046         struct ixgbe_hw_stats *hwstats = &adapter->stats;
7047         u64 total_mpc = 0;
7048         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7049         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7050         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7051         u64 alloc_rx_page = 0;
7052         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7053
7054         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7055             test_bit(__IXGBE_RESETTING, &adapter->state))
7056                 return;
7057
7058         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7059                 u64 rsc_count = 0;
7060                 u64 rsc_flush = 0;
7061                 for (i = 0; i < adapter->num_rx_queues; i++) {
7062                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7063                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7064                 }
7065                 adapter->rsc_total_count = rsc_count;
7066                 adapter->rsc_total_flush = rsc_flush;
7067         }
7068
7069         for (i = 0; i < adapter->num_rx_queues; i++) {
7070                 struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]);
7071
7072                 if (!rx_ring)
7073                         continue;
7074                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7075                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7076                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7077                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7078                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7079                 bytes += rx_ring->stats.bytes;
7080                 packets += rx_ring->stats.packets;
7081         }
7082         adapter->non_eop_descs = non_eop_descs;
7083         adapter->alloc_rx_page = alloc_rx_page;
7084         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7085         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7086         adapter->hw_csum_rx_error = hw_csum_rx_error;
7087         netdev->stats.rx_bytes = bytes;
7088         netdev->stats.rx_packets = packets;
7089
7090         bytes = 0;
7091         packets = 0;
7092         /* gather some stats to the adapter struct that are per queue */
7093         for (i = 0; i < adapter->num_tx_queues; i++) {
7094                 struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]);
7095
7096                 if (!tx_ring)
7097                         continue;
7098                 restart_queue += tx_ring->tx_stats.restart_queue;
7099                 tx_busy += tx_ring->tx_stats.tx_busy;
7100                 bytes += tx_ring->stats.bytes;
7101                 packets += tx_ring->stats.packets;
7102         }
7103         for (i = 0; i < adapter->num_xdp_queues; i++) {
7104                 struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]);
7105
7106                 if (!xdp_ring)
7107                         continue;
7108                 restart_queue += xdp_ring->tx_stats.restart_queue;
7109                 tx_busy += xdp_ring->tx_stats.tx_busy;
7110                 bytes += xdp_ring->stats.bytes;
7111                 packets += xdp_ring->stats.packets;
7112         }
7113         adapter->restart_queue = restart_queue;
7114         adapter->tx_busy = tx_busy;
7115         netdev->stats.tx_bytes = bytes;
7116         netdev->stats.tx_packets = packets;
7117
7118         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7119
7120         /* 8 register reads */
7121         for (i = 0; i < 8; i++) {
7122                 /* for packet buffers not used, the register should read 0 */
7123                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7124                 missed_rx += mpc;
7125                 hwstats->mpc[i] += mpc;
7126                 total_mpc += hwstats->mpc[i];
7127                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7128                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7129                 switch (hw->mac.type) {
7130                 case ixgbe_mac_82598EB:
7131                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7132                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7133                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7134                         hwstats->pxonrxc[i] +=
7135                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7136                         break;
7137                 case ixgbe_mac_82599EB:
7138                 case ixgbe_mac_X540:
7139                 case ixgbe_mac_X550:
7140                 case ixgbe_mac_X550EM_x:
7141                 case ixgbe_mac_x550em_a:
7142                         hwstats->pxonrxc[i] +=
7143                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7144                         break;
7145                 default:
7146                         break;
7147                 }
7148         }
7149
7150         /*16 register reads */
7151         for (i = 0; i < 16; i++) {
7152                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7153                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7154                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7155                     (hw->mac.type == ixgbe_mac_X540) ||
7156                     (hw->mac.type == ixgbe_mac_X550) ||
7157                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7158                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7159                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7160                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7161                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7162                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7163                 }
7164         }
7165
7166         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7167         /* work around hardware counting issue */
7168         hwstats->gprc -= missed_rx;
7169
7170         ixgbe_update_xoff_received(adapter);
7171
7172         /* 82598 hardware only has a 32 bit counter in the high register */
7173         switch (hw->mac.type) {
7174         case ixgbe_mac_82598EB:
7175                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7176                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7177                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7178                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7179                 break;
7180         case ixgbe_mac_X540:
7181         case ixgbe_mac_X550:
7182         case ixgbe_mac_X550EM_x:
7183         case ixgbe_mac_x550em_a:
7184                 /* OS2BMC stats are X540 and later */
7185                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7186                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7187                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7188                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7189                 fallthrough;
7190         case ixgbe_mac_82599EB:
7191                 for (i = 0; i < 16; i++)
7192                         adapter->hw_rx_no_dma_resources +=
7193                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7194                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7195                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7196                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7197                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7198                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7199                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7200                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7201                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7202                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7203 #ifdef IXGBE_FCOE
7204                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7205                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7206                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7207                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7208                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7209                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7210                 /* Add up per cpu counters for total ddp aloc fail */
7211                 if (adapter->fcoe.ddp_pool) {
7212                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7213                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7214                         unsigned int cpu;
7215                         u64 noddp = 0, noddp_ext_buff = 0;
7216                         for_each_possible_cpu(cpu) {
7217                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7218                                 noddp += ddp_pool->noddp;
7219                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7220                         }
7221                         hwstats->fcoe_noddp = noddp;
7222                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7223                 }
7224 #endif /* IXGBE_FCOE */
7225                 break;
7226         default:
7227                 break;
7228         }
7229         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7230         hwstats->bprc += bprc;
7231         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7232         if (hw->mac.type == ixgbe_mac_82598EB)
7233                 hwstats->mprc -= bprc;
7234         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7235         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7236         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7237         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7238         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7239         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7240         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7241         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7242         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7243         hwstats->lxontxc += lxon;
7244         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7245         hwstats->lxofftxc += lxoff;
7246         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7247         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7248         /*
7249          * 82598 errata - tx of flow control packets is included in tx counters
7250          */
7251         xon_off_tot = lxon + lxoff;
7252         hwstats->gptc -= xon_off_tot;
7253         hwstats->mptc -= xon_off_tot;
7254         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7255         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7256         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7257         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7258         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7259         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7260         hwstats->ptc64 -= xon_off_tot;
7261         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7262         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7263         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7264         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7265         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7266         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7267
7268         /* Fill out the OS statistics structure */
7269         netdev->stats.multicast = hwstats->mprc;
7270
7271         /* Rx Errors */
7272         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7273         netdev->stats.rx_dropped = 0;
7274         netdev->stats.rx_length_errors = hwstats->rlec;
7275         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7276         netdev->stats.rx_missed_errors = total_mpc;
7277 }
7278
7279 /**
7280  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7281  * @adapter: pointer to the device adapter structure
7282  **/
7283 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7284 {
7285         struct ixgbe_hw *hw = &adapter->hw;
7286         int i;
7287
7288         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7289                 return;
7290
7291         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7292
7293         /* if interface is down do nothing */
7294         if (test_bit(__IXGBE_DOWN, &adapter->state))
7295                 return;
7296
7297         /* do nothing if we are not using signature filters */
7298         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7299                 return;
7300
7301         adapter->fdir_overflow++;
7302
7303         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7304                 for (i = 0; i < adapter->num_tx_queues; i++)
7305                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7306                                 &(adapter->tx_ring[i]->state));
7307                 for (i = 0; i < adapter->num_xdp_queues; i++)
7308                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7309                                 &adapter->xdp_ring[i]->state);
7310                 /* re-enable flow director interrupts */
7311                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7312         } else {
7313                 e_err(probe, "failed to finish FDIR re-initialization, "
7314                       "ignored adding FDIR ATR filters\n");
7315         }
7316 }
7317
7318 /**
7319  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7320  * @adapter: pointer to the device adapter structure
7321  *
7322  * This function serves two purposes.  First it strobes the interrupt lines
7323  * in order to make certain interrupts are occurring.  Secondly it sets the
7324  * bits needed to check for TX hangs.  As a result we should immediately
7325  * determine if a hang has occurred.
7326  */
7327 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7328 {
7329         struct ixgbe_hw *hw = &adapter->hw;
7330         u64 eics = 0;
7331         int i;
7332
7333         /* If we're down, removing or resetting, just bail */
7334         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7335             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7336             test_bit(__IXGBE_RESETTING, &adapter->state))
7337                 return;
7338
7339         /* Force detection of hung controller */
7340         if (netif_carrier_ok(adapter->netdev)) {
7341                 for (i = 0; i < adapter->num_tx_queues; i++)
7342                         set_check_for_tx_hang(adapter->tx_ring[i]);
7343                 for (i = 0; i < adapter->num_xdp_queues; i++)
7344                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7345         }
7346
7347         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7348                 /*
7349                  * for legacy and MSI interrupts don't set any bits
7350                  * that are enabled for EIAM, because this operation
7351                  * would set *both* EIMS and EICS for any bit in EIAM
7352                  */
7353                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7354                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7355         } else {
7356                 /* get one bit for every active tx/rx interrupt vector */
7357                 for (i = 0; i < adapter->num_q_vectors; i++) {
7358                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7359                         if (qv->rx.ring || qv->tx.ring)
7360                                 eics |= BIT_ULL(i);
7361                 }
7362         }
7363
7364         /* Cause software interrupt to ensure rings are cleaned */
7365         ixgbe_irq_rearm_queues(adapter, eics);
7366 }
7367
7368 /**
7369  * ixgbe_watchdog_update_link - update the link status
7370  * @adapter: pointer to the device adapter structure
7371  **/
7372 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7373 {
7374         struct ixgbe_hw *hw = &adapter->hw;
7375         u32 link_speed = adapter->link_speed;
7376         bool link_up = adapter->link_up;
7377         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7378
7379         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7380                 return;
7381
7382         if (hw->mac.ops.check_link) {
7383                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7384         } else {
7385                 /* always assume link is up, if no check link function */
7386                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7387                 link_up = true;
7388         }
7389
7390         if (adapter->ixgbe_ieee_pfc)
7391                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7392
7393         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7394                 hw->mac.ops.fc_enable(hw);
7395                 ixgbe_set_rx_drop_en(adapter);
7396         }
7397
7398         if (link_up ||
7399             time_after(jiffies, (adapter->link_check_timeout +
7400                                  IXGBE_TRY_LINK_TIMEOUT))) {
7401                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7402                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7403                 IXGBE_WRITE_FLUSH(hw);
7404         }
7405
7406         adapter->link_up = link_up;
7407         adapter->link_speed = link_speed;
7408 }
7409
7410 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7411 {
7412 #ifdef CONFIG_IXGBE_DCB
7413         struct net_device *netdev = adapter->netdev;
7414         struct dcb_app app = {
7415                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7416                               .protocol = 0,
7417                              };
7418         u8 up = 0;
7419
7420         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7421                 up = dcb_ieee_getapp_mask(netdev, &app);
7422
7423         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7424 #endif
7425 }
7426
7427 /**
7428  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7429  *                             print link up message
7430  * @adapter: pointer to the device adapter structure
7431  **/
7432 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7433 {
7434         struct net_device *netdev = adapter->netdev;
7435         struct ixgbe_hw *hw = &adapter->hw;
7436         u32 link_speed = adapter->link_speed;
7437         const char *speed_str;
7438         bool flow_rx, flow_tx;
7439
7440         /* only continue if link was previously down */
7441         if (netif_carrier_ok(netdev))
7442                 return;
7443
7444         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7445
7446         switch (hw->mac.type) {
7447         case ixgbe_mac_82598EB: {
7448                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7449                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7450                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7451                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7452         }
7453                 break;
7454         case ixgbe_mac_X540:
7455         case ixgbe_mac_X550:
7456         case ixgbe_mac_X550EM_x:
7457         case ixgbe_mac_x550em_a:
7458         case ixgbe_mac_82599EB: {
7459                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7460                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7461                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7462                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7463         }
7464                 break;
7465         default:
7466                 flow_tx = false;
7467                 flow_rx = false;
7468                 break;
7469         }
7470
7471         adapter->last_rx_ptp_check = jiffies;
7472
7473         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7474                 ixgbe_ptp_start_cyclecounter(adapter);
7475
7476         switch (link_speed) {
7477         case IXGBE_LINK_SPEED_10GB_FULL:
7478                 speed_str = "10 Gbps";
7479                 break;
7480         case IXGBE_LINK_SPEED_5GB_FULL:
7481                 speed_str = "5 Gbps";
7482                 break;
7483         case IXGBE_LINK_SPEED_2_5GB_FULL:
7484                 speed_str = "2.5 Gbps";
7485                 break;
7486         case IXGBE_LINK_SPEED_1GB_FULL:
7487                 speed_str = "1 Gbps";
7488                 break;
7489         case IXGBE_LINK_SPEED_100_FULL:
7490                 speed_str = "100 Mbps";
7491                 break;
7492         case IXGBE_LINK_SPEED_10_FULL:
7493                 speed_str = "10 Mbps";
7494                 break;
7495         default:
7496                 speed_str = "unknown speed";
7497                 break;
7498         }
7499         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7500                ((flow_rx && flow_tx) ? "RX/TX" :
7501                (flow_rx ? "RX" :
7502                (flow_tx ? "TX" : "None"))));
7503
7504         netif_carrier_on(netdev);
7505         ixgbe_check_vf_rate_limit(adapter);
7506
7507         /* enable transmits */
7508         netif_tx_wake_all_queues(adapter->netdev);
7509
7510         /* update the default user priority for VFs */
7511         ixgbe_update_default_up(adapter);
7512
7513         /* ping all the active vfs to let them know link has changed */
7514         ixgbe_ping_all_vfs(adapter);
7515 }
7516
7517 /**
7518  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7519  *                               print link down message
7520  * @adapter: pointer to the adapter structure
7521  **/
7522 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7523 {
7524         struct net_device *netdev = adapter->netdev;
7525         struct ixgbe_hw *hw = &adapter->hw;
7526
7527         adapter->link_up = false;
7528         adapter->link_speed = 0;
7529
7530         /* only continue if link was up previously */
7531         if (!netif_carrier_ok(netdev))
7532                 return;
7533
7534         /* poll for SFP+ cable when link is down */
7535         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7536                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7537
7538         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7539                 ixgbe_ptp_start_cyclecounter(adapter);
7540
7541         e_info(drv, "NIC Link is Down\n");
7542         netif_carrier_off(netdev);
7543
7544         /* ping all the active vfs to let them know link has changed */
7545         ixgbe_ping_all_vfs(adapter);
7546 }
7547
7548 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7549 {
7550         int i;
7551
7552         for (i = 0; i < adapter->num_tx_queues; i++) {
7553                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7554
7555                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7556                         return true;
7557         }
7558
7559         for (i = 0; i < adapter->num_xdp_queues; i++) {
7560                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7561
7562                 if (ring->next_to_use != ring->next_to_clean)
7563                         return true;
7564         }
7565
7566         return false;
7567 }
7568
7569 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7570 {
7571         struct ixgbe_hw *hw = &adapter->hw;
7572         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7573         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7574
7575         int i, j;
7576
7577         if (!adapter->num_vfs)
7578                 return false;
7579
7580         /* resetting the PF is only needed for MAC before X550 */
7581         if (hw->mac.type >= ixgbe_mac_X550)
7582                 return false;
7583
7584         for (i = 0; i < adapter->num_vfs; i++) {
7585                 for (j = 0; j < q_per_pool; j++) {
7586                         u32 h, t;
7587
7588                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7589                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7590
7591                         if (h != t)
7592                                 return true;
7593                 }
7594         }
7595
7596         return false;
7597 }
7598
7599 /**
7600  * ixgbe_watchdog_flush_tx - flush queues on link down
7601  * @adapter: pointer to the device adapter structure
7602  **/
7603 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7604 {
7605         if (!netif_carrier_ok(adapter->netdev)) {
7606                 if (ixgbe_ring_tx_pending(adapter) ||
7607                     ixgbe_vf_tx_pending(adapter)) {
7608                         /* We've lost link, so the controller stops DMA,
7609                          * but we've got queued Tx work that's never going
7610                          * to get done, so reset controller to flush Tx.
7611                          * (Do the reset outside of interrupt context).
7612                          */
7613                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7614                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7615                 }
7616         }
7617 }
7618
7619 #ifdef CONFIG_PCI_IOV
7620 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7621 {
7622         struct ixgbe_hw *hw = &adapter->hw;
7623         struct pci_dev *pdev = adapter->pdev;
7624         unsigned int vf;
7625         u32 gpc;
7626
7627         if (!(netif_carrier_ok(adapter->netdev)))
7628                 return;
7629
7630         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7631         if (gpc) /* If incrementing then no need for the check below */
7632                 return;
7633         /* Check to see if a bad DMA write target from an errant or
7634          * malicious VF has caused a PCIe error.  If so then we can
7635          * issue a VFLR to the offending VF(s) and then resume without
7636          * requesting a full slot reset.
7637          */
7638
7639         if (!pdev)
7640                 return;
7641
7642         /* check status reg for all VFs owned by this PF */
7643         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7644                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7645                 u16 status_reg;
7646
7647                 if (!vfdev)
7648                         continue;
7649                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7650                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7651                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7652                         pcie_flr(vfdev);
7653         }
7654 }
7655
7656 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7657 {
7658         u32 ssvpc;
7659
7660         /* Do not perform spoof check for 82598 or if not in IOV mode */
7661         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7662             adapter->num_vfs == 0)
7663                 return;
7664
7665         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7666
7667         /*
7668          * ssvpc register is cleared on read, if zero then no
7669          * spoofed packets in the last interval.
7670          */
7671         if (!ssvpc)
7672                 return;
7673
7674         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7675 }
7676 #else
7677 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7678 {
7679 }
7680
7681 static void
7682 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7683 {
7684 }
7685 #endif /* CONFIG_PCI_IOV */
7686
7687
7688 /**
7689  * ixgbe_watchdog_subtask - check and bring link up
7690  * @adapter: pointer to the device adapter structure
7691  **/
7692 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7693 {
7694         /* if interface is down, removing or resetting, do nothing */
7695         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7696             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7697             test_bit(__IXGBE_RESETTING, &adapter->state))
7698                 return;
7699
7700         ixgbe_watchdog_update_link(adapter);
7701
7702         if (adapter->link_up)
7703                 ixgbe_watchdog_link_is_up(adapter);
7704         else
7705                 ixgbe_watchdog_link_is_down(adapter);
7706
7707         ixgbe_check_for_bad_vf(adapter);
7708         ixgbe_spoof_check(adapter);
7709         ixgbe_update_stats(adapter);
7710
7711         ixgbe_watchdog_flush_tx(adapter);
7712 }
7713
7714 /**
7715  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7716  * @adapter: the ixgbe adapter structure
7717  **/
7718 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7719 {
7720         struct ixgbe_hw *hw = &adapter->hw;
7721         s32 err;
7722
7723         /* not searching for SFP so there is nothing to do here */
7724         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7725             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7726                 return;
7727
7728         if (adapter->sfp_poll_time &&
7729             time_after(adapter->sfp_poll_time, jiffies))
7730                 return; /* If not yet time to poll for SFP */
7731
7732         /* someone else is in init, wait until next service event */
7733         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7734                 return;
7735
7736         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7737
7738         err = hw->phy.ops.identify_sfp(hw);
7739         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7740                 goto sfp_out;
7741
7742         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7743                 /* If no cable is present, then we need to reset
7744                  * the next time we find a good cable. */
7745                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7746         }
7747
7748         /* exit on error */
7749         if (err)
7750                 goto sfp_out;
7751
7752         /* exit if reset not needed */
7753         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7754                 goto sfp_out;
7755
7756         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7757
7758         /*
7759          * A module may be identified correctly, but the EEPROM may not have
7760          * support for that module.  setup_sfp() will fail in that case, so
7761          * we should not allow that module to load.
7762          */
7763         if (hw->mac.type == ixgbe_mac_82598EB)
7764                 err = hw->phy.ops.reset(hw);
7765         else
7766                 err = hw->mac.ops.setup_sfp(hw);
7767
7768         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7769                 goto sfp_out;
7770
7771         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7772         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7773
7774 sfp_out:
7775         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7776
7777         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7778             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7779                 e_dev_err("failed to initialize because an unsupported "
7780                           "SFP+ module type was detected.\n");
7781                 e_dev_err("Reload the driver after installing a "
7782                           "supported module.\n");
7783                 unregister_netdev(adapter->netdev);
7784         }
7785 }
7786
7787 /**
7788  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7789  * @adapter: the ixgbe adapter structure
7790  **/
7791 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7792 {
7793         struct ixgbe_hw *hw = &adapter->hw;
7794         u32 cap_speed;
7795         u32 speed;
7796         bool autoneg = false;
7797
7798         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7799                 return;
7800
7801         /* someone else is in init, wait until next service event */
7802         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7803                 return;
7804
7805         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7806
7807         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7808
7809         /* advertise highest capable link speed */
7810         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7811                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7812         else
7813                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7814                                      IXGBE_LINK_SPEED_1GB_FULL);
7815
7816         if (hw->mac.ops.setup_link)
7817                 hw->mac.ops.setup_link(hw, speed, true);
7818
7819         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7820         adapter->link_check_timeout = jiffies;
7821         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7822 }
7823
7824 /**
7825  * ixgbe_service_timer - Timer Call-back
7826  * @t: pointer to timer_list structure
7827  **/
7828 static void ixgbe_service_timer(struct timer_list *t)
7829 {
7830         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7831         unsigned long next_event_offset;
7832
7833         /* poll faster when waiting for link */
7834         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7835                 next_event_offset = HZ / 10;
7836         else
7837                 next_event_offset = HZ * 2;
7838
7839         /* Reset the timer */
7840         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7841
7842         ixgbe_service_event_schedule(adapter);
7843 }
7844
7845 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7846 {
7847         struct ixgbe_hw *hw = &adapter->hw;
7848         u32 status;
7849
7850         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7851                 return;
7852
7853         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7854
7855         if (!hw->phy.ops.handle_lasi)
7856                 return;
7857
7858         status = hw->phy.ops.handle_lasi(&adapter->hw);
7859         if (status != IXGBE_ERR_OVERTEMP)
7860                 return;
7861
7862         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7863 }
7864
7865 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7866 {
7867         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7868                 return;
7869
7870         rtnl_lock();
7871         /* If we're already down, removing or resetting, just bail */
7872         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7873             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7874             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7875                 rtnl_unlock();
7876                 return;
7877         }
7878
7879         ixgbe_dump(adapter);
7880         netdev_err(adapter->netdev, "Reset adapter\n");
7881         adapter->tx_timeout_count++;
7882
7883         ixgbe_reinit_locked(adapter);
7884         rtnl_unlock();
7885 }
7886
7887 /**
7888  * ixgbe_check_fw_error - Check firmware for errors
7889  * @adapter: the adapter private structure
7890  *
7891  * Check firmware errors in register FWSM
7892  */
7893 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7894 {
7895         struct ixgbe_hw *hw = &adapter->hw;
7896         u32 fwsm;
7897
7898         /* read fwsm.ext_err_ind register and log errors */
7899         fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7900
7901         if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7902             !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7903                 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7904                            fwsm);
7905
7906         if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7907                 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7908                 return true;
7909         }
7910
7911         return false;
7912 }
7913
7914 /**
7915  * ixgbe_service_task - manages and runs subtasks
7916  * @work: pointer to work_struct containing our data
7917  **/
7918 static void ixgbe_service_task(struct work_struct *work)
7919 {
7920         struct ixgbe_adapter *adapter = container_of(work,
7921                                                      struct ixgbe_adapter,
7922                                                      service_task);
7923         if (ixgbe_removed(adapter->hw.hw_addr)) {
7924                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7925                         rtnl_lock();
7926                         ixgbe_down(adapter);
7927                         rtnl_unlock();
7928                 }
7929                 ixgbe_service_event_complete(adapter);
7930                 return;
7931         }
7932         if (ixgbe_check_fw_error(adapter)) {
7933                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
7934                         unregister_netdev(adapter->netdev);
7935                 ixgbe_service_event_complete(adapter);
7936                 return;
7937         }
7938         ixgbe_reset_subtask(adapter);
7939         ixgbe_phy_interrupt_subtask(adapter);
7940         ixgbe_sfp_detection_subtask(adapter);
7941         ixgbe_sfp_link_config_subtask(adapter);
7942         ixgbe_check_overtemp_subtask(adapter);
7943         ixgbe_watchdog_subtask(adapter);
7944         ixgbe_fdir_reinit_subtask(adapter);
7945         ixgbe_check_hang_subtask(adapter);
7946
7947         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7948                 ixgbe_ptp_overflow_check(adapter);
7949                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7950                         ixgbe_ptp_rx_hang(adapter);
7951                 ixgbe_ptp_tx_hang(adapter);
7952         }
7953
7954         ixgbe_service_event_complete(adapter);
7955 }
7956
7957 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7958                      struct ixgbe_tx_buffer *first,
7959                      u8 *hdr_len,
7960                      struct ixgbe_ipsec_tx_data *itd)
7961 {
7962         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7963         struct sk_buff *skb = first->skb;
7964         union {
7965                 struct iphdr *v4;
7966                 struct ipv6hdr *v6;
7967                 unsigned char *hdr;
7968         } ip;
7969         union {
7970                 struct tcphdr *tcp;
7971                 struct udphdr *udp;
7972                 unsigned char *hdr;
7973         } l4;
7974         u32 paylen, l4_offset;
7975         u32 fceof_saidx = 0;
7976         int err;
7977
7978         if (skb->ip_summed != CHECKSUM_PARTIAL)
7979                 return 0;
7980
7981         if (!skb_is_gso(skb))
7982                 return 0;
7983
7984         err = skb_cow_head(skb, 0);
7985         if (err < 0)
7986                 return err;
7987
7988         if (eth_p_mpls(first->protocol))
7989                 ip.hdr = skb_inner_network_header(skb);
7990         else
7991                 ip.hdr = skb_network_header(skb);
7992         l4.hdr = skb_checksum_start(skb);
7993
7994         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7995         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
7996                       IXGBE_ADVTXD_TUCMD_L4T_UDP : IXGBE_ADVTXD_TUCMD_L4T_TCP;
7997
7998         /* initialize outer IP header fields */
7999         if (ip.v4->version == 4) {
8000                 unsigned char *csum_start = skb_checksum_start(skb);
8001                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
8002                 int len = csum_start - trans_start;
8003
8004                 /* IP header will have to cancel out any data that
8005                  * is not a part of the outer IP header, so set to
8006                  * a reverse csum if needed, else init check to 0.
8007                  */
8008                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
8009                                            csum_fold(csum_partial(trans_start,
8010                                                                   len, 0)) : 0;
8011                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
8012
8013                 ip.v4->tot_len = 0;
8014                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
8015                                    IXGBE_TX_FLAGS_CSUM |
8016                                    IXGBE_TX_FLAGS_IPV4;
8017         } else {
8018                 ip.v6->payload_len = 0;
8019                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
8020                                    IXGBE_TX_FLAGS_CSUM;
8021         }
8022
8023         /* determine offset of inner transport header */
8024         l4_offset = l4.hdr - skb->data;
8025
8026         /* remove payload length from inner checksum */
8027         paylen = skb->len - l4_offset;
8028
8029         if (type_tucmd & IXGBE_ADVTXD_TUCMD_L4T_TCP) {
8030                 /* compute length of segmentation header */
8031                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
8032                 csum_replace_by_diff(&l4.tcp->check,
8033                                      (__force __wsum)htonl(paylen));
8034         } else {
8035                 /* compute length of segmentation header */
8036                 *hdr_len = sizeof(*l4.udp) + l4_offset;
8037                 csum_replace_by_diff(&l4.udp->check,
8038                                      (__force __wsum)htonl(paylen));
8039         }
8040
8041         /* update gso size and bytecount with header size */
8042         first->gso_segs = skb_shinfo(skb)->gso_segs;
8043         first->bytecount += (first->gso_segs - 1) * *hdr_len;
8044
8045         /* mss_l4len_id: use 0 as index for TSO */
8046         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8047         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8048
8049         fceof_saidx |= itd->sa_idx;
8050         type_tucmd |= itd->flags | itd->trailer_len;
8051
8052         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8053         vlan_macip_lens = l4.hdr - ip.hdr;
8054         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8055         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8056
8057         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8058                           mss_l4len_idx);
8059
8060         return 1;
8061 }
8062
8063 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
8064 {
8065         unsigned int offset = 0;
8066
8067         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
8068
8069         return offset == skb_checksum_start_offset(skb);
8070 }
8071
8072 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8073                           struct ixgbe_tx_buffer *first,
8074                           struct ixgbe_ipsec_tx_data *itd)
8075 {
8076         struct sk_buff *skb = first->skb;
8077         u32 vlan_macip_lens = 0;
8078         u32 fceof_saidx = 0;
8079         u32 type_tucmd = 0;
8080
8081         if (skb->ip_summed != CHECKSUM_PARTIAL) {
8082 csum_failed:
8083                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8084                                          IXGBE_TX_FLAGS_CC)))
8085                         return;
8086                 goto no_csum;
8087         }
8088
8089         switch (skb->csum_offset) {
8090         case offsetof(struct tcphdr, check):
8091                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8092                 fallthrough;
8093         case offsetof(struct udphdr, check):
8094                 break;
8095         case offsetof(struct sctphdr, checksum):
8096                 /* validate that this is actually an SCTP request */
8097                 if (((first->protocol == htons(ETH_P_IP)) &&
8098                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8099                     ((first->protocol == htons(ETH_P_IPV6)) &&
8100                      ixgbe_ipv6_csum_is_sctp(skb))) {
8101                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8102                         break;
8103                 }
8104                 fallthrough;
8105         default:
8106                 skb_checksum_help(skb);
8107                 goto csum_failed;
8108         }
8109
8110         /* update TX checksum flag */
8111         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8112         vlan_macip_lens = skb_checksum_start_offset(skb) -
8113                           skb_network_offset(skb);
8114 no_csum:
8115         /* vlan_macip_lens: MACLEN, VLAN tag */
8116         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8117         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8118
8119         fceof_saidx |= itd->sa_idx;
8120         type_tucmd |= itd->flags | itd->trailer_len;
8121
8122         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8123 }
8124
8125 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8126         ((_flag <= _result) ? \
8127          ((u32)(_input & _flag) * (_result / _flag)) : \
8128          ((u32)(_input & _flag) / (_flag / _result)))
8129
8130 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8131 {
8132         /* set type for advanced descriptor with frame checksum insertion */
8133         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8134                        IXGBE_ADVTXD_DCMD_DEXT |
8135                        IXGBE_ADVTXD_DCMD_IFCS;
8136
8137         /* set HW vlan bit if vlan is present */
8138         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8139                                    IXGBE_ADVTXD_DCMD_VLE);
8140
8141         /* set segmentation enable bits for TSO/FSO */
8142         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8143                                    IXGBE_ADVTXD_DCMD_TSE);
8144
8145         /* set timestamp bit if present */
8146         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8147                                    IXGBE_ADVTXD_MAC_TSTAMP);
8148
8149         /* insert frame checksum */
8150         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8151
8152         return cmd_type;
8153 }
8154
8155 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8156                                    u32 tx_flags, unsigned int paylen)
8157 {
8158         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8159
8160         /* enable L4 checksum for TSO and TX checksum offload */
8161         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8162                                         IXGBE_TX_FLAGS_CSUM,
8163                                         IXGBE_ADVTXD_POPTS_TXSM);
8164
8165         /* enable IPv4 checksum for TSO */
8166         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8167                                         IXGBE_TX_FLAGS_IPV4,
8168                                         IXGBE_ADVTXD_POPTS_IXSM);
8169
8170         /* enable IPsec */
8171         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8172                                         IXGBE_TX_FLAGS_IPSEC,
8173                                         IXGBE_ADVTXD_POPTS_IPSEC);
8174
8175         /*
8176          * Check Context must be set if Tx switch is enabled, which it
8177          * always is for case where virtual functions are running
8178          */
8179         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8180                                         IXGBE_TX_FLAGS_CC,
8181                                         IXGBE_ADVTXD_CC);
8182
8183         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8184 }
8185
8186 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8187 {
8188         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8189
8190         /* Herbert's original patch had:
8191          *  smp_mb__after_netif_stop_queue();
8192          * but since that doesn't exist yet, just open code it.
8193          */
8194         smp_mb();
8195
8196         /* We need to check again in a case another CPU has just
8197          * made room available.
8198          */
8199         if (likely(ixgbe_desc_unused(tx_ring) < size))
8200                 return -EBUSY;
8201
8202         /* A reprieve! - use start_queue because it doesn't call schedule */
8203         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8204         ++tx_ring->tx_stats.restart_queue;
8205         return 0;
8206 }
8207
8208 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8209 {
8210         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8211                 return 0;
8212
8213         return __ixgbe_maybe_stop_tx(tx_ring, size);
8214 }
8215
8216 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8217                         struct ixgbe_tx_buffer *first,
8218                         const u8 hdr_len)
8219 {
8220         struct sk_buff *skb = first->skb;
8221         struct ixgbe_tx_buffer *tx_buffer;
8222         union ixgbe_adv_tx_desc *tx_desc;
8223         skb_frag_t *frag;
8224         dma_addr_t dma;
8225         unsigned int data_len, size;
8226         u32 tx_flags = first->tx_flags;
8227         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8228         u16 i = tx_ring->next_to_use;
8229
8230         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8231
8232         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8233
8234         size = skb_headlen(skb);
8235         data_len = skb->data_len;
8236
8237 #ifdef IXGBE_FCOE
8238         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8239                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8240                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8241                         data_len = 0;
8242                 } else {
8243                         data_len -= sizeof(struct fcoe_crc_eof);
8244                 }
8245         }
8246
8247 #endif
8248         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8249
8250         tx_buffer = first;
8251
8252         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8253                 if (dma_mapping_error(tx_ring->dev, dma))
8254                         goto dma_error;
8255
8256                 /* record length, and DMA address */
8257                 dma_unmap_len_set(tx_buffer, len, size);
8258                 dma_unmap_addr_set(tx_buffer, dma, dma);
8259
8260                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8261
8262                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8263                         tx_desc->read.cmd_type_len =
8264                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8265
8266                         i++;
8267                         tx_desc++;
8268                         if (i == tx_ring->count) {
8269                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8270                                 i = 0;
8271                         }
8272                         tx_desc->read.olinfo_status = 0;
8273
8274                         dma += IXGBE_MAX_DATA_PER_TXD;
8275                         size -= IXGBE_MAX_DATA_PER_TXD;
8276
8277                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8278                 }
8279
8280                 if (likely(!data_len))
8281                         break;
8282
8283                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8284
8285                 i++;
8286                 tx_desc++;
8287                 if (i == tx_ring->count) {
8288                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8289                         i = 0;
8290                 }
8291                 tx_desc->read.olinfo_status = 0;
8292
8293 #ifdef IXGBE_FCOE
8294                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8295 #else
8296                 size = skb_frag_size(frag);
8297 #endif
8298                 data_len -= size;
8299
8300                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8301                                        DMA_TO_DEVICE);
8302
8303                 tx_buffer = &tx_ring->tx_buffer_info[i];
8304         }
8305
8306         /* write last descriptor with RS and EOP bits */
8307         cmd_type |= size | IXGBE_TXD_CMD;
8308         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8309
8310         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8311
8312         /* set the timestamp */
8313         first->time_stamp = jiffies;
8314
8315         skb_tx_timestamp(skb);
8316
8317         /*
8318          * Force memory writes to complete before letting h/w know there
8319          * are new descriptors to fetch.  (Only applicable for weak-ordered
8320          * memory model archs, such as IA-64).
8321          *
8322          * We also need this memory barrier to make certain all of the
8323          * status bits have been updated before next_to_watch is written.
8324          */
8325         wmb();
8326
8327         /* set next_to_watch value indicating a packet is present */
8328         first->next_to_watch = tx_desc;
8329
8330         i++;
8331         if (i == tx_ring->count)
8332                 i = 0;
8333
8334         tx_ring->next_to_use = i;
8335
8336         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8337
8338         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
8339                 writel(i, tx_ring->tail);
8340         }
8341
8342         return 0;
8343 dma_error:
8344         dev_err(tx_ring->dev, "TX DMA map failed\n");
8345
8346         /* clear dma mappings for failed tx_buffer_info map */
8347         for (;;) {
8348                 tx_buffer = &tx_ring->tx_buffer_info[i];
8349                 if (dma_unmap_len(tx_buffer, len))
8350                         dma_unmap_page(tx_ring->dev,
8351                                        dma_unmap_addr(tx_buffer, dma),
8352                                        dma_unmap_len(tx_buffer, len),
8353                                        DMA_TO_DEVICE);
8354                 dma_unmap_len_set(tx_buffer, len, 0);
8355                 if (tx_buffer == first)
8356                         break;
8357                 if (i == 0)
8358                         i += tx_ring->count;
8359                 i--;
8360         }
8361
8362         dev_kfree_skb_any(first->skb);
8363         first->skb = NULL;
8364
8365         tx_ring->next_to_use = i;
8366
8367         return -1;
8368 }
8369
8370 static void ixgbe_atr(struct ixgbe_ring *ring,
8371                       struct ixgbe_tx_buffer *first)
8372 {
8373         struct ixgbe_q_vector *q_vector = ring->q_vector;
8374         union ixgbe_atr_hash_dword input = { .dword = 0 };
8375         union ixgbe_atr_hash_dword common = { .dword = 0 };
8376         union {
8377                 unsigned char *network;
8378                 struct iphdr *ipv4;
8379                 struct ipv6hdr *ipv6;
8380         } hdr;
8381         struct tcphdr *th;
8382         unsigned int hlen;
8383         struct sk_buff *skb;
8384         __be16 vlan_id;
8385         int l4_proto;
8386
8387         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8388         if (!q_vector)
8389                 return;
8390
8391         /* do nothing if sampling is disabled */
8392         if (!ring->atr_sample_rate)
8393                 return;
8394
8395         ring->atr_count++;
8396
8397         /* currently only IPv4/IPv6 with TCP is supported */
8398         if ((first->protocol != htons(ETH_P_IP)) &&
8399             (first->protocol != htons(ETH_P_IPV6)))
8400                 return;
8401
8402         /* snag network header to get L4 type and address */
8403         skb = first->skb;
8404         hdr.network = skb_network_header(skb);
8405         if (unlikely(hdr.network <= skb->data))
8406                 return;
8407         if (skb->encapsulation &&
8408             first->protocol == htons(ETH_P_IP) &&
8409             hdr.ipv4->protocol == IPPROTO_UDP) {
8410                 struct ixgbe_adapter *adapter = q_vector->adapter;
8411
8412                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8413                              VXLAN_HEADROOM))
8414                         return;
8415
8416                 /* verify the port is recognized as VXLAN */
8417                 if (adapter->vxlan_port &&
8418                     udp_hdr(skb)->dest == adapter->vxlan_port)
8419                         hdr.network = skb_inner_network_header(skb);
8420
8421                 if (adapter->geneve_port &&
8422                     udp_hdr(skb)->dest == adapter->geneve_port)
8423                         hdr.network = skb_inner_network_header(skb);
8424         }
8425
8426         /* Make sure we have at least [minimum IPv4 header + TCP]
8427          * or [IPv6 header] bytes
8428          */
8429         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8430                 return;
8431
8432         /* Currently only IPv4/IPv6 with TCP is supported */
8433         switch (hdr.ipv4->version) {
8434         case IPVERSION:
8435                 /* access ihl as u8 to avoid unaligned access on ia64 */
8436                 hlen = (hdr.network[0] & 0x0F) << 2;
8437                 l4_proto = hdr.ipv4->protocol;
8438                 break;
8439         case 6:
8440                 hlen = hdr.network - skb->data;
8441                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8442                 hlen -= hdr.network - skb->data;
8443                 break;
8444         default:
8445                 return;
8446         }
8447
8448         if (l4_proto != IPPROTO_TCP)
8449                 return;
8450
8451         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8452                      hlen + sizeof(struct tcphdr)))
8453                 return;
8454
8455         th = (struct tcphdr *)(hdr.network + hlen);
8456
8457         /* skip this packet since the socket is closing */
8458         if (th->fin)
8459                 return;
8460
8461         /* sample on all syn packets or once every atr sample count */
8462         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8463                 return;
8464
8465         /* reset sample count */
8466         ring->atr_count = 0;
8467
8468         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8469
8470         /*
8471          * src and dst are inverted, think how the receiver sees them
8472          *
8473          * The input is broken into two sections, a non-compressed section
8474          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8475          * is XORed together and stored in the compressed dword.
8476          */
8477         input.formatted.vlan_id = vlan_id;
8478
8479         /*
8480          * since src port and flex bytes occupy the same word XOR them together
8481          * and write the value to source port portion of compressed dword
8482          */
8483         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8484                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8485         else
8486                 common.port.src ^= th->dest ^ first->protocol;
8487         common.port.dst ^= th->source;
8488
8489         switch (hdr.ipv4->version) {
8490         case IPVERSION:
8491                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8492                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8493                 break;
8494         case 6:
8495                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8496                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8497                              hdr.ipv6->saddr.s6_addr32[1] ^
8498                              hdr.ipv6->saddr.s6_addr32[2] ^
8499                              hdr.ipv6->saddr.s6_addr32[3] ^
8500                              hdr.ipv6->daddr.s6_addr32[0] ^
8501                              hdr.ipv6->daddr.s6_addr32[1] ^
8502                              hdr.ipv6->daddr.s6_addr32[2] ^
8503                              hdr.ipv6->daddr.s6_addr32[3];
8504                 break;
8505         default:
8506                 break;
8507         }
8508
8509         if (hdr.network != skb_network_header(skb))
8510                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8511
8512         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8513         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8514                                               input, common, ring->queue_index);
8515 }
8516
8517 #ifdef IXGBE_FCOE
8518 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8519                               struct net_device *sb_dev)
8520 {
8521         struct ixgbe_adapter *adapter;
8522         struct ixgbe_ring_feature *f;
8523         int txq;
8524
8525         if (sb_dev) {
8526                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8527                 struct net_device *vdev = sb_dev;
8528
8529                 txq = vdev->tc_to_txq[tc].offset;
8530                 txq += reciprocal_scale(skb_get_hash(skb),
8531                                         vdev->tc_to_txq[tc].count);
8532
8533                 return txq;
8534         }
8535
8536         /*
8537          * only execute the code below if protocol is FCoE
8538          * or FIP and we have FCoE enabled on the adapter
8539          */
8540         switch (vlan_get_protocol(skb)) {
8541         case htons(ETH_P_FCOE):
8542         case htons(ETH_P_FIP):
8543                 adapter = netdev_priv(dev);
8544
8545                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8546                         break;
8547                 fallthrough;
8548         default:
8549                 return netdev_pick_tx(dev, skb, sb_dev);
8550         }
8551
8552         f = &adapter->ring_feature[RING_F_FCOE];
8553
8554         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8555                                            smp_processor_id();
8556
8557         while (txq >= f->indices)
8558                 txq -= f->indices;
8559
8560         return txq + f->offset;
8561 }
8562
8563 #endif
8564 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8565                         struct xdp_frame *xdpf)
8566 {
8567         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8568         struct ixgbe_tx_buffer *tx_buffer;
8569         union ixgbe_adv_tx_desc *tx_desc;
8570         u32 len, cmd_type;
8571         dma_addr_t dma;
8572         u16 i;
8573
8574         len = xdpf->len;
8575
8576         if (unlikely(!ixgbe_desc_unused(ring)))
8577                 return IXGBE_XDP_CONSUMED;
8578
8579         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8580         if (dma_mapping_error(ring->dev, dma))
8581                 return IXGBE_XDP_CONSUMED;
8582
8583         /* record the location of the first descriptor for this packet */
8584         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8585         tx_buffer->bytecount = len;
8586         tx_buffer->gso_segs = 1;
8587         tx_buffer->protocol = 0;
8588
8589         i = ring->next_to_use;
8590         tx_desc = IXGBE_TX_DESC(ring, i);
8591
8592         dma_unmap_len_set(tx_buffer, len, len);
8593         dma_unmap_addr_set(tx_buffer, dma, dma);
8594         tx_buffer->xdpf = xdpf;
8595
8596         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8597
8598         /* put descriptor type bits */
8599         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8600                    IXGBE_ADVTXD_DCMD_DEXT |
8601                    IXGBE_ADVTXD_DCMD_IFCS;
8602         cmd_type |= len | IXGBE_TXD_CMD;
8603         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8604         tx_desc->read.olinfo_status =
8605                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8606
8607         /* Avoid any potential race with xdp_xmit and cleanup */
8608         smp_wmb();
8609
8610         /* set next_to_watch value indicating a packet is present */
8611         i++;
8612         if (i == ring->count)
8613                 i = 0;
8614
8615         tx_buffer->next_to_watch = tx_desc;
8616         ring->next_to_use = i;
8617
8618         return IXGBE_XDP_TX;
8619 }
8620
8621 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8622                           struct ixgbe_adapter *adapter,
8623                           struct ixgbe_ring *tx_ring)
8624 {
8625         struct ixgbe_tx_buffer *first;
8626         int tso;
8627         u32 tx_flags = 0;
8628         unsigned short f;
8629         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8630         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8631         __be16 protocol = skb->protocol;
8632         u8 hdr_len = 0;
8633
8634         /*
8635          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8636          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8637          *       + 2 desc gap to keep tail from touching head,
8638          *       + 1 desc for context descriptor,
8639          * otherwise try next time
8640          */
8641         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8642                 count += TXD_USE_COUNT(skb_frag_size(
8643                                                 &skb_shinfo(skb)->frags[f]));
8644
8645         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8646                 tx_ring->tx_stats.tx_busy++;
8647                 return NETDEV_TX_BUSY;
8648         }
8649
8650         /* record the location of the first descriptor for this packet */
8651         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8652         first->skb = skb;
8653         first->bytecount = skb->len;
8654         first->gso_segs = 1;
8655
8656         /* if we have a HW VLAN tag being added default to the HW one */
8657         if (skb_vlan_tag_present(skb)) {
8658                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8659                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8660         /* else if it is a SW VLAN check the next protocol and store the tag */
8661         } else if (protocol == htons(ETH_P_8021Q)) {
8662                 struct vlan_hdr *vhdr, _vhdr;
8663                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8664                 if (!vhdr)
8665                         goto out_drop;
8666
8667                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8668                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8669                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8670         }
8671         protocol = vlan_get_protocol(skb);
8672
8673         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8674             adapter->ptp_clock) {
8675                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
8676                     !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8677                                            &adapter->state)) {
8678                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8679                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8680
8681                         /* schedule check for Tx timestamp */
8682                         adapter->ptp_tx_skb = skb_get(skb);
8683                         adapter->ptp_tx_start = jiffies;
8684                         schedule_work(&adapter->ptp_tx_work);
8685                 } else {
8686                         adapter->tx_hwtstamp_skipped++;
8687                 }
8688         }
8689
8690 #ifdef CONFIG_PCI_IOV
8691         /*
8692          * Use the l2switch_enable flag - would be false if the DMA
8693          * Tx switch had been disabled.
8694          */
8695         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8696                 tx_flags |= IXGBE_TX_FLAGS_CC;
8697
8698 #endif
8699         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8700         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8701             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8702              (skb->priority != TC_PRIO_CONTROL))) {
8703                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8704                 tx_flags |= (skb->priority & 0x7) <<
8705                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8706                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8707                         struct vlan_ethhdr *vhdr;
8708
8709                         if (skb_cow_head(skb, 0))
8710                                 goto out_drop;
8711                         vhdr = (struct vlan_ethhdr *)skb->data;
8712                         vhdr->h_vlan_TCI = htons(tx_flags >>
8713                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8714                 } else {
8715                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8716                 }
8717         }
8718
8719         /* record initial flags and protocol */
8720         first->tx_flags = tx_flags;
8721         first->protocol = protocol;
8722
8723 #ifdef IXGBE_FCOE
8724         /* setup tx offload for FCoE */
8725         if ((protocol == htons(ETH_P_FCOE)) &&
8726             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8727                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8728                 if (tso < 0)
8729                         goto out_drop;
8730
8731                 goto xmit_fcoe;
8732         }
8733
8734 #endif /* IXGBE_FCOE */
8735
8736 #ifdef CONFIG_IXGBE_IPSEC
8737         if (xfrm_offload(skb) &&
8738             !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8739                 goto out_drop;
8740 #endif
8741         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8742         if (tso < 0)
8743                 goto out_drop;
8744         else if (!tso)
8745                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8746
8747         /* add the ATR filter if ATR is on */
8748         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8749                 ixgbe_atr(tx_ring, first);
8750
8751 #ifdef IXGBE_FCOE
8752 xmit_fcoe:
8753 #endif /* IXGBE_FCOE */
8754         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8755                 goto cleanup_tx_timestamp;
8756
8757         return NETDEV_TX_OK;
8758
8759 out_drop:
8760         dev_kfree_skb_any(first->skb);
8761         first->skb = NULL;
8762 cleanup_tx_timestamp:
8763         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8764                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8765                 adapter->ptp_tx_skb = NULL;
8766                 cancel_work_sync(&adapter->ptp_tx_work);
8767                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8768         }
8769
8770         return NETDEV_TX_OK;
8771 }
8772
8773 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8774                                       struct net_device *netdev,
8775                                       struct ixgbe_ring *ring)
8776 {
8777         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8778         struct ixgbe_ring *tx_ring;
8779
8780         /*
8781          * The minimum packet size for olinfo paylen is 17 so pad the skb
8782          * in order to meet this minimum size requirement.
8783          */
8784         if (skb_put_padto(skb, 17))
8785                 return NETDEV_TX_OK;
8786
8787         tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)];
8788         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8789                 return NETDEV_TX_BUSY;
8790
8791         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8792 }
8793
8794 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8795                                     struct net_device *netdev)
8796 {
8797         return __ixgbe_xmit_frame(skb, netdev, NULL);
8798 }
8799
8800 /**
8801  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8802  * @netdev: network interface device structure
8803  * @p: pointer to an address structure
8804  *
8805  * Returns 0 on success, negative on failure
8806  **/
8807 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8808 {
8809         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8810         struct ixgbe_hw *hw = &adapter->hw;
8811         struct sockaddr *addr = p;
8812
8813         if (!is_valid_ether_addr(addr->sa_data))
8814                 return -EADDRNOTAVAIL;
8815
8816         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8817         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8818
8819         ixgbe_mac_set_default_filter(adapter);
8820
8821         return 0;
8822 }
8823
8824 static int
8825 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8826 {
8827         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8828         struct ixgbe_hw *hw = &adapter->hw;
8829         u16 value;
8830         int rc;
8831
8832         if (adapter->mii_bus) {
8833                 int regnum = addr;
8834
8835                 if (devad != MDIO_DEVAD_NONE)
8836                         regnum |= (devad << 16) | MII_ADDR_C45;
8837
8838                 return mdiobus_read(adapter->mii_bus, prtad, regnum);
8839         }
8840
8841         if (prtad != hw->phy.mdio.prtad)
8842                 return -EINVAL;
8843         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8844         if (!rc)
8845                 rc = value;
8846         return rc;
8847 }
8848
8849 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8850                             u16 addr, u16 value)
8851 {
8852         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8853         struct ixgbe_hw *hw = &adapter->hw;
8854
8855         if (adapter->mii_bus) {
8856                 int regnum = addr;
8857
8858                 if (devad != MDIO_DEVAD_NONE)
8859                         regnum |= (devad << 16) | MII_ADDR_C45;
8860
8861                 return mdiobus_write(adapter->mii_bus, prtad, regnum, value);
8862         }
8863
8864         if (prtad != hw->phy.mdio.prtad)
8865                 return -EINVAL;
8866         return hw->phy.ops.write_reg(hw, addr, devad, value);
8867 }
8868
8869 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8870 {
8871         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8872
8873         switch (cmd) {
8874         case SIOCSHWTSTAMP:
8875                 return ixgbe_ptp_set_ts_config(adapter, req);
8876         case SIOCGHWTSTAMP:
8877                 return ixgbe_ptp_get_ts_config(adapter, req);
8878         case SIOCGMIIPHY:
8879                 if (!adapter->hw.phy.ops.read_reg)
8880                         return -EOPNOTSUPP;
8881                 fallthrough;
8882         default:
8883                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8884         }
8885 }
8886
8887 /**
8888  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8889  * netdev->dev_addrs
8890  * @dev: network interface device structure
8891  *
8892  * Returns non-zero on failure
8893  **/
8894 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8895 {
8896         int err = 0;
8897         struct ixgbe_adapter *adapter = netdev_priv(dev);
8898         struct ixgbe_hw *hw = &adapter->hw;
8899
8900         if (is_valid_ether_addr(hw->mac.san_addr)) {
8901                 rtnl_lock();
8902                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8903                 rtnl_unlock();
8904
8905                 /* update SAN MAC vmdq pool selection */
8906                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8907         }
8908         return err;
8909 }
8910
8911 /**
8912  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8913  * netdev->dev_addrs
8914  * @dev: network interface device structure
8915  *
8916  * Returns non-zero on failure
8917  **/
8918 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8919 {
8920         int err = 0;
8921         struct ixgbe_adapter *adapter = netdev_priv(dev);
8922         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8923
8924         if (is_valid_ether_addr(mac->san_addr)) {
8925                 rtnl_lock();
8926                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8927                 rtnl_unlock();
8928         }
8929         return err;
8930 }
8931
8932 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8933                                    struct ixgbe_ring *ring)
8934 {
8935         u64 bytes, packets;
8936         unsigned int start;
8937
8938         if (ring) {
8939                 do {
8940                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8941                         packets = ring->stats.packets;
8942                         bytes   = ring->stats.bytes;
8943                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8944                 stats->tx_packets += packets;
8945                 stats->tx_bytes   += bytes;
8946         }
8947 }
8948
8949 static void ixgbe_get_stats64(struct net_device *netdev,
8950                               struct rtnl_link_stats64 *stats)
8951 {
8952         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8953         int i;
8954
8955         rcu_read_lock();
8956         for (i = 0; i < adapter->num_rx_queues; i++) {
8957                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8958                 u64 bytes, packets;
8959                 unsigned int start;
8960
8961                 if (ring) {
8962                         do {
8963                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8964                                 packets = ring->stats.packets;
8965                                 bytes   = ring->stats.bytes;
8966                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8967                         stats->rx_packets += packets;
8968                         stats->rx_bytes   += bytes;
8969                 }
8970         }
8971
8972         for (i = 0; i < adapter->num_tx_queues; i++) {
8973                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8974
8975                 ixgbe_get_ring_stats64(stats, ring);
8976         }
8977         for (i = 0; i < adapter->num_xdp_queues; i++) {
8978                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8979
8980                 ixgbe_get_ring_stats64(stats, ring);
8981         }
8982         rcu_read_unlock();
8983
8984         /* following stats updated by ixgbe_watchdog_task() */
8985         stats->multicast        = netdev->stats.multicast;
8986         stats->rx_errors        = netdev->stats.rx_errors;
8987         stats->rx_length_errors = netdev->stats.rx_length_errors;
8988         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8989         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8990 }
8991
8992 #ifdef CONFIG_IXGBE_DCB
8993 /**
8994  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8995  * @adapter: pointer to ixgbe_adapter
8996  * @tc: number of traffic classes currently enabled
8997  *
8998  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8999  * 802.1Q priority maps to a packet buffer that exists.
9000  */
9001 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
9002 {
9003         struct ixgbe_hw *hw = &adapter->hw;
9004         u32 reg, rsave;
9005         int i;
9006
9007         /* 82598 have a static priority to TC mapping that can not
9008          * be changed so no validation is needed.
9009          */
9010         if (hw->mac.type == ixgbe_mac_82598EB)
9011                 return;
9012
9013         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
9014         rsave = reg;
9015
9016         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
9017                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
9018
9019                 /* If up2tc is out of bounds default to zero */
9020                 if (up2tc > tc)
9021                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
9022         }
9023
9024         if (reg != rsave)
9025                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
9026
9027         return;
9028 }
9029
9030 /**
9031  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
9032  * @adapter: Pointer to adapter struct
9033  *
9034  * Populate the netdev user priority to tc map
9035  */
9036 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
9037 {
9038         struct net_device *dev = adapter->netdev;
9039         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
9040         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
9041         u8 prio;
9042
9043         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
9044                 u8 tc = 0;
9045
9046                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
9047                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
9048                 else if (ets)
9049                         tc = ets->prio_tc[prio];
9050
9051                 netdev_set_prio_tc_map(dev, prio, tc);
9052         }
9053 }
9054
9055 #endif /* CONFIG_IXGBE_DCB */
9056 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
9057 {
9058         struct ixgbe_adapter *adapter = data;
9059         struct ixgbe_fwd_adapter *accel;
9060         int pool;
9061
9062         /* we only care about macvlans... */
9063         if (!netif_is_macvlan(vdev))
9064                 return 0;
9065
9066         /* that have hardware offload enabled... */
9067         accel = macvlan_accel_priv(vdev);
9068         if (!accel)
9069                 return 0;
9070
9071         /* If we can relocate to a different bit do so */
9072         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9073         if (pool < adapter->num_rx_pools) {
9074                 set_bit(pool, adapter->fwd_bitmask);
9075                 accel->pool = pool;
9076                 return 0;
9077         }
9078
9079         /* if we cannot find a free pool then disable the offload */
9080         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9081         macvlan_release_l2fw_offload(vdev);
9082
9083         /* unbind the queues and drop the subordinate channel config */
9084         netdev_unbind_sb_channel(adapter->netdev, vdev);
9085         netdev_set_sb_channel(vdev, 0);
9086
9087         kfree(accel);
9088
9089         return 0;
9090 }
9091
9092 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9093 {
9094         struct ixgbe_adapter *adapter = netdev_priv(dev);
9095
9096         /* flush any stale bits out of the fwd bitmask */
9097         bitmap_clear(adapter->fwd_bitmask, 1, 63);
9098
9099         /* walk through upper devices reassigning pools */
9100         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9101                                       adapter);
9102 }
9103
9104 /**
9105  * ixgbe_setup_tc - configure net_device for multiple traffic classes
9106  *
9107  * @dev: net device to configure
9108  * @tc: number of traffic classes to enable
9109  */
9110 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9111 {
9112         struct ixgbe_adapter *adapter = netdev_priv(dev);
9113         struct ixgbe_hw *hw = &adapter->hw;
9114
9115         /* Hardware supports up to 8 traffic classes */
9116         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9117                 return -EINVAL;
9118
9119         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9120                 return -EINVAL;
9121
9122         /* Hardware has to reinitialize queues and interrupts to
9123          * match packet buffer alignment. Unfortunately, the
9124          * hardware is not flexible enough to do this dynamically.
9125          */
9126         if (netif_running(dev))
9127                 ixgbe_close(dev);
9128         else
9129                 ixgbe_reset(adapter);
9130
9131         ixgbe_clear_interrupt_scheme(adapter);
9132
9133 #ifdef CONFIG_IXGBE_DCB
9134         if (tc) {
9135                 if (adapter->xdp_prog) {
9136                         e_warn(probe, "DCB is not supported with XDP\n");
9137
9138                         ixgbe_init_interrupt_scheme(adapter);
9139                         if (netif_running(dev))
9140                                 ixgbe_open(dev);
9141                         return -EINVAL;
9142                 }
9143
9144                 netdev_set_num_tc(dev, tc);
9145                 ixgbe_set_prio_tc_map(adapter);
9146
9147                 adapter->hw_tcs = tc;
9148                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9149
9150                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9151                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9152                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9153                 }
9154         } else {
9155                 netdev_reset_tc(dev);
9156
9157                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9158                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9159
9160                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9161                 adapter->hw_tcs = tc;
9162
9163                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9164                 adapter->dcb_cfg.pfc_mode_enable = false;
9165         }
9166
9167         ixgbe_validate_rtr(adapter, tc);
9168
9169 #endif /* CONFIG_IXGBE_DCB */
9170         ixgbe_init_interrupt_scheme(adapter);
9171
9172         ixgbe_defrag_macvlan_pools(dev);
9173
9174         if (netif_running(dev))
9175                 return ixgbe_open(dev);
9176
9177         return 0;
9178 }
9179
9180 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9181                                struct tc_cls_u32_offload *cls)
9182 {
9183         u32 hdl = cls->knode.handle;
9184         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9185         u32 loc = cls->knode.handle & 0xfffff;
9186         int err = 0, i, j;
9187         struct ixgbe_jump_table *jump = NULL;
9188
9189         if (loc > IXGBE_MAX_HW_ENTRIES)
9190                 return -EINVAL;
9191
9192         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9193                 return -EINVAL;
9194
9195         /* Clear this filter in the link data it is associated with */
9196         if (uhtid != 0x800) {
9197                 jump = adapter->jump_tables[uhtid];
9198                 if (!jump)
9199                         return -EINVAL;
9200                 if (!test_bit(loc - 1, jump->child_loc_map))
9201                         return -EINVAL;
9202                 clear_bit(loc - 1, jump->child_loc_map);
9203         }
9204
9205         /* Check if the filter being deleted is a link */
9206         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9207                 jump = adapter->jump_tables[i];
9208                 if (jump && jump->link_hdl == hdl) {
9209                         /* Delete filters in the hardware in the child hash
9210                          * table associated with this link
9211                          */
9212                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9213                                 if (!test_bit(j, jump->child_loc_map))
9214                                         continue;
9215                                 spin_lock(&adapter->fdir_perfect_lock);
9216                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9217                                                                       NULL,
9218                                                                       j + 1);
9219                                 spin_unlock(&adapter->fdir_perfect_lock);
9220                                 clear_bit(j, jump->child_loc_map);
9221                         }
9222                         /* Remove resources for this link */
9223                         kfree(jump->input);
9224                         kfree(jump->mask);
9225                         kfree(jump);
9226                         adapter->jump_tables[i] = NULL;
9227                         return err;
9228                 }
9229         }
9230
9231         spin_lock(&adapter->fdir_perfect_lock);
9232         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9233         spin_unlock(&adapter->fdir_perfect_lock);
9234         return err;
9235 }
9236
9237 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9238                                             struct tc_cls_u32_offload *cls)
9239 {
9240         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9241
9242         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9243                 return -EINVAL;
9244
9245         /* This ixgbe devices do not support hash tables at the moment
9246          * so abort when given hash tables.
9247          */
9248         if (cls->hnode.divisor > 0)
9249                 return -EINVAL;
9250
9251         set_bit(uhtid - 1, &adapter->tables);
9252         return 0;
9253 }
9254
9255 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9256                                             struct tc_cls_u32_offload *cls)
9257 {
9258         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9259
9260         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9261                 return -EINVAL;
9262
9263         clear_bit(uhtid - 1, &adapter->tables);
9264         return 0;
9265 }
9266
9267 #ifdef CONFIG_NET_CLS_ACT
9268 struct upper_walk_data {
9269         struct ixgbe_adapter *adapter;
9270         u64 action;
9271         int ifindex;
9272         u8 queue;
9273 };
9274
9275 static int get_macvlan_queue(struct net_device *upper, void *_data)
9276 {
9277         if (netif_is_macvlan(upper)) {
9278                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9279                 struct upper_walk_data *data = _data;
9280                 struct ixgbe_adapter *adapter = data->adapter;
9281                 int ifindex = data->ifindex;
9282
9283                 if (vadapter && upper->ifindex == ifindex) {
9284                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9285                         data->action = data->queue;
9286                         return 1;
9287                 }
9288         }
9289
9290         return 0;
9291 }
9292
9293 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9294                                   u8 *queue, u64 *action)
9295 {
9296         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9297         unsigned int num_vfs = adapter->num_vfs, vf;
9298         struct upper_walk_data data;
9299         struct net_device *upper;
9300
9301         /* redirect to a SRIOV VF */
9302         for (vf = 0; vf < num_vfs; ++vf) {
9303                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9304                 if (upper->ifindex == ifindex) {
9305                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9306                         *action = vf + 1;
9307                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9308                         return 0;
9309                 }
9310         }
9311
9312         /* redirect to a offloaded macvlan netdev */
9313         data.adapter = adapter;
9314         data.ifindex = ifindex;
9315         data.action = 0;
9316         data.queue = 0;
9317         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9318                                           get_macvlan_queue, &data)) {
9319                 *action = data.action;
9320                 *queue = data.queue;
9321
9322                 return 0;
9323         }
9324
9325         return -EINVAL;
9326 }
9327
9328 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9329                             struct tcf_exts *exts, u64 *action, u8 *queue)
9330 {
9331         const struct tc_action *a;
9332         int i;
9333
9334         if (!tcf_exts_has_actions(exts))
9335                 return -EINVAL;
9336
9337         tcf_exts_for_each_action(i, a, exts) {
9338                 /* Drop action */
9339                 if (is_tcf_gact_shot(a)) {
9340                         *action = IXGBE_FDIR_DROP_QUEUE;
9341                         *queue = IXGBE_FDIR_DROP_QUEUE;
9342                         return 0;
9343                 }
9344
9345                 /* Redirect to a VF or a offloaded macvlan */
9346                 if (is_tcf_mirred_egress_redirect(a)) {
9347                         struct net_device *dev = tcf_mirred_dev(a);
9348
9349                         if (!dev)
9350                                 return -EINVAL;
9351                         return handle_redirect_action(adapter, dev->ifindex,
9352                                                       queue, action);
9353                 }
9354
9355                 return -EINVAL;
9356         }
9357
9358         return -EINVAL;
9359 }
9360 #else
9361 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9362                             struct tcf_exts *exts, u64 *action, u8 *queue)
9363 {
9364         return -EINVAL;
9365 }
9366 #endif /* CONFIG_NET_CLS_ACT */
9367
9368 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9369                                     union ixgbe_atr_input *mask,
9370                                     struct tc_cls_u32_offload *cls,
9371                                     struct ixgbe_mat_field *field_ptr,
9372                                     struct ixgbe_nexthdr *nexthdr)
9373 {
9374         int i, j, off;
9375         __be32 val, m;
9376         bool found_entry = false, found_jump_field = false;
9377
9378         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9379                 off = cls->knode.sel->keys[i].off;
9380                 val = cls->knode.sel->keys[i].val;
9381                 m = cls->knode.sel->keys[i].mask;
9382
9383                 for (j = 0; field_ptr[j].val; j++) {
9384                         if (field_ptr[j].off == off) {
9385                                 field_ptr[j].val(input, mask, (__force u32)val,
9386                                                  (__force u32)m);
9387                                 input->filter.formatted.flow_type |=
9388                                         field_ptr[j].type;
9389                                 found_entry = true;
9390                                 break;
9391                         }
9392                 }
9393                 if (nexthdr) {
9394                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9395                             nexthdr->val ==
9396                             (__force u32)cls->knode.sel->keys[i].val &&
9397                             nexthdr->mask ==
9398                             (__force u32)cls->knode.sel->keys[i].mask)
9399                                 found_jump_field = true;
9400                         else
9401                                 continue;
9402                 }
9403         }
9404
9405         if (nexthdr && !found_jump_field)
9406                 return -EINVAL;
9407
9408         if (!found_entry)
9409                 return 0;
9410
9411         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9412                                     IXGBE_ATR_L4TYPE_MASK;
9413
9414         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9415                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9416
9417         return 0;
9418 }
9419
9420 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9421                                   struct tc_cls_u32_offload *cls)
9422 {
9423         __be16 protocol = cls->common.protocol;
9424         u32 loc = cls->knode.handle & 0xfffff;
9425         struct ixgbe_hw *hw = &adapter->hw;
9426         struct ixgbe_mat_field *field_ptr;
9427         struct ixgbe_fdir_filter *input = NULL;
9428         union ixgbe_atr_input *mask = NULL;
9429         struct ixgbe_jump_table *jump = NULL;
9430         int i, err = -EINVAL;
9431         u8 queue;
9432         u32 uhtid, link_uhtid;
9433
9434         uhtid = TC_U32_USERHTID(cls->knode.handle);
9435         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9436
9437         /* At the moment cls_u32 jumps to network layer and skips past
9438          * L2 headers. The canonical method to match L2 frames is to use
9439          * negative values. However this is error prone at best but really
9440          * just broken because there is no way to "know" what sort of hdr
9441          * is in front of the network layer. Fix cls_u32 to support L2
9442          * headers when needed.
9443          */
9444         if (protocol != htons(ETH_P_IP))
9445                 return err;
9446
9447         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9448                 e_err(drv, "Location out of range\n");
9449                 return err;
9450         }
9451
9452         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9453          * links and also the fields used to advance the parser across each
9454          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9455          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9456          * To add support for new nodes update ixgbe_model.h parse structures
9457          * this function _should_ be generic try not to hardcode values here.
9458          */
9459         if (uhtid == 0x800) {
9460                 field_ptr = (adapter->jump_tables[0])->mat;
9461         } else {
9462                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9463                         return err;
9464                 if (!adapter->jump_tables[uhtid])
9465                         return err;
9466                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9467         }
9468
9469         if (!field_ptr)
9470                 return err;
9471
9472         /* At this point we know the field_ptr is valid and need to either
9473          * build cls_u32 link or attach filter. Because adding a link to
9474          * a handle that does not exist is invalid and the same for adding
9475          * rules to handles that don't exist.
9476          */
9477
9478         if (link_uhtid) {
9479                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9480
9481                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9482                         return err;
9483
9484                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9485                         return err;
9486
9487                 /* Multiple filters as links to the same hash table are not
9488                  * supported. To add a new filter with the same next header
9489                  * but different match/jump conditions, create a new hash table
9490                  * and link to it.
9491                  */
9492                 if (adapter->jump_tables[link_uhtid] &&
9493                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9494                         e_err(drv, "Link filter exists for link: %x\n",
9495                               link_uhtid);
9496                         return err;
9497                 }
9498
9499                 for (i = 0; nexthdr[i].jump; i++) {
9500                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9501                             nexthdr[i].s != cls->knode.sel->offshift ||
9502                             nexthdr[i].m !=
9503                             (__force u32)cls->knode.sel->offmask)
9504                                 return err;
9505
9506                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9507                         if (!jump)
9508                                 return -ENOMEM;
9509                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9510                         if (!input) {
9511                                 err = -ENOMEM;
9512                                 goto free_jump;
9513                         }
9514                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9515                         if (!mask) {
9516                                 err = -ENOMEM;
9517                                 goto free_input;
9518                         }
9519                         jump->input = input;
9520                         jump->mask = mask;
9521                         jump->link_hdl = cls->knode.handle;
9522
9523                         err = ixgbe_clsu32_build_input(input, mask, cls,
9524                                                        field_ptr, &nexthdr[i]);
9525                         if (!err) {
9526                                 jump->mat = nexthdr[i].jump;
9527                                 adapter->jump_tables[link_uhtid] = jump;
9528                                 break;
9529                         } else {
9530                                 kfree(mask);
9531                                 kfree(input);
9532                                 kfree(jump);
9533                         }
9534                 }
9535                 return 0;
9536         }
9537
9538         input = kzalloc(sizeof(*input), GFP_KERNEL);
9539         if (!input)
9540                 return -ENOMEM;
9541         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9542         if (!mask) {
9543                 err = -ENOMEM;
9544                 goto free_input;
9545         }
9546
9547         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9548                 if ((adapter->jump_tables[uhtid])->input)
9549                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9550                                sizeof(*input));
9551                 if ((adapter->jump_tables[uhtid])->mask)
9552                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9553                                sizeof(*mask));
9554
9555                 /* Lookup in all child hash tables if this location is already
9556                  * filled with a filter
9557                  */
9558                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9559                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9560
9561                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9562                                 e_err(drv, "Filter exists in location: %x\n",
9563                                       loc);
9564                                 err = -EINVAL;
9565                                 goto err_out;
9566                         }
9567                 }
9568         }
9569         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9570         if (err)
9571                 goto err_out;
9572
9573         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9574                                &queue);
9575         if (err < 0)
9576                 goto err_out;
9577
9578         input->sw_idx = loc;
9579
9580         spin_lock(&adapter->fdir_perfect_lock);
9581
9582         if (hlist_empty(&adapter->fdir_filter_list)) {
9583                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9584                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9585                 if (err)
9586                         goto err_out_w_lock;
9587         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9588                 err = -EINVAL;
9589                 goto err_out_w_lock;
9590         }
9591
9592         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9593         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9594                                                     input->sw_idx, queue);
9595         if (!err)
9596                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9597         spin_unlock(&adapter->fdir_perfect_lock);
9598
9599         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9600                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9601
9602         kfree(mask);
9603         return err;
9604 err_out_w_lock:
9605         spin_unlock(&adapter->fdir_perfect_lock);
9606 err_out:
9607         kfree(mask);
9608 free_input:
9609         kfree(input);
9610 free_jump:
9611         kfree(jump);
9612         return err;
9613 }
9614
9615 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9616                                   struct tc_cls_u32_offload *cls_u32)
9617 {
9618         switch (cls_u32->command) {
9619         case TC_CLSU32_NEW_KNODE:
9620         case TC_CLSU32_REPLACE_KNODE:
9621                 return ixgbe_configure_clsu32(adapter, cls_u32);
9622         case TC_CLSU32_DELETE_KNODE:
9623                 return ixgbe_delete_clsu32(adapter, cls_u32);
9624         case TC_CLSU32_NEW_HNODE:
9625         case TC_CLSU32_REPLACE_HNODE:
9626                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9627         case TC_CLSU32_DELETE_HNODE:
9628                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9629         default:
9630                 return -EOPNOTSUPP;
9631         }
9632 }
9633
9634 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9635                                    void *cb_priv)
9636 {
9637         struct ixgbe_adapter *adapter = cb_priv;
9638
9639         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9640                 return -EOPNOTSUPP;
9641
9642         switch (type) {
9643         case TC_SETUP_CLSU32:
9644                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9645         default:
9646                 return -EOPNOTSUPP;
9647         }
9648 }
9649
9650 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9651                                  struct tc_mqprio_qopt *mqprio)
9652 {
9653         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9654         return ixgbe_setup_tc(dev, mqprio->num_tc);
9655 }
9656
9657 static LIST_HEAD(ixgbe_block_cb_list);
9658
9659 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9660                             void *type_data)
9661 {
9662         struct ixgbe_adapter *adapter = netdev_priv(dev);
9663
9664         switch (type) {
9665         case TC_SETUP_BLOCK:
9666                 return flow_block_cb_setup_simple(type_data,
9667                                                   &ixgbe_block_cb_list,
9668                                                   ixgbe_setup_tc_block_cb,
9669                                                   adapter, adapter, true);
9670         case TC_SETUP_QDISC_MQPRIO:
9671                 return ixgbe_setup_tc_mqprio(dev, type_data);
9672         default:
9673                 return -EOPNOTSUPP;
9674         }
9675 }
9676
9677 #ifdef CONFIG_PCI_IOV
9678 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9679 {
9680         struct net_device *netdev = adapter->netdev;
9681
9682         rtnl_lock();
9683         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9684         rtnl_unlock();
9685 }
9686
9687 #endif
9688 void ixgbe_do_reset(struct net_device *netdev)
9689 {
9690         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9691
9692         if (netif_running(netdev))
9693                 ixgbe_reinit_locked(adapter);
9694         else
9695                 ixgbe_reset(adapter);
9696 }
9697
9698 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9699                                             netdev_features_t features)
9700 {
9701         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9702
9703         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9704         if (!(features & NETIF_F_RXCSUM))
9705                 features &= ~NETIF_F_LRO;
9706
9707         /* Turn off LRO if not RSC capable */
9708         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9709                 features &= ~NETIF_F_LRO;
9710
9711         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9712                 e_dev_err("LRO is not supported with XDP\n");
9713                 features &= ~NETIF_F_LRO;
9714         }
9715
9716         return features;
9717 }
9718
9719 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9720 {
9721         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9722                         num_online_cpus());
9723
9724         /* go back to full RSS if we're not running SR-IOV */
9725         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9726                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9727                                     IXGBE_FLAG_SRIOV_ENABLED);
9728
9729         adapter->ring_feature[RING_F_RSS].limit = rss;
9730         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9731
9732         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9733 }
9734
9735 static int ixgbe_set_features(struct net_device *netdev,
9736                               netdev_features_t features)
9737 {
9738         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9739         netdev_features_t changed = netdev->features ^ features;
9740         bool need_reset = false;
9741
9742         /* Make sure RSC matches LRO, reset if change */
9743         if (!(features & NETIF_F_LRO)) {
9744                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9745                         need_reset = true;
9746                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9747         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9748                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9749                 if (adapter->rx_itr_setting == 1 ||
9750                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9751                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9752                         need_reset = true;
9753                 } else if ((changed ^ features) & NETIF_F_LRO) {
9754                         e_info(probe, "rx-usecs set too low, "
9755                                "disabling RSC\n");
9756                 }
9757         }
9758
9759         /*
9760          * Check if Flow Director n-tuple support or hw_tc support was
9761          * enabled or disabled.  If the state changed, we need to reset.
9762          */
9763         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9764                 /* turn off ATR, enable perfect filters and reset */
9765                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9766                         need_reset = true;
9767
9768                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9769                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9770         } else {
9771                 /* turn off perfect filters, enable ATR and reset */
9772                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9773                         need_reset = true;
9774
9775                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9776
9777                 /* We cannot enable ATR if SR-IOV is enabled */
9778                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9779                     /* We cannot enable ATR if we have 2 or more tcs */
9780                     (adapter->hw_tcs > 1) ||
9781                     /* We cannot enable ATR if RSS is disabled */
9782                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9783                     /* A sample rate of 0 indicates ATR disabled */
9784                     (!adapter->atr_sample_rate))
9785                         ; /* do nothing not supported */
9786                 else /* otherwise supported and set the flag */
9787                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9788         }
9789
9790         if (changed & NETIF_F_RXALL)
9791                 need_reset = true;
9792
9793         netdev->features = features;
9794
9795         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9796                 ixgbe_reset_l2fw_offload(adapter);
9797         else if (need_reset)
9798                 ixgbe_do_reset(netdev);
9799         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9800                             NETIF_F_HW_VLAN_CTAG_FILTER))
9801                 ixgbe_set_rx_mode(netdev);
9802
9803         return 1;
9804 }
9805
9806 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9807                              struct net_device *dev,
9808                              const unsigned char *addr, u16 vid,
9809                              u16 flags,
9810                              struct netlink_ext_ack *extack)
9811 {
9812         /* guarantee we can provide a unique filter for the unicast address */
9813         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9814                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9815                 u16 pool = VMDQ_P(0);
9816
9817                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9818                         return -ENOMEM;
9819         }
9820
9821         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9822 }
9823
9824 /**
9825  * ixgbe_configure_bridge_mode - set various bridge modes
9826  * @adapter: the private structure
9827  * @mode: requested bridge mode
9828  *
9829  * Configure some settings require for various bridge modes.
9830  **/
9831 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9832                                        __u16 mode)
9833 {
9834         struct ixgbe_hw *hw = &adapter->hw;
9835         unsigned int p, num_pools;
9836         u32 vmdctl;
9837
9838         switch (mode) {
9839         case BRIDGE_MODE_VEPA:
9840                 /* disable Tx loopback, rely on switch hairpin mode */
9841                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9842
9843                 /* must enable Rx switching replication to allow multicast
9844                  * packet reception on all VFs, and to enable source address
9845                  * pruning.
9846                  */
9847                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9848                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9849                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9850
9851                 /* enable Rx source address pruning. Note, this requires
9852                  * replication to be enabled or else it does nothing.
9853                  */
9854                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9855                 for (p = 0; p < num_pools; p++) {
9856                         if (hw->mac.ops.set_source_address_pruning)
9857                                 hw->mac.ops.set_source_address_pruning(hw,
9858                                                                        true,
9859                                                                        p);
9860                 }
9861                 break;
9862         case BRIDGE_MODE_VEB:
9863                 /* enable Tx loopback for internal VF/PF communication */
9864                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9865                                 IXGBE_PFDTXGSWC_VT_LBEN);
9866
9867                 /* disable Rx switching replication unless we have SR-IOV
9868                  * virtual functions
9869                  */
9870                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9871                 if (!adapter->num_vfs)
9872                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9873                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9874
9875                 /* disable Rx source address pruning, since we don't expect to
9876                  * be receiving external loopback of our transmitted frames.
9877                  */
9878                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9879                 for (p = 0; p < num_pools; p++) {
9880                         if (hw->mac.ops.set_source_address_pruning)
9881                                 hw->mac.ops.set_source_address_pruning(hw,
9882                                                                        false,
9883                                                                        p);
9884                 }
9885                 break;
9886         default:
9887                 return -EINVAL;
9888         }
9889
9890         adapter->bridge_mode = mode;
9891
9892         e_info(drv, "enabling bridge mode: %s\n",
9893                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9894
9895         return 0;
9896 }
9897
9898 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9899                                     struct nlmsghdr *nlh, u16 flags,
9900                                     struct netlink_ext_ack *extack)
9901 {
9902         struct ixgbe_adapter *adapter = netdev_priv(dev);
9903         struct nlattr *attr, *br_spec;
9904         int rem;
9905
9906         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9907                 return -EOPNOTSUPP;
9908
9909         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9910         if (!br_spec)
9911                 return -EINVAL;
9912
9913         nla_for_each_nested(attr, br_spec, rem) {
9914                 int status;
9915                 __u16 mode;
9916
9917                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9918                         continue;
9919
9920                 if (nla_len(attr) < sizeof(mode))
9921                         return -EINVAL;
9922
9923                 mode = nla_get_u16(attr);
9924                 status = ixgbe_configure_bridge_mode(adapter, mode);
9925                 if (status)
9926                         return status;
9927
9928                 break;
9929         }
9930
9931         return 0;
9932 }
9933
9934 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9935                                     struct net_device *dev,
9936                                     u32 filter_mask, int nlflags)
9937 {
9938         struct ixgbe_adapter *adapter = netdev_priv(dev);
9939
9940         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9941                 return 0;
9942
9943         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9944                                        adapter->bridge_mode, 0, 0, nlflags,
9945                                        filter_mask, NULL);
9946 }
9947
9948 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9949 {
9950         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9951         struct ixgbe_fwd_adapter *accel;
9952         int tcs = adapter->hw_tcs ? : 1;
9953         int pool, err;
9954
9955         if (adapter->xdp_prog) {
9956                 e_warn(probe, "L2FW offload is not supported with XDP\n");
9957                 return ERR_PTR(-EINVAL);
9958         }
9959
9960         /* The hardware supported by ixgbe only filters on the destination MAC
9961          * address. In order to avoid issues we only support offloading modes
9962          * where the hardware can actually provide the functionality.
9963          */
9964         if (!macvlan_supports_dest_filter(vdev))
9965                 return ERR_PTR(-EMEDIUMTYPE);
9966
9967         /* We need to lock down the macvlan to be a single queue device so that
9968          * we can reuse the tc_to_txq field in the macvlan netdev to represent
9969          * the queue mapping to our netdev.
9970          */
9971         if (netif_is_multiqueue(vdev))
9972                 return ERR_PTR(-ERANGE);
9973
9974         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9975         if (pool == adapter->num_rx_pools) {
9976                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
9977                 u16 reserved_pools;
9978
9979                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9980                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9981                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
9982                         return ERR_PTR(-EBUSY);
9983
9984                 /* Hardware has a limited number of available pools. Each VF,
9985                  * and the PF require a pool. Check to ensure we don't
9986                  * attempt to use more then the available number of pools.
9987                  */
9988                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9989                         return ERR_PTR(-EBUSY);
9990
9991                 /* Enable VMDq flag so device will be set in VM mode */
9992                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
9993                                   IXGBE_FLAG_SRIOV_ENABLED;
9994
9995                 /* Try to reserve as many queues per pool as possible,
9996                  * we start with the configurations that support 4 queues
9997                  * per pools, followed by 2, and then by just 1 per pool.
9998                  */
9999                 if (used_pools < 32 && adapter->num_rx_pools < 16)
10000                         reserved_pools = min_t(u16,
10001                                                32 - used_pools,
10002                                                16 - adapter->num_rx_pools);
10003                 else if (adapter->num_rx_pools < 32)
10004                         reserved_pools = min_t(u16,
10005                                                64 - used_pools,
10006                                                32 - adapter->num_rx_pools);
10007                 else
10008                         reserved_pools = 64 - used_pools;
10009
10010
10011                 if (!reserved_pools)
10012                         return ERR_PTR(-EBUSY);
10013
10014                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10015
10016                 /* Force reinit of ring allocation with VMDQ enabled */
10017                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10018                 if (err)
10019                         return ERR_PTR(err);
10020
10021                 if (pool >= adapter->num_rx_pools)
10022                         return ERR_PTR(-ENOMEM);
10023         }
10024
10025         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10026         if (!accel)
10027                 return ERR_PTR(-ENOMEM);
10028
10029         set_bit(pool, adapter->fwd_bitmask);
10030         netdev_set_sb_channel(vdev, pool);
10031         accel->pool = pool;
10032         accel->netdev = vdev;
10033
10034         if (!netif_running(pdev))
10035                 return accel;
10036
10037         err = ixgbe_fwd_ring_up(adapter, accel);
10038         if (err)
10039                 return ERR_PTR(err);
10040
10041         return accel;
10042 }
10043
10044 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10045 {
10046         struct ixgbe_fwd_adapter *accel = priv;
10047         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10048         unsigned int rxbase = accel->rx_base_queue;
10049         unsigned int i;
10050
10051         /* delete unicast filter associated with offloaded interface */
10052         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10053                              VMDQ_P(accel->pool));
10054
10055         /* Allow remaining Rx packets to get flushed out of the
10056          * Rx FIFO before we drop the netdev for the ring.
10057          */
10058         usleep_range(10000, 20000);
10059
10060         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10061                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10062                 struct ixgbe_q_vector *qv = ring->q_vector;
10063
10064                 /* Make sure we aren't processing any packets and clear
10065                  * netdev to shut down the ring.
10066                  */
10067                 if (netif_running(adapter->netdev))
10068                         napi_synchronize(&qv->napi);
10069                 ring->netdev = NULL;
10070         }
10071
10072         /* unbind the queues and drop the subordinate channel config */
10073         netdev_unbind_sb_channel(pdev, accel->netdev);
10074         netdev_set_sb_channel(accel->netdev, 0);
10075
10076         clear_bit(accel->pool, adapter->fwd_bitmask);
10077         kfree(accel);
10078 }
10079
10080 #define IXGBE_MAX_MAC_HDR_LEN           127
10081 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10082
10083 static netdev_features_t
10084 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10085                      netdev_features_t features)
10086 {
10087         unsigned int network_hdr_len, mac_hdr_len;
10088
10089         /* Make certain the headers can be described by a context descriptor */
10090         mac_hdr_len = skb_network_header(skb) - skb->data;
10091         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10092                 return features & ~(NETIF_F_HW_CSUM |
10093                                     NETIF_F_SCTP_CRC |
10094                                     NETIF_F_GSO_UDP_L4 |
10095                                     NETIF_F_HW_VLAN_CTAG_TX |
10096                                     NETIF_F_TSO |
10097                                     NETIF_F_TSO6);
10098
10099         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10100         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10101                 return features & ~(NETIF_F_HW_CSUM |
10102                                     NETIF_F_SCTP_CRC |
10103                                     NETIF_F_GSO_UDP_L4 |
10104                                     NETIF_F_TSO |
10105                                     NETIF_F_TSO6);
10106
10107         /* We can only support IPV4 TSO in tunnels if we can mangle the
10108          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10109          * IPsec offoad sets skb->encapsulation but still can handle
10110          * the TSO, so it's the exception.
10111          */
10112         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10113 #ifdef CONFIG_IXGBE_IPSEC
10114                 if (!secpath_exists(skb))
10115 #endif
10116                         features &= ~NETIF_F_TSO;
10117         }
10118
10119         return features;
10120 }
10121
10122 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10123 {
10124         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10125         struct ixgbe_adapter *adapter = netdev_priv(dev);
10126         struct bpf_prog *old_prog;
10127         bool need_reset;
10128
10129         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10130                 return -EINVAL;
10131
10132         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10133                 return -EINVAL;
10134
10135         /* verify ixgbe ring attributes are sufficient for XDP */
10136         for (i = 0; i < adapter->num_rx_queues; i++) {
10137                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10138
10139                 if (ring_is_rsc_enabled(ring))
10140                         return -EINVAL;
10141
10142                 if (frame_size > ixgbe_rx_bufsz(ring))
10143                         return -EINVAL;
10144         }
10145
10146         if (nr_cpu_ids > MAX_XDP_QUEUES)
10147                 return -ENOMEM;
10148
10149         old_prog = xchg(&adapter->xdp_prog, prog);
10150         need_reset = (!!prog != !!old_prog);
10151
10152         /* If transitioning XDP modes reconfigure rings */
10153         if (need_reset) {
10154                 int err;
10155
10156                 if (!prog)
10157                         /* Wait until ndo_xsk_wakeup completes. */
10158                         synchronize_rcu();
10159                 err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10160
10161                 if (err) {
10162                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10163                         return -EINVAL;
10164                 }
10165         } else {
10166                 for (i = 0; i < adapter->num_rx_queues; i++)
10167                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10168                             adapter->xdp_prog);
10169         }
10170
10171         if (old_prog)
10172                 bpf_prog_put(old_prog);
10173
10174         /* Kick start the NAPI context if there is an AF_XDP socket open
10175          * on that queue id. This so that receiving will start.
10176          */
10177         if (need_reset && prog)
10178                 for (i = 0; i < adapter->num_rx_queues; i++)
10179                         if (adapter->xdp_ring[i]->xsk_umem)
10180                                 (void)ixgbe_xsk_wakeup(adapter->netdev, i,
10181                                                        XDP_WAKEUP_RX);
10182
10183         return 0;
10184 }
10185
10186 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10187 {
10188         struct ixgbe_adapter *adapter = netdev_priv(dev);
10189
10190         switch (xdp->command) {
10191         case XDP_SETUP_PROG:
10192                 return ixgbe_xdp_setup(dev, xdp->prog);
10193         case XDP_QUERY_PROG:
10194                 xdp->prog_id = adapter->xdp_prog ?
10195                         adapter->xdp_prog->aux->id : 0;
10196                 return 0;
10197         case XDP_SETUP_XSK_UMEM:
10198                 return ixgbe_xsk_umem_setup(adapter, xdp->xsk.umem,
10199                                             xdp->xsk.queue_id);
10200
10201         default:
10202                 return -EINVAL;
10203         }
10204 }
10205
10206 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10207 {
10208         /* Force memory writes to complete before letting h/w know there
10209          * are new descriptors to fetch.
10210          */
10211         wmb();
10212         writel(ring->next_to_use, ring->tail);
10213 }
10214
10215 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10216                           struct xdp_frame **frames, u32 flags)
10217 {
10218         struct ixgbe_adapter *adapter = netdev_priv(dev);
10219         struct ixgbe_ring *ring;
10220         int drops = 0;
10221         int i;
10222
10223         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10224                 return -ENETDOWN;
10225
10226         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10227                 return -EINVAL;
10228
10229         /* During program transitions its possible adapter->xdp_prog is assigned
10230          * but ring has not been configured yet. In this case simply abort xmit.
10231          */
10232         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10233         if (unlikely(!ring))
10234                 return -ENXIO;
10235
10236         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10237                 return -ENXIO;
10238
10239         for (i = 0; i < n; i++) {
10240                 struct xdp_frame *xdpf = frames[i];
10241                 int err;
10242
10243                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10244                 if (err != IXGBE_XDP_TX) {
10245                         xdp_return_frame_rx_napi(xdpf);
10246                         drops++;
10247                 }
10248         }
10249
10250         if (unlikely(flags & XDP_XMIT_FLUSH))
10251                 ixgbe_xdp_ring_update_tail(ring);
10252
10253         return n - drops;
10254 }
10255
10256 static const struct net_device_ops ixgbe_netdev_ops = {
10257         .ndo_open               = ixgbe_open,
10258         .ndo_stop               = ixgbe_close,
10259         .ndo_start_xmit         = ixgbe_xmit_frame,
10260         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10261         .ndo_validate_addr      = eth_validate_addr,
10262         .ndo_set_mac_address    = ixgbe_set_mac,
10263         .ndo_change_mtu         = ixgbe_change_mtu,
10264         .ndo_tx_timeout         = ixgbe_tx_timeout,
10265         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10266         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10267         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10268         .ndo_do_ioctl           = ixgbe_ioctl,
10269         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10270         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10271         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10272         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10273         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10274         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10275         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10276         .ndo_get_stats64        = ixgbe_get_stats64,
10277         .ndo_setup_tc           = __ixgbe_setup_tc,
10278 #ifdef IXGBE_FCOE
10279         .ndo_select_queue       = ixgbe_select_queue,
10280         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10281         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10282         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10283         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10284         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10285         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10286         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10287 #endif /* IXGBE_FCOE */
10288         .ndo_set_features = ixgbe_set_features,
10289         .ndo_fix_features = ixgbe_fix_features,
10290         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10291         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10292         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10293         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10294         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10295         .ndo_udp_tunnel_add     = udp_tunnel_nic_add_port,
10296         .ndo_udp_tunnel_del     = udp_tunnel_nic_del_port,
10297         .ndo_features_check     = ixgbe_features_check,
10298         .ndo_bpf                = ixgbe_xdp,
10299         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10300         .ndo_xsk_wakeup         = ixgbe_xsk_wakeup,
10301 };
10302
10303 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10304                                  struct ixgbe_ring *tx_ring)
10305 {
10306         unsigned long wait_delay, delay_interval;
10307         struct ixgbe_hw *hw = &adapter->hw;
10308         u8 reg_idx = tx_ring->reg_idx;
10309         int wait_loop;
10310         u32 txdctl;
10311
10312         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10313
10314         /* delay mechanism from ixgbe_disable_tx */
10315         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10316
10317         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10318         wait_delay = delay_interval;
10319
10320         while (wait_loop--) {
10321                 usleep_range(wait_delay, wait_delay + 10);
10322                 wait_delay += delay_interval * 2;
10323                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10324
10325                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10326                         return;
10327         }
10328
10329         e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10330 }
10331
10332 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10333                               struct ixgbe_ring *tx_ring)
10334 {
10335         set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10336         ixgbe_disable_txr_hw(adapter, tx_ring);
10337 }
10338
10339 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10340                                  struct ixgbe_ring *rx_ring)
10341 {
10342         unsigned long wait_delay, delay_interval;
10343         struct ixgbe_hw *hw = &adapter->hw;
10344         u8 reg_idx = rx_ring->reg_idx;
10345         int wait_loop;
10346         u32 rxdctl;
10347
10348         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10349         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10350         rxdctl |= IXGBE_RXDCTL_SWFLSH;
10351
10352         /* write value back with RXDCTL.ENABLE bit cleared */
10353         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10354
10355         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10356         if (hw->mac.type == ixgbe_mac_82598EB &&
10357             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10358                 return;
10359
10360         /* delay mechanism from ixgbe_disable_rx */
10361         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10362
10363         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10364         wait_delay = delay_interval;
10365
10366         while (wait_loop--) {
10367                 usleep_range(wait_delay, wait_delay + 10);
10368                 wait_delay += delay_interval * 2;
10369                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10370
10371                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10372                         return;
10373         }
10374
10375         e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10376 }
10377
10378 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10379 {
10380         memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10381         memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10382 }
10383
10384 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10385 {
10386         memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10387         memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10388 }
10389
10390 /**
10391  * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10392  * @adapter: adapter structure
10393  * @ring: ring index
10394  *
10395  * This function disables a certain Rx/Tx/XDP Tx ring. The function
10396  * assumes that the netdev is running.
10397  **/
10398 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10399 {
10400         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10401
10402         rx_ring = adapter->rx_ring[ring];
10403         tx_ring = adapter->tx_ring[ring];
10404         xdp_ring = adapter->xdp_ring[ring];
10405
10406         ixgbe_disable_txr(adapter, tx_ring);
10407         if (xdp_ring)
10408                 ixgbe_disable_txr(adapter, xdp_ring);
10409         ixgbe_disable_rxr_hw(adapter, rx_ring);
10410
10411         if (xdp_ring)
10412                 synchronize_rcu();
10413
10414         /* Rx/Tx/XDP Tx share the same napi context. */
10415         napi_disable(&rx_ring->q_vector->napi);
10416
10417         ixgbe_clean_tx_ring(tx_ring);
10418         if (xdp_ring)
10419                 ixgbe_clean_tx_ring(xdp_ring);
10420         ixgbe_clean_rx_ring(rx_ring);
10421
10422         ixgbe_reset_txr_stats(tx_ring);
10423         if (xdp_ring)
10424                 ixgbe_reset_txr_stats(xdp_ring);
10425         ixgbe_reset_rxr_stats(rx_ring);
10426 }
10427
10428 /**
10429  * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10430  * @adapter: adapter structure
10431  * @ring: ring index
10432  *
10433  * This function enables a certain Rx/Tx/XDP Tx ring. The function
10434  * assumes that the netdev is running.
10435  **/
10436 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10437 {
10438         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10439
10440         rx_ring = adapter->rx_ring[ring];
10441         tx_ring = adapter->tx_ring[ring];
10442         xdp_ring = adapter->xdp_ring[ring];
10443
10444         /* Rx/Tx/XDP Tx share the same napi context. */
10445         napi_enable(&rx_ring->q_vector->napi);
10446
10447         ixgbe_configure_tx_ring(adapter, tx_ring);
10448         if (xdp_ring)
10449                 ixgbe_configure_tx_ring(adapter, xdp_ring);
10450         ixgbe_configure_rx_ring(adapter, rx_ring);
10451
10452         clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10453         if (xdp_ring)
10454                 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10455 }
10456
10457 /**
10458  * ixgbe_enumerate_functions - Get the number of ports this device has
10459  * @adapter: adapter structure
10460  *
10461  * This function enumerates the phsyical functions co-located on a single slot,
10462  * in order to determine how many ports a device has. This is most useful in
10463  * determining the required GT/s of PCIe bandwidth necessary for optimal
10464  * performance.
10465  **/
10466 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10467 {
10468         struct pci_dev *entry, *pdev = adapter->pdev;
10469         int physfns = 0;
10470
10471         /* Some cards can not use the generic count PCIe functions method,
10472          * because they are behind a parent switch, so we hardcode these with
10473          * the correct number of functions.
10474          */
10475         if (ixgbe_pcie_from_parent(&adapter->hw))
10476                 physfns = 4;
10477
10478         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10479                 /* don't count virtual functions */
10480                 if (entry->is_virtfn)
10481                         continue;
10482
10483                 /* When the devices on the bus don't all match our device ID,
10484                  * we can't reliably determine the correct number of
10485                  * functions. This can occur if a function has been direct
10486                  * attached to a virtual machine using VT-d, for example. In
10487                  * this case, simply return -1 to indicate this.
10488                  */
10489                 if ((entry->vendor != pdev->vendor) ||
10490                     (entry->device != pdev->device))
10491                         return -1;
10492
10493                 physfns++;
10494         }
10495
10496         return physfns;
10497 }
10498
10499 /**
10500  * ixgbe_wol_supported - Check whether device supports WoL
10501  * @adapter: the adapter private structure
10502  * @device_id: the device ID
10503  * @subdevice_id: the subsystem device ID
10504  *
10505  * This function is used by probe and ethtool to determine
10506  * which devices have WoL support
10507  *
10508  **/
10509 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10510                          u16 subdevice_id)
10511 {
10512         struct ixgbe_hw *hw = &adapter->hw;
10513         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10514
10515         /* WOL not supported on 82598 */
10516         if (hw->mac.type == ixgbe_mac_82598EB)
10517                 return false;
10518
10519         /* check eeprom to see if WOL is enabled for X540 and newer */
10520         if (hw->mac.type >= ixgbe_mac_X540) {
10521                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10522                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10523                      (hw->bus.func == 0)))
10524                         return true;
10525         }
10526
10527         /* WOL is determined based on device IDs for 82599 MACs */
10528         switch (device_id) {
10529         case IXGBE_DEV_ID_82599_SFP:
10530                 /* Only these subdevices could supports WOL */
10531                 switch (subdevice_id) {
10532                 case IXGBE_SUBDEV_ID_82599_560FLR:
10533                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10534                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10535                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10536                         /* only support first port */
10537                         if (hw->bus.func != 0)
10538                                 break;
10539                         fallthrough;
10540                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10541                 case IXGBE_SUBDEV_ID_82599_SFP:
10542                 case IXGBE_SUBDEV_ID_82599_RNDC:
10543                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10544                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10545                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10546                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10547                         return true;
10548                 }
10549                 break;
10550         case IXGBE_DEV_ID_82599EN_SFP:
10551                 /* Only these subdevices support WOL */
10552                 switch (subdevice_id) {
10553                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10554                         return true;
10555                 }
10556                 break;
10557         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10558                 /* All except this subdevice support WOL */
10559                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10560                         return true;
10561                 break;
10562         case IXGBE_DEV_ID_82599_KX4:
10563                 return  true;
10564         default:
10565                 break;
10566         }
10567
10568         return false;
10569 }
10570
10571 /**
10572  * ixgbe_set_fw_version - Set FW version
10573  * @adapter: the adapter private structure
10574  *
10575  * This function is used by probe and ethtool to determine the FW version to
10576  * format to display. The FW version is taken from the EEPROM/NVM.
10577  */
10578 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10579 {
10580         struct ixgbe_hw *hw = &adapter->hw;
10581         struct ixgbe_nvm_version nvm_ver;
10582
10583         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10584         if (nvm_ver.oem_valid) {
10585                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10586                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10587                          nvm_ver.oem_release);
10588                 return;
10589         }
10590
10591         ixgbe_get_etk_id(hw, &nvm_ver);
10592         ixgbe_get_orom_version(hw, &nvm_ver);
10593
10594         if (nvm_ver.or_valid) {
10595                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10596                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10597                          nvm_ver.or_build, nvm_ver.or_patch);
10598                 return;
10599         }
10600
10601         /* Set ETrack ID format */
10602         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10603                  "0x%08x", nvm_ver.etk_id);
10604 }
10605
10606 /**
10607  * ixgbe_probe - Device Initialization Routine
10608  * @pdev: PCI device information struct
10609  * @ent: entry in ixgbe_pci_tbl
10610  *
10611  * Returns 0 on success, negative on failure
10612  *
10613  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10614  * The OS initialization, configuring of the adapter private structure,
10615  * and a hardware reset occur.
10616  **/
10617 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10618 {
10619         struct net_device *netdev;
10620         struct ixgbe_adapter *adapter = NULL;
10621         struct ixgbe_hw *hw;
10622         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10623         int i, err, pci_using_dac, expected_gts;
10624         unsigned int indices = MAX_TX_QUEUES;
10625         u8 part_str[IXGBE_PBANUM_LENGTH];
10626         bool disable_dev = false;
10627 #ifdef IXGBE_FCOE
10628         u16 device_caps;
10629 #endif
10630         u32 eec;
10631
10632         /* Catch broken hardware that put the wrong VF device ID in
10633          * the PCIe SR-IOV capability.
10634          */
10635         if (pdev->is_virtfn) {
10636                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10637                      pci_name(pdev), pdev->vendor, pdev->device);
10638                 return -EINVAL;
10639         }
10640
10641         err = pci_enable_device_mem(pdev);
10642         if (err)
10643                 return err;
10644
10645         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10646                 pci_using_dac = 1;
10647         } else {
10648                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10649                 if (err) {
10650                         dev_err(&pdev->dev,
10651                                 "No usable DMA configuration, aborting\n");
10652                         goto err_dma;
10653                 }
10654                 pci_using_dac = 0;
10655         }
10656
10657         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10658         if (err) {
10659                 dev_err(&pdev->dev,
10660                         "pci_request_selected_regions failed 0x%x\n", err);
10661                 goto err_pci_reg;
10662         }
10663
10664         pci_enable_pcie_error_reporting(pdev);
10665
10666         pci_set_master(pdev);
10667         pci_save_state(pdev);
10668
10669         if (ii->mac == ixgbe_mac_82598EB) {
10670 #ifdef CONFIG_IXGBE_DCB
10671                 /* 8 TC w/ 4 queues per TC */
10672                 indices = 4 * MAX_TRAFFIC_CLASS;
10673 #else
10674                 indices = IXGBE_MAX_RSS_INDICES;
10675 #endif
10676         }
10677
10678         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10679         if (!netdev) {
10680                 err = -ENOMEM;
10681                 goto err_alloc_etherdev;
10682         }
10683
10684         SET_NETDEV_DEV(netdev, &pdev->dev);
10685
10686         adapter = netdev_priv(netdev);
10687
10688         adapter->netdev = netdev;
10689         adapter->pdev = pdev;
10690         hw = &adapter->hw;
10691         hw->back = adapter;
10692         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10693
10694         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10695                               pci_resource_len(pdev, 0));
10696         adapter->io_addr = hw->hw_addr;
10697         if (!hw->hw_addr) {
10698                 err = -EIO;
10699                 goto err_ioremap;
10700         }
10701
10702         netdev->netdev_ops = &ixgbe_netdev_ops;
10703         ixgbe_set_ethtool_ops(netdev);
10704         netdev->watchdog_timeo = 5 * HZ;
10705         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10706
10707         /* Setup hw api */
10708         hw->mac.ops   = *ii->mac_ops;
10709         hw->mac.type  = ii->mac;
10710         hw->mvals     = ii->mvals;
10711         if (ii->link_ops)
10712                 hw->link.ops  = *ii->link_ops;
10713
10714         /* EEPROM */
10715         hw->eeprom.ops = *ii->eeprom_ops;
10716         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10717         if (ixgbe_removed(hw->hw_addr)) {
10718                 err = -EIO;
10719                 goto err_ioremap;
10720         }
10721         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10722         if (!(eec & BIT(8)))
10723                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10724
10725         /* PHY */
10726         hw->phy.ops = *ii->phy_ops;
10727         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10728         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10729         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10730         hw->phy.mdio.mmds = 0;
10731         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10732         hw->phy.mdio.dev = netdev;
10733         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10734         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10735
10736         /* setup the private structure */
10737         err = ixgbe_sw_init(adapter, ii);
10738         if (err)
10739                 goto err_sw_init;
10740
10741         switch (adapter->hw.mac.type) {
10742         case ixgbe_mac_X550:
10743         case ixgbe_mac_X550EM_x:
10744                 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550;
10745                 break;
10746         case ixgbe_mac_x550em_a:
10747                 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550em_a;
10748                 break;
10749         default:
10750                 break;
10751         }
10752
10753         /* Make sure the SWFW semaphore is in a valid state */
10754         if (hw->mac.ops.init_swfw_sync)
10755                 hw->mac.ops.init_swfw_sync(hw);
10756
10757         /* Make it possible the adapter to be woken up via WOL */
10758         switch (adapter->hw.mac.type) {
10759         case ixgbe_mac_82599EB:
10760         case ixgbe_mac_X540:
10761         case ixgbe_mac_X550:
10762         case ixgbe_mac_X550EM_x:
10763         case ixgbe_mac_x550em_a:
10764                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10765                 break;
10766         default:
10767                 break;
10768         }
10769
10770         /*
10771          * If there is a fan on this device and it has failed log the
10772          * failure.
10773          */
10774         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10775                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10776                 if (esdp & IXGBE_ESDP_SDP1)
10777                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10778         }
10779
10780         if (allow_unsupported_sfp)
10781                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10782
10783         /* reset_hw fills in the perm_addr as well */
10784         hw->phy.reset_if_overtemp = true;
10785         err = hw->mac.ops.reset_hw(hw);
10786         hw->phy.reset_if_overtemp = false;
10787         ixgbe_set_eee_capable(adapter);
10788         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10789                 err = 0;
10790         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10791                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10792                 e_dev_err("Reload the driver after installing a supported module.\n");
10793                 goto err_sw_init;
10794         } else if (err) {
10795                 e_dev_err("HW Init failed: %d\n", err);
10796                 goto err_sw_init;
10797         }
10798
10799 #ifdef CONFIG_PCI_IOV
10800         /* SR-IOV not supported on the 82598 */
10801         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10802                 goto skip_sriov;
10803         /* Mailbox */
10804         ixgbe_init_mbx_params_pf(hw);
10805         hw->mbx.ops = ii->mbx_ops;
10806         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10807         ixgbe_enable_sriov(adapter, max_vfs);
10808 skip_sriov:
10809
10810 #endif
10811         netdev->features = NETIF_F_SG |
10812                            NETIF_F_TSO |
10813                            NETIF_F_TSO6 |
10814                            NETIF_F_RXHASH |
10815                            NETIF_F_RXCSUM |
10816                            NETIF_F_HW_CSUM;
10817
10818 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10819                                     NETIF_F_GSO_GRE_CSUM | \
10820                                     NETIF_F_GSO_IPXIP4 | \
10821                                     NETIF_F_GSO_IPXIP6 | \
10822                                     NETIF_F_GSO_UDP_TUNNEL | \
10823                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10824
10825         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10826         netdev->features |= NETIF_F_GSO_PARTIAL |
10827                             IXGBE_GSO_PARTIAL_FEATURES;
10828
10829         if (hw->mac.type >= ixgbe_mac_82599EB)
10830                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
10831
10832 #ifdef CONFIG_IXGBE_IPSEC
10833 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10834                                  NETIF_F_HW_ESP_TX_CSUM | \
10835                                  NETIF_F_GSO_ESP)
10836
10837         if (adapter->ipsec)
10838                 netdev->features |= IXGBE_ESP_FEATURES;
10839 #endif
10840         /* copy netdev features into list of user selectable features */
10841         netdev->hw_features |= netdev->features |
10842                                NETIF_F_HW_VLAN_CTAG_FILTER |
10843                                NETIF_F_HW_VLAN_CTAG_RX |
10844                                NETIF_F_HW_VLAN_CTAG_TX |
10845                                NETIF_F_RXALL |
10846                                NETIF_F_HW_L2FW_DOFFLOAD;
10847
10848         if (hw->mac.type >= ixgbe_mac_82599EB)
10849                 netdev->hw_features |= NETIF_F_NTUPLE |
10850                                        NETIF_F_HW_TC;
10851
10852         if (pci_using_dac)
10853                 netdev->features |= NETIF_F_HIGHDMA;
10854
10855         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10856         netdev->hw_enc_features |= netdev->vlan_features;
10857         netdev->mpls_features |= NETIF_F_SG |
10858                                  NETIF_F_TSO |
10859                                  NETIF_F_TSO6 |
10860                                  NETIF_F_HW_CSUM;
10861         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10862
10863         /* set this bit last since it cannot be part of vlan_features */
10864         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10865                             NETIF_F_HW_VLAN_CTAG_RX |
10866                             NETIF_F_HW_VLAN_CTAG_TX;
10867
10868         netdev->priv_flags |= IFF_UNICAST_FLT;
10869         netdev->priv_flags |= IFF_SUPP_NOFCS;
10870
10871         /* MTU range: 68 - 9710 */
10872         netdev->min_mtu = ETH_MIN_MTU;
10873         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10874
10875 #ifdef CONFIG_IXGBE_DCB
10876         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10877                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10878 #endif
10879
10880 #ifdef IXGBE_FCOE
10881         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10882                 unsigned int fcoe_l;
10883
10884                 if (hw->mac.ops.get_device_caps) {
10885                         hw->mac.ops.get_device_caps(hw, &device_caps);
10886                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10887                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10888                 }
10889
10890
10891                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10892                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10893
10894                 netdev->features |= NETIF_F_FSO |
10895                                     NETIF_F_FCOE_CRC;
10896
10897                 netdev->vlan_features |= NETIF_F_FSO |
10898                                          NETIF_F_FCOE_CRC |
10899                                          NETIF_F_FCOE_MTU;
10900         }
10901 #endif /* IXGBE_FCOE */
10902         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10903                 netdev->hw_features |= NETIF_F_LRO;
10904         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10905                 netdev->features |= NETIF_F_LRO;
10906
10907         if (ixgbe_check_fw_error(adapter)) {
10908                 err = -EIO;
10909                 goto err_sw_init;
10910         }
10911
10912         /* make sure the EEPROM is good */
10913         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10914                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10915                 err = -EIO;
10916                 goto err_sw_init;
10917         }
10918
10919         eth_platform_get_mac_address(&adapter->pdev->dev,
10920                                      adapter->hw.mac.perm_addr);
10921
10922         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10923
10924         if (!is_valid_ether_addr(netdev->dev_addr)) {
10925                 e_dev_err("invalid MAC address\n");
10926                 err = -EIO;
10927                 goto err_sw_init;
10928         }
10929
10930         /* Set hw->mac.addr to permanent MAC address */
10931         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10932         ixgbe_mac_set_default_filter(adapter);
10933
10934         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10935
10936         if (ixgbe_removed(hw->hw_addr)) {
10937                 err = -EIO;
10938                 goto err_sw_init;
10939         }
10940         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10941         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10942         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10943
10944         err = ixgbe_init_interrupt_scheme(adapter);
10945         if (err)
10946                 goto err_sw_init;
10947
10948         for (i = 0; i < adapter->num_rx_queues; i++)
10949                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10950         for (i = 0; i < adapter->num_tx_queues; i++)
10951                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10952         for (i = 0; i < adapter->num_xdp_queues; i++)
10953                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10954
10955         /* WOL not supported for all devices */
10956         adapter->wol = 0;
10957         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10958         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10959                                                 pdev->subsystem_device);
10960         if (hw->wol_enabled)
10961                 adapter->wol = IXGBE_WUFC_MAG;
10962
10963         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10964
10965         /* save off EEPROM version number */
10966         ixgbe_set_fw_version(adapter);
10967
10968         /* pick up the PCI bus settings for reporting later */
10969         if (ixgbe_pcie_from_parent(hw))
10970                 ixgbe_get_parent_bus_info(adapter);
10971         else
10972                  hw->mac.ops.get_bus_info(hw);
10973
10974         /* calculate the expected PCIe bandwidth required for optimal
10975          * performance. Note that some older parts will never have enough
10976          * bandwidth due to being older generation PCIe parts. We clamp these
10977          * parts to ensure no warning is displayed if it can't be fixed.
10978          */
10979         switch (hw->mac.type) {
10980         case ixgbe_mac_82598EB:
10981                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10982                 break;
10983         default:
10984                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10985                 break;
10986         }
10987
10988         /* don't check link if we failed to enumerate functions */
10989         if (expected_gts > 0)
10990                 ixgbe_check_minimum_link(adapter, expected_gts);
10991
10992         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10993         if (err)
10994                 strlcpy(part_str, "Unknown", sizeof(part_str));
10995         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10996                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10997                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10998                            part_str);
10999         else
11000                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
11001                            hw->mac.type, hw->phy.type, part_str);
11002
11003         e_dev_info("%pM\n", netdev->dev_addr);
11004
11005         /* reset the hardware with the new settings */
11006         err = hw->mac.ops.start_hw(hw);
11007         if (err == IXGBE_ERR_EEPROM_VERSION) {
11008                 /* We are running on a pre-production device, log a warning */
11009                 e_dev_warn("This device is a pre-production adapter/LOM. "
11010                            "Please be aware there may be issues associated "
11011                            "with your hardware.  If you are experiencing "
11012                            "problems please contact your Intel or hardware "
11013                            "representative who provided you with this "
11014                            "hardware.\n");
11015         }
11016         strcpy(netdev->name, "eth%d");
11017         pci_set_drvdata(pdev, adapter);
11018         err = register_netdev(netdev);
11019         if (err)
11020                 goto err_register;
11021
11022
11023         /* power down the optics for 82599 SFP+ fiber */
11024         if (hw->mac.ops.disable_tx_laser)
11025                 hw->mac.ops.disable_tx_laser(hw);
11026
11027         /* carrier off reporting is important to ethtool even BEFORE open */
11028         netif_carrier_off(netdev);
11029
11030 #ifdef CONFIG_IXGBE_DCA
11031         if (dca_add_requester(&pdev->dev) == 0) {
11032                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
11033                 ixgbe_setup_dca(adapter);
11034         }
11035 #endif
11036         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
11037                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
11038                 for (i = 0; i < adapter->num_vfs; i++)
11039                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
11040         }
11041
11042         /* firmware requires driver version to be 0xFFFFFFFF
11043          * since os does not support feature
11044          */
11045         if (hw->mac.ops.set_fw_drv_ver)
11046                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11047                                            sizeof(UTS_RELEASE) - 1,
11048                                            UTS_RELEASE);
11049
11050         /* add san mac addr to netdev */
11051         ixgbe_add_sanmac_netdev(netdev);
11052
11053         e_dev_info("%s\n", ixgbe_default_device_descr);
11054
11055 #ifdef CONFIG_IXGBE_HWMON
11056         if (ixgbe_sysfs_init(adapter))
11057                 e_err(probe, "failed to allocate sysfs resources\n");
11058 #endif /* CONFIG_IXGBE_HWMON */
11059
11060         ixgbe_dbg_adapter_init(adapter);
11061
11062         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11063         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11064                 hw->mac.ops.setup_link(hw,
11065                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11066                         true);
11067
11068         err = ixgbe_mii_bus_init(hw);
11069         if (err)
11070                 goto err_netdev;
11071
11072         return 0;
11073
11074 err_netdev:
11075         unregister_netdev(netdev);
11076 err_register:
11077         ixgbe_release_hw_control(adapter);
11078         ixgbe_clear_interrupt_scheme(adapter);
11079 err_sw_init:
11080         ixgbe_disable_sriov(adapter);
11081         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11082         iounmap(adapter->io_addr);
11083         kfree(adapter->jump_tables[0]);
11084         kfree(adapter->mac_table);
11085         kfree(adapter->rss_key);
11086         bitmap_free(adapter->af_xdp_zc_qps);
11087 err_ioremap:
11088         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11089         free_netdev(netdev);
11090 err_alloc_etherdev:
11091         pci_release_mem_regions(pdev);
11092 err_pci_reg:
11093 err_dma:
11094         if (!adapter || disable_dev)
11095                 pci_disable_device(pdev);
11096         return err;
11097 }
11098
11099 /**
11100  * ixgbe_remove - Device Removal Routine
11101  * @pdev: PCI device information struct
11102  *
11103  * ixgbe_remove is called by the PCI subsystem to alert the driver
11104  * that it should release a PCI device.  The could be caused by a
11105  * Hot-Plug event, or because the driver is going to be removed from
11106  * memory.
11107  **/
11108 static void ixgbe_remove(struct pci_dev *pdev)
11109 {
11110         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11111         struct net_device *netdev;
11112         bool disable_dev;
11113         int i;
11114
11115         /* if !adapter then we already cleaned up in probe */
11116         if (!adapter)
11117                 return;
11118
11119         netdev  = adapter->netdev;
11120         ixgbe_dbg_adapter_exit(adapter);
11121
11122         set_bit(__IXGBE_REMOVING, &adapter->state);
11123         cancel_work_sync(&adapter->service_task);
11124
11125         if (adapter->mii_bus)
11126                 mdiobus_unregister(adapter->mii_bus);
11127
11128 #ifdef CONFIG_IXGBE_DCA
11129         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11130                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11131                 dca_remove_requester(&pdev->dev);
11132                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11133                                 IXGBE_DCA_CTRL_DCA_DISABLE);
11134         }
11135
11136 #endif
11137 #ifdef CONFIG_IXGBE_HWMON
11138         ixgbe_sysfs_exit(adapter);
11139 #endif /* CONFIG_IXGBE_HWMON */
11140
11141         /* remove the added san mac */
11142         ixgbe_del_sanmac_netdev(netdev);
11143
11144 #ifdef CONFIG_PCI_IOV
11145         ixgbe_disable_sriov(adapter);
11146 #endif
11147         if (netdev->reg_state == NETREG_REGISTERED)
11148                 unregister_netdev(netdev);
11149
11150         ixgbe_stop_ipsec_offload(adapter);
11151         ixgbe_clear_interrupt_scheme(adapter);
11152
11153         ixgbe_release_hw_control(adapter);
11154
11155 #ifdef CONFIG_DCB
11156         kfree(adapter->ixgbe_ieee_pfc);
11157         kfree(adapter->ixgbe_ieee_ets);
11158
11159 #endif
11160         iounmap(adapter->io_addr);
11161         pci_release_mem_regions(pdev);
11162
11163         e_dev_info("complete\n");
11164
11165         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11166                 if (adapter->jump_tables[i]) {
11167                         kfree(adapter->jump_tables[i]->input);
11168                         kfree(adapter->jump_tables[i]->mask);
11169                 }
11170                 kfree(adapter->jump_tables[i]);
11171         }
11172
11173         kfree(adapter->mac_table);
11174         kfree(adapter->rss_key);
11175         bitmap_free(adapter->af_xdp_zc_qps);
11176         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11177         free_netdev(netdev);
11178
11179         pci_disable_pcie_error_reporting(pdev);
11180
11181         if (disable_dev)
11182                 pci_disable_device(pdev);
11183 }
11184
11185 /**
11186  * ixgbe_io_error_detected - called when PCI error is detected
11187  * @pdev: Pointer to PCI device
11188  * @state: The current pci connection state
11189  *
11190  * This function is called after a PCI bus error affecting
11191  * this device has been detected.
11192  */
11193 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11194                                                 pci_channel_state_t state)
11195 {
11196         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11197         struct net_device *netdev = adapter->netdev;
11198
11199 #ifdef CONFIG_PCI_IOV
11200         struct ixgbe_hw *hw = &adapter->hw;
11201         struct pci_dev *bdev, *vfdev;
11202         u32 dw0, dw1, dw2, dw3;
11203         int vf, pos;
11204         u16 req_id, pf_func;
11205
11206         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11207             adapter->num_vfs == 0)
11208                 goto skip_bad_vf_detection;
11209
11210         bdev = pdev->bus->self;
11211         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11212                 bdev = bdev->bus->self;
11213
11214         if (!bdev)
11215                 goto skip_bad_vf_detection;
11216
11217         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11218         if (!pos)
11219                 goto skip_bad_vf_detection;
11220
11221         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11222         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11223         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11224         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11225         if (ixgbe_removed(hw->hw_addr))
11226                 goto skip_bad_vf_detection;
11227
11228         req_id = dw1 >> 16;
11229         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11230         if (!(req_id & 0x0080))
11231                 goto skip_bad_vf_detection;
11232
11233         pf_func = req_id & 0x01;
11234         if ((pf_func & 1) == (pdev->devfn & 1)) {
11235                 unsigned int device_id;
11236
11237                 vf = (req_id & 0x7F) >> 1;
11238                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11239                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11240                                 "%8.8x\tdw3: %8.8x\n",
11241                 dw0, dw1, dw2, dw3);
11242                 switch (adapter->hw.mac.type) {
11243                 case ixgbe_mac_82599EB:
11244                         device_id = IXGBE_82599_VF_DEVICE_ID;
11245                         break;
11246                 case ixgbe_mac_X540:
11247                         device_id = IXGBE_X540_VF_DEVICE_ID;
11248                         break;
11249                 case ixgbe_mac_X550:
11250                         device_id = IXGBE_DEV_ID_X550_VF;
11251                         break;
11252                 case ixgbe_mac_X550EM_x:
11253                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11254                         break;
11255                 case ixgbe_mac_x550em_a:
11256                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11257                         break;
11258                 default:
11259                         device_id = 0;
11260                         break;
11261                 }
11262
11263                 /* Find the pci device of the offending VF */
11264                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11265                 while (vfdev) {
11266                         if (vfdev->devfn == (req_id & 0xFF))
11267                                 break;
11268                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11269                                                device_id, vfdev);
11270                 }
11271                 /*
11272                  * There's a slim chance the VF could have been hot plugged,
11273                  * so if it is no longer present we don't need to issue the
11274                  * VFLR.  Just clean up the AER in that case.
11275                  */
11276                 if (vfdev) {
11277                         pcie_flr(vfdev);
11278                         /* Free device reference count */
11279                         pci_dev_put(vfdev);
11280                 }
11281         }
11282
11283         /*
11284          * Even though the error may have occurred on the other port
11285          * we still need to increment the vf error reference count for
11286          * both ports because the I/O resume function will be called
11287          * for both of them.
11288          */
11289         adapter->vferr_refcount++;
11290
11291         return PCI_ERS_RESULT_RECOVERED;
11292
11293 skip_bad_vf_detection:
11294 #endif /* CONFIG_PCI_IOV */
11295         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11296                 return PCI_ERS_RESULT_DISCONNECT;
11297
11298         if (!netif_device_present(netdev))
11299                 return PCI_ERS_RESULT_DISCONNECT;
11300
11301         rtnl_lock();
11302         netif_device_detach(netdev);
11303
11304         if (netif_running(netdev))
11305                 ixgbe_close_suspend(adapter);
11306
11307         if (state == pci_channel_io_perm_failure) {
11308                 rtnl_unlock();
11309                 return PCI_ERS_RESULT_DISCONNECT;
11310         }
11311
11312         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11313                 pci_disable_device(pdev);
11314         rtnl_unlock();
11315
11316         /* Request a slot reset. */
11317         return PCI_ERS_RESULT_NEED_RESET;
11318 }
11319
11320 /**
11321  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11322  * @pdev: Pointer to PCI device
11323  *
11324  * Restart the card from scratch, as if from a cold-boot.
11325  */
11326 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11327 {
11328         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11329         pci_ers_result_t result;
11330
11331         if (pci_enable_device_mem(pdev)) {
11332                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11333                 result = PCI_ERS_RESULT_DISCONNECT;
11334         } else {
11335                 smp_mb__before_atomic();
11336                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11337                 adapter->hw.hw_addr = adapter->io_addr;
11338                 pci_set_master(pdev);
11339                 pci_restore_state(pdev);
11340                 pci_save_state(pdev);
11341
11342                 pci_wake_from_d3(pdev, false);
11343
11344                 ixgbe_reset(adapter);
11345                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11346                 result = PCI_ERS_RESULT_RECOVERED;
11347         }
11348
11349         return result;
11350 }
11351
11352 /**
11353  * ixgbe_io_resume - called when traffic can start flowing again.
11354  * @pdev: Pointer to PCI device
11355  *
11356  * This callback is called when the error recovery driver tells us that
11357  * its OK to resume normal operation.
11358  */
11359 static void ixgbe_io_resume(struct pci_dev *pdev)
11360 {
11361         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11362         struct net_device *netdev = adapter->netdev;
11363
11364 #ifdef CONFIG_PCI_IOV
11365         if (adapter->vferr_refcount) {
11366                 e_info(drv, "Resuming after VF err\n");
11367                 adapter->vferr_refcount--;
11368                 return;
11369         }
11370
11371 #endif
11372         rtnl_lock();
11373         if (netif_running(netdev))
11374                 ixgbe_open(netdev);
11375
11376         netif_device_attach(netdev);
11377         rtnl_unlock();
11378 }
11379
11380 static const struct pci_error_handlers ixgbe_err_handler = {
11381         .error_detected = ixgbe_io_error_detected,
11382         .slot_reset = ixgbe_io_slot_reset,
11383         .resume = ixgbe_io_resume,
11384 };
11385
11386 static struct pci_driver ixgbe_driver = {
11387         .name     = ixgbe_driver_name,
11388         .id_table = ixgbe_pci_tbl,
11389         .probe    = ixgbe_probe,
11390         .remove   = ixgbe_remove,
11391 #ifdef CONFIG_PM
11392         .suspend  = ixgbe_suspend,
11393         .resume   = ixgbe_resume,
11394 #endif
11395         .shutdown = ixgbe_shutdown,
11396         .sriov_configure = ixgbe_pci_sriov_configure,
11397         .err_handler = &ixgbe_err_handler
11398 };
11399
11400 /**
11401  * ixgbe_init_module - Driver Registration Routine
11402  *
11403  * ixgbe_init_module is the first routine called when the driver is
11404  * loaded. All it does is register with the PCI subsystem.
11405  **/
11406 static int __init ixgbe_init_module(void)
11407 {
11408         int ret;
11409         pr_info("%s\n", ixgbe_driver_string);
11410         pr_info("%s\n", ixgbe_copyright);
11411
11412         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11413         if (!ixgbe_wq) {
11414                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11415                 return -ENOMEM;
11416         }
11417
11418         ixgbe_dbg_init();
11419
11420         ret = pci_register_driver(&ixgbe_driver);
11421         if (ret) {
11422                 destroy_workqueue(ixgbe_wq);
11423                 ixgbe_dbg_exit();
11424                 return ret;
11425         }
11426
11427 #ifdef CONFIG_IXGBE_DCA
11428         dca_register_notify(&dca_notifier);
11429 #endif
11430
11431         return 0;
11432 }
11433
11434 module_init(ixgbe_init_module);
11435
11436 /**
11437  * ixgbe_exit_module - Driver Exit Cleanup Routine
11438  *
11439  * ixgbe_exit_module is called just before the driver is removed
11440  * from memory.
11441  **/
11442 static void __exit ixgbe_exit_module(void)
11443 {
11444 #ifdef CONFIG_IXGBE_DCA
11445         dca_unregister_notify(&dca_notifier);
11446 #endif
11447         pci_unregister_driver(&ixgbe_driver);
11448
11449         ixgbe_dbg_exit();
11450         if (ixgbe_wq) {
11451                 destroy_workqueue(ixgbe_wq);
11452                 ixgbe_wq = NULL;
11453         }
11454 }
11455
11456 #ifdef CONFIG_IXGBE_DCA
11457 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11458                             void *p)
11459 {
11460         int ret_val;
11461
11462         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11463                                          __ixgbe_notify_dca);
11464
11465         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11466 }
11467
11468 #endif /* CONFIG_IXGBE_DCA */
11469
11470 module_exit(ixgbe_exit_module);
11471
11472 /* ixgbe_main.c */