drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/bpf.h>
  53 #include <linux/bpf_trace.h>
  54 #include <linux/atomic.h>
  55 #include <scsi/fc/fc_fcoe.h>
  56 #include <net/udp_tunnel.h>
  57 #include <net/pkt_cls.h>
  58 #include <net/tc_act/tc_gact.h>
  59 #include <net/tc_act/tc_mirred.h>
  60 #include <net/vxlan.h>
  61 #include <net/mpls.h>
  62
  63 #include "ixgbe.h"
  64 #include "ixgbe_common.h"
  65 #include "ixgbe_dcb_82599.h"
  66 #include "ixgbe_sriov.h"
  67 #include "ixgbe_model.h"
  68
  69 char ixgbe_driver_name[] = "ixgbe";
  70 static const char ixgbe_driver_string[] =
  71                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  72 #ifdef IXGBE_FCOE
  73 char ixgbe_default_device_descr[] =
  74                               "Intel(R) 10 Gigabit Network Connection";
  75 #else
  76 static char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #endif
  79 #define DRV_VERSION "5.1.0-k"
  80 const char ixgbe_driver_version[] = DRV_VERSION;
  81 static const char ixgbe_copyright[] =
  82                                 "Copyright (c) 1999-2016 Intel Corporation.";
  83
  84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  85
  86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  87         [board_82598]           = &ixgbe_82598_info,
  88         [board_82599]           = &ixgbe_82599_info,
  89         [board_X540]            = &ixgbe_X540_info,
  90         [board_X550]            = &ixgbe_X550_info,
  91         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  92         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  93         [board_x550em_a]        = &ixgbe_x550em_a_info,
  94         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 146         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 147         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 148         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 149         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 150         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 151         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 152         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 153         /* required last entry */
 154         {0, }
 155 };
 156 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 157
 158 #ifdef CONFIG_IXGBE_DCA
 159 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 160                             void *p);
 161 static struct notifier_block dca_notifier = {
 162         .notifier_call = ixgbe_notify_dca,
 163         .next          = NULL,
 164         .priority      = 0
 165 };
 166 #endif
 167
 168 #ifdef CONFIG_PCI_IOV
 169 static unsigned int max_vfs;
 170 module_param(max_vfs, uint, 0);
 171 MODULE_PARM_DESC(max_vfs,
 172                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 173 #endif /* CONFIG_PCI_IOV */
 174
 175 static unsigned int allow_unsupported_sfp;
 176 module_param(allow_unsupported_sfp, uint, 0);
 177 MODULE_PARM_DESC(allow_unsupported_sfp,
 178                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 179
 180 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 181 static int debug = -1;
 182 module_param(debug, int, 0);
 183 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 184
 185 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 186 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 187 MODULE_LICENSE("GPL");
 188 MODULE_VERSION(DRV_VERSION);
 189
 190 static struct workqueue_struct *ixgbe_wq;
 191
 192 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 193 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 194
 195 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 196                                           u32 reg, u16 *value)
 197 {
 198         struct pci_dev *parent_dev;
 199         struct pci_bus *parent_bus;
 200
 201         parent_bus = adapter->pdev->bus->parent;
 202         if (!parent_bus)
 203                 return -1;
 204
 205         parent_dev = parent_bus->self;
 206         if (!parent_dev)
 207                 return -1;
 208
 209         if (!pci_is_pcie(parent_dev))
 210                 return -1;
 211
 212         pcie_capability_read_word(parent_dev, reg, value);
 213         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 214             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 215                 return -1;
 216         return 0;
 217 }
 218
 219 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 220 {
 221         struct ixgbe_hw *hw = &adapter->hw;
 222         u16 link_status = 0;
 223         int err;
 224
 225         hw->bus.type = ixgbe_bus_type_pci_express;
 226
 227         /* Get the negotiated link width and speed from PCI config space of the
 228          * parent, as this device is behind a switch
 229          */
 230         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 231
 232         /* assume caller will handle error case */
 233         if (err)
 234                 return err;
 235
 236         hw->bus.width = ixgbe_convert_bus_width(link_status);
 237         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 238
 239         return 0;
 240 }
 241
 242 /**
 243  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 244  * @hw: hw specific details
 245  *
 246  * This function is used by probe to determine whether a device's PCI-Express
 247  * bandwidth details should be gathered from the parent bus instead of from the
 248  * device. Used to ensure that various locations all have the correct device ID
 249  * checks.
 250  */
 251 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 252 {
 253         switch (hw->device_id) {
 254         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 255         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 256                 return true;
 257         default:
 258                 return false;
 259         }
 260 }
 261
 262 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 263                                      int expected_gts)
 264 {
 265         struct ixgbe_hw *hw = &adapter->hw;
 266         int max_gts = 0;
 267         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 268         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 269         struct pci_dev *pdev;
 270
 271         /* Some devices are not connected over PCIe and thus do not negotiate
 272          * speed. These devices do not have valid bus info, and thus any report
 273          * we generate may not be correct.
 274          */
 275         if (hw->bus.type == ixgbe_bus_type_internal)
 276                 return;
 277
 278         /* determine whether to use the parent device */
 279         if (ixgbe_pcie_from_parent(&adapter->hw))
 280                 pdev = adapter->pdev->bus->parent->self;
 281         else
 282                 pdev = adapter->pdev;
 283
 284         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 285             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 286                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 287                 return;
 288         }
 289
 290         switch (speed) {
 291         case PCIE_SPEED_2_5GT:
 292                 /* 8b/10b encoding reduces max throughput by 20% */
 293                 max_gts = 2 * width;
 294                 break;
 295         case PCIE_SPEED_5_0GT:
 296                 /* 8b/10b encoding reduces max throughput by 20% */
 297                 max_gts = 4 * width;
 298                 break;
 299         case PCIE_SPEED_8_0GT:
 300                 /* 128b/130b encoding reduces throughput by less than 2% */
 301                 max_gts = 8 * width;
 302                 break;
 303         default:
 304                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 305                 return;
 306         }
 307
 308         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 309                    max_gts);
 310         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 311                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 312                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 313                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 314                     "Unknown"),
 315                    width,
 316                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 317                     speed == PCIE_SPEED_5_0GT ? "20%" :
 318                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 319                     "Unknown"));
 320
 321         if (max_gts < expected_gts) {
 322                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 323                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 324                         expected_gts);
 325                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 326         }
 327 }
 328
 329 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 330 {
 331         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 332             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 333             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 334                 queue_work(ixgbe_wq, &adapter->service_task);
 335 }
 336
 337 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 338 {
 339         struct ixgbe_adapter *adapter = hw->back;
 340
 341         if (!hw->hw_addr)
 342                 return;
 343         hw->hw_addr = NULL;
 344         e_dev_err("Adapter removed\n");
 345         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 346                 ixgbe_service_event_schedule(adapter);
 347 }
 348
 349 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 350 {
 351         u32 value;
 352
 353         /* The following check not only optimizes a bit by not
 354          * performing a read on the status register when the
 355          * register just read was a status register read that
 356          * returned IXGBE_FAILED_READ_REG. It also blocks any
 357          * potential recursion.
 358          */
 359         if (reg == IXGBE_STATUS) {
 360                 ixgbe_remove_adapter(hw);
 361                 return;
 362         }
 363         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 364         if (value == IXGBE_FAILED_READ_REG)
 365                 ixgbe_remove_adapter(hw);
 366 }
 367
 368 /**
 369  * ixgbe_read_reg - Read from device register
 370  * @hw: hw specific details
 371  * @reg: offset of register to read
 372  *
 373  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 374  *
 375  * This function is used to read device registers. It checks for device
 376  * removal by confirming any read that returns all ones by checking the
 377  * status register value for all ones. This function avoids reading from
 378  * the hardware if a removal was previously detected in which case it
 379  * returns IXGBE_FAILED_READ_REG (all ones).
 380  */
 381 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 382 {
 383         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 384         u32 value;
 385
 386         if (ixgbe_removed(reg_addr))
 387                 return IXGBE_FAILED_READ_REG;
 388         if (unlikely(hw->phy.nw_mng_if_sel &
 389                      IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
 390                 struct ixgbe_adapter *adapter;
 391                 int i;
 392
 393                 for (i = 0; i < 200; ++i) {
 394                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 395                         if (likely(!value))
 396                                 goto writes_completed;
 397                         if (value == IXGBE_FAILED_READ_REG) {
 398                                 ixgbe_remove_adapter(hw);
 399                                 return IXGBE_FAILED_READ_REG;
 400                         }
 401                         udelay(5);
 402                 }
 403
 404                 adapter = hw->back;
 405                 e_warn(hw, "register writes incomplete %08x\n", value);
 406         }
 407
 408 writes_completed:
 409         value = readl(reg_addr + reg);
 410         if (unlikely(value == IXGBE_FAILED_READ_REG))
 411                 ixgbe_check_remove(hw, reg);
 412         return value;
 413 }
 414
 415 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 416 {
 417         u16 value;
 418
 419         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 420         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 421                 ixgbe_remove_adapter(hw);
 422                 return true;
 423         }
 424         return false;
 425 }
 426
 427 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 428 {
 429         struct ixgbe_adapter *adapter = hw->back;
 430         u16 value;
 431
 432         if (ixgbe_removed(hw->hw_addr))
 433                 return IXGBE_FAILED_READ_CFG_WORD;
 434         pci_read_config_word(adapter->pdev, reg, &value);
 435         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 436             ixgbe_check_cfg_remove(hw, adapter->pdev))
 437                 return IXGBE_FAILED_READ_CFG_WORD;
 438         return value;
 439 }
 440
 441 #ifdef CONFIG_PCI_IOV
 442 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 443 {
 444         struct ixgbe_adapter *adapter = hw->back;
 445         u32 value;
 446
 447         if (ixgbe_removed(hw->hw_addr))
 448                 return IXGBE_FAILED_READ_CFG_DWORD;
 449         pci_read_config_dword(adapter->pdev, reg, &value);
 450         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 451             ixgbe_check_cfg_remove(hw, adapter->pdev))
 452                 return IXGBE_FAILED_READ_CFG_DWORD;
 453         return value;
 454 }
 455 #endif /* CONFIG_PCI_IOV */
 456
 457 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 458 {
 459         struct ixgbe_adapter *adapter = hw->back;
 460
 461         if (ixgbe_removed(hw->hw_addr))
 462                 return;
 463         pci_write_config_word(adapter->pdev, reg, value);
 464 }
 465
 466 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 467 {
 468         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 469
 470         /* flush memory to make sure state is correct before next watchdog */
 471         smp_mb__before_atomic();
 472         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 473 }
 474
 475 struct ixgbe_reg_info {
 476         u32 ofs;
 477         char *name;
 478 };
 479
 480 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 481
 482         /* General Registers */
 483         {IXGBE_CTRL, "CTRL"},
 484         {IXGBE_STATUS, "STATUS"},
 485         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 486
 487         /* Interrupt Registers */
 488         {IXGBE_EICR, "EICR"},
 489
 490         /* RX Registers */
 491         {IXGBE_SRRCTL(0), "SRRCTL"},
 492         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 493         {IXGBE_RDLEN(0), "RDLEN"},
 494         {IXGBE_RDH(0), "RDH"},
 495         {IXGBE_RDT(0), "RDT"},
 496         {IXGBE_RXDCTL(0), "RXDCTL"},
 497         {IXGBE_RDBAL(0), "RDBAL"},
 498         {IXGBE_RDBAH(0), "RDBAH"},
 499
 500         /* TX Registers */
 501         {IXGBE_TDBAL(0), "TDBAL"},
 502         {IXGBE_TDBAH(0), "TDBAH"},
 503         {IXGBE_TDLEN(0), "TDLEN"},
 504         {IXGBE_TDH(0), "TDH"},
 505         {IXGBE_TDT(0), "TDT"},
 506         {IXGBE_TXDCTL(0), "TXDCTL"},
 507
 508         /* List Terminator */
 509         { .name = NULL }
 510 };
 511
 512
 513 /*
 514  * ixgbe_regdump - register printout routine
 515  */
 516 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 517 {
 518         int i;
 519         char rname[16];
 520         u32 regs[64];
 521
 522         switch (reginfo->ofs) {
 523         case IXGBE_SRRCTL(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 526                 break;
 527         case IXGBE_DCA_RXCTRL(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 530                 break;
 531         case IXGBE_RDLEN(0):
 532                 for (i = 0; i < 64; i++)
 533                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 534                 break;
 535         case IXGBE_RDH(0):
 536                 for (i = 0; i < 64; i++)
 537                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 538                 break;
 539         case IXGBE_RDT(0):
 540                 for (i = 0; i < 64; i++)
 541                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 542                 break;
 543         case IXGBE_RXDCTL(0):
 544                 for (i = 0; i < 64; i++)
 545                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 546                 break;
 547         case IXGBE_RDBAL(0):
 548                 for (i = 0; i < 64; i++)
 549                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 550                 break;
 551         case IXGBE_RDBAH(0):
 552                 for (i = 0; i < 64; i++)
 553                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 554                 break;
 555         case IXGBE_TDBAL(0):
 556                 for (i = 0; i < 64; i++)
 557                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 558                 break;
 559         case IXGBE_TDBAH(0):
 560                 for (i = 0; i < 64; i++)
 561                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 562                 break;
 563         case IXGBE_TDLEN(0):
 564                 for (i = 0; i < 64; i++)
 565                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 566                 break;
 567         case IXGBE_TDH(0):
 568                 for (i = 0; i < 64; i++)
 569                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 570                 break;
 571         case IXGBE_TDT(0):
 572                 for (i = 0; i < 64; i++)
 573                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 574                 break;
 575         case IXGBE_TXDCTL(0):
 576                 for (i = 0; i < 64; i++)
 577                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 578                 break;
 579         default:
 580                 pr_info("%-15s %08x\n",
 581                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 582                 return;
 583         }
 584
 585         i = 0;
 586         while (i < 64) {
 587                 int j;
 588                 char buf[9 * 8 + 1];
 589                 char *p = buf;
 590
 591                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 592                 for (j = 0; j < 8; j++)
 593                         p += sprintf(p, " %08x", regs[i++]);
 594                 pr_err("%-15s%s\n", rname, buf);
 595         }
 596
 597 }
 598
 599 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 600 {
 601         struct ixgbe_tx_buffer *tx_buffer;
 602
 603         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 604         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 605                 n, ring->next_to_use, ring->next_to_clean,
 606                 (u64)dma_unmap_addr(tx_buffer, dma),
 607                 dma_unmap_len(tx_buffer, len),
 608                 tx_buffer->next_to_watch,
 609                 (u64)tx_buffer->time_stamp);
 610 }
 611
 612 /*
 613  * ixgbe_dump - Print registers, tx-rings and rx-rings
 614  */
 615 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 616 {
 617         struct net_device *netdev = adapter->netdev;
 618         struct ixgbe_hw *hw = &adapter->hw;
 619         struct ixgbe_reg_info *reginfo;
 620         int n = 0;
 621         struct ixgbe_ring *ring;
 622         struct ixgbe_tx_buffer *tx_buffer;
 623         union ixgbe_adv_tx_desc *tx_desc;
 624         struct my_u0 { u64 a; u64 b; } *u0;
 625         struct ixgbe_ring *rx_ring;
 626         union ixgbe_adv_rx_desc *rx_desc;
 627         struct ixgbe_rx_buffer *rx_buffer_info;
 628         int i = 0;
 629
 630         if (!netif_msg_hw(adapter))
 631                 return;
 632
 633         /* Print netdevice Info */
 634         if (netdev) {
 635                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 636                 pr_info("Device Name     state            "
 637                         "trans_start\n");
 638                 pr_info("%-15s %016lX %016lX\n",
 639                         netdev->name,
 640                         netdev->state,
 641                         dev_trans_start(netdev));
 642         }
 643
 644         /* Print Registers */
 645         dev_info(&adapter->pdev->dev, "Register Dump\n");
 646         pr_info(" Register Name   Value\n");
 647         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 648              reginfo->name; reginfo++) {
 649                 ixgbe_regdump(hw, reginfo);
 650         }
 651
 652         /* Print TX Ring Summary */
 653         if (!netdev || !netif_running(netdev))
 654                 return;
 655
 656         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 657         pr_info(" %s     %s              %s        %s\n",
 658                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 659                 "leng", "ntw", "timestamp");
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 ring = adapter->tx_ring[n];
 662                 ixgbe_print_buffer(ring, n);
 663         }
 664
 665         for (n = 0; n < adapter->num_xdp_queues; n++) {
 666                 ring = adapter->xdp_ring[n];
 667                 ixgbe_print_buffer(ring, n);
 668         }
 669
 670         /* Print TX Rings */
 671         if (!netif_msg_tx_done(adapter))
 672                 goto rx_ring_summary;
 673
 674         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 675
 676         /* Transmit Descriptor Formats
 677          *
 678          * 82598 Advanced Transmit Descriptor
 679          *   +--------------------------------------------------------------+
 680          * 0 |         Buffer Address [63:0]                                |
 681          *   +--------------------------------------------------------------+
 682          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 683          *   +--------------------------------------------------------------+
 684          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 685          *
 686          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 687          *   +--------------------------------------------------------------+
 688          * 0 |                          RSV [63:0]                          |
 689          *   +--------------------------------------------------------------+
 690          * 8 |            RSV           |  STA  |          NXTSEQ           |
 691          *   +--------------------------------------------------------------+
 692          *   63                       36 35   32 31                         0
 693          *
 694          * 82599+ Advanced Transmit Descriptor
 695          *   +--------------------------------------------------------------+
 696          * 0 |         Buffer Address [63:0]                                |
 697          *   +--------------------------------------------------------------+
 698          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 699          *   +--------------------------------------------------------------+
 700          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 701          *
 702          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 703          *   +--------------------------------------------------------------+
 704          * 0 |                          RSV [63:0]                          |
 705          *   +--------------------------------------------------------------+
 706          * 8 |            RSV           |  STA  |           RSV             |
 707          *   +--------------------------------------------------------------+
 708          *   63                       36 35   32 31                         0
 709          */
 710
 711         for (n = 0; n < adapter->num_tx_queues; n++) {
 712                 ring = adapter->tx_ring[n];
 713                 pr_info("------------------------------------\n");
 714                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 715                 pr_info("------------------------------------\n");
 716                 pr_info("%s%s    %s              %s        %s          %s\n",
 717                         "T [desc]     [address 63:0  ] ",
 718                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 719                         "leng", "ntw", "timestamp", "bi->skb");
 720
 721                 for (i = 0; ring->desc && (i < ring->count); i++) {
 722                         tx_desc = IXGBE_TX_DESC(ring, i);
 723                         tx_buffer = &ring->tx_buffer_info[i];
 724                         u0 = (struct my_u0 *)tx_desc;
 725                         if (dma_unmap_len(tx_buffer, len) > 0) {
 726                                 const char *ring_desc;
 727
 728                                 if (i == ring->next_to_use &&
 729                                     i == ring->next_to_clean)
 730                                         ring_desc = " NTC/U";
 731                                 else if (i == ring->next_to_use)
 732                                         ring_desc = " NTU";
 733                                 else if (i == ring->next_to_clean)
 734                                         ring_desc = " NTC";
 735                                 else
 736                                         ring_desc = "";
 737                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 738                                         i,
 739                                         le64_to_cpu(u0->a),
 740                                         le64_to_cpu(u0->b),
 741                                         (u64)dma_unmap_addr(tx_buffer, dma),
 742                                         dma_unmap_len(tx_buffer, len),
 743                                         tx_buffer->next_to_watch,
 744                                         (u64)tx_buffer->time_stamp,
 745                                         tx_buffer->skb,
 746                                         ring_desc);
 747
 748                                 if (netif_msg_pktdata(adapter) &&
 749                                     tx_buffer->skb)
 750                                         print_hex_dump(KERN_INFO, "",
 751                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 752                                                 tx_buffer->skb->data,
 753                                                 dma_unmap_len(tx_buffer, len),
 754                                                 true);
 755                         }
 756                 }
 757         }
 758
 759         /* Print RX Rings Summary */
 760 rx_ring_summary:
 761         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 762         pr_info("Queue [NTU] [NTC]\n");
 763         for (n = 0; n < adapter->num_rx_queues; n++) {
 764                 rx_ring = adapter->rx_ring[n];
 765                 pr_info("%5d %5X %5X\n",
 766                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 767         }
 768
 769         /* Print RX Rings */
 770         if (!netif_msg_rx_status(adapter))
 771                 return;
 772
 773         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 774
 775         /* Receive Descriptor Formats
 776          *
 777          * 82598 Advanced Receive Descriptor (Read) Format
 778          *    63                                           1        0
 779          *    +-----------------------------------------------------+
 780          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 781          *    +----------------------------------------------+------+
 782          *  8 |       Header Buffer Address [63:1]           |  DD  |
 783          *    +-----------------------------------------------------+
 784          *
 785          *
 786          * 82598 Advanced Receive Descriptor (Write-Back) Format
 787          *
 788          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 789          *   +------------------------------------------------------+
 790          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 791          *   | Packet   | IP     |   |          |     | Type | Type |
 792          *   | Checksum | Ident  |   |          |     |      |      |
 793          *   +------------------------------------------------------+
 794          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 795          *   +------------------------------------------------------+
 796          *   63       48 47    32 31            20 19               0
 797          *
 798          * 82599+ Advanced Receive Descriptor (Read) Format
 799          *    63                                           1        0
 800          *    +-----------------------------------------------------+
 801          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 802          *    +----------------------------------------------+------+
 803          *  8 |       Header Buffer Address [63:1]           |  DD  |
 804          *    +-----------------------------------------------------+
 805          *
 806          *
 807          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 808          *
 809          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 810          *   +------------------------------------------------------+
 811          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 812          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 813          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 814          *   +------------------------------------------------------+
 815          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 816          *   +------------------------------------------------------+
 817          *   63       48 47    32 31          20 19                 0
 818          */
 819
 820         for (n = 0; n < adapter->num_rx_queues; n++) {
 821                 rx_ring = adapter->rx_ring[n];
 822                 pr_info("------------------------------------\n");
 823                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 824                 pr_info("------------------------------------\n");
 825                 pr_info("%s%s%s\n",
 826                         "R  [desc]      [ PktBuf     A0] ",
 827                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 828                         "<-- Adv Rx Read format");
 829                 pr_info("%s%s%s\n",
 830                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 831                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 832                         "<-- Adv Rx Write-Back format");
 833
 834                 for (i = 0; i < rx_ring->count; i++) {
 835                         const char *ring_desc;
 836
 837                         if (i == rx_ring->next_to_use)
 838                                 ring_desc = " NTU";
 839                         else if (i == rx_ring->next_to_clean)
 840                                 ring_desc = " NTC";
 841                         else
 842                                 ring_desc = "";
 843
 844                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 845                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 846                         u0 = (struct my_u0 *)rx_desc;
 847                         if (rx_desc->wb.upper.length) {
 848                                 /* Descriptor Done */
 849                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 850                                         i,
 851                                         le64_to_cpu(u0->a),
 852                                         le64_to_cpu(u0->b),
 853                                         rx_buffer_info->skb,
 854                                         ring_desc);
 855                         } else {
 856                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 857                                         i,
 858                                         le64_to_cpu(u0->a),
 859                                         le64_to_cpu(u0->b),
 860                                         (u64)rx_buffer_info->dma,
 861                                         rx_buffer_info->skb,
 862                                         ring_desc);
 863
 864                                 if (netif_msg_pktdata(adapter) &&
 865                                     rx_buffer_info->dma) {
 866                                         print_hex_dump(KERN_INFO, "",
 867                                            DUMP_PREFIX_ADDRESS, 16, 1,
 868                                            page_address(rx_buffer_info->page) +
 869                                                     rx_buffer_info->page_offset,
 870                                            ixgbe_rx_bufsz(rx_ring), true);
 871                                 }
 872                         }
 873                 }
 874         }
 875 }
 876
 877 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 878 {
 879         u32 ctrl_ext;
 880
 881         /* Let firmware take over control of h/w */
 882         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 883         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 884                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 885 }
 886
 887 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 888 {
 889         u32 ctrl_ext;
 890
 891         /* Let firmware know the driver has taken over */
 892         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 893         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 894                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 895 }
 896
 897 /**
 898  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 899  * @adapter: pointer to adapter struct
 900  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 901  * @queue: queue to map the corresponding interrupt to
 902  * @msix_vector: the vector to map to the corresponding queue
 903  *
 904  */
 905 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 906                            u8 queue, u8 msix_vector)
 907 {
 908         u32 ivar, index;
 909         struct ixgbe_hw *hw = &adapter->hw;
 910         switch (hw->mac.type) {
 911         case ixgbe_mac_82598EB:
 912                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 913                 if (direction == -1)
 914                         direction = 0;
 915                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 916                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 917                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 918                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 919                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 920                 break;
 921         case ixgbe_mac_82599EB:
 922         case ixgbe_mac_X540:
 923         case ixgbe_mac_X550:
 924         case ixgbe_mac_X550EM_x:
 925         case ixgbe_mac_x550em_a:
 926                 if (direction == -1) {
 927                         /* other causes */
 928                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 929                         index = ((queue & 1) * 8);
 930                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 931                         ivar &= ~(0xFF << index);
 932                         ivar |= (msix_vector << index);
 933                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 934                         break;
 935                 } else {
 936                         /* tx or rx causes */
 937                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 938                         index = ((16 * (queue & 1)) + (8 * direction));
 939                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 940                         ivar &= ~(0xFF << index);
 941                         ivar |= (msix_vector << index);
 942                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 943                         break;
 944                 }
 945         default:
 946                 break;
 947         }
 948 }
 949
 950 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 951                                           u64 qmask)
 952 {
 953         u32 mask;
 954
 955         switch (adapter->hw.mac.type) {
 956         case ixgbe_mac_82598EB:
 957                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 958                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 959                 break;
 960         case ixgbe_mac_82599EB:
 961         case ixgbe_mac_X540:
 962         case ixgbe_mac_X550:
 963         case ixgbe_mac_X550EM_x:
 964         case ixgbe_mac_x550em_a:
 965                 mask = (qmask & 0xFFFFFFFF);
 966                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 967                 mask = (qmask >> 32);
 968                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 969                 break;
 970         default:
 971                 break;
 972         }
 973 }
 974
 975 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 976 {
 977         struct ixgbe_hw *hw = &adapter->hw;
 978         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 979         int i;
 980         u32 data;
 981
 982         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 983             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 984                 return;
 985
 986         switch (hw->mac.type) {
 987         case ixgbe_mac_82598EB:
 988                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 989                 break;
 990         default:
 991                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 992         }
 993         hwstats->lxoffrxc += data;
 994
 995         /* refill credits (no tx hang) if we received xoff */
 996         if (!data)
 997                 return;
 998
 999         for (i = 0; i < adapter->num_tx_queues; i++)
1000                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1001                           &adapter->tx_ring[i]->state);
1002
1003         for (i = 0; i < adapter->num_xdp_queues; i++)
1004                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1005                           &adapter->xdp_ring[i]->state);
1006 }
1007
1008 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1009 {
1010         struct ixgbe_hw *hw = &adapter->hw;
1011         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1012         u32 xoff[8] = {0};
1013         u8 tc;
1014         int i;
1015         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1016
1017         if (adapter->ixgbe_ieee_pfc)
1018                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1019
1020         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1021                 ixgbe_update_xoff_rx_lfc(adapter);
1022                 return;
1023         }
1024
1025         /* update stats for each tc, only valid with PFC enabled */
1026         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1027                 u32 pxoffrxc;
1028
1029                 switch (hw->mac.type) {
1030                 case ixgbe_mac_82598EB:
1031                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1032                         break;
1033                 default:
1034                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1035                 }
1036                 hwstats->pxoffrxc[i] += pxoffrxc;
1037                 /* Get the TC for given UP */
1038                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1039                 xoff[tc] += pxoffrxc;
1040         }
1041
1042         /* disarm tx queues that have received xoff frames */
1043         for (i = 0; i < adapter->num_tx_queues; i++) {
1044                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1045
1046                 tc = tx_ring->dcb_tc;
1047                 if (xoff[tc])
1048                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1049         }
1050
1051         for (i = 0; i < adapter->num_xdp_queues; i++) {
1052                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1053
1054                 tc = xdp_ring->dcb_tc;
1055                 if (xoff[tc])
1056                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1057         }
1058 }
1059
1060 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1061 {
1062         return ring->stats.packets;
1063 }
1064
1065 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1066 {
1067         struct ixgbe_adapter *adapter;
1068         struct ixgbe_hw *hw;
1069         u32 head, tail;
1070
1071         if (ring->l2_accel_priv)
1072                 adapter = ring->l2_accel_priv->real_adapter;
1073         else
1074                 adapter = netdev_priv(ring->netdev);
1075
1076         hw = &adapter->hw;
1077         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1078         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1079
1080         if (head != tail)
1081                 return (head < tail) ?
1082                         tail - head : (tail + ring->count - head);
1083
1084         return 0;
1085 }
1086
1087 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1088 {
1089         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1090         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1091         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1092
1093         clear_check_for_tx_hang(tx_ring);
1094
1095         /*
1096          * Check for a hung queue, but be thorough. This verifies
1097          * that a transmit has been completed since the previous
1098          * check AND there is at least one packet pending. The
1099          * ARMED bit is set to indicate a potential hang. The
1100          * bit is cleared if a pause frame is received to remove
1101          * false hang detection due to PFC or 802.3x frames. By
1102          * requiring this to fail twice we avoid races with
1103          * pfc clearing the ARMED bit and conditions where we
1104          * run the check_tx_hang logic with a transmit completion
1105          * pending but without time to complete it yet.
1106          */
1107         if (tx_done_old == tx_done && tx_pending)
1108                 /* make sure it is true for two checks in a row */
1109                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1110                                         &tx_ring->state);
1111         /* update completed stats and continue */
1112         tx_ring->tx_stats.tx_done_old = tx_done;
1113         /* reset the countdown */
1114         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1115
1116         return false;
1117 }
1118
1119 /**
1120  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1121  * @adapter: driver private struct
1122  **/
1123 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1124 {
1125
1126         /* Do the reset outside of interrupt context */
1127         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1128                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1129                 e_warn(drv, "initiating reset due to tx timeout\n");
1130                 ixgbe_service_event_schedule(adapter);
1131         }
1132 }
1133
1134 /**
1135  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1136  **/
1137 static int ixgbe_tx_maxrate(struct net_device *netdev,
1138                             int queue_index, u32 maxrate)
1139 {
1140         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1141         struct ixgbe_hw *hw = &adapter->hw;
1142         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1143
1144         if (!maxrate)
1145                 return 0;
1146
1147         /* Calculate the rate factor values to set */
1148         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1149         bcnrc_val /= maxrate;
1150
1151         /* clear everything but the rate factor */
1152         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1153         IXGBE_RTTBCNRC_RF_DEC_MASK;
1154
1155         /* enable the rate scheduler */
1156         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1157
1158         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1159         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1160
1161         return 0;
1162 }
1163
1164 /**
1165  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1166  * @q_vector: structure containing interrupt and ring information
1167  * @tx_ring: tx ring to clean
1168  * @napi_budget: Used to determine if we are in netpoll
1169  **/
1170 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1171                                struct ixgbe_ring *tx_ring, int napi_budget)
1172 {
1173         struct ixgbe_adapter *adapter = q_vector->adapter;
1174         struct ixgbe_tx_buffer *tx_buffer;
1175         union ixgbe_adv_tx_desc *tx_desc;
1176         unsigned int total_bytes = 0, total_packets = 0;
1177         unsigned int budget = q_vector->tx.work_limit;
1178         unsigned int i = tx_ring->next_to_clean;
1179
1180         if (test_bit(__IXGBE_DOWN, &adapter->state))
1181                 return true;
1182
1183         tx_buffer = &tx_ring->tx_buffer_info[i];
1184         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1185         i -= tx_ring->count;
1186
1187         do {
1188                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1189
1190                 /* if next_to_watch is not set then there is no work pending */
1191                 if (!eop_desc)
1192                         break;
1193
1194                 /* prevent any other reads prior to eop_desc */
1195                 read_barrier_depends();
1196
1197                 /* if DD is not set pending work has not been completed */
1198                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1199                         break;
1200
1201                 /* clear next_to_watch to prevent false hangs */
1202                 tx_buffer->next_to_watch = NULL;
1203
1204                 /* update the statistics for this packet */
1205                 total_bytes += tx_buffer->bytecount;
1206                 total_packets += tx_buffer->gso_segs;
1207
1208                 /* free the skb */
1209                 if (ring_is_xdp(tx_ring))
1210                         page_frag_free(tx_buffer->data);
1211                 else
1212                         napi_consume_skb(tx_buffer->skb, napi_budget);
1213
1214                 /* unmap skb header data */
1215                 dma_unmap_single(tx_ring->dev,
1216                                  dma_unmap_addr(tx_buffer, dma),
1217                                  dma_unmap_len(tx_buffer, len),
1218                                  DMA_TO_DEVICE);
1219
1220                 /* clear tx_buffer data */
1221                 dma_unmap_len_set(tx_buffer, len, 0);
1222
1223                 /* unmap remaining buffers */
1224                 while (tx_desc != eop_desc) {
1225                         tx_buffer++;
1226                         tx_desc++;
1227                         i++;
1228                         if (unlikely(!i)) {
1229                                 i -= tx_ring->count;
1230                                 tx_buffer = tx_ring->tx_buffer_info;
1231                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1232                         }
1233
1234                         /* unmap any remaining paged data */
1235                         if (dma_unmap_len(tx_buffer, len)) {
1236                                 dma_unmap_page(tx_ring->dev,
1237                                                dma_unmap_addr(tx_buffer, dma),
1238                                                dma_unmap_len(tx_buffer, len),
1239                                                DMA_TO_DEVICE);
1240                                 dma_unmap_len_set(tx_buffer, len, 0);
1241                         }
1242                 }
1243
1244                 /* move us one more past the eop_desc for start of next pkt */
1245                 tx_buffer++;
1246                 tx_desc++;
1247                 i++;
1248                 if (unlikely(!i)) {
1249                         i -= tx_ring->count;
1250                         tx_buffer = tx_ring->tx_buffer_info;
1251                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1252                 }
1253
1254                 /* issue prefetch for next Tx descriptor */
1255                 prefetch(tx_desc);
1256
1257                 /* update budget accounting */
1258                 budget--;
1259         } while (likely(budget));
1260
1261         i += tx_ring->count;
1262         tx_ring->next_to_clean = i;
1263         u64_stats_update_begin(&tx_ring->syncp);
1264         tx_ring->stats.bytes += total_bytes;
1265         tx_ring->stats.packets += total_packets;
1266         u64_stats_update_end(&tx_ring->syncp);
1267         q_vector->tx.total_bytes += total_bytes;
1268         q_vector->tx.total_packets += total_packets;
1269
1270         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1271                 /* schedule immediate reset if we believe we hung */
1272                 struct ixgbe_hw *hw = &adapter->hw;
1273                 e_err(drv, "Detected Tx Unit Hang %s\n"
1274                         "  Tx Queue             <%d>\n"
1275                         "  TDH, TDT             <%x>, <%x>\n"
1276                         "  next_to_use          <%x>\n"
1277                         "  next_to_clean        <%x>\n"
1278                         "tx_buffer_info[next_to_clean]\n"
1279                         "  time_stamp           <%lx>\n"
1280                         "  jiffies              <%lx>\n",
1281                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1282                         tx_ring->queue_index,
1283                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1284                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1285                         tx_ring->next_to_use, i,
1286                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1287
1288                 if (!ring_is_xdp(tx_ring))
1289                         netif_stop_subqueue(tx_ring->netdev,
1290                                             tx_ring->queue_index);
1291
1292                 e_info(probe,
1293                        "tx hang %d detected on queue %d, resetting adapter\n",
1294                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1295
1296                 /* schedule immediate reset if we believe we hung */
1297                 ixgbe_tx_timeout_reset(adapter);
1298
1299                 /* the adapter is about to reset, no point in enabling stuff */
1300                 return true;
1301         }
1302
1303         if (ring_is_xdp(tx_ring))
1304                 return !!budget;
1305
1306         netdev_tx_completed_queue(txring_txq(tx_ring),
1307                                   total_packets, total_bytes);
1308
1309 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1310         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1311                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1312                 /* Make sure that anybody stopping the queue after this
1313                  * sees the new next_to_clean.
1314                  */
1315                 smp_mb();
1316                 if (__netif_subqueue_stopped(tx_ring->netdev,
1317                                              tx_ring->queue_index)
1318                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1319                         netif_wake_subqueue(tx_ring->netdev,
1320                                             tx_ring->queue_index);
1321                         ++tx_ring->tx_stats.restart_queue;
1322                 }
1323         }
1324
1325         return !!budget;
1326 }
1327
1328 #ifdef CONFIG_IXGBE_DCA
1329 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1330                                 struct ixgbe_ring *tx_ring,
1331                                 int cpu)
1332 {
1333         struct ixgbe_hw *hw = &adapter->hw;
1334         u32 txctrl = 0;
1335         u16 reg_offset;
1336
1337         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1339
1340         switch (hw->mac.type) {
1341         case ixgbe_mac_82598EB:
1342                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1343                 break;
1344         case ixgbe_mac_82599EB:
1345         case ixgbe_mac_X540:
1346                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1347                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1348                 break;
1349         default:
1350                 /* for unknown hardware do not write register */
1351                 return;
1352         }
1353
1354         /*
1355          * We can enable relaxed ordering for reads, but not writes when
1356          * DCA is enabled.  This is due to a known issue in some chipsets
1357          * which will cause the DCA tag to be cleared.
1358          */
1359         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1360                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1361                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1362
1363         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1364 }
1365
1366 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1367                                 struct ixgbe_ring *rx_ring,
1368                                 int cpu)
1369 {
1370         struct ixgbe_hw *hw = &adapter->hw;
1371         u32 rxctrl = 0;
1372         u8 reg_idx = rx_ring->reg_idx;
1373
1374         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1375                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1376
1377         switch (hw->mac.type) {
1378         case ixgbe_mac_82599EB:
1379         case ixgbe_mac_X540:
1380                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1381                 break;
1382         default:
1383                 break;
1384         }
1385
1386         /*
1387          * We can enable relaxed ordering for reads, but not writes when
1388          * DCA is enabled.  This is due to a known issue in some chipsets
1389          * which will cause the DCA tag to be cleared.
1390          */
1391         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1392                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1393                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1394
1395         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1396 }
1397
1398 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1399 {
1400         struct ixgbe_adapter *adapter = q_vector->adapter;
1401         struct ixgbe_ring *ring;
1402         int cpu = get_cpu();
1403
1404         if (q_vector->cpu == cpu)
1405                 goto out_no_update;
1406
1407         ixgbe_for_each_ring(ring, q_vector->tx)
1408                 ixgbe_update_tx_dca(adapter, ring, cpu);
1409
1410         ixgbe_for_each_ring(ring, q_vector->rx)
1411                 ixgbe_update_rx_dca(adapter, ring, cpu);
1412
1413         q_vector->cpu = cpu;
1414 out_no_update:
1415         put_cpu();
1416 }
1417
1418 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1419 {
1420         int i;
1421
1422         /* always use CB2 mode, difference is masked in the CB driver */
1423         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1424                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1425                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1426         else
1427                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1428                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1429
1430         for (i = 0; i < adapter->num_q_vectors; i++) {
1431                 adapter->q_vector[i]->cpu = -1;
1432                 ixgbe_update_dca(adapter->q_vector[i]);
1433         }
1434 }
1435
1436 static int __ixgbe_notify_dca(struct device *dev, void *data)
1437 {
1438         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1439         unsigned long event = *(unsigned long *)data;
1440
1441         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1442                 return 0;
1443
1444         switch (event) {
1445         case DCA_PROVIDER_ADD:
1446                 /* if we're already enabled, don't do it again */
1447                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1448                         break;
1449                 if (dca_add_requester(dev) == 0) {
1450                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1451                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1452                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1453                         break;
1454                 }
1455                 /* fall through - DCA is disabled. */
1456         case DCA_PROVIDER_REMOVE:
1457                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1458                         dca_remove_requester(dev);
1459                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1460                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1461                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1462                 }
1463                 break;
1464         }
1465
1466         return 0;
1467 }
1468
1469 #endif /* CONFIG_IXGBE_DCA */
1470
1471 #define IXGBE_RSS_L4_TYPES_MASK \
1472         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1473          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1474          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1475          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1476
1477 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1478                                  union ixgbe_adv_rx_desc *rx_desc,
1479                                  struct sk_buff *skb)
1480 {
1481         u16 rss_type;
1482
1483         if (!(ring->netdev->features & NETIF_F_RXHASH))
1484                 return;
1485
1486         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1487                    IXGBE_RXDADV_RSSTYPE_MASK;
1488
1489         if (!rss_type)
1490                 return;
1491
1492         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1493                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1494                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1495 }
1496
1497 #ifdef IXGBE_FCOE
1498 /**
1499  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1500  * @ring: structure containing ring specific data
1501  * @rx_desc: advanced rx descriptor
1502  *
1503  * Returns : true if it is FCoE pkt
1504  */
1505 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1506                                     union ixgbe_adv_rx_desc *rx_desc)
1507 {
1508         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1509
1510         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1511                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1512                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1513                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1514 }
1515
1516 #endif /* IXGBE_FCOE */
1517 /**
1518  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1519  * @ring: structure containing ring specific data
1520  * @rx_desc: current Rx descriptor being processed
1521  * @skb: skb currently being received and modified
1522  **/
1523 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1524                                      union ixgbe_adv_rx_desc *rx_desc,
1525                                      struct sk_buff *skb)
1526 {
1527         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1528         bool encap_pkt = false;
1529
1530         skb_checksum_none_assert(skb);
1531
1532         /* Rx csum disabled */
1533         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1534                 return;
1535
1536         /* check for VXLAN and Geneve packets */
1537         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1538                 encap_pkt = true;
1539                 skb->encapsulation = 1;
1540         }
1541
1542         /* if IP and error */
1543         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1544             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1545                 ring->rx_stats.csum_err++;
1546                 return;
1547         }
1548
1549         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1550                 return;
1551
1552         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1553                 /*
1554                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1555                  * checksum errors.
1556                  */
1557                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1558                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1559                         return;
1560
1561                 ring->rx_stats.csum_err++;
1562                 return;
1563         }
1564
1565         /* It must be a TCP or UDP packet with a valid checksum */
1566         skb->ip_summed = CHECKSUM_UNNECESSARY;
1567         if (encap_pkt) {
1568                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1569                         return;
1570
1571                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1572                         skb->ip_summed = CHECKSUM_NONE;
1573                         return;
1574                 }
1575                 /* If we checked the outer header let the stack know */
1576                 skb->csum_level = 1;
1577         }
1578 }
1579
1580 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1581 {
1582         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1583 }
1584
1585 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1586                                     struct ixgbe_rx_buffer *bi)
1587 {
1588         struct page *page = bi->page;
1589         dma_addr_t dma;
1590
1591         /* since we are recycling buffers we should seldom need to alloc */
1592         if (likely(page))
1593                 return true;
1594
1595         /* alloc new page for storage */
1596         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1597         if (unlikely(!page)) {
1598                 rx_ring->rx_stats.alloc_rx_page_failed++;
1599                 return false;
1600         }
1601
1602         /* map page for use */
1603         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1604                                  ixgbe_rx_pg_size(rx_ring),
1605                                  DMA_FROM_DEVICE,
1606                                  IXGBE_RX_DMA_ATTR);
1607
1608         /*
1609          * if mapping failed free memory back to system since
1610          * there isn't much point in holding memory we can't use
1611          */
1612         if (dma_mapping_error(rx_ring->dev, dma)) {
1613                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1614
1615                 rx_ring->rx_stats.alloc_rx_page_failed++;
1616                 return false;
1617         }
1618
1619         bi->dma = dma;
1620         bi->page = page;
1621         bi->page_offset = ixgbe_rx_offset(rx_ring);
1622         bi->pagecnt_bias = 1;
1623
1624         return true;
1625 }
1626
1627 /**
1628  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1629  * @rx_ring: ring to place buffers on
1630  * @cleaned_count: number of buffers to replace
1631  **/
1632 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1633 {
1634         union ixgbe_adv_rx_desc *rx_desc;
1635         struct ixgbe_rx_buffer *bi;
1636         u16 i = rx_ring->next_to_use;
1637         u16 bufsz;
1638
1639         /* nothing to do */
1640         if (!cleaned_count)
1641                 return;
1642
1643         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1644         bi = &rx_ring->rx_buffer_info[i];
1645         i -= rx_ring->count;
1646
1647         bufsz = ixgbe_rx_bufsz(rx_ring);
1648
1649         do {
1650                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1651                         break;
1652
1653                 /* sync the buffer for use by the device */
1654                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1655                                                  bi->page_offset, bufsz,
1656                                                  DMA_FROM_DEVICE);
1657
1658                 /*
1659                  * Refresh the desc even if buffer_addrs didn't change
1660                  * because each write-back erases this info.
1661                  */
1662                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1663
1664                 rx_desc++;
1665                 bi++;
1666                 i++;
1667                 if (unlikely(!i)) {
1668                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1669                         bi = rx_ring->rx_buffer_info;
1670                         i -= rx_ring->count;
1671                 }
1672
1673                 /* clear the length for the next_to_use descriptor */
1674                 rx_desc->wb.upper.length = 0;
1675
1676                 cleaned_count--;
1677         } while (cleaned_count);
1678
1679         i += rx_ring->count;
1680
1681         if (rx_ring->next_to_use != i) {
1682                 rx_ring->next_to_use = i;
1683
1684                 /* update next to alloc since we have filled the ring */
1685                 rx_ring->next_to_alloc = i;
1686
1687                 /* Force memory writes to complete before letting h/w
1688                  * know there are new descriptors to fetch.  (Only
1689                  * applicable for weak-ordered memory model archs,
1690                  * such as IA-64).
1691                  */
1692                 wmb();
1693                 writel(i, rx_ring->tail);
1694         }
1695 }
1696
1697 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1698                                    struct sk_buff *skb)
1699 {
1700         u16 hdr_len = skb_headlen(skb);
1701
1702         /* set gso_size to avoid messing up TCP MSS */
1703         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1704                                                  IXGBE_CB(skb)->append_cnt);
1705         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1706 }
1707
1708 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1709                                    struct sk_buff *skb)
1710 {
1711         /* if append_cnt is 0 then frame is not RSC */
1712         if (!IXGBE_CB(skb)->append_cnt)
1713                 return;
1714
1715         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1716         rx_ring->rx_stats.rsc_flush++;
1717
1718         ixgbe_set_rsc_gso_size(rx_ring, skb);
1719
1720         /* gso_size is computed using append_cnt so always clear it last */
1721         IXGBE_CB(skb)->append_cnt = 0;
1722 }
1723
1724 /**
1725  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1726  * @rx_ring: rx descriptor ring packet is being transacted on
1727  * @rx_desc: pointer to the EOP Rx descriptor
1728  * @skb: pointer to current skb being populated
1729  *
1730  * This function checks the ring, descriptor, and packet information in
1731  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1732  * other fields within the skb.
1733  **/
1734 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1735                                      union ixgbe_adv_rx_desc *rx_desc,
1736                                      struct sk_buff *skb)
1737 {
1738         struct net_device *dev = rx_ring->netdev;
1739         u32 flags = rx_ring->q_vector->adapter->flags;
1740
1741         ixgbe_update_rsc_stats(rx_ring, skb);
1742
1743         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1744
1745         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1746
1747         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1748                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1749
1750         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1751             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1752                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1753                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1754         }
1755
1756         skb_record_rx_queue(skb, rx_ring->queue_index);
1757
1758         skb->protocol = eth_type_trans(skb, dev);
1759 }
1760
1761 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1762                          struct sk_buff *skb)
1763 {
1764         napi_gro_receive(&q_vector->napi, skb);
1765 }
1766
1767 /**
1768  * ixgbe_is_non_eop - process handling of non-EOP buffers
1769  * @rx_ring: Rx ring being processed
1770  * @rx_desc: Rx descriptor for current buffer
1771  * @skb: Current socket buffer containing buffer in progress
1772  *
1773  * This function updates next to clean.  If the buffer is an EOP buffer
1774  * this function exits returning false, otherwise it will place the
1775  * sk_buff in the next buffer to be chained and return true indicating
1776  * that this is in fact a non-EOP buffer.
1777  **/
1778 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1779                              union ixgbe_adv_rx_desc *rx_desc,
1780                              struct sk_buff *skb)
1781 {
1782         u32 ntc = rx_ring->next_to_clean + 1;
1783
1784         /* fetch, update, and store next to clean */
1785         ntc = (ntc < rx_ring->count) ? ntc : 0;
1786         rx_ring->next_to_clean = ntc;
1787
1788         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1789
1790         /* update RSC append count if present */
1791         if (ring_is_rsc_enabled(rx_ring)) {
1792                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1793                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1794
1795                 if (unlikely(rsc_enabled)) {
1796                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1797
1798                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1799                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1800
1801                         /* update ntc based on RSC value */
1802                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1803                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1804                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1805                 }
1806         }
1807
1808         /* if we are the last buffer then there is nothing else to do */
1809         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1810                 return false;
1811
1812         /* place skb in next buffer to be received */
1813         rx_ring->rx_buffer_info[ntc].skb = skb;
1814         rx_ring->rx_stats.non_eop_descs++;
1815
1816         return true;
1817 }
1818
1819 /**
1820  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1821  * @rx_ring: rx descriptor ring packet is being transacted on
1822  * @skb: pointer to current skb being adjusted
1823  *
1824  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1825  * main difference between this version and the original function is that
1826  * this function can make several assumptions about the state of things
1827  * that allow for significant optimizations versus the standard function.
1828  * As a result we can do things like drop a frag and maintain an accurate
1829  * truesize for the skb.
1830  */
1831 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1832                             struct sk_buff *skb)
1833 {
1834         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1835         unsigned char *va;
1836         unsigned int pull_len;
1837
1838         /*
1839          * it is valid to use page_address instead of kmap since we are
1840          * working with pages allocated out of the lomem pool per
1841          * alloc_page(GFP_ATOMIC)
1842          */
1843         va = skb_frag_address(frag);
1844
1845         /*
1846          * we need the header to contain the greater of either ETH_HLEN or
1847          * 60 bytes if the skb->len is less than 60 for skb_pad.
1848          */
1849         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1850
1851         /* align pull length to size of long to optimize memcpy performance */
1852         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1853
1854         /* update all of the pointers */
1855         skb_frag_size_sub(frag, pull_len);
1856         frag->page_offset += pull_len;
1857         skb->data_len -= pull_len;
1858         skb->tail += pull_len;
1859 }
1860
1861 /**
1862  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1863  * @rx_ring: rx descriptor ring packet is being transacted on
1864  * @skb: pointer to current skb being updated
1865  *
1866  * This function provides a basic DMA sync up for the first fragment of an
1867  * skb.  The reason for doing this is that the first fragment cannot be
1868  * unmapped until we have reached the end of packet descriptor for a buffer
1869  * chain.
1870  */
1871 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1872                                 struct sk_buff *skb)
1873 {
1874         /* if the page was released unmap it, else just sync our portion */
1875         if (unlikely(IXGBE_CB(skb)->page_released)) {
1876                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1877                                      ixgbe_rx_pg_size(rx_ring),
1878                                      DMA_FROM_DEVICE,
1879                                      IXGBE_RX_DMA_ATTR);
1880         } else {
1881                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1882
1883                 dma_sync_single_range_for_cpu(rx_ring->dev,
1884                                               IXGBE_CB(skb)->dma,
1885                                               frag->page_offset,
1886                                               skb_frag_size(frag),
1887                                               DMA_FROM_DEVICE);
1888         }
1889 }
1890
1891 /**
1892  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1893  * @rx_ring: rx descriptor ring packet is being transacted on
1894  * @rx_desc: pointer to the EOP Rx descriptor
1895  * @skb: pointer to current skb being fixed
1896  *
1897  * Check if the skb is valid in the XDP case it will be an error pointer.
1898  * Return true in this case to abort processing and advance to next
1899  * descriptor.
1900  *
1901  * Check for corrupted packet headers caused by senders on the local L2
1902  * embedded NIC switch not setting up their Tx Descriptors right.  These
1903  * should be very rare.
1904  *
1905  * Also address the case where we are pulling data in on pages only
1906  * and as such no data is present in the skb header.
1907  *
1908  * In addition if skb is not at least 60 bytes we need to pad it so that
1909  * it is large enough to qualify as a valid Ethernet frame.
1910  *
1911  * Returns true if an error was encountered and skb was freed.
1912  **/
1913 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1914                                   union ixgbe_adv_rx_desc *rx_desc,
1915                                   struct sk_buff *skb)
1916 {
1917         struct net_device *netdev = rx_ring->netdev;
1918
1919         /* XDP packets use error pointer so abort at this point */
1920         if (IS_ERR(skb))
1921                 return true;
1922
1923         /* verify that the packet does not have any known errors */
1924         if (unlikely(ixgbe_test_staterr(rx_desc,
1925                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1926             !(netdev->features & NETIF_F_RXALL))) {
1927                 dev_kfree_skb_any(skb);
1928                 return true;
1929         }
1930
1931         /* place header in linear portion of buffer */
1932         if (!skb_headlen(skb))
1933                 ixgbe_pull_tail(rx_ring, skb);
1934
1935 #ifdef IXGBE_FCOE
1936         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1937         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1938                 return false;
1939
1940 #endif
1941         /* if eth_skb_pad returns an error the skb was freed */
1942         if (eth_skb_pad(skb))
1943                 return true;
1944
1945         return false;
1946 }
1947
1948 /**
1949  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1950  * @rx_ring: rx descriptor ring to store buffers on
1951  * @old_buff: donor buffer to have page reused
1952  *
1953  * Synchronizes page for reuse by the adapter
1954  **/
1955 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1956                                 struct ixgbe_rx_buffer *old_buff)
1957 {
1958         struct ixgbe_rx_buffer *new_buff;
1959         u16 nta = rx_ring->next_to_alloc;
1960
1961         new_buff = &rx_ring->rx_buffer_info[nta];
1962
1963         /* update, and store next to alloc */
1964         nta++;
1965         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1966
1967         /* Transfer page from old buffer to new buffer.
1968          * Move each member individually to avoid possible store
1969          * forwarding stalls and unnecessary copy of skb.
1970          */
1971         new_buff->dma           = old_buff->dma;
1972         new_buff->page          = old_buff->page;
1973         new_buff->page_offset   = old_buff->page_offset;
1974         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1975 }
1976
1977 static inline bool ixgbe_page_is_reserved(struct page *page)
1978 {
1979         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1980 }
1981
1982 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1983 {
1984         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1985         struct page *page = rx_buffer->page;
1986
1987         /* avoid re-using remote pages */
1988         if (unlikely(ixgbe_page_is_reserved(page)))
1989                 return false;
1990
1991 #if (PAGE_SIZE < 8192)
1992         /* if we are only owner of page we can reuse it */
1993         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1994                 return false;
1995 #else
1996         /* The last offset is a bit aggressive in that we assume the
1997          * worst case of FCoE being enabled and using a 3K buffer.
1998          * However this should have minimal impact as the 1K extra is
1999          * still less than one buffer in size.
2000          */
2001 #define IXGBE_LAST_OFFSET \
2002         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
2003         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
2004                 return false;
2005 #endif
2006
2007         /* If we have drained the page fragment pool we need to update
2008          * the pagecnt_bias and page count so that we fully restock the
2009          * number of references the driver holds.
2010          */
2011         if (unlikely(!pagecnt_bias)) {
2012                 page_ref_add(page, USHRT_MAX);
2013                 rx_buffer->pagecnt_bias = USHRT_MAX;
2014         }
2015
2016         return true;
2017 }
2018
2019 /**
2020  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
2021  * @rx_ring: rx descriptor ring to transact packets on
2022  * @rx_buffer: buffer containing page to add
2023  * @rx_desc: descriptor containing length of buffer written by hardware
2024  * @skb: sk_buff to place the data into
2025  *
2026  * This function will add the data contained in rx_buffer->page to the skb.
2027  * This is done either through a direct copy if the data in the buffer is
2028  * less than the skb header size, otherwise it will just attach the page as
2029  * a frag to the skb.
2030  *
2031  * The function will then update the page offset if necessary and return
2032  * true if the buffer can be reused by the adapter.
2033  **/
2034 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2035                               struct ixgbe_rx_buffer *rx_buffer,
2036                               struct sk_buff *skb,
2037                               unsigned int size)
2038 {
2039 #if (PAGE_SIZE < 8192)
2040         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2041 #else
2042         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2043                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2044                                 SKB_DATA_ALIGN(size);
2045 #endif
2046         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2047                         rx_buffer->page_offset, size, truesize);
2048 #if (PAGE_SIZE < 8192)
2049         rx_buffer->page_offset ^= truesize;
2050 #else
2051         rx_buffer->page_offset += truesize;
2052 #endif
2053 }
2054
2055 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2056                                                    union ixgbe_adv_rx_desc *rx_desc,
2057                                                    struct sk_buff **skb,
2058                                                    const unsigned int size)
2059 {
2060         struct ixgbe_rx_buffer *rx_buffer;
2061
2062         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2063         prefetchw(rx_buffer->page);
2064         *skb = rx_buffer->skb;
2065
2066         /* Delay unmapping of the first packet. It carries the header
2067          * information, HW may still access the header after the writeback.
2068          * Only unmap it when EOP is reached
2069          */
2070         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2071                 if (!*skb)
2072                         goto skip_sync;
2073         } else {
2074                 if (*skb)
2075                         ixgbe_dma_sync_frag(rx_ring, *skb);
2076         }
2077
2078         /* we are reusing so sync this buffer for CPU use */
2079         dma_sync_single_range_for_cpu(rx_ring->dev,
2080                                       rx_buffer->dma,
2081                                       rx_buffer->page_offset,
2082                                       size,
2083                                       DMA_FROM_DEVICE);
2084 skip_sync:
2085         rx_buffer->pagecnt_bias--;
2086
2087         return rx_buffer;
2088 }
2089
2090 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2091                                 struct ixgbe_rx_buffer *rx_buffer,
2092                                 struct sk_buff *skb)
2093 {
2094         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2095                 /* hand second half of page back to the ring */
2096                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2097         } else {
2098                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2099                         /* the page has been released from the ring */
2100                         IXGBE_CB(skb)->page_released = true;
2101                 } else {
2102                         /* we are not reusing the buffer so unmap it */
2103                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2104                                              ixgbe_rx_pg_size(rx_ring),
2105                                              DMA_FROM_DEVICE,
2106                                              IXGBE_RX_DMA_ATTR);
2107                 }
2108                 __page_frag_cache_drain(rx_buffer->page,
2109                                         rx_buffer->pagecnt_bias);
2110         }
2111
2112         /* clear contents of rx_buffer */
2113         rx_buffer->page = NULL;
2114         rx_buffer->skb = NULL;
2115 }
2116
2117 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2118                                            struct ixgbe_rx_buffer *rx_buffer,
2119                                            struct xdp_buff *xdp,
2120                                            union ixgbe_adv_rx_desc *rx_desc)
2121 {
2122         unsigned int size = xdp->data_end - xdp->data;
2123 #if (PAGE_SIZE < 8192)
2124         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2125 #else
2126         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2127                                                xdp->data_hard_start);
2128 #endif
2129         struct sk_buff *skb;
2130
2131         /* prefetch first cache line of first page */
2132         prefetch(xdp->data);
2133 #if L1_CACHE_BYTES < 128
2134         prefetch(xdp->data + L1_CACHE_BYTES);
2135 #endif
2136
2137         /* allocate a skb to store the frags */
2138         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2139         if (unlikely(!skb))
2140                 return NULL;
2141
2142         if (size > IXGBE_RX_HDR_SIZE) {
2143                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2144                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2145
2146                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2147                                 xdp->data - page_address(rx_buffer->page),
2148                                 size, truesize);
2149 #if (PAGE_SIZE < 8192)
2150                 rx_buffer->page_offset ^= truesize;
2151 #else
2152                 rx_buffer->page_offset += truesize;
2153 #endif
2154         } else {
2155                 memcpy(__skb_put(skb, size),
2156                        xdp->data, ALIGN(size, sizeof(long)));
2157                 rx_buffer->pagecnt_bias++;
2158         }
2159
2160         return skb;
2161 }
2162
2163 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2164                                        struct ixgbe_rx_buffer *rx_buffer,
2165                                        struct xdp_buff *xdp,
2166                                        union ixgbe_adv_rx_desc *rx_desc)
2167 {
2168 #if (PAGE_SIZE < 8192)
2169         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2170 #else
2171         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2172                                 SKB_DATA_ALIGN(xdp->data_end -
2173                                                xdp->data_hard_start);
2174 #endif
2175         struct sk_buff *skb;
2176
2177         /* prefetch first cache line of first page */
2178         prefetch(xdp->data);
2179 #if L1_CACHE_BYTES < 128
2180         prefetch(xdp->data + L1_CACHE_BYTES);
2181 #endif
2182
2183         /* build an skb to around the page buffer */
2184         skb = build_skb(xdp->data_hard_start, truesize);
2185         if (unlikely(!skb))
2186                 return NULL;
2187
2188         /* update pointers within the skb to store the data */
2189         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2190         __skb_put(skb, xdp->data_end - xdp->data);
2191
2192         /* record DMA address if this is the start of a chain of buffers */
2193         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2194                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2195
2196         /* update buffer offset */
2197 #if (PAGE_SIZE < 8192)
2198         rx_buffer->page_offset ^= truesize;
2199 #else
2200         rx_buffer->page_offset += truesize;
2201 #endif
2202
2203         return skb;
2204 }
2205
2206 #define IXGBE_XDP_PASS 0
2207 #define IXGBE_XDP_CONSUMED 1
2208 #define IXGBE_XDP_TX 2
2209
2210 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2211                                struct xdp_buff *xdp);
2212
2213 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2214                                      struct ixgbe_ring *rx_ring,
2215                                      struct xdp_buff *xdp)
2216 {
2217         int err, result = IXGBE_XDP_PASS;
2218         struct bpf_prog *xdp_prog;
2219         u32 act;
2220
2221         rcu_read_lock();
2222         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2223
2224         if (!xdp_prog)
2225                 goto xdp_out;
2226
2227         act = bpf_prog_run_xdp(xdp_prog, xdp);
2228         switch (act) {
2229         case XDP_PASS:
2230                 break;
2231         case XDP_TX:
2232                 result = ixgbe_xmit_xdp_ring(adapter, xdp);
2233                 break;
2234         case XDP_REDIRECT:
2235                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2236                 if (!err)
2237                         result = IXGBE_XDP_TX;
2238                 else
2239                         result = IXGBE_XDP_CONSUMED;
2240                 break;
2241         default:
2242                 bpf_warn_invalid_xdp_action(act);
2243                 /* fallthrough */
2244         case XDP_ABORTED:
2245                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2246                 /* fallthrough -- handle aborts by dropping packet */
2247         case XDP_DROP:
2248                 result = IXGBE_XDP_CONSUMED;
2249                 break;
2250         }
2251 xdp_out:
2252         rcu_read_unlock();
2253         return ERR_PTR(-result);
2254 }
2255
2256 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2257                                  struct ixgbe_rx_buffer *rx_buffer,
2258                                  unsigned int size)
2259 {
2260 #if (PAGE_SIZE < 8192)
2261         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2262
2263         rx_buffer->page_offset ^= truesize;
2264 #else
2265         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2266                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2267                                 SKB_DATA_ALIGN(size);
2268
2269         rx_buffer->page_offset += truesize;
2270 #endif
2271 }
2272
2273 /**
2274  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2275  * @q_vector: structure containing interrupt and ring information
2276  * @rx_ring: rx descriptor ring to transact packets on
2277  * @budget: Total limit on number of packets to process
2278  *
2279  * This function provides a "bounce buffer" approach to Rx interrupt
2280  * processing.  The advantage to this is that on systems that have
2281  * expensive overhead for IOMMU access this provides a means of avoiding
2282  * it by maintaining the mapping of the page to the syste.
2283  *
2284  * Returns amount of work completed
2285  **/
2286 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2287                                struct ixgbe_ring *rx_ring,
2288                                const int budget)
2289 {
2290         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2291         struct ixgbe_adapter *adapter = q_vector->adapter;
2292 #ifdef IXGBE_FCOE
2293         int ddp_bytes;
2294         unsigned int mss = 0;
2295 #endif /* IXGBE_FCOE */
2296         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2297         bool xdp_xmit = false;
2298
2299         while (likely(total_rx_packets < budget)) {
2300                 union ixgbe_adv_rx_desc *rx_desc;
2301                 struct ixgbe_rx_buffer *rx_buffer;
2302                 struct sk_buff *skb;
2303                 struct xdp_buff xdp;
2304                 unsigned int size;
2305
2306                 /* return some buffers to hardware, one at a time is too slow */
2307                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2308                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2309                         cleaned_count = 0;
2310                 }
2311
2312                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2313                 size = le16_to_cpu(rx_desc->wb.upper.length);
2314                 if (!size)
2315                         break;
2316
2317                 /* This memory barrier is needed to keep us from reading
2318                  * any other fields out of the rx_desc until we know the
2319                  * descriptor has been written back
2320                  */
2321                 dma_rmb();
2322
2323                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2324
2325                 /* retrieve a buffer from the ring */
2326                 if (!skb) {
2327                         xdp.data = page_address(rx_buffer->page) +
2328                                    rx_buffer->page_offset;
2329                         xdp.data_hard_start = xdp.data -
2330                                               ixgbe_rx_offset(rx_ring);
2331                         xdp.data_end = xdp.data + size;
2332
2333                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2334                 }
2335
2336                 if (IS_ERR(skb)) {
2337                         if (PTR_ERR(skb) == -IXGBE_XDP_TX) {
2338                                 xdp_xmit = true;
2339                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2340                         } else {
2341                                 rx_buffer->pagecnt_bias++;
2342                         }
2343                         total_rx_packets++;
2344                         total_rx_bytes += size;
2345                 } else if (skb) {
2346                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2347                 } else if (ring_uses_build_skb(rx_ring)) {
2348                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2349                                               &xdp, rx_desc);
2350                 } else {
2351                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2352                                                   &xdp, rx_desc);
2353                 }
2354
2355                 /* exit if we failed to retrieve a buffer */
2356                 if (!skb) {
2357                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2358                         rx_buffer->pagecnt_bias++;
2359                         break;
2360                 }
2361
2362                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2363                 cleaned_count++;
2364
2365                 /* place incomplete frames back on ring for completion */
2366                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2367                         continue;
2368
2369                 /* verify the packet layout is correct */
2370                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2371                         continue;
2372
2373                 /* probably a little skewed due to removing CRC */
2374                 total_rx_bytes += skb->len;
2375
2376                 /* populate checksum, timestamp, VLAN, and protocol */
2377                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2378
2379 #ifdef IXGBE_FCOE
2380                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2381                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2382                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2383                         /* include DDPed FCoE data */
2384                         if (ddp_bytes > 0) {
2385                                 if (!mss) {
2386                                         mss = rx_ring->netdev->mtu -
2387                                                 sizeof(struct fcoe_hdr) -
2388                                                 sizeof(struct fc_frame_header) -
2389                                                 sizeof(struct fcoe_crc_eof);
2390                                         if (mss > 512)
2391                                                 mss &= ~511;
2392                                 }
2393                                 total_rx_bytes += ddp_bytes;
2394                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2395                                                                  mss);
2396                         }
2397                         if (!ddp_bytes) {
2398                                 dev_kfree_skb_any(skb);
2399                                 continue;
2400                         }
2401                 }
2402
2403 #endif /* IXGBE_FCOE */
2404                 ixgbe_rx_skb(q_vector, skb);
2405
2406                 /* update budget accounting */
2407                 total_rx_packets++;
2408         }
2409
2410         if (xdp_xmit) {
2411                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2412
2413                 /* Force memory writes to complete before letting h/w
2414                  * know there are new descriptors to fetch.
2415                  */
2416                 wmb();
2417                 writel(ring->next_to_use, ring->tail);
2418         }
2419
2420         u64_stats_update_begin(&rx_ring->syncp);
2421         rx_ring->stats.packets += total_rx_packets;
2422         rx_ring->stats.bytes += total_rx_bytes;
2423         u64_stats_update_end(&rx_ring->syncp);
2424         q_vector->rx.total_packets += total_rx_packets;
2425         q_vector->rx.total_bytes += total_rx_bytes;
2426
2427         return total_rx_packets;
2428 }
2429
2430 /**
2431  * ixgbe_configure_msix - Configure MSI-X hardware
2432  * @adapter: board private structure
2433  *
2434  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2435  * interrupts.
2436  **/
2437 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2438 {
2439         struct ixgbe_q_vector *q_vector;
2440         int v_idx;
2441         u32 mask;
2442
2443         /* Populate MSIX to EITR Select */
2444         if (adapter->num_vfs > 32) {
2445                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2446                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2447         }
2448
2449         /*
2450          * Populate the IVAR table and set the ITR values to the
2451          * corresponding register.
2452          */
2453         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2454                 struct ixgbe_ring *ring;
2455                 q_vector = adapter->q_vector[v_idx];
2456
2457                 ixgbe_for_each_ring(ring, q_vector->rx)
2458                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2459
2460                 ixgbe_for_each_ring(ring, q_vector->tx)
2461                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2462
2463                 ixgbe_write_eitr(q_vector);
2464         }
2465
2466         switch (adapter->hw.mac.type) {
2467         case ixgbe_mac_82598EB:
2468                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2469                                v_idx);
2470                 break;
2471         case ixgbe_mac_82599EB:
2472         case ixgbe_mac_X540:
2473         case ixgbe_mac_X550:
2474         case ixgbe_mac_X550EM_x:
2475         case ixgbe_mac_x550em_a:
2476                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2477                 break;
2478         default:
2479                 break;
2480         }
2481         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2482
2483         /* set up to autoclear timer, and the vectors */
2484         mask = IXGBE_EIMS_ENABLE_MASK;
2485         mask &= ~(IXGBE_EIMS_OTHER |
2486                   IXGBE_EIMS_MAILBOX |
2487                   IXGBE_EIMS_LSC);
2488
2489         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2490 }
2491
2492 enum latency_range {
2493         lowest_latency = 0,
2494         low_latency = 1,
2495         bulk_latency = 2,
2496         latency_invalid = 255
2497 };
2498
2499 /**
2500  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2501  * @q_vector: structure containing interrupt and ring information
2502  * @ring_container: structure containing ring performance data
2503  *
2504  *      Stores a new ITR value based on packets and byte
2505  *      counts during the last interrupt.  The advantage of per interrupt
2506  *      computation is faster updates and more accurate ITR for the current
2507  *      traffic pattern.  Constants in this function were computed
2508  *      based on theoretical maximum wire speed and thresholds were set based
2509  *      on testing data as well as attempting to minimize response time
2510  *      while increasing bulk throughput.
2511  *      this functionality is controlled by the InterruptThrottleRate module
2512  *      parameter (see ixgbe_param.c)
2513  **/
2514 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2515                              struct ixgbe_ring_container *ring_container)
2516 {
2517         int bytes = ring_container->total_bytes;
2518         int packets = ring_container->total_packets;
2519         u32 timepassed_us;
2520         u64 bytes_perint;
2521         u8 itr_setting = ring_container->itr;
2522
2523         if (packets == 0)
2524                 return;
2525
2526         /* simple throttlerate management
2527          *   0-10MB/s   lowest (100000 ints/s)
2528          *  10-20MB/s   low    (20000 ints/s)
2529          *  20-1249MB/s bulk   (12000 ints/s)
2530          */
2531         /* what was last interrupt timeslice? */
2532         timepassed_us = q_vector->itr >> 2;
2533         if (timepassed_us == 0)
2534                 return;
2535
2536         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2537
2538         switch (itr_setting) {
2539         case lowest_latency:
2540                 if (bytes_perint > 10)
2541                         itr_setting = low_latency;
2542                 break;
2543         case low_latency:
2544                 if (bytes_perint > 20)
2545                         itr_setting = bulk_latency;
2546                 else if (bytes_perint <= 10)
2547                         itr_setting = lowest_latency;
2548                 break;
2549         case bulk_latency:
2550                 if (bytes_perint <= 20)
2551                         itr_setting = low_latency;
2552                 break;
2553         }
2554
2555         /* clear work counters since we have the values we need */
2556         ring_container->total_bytes = 0;
2557         ring_container->total_packets = 0;
2558
2559         /* write updated itr to ring container */
2560         ring_container->itr = itr_setting;
2561 }
2562
2563 /**
2564  * ixgbe_write_eitr - write EITR register in hardware specific way
2565  * @q_vector: structure containing interrupt and ring information
2566  *
2567  * This function is made to be called by ethtool and by the driver
2568  * when it needs to update EITR registers at runtime.  Hardware
2569  * specific quirks/differences are taken care of here.
2570  */
2571 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2572 {
2573         struct ixgbe_adapter *adapter = q_vector->adapter;
2574         struct ixgbe_hw *hw = &adapter->hw;
2575         int v_idx = q_vector->v_idx;
2576         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2577
2578         switch (adapter->hw.mac.type) {
2579         case ixgbe_mac_82598EB:
2580                 /* must write high and low 16 bits to reset counter */
2581                 itr_reg |= (itr_reg << 16);
2582                 break;
2583         case ixgbe_mac_82599EB:
2584         case ixgbe_mac_X540:
2585         case ixgbe_mac_X550:
2586         case ixgbe_mac_X550EM_x:
2587         case ixgbe_mac_x550em_a:
2588                 /*
2589                  * set the WDIS bit to not clear the timer bits and cause an
2590                  * immediate assertion of the interrupt
2591                  */
2592                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2593                 break;
2594         default:
2595                 break;
2596         }
2597         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2598 }
2599
2600 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2601 {
2602         u32 new_itr = q_vector->itr;
2603         u8 current_itr;
2604
2605         ixgbe_update_itr(q_vector, &q_vector->tx);
2606         ixgbe_update_itr(q_vector, &q_vector->rx);
2607
2608         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2609
2610         switch (current_itr) {
2611         /* counts and packets in update_itr are dependent on these numbers */
2612         case lowest_latency:
2613                 new_itr = IXGBE_100K_ITR;
2614                 break;
2615         case low_latency:
2616                 new_itr = IXGBE_20K_ITR;
2617                 break;
2618         case bulk_latency:
2619                 new_itr = IXGBE_12K_ITR;
2620                 break;
2621         default:
2622                 break;
2623         }
2624
2625         if (new_itr != q_vector->itr) {
2626                 /* do an exponential smoothing */
2627                 new_itr = (10 * new_itr * q_vector->itr) /
2628                           ((9 * new_itr) + q_vector->itr);
2629
2630                 /* save the algorithm value here */
2631                 q_vector->itr = new_itr;
2632
2633                 ixgbe_write_eitr(q_vector);
2634         }
2635 }
2636
2637 /**
2638  * ixgbe_check_overtemp_subtask - check for over temperature
2639  * @adapter: pointer to adapter
2640  **/
2641 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2642 {
2643         struct ixgbe_hw *hw = &adapter->hw;
2644         u32 eicr = adapter->interrupt_event;
2645         s32 rc;
2646
2647         if (test_bit(__IXGBE_DOWN, &adapter->state))
2648                 return;
2649
2650         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2651                 return;
2652
2653         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2654
2655         switch (hw->device_id) {
2656         case IXGBE_DEV_ID_82599_T3_LOM:
2657                 /*
2658                  * Since the warning interrupt is for both ports
2659                  * we don't have to check if:
2660                  *  - This interrupt wasn't for our port.
2661                  *  - We may have missed the interrupt so always have to
2662                  *    check if we  got a LSC
2663                  */
2664                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2665                     !(eicr & IXGBE_EICR_LSC))
2666                         return;
2667
2668                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2669                         u32 speed;
2670                         bool link_up = false;
2671
2672                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2673
2674                         if (link_up)
2675                                 return;
2676                 }
2677
2678                 /* Check if this is not due to overtemp */
2679                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2680                         return;
2681
2682                 break;
2683         case IXGBE_DEV_ID_X550EM_A_1G_T:
2684         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2685                 rc = hw->phy.ops.check_overtemp(hw);
2686                 if (rc != IXGBE_ERR_OVERTEMP)
2687                         return;
2688                 break;
2689         default:
2690                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2691                         return;
2692                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2693                         return;
2694                 break;
2695         }
2696         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2697
2698         adapter->interrupt_event = 0;
2699 }
2700
2701 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2702 {
2703         struct ixgbe_hw *hw = &adapter->hw;
2704
2705         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2706             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2707                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2708                 /* write to clear the interrupt */
2709                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2710         }
2711 }
2712
2713 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2714 {
2715         struct ixgbe_hw *hw = &adapter->hw;
2716
2717         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2718                 return;
2719
2720         switch (adapter->hw.mac.type) {
2721         case ixgbe_mac_82599EB:
2722                 /*
2723                  * Need to check link state so complete overtemp check
2724                  * on service task
2725                  */
2726                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2727                      (eicr & IXGBE_EICR_LSC)) &&
2728                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2729                         adapter->interrupt_event = eicr;
2730                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2731                         ixgbe_service_event_schedule(adapter);
2732                         return;
2733                 }
2734                 return;
2735         case ixgbe_mac_x550em_a:
2736                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2737                         adapter->interrupt_event = eicr;
2738                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2739                         ixgbe_service_event_schedule(adapter);
2740                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2741                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2742                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2743                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2744                 }
2745                 return;
2746         case ixgbe_mac_X550:
2747         case ixgbe_mac_X540:
2748                 if (!(eicr & IXGBE_EICR_TS))
2749                         return;
2750                 break;
2751         default:
2752                 return;
2753         }
2754
2755         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2756 }
2757
2758 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2759 {
2760         switch (hw->mac.type) {
2761         case ixgbe_mac_82598EB:
2762                 if (hw->phy.type == ixgbe_phy_nl)
2763                         return true;
2764                 return false;
2765         case ixgbe_mac_82599EB:
2766         case ixgbe_mac_X550EM_x:
2767         case ixgbe_mac_x550em_a:
2768                 switch (hw->mac.ops.get_media_type(hw)) {
2769                 case ixgbe_media_type_fiber:
2770                 case ixgbe_media_type_fiber_qsfp:
2771                         return true;
2772                 default:
2773                         return false;
2774                 }
2775         default:
2776                 return false;
2777         }
2778 }
2779
2780 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2781 {
2782         struct ixgbe_hw *hw = &adapter->hw;
2783         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2784
2785         if (!ixgbe_is_sfp(hw))
2786                 return;
2787
2788         /* Later MAC's use different SDP */
2789         if (hw->mac.type >= ixgbe_mac_X540)
2790                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2791
2792         if (eicr & eicr_mask) {
2793                 /* Clear the interrupt */
2794                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2795                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2796                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2797                         adapter->sfp_poll_time = 0;
2798                         ixgbe_service_event_schedule(adapter);
2799                 }
2800         }
2801
2802         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2803             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2804                 /* Clear the interrupt */
2805                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2806                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2807                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2808                         ixgbe_service_event_schedule(adapter);
2809                 }
2810         }
2811 }
2812
2813 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2814 {
2815         struct ixgbe_hw *hw = &adapter->hw;
2816
2817         adapter->lsc_int++;
2818         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2819         adapter->link_check_timeout = jiffies;
2820         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2821                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2822                 IXGBE_WRITE_FLUSH(hw);
2823                 ixgbe_service_event_schedule(adapter);
2824         }
2825 }
2826
2827 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2828                                            u64 qmask)
2829 {
2830         u32 mask;
2831         struct ixgbe_hw *hw = &adapter->hw;
2832
2833         switch (hw->mac.type) {
2834         case ixgbe_mac_82598EB:
2835                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2836                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2837                 break;
2838         case ixgbe_mac_82599EB:
2839         case ixgbe_mac_X540:
2840         case ixgbe_mac_X550:
2841         case ixgbe_mac_X550EM_x:
2842         case ixgbe_mac_x550em_a:
2843                 mask = (qmask & 0xFFFFFFFF);
2844                 if (mask)
2845                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2846                 mask = (qmask >> 32);
2847                 if (mask)
2848                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2849                 break;
2850         default:
2851                 break;
2852         }
2853         /* skip the flush */
2854 }
2855
2856 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2857                                             u64 qmask)
2858 {
2859         u32 mask;
2860         struct ixgbe_hw *hw = &adapter->hw;
2861
2862         switch (hw->mac.type) {
2863         case ixgbe_mac_82598EB:
2864                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2865                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2866                 break;
2867         case ixgbe_mac_82599EB:
2868         case ixgbe_mac_X540:
2869         case ixgbe_mac_X550:
2870         case ixgbe_mac_X550EM_x:
2871         case ixgbe_mac_x550em_a:
2872                 mask = (qmask & 0xFFFFFFFF);
2873                 if (mask)
2874                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2875                 mask = (qmask >> 32);
2876                 if (mask)
2877                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2878                 break;
2879         default:
2880                 break;
2881         }
2882         /* skip the flush */
2883 }
2884
2885 /**
2886  * ixgbe_irq_enable - Enable default interrupt generation settings
2887  * @adapter: board private structure
2888  **/
2889 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2890                                     bool flush)
2891 {
2892         struct ixgbe_hw *hw = &adapter->hw;
2893         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2894
2895         /* don't reenable LSC while waiting for link */
2896         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2897                 mask &= ~IXGBE_EIMS_LSC;
2898
2899         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2900                 switch (adapter->hw.mac.type) {
2901                 case ixgbe_mac_82599EB:
2902                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2903                         break;
2904                 case ixgbe_mac_X540:
2905                 case ixgbe_mac_X550:
2906                 case ixgbe_mac_X550EM_x:
2907                 case ixgbe_mac_x550em_a:
2908                         mask |= IXGBE_EIMS_TS;
2909                         break;
2910                 default:
2911                         break;
2912                 }
2913         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2914                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2915         switch (adapter->hw.mac.type) {
2916         case ixgbe_mac_82599EB:
2917                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2918                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2919                 /* fall through */
2920         case ixgbe_mac_X540:
2921         case ixgbe_mac_X550:
2922         case ixgbe_mac_X550EM_x:
2923         case ixgbe_mac_x550em_a:
2924                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2925                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2926                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2927                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2928                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2929                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2930                 mask |= IXGBE_EIMS_ECC;
2931                 mask |= IXGBE_EIMS_MAILBOX;
2932                 break;
2933         default:
2934                 break;
2935         }
2936
2937         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2938             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2939                 mask |= IXGBE_EIMS_FLOW_DIR;
2940
2941         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2942         if (queues)
2943                 ixgbe_irq_enable_queues(adapter, ~0);
2944         if (flush)
2945                 IXGBE_WRITE_FLUSH(&adapter->hw);
2946 }
2947
2948 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2949 {
2950         struct ixgbe_adapter *adapter = data;
2951         struct ixgbe_hw *hw = &adapter->hw;
2952         u32 eicr;
2953
2954         /*
2955          * Workaround for Silicon errata.  Use clear-by-write instead
2956          * of clear-by-read.  Reading with EICS will return the
2957          * interrupt causes without clearing, which later be done
2958          * with the write to EICR.
2959          */
2960         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2961
2962         /* The lower 16bits of the EICR register are for the queue interrupts
2963          * which should be masked here in order to not accidentally clear them if
2964          * the bits are high when ixgbe_msix_other is called. There is a race
2965          * condition otherwise which results in possible performance loss
2966          * especially if the ixgbe_msix_other interrupt is triggering
2967          * consistently (as it would when PPS is turned on for the X540 device)
2968          */
2969         eicr &= 0xFFFF0000;
2970
2971         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2972
2973         if (eicr & IXGBE_EICR_LSC)
2974                 ixgbe_check_lsc(adapter);
2975
2976         if (eicr & IXGBE_EICR_MAILBOX)
2977                 ixgbe_msg_task(adapter);
2978
2979         switch (hw->mac.type) {
2980         case ixgbe_mac_82599EB:
2981         case ixgbe_mac_X540:
2982         case ixgbe_mac_X550:
2983         case ixgbe_mac_X550EM_x:
2984         case ixgbe_mac_x550em_a:
2985                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2986                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2987                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2988                         ixgbe_service_event_schedule(adapter);
2989                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2990                                         IXGBE_EICR_GPI_SDP0_X540);
2991                 }
2992                 if (eicr & IXGBE_EICR_ECC) {
2993                         e_info(link, "Received ECC Err, initiating reset\n");
2994                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2995                         ixgbe_service_event_schedule(adapter);
2996                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2997                 }
2998                 /* Handle Flow Director Full threshold interrupt */
2999                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3000                         int reinit_count = 0;
3001                         int i;
3002                         for (i = 0; i < adapter->num_tx_queues; i++) {
3003                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3004                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3005                                                        &ring->state))
3006                                         reinit_count++;
3007                         }
3008                         if (reinit_count) {
3009                                 /* no more flow director interrupts until after init */
3010                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3011                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3012                                 ixgbe_service_event_schedule(adapter);
3013                         }
3014                 }
3015                 ixgbe_check_sfp_event(adapter, eicr);
3016                 ixgbe_check_overtemp_event(adapter, eicr);
3017                 break;
3018         default:
3019                 break;
3020         }
3021
3022         ixgbe_check_fan_failure(adapter, eicr);
3023
3024         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3025                 ixgbe_ptp_check_pps_event(adapter);
3026
3027         /* re-enable the original interrupt state, no lsc, no queues */
3028         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3029                 ixgbe_irq_enable(adapter, false, false);
3030
3031         return IRQ_HANDLED;
3032 }
3033
3034 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3035 {
3036         struct ixgbe_q_vector *q_vector = data;
3037
3038         /* EIAM disabled interrupts (on this vector) for us */
3039
3040         if (q_vector->rx.ring || q_vector->tx.ring)
3041                 napi_schedule_irqoff(&q_vector->napi);
3042
3043         return IRQ_HANDLED;
3044 }
3045
3046 /**
3047  * ixgbe_poll - NAPI Rx polling callback
3048  * @napi: structure for representing this polling device
3049  * @budget: how many packets driver is allowed to clean
3050  *
3051  * This function is used for legacy and MSI, NAPI mode
3052  **/
3053 int ixgbe_poll(struct napi_struct *napi, int budget)
3054 {
3055         struct ixgbe_q_vector *q_vector =
3056                                 container_of(napi, struct ixgbe_q_vector, napi);
3057         struct ixgbe_adapter *adapter = q_vector->adapter;
3058         struct ixgbe_ring *ring;
3059         int per_ring_budget, work_done = 0;
3060         bool clean_complete = true;
3061
3062 #ifdef CONFIG_IXGBE_DCA
3063         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3064                 ixgbe_update_dca(q_vector);
3065 #endif
3066
3067         ixgbe_for_each_ring(ring, q_vector->tx) {
3068                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3069                         clean_complete = false;
3070         }
3071
3072         /* Exit if we are called by netpoll */
3073         if (budget <= 0)
3074                 return budget;
3075
3076         /* attempt to distribute budget to each queue fairly, but don't allow
3077          * the budget to go below 1 because we'll exit polling */
3078         if (q_vector->rx.count > 1)
3079                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3080         else
3081                 per_ring_budget = budget;
3082
3083         ixgbe_for_each_ring(ring, q_vector->rx) {
3084                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3085                                                  per_ring_budget);
3086
3087                 work_done += cleaned;
3088                 if (cleaned >= per_ring_budget)
3089                         clean_complete = false;
3090         }
3091
3092         /* If all work not completed, return budget and keep polling */
3093         if (!clean_complete)
3094                 return budget;
3095
3096         /* all work done, exit the polling mode */
3097         napi_complete_done(napi, work_done);
3098         if (adapter->rx_itr_setting & 1)
3099                 ixgbe_set_itr(q_vector);
3100         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3101                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3102
3103         return min(work_done, budget - 1);
3104 }
3105
3106 /**
3107  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3108  * @adapter: board private structure
3109  *
3110  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3111  * interrupts from the kernel.
3112  **/
3113 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3114 {
3115         struct net_device *netdev = adapter->netdev;
3116         unsigned int ri = 0, ti = 0;
3117         int vector, err;
3118
3119         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3120                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3121                 struct msix_entry *entry = &adapter->msix_entries[vector];
3122
3123                 if (q_vector->tx.ring && q_vector->rx.ring) {
3124                         snprintf(q_vector->name, sizeof(q_vector->name),
3125                                  "%s-TxRx-%u", netdev->name, ri++);
3126                         ti++;
3127                 } else if (q_vector->rx.ring) {
3128                         snprintf(q_vector->name, sizeof(q_vector->name),
3129                                  "%s-rx-%u", netdev->name, ri++);
3130                 } else if (q_vector->tx.ring) {
3131                         snprintf(q_vector->name, sizeof(q_vector->name),
3132                                  "%s-tx-%u", netdev->name, ti++);
3133                 } else {
3134                         /* skip this unused q_vector */
3135                         continue;
3136                 }
3137                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3138                                   q_vector->name, q_vector);
3139                 if (err) {
3140                         e_err(probe, "request_irq failed for MSIX interrupt "
3141                               "Error: %d\n", err);
3142                         goto free_queue_irqs;
3143                 }
3144                 /* If Flow Director is enabled, set interrupt affinity */
3145                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3146                         /* assign the mask for this irq */
3147                         irq_set_affinity_hint(entry->vector,
3148                                               &q_vector->affinity_mask);
3149                 }
3150         }
3151
3152         err = request_irq(adapter->msix_entries[vector].vector,
3153                           ixgbe_msix_other, 0, netdev->name, adapter);
3154         if (err) {
3155                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3156                 goto free_queue_irqs;
3157         }
3158
3159         return 0;
3160
3161 free_queue_irqs:
3162         while (vector) {
3163                 vector--;
3164                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3165                                       NULL);
3166                 free_irq(adapter->msix_entries[vector].vector,
3167                          adapter->q_vector[vector]);
3168         }
3169         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3170         pci_disable_msix(adapter->pdev);
3171         kfree(adapter->msix_entries);
3172         adapter->msix_entries = NULL;
3173         return err;
3174 }
3175
3176 /**
3177  * ixgbe_intr - legacy mode Interrupt Handler
3178  * @irq: interrupt number
3179  * @data: pointer to a network interface device structure
3180  **/
3181 static irqreturn_t ixgbe_intr(int irq, void *data)
3182 {
3183         struct ixgbe_adapter *adapter = data;
3184         struct ixgbe_hw *hw = &adapter->hw;
3185         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3186         u32 eicr;
3187
3188         /*
3189          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3190          * before the read of EICR.
3191          */
3192         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3193
3194         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3195          * therefore no explicit interrupt disable is necessary */
3196         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3197         if (!eicr) {
3198                 /*
3199                  * shared interrupt alert!
3200                  * make sure interrupts are enabled because the read will
3201                  * have disabled interrupts due to EIAM
3202                  * finish the workaround of silicon errata on 82598.  Unmask
3203                  * the interrupt that we masked before the EICR read.
3204                  */
3205                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3206                         ixgbe_irq_enable(adapter, true, true);
3207                 return IRQ_NONE;        /* Not our interrupt */
3208         }
3209
3210         if (eicr & IXGBE_EICR_LSC)
3211                 ixgbe_check_lsc(adapter);
3212
3213         switch (hw->mac.type) {
3214         case ixgbe_mac_82599EB:
3215                 ixgbe_check_sfp_event(adapter, eicr);
3216                 /* Fall through */
3217         case ixgbe_mac_X540:
3218         case ixgbe_mac_X550:
3219         case ixgbe_mac_X550EM_x:
3220         case ixgbe_mac_x550em_a:
3221                 if (eicr & IXGBE_EICR_ECC) {
3222                         e_info(link, "Received ECC Err, initiating reset\n");
3223                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3224                         ixgbe_service_event_schedule(adapter);
3225                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3226                 }
3227                 ixgbe_check_overtemp_event(adapter, eicr);
3228                 break;
3229         default:
3230                 break;
3231         }
3232
3233         ixgbe_check_fan_failure(adapter, eicr);
3234         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3235                 ixgbe_ptp_check_pps_event(adapter);
3236
3237         /* would disable interrupts here but EIAM disabled it */
3238         napi_schedule_irqoff(&q_vector->napi);
3239
3240         /*
3241          * re-enable link(maybe) and non-queue interrupts, no flush.
3242          * ixgbe_poll will re-enable the queue interrupts
3243          */
3244         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3245                 ixgbe_irq_enable(adapter, false, false);
3246
3247         return IRQ_HANDLED;
3248 }
3249
3250 /**
3251  * ixgbe_request_irq - initialize interrupts
3252  * @adapter: board private structure
3253  *
3254  * Attempts to configure interrupts using the best available
3255  * capabilities of the hardware and kernel.
3256  **/
3257 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3258 {
3259         struct net_device *netdev = adapter->netdev;
3260         int err;
3261
3262         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3263                 err = ixgbe_request_msix_irqs(adapter);
3264         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3265                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3266                                   netdev->name, adapter);
3267         else
3268                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3269                                   netdev->name, adapter);
3270
3271         if (err)
3272                 e_err(probe, "request_irq failed, Error %d\n", err);
3273
3274         return err;
3275 }
3276
3277 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3278 {
3279         int vector;
3280
3281         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3282                 free_irq(adapter->pdev->irq, adapter);
3283                 return;
3284         }
3285
3286         if (!adapter->msix_entries)
3287                 return;
3288
3289         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3290                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3291                 struct msix_entry *entry = &adapter->msix_entries[vector];
3292
3293                 /* free only the irqs that were actually requested */
3294                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3295                         continue;
3296
3297                 /* clear the affinity_mask in the IRQ descriptor */
3298                 irq_set_affinity_hint(entry->vector, NULL);
3299
3300                 free_irq(entry->vector, q_vector);
3301         }
3302
3303         free_irq(adapter->msix_entries[vector].vector, adapter);
3304 }
3305
3306 /**
3307  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3308  * @adapter: board private structure
3309  **/
3310 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3311 {
3312         switch (adapter->hw.mac.type) {
3313         case ixgbe_mac_82598EB:
3314                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3315                 break;
3316         case ixgbe_mac_82599EB:
3317         case ixgbe_mac_X540:
3318         case ixgbe_mac_X550:
3319         case ixgbe_mac_X550EM_x:
3320         case ixgbe_mac_x550em_a:
3321                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3322                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3323                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3324                 break;
3325         default:
3326                 break;
3327         }
3328         IXGBE_WRITE_FLUSH(&adapter->hw);
3329         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3330                 int vector;
3331
3332                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3333                         synchronize_irq(adapter->msix_entries[vector].vector);
3334
3335                 synchronize_irq(adapter->msix_entries[vector++].vector);
3336         } else {
3337                 synchronize_irq(adapter->pdev->irq);
3338         }
3339 }
3340
3341 /**
3342  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3343  *
3344  **/
3345 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3346 {
3347         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3348
3349         ixgbe_write_eitr(q_vector);
3350
3351         ixgbe_set_ivar(adapter, 0, 0, 0);
3352         ixgbe_set_ivar(adapter, 1, 0, 0);
3353
3354         e_info(hw, "Legacy interrupt IVAR setup done\n");
3355 }
3356
3357 /**
3358  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3359  * @adapter: board private structure
3360  * @ring: structure containing ring specific data
3361  *
3362  * Configure the Tx descriptor ring after a reset.
3363  **/
3364 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3365                              struct ixgbe_ring *ring)
3366 {
3367         struct ixgbe_hw *hw = &adapter->hw;
3368         u64 tdba = ring->dma;
3369         int wait_loop = 10;
3370         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3371         u8 reg_idx = ring->reg_idx;
3372
3373         /* disable queue to avoid issues while updating state */
3374         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3375         IXGBE_WRITE_FLUSH(hw);
3376
3377         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3378                         (tdba & DMA_BIT_MASK(32)));
3379         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3380         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3381                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3382         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3383         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3384         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3385
3386         /*
3387          * set WTHRESH to encourage burst writeback, it should not be set
3388          * higher than 1 when:
3389          * - ITR is 0 as it could cause false TX hangs
3390          * - ITR is set to > 100k int/sec and BQL is enabled
3391          *
3392          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3393          * to or less than the number of on chip descriptors, which is
3394          * currently 40.
3395          */
3396         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3397                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3398         else
3399                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3400
3401         /*
3402          * Setting PTHRESH to 32 both improves performance
3403          * and avoids a TX hang with DFP enabled
3404          */
3405         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3406                    32;          /* PTHRESH = 32 */
3407
3408         /* reinitialize flowdirector state */
3409         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3410                 ring->atr_sample_rate = adapter->atr_sample_rate;
3411                 ring->atr_count = 0;
3412                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3413         } else {
3414                 ring->atr_sample_rate = 0;
3415         }
3416
3417         /* initialize XPS */
3418         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3419                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3420
3421                 if (q_vector)
3422                         netif_set_xps_queue(ring->netdev,
3423                                             &q_vector->affinity_mask,
3424                                             ring->queue_index);
3425         }
3426
3427         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3428
3429         /* reinitialize tx_buffer_info */
3430         memset(ring->tx_buffer_info, 0,
3431                sizeof(struct ixgbe_tx_buffer) * ring->count);
3432
3433         /* enable queue */
3434         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3435
3436         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3437         if (hw->mac.type == ixgbe_mac_82598EB &&
3438             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3439                 return;
3440
3441         /* poll to verify queue is enabled */
3442         do {
3443                 usleep_range(1000, 2000);
3444                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3445         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3446         if (!wait_loop)
3447                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3448 }
3449
3450 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3451 {
3452         struct ixgbe_hw *hw = &adapter->hw;
3453         u32 rttdcs, mtqc;
3454         u8 tcs = netdev_get_num_tc(adapter->netdev);
3455
3456         if (hw->mac.type == ixgbe_mac_82598EB)
3457                 return;
3458
3459         /* disable the arbiter while setting MTQC */
3460         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3461         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3462         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3463
3464         /* set transmit pool layout */
3465         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3466                 mtqc = IXGBE_MTQC_VT_ENA;
3467                 if (tcs > 4)
3468                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3469                 else if (tcs > 1)
3470                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3471                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3472                          IXGBE_82599_VMDQ_4Q_MASK)
3473                         mtqc |= IXGBE_MTQC_32VF;
3474                 else
3475                         mtqc |= IXGBE_MTQC_64VF;
3476         } else {
3477                 if (tcs > 4)
3478                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3479                 else if (tcs > 1)
3480                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3481                 else
3482                         mtqc = IXGBE_MTQC_64Q_1PB;
3483         }
3484
3485         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3486
3487         /* Enable Security TX Buffer IFG for multiple pb */
3488         if (tcs) {
3489                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3490                 sectx |= IXGBE_SECTX_DCB;
3491                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3492         }
3493
3494         /* re-enable the arbiter */
3495         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3496         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3497 }
3498
3499 /**
3500  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3501  * @adapter: board private structure
3502  *
3503  * Configure the Tx unit of the MAC after a reset.
3504  **/
3505 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3506 {
3507         struct ixgbe_hw *hw = &adapter->hw;
3508         u32 dmatxctl;
3509         u32 i;
3510
3511         ixgbe_setup_mtqc(adapter);
3512
3513         if (hw->mac.type != ixgbe_mac_82598EB) {
3514                 /* DMATXCTL.EN must be before Tx queues are enabled */
3515                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3516                 dmatxctl |= IXGBE_DMATXCTL_TE;
3517                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3518         }
3519
3520         /* Setup the HW Tx Head and Tail descriptor pointers */
3521         for (i = 0; i < adapter->num_tx_queues; i++)
3522                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3523         for (i = 0; i < adapter->num_xdp_queues; i++)
3524                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3525 }
3526
3527 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3528                                  struct ixgbe_ring *ring)
3529 {
3530         struct ixgbe_hw *hw = &adapter->hw;
3531         u8 reg_idx = ring->reg_idx;
3532         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3533
3534         srrctl |= IXGBE_SRRCTL_DROP_EN;
3535
3536         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3537 }
3538
3539 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3540                                   struct ixgbe_ring *ring)
3541 {
3542         struct ixgbe_hw *hw = &adapter->hw;
3543         u8 reg_idx = ring->reg_idx;
3544         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3545
3546         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3547
3548         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3549 }
3550
3551 #ifdef CONFIG_IXGBE_DCB
3552 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3553 #else
3554 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3555 #endif
3556 {
3557         int i;
3558         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3559
3560         if (adapter->ixgbe_ieee_pfc)
3561                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3562
3563         /*
3564          * We should set the drop enable bit if:
3565          *  SR-IOV is enabled
3566          *   or
3567          *  Number of Rx queues > 1 and flow control is disabled
3568          *
3569          *  This allows us to avoid head of line blocking for security
3570          *  and performance reasons.
3571          */
3572         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3573             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3574                 for (i = 0; i < adapter->num_rx_queues; i++)
3575                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3576         } else {
3577                 for (i = 0; i < adapter->num_rx_queues; i++)
3578                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3579         }
3580 }
3581
3582 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3583
3584 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3585                                    struct ixgbe_ring *rx_ring)
3586 {
3587         struct ixgbe_hw *hw = &adapter->hw;
3588         u32 srrctl;
3589         u8 reg_idx = rx_ring->reg_idx;
3590
3591         if (hw->mac.type == ixgbe_mac_82598EB) {
3592                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3593
3594                 /*
3595                  * if VMDq is not active we must program one srrctl register
3596                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3597                  */
3598                 reg_idx &= mask;
3599         }
3600
3601         /* configure header buffer length, needed for RSC */
3602         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3603
3604         /* configure the packet buffer length */
3605         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3606                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3607         else
3608                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3609
3610         /* configure descriptor type */
3611         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3612
3613         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3614 }
3615
3616 /**
3617  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3618  * @adapter: device handle
3619  *
3620  *  - 82598/82599/X540:     128
3621  *  - X550(non-SRIOV mode): 512
3622  *  - X550(SRIOV mode):     64
3623  */
3624 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3625 {
3626         if (adapter->hw.mac.type < ixgbe_mac_X550)
3627                 return 128;
3628         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3629                 return 64;
3630         else
3631                 return 512;
3632 }
3633
3634 /**
3635  * ixgbe_store_key - Write the RSS key to HW
3636  * @adapter: device handle
3637  *
3638  * Write the RSS key stored in adapter.rss_key to HW.
3639  */
3640 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3641 {
3642         struct ixgbe_hw *hw = &adapter->hw;
3643         int i;
3644
3645         for (i = 0; i < 10; i++)
3646                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3647 }
3648
3649 /**
3650  * ixgbe_init_rss_key - Initialize adapter RSS key
3651  * @adapter: device handle
3652  *
3653  * Allocates and initializes the RSS key if it is not allocated.
3654  **/
3655 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3656 {
3657         u32 *rss_key;
3658
3659         if (!adapter->rss_key) {
3660                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3661                 if (unlikely(!rss_key))
3662                         return -ENOMEM;
3663
3664                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3665                 adapter->rss_key = rss_key;
3666         }
3667
3668         return 0;
3669 }
3670
3671 /**
3672  * ixgbe_store_reta - Write the RETA table to HW
3673  * @adapter: device handle
3674  *
3675  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3676  */
3677 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3678 {
3679         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3680         struct ixgbe_hw *hw = &adapter->hw;
3681         u32 reta = 0;
3682         u32 indices_multi;
3683         u8 *indir_tbl = adapter->rss_indir_tbl;
3684
3685         /* Fill out the redirection table as follows:
3686          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3687          *    indices.
3688          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3689          *  - X550:       8 bit wide entries containing 6 bit RSS index
3690          */
3691         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3692                 indices_multi = 0x11;
3693         else
3694                 indices_multi = 0x1;
3695
3696         /* Write redirection table to HW */
3697         for (i = 0; i < reta_entries; i++) {
3698                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3699                 if ((i & 3) == 3) {
3700                         if (i < 128)
3701                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3702                         else
3703                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3704                                                 reta);
3705                         reta = 0;
3706                 }
3707         }
3708 }
3709
3710 /**
3711  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3712  * @adapter: device handle
3713  *
3714  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3715  */
3716 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3717 {
3718         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3719         struct ixgbe_hw *hw = &adapter->hw;
3720         u32 vfreta = 0;
3721         unsigned int pf_pool = adapter->num_vfs;
3722
3723         /* Write redirection table to HW */
3724         for (i = 0; i < reta_entries; i++) {
3725                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3726                 if ((i & 3) == 3) {
3727                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3728                                         vfreta);
3729                         vfreta = 0;
3730                 }
3731         }
3732 }
3733
3734 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3735 {
3736         u32 i, j;
3737         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3738         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3739
3740         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3741          * make full use of any rings they may have.  We will use the
3742          * PSRTYPE register to control how many rings we use within the PF.
3743          */
3744         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3745                 rss_i = 4;
3746
3747         /* Fill out hash function seeds */
3748         ixgbe_store_key(adapter);
3749
3750         /* Fill out redirection table */
3751         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3752
3753         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3754                 if (j == rss_i)
3755                         j = 0;
3756
3757                 adapter->rss_indir_tbl[i] = j;
3758         }
3759
3760         ixgbe_store_reta(adapter);
3761 }
3762
3763 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3764 {
3765         struct ixgbe_hw *hw = &adapter->hw;
3766         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3767         unsigned int pf_pool = adapter->num_vfs;
3768         int i, j;
3769
3770         /* Fill out hash function seeds */
3771         for (i = 0; i < 10; i++)
3772                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3773                                 *(adapter->rss_key + i));
3774
3775         /* Fill out the redirection table */
3776         for (i = 0, j = 0; i < 64; i++, j++) {
3777                 if (j == rss_i)
3778                         j = 0;
3779
3780                 adapter->rss_indir_tbl[i] = j;
3781         }
3782
3783         ixgbe_store_vfreta(adapter);
3784 }
3785
3786 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3787 {
3788         struct ixgbe_hw *hw = &adapter->hw;
3789         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3790         u32 rxcsum;
3791
3792         /* Disable indicating checksum in descriptor, enables RSS hash */
3793         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3794         rxcsum |= IXGBE_RXCSUM_PCSD;
3795         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3796
3797         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3798                 if (adapter->ring_feature[RING_F_RSS].mask)
3799                         mrqc = IXGBE_MRQC_RSSEN;
3800         } else {
3801                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3802
3803                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3804                         if (tcs > 4)
3805                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3806                         else if (tcs > 1)
3807                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3808                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3809                                  IXGBE_82599_VMDQ_4Q_MASK)
3810                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3811                         else
3812                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3813
3814                         /* Enable L3/L4 for Tx Switched packets */
3815                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3816                 } else {
3817                         if (tcs > 4)
3818                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3819                         else if (tcs > 1)
3820                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3821                         else
3822                                 mrqc = IXGBE_MRQC_RSSEN;
3823                 }
3824         }
3825
3826         /* Perform hash on these packet types */
3827         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3828                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3829                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3830                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3831
3832         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3833                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3834         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3835                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3836
3837         if ((hw->mac.type >= ixgbe_mac_X550) &&
3838             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3839                 unsigned int pf_pool = adapter->num_vfs;
3840
3841                 /* Enable VF RSS mode */
3842                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3843                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3844
3845                 /* Setup RSS through the VF registers */
3846                 ixgbe_setup_vfreta(adapter);
3847                 vfmrqc = IXGBE_MRQC_RSSEN;
3848                 vfmrqc |= rss_field;
3849                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3850         } else {
3851                 ixgbe_setup_reta(adapter);
3852                 mrqc |= rss_field;
3853                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3854         }
3855 }
3856
3857 /**
3858  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3859  * @adapter:    address of board private structure
3860  * @index:      index of ring to set
3861  **/
3862 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3863                                    struct ixgbe_ring *ring)
3864 {
3865         struct ixgbe_hw *hw = &adapter->hw;
3866         u32 rscctrl;
3867         u8 reg_idx = ring->reg_idx;
3868
3869         if (!ring_is_rsc_enabled(ring))
3870                 return;
3871
3872         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3873         rscctrl |= IXGBE_RSCCTL_RSCEN;
3874         /*
3875          * we must limit the number of descriptors so that the
3876          * total size of max desc * buf_len is not greater
3877          * than 65536
3878          */
3879         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3880         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3881 }
3882
3883 #define IXGBE_MAX_RX_DESC_POLL 10
3884 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3885                                        struct ixgbe_ring *ring)
3886 {
3887         struct ixgbe_hw *hw = &adapter->hw;
3888         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3889         u32 rxdctl;
3890         u8 reg_idx = ring->reg_idx;
3891
3892         if (ixgbe_removed(hw->hw_addr))
3893                 return;
3894         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3895         if (hw->mac.type == ixgbe_mac_82598EB &&
3896             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3897                 return;
3898
3899         do {
3900                 usleep_range(1000, 2000);
3901                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3902         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3903
3904         if (!wait_loop) {
3905                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3906                       "the polling period\n", reg_idx);
3907         }
3908 }
3909
3910 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3911                             struct ixgbe_ring *ring)
3912 {
3913         struct ixgbe_hw *hw = &adapter->hw;
3914         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3915         u32 rxdctl;
3916         u8 reg_idx = ring->reg_idx;
3917
3918         if (ixgbe_removed(hw->hw_addr))
3919                 return;
3920         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3921         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3922
3923         /* write value back with RXDCTL.ENABLE bit cleared */
3924         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3925
3926         if (hw->mac.type == ixgbe_mac_82598EB &&
3927             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3928                 return;
3929
3930         /* the hardware may take up to 100us to really disable the rx queue */
3931         do {
3932                 udelay(10);
3933                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3934         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3935
3936         if (!wait_loop) {
3937                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3938                       "the polling period\n", reg_idx);
3939         }
3940 }
3941
3942 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3943                              struct ixgbe_ring *ring)
3944 {
3945         struct ixgbe_hw *hw = &adapter->hw;
3946         union ixgbe_adv_rx_desc *rx_desc;
3947         u64 rdba = ring->dma;
3948         u32 rxdctl;
3949         u8 reg_idx = ring->reg_idx;
3950
3951         /* disable queue to avoid issues while updating state */
3952         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3953         ixgbe_disable_rx_queue(adapter, ring);
3954
3955         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3956         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3957         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3958                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3959         /* Force flushing of IXGBE_RDLEN to prevent MDD */
3960         IXGBE_WRITE_FLUSH(hw);
3961
3962         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3963         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3964         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3965
3966         ixgbe_configure_srrctl(adapter, ring);
3967         ixgbe_configure_rscctl(adapter, ring);
3968
3969         if (hw->mac.type == ixgbe_mac_82598EB) {
3970                 /*
3971                  * enable cache line friendly hardware writes:
3972                  * PTHRESH=32 descriptors (half the internal cache),
3973                  * this also removes ugly rx_no_buffer_count increment
3974                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3975                  * WTHRESH=8 burst writeback up to two cache lines
3976                  */
3977                 rxdctl &= ~0x3FFFFF;
3978                 rxdctl |=  0x080420;
3979 #if (PAGE_SIZE < 8192)
3980         } else {
3981                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
3982                             IXGBE_RXDCTL_RLPML_EN);
3983
3984                 /* Limit the maximum frame size so we don't overrun the skb */
3985                 if (ring_uses_build_skb(ring) &&
3986                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
3987                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
3988                                   IXGBE_RXDCTL_RLPML_EN;
3989 #endif
3990         }
3991
3992         /* initialize rx_buffer_info */
3993         memset(ring->rx_buffer_info, 0,
3994                sizeof(struct ixgbe_rx_buffer) * ring->count);
3995
3996         /* initialize Rx descriptor 0 */
3997         rx_desc = IXGBE_RX_DESC(ring, 0);
3998         rx_desc->wb.upper.length = 0;
3999
4000         /* enable receive descriptor ring */
4001         rxdctl |= IXGBE_RXDCTL_ENABLE;
4002         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4003
4004         ixgbe_rx_desc_queue_enable(adapter, ring);
4005         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4006 }
4007
4008 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4009 {
4010         struct ixgbe_hw *hw = &adapter->hw;
4011         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4012         u16 pool;
4013
4014         /* PSRTYPE must be initialized in non 82598 adapters */
4015         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4016                       IXGBE_PSRTYPE_UDPHDR |
4017                       IXGBE_PSRTYPE_IPV4HDR |
4018                       IXGBE_PSRTYPE_L2HDR |
4019                       IXGBE_PSRTYPE_IPV6HDR;
4020
4021         if (hw->mac.type == ixgbe_mac_82598EB)
4022                 return;
4023
4024         if (rss_i > 3)
4025                 psrtype |= 2u << 29;
4026         else if (rss_i > 1)
4027                 psrtype |= 1u << 29;
4028
4029         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
4030                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4031 }
4032
4033 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4034 {
4035         struct ixgbe_hw *hw = &adapter->hw;
4036         u32 reg_offset, vf_shift;
4037         u32 gcr_ext, vmdctl;
4038         int i;
4039
4040         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4041                 return;
4042
4043         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4044         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4045         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4046         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4047         vmdctl |= IXGBE_VT_CTL_REPLEN;
4048         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4049
4050         vf_shift = VMDQ_P(0) % 32;
4051         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4052
4053         /* Enable only the PF's pool for Tx/Rx */
4054         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4055         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4056         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4057         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4058         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4059                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4060
4061         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4062         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4063
4064         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4065         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4066
4067         /*
4068          * Set up VF register offsets for selected VT Mode,
4069          * i.e. 32 or 64 VFs for SR-IOV
4070          */
4071         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4072         case IXGBE_82599_VMDQ_8Q_MASK:
4073                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4074                 break;
4075         case IXGBE_82599_VMDQ_4Q_MASK:
4076                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4077                 break;
4078         default:
4079                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4080                 break;
4081         }
4082
4083         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4084
4085         for (i = 0; i < adapter->num_vfs; i++) {
4086                 /* configure spoof checking */
4087                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4088                                           adapter->vfinfo[i].spoofchk_enabled);
4089
4090                 /* Enable/Disable RSS query feature  */
4091                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4092                                           adapter->vfinfo[i].rss_query_enabled);
4093         }
4094 }
4095
4096 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4097 {
4098         struct ixgbe_hw *hw = &adapter->hw;
4099         struct net_device *netdev = adapter->netdev;
4100         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4101         struct ixgbe_ring *rx_ring;
4102         int i;
4103         u32 mhadd, hlreg0;
4104
4105 #ifdef IXGBE_FCOE
4106         /* adjust max frame to be able to do baby jumbo for FCoE */
4107         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4108             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4109                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4110
4111 #endif /* IXGBE_FCOE */
4112
4113         /* adjust max frame to be at least the size of a standard frame */
4114         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4115                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4116
4117         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4118         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4119                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4120                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4121
4122                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4123         }
4124
4125         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4126         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4127         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4128         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4129
4130         /*
4131          * Setup the HW Rx Head and Tail Descriptor Pointers and
4132          * the Base and Length of the Rx Descriptor Ring
4133          */
4134         for (i = 0; i < adapter->num_rx_queues; i++) {
4135                 rx_ring = adapter->rx_ring[i];
4136
4137                 clear_ring_rsc_enabled(rx_ring);
4138                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4139                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4140
4141                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4142                         set_ring_rsc_enabled(rx_ring);
4143
4144                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4145                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4146
4147                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4148                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4149                         continue;
4150
4151                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4152
4153 #if (PAGE_SIZE < 8192)
4154                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4155                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4156
4157                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4158                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4159                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4160 #endif
4161         }
4162 }
4163
4164 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4165 {
4166         struct ixgbe_hw *hw = &adapter->hw;
4167         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4168
4169         switch (hw->mac.type) {
4170         case ixgbe_mac_82598EB:
4171                 /*
4172                  * For VMDq support of different descriptor types or
4173                  * buffer sizes through the use of multiple SRRCTL
4174                  * registers, RDRXCTL.MVMEN must be set to 1
4175                  *
4176                  * also, the manual doesn't mention it clearly but DCA hints
4177                  * will only use queue 0's tags unless this bit is set.  Side
4178                  * effects of setting this bit are only that SRRCTL must be
4179                  * fully programmed [0..15]
4180                  */
4181                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4182                 break;
4183         case ixgbe_mac_X550:
4184         case ixgbe_mac_X550EM_x:
4185         case ixgbe_mac_x550em_a:
4186                 if (adapter->num_vfs)
4187                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4188                 /* fall through */
4189         case ixgbe_mac_82599EB:
4190         case ixgbe_mac_X540:
4191                 /* Disable RSC for ACK packets */
4192                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4193                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4194                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4195                 /* hardware requires some bits to be set by default */
4196                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4197                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4198                 break;
4199         default:
4200                 /* We should do nothing since we don't know this hardware */
4201                 return;
4202         }
4203
4204         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4205 }
4206
4207 /**
4208  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4209  * @adapter: board private structure
4210  *
4211  * Configure the Rx unit of the MAC after a reset.
4212  **/
4213 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4214 {
4215         struct ixgbe_hw *hw = &adapter->hw;
4216         int i;
4217         u32 rxctrl, rfctl;
4218
4219         /* disable receives while setting up the descriptors */
4220         hw->mac.ops.disable_rx(hw);
4221
4222         ixgbe_setup_psrtype(adapter);
4223         ixgbe_setup_rdrxctl(adapter);
4224
4225         /* RSC Setup */
4226         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4227         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4228         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4229                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4230
4231         /* disable NFS filtering */
4232         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4233         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4234
4235         /* Program registers for the distribution of queues */
4236         ixgbe_setup_mrqc(adapter);
4237
4238         /* set_rx_buffer_len must be called before ring initialization */
4239         ixgbe_set_rx_buffer_len(adapter);
4240
4241         /*
4242          * Setup the HW Rx Head and Tail Descriptor Pointers and
4243          * the Base and Length of the Rx Descriptor Ring
4244          */
4245         for (i = 0; i < adapter->num_rx_queues; i++)
4246                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4247
4248         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4249         /* disable drop enable for 82598 parts */
4250         if (hw->mac.type == ixgbe_mac_82598EB)
4251                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4252
4253         /* enable all receives */
4254         rxctrl |= IXGBE_RXCTRL_RXEN;
4255         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4256 }
4257
4258 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4259                                  __be16 proto, u16 vid)
4260 {
4261         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4262         struct ixgbe_hw *hw = &adapter->hw;
4263
4264         /* add VID to filter table */
4265         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4266                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4267
4268         set_bit(vid, adapter->active_vlans);
4269
4270         return 0;
4271 }
4272
4273 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4274 {
4275         u32 vlvf;
4276         int idx;
4277
4278         /* short cut the special case */
4279         if (vlan == 0)
4280                 return 0;
4281
4282         /* Search for the vlan id in the VLVF entries */
4283         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4284                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4285                 if ((vlvf & VLAN_VID_MASK) == vlan)
4286                         break;
4287         }
4288
4289         return idx;
4290 }
4291
4292 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4293 {
4294         struct ixgbe_hw *hw = &adapter->hw;
4295         u32 bits, word;
4296         int idx;
4297
4298         idx = ixgbe_find_vlvf_entry(hw, vid);
4299         if (!idx)
4300                 return;
4301
4302         /* See if any other pools are set for this VLAN filter
4303          * entry other than the PF.
4304          */
4305         word = idx * 2 + (VMDQ_P(0) / 32);
4306         bits = ~BIT(VMDQ_P(0) % 32);
4307         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4308
4309         /* Disable the filter so this falls into the default pool. */
4310         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4311                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4312                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4313                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4314         }
4315 }
4316
4317 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4318                                   __be16 proto, u16 vid)
4319 {
4320         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4321         struct ixgbe_hw *hw = &adapter->hw;
4322
4323         /* remove VID from filter table */
4324         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4325                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4326
4327         clear_bit(vid, adapter->active_vlans);
4328
4329         return 0;
4330 }
4331
4332 /**
4333  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4334  * @adapter: driver data
4335  */
4336 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4337 {
4338         struct ixgbe_hw *hw = &adapter->hw;
4339         u32 vlnctrl;
4340         int i, j;
4341
4342         switch (hw->mac.type) {
4343         case ixgbe_mac_82598EB:
4344                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4345                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4346                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4347                 break;
4348         case ixgbe_mac_82599EB:
4349         case ixgbe_mac_X540:
4350         case ixgbe_mac_X550:
4351         case ixgbe_mac_X550EM_x:
4352         case ixgbe_mac_x550em_a:
4353                 for (i = 0; i < adapter->num_rx_queues; i++) {
4354                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4355
4356                         if (ring->l2_accel_priv)
4357                                 continue;
4358                         j = ring->reg_idx;
4359                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4360                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4361                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4362                 }
4363                 break;
4364         default:
4365                 break;
4366         }
4367 }
4368
4369 /**
4370  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4371  * @adapter: driver data
4372  */
4373 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4374 {
4375         struct ixgbe_hw *hw = &adapter->hw;
4376         u32 vlnctrl;
4377         int i, j;
4378
4379         switch (hw->mac.type) {
4380         case ixgbe_mac_82598EB:
4381                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4382                 vlnctrl |= IXGBE_VLNCTRL_VME;
4383                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4384                 break;
4385         case ixgbe_mac_82599EB:
4386         case ixgbe_mac_X540:
4387         case ixgbe_mac_X550:
4388         case ixgbe_mac_X550EM_x:
4389         case ixgbe_mac_x550em_a:
4390                 for (i = 0; i < adapter->num_rx_queues; i++) {
4391                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4392
4393                         if (ring->l2_accel_priv)
4394                                 continue;
4395                         j = ring->reg_idx;
4396                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4397                         vlnctrl |= IXGBE_RXDCTL_VME;
4398                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4399                 }
4400                 break;
4401         default:
4402                 break;
4403         }
4404 }
4405
4406 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4407 {
4408         struct ixgbe_hw *hw = &adapter->hw;
4409         u32 vlnctrl, i;
4410
4411         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4412
4413         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4414         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4415                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4416                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4417         } else {
4418                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4419                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4420                 return;
4421         }
4422
4423         /* Nothing to do for 82598 */
4424         if (hw->mac.type == ixgbe_mac_82598EB)
4425                 return;
4426
4427         /* We are already in VLAN promisc, nothing to do */
4428         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4429                 return;
4430
4431         /* Set flag so we don't redo unnecessary work */
4432         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4433
4434         /* Add PF to all active pools */
4435         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4436                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4437                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4438
4439                 vlvfb |= BIT(VMDQ_P(0) % 32);
4440                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4441         }
4442
4443         /* Set all bits in the VLAN filter table array */
4444         for (i = hw->mac.vft_size; i--;)
4445                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4446 }
4447
4448 #define VFTA_BLOCK_SIZE 8
4449 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4450 {
4451         struct ixgbe_hw *hw = &adapter->hw;
4452         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4453         u32 vid_start = vfta_offset * 32;
4454         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4455         u32 i, vid, word, bits;
4456
4457         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4458                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4459
4460                 /* pull VLAN ID from VLVF */
4461                 vid = vlvf & VLAN_VID_MASK;
4462
4463                 /* only concern outselves with a certain range */
4464                 if (vid < vid_start || vid >= vid_end)
4465                         continue;
4466
4467                 if (vlvf) {
4468                         /* record VLAN ID in VFTA */
4469                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4470
4471                         /* if PF is part of this then continue */
4472                         if (test_bit(vid, adapter->active_vlans))
4473                                 continue;
4474                 }
4475
4476                 /* remove PF from the pool */
4477                 word = i * 2 + VMDQ_P(0) / 32;
4478                 bits = ~BIT(VMDQ_P(0) % 32);
4479                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4480                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4481         }
4482
4483         /* extract values from active_vlans and write back to VFTA */
4484         for (i = VFTA_BLOCK_SIZE; i--;) {
4485                 vid = (vfta_offset + i) * 32;
4486                 word = vid / BITS_PER_LONG;
4487                 bits = vid % BITS_PER_LONG;
4488
4489                 vfta[i] |= adapter->active_vlans[word] >> bits;
4490
4491                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4492         }
4493 }
4494
4495 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4496 {
4497         struct ixgbe_hw *hw = &adapter->hw;
4498         u32 vlnctrl, i;
4499
4500         /* Set VLAN filtering to enabled */
4501         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4502         vlnctrl |= IXGBE_VLNCTRL_VFE;
4503         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4504
4505         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4506             hw->mac.type == ixgbe_mac_82598EB)
4507                 return;
4508
4509         /* We are not in VLAN promisc, nothing to do */
4510         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4511                 return;
4512
4513         /* Set flag so we don't redo unnecessary work */
4514         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4515
4516         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4517                 ixgbe_scrub_vfta(adapter, i);
4518 }
4519
4520 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4521 {
4522         u16 vid = 1;
4523
4524         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4525
4526         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4527                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4528 }
4529
4530 /**
4531  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4532  * @netdev: network interface device structure
4533  *
4534  * Writes multicast address list to the MTA hash table.
4535  * Returns: -ENOMEM on failure
4536  *                0 on no addresses written
4537  *                X on writing X addresses to MTA
4538  **/
4539 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4540 {
4541         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4542         struct ixgbe_hw *hw = &adapter->hw;
4543
4544         if (!netif_running(netdev))
4545                 return 0;
4546
4547         if (hw->mac.ops.update_mc_addr_list)
4548                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4549         else
4550                 return -ENOMEM;
4551
4552 #ifdef CONFIG_PCI_IOV
4553         ixgbe_restore_vf_multicasts(adapter);
4554 #endif
4555
4556         return netdev_mc_count(netdev);
4557 }
4558
4559 #ifdef CONFIG_PCI_IOV
4560 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4561 {
4562         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4563         struct ixgbe_hw *hw = &adapter->hw;
4564         int i;
4565
4566         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4567                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4568
4569                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4570                         hw->mac.ops.set_rar(hw, i,
4571                                             mac_table->addr,
4572                                             mac_table->pool,
4573                                             IXGBE_RAH_AV);
4574                 else
4575                         hw->mac.ops.clear_rar(hw, i);
4576         }
4577 }
4578
4579 #endif
4580 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4581 {
4582         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4583         struct ixgbe_hw *hw = &adapter->hw;
4584         int i;
4585
4586         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4587                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4588                         continue;
4589
4590                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4591
4592                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4593                         hw->mac.ops.set_rar(hw, i,
4594                                             mac_table->addr,
4595                                             mac_table->pool,
4596                                             IXGBE_RAH_AV);
4597                 else
4598                         hw->mac.ops.clear_rar(hw, i);
4599         }
4600 }
4601
4602 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4603 {
4604         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4605         struct ixgbe_hw *hw = &adapter->hw;
4606         int i;
4607
4608         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4609                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4610                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4611         }
4612
4613         ixgbe_sync_mac_table(adapter);
4614 }
4615
4616 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4617 {
4618         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4619         struct ixgbe_hw *hw = &adapter->hw;
4620         int i, count = 0;
4621
4622         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4623                 /* do not count default RAR as available */
4624                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4625                         continue;
4626
4627                 /* only count unused and addresses that belong to us */
4628                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4629                         if (mac_table->pool != pool)
4630                                 continue;
4631                 }
4632
4633                 count++;
4634         }
4635
4636         return count;
4637 }
4638
4639 /* this function destroys the first RAR entry */
4640 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4641 {
4642         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4643         struct ixgbe_hw *hw = &adapter->hw;
4644
4645         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4646         mac_table->pool = VMDQ_P(0);
4647
4648         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4649
4650         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4651                             IXGBE_RAH_AV);
4652 }
4653
4654 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4655                          const u8 *addr, u16 pool)
4656 {
4657         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4658         struct ixgbe_hw *hw = &adapter->hw;
4659         int i;
4660
4661         if (is_zero_ether_addr(addr))
4662                 return -EINVAL;
4663
4664         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4665                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4666                         continue;
4667
4668                 ether_addr_copy(mac_table->addr, addr);
4669                 mac_table->pool = pool;
4670
4671                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4672                                     IXGBE_MAC_STATE_IN_USE;
4673
4674                 ixgbe_sync_mac_table(adapter);
4675
4676                 return i;
4677         }
4678
4679         return -ENOMEM;
4680 }
4681
4682 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4683                          const u8 *addr, u16 pool)
4684 {
4685         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4686         struct ixgbe_hw *hw = &adapter->hw;
4687         int i;
4688
4689         if (is_zero_ether_addr(addr))
4690                 return -EINVAL;
4691
4692         /* search table for addr, if found clear IN_USE flag and sync */
4693         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4694                 /* we can only delete an entry if it is in use */
4695                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4696                         continue;
4697                 /* we only care about entries that belong to the given pool */
4698                 if (mac_table->pool != pool)
4699                         continue;
4700                 /* we only care about a specific MAC address */
4701                 if (!ether_addr_equal(addr, mac_table->addr))
4702                         continue;
4703
4704                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4705                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4706
4707                 ixgbe_sync_mac_table(adapter);
4708
4709                 return 0;
4710         }
4711
4712         return -ENOMEM;
4713 }
4714 /**
4715  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4716  * @netdev: network interface device structure
4717  *
4718  * Writes unicast address list to the RAR table.
4719  * Returns: -ENOMEM on failure/insufficient address space
4720  *                0 on no addresses written
4721  *                X on writing X addresses to the RAR table
4722  **/
4723 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4724 {
4725         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4726         int count = 0;
4727
4728         /* return ENOMEM indicating insufficient memory for addresses */
4729         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4730                 return -ENOMEM;
4731
4732         if (!netdev_uc_empty(netdev)) {
4733                 struct netdev_hw_addr *ha;
4734                 netdev_for_each_uc_addr(ha, netdev) {
4735                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4736                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4737                         count++;
4738                 }
4739         }
4740         return count;
4741 }
4742
4743 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4744 {
4745         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4746         int ret;
4747
4748         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4749
4750         return min_t(int, ret, 0);
4751 }
4752
4753 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4754 {
4755         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4756
4757         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4758
4759         return 0;
4760 }
4761
4762 /**
4763  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4764  * @netdev: network interface device structure
4765  *
4766  * The set_rx_method entry point is called whenever the unicast/multicast
4767  * address list or the network interface flags are updated.  This routine is
4768  * responsible for configuring the hardware for proper unicast, multicast and
4769  * promiscuous mode.
4770  **/
4771 void ixgbe_set_rx_mode(struct net_device *netdev)
4772 {
4773         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4774         struct ixgbe_hw *hw = &adapter->hw;
4775         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4776         netdev_features_t features = netdev->features;
4777         int count;
4778
4779         /* Check for Promiscuous and All Multicast modes */
4780         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4781
4782         /* set all bits that we expect to always be set */
4783         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4784         fctrl |= IXGBE_FCTRL_BAM;
4785         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4786         fctrl |= IXGBE_FCTRL_PMCF;
4787
4788         /* clear the bits we are changing the status of */
4789         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4790         if (netdev->flags & IFF_PROMISC) {
4791                 hw->addr_ctrl.user_set_promisc = true;
4792                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4793                 vmolr |= IXGBE_VMOLR_MPE;
4794                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4795         } else {
4796                 if (netdev->flags & IFF_ALLMULTI) {
4797                         fctrl |= IXGBE_FCTRL_MPE;
4798                         vmolr |= IXGBE_VMOLR_MPE;
4799                 }
4800                 hw->addr_ctrl.user_set_promisc = false;
4801         }
4802
4803         /*
4804          * Write addresses to available RAR registers, if there is not
4805          * sufficient space to store all the addresses then enable
4806          * unicast promiscuous mode
4807          */
4808         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4809                 fctrl |= IXGBE_FCTRL_UPE;
4810                 vmolr |= IXGBE_VMOLR_ROPE;
4811         }
4812
4813         /* Write addresses to the MTA, if the attempt fails
4814          * then we should just turn on promiscuous mode so
4815          * that we can at least receive multicast traffic
4816          */
4817         count = ixgbe_write_mc_addr_list(netdev);
4818         if (count < 0) {
4819                 fctrl |= IXGBE_FCTRL_MPE;
4820                 vmolr |= IXGBE_VMOLR_MPE;
4821         } else if (count) {
4822                 vmolr |= IXGBE_VMOLR_ROMPE;
4823         }
4824
4825         if (hw->mac.type != ixgbe_mac_82598EB) {
4826                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4827                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4828                            IXGBE_VMOLR_ROPE);
4829                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4830         }
4831
4832         /* This is useful for sniffing bad packets. */
4833         if (features & NETIF_F_RXALL) {
4834                 /* UPE and MPE will be handled by normal PROMISC logic
4835                  * in e1000e_set_rx_mode */
4836                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4837                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4838                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4839
4840                 fctrl &= ~(IXGBE_FCTRL_DPF);
4841                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4842         }
4843
4844         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4845
4846         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4847                 ixgbe_vlan_strip_enable(adapter);
4848         else
4849                 ixgbe_vlan_strip_disable(adapter);
4850
4851         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4852                 ixgbe_vlan_promisc_disable(adapter);
4853         else
4854                 ixgbe_vlan_promisc_enable(adapter);
4855 }
4856
4857 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4858 {
4859         int q_idx;
4860
4861         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4862                 napi_enable(&adapter->q_vector[q_idx]->napi);
4863 }
4864
4865 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4866 {
4867         int q_idx;
4868
4869         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4870                 napi_disable(&adapter->q_vector[q_idx]->napi);
4871 }
4872
4873 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4874 {
4875         struct ixgbe_hw *hw = &adapter->hw;
4876         u32 vxlanctrl;
4877
4878         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4879                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4880                 return;
4881
4882         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4883         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4884
4885         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4886                 adapter->vxlan_port = 0;
4887
4888         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4889                 adapter->geneve_port = 0;
4890 }
4891
4892 #ifdef CONFIG_IXGBE_DCB
4893 /**
4894  * ixgbe_configure_dcb - Configure DCB hardware
4895  * @adapter: ixgbe adapter struct
4896  *
4897  * This is called by the driver on open to configure the DCB hardware.
4898  * This is also called by the gennetlink interface when reconfiguring
4899  * the DCB state.
4900  */
4901 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4902 {
4903         struct ixgbe_hw *hw = &adapter->hw;
4904         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4905
4906         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4907                 if (hw->mac.type == ixgbe_mac_82598EB)
4908                         netif_set_gso_max_size(adapter->netdev, 65536);
4909                 return;
4910         }
4911
4912         if (hw->mac.type == ixgbe_mac_82598EB)
4913                 netif_set_gso_max_size(adapter->netdev, 32768);
4914
4915 #ifdef IXGBE_FCOE
4916         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4917                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4918 #endif
4919
4920         /* reconfigure the hardware */
4921         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4922                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4923                                                 DCB_TX_CONFIG);
4924                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4925                                                 DCB_RX_CONFIG);
4926                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4927         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4928                 ixgbe_dcb_hw_ets(&adapter->hw,
4929                                  adapter->ixgbe_ieee_ets,
4930                                  max_frame);
4931                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4932                                         adapter->ixgbe_ieee_pfc->pfc_en,
4933                                         adapter->ixgbe_ieee_ets->prio_tc);
4934         }
4935
4936         /* Enable RSS Hash per TC */
4937         if (hw->mac.type != ixgbe_mac_82598EB) {
4938                 u32 msb = 0;
4939                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4940
4941                 while (rss_i) {
4942                         msb++;
4943                         rss_i >>= 1;
4944                 }
4945
4946                 /* write msb to all 8 TCs in one write */
4947                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4948         }
4949 }
4950 #endif
4951
4952 /* Additional bittime to account for IXGBE framing */
4953 #define IXGBE_ETH_FRAMING 20
4954
4955 /**
4956  * ixgbe_hpbthresh - calculate high water mark for flow control
4957  *
4958  * @adapter: board private structure to calculate for
4959  * @pb: packet buffer to calculate
4960  */
4961 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4962 {
4963         struct ixgbe_hw *hw = &adapter->hw;
4964         struct net_device *dev = adapter->netdev;
4965         int link, tc, kb, marker;
4966         u32 dv_id, rx_pba;
4967
4968         /* Calculate max LAN frame size */
4969         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4970
4971 #ifdef IXGBE_FCOE
4972         /* FCoE traffic class uses FCOE jumbo frames */
4973         if ((dev->features & NETIF_F_FCOE_MTU) &&
4974             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4975             (pb == ixgbe_fcoe_get_tc(adapter)))
4976                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4977 #endif
4978
4979         /* Calculate delay value for device */
4980         switch (hw->mac.type) {
4981         case ixgbe_mac_X540:
4982         case ixgbe_mac_X550:
4983         case ixgbe_mac_X550EM_x:
4984         case ixgbe_mac_x550em_a:
4985                 dv_id = IXGBE_DV_X540(link, tc);
4986                 break;
4987         default:
4988                 dv_id = IXGBE_DV(link, tc);
4989                 break;
4990         }
4991
4992         /* Loopback switch introduces additional latency */
4993         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4994                 dv_id += IXGBE_B2BT(tc);
4995
4996         /* Delay value is calculated in bit times convert to KB */
4997         kb = IXGBE_BT2KB(dv_id);
4998         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4999
5000         marker = rx_pba - kb;
5001
5002         /* It is possible that the packet buffer is not large enough
5003          * to provide required headroom. In this case throw an error
5004          * to user and a do the best we can.
5005          */
5006         if (marker < 0) {
5007                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5008                             "headroom to support flow control."
5009                             "Decrease MTU or number of traffic classes\n", pb);
5010                 marker = tc + 1;
5011         }
5012
5013         return marker;
5014 }
5015
5016 /**
5017  * ixgbe_lpbthresh - calculate low water mark for for flow control
5018  *
5019  * @adapter: board private structure to calculate for
5020  * @pb: packet buffer to calculate
5021  */
5022 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5023 {
5024         struct ixgbe_hw *hw = &adapter->hw;
5025         struct net_device *dev = adapter->netdev;
5026         int tc;
5027         u32 dv_id;
5028
5029         /* Calculate max LAN frame size */
5030         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5031
5032 #ifdef IXGBE_FCOE
5033         /* FCoE traffic class uses FCOE jumbo frames */
5034         if ((dev->features & NETIF_F_FCOE_MTU) &&
5035             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5036             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5037                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5038 #endif
5039
5040         /* Calculate delay value for device */
5041         switch (hw->mac.type) {
5042         case ixgbe_mac_X540:
5043         case ixgbe_mac_X550:
5044         case ixgbe_mac_X550EM_x:
5045         case ixgbe_mac_x550em_a:
5046                 dv_id = IXGBE_LOW_DV_X540(tc);
5047                 break;
5048         default:
5049                 dv_id = IXGBE_LOW_DV(tc);
5050                 break;
5051         }
5052
5053         /* Delay value is calculated in bit times convert to KB */
5054         return IXGBE_BT2KB(dv_id);
5055 }
5056
5057 /*
5058  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5059  */
5060 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5061 {
5062         struct ixgbe_hw *hw = &adapter->hw;
5063         int num_tc = netdev_get_num_tc(adapter->netdev);
5064         int i;
5065
5066         if (!num_tc)
5067                 num_tc = 1;
5068
5069         for (i = 0; i < num_tc; i++) {
5070                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5071                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5072
5073                 /* Low water marks must not be larger than high water marks */
5074                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5075                         hw->fc.low_water[i] = 0;
5076         }
5077
5078         for (; i < MAX_TRAFFIC_CLASS; i++)
5079                 hw->fc.high_water[i] = 0;
5080 }
5081
5082 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5083 {
5084         struct ixgbe_hw *hw = &adapter->hw;
5085         int hdrm;
5086         u8 tc = netdev_get_num_tc(adapter->netdev);
5087
5088         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5089             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5090                 hdrm = 32 << adapter->fdir_pballoc;
5091         else
5092                 hdrm = 0;
5093
5094         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5095         ixgbe_pbthresh_setup(adapter);
5096 }
5097
5098 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5099 {
5100         struct ixgbe_hw *hw = &adapter->hw;
5101         struct hlist_node *node2;
5102         struct ixgbe_fdir_filter *filter;
5103
5104         spin_lock(&adapter->fdir_perfect_lock);
5105
5106         if (!hlist_empty(&adapter->fdir_filter_list))
5107                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5108
5109         hlist_for_each_entry_safe(filter, node2,
5110                                   &adapter->fdir_filter_list, fdir_node) {
5111                 ixgbe_fdir_write_perfect_filter_82599(hw,
5112                                 &filter->filter,
5113                                 filter->sw_idx,
5114                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5115                                 IXGBE_FDIR_DROP_QUEUE :
5116                                 adapter->rx_ring[filter->action]->reg_idx);
5117         }
5118
5119         spin_unlock(&adapter->fdir_perfect_lock);
5120 }
5121
5122 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
5123                                       struct ixgbe_adapter *adapter)
5124 {
5125         struct ixgbe_hw *hw = &adapter->hw;
5126         u32 vmolr;
5127
5128         /* No unicast promiscuous support for VMDQ devices. */
5129         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
5130         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
5131
5132         /* clear the affected bit */
5133         vmolr &= ~IXGBE_VMOLR_MPE;
5134
5135         if (dev->flags & IFF_ALLMULTI) {
5136                 vmolr |= IXGBE_VMOLR_MPE;
5137         } else {
5138                 vmolr |= IXGBE_VMOLR_ROMPE;
5139                 hw->mac.ops.update_mc_addr_list(hw, dev);
5140         }
5141         ixgbe_write_uc_addr_list(adapter->netdev, pool);
5142         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
5143 }
5144
5145 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
5146 {
5147         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5148         int rss_i = adapter->num_rx_queues_per_pool;
5149         struct ixgbe_hw *hw = &adapter->hw;
5150         u16 pool = vadapter->pool;
5151         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
5152                       IXGBE_PSRTYPE_UDPHDR |
5153                       IXGBE_PSRTYPE_IPV4HDR |
5154                       IXGBE_PSRTYPE_L2HDR |
5155                       IXGBE_PSRTYPE_IPV6HDR;
5156
5157         if (hw->mac.type == ixgbe_mac_82598EB)
5158                 return;
5159
5160         if (rss_i > 3)
5161                 psrtype |= 2u << 29;
5162         else if (rss_i > 1)
5163                 psrtype |= 1u << 29;
5164
5165         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
5166 }
5167
5168 /**
5169  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5170  * @rx_ring: ring to free buffers from
5171  **/
5172 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5173 {
5174         u16 i = rx_ring->next_to_clean;
5175         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5176
5177         /* Free all the Rx ring sk_buffs */
5178         while (i != rx_ring->next_to_alloc) {
5179                 if (rx_buffer->skb) {
5180                         struct sk_buff *skb = rx_buffer->skb;
5181                         if (IXGBE_CB(skb)->page_released)
5182                                 dma_unmap_page_attrs(rx_ring->dev,
5183                                                      IXGBE_CB(skb)->dma,
5184                                                      ixgbe_rx_pg_size(rx_ring),
5185                                                      DMA_FROM_DEVICE,
5186                                                      IXGBE_RX_DMA_ATTR);
5187                         dev_kfree_skb(skb);
5188                 }
5189
5190                 /* Invalidate cache lines that may have been written to by
5191                  * device so that we avoid corrupting memory.
5192                  */
5193                 dma_sync_single_range_for_cpu(rx_ring->dev,
5194                                               rx_buffer->dma,
5195                                               rx_buffer->page_offset,
5196                                               ixgbe_rx_bufsz(rx_ring),
5197                                               DMA_FROM_DEVICE);
5198
5199                 /* free resources associated with mapping */
5200                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5201                                      ixgbe_rx_pg_size(rx_ring),
5202                                      DMA_FROM_DEVICE,
5203                                      IXGBE_RX_DMA_ATTR);
5204                 __page_frag_cache_drain(rx_buffer->page,
5205                                         rx_buffer->pagecnt_bias);
5206
5207                 i++;
5208                 rx_buffer++;
5209                 if (i == rx_ring->count) {
5210                         i = 0;
5211                         rx_buffer = rx_ring->rx_buffer_info;
5212                 }
5213         }
5214
5215         rx_ring->next_to_alloc = 0;
5216         rx_ring->next_to_clean = 0;
5217         rx_ring->next_to_use = 0;
5218 }
5219
5220 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
5221                                    struct ixgbe_ring *rx_ring)
5222 {
5223         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5224         int index = rx_ring->queue_index + vadapter->rx_base_queue;
5225
5226         /* shutdown specific queue receive and wait for dma to settle */
5227         ixgbe_disable_rx_queue(adapter, rx_ring);
5228         usleep_range(10000, 20000);
5229         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
5230         ixgbe_clean_rx_ring(rx_ring);
5231         rx_ring->l2_accel_priv = NULL;
5232 }
5233
5234 static int ixgbe_fwd_ring_down(struct net_device *vdev,
5235                                struct ixgbe_fwd_adapter *accel)
5236 {
5237         struct ixgbe_adapter *adapter = accel->real_adapter;
5238         unsigned int rxbase = accel->rx_base_queue;
5239         unsigned int txbase = accel->tx_base_queue;
5240         int i;
5241
5242         netif_tx_stop_all_queues(vdev);
5243
5244         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5245                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5246                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
5247         }
5248
5249         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5250                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
5251                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
5252         }
5253
5254
5255         return 0;
5256 }
5257
5258 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5259                              struct ixgbe_fwd_adapter *accel)
5260 {
5261         struct ixgbe_adapter *adapter = accel->real_adapter;
5262         unsigned int rxbase, txbase, queues;
5263         int i, baseq, err = 0;
5264
5265         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
5266                 return 0;
5267
5268         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5269         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
5270                    accel->pool, adapter->num_rx_pools,
5271                    baseq, baseq + adapter->num_rx_queues_per_pool,
5272                    adapter->fwd_bitmask);
5273
5274         accel->netdev = vdev;
5275         accel->rx_base_queue = rxbase = baseq;
5276         accel->tx_base_queue = txbase = baseq;
5277
5278         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5279                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5280
5281         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5282                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5283                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5284                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5285         }
5286
5287         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5288                 adapter->tx_ring[txbase + i]->netdev = vdev;
5289                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5290         }
5291
5292         queues = min_t(unsigned int,
5293                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5294         err = netif_set_real_num_tx_queues(vdev, queues);
5295         if (err)
5296                 goto fwd_queue_err;
5297
5298         err = netif_set_real_num_rx_queues(vdev, queues);
5299         if (err)
5300                 goto fwd_queue_err;
5301
5302         if (is_valid_ether_addr(vdev->dev_addr))
5303                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5304
5305         ixgbe_fwd_psrtype(accel);
5306         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5307         return err;
5308 fwd_queue_err:
5309         ixgbe_fwd_ring_down(vdev, accel);
5310         return err;
5311 }
5312
5313 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5314 {
5315         if (netif_is_macvlan(upper)) {
5316                 struct macvlan_dev *dfwd = netdev_priv(upper);
5317                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5318
5319                 if (dfwd->fwd_priv)
5320                         ixgbe_fwd_ring_up(upper, vadapter);
5321         }
5322
5323         return 0;
5324 }
5325
5326 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5327 {
5328         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5329                                       ixgbe_upper_dev_walk, NULL);
5330 }
5331
5332 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5333 {
5334         struct ixgbe_hw *hw = &adapter->hw;
5335
5336         ixgbe_configure_pb(adapter);
5337 #ifdef CONFIG_IXGBE_DCB
5338         ixgbe_configure_dcb(adapter);
5339 #endif
5340         /*
5341          * We must restore virtualization before VLANs or else
5342          * the VLVF registers will not be populated
5343          */
5344         ixgbe_configure_virtualization(adapter);
5345
5346         ixgbe_set_rx_mode(adapter->netdev);
5347         ixgbe_restore_vlan(adapter);
5348
5349         switch (hw->mac.type) {
5350         case ixgbe_mac_82599EB:
5351         case ixgbe_mac_X540:
5352                 hw->mac.ops.disable_rx_buff(hw);
5353                 break;
5354         default:
5355                 break;
5356         }
5357
5358         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5359                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5360                                                 adapter->fdir_pballoc);
5361         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5362                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5363                                               adapter->fdir_pballoc);
5364                 ixgbe_fdir_filter_restore(adapter);
5365         }
5366
5367         switch (hw->mac.type) {
5368         case ixgbe_mac_82599EB:
5369         case ixgbe_mac_X540:
5370                 hw->mac.ops.enable_rx_buff(hw);
5371                 break;
5372         default:
5373                 break;
5374         }
5375
5376 #ifdef CONFIG_IXGBE_DCA
5377         /* configure DCA */
5378         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5379                 ixgbe_setup_dca(adapter);
5380 #endif /* CONFIG_IXGBE_DCA */
5381
5382 #ifdef IXGBE_FCOE
5383         /* configure FCoE L2 filters, redirection table, and Rx control */
5384         ixgbe_configure_fcoe(adapter);
5385
5386 #endif /* IXGBE_FCOE */
5387         ixgbe_configure_tx(adapter);
5388         ixgbe_configure_rx(adapter);
5389         ixgbe_configure_dfwd(adapter);
5390 }
5391
5392 /**
5393  * ixgbe_sfp_link_config - set up SFP+ link
5394  * @adapter: pointer to private adapter struct
5395  **/
5396 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5397 {
5398         /*
5399          * We are assuming the worst case scenario here, and that
5400          * is that an SFP was inserted/removed after the reset
5401          * but before SFP detection was enabled.  As such the best
5402          * solution is to just start searching as soon as we start
5403          */
5404         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5405                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5406
5407         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5408         adapter->sfp_poll_time = 0;
5409 }
5410
5411 /**
5412  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5413  * @hw: pointer to private hardware struct
5414  *
5415  * Returns 0 on success, negative on failure
5416  **/
5417 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5418 {
5419         u32 speed;
5420         bool autoneg, link_up = false;
5421         int ret = IXGBE_ERR_LINK_SETUP;
5422
5423         if (hw->mac.ops.check_link)
5424                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5425
5426         if (ret)
5427                 return ret;
5428
5429         speed = hw->phy.autoneg_advertised;
5430         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5431                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5432                                                         &autoneg);
5433         if (ret)
5434                 return ret;
5435
5436         if (hw->mac.ops.setup_link)
5437                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5438
5439         return ret;
5440 }
5441
5442 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5443 {
5444         struct ixgbe_hw *hw = &adapter->hw;
5445         u32 gpie = 0;
5446
5447         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5448                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5449                        IXGBE_GPIE_OCD;
5450                 gpie |= IXGBE_GPIE_EIAME;
5451                 /*
5452                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5453                  * this saves a register write for every interrupt
5454                  */
5455                 switch (hw->mac.type) {
5456                 case ixgbe_mac_82598EB:
5457                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5458                         break;
5459                 case ixgbe_mac_82599EB:
5460                 case ixgbe_mac_X540:
5461                 case ixgbe_mac_X550:
5462                 case ixgbe_mac_X550EM_x:
5463                 case ixgbe_mac_x550em_a:
5464                 default:
5465                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5466                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5467                         break;
5468                 }
5469         } else {
5470                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5471                  * specifically only auto mask tx and rx interrupts */
5472                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5473         }
5474
5475         /* XXX: to interrupt immediately for EICS writes, enable this */
5476         /* gpie |= IXGBE_GPIE_EIMEN; */
5477
5478         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5479                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5480
5481                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5482                 case IXGBE_82599_VMDQ_8Q_MASK:
5483                         gpie |= IXGBE_GPIE_VTMODE_16;
5484                         break;
5485                 case IXGBE_82599_VMDQ_4Q_MASK:
5486                         gpie |= IXGBE_GPIE_VTMODE_32;
5487                         break;
5488                 default:
5489                         gpie |= IXGBE_GPIE_VTMODE_64;
5490                         break;
5491                 }
5492         }
5493
5494         /* Enable Thermal over heat sensor interrupt */
5495         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5496                 switch (adapter->hw.mac.type) {
5497                 case ixgbe_mac_82599EB:
5498                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5499                         break;
5500                 default:
5501                         break;
5502                 }
5503         }
5504
5505         /* Enable fan failure interrupt */
5506         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5507                 gpie |= IXGBE_SDP1_GPIEN(hw);
5508
5509         switch (hw->mac.type) {
5510         case ixgbe_mac_82599EB:
5511                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5512                 break;
5513         case ixgbe_mac_X550EM_x:
5514         case ixgbe_mac_x550em_a:
5515                 gpie |= IXGBE_SDP0_GPIEN_X540;
5516                 break;
5517         default:
5518                 break;
5519         }
5520
5521         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5522 }
5523
5524 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5525 {
5526         struct ixgbe_hw *hw = &adapter->hw;
5527         int err;
5528         u32 ctrl_ext;
5529
5530         ixgbe_get_hw_control(adapter);
5531         ixgbe_setup_gpie(adapter);
5532
5533         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5534                 ixgbe_configure_msix(adapter);
5535         else
5536                 ixgbe_configure_msi_and_legacy(adapter);
5537
5538         /* enable the optics for 82599 SFP+ fiber */
5539         if (hw->mac.ops.enable_tx_laser)
5540                 hw->mac.ops.enable_tx_laser(hw);
5541
5542         if (hw->phy.ops.set_phy_power)
5543                 hw->phy.ops.set_phy_power(hw, true);
5544
5545         smp_mb__before_atomic();
5546         clear_bit(__IXGBE_DOWN, &adapter->state);
5547         ixgbe_napi_enable_all(adapter);
5548
5549         if (ixgbe_is_sfp(hw)) {
5550                 ixgbe_sfp_link_config(adapter);
5551         } else {
5552                 err = ixgbe_non_sfp_link_config(hw);
5553                 if (err)
5554                         e_err(probe, "link_config FAILED %d\n", err);
5555         }
5556
5557         /* clear any pending interrupts, may auto mask */
5558         IXGBE_READ_REG(hw, IXGBE_EICR);
5559         ixgbe_irq_enable(adapter, true, true);
5560
5561         /*
5562          * If this adapter has a fan, check to see if we had a failure
5563          * before we enabled the interrupt.
5564          */
5565         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5566                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5567                 if (esdp & IXGBE_ESDP_SDP1)
5568                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5569         }
5570
5571         /* bring the link up in the watchdog, this could race with our first
5572          * link up interrupt but shouldn't be a problem */
5573         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5574         adapter->link_check_timeout = jiffies;
5575         mod_timer(&adapter->service_timer, jiffies);
5576
5577         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5578         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5579         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5580         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5581 }
5582
5583 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5584 {
5585         WARN_ON(in_interrupt());
5586         /* put off any impending NetWatchDogTimeout */
5587         netif_trans_update(adapter->netdev);
5588
5589         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5590                 usleep_range(1000, 2000);
5591         if (adapter->hw.phy.type == ixgbe_phy_fw)
5592                 ixgbe_watchdog_link_is_down(adapter);
5593         ixgbe_down(adapter);
5594         /*
5595          * If SR-IOV enabled then wait a bit before bringing the adapter
5596          * back up to give the VFs time to respond to the reset.  The
5597          * two second wait is based upon the watchdog timer cycle in
5598          * the VF driver.
5599          */
5600         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5601                 msleep(2000);
5602         ixgbe_up(adapter);
5603         clear_bit(__IXGBE_RESETTING, &adapter->state);
5604 }
5605
5606 void ixgbe_up(struct ixgbe_adapter *adapter)
5607 {
5608         /* hardware has been reset, we need to reload some things */
5609         ixgbe_configure(adapter);
5610
5611         ixgbe_up_complete(adapter);
5612 }
5613
5614 void ixgbe_reset(struct ixgbe_adapter *adapter)
5615 {
5616         struct ixgbe_hw *hw = &adapter->hw;
5617         struct net_device *netdev = adapter->netdev;
5618         int err;
5619
5620         if (ixgbe_removed(hw->hw_addr))
5621                 return;
5622         /* lock SFP init bit to prevent race conditions with the watchdog */
5623         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5624                 usleep_range(1000, 2000);
5625
5626         /* clear all SFP and link config related flags while holding SFP_INIT */
5627         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5628                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5629         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5630
5631         err = hw->mac.ops.init_hw(hw);
5632         switch (err) {
5633         case 0:
5634         case IXGBE_ERR_SFP_NOT_PRESENT:
5635         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5636                 break;
5637         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5638                 e_dev_err("master disable timed out\n");
5639                 break;
5640         case IXGBE_ERR_EEPROM_VERSION:
5641                 /* We are running on a pre-production device, log a warning */
5642                 e_dev_warn("This device is a pre-production adapter/LOM. "
5643                            "Please be aware there may be issues associated with "
5644                            "your hardware.  If you are experiencing problems "
5645                            "please contact your Intel or hardware "
5646                            "representative who provided you with this "
5647                            "hardware.\n");
5648                 break;
5649         default:
5650                 e_dev_err("Hardware Error: %d\n", err);
5651         }
5652
5653         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5654
5655         /* flush entries out of MAC table */
5656         ixgbe_flush_sw_mac_table(adapter);
5657         __dev_uc_unsync(netdev, NULL);
5658
5659         /* do not flush user set addresses */
5660         ixgbe_mac_set_default_filter(adapter);
5661
5662         /* update SAN MAC vmdq pool selection */
5663         if (hw->mac.san_mac_rar_index)
5664                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5665
5666         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5667                 ixgbe_ptp_reset(adapter);
5668
5669         if (hw->phy.ops.set_phy_power) {
5670                 if (!netif_running(adapter->netdev) && !adapter->wol)
5671                         hw->phy.ops.set_phy_power(hw, false);
5672                 else
5673                         hw->phy.ops.set_phy_power(hw, true);
5674         }
5675 }
5676
5677 /**
5678  * ixgbe_clean_tx_ring - Free Tx Buffers
5679  * @tx_ring: ring to be cleaned
5680  **/
5681 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5682 {
5683         u16 i = tx_ring->next_to_clean;
5684         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5685
5686         while (i != tx_ring->next_to_use) {
5687                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5688
5689                 /* Free all the Tx ring sk_buffs */
5690                 if (ring_is_xdp(tx_ring))
5691                         page_frag_free(tx_buffer->data);
5692                 else
5693                         dev_kfree_skb_any(tx_buffer->skb);
5694
5695                 /* unmap skb header data */
5696                 dma_unmap_single(tx_ring->dev,
5697                                  dma_unmap_addr(tx_buffer, dma),
5698                                  dma_unmap_len(tx_buffer, len),
5699                                  DMA_TO_DEVICE);
5700
5701                 /* check for eop_desc to determine the end of the packet */
5702                 eop_desc = tx_buffer->next_to_watch;
5703                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5704
5705                 /* unmap remaining buffers */
5706                 while (tx_desc != eop_desc) {
5707                         tx_buffer++;
5708                         tx_desc++;
5709                         i++;
5710                         if (unlikely(i == tx_ring->count)) {
5711                                 i = 0;
5712                                 tx_buffer = tx_ring->tx_buffer_info;
5713                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5714                         }
5715
5716                         /* unmap any remaining paged data */
5717                         if (dma_unmap_len(tx_buffer, len))
5718                                 dma_unmap_page(tx_ring->dev,
5719                                                dma_unmap_addr(tx_buffer, dma),
5720                                                dma_unmap_len(tx_buffer, len),
5721                                                DMA_TO_DEVICE);
5722                 }
5723
5724                 /* move us one more past the eop_desc for start of next pkt */
5725                 tx_buffer++;
5726                 i++;
5727                 if (unlikely(i == tx_ring->count)) {
5728                         i = 0;
5729                         tx_buffer = tx_ring->tx_buffer_info;
5730                 }
5731         }
5732
5733         /* reset BQL for queue */
5734         if (!ring_is_xdp(tx_ring))
5735                 netdev_tx_reset_queue(txring_txq(tx_ring));
5736
5737         /* reset next_to_use and next_to_clean */
5738         tx_ring->next_to_use = 0;
5739         tx_ring->next_to_clean = 0;
5740 }
5741
5742 /**
5743  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5744  * @adapter: board private structure
5745  **/
5746 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5747 {
5748         int i;
5749
5750         for (i = 0; i < adapter->num_rx_queues; i++)
5751                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5752 }
5753
5754 /**
5755  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5756  * @adapter: board private structure
5757  **/
5758 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5759 {
5760         int i;
5761
5762         for (i = 0; i < adapter->num_tx_queues; i++)
5763                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5764         for (i = 0; i < adapter->num_xdp_queues; i++)
5765                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5766 }
5767
5768 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5769 {
5770         struct hlist_node *node2;
5771         struct ixgbe_fdir_filter *filter;
5772
5773         spin_lock(&adapter->fdir_perfect_lock);
5774
5775         hlist_for_each_entry_safe(filter, node2,
5776                                   &adapter->fdir_filter_list, fdir_node) {
5777                 hlist_del(&filter->fdir_node);
5778                 kfree(filter);
5779         }
5780         adapter->fdir_filter_count = 0;
5781
5782         spin_unlock(&adapter->fdir_perfect_lock);
5783 }
5784
5785 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5786 {
5787         if (netif_is_macvlan(upper)) {
5788                 struct macvlan_dev *vlan = netdev_priv(upper);
5789
5790                 if (vlan->fwd_priv) {
5791                         netif_tx_stop_all_queues(upper);
5792                         netif_carrier_off(upper);
5793                         netif_tx_disable(upper);
5794                 }
5795         }
5796
5797         return 0;
5798 }
5799
5800 void ixgbe_down(struct ixgbe_adapter *adapter)
5801 {
5802         struct net_device *netdev = adapter->netdev;
5803         struct ixgbe_hw *hw = &adapter->hw;
5804         int i;
5805
5806         /* signal that we are down to the interrupt handler */
5807         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5808                 return; /* do nothing if already down */
5809
5810         /* disable receives */
5811         hw->mac.ops.disable_rx(hw);
5812
5813         /* disable all enabled rx queues */
5814         for (i = 0; i < adapter->num_rx_queues; i++)
5815                 /* this call also flushes the previous write */
5816                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5817
5818         usleep_range(10000, 20000);
5819
5820         netif_tx_stop_all_queues(netdev);
5821
5822         /* call carrier off first to avoid false dev_watchdog timeouts */
5823         netif_carrier_off(netdev);
5824         netif_tx_disable(netdev);
5825
5826         /* disable any upper devices */
5827         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5828                                       ixgbe_disable_macvlan, NULL);
5829
5830         ixgbe_irq_disable(adapter);
5831
5832         ixgbe_napi_disable_all(adapter);
5833
5834         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5835         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5836         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5837
5838         del_timer_sync(&adapter->service_timer);
5839
5840         if (adapter->num_vfs) {
5841                 /* Clear EITR Select mapping */
5842                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5843
5844                 /* Mark all the VFs as inactive */
5845                 for (i = 0 ; i < adapter->num_vfs; i++)
5846                         adapter->vfinfo[i].clear_to_send = false;
5847
5848                 /* ping all the active vfs to let them know we are going down */
5849                 ixgbe_ping_all_vfs(adapter);
5850
5851                 /* Disable all VFTE/VFRE TX/RX */
5852                 ixgbe_disable_tx_rx(adapter);
5853         }
5854
5855         /* disable transmits in the hardware now that interrupts are off */
5856         for (i = 0; i < adapter->num_tx_queues; i++) {
5857                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5858                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5859         }
5860         for (i = 0; i < adapter->num_xdp_queues; i++) {
5861                 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
5862
5863                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5864         }
5865
5866         /* Disable the Tx DMA engine on 82599 and later MAC */
5867         switch (hw->mac.type) {
5868         case ixgbe_mac_82599EB:
5869         case ixgbe_mac_X540:
5870         case ixgbe_mac_X550:
5871         case ixgbe_mac_X550EM_x:
5872         case ixgbe_mac_x550em_a:
5873                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5874                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5875                                  ~IXGBE_DMATXCTL_TE));
5876                 break;
5877         default:
5878                 break;
5879         }
5880
5881         if (!pci_channel_offline(adapter->pdev))
5882                 ixgbe_reset(adapter);
5883
5884         /* power down the optics for 82599 SFP+ fiber */
5885         if (hw->mac.ops.disable_tx_laser)
5886                 hw->mac.ops.disable_tx_laser(hw);
5887
5888         ixgbe_clean_all_tx_rings(adapter);
5889         ixgbe_clean_all_rx_rings(adapter);
5890 }
5891
5892 /**
5893  * ixgbe_eee_capable - helper function to determine EEE support on X550
5894  * @adapter: board private structure
5895  */
5896 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5897 {
5898         struct ixgbe_hw *hw = &adapter->hw;
5899
5900         switch (hw->device_id) {
5901         case IXGBE_DEV_ID_X550EM_A_1G_T:
5902         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5903                 if (!hw->phy.eee_speeds_supported)
5904                         break;
5905                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5906                 if (!hw->phy.eee_speeds_advertised)
5907                         break;
5908                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5909                 break;
5910         default:
5911                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5912                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5913                 break;
5914         }
5915 }
5916
5917 /**
5918  * ixgbe_tx_timeout - Respond to a Tx Hang
5919  * @netdev: network interface device structure
5920  **/
5921 static void ixgbe_tx_timeout(struct net_device *netdev)
5922 {
5923         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5924
5925         /* Do the reset outside of interrupt context */
5926         ixgbe_tx_timeout_reset(adapter);
5927 }
5928
5929 #ifdef CONFIG_IXGBE_DCB
5930 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5931 {
5932         struct ixgbe_hw *hw = &adapter->hw;
5933         struct tc_configuration *tc;
5934         int j;
5935
5936         switch (hw->mac.type) {
5937         case ixgbe_mac_82598EB:
5938         case ixgbe_mac_82599EB:
5939                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5940                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5941                 break;
5942         case ixgbe_mac_X540:
5943         case ixgbe_mac_X550:
5944                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5945                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5946                 break;
5947         case ixgbe_mac_X550EM_x:
5948         case ixgbe_mac_x550em_a:
5949         default:
5950                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5951                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5952                 break;
5953         }
5954
5955         /* Configure DCB traffic classes */
5956         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5957                 tc = &adapter->dcb_cfg.tc_config[j];
5958                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5959                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5960                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5961                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5962                 tc->dcb_pfc = pfc_disabled;
5963         }
5964
5965         /* Initialize default user to priority mapping, UPx->TC0 */
5966         tc = &adapter->dcb_cfg.tc_config[0];
5967         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5968         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5969
5970         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5971         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5972         adapter->dcb_cfg.pfc_mode_enable = false;
5973         adapter->dcb_set_bitmap = 0x00;
5974         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5975                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5976         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5977                sizeof(adapter->temp_dcb_cfg));
5978 }
5979 #endif
5980
5981 /**
5982  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5983  * @adapter: board private structure to initialize
5984  *
5985  * ixgbe_sw_init initializes the Adapter private data structure.
5986  * Fields are initialized based on PCI device information and
5987  * OS network device settings (MTU size).
5988  **/
5989 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
5990                          const struct ixgbe_info *ii)
5991 {
5992         struct ixgbe_hw *hw = &adapter->hw;
5993         struct pci_dev *pdev = adapter->pdev;
5994         unsigned int rss, fdir;
5995         u32 fwsm;
5996         int i;
5997
5998         /* PCI config space info */
5999
6000         hw->vendor_id = pdev->vendor;
6001         hw->device_id = pdev->device;
6002         hw->revision_id = pdev->revision;
6003         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6004         hw->subsystem_device_id = pdev->subsystem_device;
6005
6006         /* get_invariants needs the device IDs */
6007         ii->get_invariants(hw);
6008
6009         /* Set common capability flags and settings */
6010         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6011         adapter->ring_feature[RING_F_RSS].limit = rss;
6012         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6013         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6014         adapter->atr_sample_rate = 20;
6015         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6016         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6017         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6018 #ifdef CONFIG_IXGBE_DCA
6019         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6020 #endif
6021 #ifdef CONFIG_IXGBE_DCB
6022         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6023         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6024 #endif
6025 #ifdef IXGBE_FCOE
6026         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6027         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6028 #ifdef CONFIG_IXGBE_DCB
6029         /* Default traffic class to use for FCoE */
6030         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6031 #endif /* CONFIG_IXGBE_DCB */
6032 #endif /* IXGBE_FCOE */
6033
6034         /* initialize static ixgbe jump table entries */
6035         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6036                                           GFP_KERNEL);
6037         if (!adapter->jump_tables[0])
6038                 return -ENOMEM;
6039         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6040
6041         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6042                 adapter->jump_tables[i] = NULL;
6043
6044         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
6045                                      hw->mac.num_rar_entries,
6046                                      GFP_ATOMIC);
6047         if (!adapter->mac_table)
6048                 return -ENOMEM;
6049
6050         if (ixgbe_init_rss_key(adapter))
6051                 return -ENOMEM;
6052
6053         /* Set MAC specific capability flags and exceptions */
6054         switch (hw->mac.type) {
6055         case ixgbe_mac_82598EB:
6056                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6057
6058                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6059                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6060
6061                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6062                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6063                 adapter->atr_sample_rate = 0;
6064                 adapter->fdir_pballoc = 0;
6065 #ifdef IXGBE_FCOE
6066                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6067                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6068 #ifdef CONFIG_IXGBE_DCB
6069                 adapter->fcoe.up = 0;
6070 #endif /* IXGBE_DCB */
6071 #endif /* IXGBE_FCOE */
6072                 break;
6073         case ixgbe_mac_82599EB:
6074                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6075                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6076                 break;
6077         case ixgbe_mac_X540:
6078                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6079                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6080                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6081                 break;
6082         case ixgbe_mac_x550em_a:
6083                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6084                 switch (hw->device_id) {
6085                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6086                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6087                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6088                         break;
6089                 default:
6090                         break;
6091                 }
6092         /* fall through */
6093         case ixgbe_mac_X550EM_x:
6094 #ifdef CONFIG_IXGBE_DCB
6095                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6096 #endif
6097 #ifdef IXGBE_FCOE
6098                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6099 #ifdef CONFIG_IXGBE_DCB
6100                 adapter->fcoe.up = 0;
6101 #endif /* IXGBE_DCB */
6102 #endif /* IXGBE_FCOE */
6103         /* Fall Through */
6104         case ixgbe_mac_X550:
6105                 if (hw->mac.type == ixgbe_mac_X550)
6106                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6107 #ifdef CONFIG_IXGBE_DCA
6108                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6109 #endif
6110                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6111                 break;
6112         default:
6113                 break;
6114         }
6115
6116 #ifdef IXGBE_FCOE
6117         /* FCoE support exists, always init the FCoE lock */
6118         spin_lock_init(&adapter->fcoe.lock);
6119
6120 #endif
6121         /* n-tuple support exists, always init our spinlock */
6122         spin_lock_init(&adapter->fdir_perfect_lock);
6123
6124 #ifdef CONFIG_IXGBE_DCB
6125         ixgbe_init_dcb(adapter);
6126 #endif
6127
6128         /* default flow control settings */
6129         hw->fc.requested_mode = ixgbe_fc_full;
6130         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6131         ixgbe_pbthresh_setup(adapter);
6132         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6133         hw->fc.send_xon = true;
6134         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6135
6136 #ifdef CONFIG_PCI_IOV
6137         if (max_vfs > 0)
6138                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6139
6140         /* assign number of SR-IOV VFs */
6141         if (hw->mac.type != ixgbe_mac_82598EB) {
6142                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6143                         max_vfs = 0;
6144                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6145                 }
6146         }
6147 #endif /* CONFIG_PCI_IOV */
6148
6149         /* enable itr by default in dynamic mode */
6150         adapter->rx_itr_setting = 1;
6151         adapter->tx_itr_setting = 1;
6152
6153         /* set default ring sizes */
6154         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6155         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6156
6157         /* set default work limits */
6158         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6159
6160         /* initialize eeprom parameters */
6161         if (ixgbe_init_eeprom_params_generic(hw)) {
6162                 e_dev_err("EEPROM initialization failed\n");
6163                 return -EIO;
6164         }
6165
6166         /* PF holds first pool slot */
6167         set_bit(0, &adapter->fwd_bitmask);
6168         set_bit(__IXGBE_DOWN, &adapter->state);
6169
6170         return 0;
6171 }
6172
6173 /**
6174  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6175  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6176  *
6177  * Return 0 on success, negative on failure
6178  **/
6179 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6180 {
6181         struct device *dev = tx_ring->dev;
6182         int orig_node = dev_to_node(dev);
6183         int ring_node = -1;
6184         int size;
6185
6186         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6187
6188         if (tx_ring->q_vector)
6189                 ring_node = tx_ring->q_vector->numa_node;
6190
6191         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6192         if (!tx_ring->tx_buffer_info)
6193                 tx_ring->tx_buffer_info = vmalloc(size);
6194         if (!tx_ring->tx_buffer_info)
6195                 goto err;
6196
6197         /* round up to nearest 4K */
6198         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6199         tx_ring->size = ALIGN(tx_ring->size, 4096);
6200
6201         set_dev_node(dev, ring_node);
6202         tx_ring->desc = dma_alloc_coherent(dev,
6203                                            tx_ring->size,
6204                                            &tx_ring->dma,
6205                                            GFP_KERNEL);
6206         set_dev_node(dev, orig_node);
6207         if (!tx_ring->desc)
6208                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6209                                                    &tx_ring->dma, GFP_KERNEL);
6210         if (!tx_ring->desc)
6211                 goto err;
6212
6213         tx_ring->next_to_use = 0;
6214         tx_ring->next_to_clean = 0;
6215         return 0;
6216
6217 err:
6218         vfree(tx_ring->tx_buffer_info);
6219         tx_ring->tx_buffer_info = NULL;
6220         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6221         return -ENOMEM;
6222 }
6223
6224 /**
6225  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6226  * @adapter: board private structure
6227  *
6228  * If this function returns with an error, then it's possible one or
6229  * more of the rings is populated (while the rest are not).  It is the
6230  * callers duty to clean those orphaned rings.
6231  *
6232  * Return 0 on success, negative on failure
6233  **/
6234 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6235 {
6236         int i, j = 0, err = 0;
6237
6238         for (i = 0; i < adapter->num_tx_queues; i++) {
6239                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6240                 if (!err)
6241                         continue;
6242
6243                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6244                 goto err_setup_tx;
6245         }
6246         for (j = 0; j < adapter->num_xdp_queues; j++) {
6247                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6248                 if (!err)
6249                         continue;
6250
6251                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6252                 goto err_setup_tx;
6253         }
6254
6255         return 0;
6256 err_setup_tx:
6257         /* rewind the index freeing the rings as we go */
6258         while (j--)
6259                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6260         while (i--)
6261                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6262         return err;
6263 }
6264
6265 /**
6266  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6267  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6268  *
6269  * Returns 0 on success, negative on failure
6270  **/
6271 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6272                              struct ixgbe_ring *rx_ring)
6273 {
6274         struct device *dev = rx_ring->dev;
6275         int orig_node = dev_to_node(dev);
6276         int ring_node = -1;
6277         int size;
6278
6279         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6280
6281         if (rx_ring->q_vector)
6282                 ring_node = rx_ring->q_vector->numa_node;
6283
6284         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6285         if (!rx_ring->rx_buffer_info)
6286                 rx_ring->rx_buffer_info = vmalloc(size);
6287         if (!rx_ring->rx_buffer_info)
6288                 goto err;
6289
6290         /* Round up to nearest 4K */
6291         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6292         rx_ring->size = ALIGN(rx_ring->size, 4096);
6293
6294         set_dev_node(dev, ring_node);
6295         rx_ring->desc = dma_alloc_coherent(dev,
6296                                            rx_ring->size,
6297                                            &rx_ring->dma,
6298                                            GFP_KERNEL);
6299         set_dev_node(dev, orig_node);
6300         if (!rx_ring->desc)
6301                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6302                                                    &rx_ring->dma, GFP_KERNEL);
6303         if (!rx_ring->desc)
6304                 goto err;
6305
6306         rx_ring->next_to_clean = 0;
6307         rx_ring->next_to_use = 0;
6308
6309         rx_ring->xdp_prog = adapter->xdp_prog;
6310
6311         return 0;
6312 err:
6313         vfree(rx_ring->rx_buffer_info);
6314         rx_ring->rx_buffer_info = NULL;
6315         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6316         return -ENOMEM;
6317 }
6318
6319 /**
6320  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6321  * @adapter: board private structure
6322  *
6323  * If this function returns with an error, then it's possible one or
6324  * more of the rings is populated (while the rest are not).  It is the
6325  * callers duty to clean those orphaned rings.
6326  *
6327  * Return 0 on success, negative on failure
6328  **/
6329 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6330 {
6331         int i, err = 0;
6332
6333         for (i = 0; i < adapter->num_rx_queues; i++) {
6334                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6335                 if (!err)
6336                         continue;
6337
6338                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6339                 goto err_setup_rx;
6340         }
6341
6342 #ifdef IXGBE_FCOE
6343         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6344         if (!err)
6345 #endif
6346                 return 0;
6347 err_setup_rx:
6348         /* rewind the index freeing the rings as we go */
6349         while (i--)
6350                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6351         return err;
6352 }
6353
6354 /**
6355  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6356  * @tx_ring: Tx descriptor ring for a specific queue
6357  *
6358  * Free all transmit software resources
6359  **/
6360 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6361 {
6362         ixgbe_clean_tx_ring(tx_ring);
6363
6364         vfree(tx_ring->tx_buffer_info);
6365         tx_ring->tx_buffer_info = NULL;
6366
6367         /* if not set, then don't free */
6368         if (!tx_ring->desc)
6369                 return;
6370
6371         dma_free_coherent(tx_ring->dev, tx_ring->size,
6372                           tx_ring->desc, tx_ring->dma);
6373
6374         tx_ring->desc = NULL;
6375 }
6376
6377 /**
6378  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6379  * @adapter: board private structure
6380  *
6381  * Free all transmit software resources
6382  **/
6383 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6384 {
6385         int i;
6386
6387         for (i = 0; i < adapter->num_tx_queues; i++)
6388                 if (adapter->tx_ring[i]->desc)
6389                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6390         for (i = 0; i < adapter->num_xdp_queues; i++)
6391                 if (adapter->xdp_ring[i]->desc)
6392                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6393 }
6394
6395 /**
6396  * ixgbe_free_rx_resources - Free Rx Resources
6397  * @rx_ring: ring to clean the resources from
6398  *
6399  * Free all receive software resources
6400  **/
6401 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6402 {
6403         ixgbe_clean_rx_ring(rx_ring);
6404
6405         rx_ring->xdp_prog = NULL;
6406         vfree(rx_ring->rx_buffer_info);
6407         rx_ring->rx_buffer_info = NULL;
6408
6409         /* if not set, then don't free */
6410         if (!rx_ring->desc)
6411                 return;
6412
6413         dma_free_coherent(rx_ring->dev, rx_ring->size,
6414                           rx_ring->desc, rx_ring->dma);
6415
6416         rx_ring->desc = NULL;
6417 }
6418
6419 /**
6420  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6421  * @adapter: board private structure
6422  *
6423  * Free all receive software resources
6424  **/
6425 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6426 {
6427         int i;
6428
6429 #ifdef IXGBE_FCOE
6430         ixgbe_free_fcoe_ddp_resources(adapter);
6431
6432 #endif
6433         for (i = 0; i < adapter->num_rx_queues; i++)
6434                 if (adapter->rx_ring[i]->desc)
6435                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6436 }
6437
6438 /**
6439  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6440  * @netdev: network interface device structure
6441  * @new_mtu: new value for maximum frame size
6442  *
6443  * Returns 0 on success, negative on failure
6444  **/
6445 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6446 {
6447         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6448
6449         /*
6450          * For 82599EB we cannot allow legacy VFs to enable their receive
6451          * paths when MTU greater than 1500 is configured.  So display a
6452          * warning that legacy VFs will be disabled.
6453          */
6454         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6455             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6456             (new_mtu > ETH_DATA_LEN))
6457                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6458
6459         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6460
6461         /* must set new MTU before calling down or up */
6462         netdev->mtu = new_mtu;
6463
6464         if (netif_running(netdev))
6465                 ixgbe_reinit_locked(adapter);
6466
6467         return 0;
6468 }
6469
6470 /**
6471  * ixgbe_open - Called when a network interface is made active
6472  * @netdev: network interface device structure
6473  *
6474  * Returns 0 on success, negative value on failure
6475  *
6476  * The open entry point is called when a network interface is made
6477  * active by the system (IFF_UP).  At this point all resources needed
6478  * for transmit and receive operations are allocated, the interrupt
6479  * handler is registered with the OS, the watchdog timer is started,
6480  * and the stack is notified that the interface is ready.
6481  **/
6482 int ixgbe_open(struct net_device *netdev)
6483 {
6484         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6485         struct ixgbe_hw *hw = &adapter->hw;
6486         int err, queues;
6487
6488         /* disallow open during test */
6489         if (test_bit(__IXGBE_TESTING, &adapter->state))
6490                 return -EBUSY;
6491
6492         netif_carrier_off(netdev);
6493
6494         /* allocate transmit descriptors */
6495         err = ixgbe_setup_all_tx_resources(adapter);
6496         if (err)
6497                 goto err_setup_tx;
6498
6499         /* allocate receive descriptors */
6500         err = ixgbe_setup_all_rx_resources(adapter);
6501         if (err)
6502                 goto err_setup_rx;
6503
6504         ixgbe_configure(adapter);
6505
6506         err = ixgbe_request_irq(adapter);
6507         if (err)
6508                 goto err_req_irq;
6509
6510         /* Notify the stack of the actual queue counts. */
6511         if (adapter->num_rx_pools > 1)
6512                 queues = adapter->num_rx_queues_per_pool;
6513         else
6514                 queues = adapter->num_tx_queues;
6515
6516         err = netif_set_real_num_tx_queues(netdev, queues);
6517         if (err)
6518                 goto err_set_queues;
6519
6520         if (adapter->num_rx_pools > 1 &&
6521             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6522                 queues = IXGBE_MAX_L2A_QUEUES;
6523         else
6524                 queues = adapter->num_rx_queues;
6525         err = netif_set_real_num_rx_queues(netdev, queues);
6526         if (err)
6527                 goto err_set_queues;
6528
6529         ixgbe_ptp_init(adapter);
6530
6531         ixgbe_up_complete(adapter);
6532
6533         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6534         udp_tunnel_get_rx_info(netdev);
6535
6536         return 0;
6537
6538 err_set_queues:
6539         ixgbe_free_irq(adapter);
6540 err_req_irq:
6541         ixgbe_free_all_rx_resources(adapter);
6542         if (hw->phy.ops.set_phy_power && !adapter->wol)
6543                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6544 err_setup_rx:
6545         ixgbe_free_all_tx_resources(adapter);
6546 err_setup_tx:
6547         ixgbe_reset(adapter);
6548
6549         return err;
6550 }
6551
6552 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6553 {
6554         ixgbe_ptp_suspend(adapter);
6555
6556         if (adapter->hw.phy.ops.enter_lplu) {
6557                 adapter->hw.phy.reset_disable = true;
6558                 ixgbe_down(adapter);
6559                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6560                 adapter->hw.phy.reset_disable = false;
6561         } else {
6562                 ixgbe_down(adapter);
6563         }
6564
6565         ixgbe_free_irq(adapter);
6566
6567         ixgbe_free_all_tx_resources(adapter);
6568         ixgbe_free_all_rx_resources(adapter);
6569 }
6570
6571 /**
6572  * ixgbe_close - Disables a network interface
6573  * @netdev: network interface device structure
6574  *
6575  * Returns 0, this is not allowed to fail
6576  *
6577  * The close entry point is called when an interface is de-activated
6578  * by the OS.  The hardware is still under the drivers control, but
6579  * needs to be disabled.  A global MAC reset is issued to stop the
6580  * hardware, and all transmit and receive resources are freed.
6581  **/
6582 int ixgbe_close(struct net_device *netdev)
6583 {
6584         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6585
6586         ixgbe_ptp_stop(adapter);
6587
6588         if (netif_device_present(netdev))
6589                 ixgbe_close_suspend(adapter);
6590
6591         ixgbe_fdir_filter_exit(adapter);
6592
6593         ixgbe_release_hw_control(adapter);
6594
6595         return 0;
6596 }
6597
6598 #ifdef CONFIG_PM
6599 static int ixgbe_resume(struct pci_dev *pdev)
6600 {
6601         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6602         struct net_device *netdev = adapter->netdev;
6603         u32 err;
6604
6605         adapter->hw.hw_addr = adapter->io_addr;
6606         pci_set_power_state(pdev, PCI_D0);
6607         pci_restore_state(pdev);
6608         /*
6609          * pci_restore_state clears dev->state_saved so call
6610          * pci_save_state to restore it.
6611          */
6612         pci_save_state(pdev);
6613
6614         err = pci_enable_device_mem(pdev);
6615         if (err) {
6616                 e_dev_err("Cannot enable PCI device from suspend\n");
6617                 return err;
6618         }
6619         smp_mb__before_atomic();
6620         clear_bit(__IXGBE_DISABLED, &adapter->state);
6621         pci_set_master(pdev);
6622
6623         pci_wake_from_d3(pdev, false);
6624
6625         ixgbe_reset(adapter);
6626
6627         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6628
6629         rtnl_lock();
6630         err = ixgbe_init_interrupt_scheme(adapter);
6631         if (!err && netif_running(netdev))
6632                 err = ixgbe_open(netdev);
6633
6634
6635         if (!err)
6636                 netif_device_attach(netdev);
6637         rtnl_unlock();
6638
6639         return err;
6640 }
6641 #endif /* CONFIG_PM */
6642
6643 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6644 {
6645         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6646         struct net_device *netdev = adapter->netdev;
6647         struct ixgbe_hw *hw = &adapter->hw;
6648         u32 ctrl, fctrl;
6649         u32 wufc = adapter->wol;
6650 #ifdef CONFIG_PM
6651         int retval = 0;
6652 #endif
6653
6654         rtnl_lock();
6655         netif_device_detach(netdev);
6656
6657         if (netif_running(netdev))
6658                 ixgbe_close_suspend(adapter);
6659
6660         ixgbe_clear_interrupt_scheme(adapter);
6661         rtnl_unlock();
6662
6663 #ifdef CONFIG_PM
6664         retval = pci_save_state(pdev);
6665         if (retval)
6666                 return retval;
6667
6668 #endif
6669         if (hw->mac.ops.stop_link_on_d3)
6670                 hw->mac.ops.stop_link_on_d3(hw);
6671
6672         if (wufc) {
6673                 ixgbe_set_rx_mode(netdev);
6674
6675                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6676                 if (hw->mac.ops.enable_tx_laser)
6677                         hw->mac.ops.enable_tx_laser(hw);
6678
6679                 /* turn on all-multi mode if wake on multicast is enabled */
6680                 if (wufc & IXGBE_WUFC_MC) {
6681                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6682                         fctrl |= IXGBE_FCTRL_MPE;
6683                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6684                 }
6685
6686                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6687                 ctrl |= IXGBE_CTRL_GIO_DIS;
6688                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6689
6690                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6691         } else {
6692                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6693                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6694         }
6695
6696         switch (hw->mac.type) {
6697         case ixgbe_mac_82598EB:
6698                 pci_wake_from_d3(pdev, false);
6699                 break;
6700         case ixgbe_mac_82599EB:
6701         case ixgbe_mac_X540:
6702         case ixgbe_mac_X550:
6703         case ixgbe_mac_X550EM_x:
6704         case ixgbe_mac_x550em_a:
6705                 pci_wake_from_d3(pdev, !!wufc);
6706                 break;
6707         default:
6708                 break;
6709         }
6710
6711         *enable_wake = !!wufc;
6712         if (hw->phy.ops.set_phy_power && !*enable_wake)
6713                 hw->phy.ops.set_phy_power(hw, false);
6714
6715         ixgbe_release_hw_control(adapter);
6716
6717         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6718                 pci_disable_device(pdev);
6719
6720         return 0;
6721 }
6722
6723 #ifdef CONFIG_PM
6724 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6725 {
6726         int retval;
6727         bool wake;
6728
6729         retval = __ixgbe_shutdown(pdev, &wake);
6730         if (retval)
6731                 return retval;
6732
6733         if (wake) {
6734                 pci_prepare_to_sleep(pdev);
6735         } else {
6736                 pci_wake_from_d3(pdev, false);
6737                 pci_set_power_state(pdev, PCI_D3hot);
6738         }
6739
6740         return 0;
6741 }
6742 #endif /* CONFIG_PM */
6743
6744 static void ixgbe_shutdown(struct pci_dev *pdev)
6745 {
6746         bool wake;
6747
6748         __ixgbe_shutdown(pdev, &wake);
6749
6750         if (system_state == SYSTEM_POWER_OFF) {
6751                 pci_wake_from_d3(pdev, wake);
6752                 pci_set_power_state(pdev, PCI_D3hot);
6753         }
6754 }
6755
6756 /**
6757  * ixgbe_update_stats - Update the board statistics counters.
6758  * @adapter: board private structure
6759  **/
6760 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6761 {
6762         struct net_device *netdev = adapter->netdev;
6763         struct ixgbe_hw *hw = &adapter->hw;
6764         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6765         u64 total_mpc = 0;
6766         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6767         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6768         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6769         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6770
6771         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6772             test_bit(__IXGBE_RESETTING, &adapter->state))
6773                 return;
6774
6775         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6776                 u64 rsc_count = 0;
6777                 u64 rsc_flush = 0;
6778                 for (i = 0; i < adapter->num_rx_queues; i++) {
6779                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6780                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6781                 }
6782                 adapter->rsc_total_count = rsc_count;
6783                 adapter->rsc_total_flush = rsc_flush;
6784         }
6785
6786         for (i = 0; i < adapter->num_rx_queues; i++) {
6787                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6788                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6789                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6790                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6791                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6792                 bytes += rx_ring->stats.bytes;
6793                 packets += rx_ring->stats.packets;
6794         }
6795         adapter->non_eop_descs = non_eop_descs;
6796         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6797         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6798         adapter->hw_csum_rx_error = hw_csum_rx_error;
6799         netdev->stats.rx_bytes = bytes;
6800         netdev->stats.rx_packets = packets;
6801
6802         bytes = 0;
6803         packets = 0;
6804         /* gather some stats to the adapter struct that are per queue */
6805         for (i = 0; i < adapter->num_tx_queues; i++) {
6806                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6807                 restart_queue += tx_ring->tx_stats.restart_queue;
6808                 tx_busy += tx_ring->tx_stats.tx_busy;
6809                 bytes += tx_ring->stats.bytes;
6810                 packets += tx_ring->stats.packets;
6811         }
6812         for (i = 0; i < adapter->num_xdp_queues; i++) {
6813                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6814
6815                 restart_queue += xdp_ring->tx_stats.restart_queue;
6816                 tx_busy += xdp_ring->tx_stats.tx_busy;
6817                 bytes += xdp_ring->stats.bytes;
6818                 packets += xdp_ring->stats.packets;
6819         }
6820         adapter->restart_queue = restart_queue;
6821         adapter->tx_busy = tx_busy;
6822         netdev->stats.tx_bytes = bytes;
6823         netdev->stats.tx_packets = packets;
6824
6825         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6826
6827         /* 8 register reads */
6828         for (i = 0; i < 8; i++) {
6829                 /* for packet buffers not used, the register should read 0 */
6830                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6831                 missed_rx += mpc;
6832                 hwstats->mpc[i] += mpc;
6833                 total_mpc += hwstats->mpc[i];
6834                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6835                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6836                 switch (hw->mac.type) {
6837                 case ixgbe_mac_82598EB:
6838                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6839                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6840                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6841                         hwstats->pxonrxc[i] +=
6842                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6843                         break;
6844                 case ixgbe_mac_82599EB:
6845                 case ixgbe_mac_X540:
6846                 case ixgbe_mac_X550:
6847                 case ixgbe_mac_X550EM_x:
6848                 case ixgbe_mac_x550em_a:
6849                         hwstats->pxonrxc[i] +=
6850                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6851                         break;
6852                 default:
6853                         break;
6854                 }
6855         }
6856
6857         /*16 register reads */
6858         for (i = 0; i < 16; i++) {
6859                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6860                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6861                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6862                     (hw->mac.type == ixgbe_mac_X540) ||
6863                     (hw->mac.type == ixgbe_mac_X550) ||
6864                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6865                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6866                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6867                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6868                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6869                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6870                 }
6871         }
6872
6873         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6874         /* work around hardware counting issue */
6875         hwstats->gprc -= missed_rx;
6876
6877         ixgbe_update_xoff_received(adapter);
6878
6879         /* 82598 hardware only has a 32 bit counter in the high register */
6880         switch (hw->mac.type) {
6881         case ixgbe_mac_82598EB:
6882                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6883                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6884                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6885                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6886                 break;
6887         case ixgbe_mac_X540:
6888         case ixgbe_mac_X550:
6889         case ixgbe_mac_X550EM_x:
6890         case ixgbe_mac_x550em_a:
6891                 /* OS2BMC stats are X540 and later */
6892                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6893                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6894                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6895                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6896                 /* fall through */
6897         case ixgbe_mac_82599EB:
6898                 for (i = 0; i < 16; i++)
6899                         adapter->hw_rx_no_dma_resources +=
6900                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6901                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6902                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6903                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6904                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6905                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6906                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6907                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6908                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6909                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6910 #ifdef IXGBE_FCOE
6911                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6912                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6913                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6914                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6915                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6916                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6917                 /* Add up per cpu counters for total ddp aloc fail */
6918                 if (adapter->fcoe.ddp_pool) {
6919                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6920                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6921                         unsigned int cpu;
6922                         u64 noddp = 0, noddp_ext_buff = 0;
6923                         for_each_possible_cpu(cpu) {
6924                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6925                                 noddp += ddp_pool->noddp;
6926                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6927                         }
6928                         hwstats->fcoe_noddp = noddp;
6929                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6930                 }
6931 #endif /* IXGBE_FCOE */
6932                 break;
6933         default:
6934                 break;
6935         }
6936         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6937         hwstats->bprc += bprc;
6938         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6939         if (hw->mac.type == ixgbe_mac_82598EB)
6940                 hwstats->mprc -= bprc;
6941         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6942         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6943         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6944         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6945         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6946         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6947         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6948         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6949         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6950         hwstats->lxontxc += lxon;
6951         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6952         hwstats->lxofftxc += lxoff;
6953         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6954         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6955         /*
6956          * 82598 errata - tx of flow control packets is included in tx counters
6957          */
6958         xon_off_tot = lxon + lxoff;
6959         hwstats->gptc -= xon_off_tot;
6960         hwstats->mptc -= xon_off_tot;
6961         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6962         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6963         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6964         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6965         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6966         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6967         hwstats->ptc64 -= xon_off_tot;
6968         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6969         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6970         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6971         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6972         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6973         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6974
6975         /* Fill out the OS statistics structure */
6976         netdev->stats.multicast = hwstats->mprc;
6977
6978         /* Rx Errors */
6979         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6980         netdev->stats.rx_dropped = 0;
6981         netdev->stats.rx_length_errors = hwstats->rlec;
6982         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6983         netdev->stats.rx_missed_errors = total_mpc;
6984 }
6985
6986 /**
6987  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6988  * @adapter: pointer to the device adapter structure
6989  **/
6990 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6991 {
6992         struct ixgbe_hw *hw = &adapter->hw;
6993         int i;
6994
6995         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6996                 return;
6997
6998         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6999
7000         /* if interface is down do nothing */
7001         if (test_bit(__IXGBE_DOWN, &adapter->state))
7002                 return;
7003
7004         /* do nothing if we are not using signature filters */
7005         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7006                 return;
7007
7008         adapter->fdir_overflow++;
7009
7010         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7011                 for (i = 0; i < adapter->num_tx_queues; i++)
7012                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7013                                 &(adapter->tx_ring[i]->state));
7014                 for (i = 0; i < adapter->num_xdp_queues; i++)
7015                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7016                                 &adapter->xdp_ring[i]->state);
7017                 /* re-enable flow director interrupts */
7018                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7019         } else {
7020                 e_err(probe, "failed to finish FDIR re-initialization, "
7021                       "ignored adding FDIR ATR filters\n");
7022         }
7023 }
7024
7025 /**
7026  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7027  * @adapter: pointer to the device adapter structure
7028  *
7029  * This function serves two purposes.  First it strobes the interrupt lines
7030  * in order to make certain interrupts are occurring.  Secondly it sets the
7031  * bits needed to check for TX hangs.  As a result we should immediately
7032  * determine if a hang has occurred.
7033  */
7034 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7035 {
7036         struct ixgbe_hw *hw = &adapter->hw;
7037         u64 eics = 0;
7038         int i;
7039
7040         /* If we're down, removing or resetting, just bail */
7041         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7042             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7043             test_bit(__IXGBE_RESETTING, &adapter->state))
7044                 return;
7045
7046         /* Force detection of hung controller */
7047         if (netif_carrier_ok(adapter->netdev)) {
7048                 for (i = 0; i < adapter->num_tx_queues; i++)
7049                         set_check_for_tx_hang(adapter->tx_ring[i]);
7050                 for (i = 0; i < adapter->num_xdp_queues; i++)
7051                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7052         }
7053
7054         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7055                 /*
7056                  * for legacy and MSI interrupts don't set any bits
7057                  * that are enabled for EIAM, because this operation
7058                  * would set *both* EIMS and EICS for any bit in EIAM
7059                  */
7060                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7061                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7062         } else {
7063                 /* get one bit for every active tx/rx interrupt vector */
7064                 for (i = 0; i < adapter->num_q_vectors; i++) {
7065                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7066                         if (qv->rx.ring || qv->tx.ring)
7067                                 eics |= BIT_ULL(i);
7068                 }
7069         }
7070
7071         /* Cause software interrupt to ensure rings are cleaned */
7072         ixgbe_irq_rearm_queues(adapter, eics);
7073 }
7074
7075 /**
7076  * ixgbe_watchdog_update_link - update the link status
7077  * @adapter: pointer to the device adapter structure
7078  * @link_speed: pointer to a u32 to store the link_speed
7079  **/
7080 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7081 {
7082         struct ixgbe_hw *hw = &adapter->hw;
7083         u32 link_speed = adapter->link_speed;
7084         bool link_up = adapter->link_up;
7085         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7086
7087         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7088                 return;
7089
7090         if (hw->mac.ops.check_link) {
7091                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7092         } else {
7093                 /* always assume link is up, if no check link function */
7094                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7095                 link_up = true;
7096         }
7097
7098         if (adapter->ixgbe_ieee_pfc)
7099                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7100
7101         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7102                 hw->mac.ops.fc_enable(hw);
7103                 ixgbe_set_rx_drop_en(adapter);
7104         }
7105
7106         if (link_up ||
7107             time_after(jiffies, (adapter->link_check_timeout +
7108                                  IXGBE_TRY_LINK_TIMEOUT))) {
7109                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7110                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7111                 IXGBE_WRITE_FLUSH(hw);
7112         }
7113
7114         adapter->link_up = link_up;
7115         adapter->link_speed = link_speed;
7116 }
7117
7118 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7119 {
7120 #ifdef CONFIG_IXGBE_DCB
7121         struct net_device *netdev = adapter->netdev;
7122         struct dcb_app app = {
7123                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7124                               .protocol = 0,
7125                              };
7126         u8 up = 0;
7127
7128         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7129                 up = dcb_ieee_getapp_mask(netdev, &app);
7130
7131         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7132 #endif
7133 }
7134
7135 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
7136 {
7137         if (netif_is_macvlan(upper)) {
7138                 struct macvlan_dev *vlan = netdev_priv(upper);
7139
7140                 if (vlan->fwd_priv)
7141                         netif_tx_wake_all_queues(upper);
7142         }
7143
7144         return 0;
7145 }
7146
7147 /**
7148  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7149  *                             print link up message
7150  * @adapter: pointer to the device adapter structure
7151  **/
7152 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7153 {
7154         struct net_device *netdev = adapter->netdev;
7155         struct ixgbe_hw *hw = &adapter->hw;
7156         u32 link_speed = adapter->link_speed;
7157         const char *speed_str;
7158         bool flow_rx, flow_tx;
7159
7160         /* only continue if link was previously down */
7161         if (netif_carrier_ok(netdev))
7162                 return;
7163
7164         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7165
7166         switch (hw->mac.type) {
7167         case ixgbe_mac_82598EB: {
7168                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7169                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7170                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7171                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7172         }
7173                 break;
7174         case ixgbe_mac_X540:
7175         case ixgbe_mac_X550:
7176         case ixgbe_mac_X550EM_x:
7177         case ixgbe_mac_x550em_a:
7178         case ixgbe_mac_82599EB: {
7179                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7180                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7181                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7182                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7183         }
7184                 break;
7185         default:
7186                 flow_tx = false;
7187                 flow_rx = false;
7188                 break;
7189         }
7190
7191         adapter->last_rx_ptp_check = jiffies;
7192
7193         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7194                 ixgbe_ptp_start_cyclecounter(adapter);
7195
7196         switch (link_speed) {
7197         case IXGBE_LINK_SPEED_10GB_FULL:
7198                 speed_str = "10 Gbps";
7199                 break;
7200         case IXGBE_LINK_SPEED_2_5GB_FULL:
7201                 speed_str = "2.5 Gbps";
7202                 break;
7203         case IXGBE_LINK_SPEED_1GB_FULL:
7204                 speed_str = "1 Gbps";
7205                 break;
7206         case IXGBE_LINK_SPEED_100_FULL:
7207                 speed_str = "100 Mbps";
7208                 break;
7209         case IXGBE_LINK_SPEED_10_FULL:
7210                 speed_str = "10 Mbps";
7211                 break;
7212         default:
7213                 speed_str = "unknown speed";
7214                 break;
7215         }
7216         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7217                ((flow_rx && flow_tx) ? "RX/TX" :
7218                (flow_rx ? "RX" :
7219                (flow_tx ? "TX" : "None"))));
7220
7221         netif_carrier_on(netdev);
7222         ixgbe_check_vf_rate_limit(adapter);
7223
7224         /* enable transmits */
7225         netif_tx_wake_all_queues(adapter->netdev);
7226
7227         /* enable any upper devices */
7228         rtnl_lock();
7229         netdev_walk_all_upper_dev_rcu(adapter->netdev,
7230                                       ixgbe_enable_macvlan, NULL);
7231         rtnl_unlock();
7232
7233         /* update the default user priority for VFs */
7234         ixgbe_update_default_up(adapter);
7235
7236         /* ping all the active vfs to let them know link has changed */
7237         ixgbe_ping_all_vfs(adapter);
7238 }
7239
7240 /**
7241  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7242  *                               print link down message
7243  * @adapter: pointer to the adapter structure
7244  **/
7245 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7246 {
7247         struct net_device *netdev = adapter->netdev;
7248         struct ixgbe_hw *hw = &adapter->hw;
7249
7250         adapter->link_up = false;
7251         adapter->link_speed = 0;
7252
7253         /* only continue if link was up previously */
7254         if (!netif_carrier_ok(netdev))
7255                 return;
7256
7257         /* poll for SFP+ cable when link is down */
7258         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7259                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7260
7261         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7262                 ixgbe_ptp_start_cyclecounter(adapter);
7263
7264         e_info(drv, "NIC Link is Down\n");
7265         netif_carrier_off(netdev);
7266
7267         /* ping all the active vfs to let them know link has changed */
7268         ixgbe_ping_all_vfs(adapter);
7269 }
7270
7271 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7272 {
7273         int i;
7274
7275         for (i = 0; i < adapter->num_tx_queues; i++) {
7276                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7277
7278                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7279                         return true;
7280         }
7281
7282         for (i = 0; i < adapter->num_xdp_queues; i++) {
7283                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7284
7285                 if (ring->next_to_use != ring->next_to_clean)
7286                         return true;
7287         }
7288
7289         return false;
7290 }
7291
7292 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7293 {
7294         struct ixgbe_hw *hw = &adapter->hw;
7295         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7296         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7297
7298         int i, j;
7299
7300         if (!adapter->num_vfs)
7301                 return false;
7302
7303         /* resetting the PF is only needed for MAC before X550 */
7304         if (hw->mac.type >= ixgbe_mac_X550)
7305                 return false;
7306
7307         for (i = 0; i < adapter->num_vfs; i++) {
7308                 for (j = 0; j < q_per_pool; j++) {
7309                         u32 h, t;
7310
7311                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7312                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7313
7314                         if (h != t)
7315                                 return true;
7316                 }
7317         }
7318
7319         return false;
7320 }
7321
7322 /**
7323  * ixgbe_watchdog_flush_tx - flush queues on link down
7324  * @adapter: pointer to the device adapter structure
7325  **/
7326 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7327 {
7328         if (!netif_carrier_ok(adapter->netdev)) {
7329                 if (ixgbe_ring_tx_pending(adapter) ||
7330                     ixgbe_vf_tx_pending(adapter)) {
7331                         /* We've lost link, so the controller stops DMA,
7332                          * but we've got queued Tx work that's never going
7333                          * to get done, so reset controller to flush Tx.
7334                          * (Do the reset outside of interrupt context).
7335                          */
7336                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7337                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7338                 }
7339         }
7340 }
7341
7342 #ifdef CONFIG_PCI_IOV
7343 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7344 {
7345         struct ixgbe_hw *hw = &adapter->hw;
7346         struct pci_dev *pdev = adapter->pdev;
7347         unsigned int vf;
7348         u32 gpc;
7349
7350         if (!(netif_carrier_ok(adapter->netdev)))
7351                 return;
7352
7353         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7354         if (gpc) /* If incrementing then no need for the check below */
7355                 return;
7356         /* Check to see if a bad DMA write target from an errant or
7357          * malicious VF has caused a PCIe error.  If so then we can
7358          * issue a VFLR to the offending VF(s) and then resume without
7359          * requesting a full slot reset.
7360          */
7361
7362         if (!pdev)
7363                 return;
7364
7365         /* check status reg for all VFs owned by this PF */
7366         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7367                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7368                 u16 status_reg;
7369
7370                 if (!vfdev)
7371                         continue;
7372                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7373                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7374                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7375                         pcie_flr(vfdev);
7376         }
7377 }
7378
7379 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7380 {
7381         u32 ssvpc;
7382
7383         /* Do not perform spoof check for 82598 or if not in IOV mode */
7384         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7385             adapter->num_vfs == 0)
7386                 return;
7387
7388         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7389
7390         /*
7391          * ssvpc register is cleared on read, if zero then no
7392          * spoofed packets in the last interval.
7393          */
7394         if (!ssvpc)
7395                 return;
7396
7397         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7398 }
7399 #else
7400 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7401 {
7402 }
7403
7404 static void
7405 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7406 {
7407 }
7408 #endif /* CONFIG_PCI_IOV */
7409
7410
7411 /**
7412  * ixgbe_watchdog_subtask - check and bring link up
7413  * @adapter: pointer to the device adapter structure
7414  **/
7415 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7416 {
7417         /* if interface is down, removing or resetting, do nothing */
7418         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7419             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7420             test_bit(__IXGBE_RESETTING, &adapter->state))
7421                 return;
7422
7423         ixgbe_watchdog_update_link(adapter);
7424
7425         if (adapter->link_up)
7426                 ixgbe_watchdog_link_is_up(adapter);
7427         else
7428                 ixgbe_watchdog_link_is_down(adapter);
7429
7430         ixgbe_check_for_bad_vf(adapter);
7431         ixgbe_spoof_check(adapter);
7432         ixgbe_update_stats(adapter);
7433
7434         ixgbe_watchdog_flush_tx(adapter);
7435 }
7436
7437 /**
7438  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7439  * @adapter: the ixgbe adapter structure
7440  **/
7441 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7442 {
7443         struct ixgbe_hw *hw = &adapter->hw;
7444         s32 err;
7445
7446         /* not searching for SFP so there is nothing to do here */
7447         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7448             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7449                 return;
7450
7451         if (adapter->sfp_poll_time &&
7452             time_after(adapter->sfp_poll_time, jiffies))
7453                 return; /* If not yet time to poll for SFP */
7454
7455         /* someone else is in init, wait until next service event */
7456         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7457                 return;
7458
7459         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7460
7461         err = hw->phy.ops.identify_sfp(hw);
7462         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7463                 goto sfp_out;
7464
7465         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7466                 /* If no cable is present, then we need to reset
7467                  * the next time we find a good cable. */
7468                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7469         }
7470
7471         /* exit on error */
7472         if (err)
7473                 goto sfp_out;
7474
7475         /* exit if reset not needed */
7476         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7477                 goto sfp_out;
7478
7479         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7480
7481         /*
7482          * A module may be identified correctly, but the EEPROM may not have
7483          * support for that module.  setup_sfp() will fail in that case, so
7484          * we should not allow that module to load.
7485          */
7486         if (hw->mac.type == ixgbe_mac_82598EB)
7487                 err = hw->phy.ops.reset(hw);
7488         else
7489                 err = hw->mac.ops.setup_sfp(hw);
7490
7491         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7492                 goto sfp_out;
7493
7494         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7495         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7496
7497 sfp_out:
7498         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7499
7500         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7501             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7502                 e_dev_err("failed to initialize because an unsupported "
7503                           "SFP+ module type was detected.\n");
7504                 e_dev_err("Reload the driver after installing a "
7505                           "supported module.\n");
7506                 unregister_netdev(adapter->netdev);
7507         }
7508 }
7509
7510 /**
7511  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7512  * @adapter: the ixgbe adapter structure
7513  **/
7514 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7515 {
7516         struct ixgbe_hw *hw = &adapter->hw;
7517         u32 speed;
7518         bool autoneg = false;
7519
7520         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7521                 return;
7522
7523         /* someone else is in init, wait until next service event */
7524         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7525                 return;
7526
7527         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7528
7529         speed = hw->phy.autoneg_advertised;
7530         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7531                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7532
7533                 /* setup the highest link when no autoneg */
7534                 if (!autoneg) {
7535                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7536                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7537                 }
7538         }
7539
7540         if (hw->mac.ops.setup_link)
7541                 hw->mac.ops.setup_link(hw, speed, true);
7542
7543         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7544         adapter->link_check_timeout = jiffies;
7545         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7546 }
7547
7548 /**
7549  * ixgbe_service_timer - Timer Call-back
7550  * @data: pointer to adapter cast into an unsigned long
7551  **/
7552 static void ixgbe_service_timer(unsigned long data)
7553 {
7554         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7555         unsigned long next_event_offset;
7556
7557         /* poll faster when waiting for link */
7558         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7559                 next_event_offset = HZ / 10;
7560         else
7561                 next_event_offset = HZ * 2;
7562
7563         /* Reset the timer */
7564         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7565
7566         ixgbe_service_event_schedule(adapter);
7567 }
7568
7569 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7570 {
7571         struct ixgbe_hw *hw = &adapter->hw;
7572         u32 status;
7573
7574         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7575                 return;
7576
7577         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7578
7579         if (!hw->phy.ops.handle_lasi)
7580                 return;
7581
7582         status = hw->phy.ops.handle_lasi(&adapter->hw);
7583         if (status != IXGBE_ERR_OVERTEMP)
7584                 return;
7585
7586         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7587 }
7588
7589 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7590 {
7591         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7592                 return;
7593
7594         /* If we're already down, removing or resetting, just bail */
7595         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7596             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7597             test_bit(__IXGBE_RESETTING, &adapter->state))
7598                 return;
7599
7600         ixgbe_dump(adapter);
7601         netdev_err(adapter->netdev, "Reset adapter\n");
7602         adapter->tx_timeout_count++;
7603
7604         rtnl_lock();
7605         ixgbe_reinit_locked(adapter);
7606         rtnl_unlock();
7607 }
7608
7609 /**
7610  * ixgbe_service_task - manages and runs subtasks
7611  * @work: pointer to work_struct containing our data
7612  **/
7613 static void ixgbe_service_task(struct work_struct *work)
7614 {
7615         struct ixgbe_adapter *adapter = container_of(work,
7616                                                      struct ixgbe_adapter,
7617                                                      service_task);
7618         if (ixgbe_removed(adapter->hw.hw_addr)) {
7619                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7620                         rtnl_lock();
7621                         ixgbe_down(adapter);
7622                         rtnl_unlock();
7623                 }
7624                 ixgbe_service_event_complete(adapter);
7625                 return;
7626         }
7627         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7628                 rtnl_lock();
7629                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7630                 udp_tunnel_get_rx_info(adapter->netdev);
7631                 rtnl_unlock();
7632         }
7633         ixgbe_reset_subtask(adapter);
7634         ixgbe_phy_interrupt_subtask(adapter);
7635         ixgbe_sfp_detection_subtask(adapter);
7636         ixgbe_sfp_link_config_subtask(adapter);
7637         ixgbe_check_overtemp_subtask(adapter);
7638         ixgbe_watchdog_subtask(adapter);
7639         ixgbe_fdir_reinit_subtask(adapter);
7640         ixgbe_check_hang_subtask(adapter);
7641
7642         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7643                 ixgbe_ptp_overflow_check(adapter);
7644                 ixgbe_ptp_rx_hang(adapter);
7645                 ixgbe_ptp_tx_hang(adapter);
7646         }
7647
7648         ixgbe_service_event_complete(adapter);
7649 }
7650
7651 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7652                      struct ixgbe_tx_buffer *first,
7653                      u8 *hdr_len)
7654 {
7655         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7656         struct sk_buff *skb = first->skb;
7657         union {
7658                 struct iphdr *v4;
7659                 struct ipv6hdr *v6;
7660                 unsigned char *hdr;
7661         } ip;
7662         union {
7663                 struct tcphdr *tcp;
7664                 unsigned char *hdr;
7665         } l4;
7666         u32 paylen, l4_offset;
7667         int err;
7668
7669         if (skb->ip_summed != CHECKSUM_PARTIAL)
7670                 return 0;
7671
7672         if (!skb_is_gso(skb))
7673                 return 0;
7674
7675         err = skb_cow_head(skb, 0);
7676         if (err < 0)
7677                 return err;
7678
7679         if (eth_p_mpls(first->protocol))
7680                 ip.hdr = skb_inner_network_header(skb);
7681         else
7682                 ip.hdr = skb_network_header(skb);
7683         l4.hdr = skb_checksum_start(skb);
7684
7685         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7686         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7687
7688         /* initialize outer IP header fields */
7689         if (ip.v4->version == 4) {
7690                 unsigned char *csum_start = skb_checksum_start(skb);
7691                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7692
7693                 /* IP header will have to cancel out any data that
7694                  * is not a part of the outer IP header
7695                  */
7696                 ip.v4->check = csum_fold(csum_partial(trans_start,
7697                                                       csum_start - trans_start,
7698                                                       0));
7699                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7700
7701                 ip.v4->tot_len = 0;
7702                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7703                                    IXGBE_TX_FLAGS_CSUM |
7704                                    IXGBE_TX_FLAGS_IPV4;
7705         } else {
7706                 ip.v6->payload_len = 0;
7707                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7708                                    IXGBE_TX_FLAGS_CSUM;
7709         }
7710
7711         /* determine offset of inner transport header */
7712         l4_offset = l4.hdr - skb->data;
7713
7714         /* compute length of segmentation header */
7715         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7716
7717         /* remove payload length from inner checksum */
7718         paylen = skb->len - l4_offset;
7719         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7720
7721         /* update gso size and bytecount with header size */
7722         first->gso_segs = skb_shinfo(skb)->gso_segs;
7723         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7724
7725         /* mss_l4len_id: use 0 as index for TSO */
7726         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7727         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7728
7729         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7730         vlan_macip_lens = l4.hdr - ip.hdr;
7731         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7732         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7733
7734         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7735                           mss_l4len_idx);
7736
7737         return 1;
7738 }
7739
7740 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7741 {
7742         unsigned int offset = 0;
7743
7744         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7745
7746         return offset == skb_checksum_start_offset(skb);
7747 }
7748
7749 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7750                           struct ixgbe_tx_buffer *first)
7751 {
7752         struct sk_buff *skb = first->skb;
7753         u32 vlan_macip_lens = 0;
7754         u32 type_tucmd = 0;
7755
7756         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7757 csum_failed:
7758                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7759                                          IXGBE_TX_FLAGS_CC)))
7760                         return;
7761                 goto no_csum;
7762         }
7763
7764         switch (skb->csum_offset) {
7765         case offsetof(struct tcphdr, check):
7766                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7767                 /* fall through */
7768         case offsetof(struct udphdr, check):
7769                 break;
7770         case offsetof(struct sctphdr, checksum):
7771                 /* validate that this is actually an SCTP request */
7772                 if (((first->protocol == htons(ETH_P_IP)) &&
7773                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7774                     ((first->protocol == htons(ETH_P_IPV6)) &&
7775                      ixgbe_ipv6_csum_is_sctp(skb))) {
7776                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7777                         break;
7778                 }
7779                 /* fall through */
7780         default:
7781                 skb_checksum_help(skb);
7782                 goto csum_failed;
7783         }
7784
7785         /* update TX checksum flag */
7786         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7787         vlan_macip_lens = skb_checksum_start_offset(skb) -
7788                           skb_network_offset(skb);
7789 no_csum:
7790         /* vlan_macip_lens: MACLEN, VLAN tag */
7791         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7792         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7793
7794         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7795 }
7796
7797 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7798         ((_flag <= _result) ? \
7799          ((u32)(_input & _flag) * (_result / _flag)) : \
7800          ((u32)(_input & _flag) / (_flag / _result)))
7801
7802 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7803 {
7804         /* set type for advanced descriptor with frame checksum insertion */
7805         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7806                        IXGBE_ADVTXD_DCMD_DEXT |
7807                        IXGBE_ADVTXD_DCMD_IFCS;
7808
7809         /* set HW vlan bit if vlan is present */
7810         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7811                                    IXGBE_ADVTXD_DCMD_VLE);
7812
7813         /* set segmentation enable bits for TSO/FSO */
7814         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7815                                    IXGBE_ADVTXD_DCMD_TSE);
7816
7817         /* set timestamp bit if present */
7818         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7819                                    IXGBE_ADVTXD_MAC_TSTAMP);
7820
7821         /* insert frame checksum */
7822         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7823
7824         return cmd_type;
7825 }
7826
7827 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7828                                    u32 tx_flags, unsigned int paylen)
7829 {
7830         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7831
7832         /* enable L4 checksum for TSO and TX checksum offload */
7833         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7834                                         IXGBE_TX_FLAGS_CSUM,
7835                                         IXGBE_ADVTXD_POPTS_TXSM);
7836
7837         /* enble IPv4 checksum for TSO */
7838         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7839                                         IXGBE_TX_FLAGS_IPV4,
7840                                         IXGBE_ADVTXD_POPTS_IXSM);
7841
7842         /*
7843          * Check Context must be set if Tx switch is enabled, which it
7844          * always is for case where virtual functions are running
7845          */
7846         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7847                                         IXGBE_TX_FLAGS_CC,
7848                                         IXGBE_ADVTXD_CC);
7849
7850         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7851 }
7852
7853 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7854 {
7855         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7856
7857         /* Herbert's original patch had:
7858          *  smp_mb__after_netif_stop_queue();
7859          * but since that doesn't exist yet, just open code it.
7860          */
7861         smp_mb();
7862
7863         /* We need to check again in a case another CPU has just
7864          * made room available.
7865          */
7866         if (likely(ixgbe_desc_unused(tx_ring) < size))
7867                 return -EBUSY;
7868
7869         /* A reprieve! - use start_queue because it doesn't call schedule */
7870         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7871         ++tx_ring->tx_stats.restart_queue;
7872         return 0;
7873 }
7874
7875 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7876 {
7877         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7878                 return 0;
7879
7880         return __ixgbe_maybe_stop_tx(tx_ring, size);
7881 }
7882
7883 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7884                        IXGBE_TXD_CMD_RS)
7885
7886 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7887                         struct ixgbe_tx_buffer *first,
7888                         const u8 hdr_len)
7889 {
7890         struct sk_buff *skb = first->skb;
7891         struct ixgbe_tx_buffer *tx_buffer;
7892         union ixgbe_adv_tx_desc *tx_desc;
7893         struct skb_frag_struct *frag;
7894         dma_addr_t dma;
7895         unsigned int data_len, size;
7896         u32 tx_flags = first->tx_flags;
7897         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7898         u16 i = tx_ring->next_to_use;
7899
7900         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7901
7902         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7903
7904         size = skb_headlen(skb);
7905         data_len = skb->data_len;
7906
7907 #ifdef IXGBE_FCOE
7908         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7909                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7910                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7911                         data_len = 0;
7912                 } else {
7913                         data_len -= sizeof(struct fcoe_crc_eof);
7914                 }
7915         }
7916
7917 #endif
7918         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7919
7920         tx_buffer = first;
7921
7922         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7923                 if (dma_mapping_error(tx_ring->dev, dma))
7924                         goto dma_error;
7925
7926                 /* record length, and DMA address */
7927                 dma_unmap_len_set(tx_buffer, len, size);
7928                 dma_unmap_addr_set(tx_buffer, dma, dma);
7929
7930                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7931
7932                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7933                         tx_desc->read.cmd_type_len =
7934                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7935
7936                         i++;
7937                         tx_desc++;
7938                         if (i == tx_ring->count) {
7939                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7940                                 i = 0;
7941                         }
7942                         tx_desc->read.olinfo_status = 0;
7943
7944                         dma += IXGBE_MAX_DATA_PER_TXD;
7945                         size -= IXGBE_MAX_DATA_PER_TXD;
7946
7947                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7948                 }
7949
7950                 if (likely(!data_len))
7951                         break;
7952
7953                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7954
7955                 i++;
7956                 tx_desc++;
7957                 if (i == tx_ring->count) {
7958                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7959                         i = 0;
7960                 }
7961                 tx_desc->read.olinfo_status = 0;
7962
7963 #ifdef IXGBE_FCOE
7964                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7965 #else
7966                 size = skb_frag_size(frag);
7967 #endif
7968                 data_len -= size;
7969
7970                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7971                                        DMA_TO_DEVICE);
7972
7973                 tx_buffer = &tx_ring->tx_buffer_info[i];
7974         }
7975
7976         /* write last descriptor with RS and EOP bits */
7977         cmd_type |= size | IXGBE_TXD_CMD;
7978         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7979
7980         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7981
7982         /* set the timestamp */
7983         first->time_stamp = jiffies;
7984
7985         /*
7986          * Force memory writes to complete before letting h/w know there
7987          * are new descriptors to fetch.  (Only applicable for weak-ordered
7988          * memory model archs, such as IA-64).
7989          *
7990          * We also need this memory barrier to make certain all of the
7991          * status bits have been updated before next_to_watch is written.
7992          */
7993         wmb();
7994
7995         /* set next_to_watch value indicating a packet is present */
7996         first->next_to_watch = tx_desc;
7997
7998         i++;
7999         if (i == tx_ring->count)
8000                 i = 0;
8001
8002         tx_ring->next_to_use = i;
8003
8004         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8005
8006         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8007                 writel(i, tx_ring->tail);
8008
8009                 /* we need this if more than one processor can write to our tail
8010                  * at a time, it synchronizes IO on IA64/Altix systems
8011                  */
8012                 mmiowb();
8013         }
8014
8015         return 0;
8016 dma_error:
8017         dev_err(tx_ring->dev, "TX DMA map failed\n");
8018         tx_buffer = &tx_ring->tx_buffer_info[i];
8019
8020         /* clear dma mappings for failed tx_buffer_info map */
8021         while (tx_buffer != first) {
8022                 if (dma_unmap_len(tx_buffer, len))
8023                         dma_unmap_page(tx_ring->dev,
8024                                        dma_unmap_addr(tx_buffer, dma),
8025                                        dma_unmap_len(tx_buffer, len),
8026                                        DMA_TO_DEVICE);
8027                 dma_unmap_len_set(tx_buffer, len, 0);
8028
8029                 if (i--)
8030                         i += tx_ring->count;
8031                 tx_buffer = &tx_ring->tx_buffer_info[i];
8032         }
8033
8034         if (dma_unmap_len(tx_buffer, len))
8035                 dma_unmap_single(tx_ring->dev,
8036                                  dma_unmap_addr(tx_buffer, dma),
8037                                  dma_unmap_len(tx_buffer, len),
8038                                  DMA_TO_DEVICE);
8039         dma_unmap_len_set(tx_buffer, len, 0);
8040
8041         dev_kfree_skb_any(first->skb);
8042         first->skb = NULL;
8043
8044         tx_ring->next_to_use = i;
8045
8046         return -1;
8047 }
8048
8049 static void ixgbe_atr(struct ixgbe_ring *ring,
8050                       struct ixgbe_tx_buffer *first)
8051 {
8052         struct ixgbe_q_vector *q_vector = ring->q_vector;
8053         union ixgbe_atr_hash_dword input = { .dword = 0 };
8054         union ixgbe_atr_hash_dword common = { .dword = 0 };
8055         union {
8056                 unsigned char *network;
8057                 struct iphdr *ipv4;
8058                 struct ipv6hdr *ipv6;
8059         } hdr;
8060         struct tcphdr *th;
8061         unsigned int hlen;
8062         struct sk_buff *skb;
8063         __be16 vlan_id;
8064         int l4_proto;
8065
8066         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8067         if (!q_vector)
8068                 return;
8069
8070         /* do nothing if sampling is disabled */
8071         if (!ring->atr_sample_rate)
8072                 return;
8073
8074         ring->atr_count++;
8075
8076         /* currently only IPv4/IPv6 with TCP is supported */
8077         if ((first->protocol != htons(ETH_P_IP)) &&
8078             (first->protocol != htons(ETH_P_IPV6)))
8079                 return;
8080
8081         /* snag network header to get L4 type and address */
8082         skb = first->skb;
8083         hdr.network = skb_network_header(skb);
8084         if (unlikely(hdr.network <= skb->data))
8085                 return;
8086         if (skb->encapsulation &&
8087             first->protocol == htons(ETH_P_IP) &&
8088             hdr.ipv4->protocol == IPPROTO_UDP) {
8089                 struct ixgbe_adapter *adapter = q_vector->adapter;
8090
8091                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8092                              VXLAN_HEADROOM))
8093                         return;
8094
8095                 /* verify the port is recognized as VXLAN */
8096                 if (adapter->vxlan_port &&
8097                     udp_hdr(skb)->dest == adapter->vxlan_port)
8098                         hdr.network = skb_inner_network_header(skb);
8099
8100                 if (adapter->geneve_port &&
8101                     udp_hdr(skb)->dest == adapter->geneve_port)
8102                         hdr.network = skb_inner_network_header(skb);
8103         }
8104
8105         /* Make sure we have at least [minimum IPv4 header + TCP]
8106          * or [IPv6 header] bytes
8107          */
8108         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8109                 return;
8110
8111         /* Currently only IPv4/IPv6 with TCP is supported */
8112         switch (hdr.ipv4->version) {
8113         case IPVERSION:
8114                 /* access ihl as u8 to avoid unaligned access on ia64 */
8115                 hlen = (hdr.network[0] & 0x0F) << 2;
8116                 l4_proto = hdr.ipv4->protocol;
8117                 break;
8118         case 6:
8119                 hlen = hdr.network - skb->data;
8120                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8121                 hlen -= hdr.network - skb->data;
8122                 break;
8123         default:
8124                 return;
8125         }
8126
8127         if (l4_proto != IPPROTO_TCP)
8128                 return;
8129
8130         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8131                      hlen + sizeof(struct tcphdr)))
8132                 return;
8133
8134         th = (struct tcphdr *)(hdr.network + hlen);
8135
8136         /* skip this packet since the socket is closing */
8137         if (th->fin)
8138                 return;
8139
8140         /* sample on all syn packets or once every atr sample count */
8141         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8142                 return;
8143
8144         /* reset sample count */
8145         ring->atr_count = 0;
8146
8147         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8148
8149         /*
8150          * src and dst are inverted, think how the receiver sees them
8151          *
8152          * The input is broken into two sections, a non-compressed section
8153          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8154          * is XORed together and stored in the compressed dword.
8155          */
8156         input.formatted.vlan_id = vlan_id;
8157
8158         /*
8159          * since src port and flex bytes occupy the same word XOR them together
8160          * and write the value to source port portion of compressed dword
8161          */
8162         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8163                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8164         else
8165                 common.port.src ^= th->dest ^ first->protocol;
8166         common.port.dst ^= th->source;
8167
8168         switch (hdr.ipv4->version) {
8169         case IPVERSION:
8170                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8171                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8172                 break;
8173         case 6:
8174                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8175                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8176                              hdr.ipv6->saddr.s6_addr32[1] ^
8177                              hdr.ipv6->saddr.s6_addr32[2] ^
8178                              hdr.ipv6->saddr.s6_addr32[3] ^
8179                              hdr.ipv6->daddr.s6_addr32[0] ^
8180                              hdr.ipv6->daddr.s6_addr32[1] ^
8181                              hdr.ipv6->daddr.s6_addr32[2] ^
8182                              hdr.ipv6->daddr.s6_addr32[3];
8183                 break;
8184         default:
8185                 break;
8186         }
8187
8188         if (hdr.network != skb_network_header(skb))
8189                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8190
8191         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8192         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8193                                               input, common, ring->queue_index);
8194 }
8195
8196 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8197                               void *accel_priv, select_queue_fallback_t fallback)
8198 {
8199         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
8200 #ifdef IXGBE_FCOE
8201         struct ixgbe_adapter *adapter;
8202         struct ixgbe_ring_feature *f;
8203         int txq;
8204 #endif
8205
8206         if (fwd_adapter)
8207                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
8208
8209 #ifdef IXGBE_FCOE
8210
8211         /*
8212          * only execute the code below if protocol is FCoE
8213          * or FIP and we have FCoE enabled on the adapter
8214          */
8215         switch (vlan_get_protocol(skb)) {
8216         case htons(ETH_P_FCOE):
8217         case htons(ETH_P_FIP):
8218                 adapter = netdev_priv(dev);
8219
8220                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
8221                         break;
8222                 /* fall through */
8223         default:
8224                 return fallback(dev, skb);
8225         }
8226
8227         f = &adapter->ring_feature[RING_F_FCOE];
8228
8229         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8230                                            smp_processor_id();
8231
8232         while (txq >= f->indices)
8233                 txq -= f->indices;
8234
8235         return txq + f->offset;
8236 #else
8237         return fallback(dev, skb);
8238 #endif
8239 }
8240
8241 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8242                                struct xdp_buff *xdp)
8243 {
8244         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8245         struct ixgbe_tx_buffer *tx_buffer;
8246         union ixgbe_adv_tx_desc *tx_desc;
8247         u32 len, cmd_type;
8248         dma_addr_t dma;
8249         u16 i;
8250
8251         len = xdp->data_end - xdp->data;
8252
8253         if (unlikely(!ixgbe_desc_unused(ring)))
8254                 return IXGBE_XDP_CONSUMED;
8255
8256         dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
8257         if (dma_mapping_error(ring->dev, dma))
8258                 return IXGBE_XDP_CONSUMED;
8259
8260         /* record the location of the first descriptor for this packet */
8261         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8262         tx_buffer->bytecount = len;
8263         tx_buffer->gso_segs = 1;
8264         tx_buffer->protocol = 0;
8265
8266         i = ring->next_to_use;
8267         tx_desc = IXGBE_TX_DESC(ring, i);
8268
8269         dma_unmap_len_set(tx_buffer, len, len);
8270         dma_unmap_addr_set(tx_buffer, dma, dma);
8271         tx_buffer->data = xdp->data;
8272         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8273
8274         /* put descriptor type bits */
8275         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8276                    IXGBE_ADVTXD_DCMD_DEXT |
8277                    IXGBE_ADVTXD_DCMD_IFCS;
8278         cmd_type |= len | IXGBE_TXD_CMD;
8279         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8280         tx_desc->read.olinfo_status =
8281                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8282
8283         /* Avoid any potential race with xdp_xmit and cleanup */
8284         smp_wmb();
8285
8286         /* set next_to_watch value indicating a packet is present */
8287         i++;
8288         if (i == ring->count)
8289                 i = 0;
8290
8291         tx_buffer->next_to_watch = tx_desc;
8292         ring->next_to_use = i;
8293
8294         return IXGBE_XDP_TX;
8295 }
8296
8297 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8298                           struct ixgbe_adapter *adapter,
8299                           struct ixgbe_ring *tx_ring)
8300 {
8301         struct ixgbe_tx_buffer *first;
8302         int tso;
8303         u32 tx_flags = 0;
8304         unsigned short f;
8305         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8306         __be16 protocol = skb->protocol;
8307         u8 hdr_len = 0;
8308
8309         /*
8310          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8311          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8312          *       + 2 desc gap to keep tail from touching head,
8313          *       + 1 desc for context descriptor,
8314          * otherwise try next time
8315          */
8316         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8317                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8318
8319         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8320                 tx_ring->tx_stats.tx_busy++;
8321                 return NETDEV_TX_BUSY;
8322         }
8323
8324         /* record the location of the first descriptor for this packet */
8325         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8326         first->skb = skb;
8327         first->bytecount = skb->len;
8328         first->gso_segs = 1;
8329
8330         /* if we have a HW VLAN tag being added default to the HW one */
8331         if (skb_vlan_tag_present(skb)) {
8332                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8333                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8334         /* else if it is a SW VLAN check the next protocol and store the tag */
8335         } else if (protocol == htons(ETH_P_8021Q)) {
8336                 struct vlan_hdr *vhdr, _vhdr;
8337                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8338                 if (!vhdr)
8339                         goto out_drop;
8340
8341                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8342                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8343                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8344         }
8345         protocol = vlan_get_protocol(skb);
8346
8347         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8348             adapter->ptp_clock) {
8349                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8350                                            &adapter->state)) {
8351                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8352                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8353
8354                         /* schedule check for Tx timestamp */
8355                         adapter->ptp_tx_skb = skb_get(skb);
8356                         adapter->ptp_tx_start = jiffies;
8357                         schedule_work(&adapter->ptp_tx_work);
8358                 } else {
8359                         adapter->tx_hwtstamp_skipped++;
8360                 }
8361         }
8362
8363         skb_tx_timestamp(skb);
8364
8365 #ifdef CONFIG_PCI_IOV
8366         /*
8367          * Use the l2switch_enable flag - would be false if the DMA
8368          * Tx switch had been disabled.
8369          */
8370         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8371                 tx_flags |= IXGBE_TX_FLAGS_CC;
8372
8373 #endif
8374         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8375         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8376             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8377              (skb->priority != TC_PRIO_CONTROL))) {
8378                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8379                 tx_flags |= (skb->priority & 0x7) <<
8380                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8381                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8382                         struct vlan_ethhdr *vhdr;
8383
8384                         if (skb_cow_head(skb, 0))
8385                                 goto out_drop;
8386                         vhdr = (struct vlan_ethhdr *)skb->data;
8387                         vhdr->h_vlan_TCI = htons(tx_flags >>
8388                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8389                 } else {
8390                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8391                 }
8392         }
8393
8394         /* record initial flags and protocol */
8395         first->tx_flags = tx_flags;
8396         first->protocol = protocol;
8397
8398 #ifdef IXGBE_FCOE
8399         /* setup tx offload for FCoE */
8400         if ((protocol == htons(ETH_P_FCOE)) &&
8401             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8402                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8403                 if (tso < 0)
8404                         goto out_drop;
8405
8406                 goto xmit_fcoe;
8407         }
8408
8409 #endif /* IXGBE_FCOE */
8410         tso = ixgbe_tso(tx_ring, first, &hdr_len);
8411         if (tso < 0)
8412                 goto out_drop;
8413         else if (!tso)
8414                 ixgbe_tx_csum(tx_ring, first);
8415
8416         /* add the ATR filter if ATR is on */
8417         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8418                 ixgbe_atr(tx_ring, first);
8419
8420 #ifdef IXGBE_FCOE
8421 xmit_fcoe:
8422 #endif /* IXGBE_FCOE */
8423         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8424                 goto cleanup_tx_timestamp;
8425
8426         return NETDEV_TX_OK;
8427
8428 out_drop:
8429         dev_kfree_skb_any(first->skb);
8430         first->skb = NULL;
8431 cleanup_tx_timestamp:
8432         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8433                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8434                 adapter->ptp_tx_skb = NULL;
8435                 cancel_work_sync(&adapter->ptp_tx_work);
8436                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8437         }
8438
8439         return NETDEV_TX_OK;
8440 }
8441
8442 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8443                                       struct net_device *netdev,
8444                                       struct ixgbe_ring *ring)
8445 {
8446         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8447         struct ixgbe_ring *tx_ring;
8448
8449         /*
8450          * The minimum packet size for olinfo paylen is 17 so pad the skb
8451          * in order to meet this minimum size requirement.
8452          */
8453         if (skb_put_padto(skb, 17))
8454                 return NETDEV_TX_OK;
8455
8456         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8457
8458         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8459 }
8460
8461 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8462                                     struct net_device *netdev)
8463 {
8464         return __ixgbe_xmit_frame(skb, netdev, NULL);
8465 }
8466
8467 /**
8468  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8469  * @netdev: network interface device structure
8470  * @p: pointer to an address structure
8471  *
8472  * Returns 0 on success, negative on failure
8473  **/
8474 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8475 {
8476         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8477         struct ixgbe_hw *hw = &adapter->hw;
8478         struct sockaddr *addr = p;
8479
8480         if (!is_valid_ether_addr(addr->sa_data))
8481                 return -EADDRNOTAVAIL;
8482
8483         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8484         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8485
8486         ixgbe_mac_set_default_filter(adapter);
8487
8488         return 0;
8489 }
8490
8491 static int
8492 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8493 {
8494         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8495         struct ixgbe_hw *hw = &adapter->hw;
8496         u16 value;
8497         int rc;
8498
8499         if (prtad != hw->phy.mdio.prtad)
8500                 return -EINVAL;
8501         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8502         if (!rc)
8503                 rc = value;
8504         return rc;
8505 }
8506
8507 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8508                             u16 addr, u16 value)
8509 {
8510         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8511         struct ixgbe_hw *hw = &adapter->hw;
8512
8513         if (prtad != hw->phy.mdio.prtad)
8514                 return -EINVAL;
8515         return hw->phy.ops.write_reg(hw, addr, devad, value);
8516 }
8517
8518 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8519 {
8520         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8521
8522         switch (cmd) {
8523         case SIOCSHWTSTAMP:
8524                 return ixgbe_ptp_set_ts_config(adapter, req);
8525         case SIOCGHWTSTAMP:
8526                 return ixgbe_ptp_get_ts_config(adapter, req);
8527         default:
8528                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8529         }
8530 }
8531
8532 /**
8533  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8534  * netdev->dev_addrs
8535  * @netdev: network interface device structure
8536  *
8537  * Returns non-zero on failure
8538  **/
8539 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8540 {
8541         int err = 0;
8542         struct ixgbe_adapter *adapter = netdev_priv(dev);
8543         struct ixgbe_hw *hw = &adapter->hw;
8544
8545         if (is_valid_ether_addr(hw->mac.san_addr)) {
8546                 rtnl_lock();
8547                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8548                 rtnl_unlock();
8549
8550                 /* update SAN MAC vmdq pool selection */
8551                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8552         }
8553         return err;
8554 }
8555
8556 /**
8557  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8558  * netdev->dev_addrs
8559  * @netdev: network interface device structure
8560  *
8561  * Returns non-zero on failure
8562  **/
8563 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8564 {
8565         int err = 0;
8566         struct ixgbe_adapter *adapter = netdev_priv(dev);
8567         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8568
8569         if (is_valid_ether_addr(mac->san_addr)) {
8570                 rtnl_lock();
8571                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8572                 rtnl_unlock();
8573         }
8574         return err;
8575 }
8576
8577 #ifdef CONFIG_NET_POLL_CONTROLLER
8578 /*
8579  * Polling 'interrupt' - used by things like netconsole to send skbs
8580  * without having to re-enable interrupts. It's not called while
8581  * the interrupt routine is executing.
8582  */
8583 static void ixgbe_netpoll(struct net_device *netdev)
8584 {
8585         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8586         int i;
8587
8588         /* if interface is down do nothing */
8589         if (test_bit(__IXGBE_DOWN, &adapter->state))
8590                 return;
8591
8592         /* loop through and schedule all active queues */
8593         for (i = 0; i < adapter->num_q_vectors; i++)
8594                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8595 }
8596
8597 #endif
8598
8599 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8600                                    struct ixgbe_ring *ring)
8601 {
8602         u64 bytes, packets;
8603         unsigned int start;
8604
8605         if (ring) {
8606                 do {
8607                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8608                         packets = ring->stats.packets;
8609                         bytes   = ring->stats.bytes;
8610                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8611                 stats->tx_packets += packets;
8612                 stats->tx_bytes   += bytes;
8613         }
8614 }
8615
8616 static void ixgbe_get_stats64(struct net_device *netdev,
8617                               struct rtnl_link_stats64 *stats)
8618 {
8619         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8620         int i;
8621
8622         rcu_read_lock();
8623         for (i = 0; i < adapter->num_rx_queues; i++) {
8624                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8625                 u64 bytes, packets;
8626                 unsigned int start;
8627
8628                 if (ring) {
8629                         do {
8630                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8631                                 packets = ring->stats.packets;
8632                                 bytes   = ring->stats.bytes;
8633                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8634                         stats->rx_packets += packets;
8635                         stats->rx_bytes   += bytes;
8636                 }
8637         }
8638
8639         for (i = 0; i < adapter->num_tx_queues; i++) {
8640                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8641
8642                 ixgbe_get_ring_stats64(stats, ring);
8643         }
8644         for (i = 0; i < adapter->num_xdp_queues; i++) {
8645                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->xdp_ring[i]);
8646
8647                 ixgbe_get_ring_stats64(stats, ring);
8648         }
8649         rcu_read_unlock();
8650
8651         /* following stats updated by ixgbe_watchdog_task() */
8652         stats->multicast        = netdev->stats.multicast;
8653         stats->rx_errors        = netdev->stats.rx_errors;
8654         stats->rx_length_errors = netdev->stats.rx_length_errors;
8655         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8656         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8657 }
8658
8659 #ifdef CONFIG_IXGBE_DCB
8660 /**
8661  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8662  * @adapter: pointer to ixgbe_adapter
8663  * @tc: number of traffic classes currently enabled
8664  *
8665  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8666  * 802.1Q priority maps to a packet buffer that exists.
8667  */
8668 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8669 {
8670         struct ixgbe_hw *hw = &adapter->hw;
8671         u32 reg, rsave;
8672         int i;
8673
8674         /* 82598 have a static priority to TC mapping that can not
8675          * be changed so no validation is needed.
8676          */
8677         if (hw->mac.type == ixgbe_mac_82598EB)
8678                 return;
8679
8680         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8681         rsave = reg;
8682
8683         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8684                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8685
8686                 /* If up2tc is out of bounds default to zero */
8687                 if (up2tc > tc)
8688                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8689         }
8690
8691         if (reg != rsave)
8692                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8693
8694         return;
8695 }
8696
8697 /**
8698  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8699  * @adapter: Pointer to adapter struct
8700  *
8701  * Populate the netdev user priority to tc map
8702  */
8703 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8704 {
8705         struct net_device *dev = adapter->netdev;
8706         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8707         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8708         u8 prio;
8709
8710         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8711                 u8 tc = 0;
8712
8713                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8714                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8715                 else if (ets)
8716                         tc = ets->prio_tc[prio];
8717
8718                 netdev_set_prio_tc_map(dev, prio, tc);
8719         }
8720 }
8721
8722 #endif /* CONFIG_IXGBE_DCB */
8723 /**
8724  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8725  *
8726  * @netdev: net device to configure
8727  * @tc: number of traffic classes to enable
8728  */
8729 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8730 {
8731         struct ixgbe_adapter *adapter = netdev_priv(dev);
8732         struct ixgbe_hw *hw = &adapter->hw;
8733         bool pools;
8734
8735         /* Hardware supports up to 8 traffic classes */
8736         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8737                 return -EINVAL;
8738
8739         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8740                 return -EINVAL;
8741
8742         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8743         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8744                 return -EBUSY;
8745
8746         /* Hardware has to reinitialize queues and interrupts to
8747          * match packet buffer alignment. Unfortunately, the
8748          * hardware is not flexible enough to do this dynamically.
8749          */
8750         if (netif_running(dev))
8751                 ixgbe_close(dev);
8752         else
8753                 ixgbe_reset(adapter);
8754
8755         ixgbe_clear_interrupt_scheme(adapter);
8756
8757 #ifdef CONFIG_IXGBE_DCB
8758         if (tc) {
8759                 netdev_set_num_tc(dev, tc);
8760                 ixgbe_set_prio_tc_map(adapter);
8761
8762                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8763
8764                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8765                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8766                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8767                 }
8768         } else {
8769                 netdev_reset_tc(dev);
8770
8771                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8772                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8773
8774                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8775
8776                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8777                 adapter->dcb_cfg.pfc_mode_enable = false;
8778         }
8779
8780         ixgbe_validate_rtr(adapter, tc);
8781
8782 #endif /* CONFIG_IXGBE_DCB */
8783         ixgbe_init_interrupt_scheme(adapter);
8784
8785         if (netif_running(dev))
8786                 return ixgbe_open(dev);
8787
8788         return 0;
8789 }
8790
8791 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8792                                struct tc_cls_u32_offload *cls)
8793 {
8794         u32 hdl = cls->knode.handle;
8795         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8796         u32 loc = cls->knode.handle & 0xfffff;
8797         int err = 0, i, j;
8798         struct ixgbe_jump_table *jump = NULL;
8799
8800         if (loc > IXGBE_MAX_HW_ENTRIES)
8801                 return -EINVAL;
8802
8803         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8804                 return -EINVAL;
8805
8806         /* Clear this filter in the link data it is associated with */
8807         if (uhtid != 0x800) {
8808                 jump = adapter->jump_tables[uhtid];
8809                 if (!jump)
8810                         return -EINVAL;
8811                 if (!test_bit(loc - 1, jump->child_loc_map))
8812                         return -EINVAL;
8813                 clear_bit(loc - 1, jump->child_loc_map);
8814         }
8815
8816         /* Check if the filter being deleted is a link */
8817         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8818                 jump = adapter->jump_tables[i];
8819                 if (jump && jump->link_hdl == hdl) {
8820                         /* Delete filters in the hardware in the child hash
8821                          * table associated with this link
8822                          */
8823                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8824                                 if (!test_bit(j, jump->child_loc_map))
8825                                         continue;
8826                                 spin_lock(&adapter->fdir_perfect_lock);
8827                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8828                                                                       NULL,
8829                                                                       j + 1);
8830                                 spin_unlock(&adapter->fdir_perfect_lock);
8831                                 clear_bit(j, jump->child_loc_map);
8832                         }
8833                         /* Remove resources for this link */
8834                         kfree(jump->input);
8835                         kfree(jump->mask);
8836                         kfree(jump);
8837                         adapter->jump_tables[i] = NULL;
8838                         return err;
8839                 }
8840         }
8841
8842         spin_lock(&adapter->fdir_perfect_lock);
8843         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8844         spin_unlock(&adapter->fdir_perfect_lock);
8845         return err;
8846 }
8847
8848 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8849                                             __be16 protocol,
8850                                             struct tc_cls_u32_offload *cls)
8851 {
8852         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8853
8854         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8855                 return -EINVAL;
8856
8857         /* This ixgbe devices do not support hash tables at the moment
8858          * so abort when given hash tables.
8859          */
8860         if (cls->hnode.divisor > 0)
8861                 return -EINVAL;
8862
8863         set_bit(uhtid - 1, &adapter->tables);
8864         return 0;
8865 }
8866
8867 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8868                                             struct tc_cls_u32_offload *cls)
8869 {
8870         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8871
8872         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8873                 return -EINVAL;
8874
8875         clear_bit(uhtid - 1, &adapter->tables);
8876         return 0;
8877 }
8878
8879 #ifdef CONFIG_NET_CLS_ACT
8880 struct upper_walk_data {
8881         struct ixgbe_adapter *adapter;
8882         u64 action;
8883         int ifindex;
8884         u8 queue;
8885 };
8886
8887 static int get_macvlan_queue(struct net_device *upper, void *_data)
8888 {
8889         if (netif_is_macvlan(upper)) {
8890                 struct macvlan_dev *dfwd = netdev_priv(upper);
8891                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8892                 struct upper_walk_data *data = _data;
8893                 struct ixgbe_adapter *adapter = data->adapter;
8894                 int ifindex = data->ifindex;
8895
8896                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8897                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8898                         data->action = data->queue;
8899                         return 1;
8900                 }
8901         }
8902
8903         return 0;
8904 }
8905
8906 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8907                                   u8 *queue, u64 *action)
8908 {
8909         unsigned int num_vfs = adapter->num_vfs, vf;
8910         struct upper_walk_data data;
8911         struct net_device *upper;
8912
8913         /* redirect to a SRIOV VF */
8914         for (vf = 0; vf < num_vfs; ++vf) {
8915                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8916                 if (upper->ifindex == ifindex) {
8917                         if (adapter->num_rx_pools > 1)
8918                                 *queue = vf * 2;
8919                         else
8920                                 *queue = vf * adapter->num_rx_queues_per_pool;
8921
8922                         *action = vf + 1;
8923                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8924                         return 0;
8925                 }
8926         }
8927
8928         /* redirect to a offloaded macvlan netdev */
8929         data.adapter = adapter;
8930         data.ifindex = ifindex;
8931         data.action = 0;
8932         data.queue = 0;
8933         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
8934                                           get_macvlan_queue, &data)) {
8935                 *action = data.action;
8936                 *queue = data.queue;
8937
8938                 return 0;
8939         }
8940
8941         return -EINVAL;
8942 }
8943
8944 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8945                             struct tcf_exts *exts, u64 *action, u8 *queue)
8946 {
8947         const struct tc_action *a;
8948         LIST_HEAD(actions);
8949         int err;
8950
8951         if (tc_no_actions(exts))
8952                 return -EINVAL;
8953
8954         tcf_exts_to_list(exts, &actions);
8955         list_for_each_entry(a, &actions, list) {
8956
8957                 /* Drop action */
8958                 if (is_tcf_gact_shot(a)) {
8959                         *action = IXGBE_FDIR_DROP_QUEUE;
8960                         *queue = IXGBE_FDIR_DROP_QUEUE;
8961                         return 0;
8962                 }
8963
8964                 /* Redirect to a VF or a offloaded macvlan */
8965                 if (is_tcf_mirred_egress_redirect(a)) {
8966                         int ifindex = tcf_mirred_ifindex(a);
8967
8968                         err = handle_redirect_action(adapter, ifindex, queue,
8969                                                      action);
8970                         if (err == 0)
8971                                 return err;
8972                 }
8973         }
8974
8975         return -EINVAL;
8976 }
8977 #else
8978 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8979                             struct tcf_exts *exts, u64 *action, u8 *queue)
8980 {
8981         return -EINVAL;
8982 }
8983 #endif /* CONFIG_NET_CLS_ACT */
8984
8985 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8986                                     union ixgbe_atr_input *mask,
8987                                     struct tc_cls_u32_offload *cls,
8988                                     struct ixgbe_mat_field *field_ptr,
8989                                     struct ixgbe_nexthdr *nexthdr)
8990 {
8991         int i, j, off;
8992         __be32 val, m;
8993         bool found_entry = false, found_jump_field = false;
8994
8995         for (i = 0; i < cls->knode.sel->nkeys; i++) {
8996                 off = cls->knode.sel->keys[i].off;
8997                 val = cls->knode.sel->keys[i].val;
8998                 m = cls->knode.sel->keys[i].mask;
8999
9000                 for (j = 0; field_ptr[j].val; j++) {
9001                         if (field_ptr[j].off == off) {
9002                                 field_ptr[j].val(input, mask, val, m);
9003                                 input->filter.formatted.flow_type |=
9004                                         field_ptr[j].type;
9005                                 found_entry = true;
9006                                 break;
9007                         }
9008                 }
9009                 if (nexthdr) {
9010                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9011                             nexthdr->val == cls->knode.sel->keys[i].val &&
9012                             nexthdr->mask == cls->knode.sel->keys[i].mask)
9013                                 found_jump_field = true;
9014                         else
9015                                 continue;
9016                 }
9017         }
9018
9019         if (nexthdr && !found_jump_field)
9020                 return -EINVAL;
9021
9022         if (!found_entry)
9023                 return 0;
9024
9025         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9026                                     IXGBE_ATR_L4TYPE_MASK;
9027
9028         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9029                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9030
9031         return 0;
9032 }
9033
9034 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9035                                   __be16 protocol,
9036                                   struct tc_cls_u32_offload *cls)
9037 {
9038         u32 loc = cls->knode.handle & 0xfffff;
9039         struct ixgbe_hw *hw = &adapter->hw;
9040         struct ixgbe_mat_field *field_ptr;
9041         struct ixgbe_fdir_filter *input = NULL;
9042         union ixgbe_atr_input *mask = NULL;
9043         struct ixgbe_jump_table *jump = NULL;
9044         int i, err = -EINVAL;
9045         u8 queue;
9046         u32 uhtid, link_uhtid;
9047
9048         uhtid = TC_U32_USERHTID(cls->knode.handle);
9049         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9050
9051         /* At the moment cls_u32 jumps to network layer and skips past
9052          * L2 headers. The canonical method to match L2 frames is to use
9053          * negative values. However this is error prone at best but really
9054          * just broken because there is no way to "know" what sort of hdr
9055          * is in front of the network layer. Fix cls_u32 to support L2
9056          * headers when needed.
9057          */
9058         if (protocol != htons(ETH_P_IP))
9059                 return err;
9060
9061         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9062                 e_err(drv, "Location out of range\n");
9063                 return err;
9064         }
9065
9066         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9067          * links and also the fields used to advance the parser across each
9068          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9069          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9070          * To add support for new nodes update ixgbe_model.h parse structures
9071          * this function _should_ be generic try not to hardcode values here.
9072          */
9073         if (uhtid == 0x800) {
9074                 field_ptr = (adapter->jump_tables[0])->mat;
9075         } else {
9076                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9077                         return err;
9078                 if (!adapter->jump_tables[uhtid])
9079                         return err;
9080                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9081         }
9082
9083         if (!field_ptr)
9084                 return err;
9085
9086         /* At this point we know the field_ptr is valid and need to either
9087          * build cls_u32 link or attach filter. Because adding a link to
9088          * a handle that does not exist is invalid and the same for adding
9089          * rules to handles that don't exist.
9090          */
9091
9092         if (link_uhtid) {
9093                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9094
9095                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9096                         return err;
9097
9098                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9099                         return err;
9100
9101                 /* Multiple filters as links to the same hash table are not
9102                  * supported. To add a new filter with the same next header
9103                  * but different match/jump conditions, create a new hash table
9104                  * and link to it.
9105                  */
9106                 if (adapter->jump_tables[link_uhtid] &&
9107                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9108                         e_err(drv, "Link filter exists for link: %x\n",
9109                               link_uhtid);
9110                         return err;
9111                 }
9112
9113                 for (i = 0; nexthdr[i].jump; i++) {
9114                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9115                             nexthdr[i].s != cls->knode.sel->offshift ||
9116                             nexthdr[i].m != cls->knode.sel->offmask)
9117                                 return err;
9118
9119                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9120                         if (!jump)
9121                                 return -ENOMEM;
9122                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9123                         if (!input) {
9124                                 err = -ENOMEM;
9125                                 goto free_jump;
9126                         }
9127                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9128                         if (!mask) {
9129                                 err = -ENOMEM;
9130                                 goto free_input;
9131                         }
9132                         jump->input = input;
9133                         jump->mask = mask;
9134                         jump->link_hdl = cls->knode.handle;
9135
9136                         err = ixgbe_clsu32_build_input(input, mask, cls,
9137                                                        field_ptr, &nexthdr[i]);
9138                         if (!err) {
9139                                 jump->mat = nexthdr[i].jump;
9140                                 adapter->jump_tables[link_uhtid] = jump;
9141                                 break;
9142                         }
9143                 }
9144                 return 0;
9145         }
9146
9147         input = kzalloc(sizeof(*input), GFP_KERNEL);
9148         if (!input)
9149                 return -ENOMEM;
9150         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9151         if (!mask) {
9152                 err = -ENOMEM;
9153                 goto free_input;
9154         }
9155
9156         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9157                 if ((adapter->jump_tables[uhtid])->input)
9158                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9159                                sizeof(*input));
9160                 if ((adapter->jump_tables[uhtid])->mask)
9161                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9162                                sizeof(*mask));
9163
9164                 /* Lookup in all child hash tables if this location is already
9165                  * filled with a filter
9166                  */
9167                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9168                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9169
9170                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9171                                 e_err(drv, "Filter exists in location: %x\n",
9172                                       loc);
9173                                 err = -EINVAL;
9174                                 goto err_out;
9175                         }
9176                 }
9177         }
9178         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9179         if (err)
9180                 goto err_out;
9181
9182         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9183                                &queue);
9184         if (err < 0)
9185                 goto err_out;
9186
9187         input->sw_idx = loc;
9188
9189         spin_lock(&adapter->fdir_perfect_lock);
9190
9191         if (hlist_empty(&adapter->fdir_filter_list)) {
9192                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9193                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9194                 if (err)
9195                         goto err_out_w_lock;
9196         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9197                 err = -EINVAL;
9198                 goto err_out_w_lock;
9199         }
9200
9201         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9202         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9203                                                     input->sw_idx, queue);
9204         if (!err)
9205                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9206         spin_unlock(&adapter->fdir_perfect_lock);
9207
9208         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9209                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9210
9211         kfree(mask);
9212         return err;
9213 err_out_w_lock:
9214         spin_unlock(&adapter->fdir_perfect_lock);
9215 err_out:
9216         kfree(mask);
9217 free_input:
9218         kfree(input);
9219 free_jump:
9220         kfree(jump);
9221         return err;
9222 }
9223
9224 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, u32 chain_index,
9225                             __be16 proto, struct tc_to_netdev *tc)
9226 {
9227         struct ixgbe_adapter *adapter = netdev_priv(dev);
9228
9229         if (chain_index)
9230                 return -EOPNOTSUPP;
9231
9232         if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
9233             tc->type == TC_SETUP_CLSU32) {
9234                 switch (tc->cls_u32->command) {
9235                 case TC_CLSU32_NEW_KNODE:
9236                 case TC_CLSU32_REPLACE_KNODE:
9237                         return ixgbe_configure_clsu32(adapter,
9238                                                       proto, tc->cls_u32);
9239                 case TC_CLSU32_DELETE_KNODE:
9240                         return ixgbe_delete_clsu32(adapter, tc->cls_u32);
9241                 case TC_CLSU32_NEW_HNODE:
9242                 case TC_CLSU32_REPLACE_HNODE:
9243                         return ixgbe_configure_clsu32_add_hnode(adapter, proto,
9244                                                                 tc->cls_u32);
9245                 case TC_CLSU32_DELETE_HNODE:
9246                         return ixgbe_configure_clsu32_del_hnode(adapter,
9247                                                                 tc->cls_u32);
9248                 default:
9249                         return -EINVAL;
9250                 }
9251         }
9252
9253         if (tc->type != TC_SETUP_MQPRIO)
9254                 return -EINVAL;
9255
9256         tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9257
9258         return ixgbe_setup_tc(dev, tc->mqprio->num_tc);
9259 }
9260
9261 #ifdef CONFIG_PCI_IOV
9262 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9263 {
9264         struct net_device *netdev = adapter->netdev;
9265
9266         rtnl_lock();
9267         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
9268         rtnl_unlock();
9269 }
9270
9271 #endif
9272 void ixgbe_do_reset(struct net_device *netdev)
9273 {
9274         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9275
9276         if (netif_running(netdev))
9277                 ixgbe_reinit_locked(adapter);
9278         else
9279                 ixgbe_reset(adapter);
9280 }
9281
9282 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9283                                             netdev_features_t features)
9284 {
9285         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9286
9287         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9288         if (!(features & NETIF_F_RXCSUM))
9289                 features &= ~NETIF_F_LRO;
9290
9291         /* Turn off LRO if not RSC capable */
9292         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9293                 features &= ~NETIF_F_LRO;
9294
9295         return features;
9296 }
9297
9298 static int ixgbe_set_features(struct net_device *netdev,
9299                               netdev_features_t features)
9300 {
9301         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9302         netdev_features_t changed = netdev->features ^ features;
9303         bool need_reset = false;
9304
9305         /* Make sure RSC matches LRO, reset if change */
9306         if (!(features & NETIF_F_LRO)) {
9307                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9308                         need_reset = true;
9309                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9310         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9311                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9312                 if (adapter->rx_itr_setting == 1 ||
9313                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9314                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9315                         need_reset = true;
9316                 } else if ((changed ^ features) & NETIF_F_LRO) {
9317                         e_info(probe, "rx-usecs set too low, "
9318                                "disabling RSC\n");
9319                 }
9320         }
9321
9322         /*
9323          * Check if Flow Director n-tuple support or hw_tc support was
9324          * enabled or disabled.  If the state changed, we need to reset.
9325          */
9326         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9327                 /* turn off ATR, enable perfect filters and reset */
9328                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9329                         need_reset = true;
9330
9331                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9332                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9333         } else {
9334                 /* turn off perfect filters, enable ATR and reset */
9335                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9336                         need_reset = true;
9337
9338                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9339
9340                 /* We cannot enable ATR if SR-IOV is enabled */
9341                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9342                     /* We cannot enable ATR if we have 2 or more tcs */
9343                     (netdev_get_num_tc(netdev) > 1) ||
9344                     /* We cannot enable ATR if RSS is disabled */
9345                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9346                     /* A sample rate of 0 indicates ATR disabled */
9347                     (!adapter->atr_sample_rate))
9348                         ; /* do nothing not supported */
9349                 else /* otherwise supported and set the flag */
9350                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9351         }
9352
9353         if (changed & NETIF_F_RXALL)
9354                 need_reset = true;
9355
9356         netdev->features = features;
9357
9358         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9359                 if (features & NETIF_F_RXCSUM) {
9360                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9361                 } else {
9362                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9363
9364                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9365                 }
9366         }
9367
9368         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9369                 if (features & NETIF_F_RXCSUM) {
9370                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9371                 } else {
9372                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9373
9374                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9375                 }
9376         }
9377
9378         if (need_reset)
9379                 ixgbe_do_reset(netdev);
9380         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9381                             NETIF_F_HW_VLAN_CTAG_FILTER))
9382                 ixgbe_set_rx_mode(netdev);
9383
9384         return 0;
9385 }
9386
9387 /**
9388  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9389  * @dev: The port's netdev
9390  * @ti: Tunnel endpoint information
9391  **/
9392 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9393                                       struct udp_tunnel_info *ti)
9394 {
9395         struct ixgbe_adapter *adapter = netdev_priv(dev);
9396         struct ixgbe_hw *hw = &adapter->hw;
9397         __be16 port = ti->port;
9398         u32 port_shift = 0;
9399         u32 reg;
9400
9401         if (ti->sa_family != AF_INET)
9402                 return;
9403
9404         switch (ti->type) {
9405         case UDP_TUNNEL_TYPE_VXLAN:
9406                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9407                         return;
9408
9409                 if (adapter->vxlan_port == port)
9410                         return;
9411
9412                 if (adapter->vxlan_port) {
9413                         netdev_info(dev,
9414                                     "VXLAN port %d set, not adding port %d\n",
9415                                     ntohs(adapter->vxlan_port),
9416                                     ntohs(port));
9417                         return;
9418                 }
9419
9420                 adapter->vxlan_port = port;
9421                 break;
9422         case UDP_TUNNEL_TYPE_GENEVE:
9423                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9424                         return;
9425
9426                 if (adapter->geneve_port == port)
9427                         return;
9428
9429                 if (adapter->geneve_port) {
9430                         netdev_info(dev,
9431                                     "GENEVE port %d set, not adding port %d\n",
9432                                     ntohs(adapter->geneve_port),
9433                                     ntohs(port));
9434                         return;
9435                 }
9436
9437                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9438                 adapter->geneve_port = port;
9439                 break;
9440         default:
9441                 return;
9442         }
9443
9444         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9445         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9446 }
9447
9448 /**
9449  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9450  * @dev: The port's netdev
9451  * @ti: Tunnel endpoint information
9452  **/
9453 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9454                                       struct udp_tunnel_info *ti)
9455 {
9456         struct ixgbe_adapter *adapter = netdev_priv(dev);
9457         u32 port_mask;
9458
9459         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9460             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9461                 return;
9462
9463         if (ti->sa_family != AF_INET)
9464                 return;
9465
9466         switch (ti->type) {
9467         case UDP_TUNNEL_TYPE_VXLAN:
9468                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9469                         return;
9470
9471                 if (adapter->vxlan_port != ti->port) {
9472                         netdev_info(dev, "VXLAN port %d not found\n",
9473                                     ntohs(ti->port));
9474                         return;
9475                 }
9476
9477                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9478                 break;
9479         case UDP_TUNNEL_TYPE_GENEVE:
9480                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9481                         return;
9482
9483                 if (adapter->geneve_port != ti->port) {
9484                         netdev_info(dev, "GENEVE port %d not found\n",
9485                                     ntohs(ti->port));
9486                         return;
9487                 }
9488
9489                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9490                 break;
9491         default:
9492                 return;
9493         }
9494
9495         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9496         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9497 }
9498
9499 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9500                              struct net_device *dev,
9501                              const unsigned char *addr, u16 vid,
9502                              u16 flags)
9503 {
9504         /* guarantee we can provide a unique filter for the unicast address */
9505         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9506                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9507                 u16 pool = VMDQ_P(0);
9508
9509                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9510                         return -ENOMEM;
9511         }
9512
9513         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9514 }
9515
9516 /**
9517  * ixgbe_configure_bridge_mode - set various bridge modes
9518  * @adapter - the private structure
9519  * @mode - requested bridge mode
9520  *
9521  * Configure some settings require for various bridge modes.
9522  **/
9523 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9524                                        __u16 mode)
9525 {
9526         struct ixgbe_hw *hw = &adapter->hw;
9527         unsigned int p, num_pools;
9528         u32 vmdctl;
9529
9530         switch (mode) {
9531         case BRIDGE_MODE_VEPA:
9532                 /* disable Tx loopback, rely on switch hairpin mode */
9533                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9534
9535                 /* must enable Rx switching replication to allow multicast
9536                  * packet reception on all VFs, and to enable source address
9537                  * pruning.
9538                  */
9539                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9540                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9541                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9542
9543                 /* enable Rx source address pruning. Note, this requires
9544                  * replication to be enabled or else it does nothing.
9545                  */
9546                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9547                 for (p = 0; p < num_pools; p++) {
9548                         if (hw->mac.ops.set_source_address_pruning)
9549                                 hw->mac.ops.set_source_address_pruning(hw,
9550                                                                        true,
9551                                                                        p);
9552                 }
9553                 break;
9554         case BRIDGE_MODE_VEB:
9555                 /* enable Tx loopback for internal VF/PF communication */
9556                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9557                                 IXGBE_PFDTXGSWC_VT_LBEN);
9558
9559                 /* disable Rx switching replication unless we have SR-IOV
9560                  * virtual functions
9561                  */
9562                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9563                 if (!adapter->num_vfs)
9564                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9565                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9566
9567                 /* disable Rx source address pruning, since we don't expect to
9568                  * be receiving external loopback of our transmitted frames.
9569                  */
9570                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9571                 for (p = 0; p < num_pools; p++) {
9572                         if (hw->mac.ops.set_source_address_pruning)
9573                                 hw->mac.ops.set_source_address_pruning(hw,
9574                                                                        false,
9575                                                                        p);
9576                 }
9577                 break;
9578         default:
9579                 return -EINVAL;
9580         }
9581
9582         adapter->bridge_mode = mode;
9583
9584         e_info(drv, "enabling bridge mode: %s\n",
9585                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9586
9587         return 0;
9588 }
9589
9590 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9591                                     struct nlmsghdr *nlh, u16 flags)
9592 {
9593         struct ixgbe_adapter *adapter = netdev_priv(dev);
9594         struct nlattr *attr, *br_spec;
9595         int rem;
9596
9597         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9598                 return -EOPNOTSUPP;
9599
9600         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9601         if (!br_spec)
9602                 return -EINVAL;
9603
9604         nla_for_each_nested(attr, br_spec, rem) {
9605                 int status;
9606                 __u16 mode;
9607
9608                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9609                         continue;
9610
9611                 if (nla_len(attr) < sizeof(mode))
9612                         return -EINVAL;
9613
9614                 mode = nla_get_u16(attr);
9615                 status = ixgbe_configure_bridge_mode(adapter, mode);
9616                 if (status)
9617                         return status;
9618
9619                 break;
9620         }
9621
9622         return 0;
9623 }
9624
9625 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9626                                     struct net_device *dev,
9627                                     u32 filter_mask, int nlflags)
9628 {
9629         struct ixgbe_adapter *adapter = netdev_priv(dev);
9630
9631         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9632                 return 0;
9633
9634         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9635                                        adapter->bridge_mode, 0, 0, nlflags,
9636                                        filter_mask, NULL);
9637 }
9638
9639 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9640 {
9641         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9642         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9643         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9644         unsigned int limit;
9645         int pool, err;
9646
9647         /* Hardware has a limited number of available pools. Each VF, and the
9648          * PF require a pool. Check to ensure we don't attempt to use more
9649          * then the available number of pools.
9650          */
9651         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9652                 return ERR_PTR(-EINVAL);
9653
9654 #ifdef CONFIG_RPS
9655         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9656                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9657                             vdev->name);
9658                 return ERR_PTR(-EINVAL);
9659         }
9660 #endif
9661         /* Check for hardware restriction on number of rx/tx queues */
9662         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9663             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9664                 netdev_info(pdev,
9665                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9666                             pdev->name);
9667                 return ERR_PTR(-EINVAL);
9668         }
9669
9670         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9671               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9672             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9673                 return ERR_PTR(-EBUSY);
9674
9675         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9676         if (!fwd_adapter)
9677                 return ERR_PTR(-ENOMEM);
9678
9679         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9680         adapter->num_rx_pools++;
9681         set_bit(pool, &adapter->fwd_bitmask);
9682         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9683
9684         /* Enable VMDq flag so device will be set in VM mode */
9685         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9686         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9687         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9688
9689         /* Force reinit of ring allocation with VMDQ enabled */
9690         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9691         if (err)
9692                 goto fwd_add_err;
9693         fwd_adapter->pool = pool;
9694         fwd_adapter->real_adapter = adapter;
9695
9696         if (netif_running(pdev)) {
9697                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9698                 if (err)
9699                         goto fwd_add_err;
9700                 netif_tx_start_all_queues(vdev);
9701         }
9702
9703         return fwd_adapter;
9704 fwd_add_err:
9705         /* unwind counter and free adapter struct */
9706         netdev_info(pdev,
9707                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9708         clear_bit(pool, &adapter->fwd_bitmask);
9709         adapter->num_rx_pools--;
9710         kfree(fwd_adapter);
9711         return ERR_PTR(err);
9712 }
9713
9714 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9715 {
9716         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9717         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9718         unsigned int limit;
9719
9720         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9721         adapter->num_rx_pools--;
9722
9723         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9724         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9725         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9726         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9727         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9728                    fwd_adapter->pool, adapter->num_rx_pools,
9729                    fwd_adapter->rx_base_queue,
9730                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9731                    adapter->fwd_bitmask);
9732         kfree(fwd_adapter);
9733 }
9734
9735 #define IXGBE_MAX_MAC_HDR_LEN           127
9736 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9737
9738 static netdev_features_t
9739 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9740                      netdev_features_t features)
9741 {
9742         unsigned int network_hdr_len, mac_hdr_len;
9743
9744         /* Make certain the headers can be described by a context descriptor */
9745         mac_hdr_len = skb_network_header(skb) - skb->data;
9746         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9747                 return features & ~(NETIF_F_HW_CSUM |
9748                                     NETIF_F_SCTP_CRC |
9749                                     NETIF_F_HW_VLAN_CTAG_TX |
9750                                     NETIF_F_TSO |
9751                                     NETIF_F_TSO6);
9752
9753         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9754         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9755                 return features & ~(NETIF_F_HW_CSUM |
9756                                     NETIF_F_SCTP_CRC |
9757                                     NETIF_F_TSO |
9758                                     NETIF_F_TSO6);
9759
9760         /* We can only support IPV4 TSO in tunnels if we can mangle the
9761          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9762          */
9763         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9764                 features &= ~NETIF_F_TSO;
9765
9766         return features;
9767 }
9768
9769 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
9770 {
9771         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
9772         struct ixgbe_adapter *adapter = netdev_priv(dev);
9773         struct bpf_prog *old_prog;
9774
9775         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
9776                 return -EINVAL;
9777
9778         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
9779                 return -EINVAL;
9780
9781         /* verify ixgbe ring attributes are sufficient for XDP */
9782         for (i = 0; i < adapter->num_rx_queues; i++) {
9783                 struct ixgbe_ring *ring = adapter->rx_ring[i];
9784
9785                 if (ring_is_rsc_enabled(ring))
9786                         return -EINVAL;
9787
9788                 if (frame_size > ixgbe_rx_bufsz(ring))
9789                         return -EINVAL;
9790         }
9791
9792         if (nr_cpu_ids > MAX_XDP_QUEUES)
9793                 return -ENOMEM;
9794
9795         old_prog = xchg(&adapter->xdp_prog, prog);
9796
9797         /* If transitioning XDP modes reconfigure rings */
9798         if (!!prog != !!old_prog) {
9799                 int err = ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
9800
9801                 if (err) {
9802                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
9803                         return -EINVAL;
9804                 }
9805         } else {
9806                 for (i = 0; i < adapter->num_rx_queues; i++)
9807                         xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
9808         }
9809
9810         if (old_prog)
9811                 bpf_prog_put(old_prog);
9812
9813         return 0;
9814 }
9815
9816 static int ixgbe_xdp(struct net_device *dev, struct netdev_xdp *xdp)
9817 {
9818         struct ixgbe_adapter *adapter = netdev_priv(dev);
9819
9820         switch (xdp->command) {
9821         case XDP_SETUP_PROG:
9822                 return ixgbe_xdp_setup(dev, xdp->prog);
9823         case XDP_QUERY_PROG:
9824                 xdp->prog_attached = !!(adapter->xdp_prog);
9825                 xdp->prog_id = adapter->xdp_prog ?
9826                         adapter->xdp_prog->aux->id : 0;
9827                 return 0;
9828         default:
9829                 return -EINVAL;
9830         }
9831 }
9832
9833 static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp)
9834 {
9835         struct ixgbe_adapter *adapter = netdev_priv(dev);
9836         struct ixgbe_ring *ring;
9837         int err;
9838
9839         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
9840                 return -EINVAL;
9841
9842         /* During program transitions its possible adapter->xdp_prog is assigned
9843          * but ring has not been configured yet. In this case simply abort xmit.
9844          */
9845         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
9846         if (unlikely(!ring))
9847                 return -EINVAL;
9848
9849         err = ixgbe_xmit_xdp_ring(adapter, xdp);
9850         if (err != IXGBE_XDP_TX)
9851                 return -ENOMEM;
9852
9853         /* Force memory writes to complete before letting h/w know there
9854          * are new descriptors to fetch.
9855          */
9856         wmb();
9857
9858         ring = adapter->xdp_ring[smp_processor_id()];
9859         writel(ring->next_to_use, ring->tail);
9860
9861         return 0;
9862 }
9863
9864 static const struct net_device_ops ixgbe_netdev_ops = {
9865         .ndo_open               = ixgbe_open,
9866         .ndo_stop               = ixgbe_close,
9867         .ndo_start_xmit         = ixgbe_xmit_frame,
9868         .ndo_select_queue       = ixgbe_select_queue,
9869         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9870         .ndo_validate_addr      = eth_validate_addr,
9871         .ndo_set_mac_address    = ixgbe_set_mac,
9872         .ndo_change_mtu         = ixgbe_change_mtu,
9873         .ndo_tx_timeout         = ixgbe_tx_timeout,
9874         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9875         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9876         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
9877         .ndo_do_ioctl           = ixgbe_ioctl,
9878         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
9879         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
9880         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
9881         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
9882         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9883         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
9884         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
9885         .ndo_get_stats64        = ixgbe_get_stats64,
9886         .ndo_setup_tc           = __ixgbe_setup_tc,
9887 #ifdef CONFIG_NET_POLL_CONTROLLER
9888         .ndo_poll_controller    = ixgbe_netpoll,
9889 #endif
9890 #ifdef IXGBE_FCOE
9891         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9892         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9893         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9894         .ndo_fcoe_enable = ixgbe_fcoe_enable,
9895         .ndo_fcoe_disable = ixgbe_fcoe_disable,
9896         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9897         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9898 #endif /* IXGBE_FCOE */
9899         .ndo_set_features = ixgbe_set_features,
9900         .ndo_fix_features = ixgbe_fix_features,
9901         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
9902         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
9903         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
9904         .ndo_dfwd_add_station   = ixgbe_fwd_add,
9905         .ndo_dfwd_del_station   = ixgbe_fwd_del,
9906         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
9907         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
9908         .ndo_features_check     = ixgbe_features_check,
9909         .ndo_xdp                = ixgbe_xdp,
9910         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
9911 };
9912
9913 /**
9914  * ixgbe_enumerate_functions - Get the number of ports this device has
9915  * @adapter: adapter structure
9916  *
9917  * This function enumerates the phsyical functions co-located on a single slot,
9918  * in order to determine how many ports a device has. This is most useful in
9919  * determining the required GT/s of PCIe bandwidth necessary for optimal
9920  * performance.
9921  **/
9922 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9923 {
9924         struct pci_dev *entry, *pdev = adapter->pdev;
9925         int physfns = 0;
9926
9927         /* Some cards can not use the generic count PCIe functions method,
9928          * because they are behind a parent switch, so we hardcode these with
9929          * the correct number of functions.
9930          */
9931         if (ixgbe_pcie_from_parent(&adapter->hw))
9932                 physfns = 4;
9933
9934         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9935                 /* don't count virtual functions */
9936                 if (entry->is_virtfn)
9937                         continue;
9938
9939                 /* When the devices on the bus don't all match our device ID,
9940                  * we can't reliably determine the correct number of
9941                  * functions. This can occur if a function has been direct
9942                  * attached to a virtual machine using VT-d, for example. In
9943                  * this case, simply return -1 to indicate this.
9944                  */
9945                 if ((entry->vendor != pdev->vendor) ||
9946                     (entry->device != pdev->device))
9947                         return -1;
9948
9949                 physfns++;
9950         }
9951
9952         return physfns;
9953 }
9954
9955 /**
9956  * ixgbe_wol_supported - Check whether device supports WoL
9957  * @adapter: the adapter private structure
9958  * @device_id: the device ID
9959  * @subdev_id: the subsystem device ID
9960  *
9961  * This function is used by probe and ethtool to determine
9962  * which devices have WoL support
9963  *
9964  **/
9965 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9966                          u16 subdevice_id)
9967 {
9968         struct ixgbe_hw *hw = &adapter->hw;
9969         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9970
9971         /* WOL not supported on 82598 */
9972         if (hw->mac.type == ixgbe_mac_82598EB)
9973                 return false;
9974
9975         /* check eeprom to see if WOL is enabled for X540 and newer */
9976         if (hw->mac.type >= ixgbe_mac_X540) {
9977                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9978                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9979                      (hw->bus.func == 0)))
9980                         return true;
9981         }
9982
9983         /* WOL is determined based on device IDs for 82599 MACs */
9984         switch (device_id) {
9985         case IXGBE_DEV_ID_82599_SFP:
9986                 /* Only these subdevices could supports WOL */
9987                 switch (subdevice_id) {
9988                 case IXGBE_SUBDEV_ID_82599_560FLR:
9989                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9990                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9991                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9992                         /* only support first port */
9993                         if (hw->bus.func != 0)
9994                                 break;
9995                         /* fall through */
9996                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9997                 case IXGBE_SUBDEV_ID_82599_SFP:
9998                 case IXGBE_SUBDEV_ID_82599_RNDC:
9999                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10000                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10001                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10002                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10003                         return true;
10004                 }
10005                 break;
10006         case IXGBE_DEV_ID_82599EN_SFP:
10007                 /* Only these subdevices support WOL */
10008                 switch (subdevice_id) {
10009                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10010                         return true;
10011                 }
10012                 break;
10013         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10014                 /* All except this subdevice support WOL */
10015                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10016                         return true;
10017                 break;
10018         case IXGBE_DEV_ID_82599_KX4:
10019                 return  true;
10020         default:
10021                 break;
10022         }
10023
10024         return false;
10025 }
10026
10027 /**
10028  * ixgbe_probe - Device Initialization Routine
10029  * @pdev: PCI device information struct
10030  * @ent: entry in ixgbe_pci_tbl
10031  *
10032  * Returns 0 on success, negative on failure
10033  *
10034  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10035  * The OS initialization, configuring of the adapter private structure,
10036  * and a hardware reset occur.
10037  **/
10038 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10039 {
10040         struct net_device *netdev;
10041         struct ixgbe_adapter *adapter = NULL;
10042         struct ixgbe_hw *hw;
10043         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10044         int i, err, pci_using_dac, expected_gts;
10045         unsigned int indices = MAX_TX_QUEUES;
10046         u8 part_str[IXGBE_PBANUM_LENGTH];
10047         bool disable_dev = false;
10048 #ifdef IXGBE_FCOE
10049         u16 device_caps;
10050 #endif
10051         u32 eec;
10052
10053         /* Catch broken hardware that put the wrong VF device ID in
10054          * the PCIe SR-IOV capability.
10055          */
10056         if (pdev->is_virtfn) {
10057                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10058                      pci_name(pdev), pdev->vendor, pdev->device);
10059                 return -EINVAL;
10060         }
10061
10062         err = pci_enable_device_mem(pdev);
10063         if (err)
10064                 return err;
10065
10066         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10067                 pci_using_dac = 1;
10068         } else {
10069                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10070                 if (err) {
10071                         dev_err(&pdev->dev,
10072                                 "No usable DMA configuration, aborting\n");
10073                         goto err_dma;
10074                 }
10075                 pci_using_dac = 0;
10076         }
10077
10078         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10079         if (err) {
10080                 dev_err(&pdev->dev,
10081                         "pci_request_selected_regions failed 0x%x\n", err);
10082                 goto err_pci_reg;
10083         }
10084
10085         pci_enable_pcie_error_reporting(pdev);
10086
10087         pci_set_master(pdev);
10088         pci_save_state(pdev);
10089
10090         if (ii->mac == ixgbe_mac_82598EB) {
10091 #ifdef CONFIG_IXGBE_DCB
10092                 /* 8 TC w/ 4 queues per TC */
10093                 indices = 4 * MAX_TRAFFIC_CLASS;
10094 #else
10095                 indices = IXGBE_MAX_RSS_INDICES;
10096 #endif
10097         }
10098
10099         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10100         if (!netdev) {
10101                 err = -ENOMEM;
10102                 goto err_alloc_etherdev;
10103         }
10104
10105         SET_NETDEV_DEV(netdev, &pdev->dev);
10106
10107         adapter = netdev_priv(netdev);
10108
10109         adapter->netdev = netdev;
10110         adapter->pdev = pdev;
10111         hw = &adapter->hw;
10112         hw->back = adapter;
10113         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10114
10115         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10116                               pci_resource_len(pdev, 0));
10117         adapter->io_addr = hw->hw_addr;
10118         if (!hw->hw_addr) {
10119                 err = -EIO;
10120                 goto err_ioremap;
10121         }
10122
10123         netdev->netdev_ops = &ixgbe_netdev_ops;
10124         ixgbe_set_ethtool_ops(netdev);
10125         netdev->watchdog_timeo = 5 * HZ;
10126         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10127
10128         /* Setup hw api */
10129         hw->mac.ops   = *ii->mac_ops;
10130         hw->mac.type  = ii->mac;
10131         hw->mvals     = ii->mvals;
10132         if (ii->link_ops)
10133                 hw->link.ops  = *ii->link_ops;
10134
10135         /* EEPROM */
10136         hw->eeprom.ops = *ii->eeprom_ops;
10137         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10138         if (ixgbe_removed(hw->hw_addr)) {
10139                 err = -EIO;
10140                 goto err_ioremap;
10141         }
10142         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10143         if (!(eec & BIT(8)))
10144                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10145
10146         /* PHY */
10147         hw->phy.ops = *ii->phy_ops;
10148         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10149         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10150         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10151         hw->phy.mdio.mmds = 0;
10152         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10153         hw->phy.mdio.dev = netdev;
10154         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10155         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10156
10157         /* setup the private structure */
10158         err = ixgbe_sw_init(adapter, ii);
10159         if (err)
10160                 goto err_sw_init;
10161
10162         /* Make sure the SWFW semaphore is in a valid state */
10163         if (hw->mac.ops.init_swfw_sync)
10164                 hw->mac.ops.init_swfw_sync(hw);
10165
10166         /* Make it possible the adapter to be woken up via WOL */
10167         switch (adapter->hw.mac.type) {
10168         case ixgbe_mac_82599EB:
10169         case ixgbe_mac_X540:
10170         case ixgbe_mac_X550:
10171         case ixgbe_mac_X550EM_x:
10172         case ixgbe_mac_x550em_a:
10173                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10174                 break;
10175         default:
10176                 break;
10177         }
10178
10179         /*
10180          * If there is a fan on this device and it has failed log the
10181          * failure.
10182          */
10183         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10184                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10185                 if (esdp & IXGBE_ESDP_SDP1)
10186                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10187         }
10188
10189         if (allow_unsupported_sfp)
10190                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10191
10192         /* reset_hw fills in the perm_addr as well */
10193         hw->phy.reset_if_overtemp = true;
10194         err = hw->mac.ops.reset_hw(hw);
10195         hw->phy.reset_if_overtemp = false;
10196         ixgbe_set_eee_capable(adapter);
10197         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10198                 err = 0;
10199         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10200                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10201                 e_dev_err("Reload the driver after installing a supported module.\n");
10202                 goto err_sw_init;
10203         } else if (err) {
10204                 e_dev_err("HW Init failed: %d\n", err);
10205                 goto err_sw_init;
10206         }
10207
10208 #ifdef CONFIG_PCI_IOV
10209         /* SR-IOV not supported on the 82598 */
10210         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10211                 goto skip_sriov;
10212         /* Mailbox */
10213         ixgbe_init_mbx_params_pf(hw);
10214         hw->mbx.ops = ii->mbx_ops;
10215         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10216         ixgbe_enable_sriov(adapter, max_vfs);
10217 skip_sriov:
10218
10219 #endif
10220         netdev->features = NETIF_F_SG |
10221                            NETIF_F_TSO |
10222                            NETIF_F_TSO6 |
10223                            NETIF_F_RXHASH |
10224                            NETIF_F_RXCSUM |
10225                            NETIF_F_HW_CSUM;
10226
10227 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10228                                     NETIF_F_GSO_GRE_CSUM | \
10229                                     NETIF_F_GSO_IPXIP4 | \
10230                                     NETIF_F_GSO_IPXIP6 | \
10231                                     NETIF_F_GSO_UDP_TUNNEL | \
10232                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10233
10234         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10235         netdev->features |= NETIF_F_GSO_PARTIAL |
10236                             IXGBE_GSO_PARTIAL_FEATURES;
10237
10238         if (hw->mac.type >= ixgbe_mac_82599EB)
10239                 netdev->features |= NETIF_F_SCTP_CRC;
10240
10241         /* copy netdev features into list of user selectable features */
10242         netdev->hw_features |= netdev->features |
10243                                NETIF_F_HW_VLAN_CTAG_FILTER |
10244                                NETIF_F_HW_VLAN_CTAG_RX |
10245                                NETIF_F_HW_VLAN_CTAG_TX |
10246                                NETIF_F_RXALL |
10247                                NETIF_F_HW_L2FW_DOFFLOAD;
10248
10249         if (hw->mac.type >= ixgbe_mac_82599EB)
10250                 netdev->hw_features |= NETIF_F_NTUPLE |
10251                                        NETIF_F_HW_TC;
10252
10253         if (pci_using_dac)
10254                 netdev->features |= NETIF_F_HIGHDMA;
10255
10256         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10257         netdev->hw_enc_features |= netdev->vlan_features;
10258         netdev->mpls_features |= NETIF_F_SG |
10259                                  NETIF_F_TSO |
10260                                  NETIF_F_TSO6 |
10261                                  NETIF_F_HW_CSUM;
10262         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10263
10264         /* set this bit last since it cannot be part of vlan_features */
10265         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10266                             NETIF_F_HW_VLAN_CTAG_RX |
10267                             NETIF_F_HW_VLAN_CTAG_TX;
10268
10269         netdev->priv_flags |= IFF_UNICAST_FLT;
10270         netdev->priv_flags |= IFF_SUPP_NOFCS;
10271
10272         /* MTU range: 68 - 9710 */
10273         netdev->min_mtu = ETH_MIN_MTU;
10274         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10275
10276 #ifdef CONFIG_IXGBE_DCB
10277         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10278                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10279 #endif
10280
10281 #ifdef IXGBE_FCOE
10282         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10283                 unsigned int fcoe_l;
10284
10285                 if (hw->mac.ops.get_device_caps) {
10286                         hw->mac.ops.get_device_caps(hw, &device_caps);
10287                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10288                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10289                 }
10290
10291
10292                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10293                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10294
10295                 netdev->features |= NETIF_F_FSO |
10296                                     NETIF_F_FCOE_CRC;
10297
10298                 netdev->vlan_features |= NETIF_F_FSO |
10299                                          NETIF_F_FCOE_CRC |
10300                                          NETIF_F_FCOE_MTU;
10301         }
10302 #endif /* IXGBE_FCOE */
10303
10304         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10305                 netdev->hw_features |= NETIF_F_LRO;
10306         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10307                 netdev->features |= NETIF_F_LRO;
10308
10309         /* make sure the EEPROM is good */
10310         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10311                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10312                 err = -EIO;
10313                 goto err_sw_init;
10314         }
10315
10316         eth_platform_get_mac_address(&adapter->pdev->dev,
10317                                      adapter->hw.mac.perm_addr);
10318
10319         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10320
10321         if (!is_valid_ether_addr(netdev->dev_addr)) {
10322                 e_dev_err("invalid MAC address\n");
10323                 err = -EIO;
10324                 goto err_sw_init;
10325         }
10326
10327         /* Set hw->mac.addr to permanent MAC address */
10328         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10329         ixgbe_mac_set_default_filter(adapter);
10330
10331         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
10332                     (unsigned long) adapter);
10333
10334         if (ixgbe_removed(hw->hw_addr)) {
10335                 err = -EIO;
10336                 goto err_sw_init;
10337         }
10338         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10339         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10340         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10341
10342         err = ixgbe_init_interrupt_scheme(adapter);
10343         if (err)
10344                 goto err_sw_init;
10345
10346         for (i = 0; i < adapter->num_rx_queues; i++)
10347                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10348         for (i = 0; i < adapter->num_tx_queues; i++)
10349                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10350         for (i = 0; i < adapter->num_xdp_queues; i++)
10351                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10352
10353         /* WOL not supported for all devices */
10354         adapter->wol = 0;
10355         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10356         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10357                                                 pdev->subsystem_device);
10358         if (hw->wol_enabled)
10359                 adapter->wol = IXGBE_WUFC_MAG;
10360
10361         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10362
10363         /* save off EEPROM version number */
10364         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
10365         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
10366
10367         /* pick up the PCI bus settings for reporting later */
10368         if (ixgbe_pcie_from_parent(hw))
10369                 ixgbe_get_parent_bus_info(adapter);
10370         else
10371                  hw->mac.ops.get_bus_info(hw);
10372
10373         /* calculate the expected PCIe bandwidth required for optimal
10374          * performance. Note that some older parts will never have enough
10375          * bandwidth due to being older generation PCIe parts. We clamp these
10376          * parts to ensure no warning is displayed if it can't be fixed.
10377          */
10378         switch (hw->mac.type) {
10379         case ixgbe_mac_82598EB:
10380                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10381                 break;
10382         default:
10383                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10384                 break;
10385         }
10386
10387         /* don't check link if we failed to enumerate functions */
10388         if (expected_gts > 0)
10389                 ixgbe_check_minimum_link(adapter, expected_gts);
10390
10391         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10392         if (err)
10393                 strlcpy(part_str, "Unknown", sizeof(part_str));
10394         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10395                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10396                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10397                            part_str);
10398         else
10399                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10400                            hw->mac.type, hw->phy.type, part_str);
10401
10402         e_dev_info("%pM\n", netdev->dev_addr);
10403
10404         /* reset the hardware with the new settings */
10405         err = hw->mac.ops.start_hw(hw);
10406         if (err == IXGBE_ERR_EEPROM_VERSION) {
10407                 /* We are running on a pre-production device, log a warning */
10408                 e_dev_warn("This device is a pre-production adapter/LOM. "
10409                            "Please be aware there may be issues associated "
10410                            "with your hardware.  If you are experiencing "
10411                            "problems please contact your Intel or hardware "
10412                            "representative who provided you with this "
10413                            "hardware.\n");
10414         }
10415         strcpy(netdev->name, "eth%d");
10416         pci_set_drvdata(pdev, adapter);
10417         err = register_netdev(netdev);
10418         if (err)
10419                 goto err_register;
10420
10421
10422         /* power down the optics for 82599 SFP+ fiber */
10423         if (hw->mac.ops.disable_tx_laser)
10424                 hw->mac.ops.disable_tx_laser(hw);
10425
10426         /* carrier off reporting is important to ethtool even BEFORE open */
10427         netif_carrier_off(netdev);
10428
10429 #ifdef CONFIG_IXGBE_DCA
10430         if (dca_add_requester(&pdev->dev) == 0) {
10431                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10432                 ixgbe_setup_dca(adapter);
10433         }
10434 #endif
10435         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10436                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10437                 for (i = 0; i < adapter->num_vfs; i++)
10438                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10439         }
10440
10441         /* firmware requires driver version to be 0xFFFFFFFF
10442          * since os does not support feature
10443          */
10444         if (hw->mac.ops.set_fw_drv_ver)
10445                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10446                                            sizeof(ixgbe_driver_version) - 1,
10447                                            ixgbe_driver_version);
10448
10449         /* add san mac addr to netdev */
10450         ixgbe_add_sanmac_netdev(netdev);
10451
10452         e_dev_info("%s\n", ixgbe_default_device_descr);
10453
10454 #ifdef CONFIG_IXGBE_HWMON
10455         if (ixgbe_sysfs_init(adapter))
10456                 e_err(probe, "failed to allocate sysfs resources\n");
10457 #endif /* CONFIG_IXGBE_HWMON */
10458
10459         ixgbe_dbg_adapter_init(adapter);
10460
10461         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10462         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10463                 hw->mac.ops.setup_link(hw,
10464                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10465                         true);
10466
10467         return 0;
10468
10469 err_register:
10470         ixgbe_release_hw_control(adapter);
10471         ixgbe_clear_interrupt_scheme(adapter);
10472 err_sw_init:
10473         ixgbe_disable_sriov(adapter);
10474         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10475         iounmap(adapter->io_addr);
10476         kfree(adapter->jump_tables[0]);
10477         kfree(adapter->mac_table);
10478         kfree(adapter->rss_key);
10479 err_ioremap:
10480         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10481         free_netdev(netdev);
10482 err_alloc_etherdev:
10483         pci_release_mem_regions(pdev);
10484 err_pci_reg:
10485 err_dma:
10486         if (!adapter || disable_dev)
10487                 pci_disable_device(pdev);
10488         return err;
10489 }
10490
10491 /**
10492  * ixgbe_remove - Device Removal Routine
10493  * @pdev: PCI device information struct
10494  *
10495  * ixgbe_remove is called by the PCI subsystem to alert the driver
10496  * that it should release a PCI device.  The could be caused by a
10497  * Hot-Plug event, or because the driver is going to be removed from
10498  * memory.
10499  **/
10500 static void ixgbe_remove(struct pci_dev *pdev)
10501 {
10502         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10503         struct net_device *netdev;
10504         bool disable_dev;
10505         int i;
10506
10507         /* if !adapter then we already cleaned up in probe */
10508         if (!adapter)
10509                 return;
10510
10511         netdev  = adapter->netdev;
10512         ixgbe_dbg_adapter_exit(adapter);
10513
10514         set_bit(__IXGBE_REMOVING, &adapter->state);
10515         cancel_work_sync(&adapter->service_task);
10516
10517
10518 #ifdef CONFIG_IXGBE_DCA
10519         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10520                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10521                 dca_remove_requester(&pdev->dev);
10522                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10523                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10524         }
10525
10526 #endif
10527 #ifdef CONFIG_IXGBE_HWMON
10528         ixgbe_sysfs_exit(adapter);
10529 #endif /* CONFIG_IXGBE_HWMON */
10530
10531         /* remove the added san mac */
10532         ixgbe_del_sanmac_netdev(netdev);
10533
10534 #ifdef CONFIG_PCI_IOV
10535         ixgbe_disable_sriov(adapter);
10536 #endif
10537         if (netdev->reg_state == NETREG_REGISTERED)
10538                 unregister_netdev(netdev);
10539
10540         ixgbe_clear_interrupt_scheme(adapter);
10541
10542         ixgbe_release_hw_control(adapter);
10543
10544 #ifdef CONFIG_DCB
10545         kfree(adapter->ixgbe_ieee_pfc);
10546         kfree(adapter->ixgbe_ieee_ets);
10547
10548 #endif
10549         iounmap(adapter->io_addr);
10550         pci_release_mem_regions(pdev);
10551
10552         e_dev_info("complete\n");
10553
10554         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10555                 if (adapter->jump_tables[i]) {
10556                         kfree(adapter->jump_tables[i]->input);
10557                         kfree(adapter->jump_tables[i]->mask);
10558                 }
10559                 kfree(adapter->jump_tables[i]);
10560         }
10561
10562         kfree(adapter->mac_table);
10563         kfree(adapter->rss_key);
10564         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10565         free_netdev(netdev);
10566
10567         pci_disable_pcie_error_reporting(pdev);
10568
10569         if (disable_dev)
10570                 pci_disable_device(pdev);
10571 }
10572
10573 /**
10574  * ixgbe_io_error_detected - called when PCI error is detected
10575  * @pdev: Pointer to PCI device
10576  * @state: The current pci connection state
10577  *
10578  * This function is called after a PCI bus error affecting
10579  * this device has been detected.
10580  */
10581 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10582                                                 pci_channel_state_t state)
10583 {
10584         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10585         struct net_device *netdev = adapter->netdev;
10586
10587 #ifdef CONFIG_PCI_IOV
10588         struct ixgbe_hw *hw = &adapter->hw;
10589         struct pci_dev *bdev, *vfdev;
10590         u32 dw0, dw1, dw2, dw3;
10591         int vf, pos;
10592         u16 req_id, pf_func;
10593
10594         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10595             adapter->num_vfs == 0)
10596                 goto skip_bad_vf_detection;
10597
10598         bdev = pdev->bus->self;
10599         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10600                 bdev = bdev->bus->self;
10601
10602         if (!bdev)
10603                 goto skip_bad_vf_detection;
10604
10605         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10606         if (!pos)
10607                 goto skip_bad_vf_detection;
10608
10609         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10610         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10611         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10612         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10613         if (ixgbe_removed(hw->hw_addr))
10614                 goto skip_bad_vf_detection;
10615
10616         req_id = dw1 >> 16;
10617         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10618         if (!(req_id & 0x0080))
10619                 goto skip_bad_vf_detection;
10620
10621         pf_func = req_id & 0x01;
10622         if ((pf_func & 1) == (pdev->devfn & 1)) {
10623                 unsigned int device_id;
10624
10625                 vf = (req_id & 0x7F) >> 1;
10626                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10627                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10628                                 "%8.8x\tdw3: %8.8x\n",
10629                 dw0, dw1, dw2, dw3);
10630                 switch (adapter->hw.mac.type) {
10631                 case ixgbe_mac_82599EB:
10632                         device_id = IXGBE_82599_VF_DEVICE_ID;
10633                         break;
10634                 case ixgbe_mac_X540:
10635                         device_id = IXGBE_X540_VF_DEVICE_ID;
10636                         break;
10637                 case ixgbe_mac_X550:
10638                         device_id = IXGBE_DEV_ID_X550_VF;
10639                         break;
10640                 case ixgbe_mac_X550EM_x:
10641                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10642                         break;
10643                 case ixgbe_mac_x550em_a:
10644                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10645                         break;
10646                 default:
10647                         device_id = 0;
10648                         break;
10649                 }
10650
10651                 /* Find the pci device of the offending VF */
10652                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10653                 while (vfdev) {
10654                         if (vfdev->devfn == (req_id & 0xFF))
10655                                 break;
10656                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10657                                                device_id, vfdev);
10658                 }
10659                 /*
10660                  * There's a slim chance the VF could have been hot plugged,
10661                  * so if it is no longer present we don't need to issue the
10662                  * VFLR.  Just clean up the AER in that case.
10663                  */
10664                 if (vfdev) {
10665                         pcie_flr(vfdev);
10666                         /* Free device reference count */
10667                         pci_dev_put(vfdev);
10668                 }
10669
10670                 pci_cleanup_aer_uncorrect_error_status(pdev);
10671         }
10672
10673         /*
10674          * Even though the error may have occurred on the other port
10675          * we still need to increment the vf error reference count for
10676          * both ports because the I/O resume function will be called
10677          * for both of them.
10678          */
10679         adapter->vferr_refcount++;
10680
10681         return PCI_ERS_RESULT_RECOVERED;
10682
10683 skip_bad_vf_detection:
10684 #endif /* CONFIG_PCI_IOV */
10685         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10686                 return PCI_ERS_RESULT_DISCONNECT;
10687
10688         rtnl_lock();
10689         netif_device_detach(netdev);
10690
10691         if (state == pci_channel_io_perm_failure) {
10692                 rtnl_unlock();
10693                 return PCI_ERS_RESULT_DISCONNECT;
10694         }
10695
10696         if (netif_running(netdev))
10697                 ixgbe_close_suspend(adapter);
10698
10699         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10700                 pci_disable_device(pdev);
10701         rtnl_unlock();
10702
10703         /* Request a slot reset. */
10704         return PCI_ERS_RESULT_NEED_RESET;
10705 }
10706
10707 /**
10708  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10709  * @pdev: Pointer to PCI device
10710  *
10711  * Restart the card from scratch, as if from a cold-boot.
10712  */
10713 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10714 {
10715         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10716         pci_ers_result_t result;
10717         int err;
10718
10719         if (pci_enable_device_mem(pdev)) {
10720                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10721                 result = PCI_ERS_RESULT_DISCONNECT;
10722         } else {
10723                 smp_mb__before_atomic();
10724                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10725                 adapter->hw.hw_addr = adapter->io_addr;
10726                 pci_set_master(pdev);
10727                 pci_restore_state(pdev);
10728                 pci_save_state(pdev);
10729
10730                 pci_wake_from_d3(pdev, false);
10731
10732                 ixgbe_reset(adapter);
10733                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10734                 result = PCI_ERS_RESULT_RECOVERED;
10735         }
10736
10737         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10738         if (err) {
10739                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10740                           "failed 0x%0x\n", err);
10741                 /* non-fatal, continue */
10742         }
10743
10744         return result;
10745 }
10746
10747 /**
10748  * ixgbe_io_resume - called when traffic can start flowing again.
10749  * @pdev: Pointer to PCI device
10750  *
10751  * This callback is called when the error recovery driver tells us that
10752  * its OK to resume normal operation.
10753  */
10754 static void ixgbe_io_resume(struct pci_dev *pdev)
10755 {
10756         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10757         struct net_device *netdev = adapter->netdev;
10758
10759 #ifdef CONFIG_PCI_IOV
10760         if (adapter->vferr_refcount) {
10761                 e_info(drv, "Resuming after VF err\n");
10762                 adapter->vferr_refcount--;
10763                 return;
10764         }
10765
10766 #endif
10767         rtnl_lock();
10768         if (netif_running(netdev))
10769                 ixgbe_open(netdev);
10770
10771         netif_device_attach(netdev);
10772         rtnl_unlock();
10773 }
10774
10775 static const struct pci_error_handlers ixgbe_err_handler = {
10776         .error_detected = ixgbe_io_error_detected,
10777         .slot_reset = ixgbe_io_slot_reset,
10778         .resume = ixgbe_io_resume,
10779 };
10780
10781 static struct pci_driver ixgbe_driver = {
10782         .name     = ixgbe_driver_name,
10783         .id_table = ixgbe_pci_tbl,
10784         .probe    = ixgbe_probe,
10785         .remove   = ixgbe_remove,
10786 #ifdef CONFIG_PM
10787         .suspend  = ixgbe_suspend,
10788         .resume   = ixgbe_resume,
10789 #endif
10790         .shutdown = ixgbe_shutdown,
10791         .sriov_configure = ixgbe_pci_sriov_configure,
10792         .err_handler = &ixgbe_err_handler
10793 };
10794
10795 /**
10796  * ixgbe_init_module - Driver Registration Routine
10797  *
10798  * ixgbe_init_module is the first routine called when the driver is
10799  * loaded. All it does is register with the PCI subsystem.
10800  **/
10801 static int __init ixgbe_init_module(void)
10802 {
10803         int ret;
10804         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10805         pr_info("%s\n", ixgbe_copyright);
10806
10807         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10808         if (!ixgbe_wq) {
10809                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10810                 return -ENOMEM;
10811         }
10812
10813         ixgbe_dbg_init();
10814
10815         ret = pci_register_driver(&ixgbe_driver);
10816         if (ret) {
10817                 destroy_workqueue(ixgbe_wq);
10818                 ixgbe_dbg_exit();
10819                 return ret;
10820         }
10821
10822 #ifdef CONFIG_IXGBE_DCA
10823         dca_register_notify(&dca_notifier);
10824 #endif
10825
10826         return 0;
10827 }
10828
10829 module_init(ixgbe_init_module);
10830
10831 /**
10832  * ixgbe_exit_module - Driver Exit Cleanup Routine
10833  *
10834  * ixgbe_exit_module is called just before the driver is removed
10835  * from memory.
10836  **/
10837 static void __exit ixgbe_exit_module(void)
10838 {
10839 #ifdef CONFIG_IXGBE_DCA
10840         dca_unregister_notify(&dca_notifier);
10841 #endif
10842         pci_unregister_driver(&ixgbe_driver);
10843
10844         ixgbe_dbg_exit();
10845         if (ixgbe_wq) {
10846                 destroy_workqueue(ixgbe_wq);
10847                 ixgbe_wq = NULL;
10848         }
10849 }
10850
10851 #ifdef CONFIG_IXGBE_DCA
10852 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10853                             void *p)
10854 {
10855         int ret_val;
10856
10857         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10858                                          __ixgbe_notify_dca);
10859
10860         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10861 }
10862
10863 #endif /* CONFIG_IXGBE_DCA */
10864
10865 module_exit(ixgbe_exit_module);
10866
10867 /* ixgbe_main.c */