1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2016 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <linux/bpf.h>
53 #include <linux/bpf_trace.h>
54 #include <linux/atomic.h>
55 #include <scsi/fc/fc_fcoe.h>
56 #include <net/udp_tunnel.h>
57 #include <net/pkt_cls.h>
58 #include <net/tc_act/tc_gact.h>
59 #include <net/tc_act/tc_mirred.h>
60 #include <net/vxlan.h>
64 #include "ixgbe_common.h"
65 #include "ixgbe_dcb_82599.h"
66 #include "ixgbe_sriov.h"
67 #include "ixgbe_model.h"
69 char ixgbe_driver_name[] = "ixgbe";
70 static const char ixgbe_driver_string[] =
71 "Intel(R) 10 Gigabit PCI Express Network Driver";
73 char ixgbe_default_device_descr[] =
74 "Intel(R) 10 Gigabit Network Connection";
76 static char ixgbe_default_device_descr[] =
77 "Intel(R) 10 Gigabit Network Connection";
79 #define DRV_VERSION "5.1.0-k"
80 const char ixgbe_driver_version[] = DRV_VERSION;
81 static const char ixgbe_copyright[] =
82 "Copyright (c) 1999-2016 Intel Corporation.";
84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
87 [board_82598] = &ixgbe_82598_info,
88 [board_82599] = &ixgbe_82599_info,
89 [board_X540] = &ixgbe_X540_info,
90 [board_X550] = &ixgbe_X550_info,
91 [board_X550EM_x] = &ixgbe_X550EM_x_info,
92 [board_x550em_x_fw] = &ixgbe_x550em_x_fw_info,
93 [board_x550em_a] = &ixgbe_x550em_a_info,
94 [board_x550em_a_fw] = &ixgbe_x550em_a_fw_info,
97 /* ixgbe_pci_tbl - PCI Device ID Table
99 * Wildcard entries (PCI_ANY_ID) should come last
100 * Last entry must be all 0s
102 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
103 * Class, Class Mask, private data (not used) }
105 static const struct pci_device_id ixgbe_pci_tbl[] = {
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
138 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
139 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
140 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
141 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
142 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
143 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
144 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
145 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
146 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
147 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
148 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
149 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
150 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
151 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
152 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
153 /* required last entry */
156 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
158 #ifdef CONFIG_IXGBE_DCA
159 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
161 static struct notifier_block dca_notifier = {
162 .notifier_call = ixgbe_notify_dca,
168 #ifdef CONFIG_PCI_IOV
169 static unsigned int max_vfs;
170 module_param(max_vfs, uint, 0);
171 MODULE_PARM_DESC(max_vfs,
172 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
173 #endif /* CONFIG_PCI_IOV */
175 static unsigned int allow_unsupported_sfp;
176 module_param(allow_unsupported_sfp, uint, 0);
177 MODULE_PARM_DESC(allow_unsupported_sfp,
178 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
180 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
181 static int debug = -1;
182 module_param(debug, int, 0);
183 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
185 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
186 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
187 MODULE_LICENSE("GPL");
188 MODULE_VERSION(DRV_VERSION);
190 static struct workqueue_struct *ixgbe_wq;
192 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
193 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
195 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
198 struct pci_dev *parent_dev;
199 struct pci_bus *parent_bus;
201 parent_bus = adapter->pdev->bus->parent;
205 parent_dev = parent_bus->self;
209 if (!pci_is_pcie(parent_dev))
212 pcie_capability_read_word(parent_dev, reg, value);
213 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
214 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
219 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
221 struct ixgbe_hw *hw = &adapter->hw;
225 hw->bus.type = ixgbe_bus_type_pci_express;
227 /* Get the negotiated link width and speed from PCI config space of the
228 * parent, as this device is behind a switch
230 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
232 /* assume caller will handle error case */
236 hw->bus.width = ixgbe_convert_bus_width(link_status);
237 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
243 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
244 * @hw: hw specific details
246 * This function is used by probe to determine whether a device's PCI-Express
247 * bandwidth details should be gathered from the parent bus instead of from the
248 * device. Used to ensure that various locations all have the correct device ID
251 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
253 switch (hw->device_id) {
254 case IXGBE_DEV_ID_82599_SFP_SF_QP:
255 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
262 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
265 struct ixgbe_hw *hw = &adapter->hw;
267 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
268 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
269 struct pci_dev *pdev;
271 /* Some devices are not connected over PCIe and thus do not negotiate
272 * speed. These devices do not have valid bus info, and thus any report
273 * we generate may not be correct.
275 if (hw->bus.type == ixgbe_bus_type_internal)
278 /* determine whether to use the parent device */
279 if (ixgbe_pcie_from_parent(&adapter->hw))
280 pdev = adapter->pdev->bus->parent->self;
282 pdev = adapter->pdev;
284 if (pcie_get_minimum_link(pdev, &speed, &width) ||
285 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
286 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
291 case PCIE_SPEED_2_5GT:
292 /* 8b/10b encoding reduces max throughput by 20% */
295 case PCIE_SPEED_5_0GT:
296 /* 8b/10b encoding reduces max throughput by 20% */
299 case PCIE_SPEED_8_0GT:
300 /* 128b/130b encoding reduces throughput by less than 2% */
304 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
308 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
310 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
311 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
312 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
313 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
316 (speed == PCIE_SPEED_2_5GT ? "20%" :
317 speed == PCIE_SPEED_5_0GT ? "20%" :
318 speed == PCIE_SPEED_8_0GT ? "<2%" :
321 if (max_gts < expected_gts) {
322 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
323 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
325 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
329 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
331 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
332 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
333 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
334 queue_work(ixgbe_wq, &adapter->service_task);
337 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
339 struct ixgbe_adapter *adapter = hw->back;
344 e_dev_err("Adapter removed\n");
345 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
346 ixgbe_service_event_schedule(adapter);
349 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
353 /* The following check not only optimizes a bit by not
354 * performing a read on the status register when the
355 * register just read was a status register read that
356 * returned IXGBE_FAILED_READ_REG. It also blocks any
357 * potential recursion.
359 if (reg == IXGBE_STATUS) {
360 ixgbe_remove_adapter(hw);
363 value = ixgbe_read_reg(hw, IXGBE_STATUS);
364 if (value == IXGBE_FAILED_READ_REG)
365 ixgbe_remove_adapter(hw);
369 * ixgbe_read_reg - Read from device register
370 * @hw: hw specific details
371 * @reg: offset of register to read
373 * Returns : value read or IXGBE_FAILED_READ_REG if removed
375 * This function is used to read device registers. It checks for device
376 * removal by confirming any read that returns all ones by checking the
377 * status register value for all ones. This function avoids reading from
378 * the hardware if a removal was previously detected in which case it
379 * returns IXGBE_FAILED_READ_REG (all ones).
381 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
383 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
386 if (ixgbe_removed(reg_addr))
387 return IXGBE_FAILED_READ_REG;
388 if (unlikely(hw->phy.nw_mng_if_sel &
389 IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
390 struct ixgbe_adapter *adapter;
393 for (i = 0; i < 200; ++i) {
394 value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
396 goto writes_completed;
397 if (value == IXGBE_FAILED_READ_REG) {
398 ixgbe_remove_adapter(hw);
399 return IXGBE_FAILED_READ_REG;
405 e_warn(hw, "register writes incomplete %08x\n", value);
409 value = readl(reg_addr + reg);
410 if (unlikely(value == IXGBE_FAILED_READ_REG))
411 ixgbe_check_remove(hw, reg);
415 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
419 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
420 if (value == IXGBE_FAILED_READ_CFG_WORD) {
421 ixgbe_remove_adapter(hw);
427 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
429 struct ixgbe_adapter *adapter = hw->back;
432 if (ixgbe_removed(hw->hw_addr))
433 return IXGBE_FAILED_READ_CFG_WORD;
434 pci_read_config_word(adapter->pdev, reg, &value);
435 if (value == IXGBE_FAILED_READ_CFG_WORD &&
436 ixgbe_check_cfg_remove(hw, adapter->pdev))
437 return IXGBE_FAILED_READ_CFG_WORD;
441 #ifdef CONFIG_PCI_IOV
442 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
444 struct ixgbe_adapter *adapter = hw->back;
447 if (ixgbe_removed(hw->hw_addr))
448 return IXGBE_FAILED_READ_CFG_DWORD;
449 pci_read_config_dword(adapter->pdev, reg, &value);
450 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
451 ixgbe_check_cfg_remove(hw, adapter->pdev))
452 return IXGBE_FAILED_READ_CFG_DWORD;
455 #endif /* CONFIG_PCI_IOV */
457 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
459 struct ixgbe_adapter *adapter = hw->back;
461 if (ixgbe_removed(hw->hw_addr))
463 pci_write_config_word(adapter->pdev, reg, value);
466 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
468 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
470 /* flush memory to make sure state is correct before next watchdog */
471 smp_mb__before_atomic();
472 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
475 struct ixgbe_reg_info {
480 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
482 /* General Registers */
483 {IXGBE_CTRL, "CTRL"},
484 {IXGBE_STATUS, "STATUS"},
485 {IXGBE_CTRL_EXT, "CTRL_EXT"},
487 /* Interrupt Registers */
488 {IXGBE_EICR, "EICR"},
491 {IXGBE_SRRCTL(0), "SRRCTL"},
492 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
493 {IXGBE_RDLEN(0), "RDLEN"},
494 {IXGBE_RDH(0), "RDH"},
495 {IXGBE_RDT(0), "RDT"},
496 {IXGBE_RXDCTL(0), "RXDCTL"},
497 {IXGBE_RDBAL(0), "RDBAL"},
498 {IXGBE_RDBAH(0), "RDBAH"},
501 {IXGBE_TDBAL(0), "TDBAL"},
502 {IXGBE_TDBAH(0), "TDBAH"},
503 {IXGBE_TDLEN(0), "TDLEN"},
504 {IXGBE_TDH(0), "TDH"},
505 {IXGBE_TDT(0), "TDT"},
506 {IXGBE_TXDCTL(0), "TXDCTL"},
508 /* List Terminator */
514 * ixgbe_regdump - register printout routine
516 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
522 switch (reginfo->ofs) {
523 case IXGBE_SRRCTL(0):
524 for (i = 0; i < 64; i++)
525 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
527 case IXGBE_DCA_RXCTRL(0):
528 for (i = 0; i < 64; i++)
529 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
532 for (i = 0; i < 64; i++)
533 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
536 for (i = 0; i < 64; i++)
537 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
540 for (i = 0; i < 64; i++)
541 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
543 case IXGBE_RXDCTL(0):
544 for (i = 0; i < 64; i++)
545 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
548 for (i = 0; i < 64; i++)
549 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
552 for (i = 0; i < 64; i++)
553 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
556 for (i = 0; i < 64; i++)
557 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
560 for (i = 0; i < 64; i++)
561 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
564 for (i = 0; i < 64; i++)
565 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
568 for (i = 0; i < 64; i++)
569 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
572 for (i = 0; i < 64; i++)
573 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
575 case IXGBE_TXDCTL(0):
576 for (i = 0; i < 64; i++)
577 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
580 pr_info("%-15s %08x\n",
581 reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
591 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
592 for (j = 0; j < 8; j++)
593 p += sprintf(p, " %08x", regs[i++]);
594 pr_err("%-15s%s\n", rname, buf);
599 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
601 struct ixgbe_tx_buffer *tx_buffer;
603 tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
604 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
605 n, ring->next_to_use, ring->next_to_clean,
606 (u64)dma_unmap_addr(tx_buffer, dma),
607 dma_unmap_len(tx_buffer, len),
608 tx_buffer->next_to_watch,
609 (u64)tx_buffer->time_stamp);
613 * ixgbe_dump - Print registers, tx-rings and rx-rings
615 static void ixgbe_dump(struct ixgbe_adapter *adapter)
617 struct net_device *netdev = adapter->netdev;
618 struct ixgbe_hw *hw = &adapter->hw;
619 struct ixgbe_reg_info *reginfo;
621 struct ixgbe_ring *ring;
622 struct ixgbe_tx_buffer *tx_buffer;
623 union ixgbe_adv_tx_desc *tx_desc;
624 struct my_u0 { u64 a; u64 b; } *u0;
625 struct ixgbe_ring *rx_ring;
626 union ixgbe_adv_rx_desc *rx_desc;
627 struct ixgbe_rx_buffer *rx_buffer_info;
630 if (!netif_msg_hw(adapter))
633 /* Print netdevice Info */
635 dev_info(&adapter->pdev->dev, "Net device Info\n");
636 pr_info("Device Name state "
638 pr_info("%-15s %016lX %016lX\n",
641 dev_trans_start(netdev));
644 /* Print Registers */
645 dev_info(&adapter->pdev->dev, "Register Dump\n");
646 pr_info(" Register Name Value\n");
647 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
648 reginfo->name; reginfo++) {
649 ixgbe_regdump(hw, reginfo);
652 /* Print TX Ring Summary */
653 if (!netdev || !netif_running(netdev))
656 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
657 pr_info(" %s %s %s %s\n",
658 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
659 "leng", "ntw", "timestamp");
660 for (n = 0; n < adapter->num_tx_queues; n++) {
661 ring = adapter->tx_ring[n];
662 ixgbe_print_buffer(ring, n);
665 for (n = 0; n < adapter->num_xdp_queues; n++) {
666 ring = adapter->xdp_ring[n];
667 ixgbe_print_buffer(ring, n);
671 if (!netif_msg_tx_done(adapter))
672 goto rx_ring_summary;
674 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
676 /* Transmit Descriptor Formats
678 * 82598 Advanced Transmit Descriptor
679 * +--------------------------------------------------------------+
680 * 0 | Buffer Address [63:0] |
681 * +--------------------------------------------------------------+
682 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
683 * +--------------------------------------------------------------+
684 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
686 * 82598 Advanced Transmit Descriptor (Write-Back Format)
687 * +--------------------------------------------------------------+
689 * +--------------------------------------------------------------+
690 * 8 | RSV | STA | NXTSEQ |
691 * +--------------------------------------------------------------+
694 * 82599+ Advanced Transmit Descriptor
695 * +--------------------------------------------------------------+
696 * 0 | Buffer Address [63:0] |
697 * +--------------------------------------------------------------+
698 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
699 * +--------------------------------------------------------------+
700 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
702 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
703 * +--------------------------------------------------------------+
705 * +--------------------------------------------------------------+
706 * 8 | RSV | STA | RSV |
707 * +--------------------------------------------------------------+
711 for (n = 0; n < adapter->num_tx_queues; n++) {
712 ring = adapter->tx_ring[n];
713 pr_info("------------------------------------\n");
714 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
715 pr_info("------------------------------------\n");
716 pr_info("%s%s %s %s %s %s\n",
717 "T [desc] [address 63:0 ] ",
718 "[PlPOIdStDDt Ln] [bi->dma ] ",
719 "leng", "ntw", "timestamp", "bi->skb");
721 for (i = 0; ring->desc && (i < ring->count); i++) {
722 tx_desc = IXGBE_TX_DESC(ring, i);
723 tx_buffer = &ring->tx_buffer_info[i];
724 u0 = (struct my_u0 *)tx_desc;
725 if (dma_unmap_len(tx_buffer, len) > 0) {
726 const char *ring_desc;
728 if (i == ring->next_to_use &&
729 i == ring->next_to_clean)
730 ring_desc = " NTC/U";
731 else if (i == ring->next_to_use)
733 else if (i == ring->next_to_clean)
737 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p%s",
741 (u64)dma_unmap_addr(tx_buffer, dma),
742 dma_unmap_len(tx_buffer, len),
743 tx_buffer->next_to_watch,
744 (u64)tx_buffer->time_stamp,
748 if (netif_msg_pktdata(adapter) &&
750 print_hex_dump(KERN_INFO, "",
751 DUMP_PREFIX_ADDRESS, 16, 1,
752 tx_buffer->skb->data,
753 dma_unmap_len(tx_buffer, len),
759 /* Print RX Rings Summary */
761 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
762 pr_info("Queue [NTU] [NTC]\n");
763 for (n = 0; n < adapter->num_rx_queues; n++) {
764 rx_ring = adapter->rx_ring[n];
765 pr_info("%5d %5X %5X\n",
766 n, rx_ring->next_to_use, rx_ring->next_to_clean);
770 if (!netif_msg_rx_status(adapter))
773 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
775 /* Receive Descriptor Formats
777 * 82598 Advanced Receive Descriptor (Read) Format
779 * +-----------------------------------------------------+
780 * 0 | Packet Buffer Address [63:1] |A0/NSE|
781 * +----------------------------------------------+------+
782 * 8 | Header Buffer Address [63:1] | DD |
783 * +-----------------------------------------------------+
786 * 82598 Advanced Receive Descriptor (Write-Back) Format
788 * 63 48 47 32 31 30 21 20 16 15 4 3 0
789 * +------------------------------------------------------+
790 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
791 * | Packet | IP | | | | Type | Type |
792 * | Checksum | Ident | | | | | |
793 * +------------------------------------------------------+
794 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
795 * +------------------------------------------------------+
796 * 63 48 47 32 31 20 19 0
798 * 82599+ Advanced Receive Descriptor (Read) Format
800 * +-----------------------------------------------------+
801 * 0 | Packet Buffer Address [63:1] |A0/NSE|
802 * +----------------------------------------------+------+
803 * 8 | Header Buffer Address [63:1] | DD |
804 * +-----------------------------------------------------+
807 * 82599+ Advanced Receive Descriptor (Write-Back) Format
809 * 63 48 47 32 31 30 21 20 17 16 4 3 0
810 * +------------------------------------------------------+
811 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
812 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
813 * |/ Flow Dir Flt ID | | | | | |
814 * +------------------------------------------------------+
815 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
816 * +------------------------------------------------------+
817 * 63 48 47 32 31 20 19 0
820 for (n = 0; n < adapter->num_rx_queues; n++) {
821 rx_ring = adapter->rx_ring[n];
822 pr_info("------------------------------------\n");
823 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
824 pr_info("------------------------------------\n");
826 "R [desc] [ PktBuf A0] ",
827 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
828 "<-- Adv Rx Read format");
830 "RWB[desc] [PcsmIpSHl PtRs] ",
831 "[vl er S cks ln] ---------------- [bi->skb ] ",
832 "<-- Adv Rx Write-Back format");
834 for (i = 0; i < rx_ring->count; i++) {
835 const char *ring_desc;
837 if (i == rx_ring->next_to_use)
839 else if (i == rx_ring->next_to_clean)
844 rx_buffer_info = &rx_ring->rx_buffer_info[i];
845 rx_desc = IXGBE_RX_DESC(rx_ring, i);
846 u0 = (struct my_u0 *)rx_desc;
847 if (rx_desc->wb.upper.length) {
848 /* Descriptor Done */
849 pr_info("RWB[0x%03X] %016llX %016llX ---------------- %p%s\n",
856 pr_info("R [0x%03X] %016llX %016llX %016llX %p%s\n",
860 (u64)rx_buffer_info->dma,
864 if (netif_msg_pktdata(adapter) &&
865 rx_buffer_info->dma) {
866 print_hex_dump(KERN_INFO, "",
867 DUMP_PREFIX_ADDRESS, 16, 1,
868 page_address(rx_buffer_info->page) +
869 rx_buffer_info->page_offset,
870 ixgbe_rx_bufsz(rx_ring), true);
877 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
881 /* Let firmware take over control of h/w */
882 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
883 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
884 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
887 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
891 /* Let firmware know the driver has taken over */
892 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
893 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
894 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
898 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
899 * @adapter: pointer to adapter struct
900 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
901 * @queue: queue to map the corresponding interrupt to
902 * @msix_vector: the vector to map to the corresponding queue
905 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
906 u8 queue, u8 msix_vector)
909 struct ixgbe_hw *hw = &adapter->hw;
910 switch (hw->mac.type) {
911 case ixgbe_mac_82598EB:
912 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
915 index = (((direction * 64) + queue) >> 2) & 0x1F;
916 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
917 ivar &= ~(0xFF << (8 * (queue & 0x3)));
918 ivar |= (msix_vector << (8 * (queue & 0x3)));
919 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
921 case ixgbe_mac_82599EB:
924 case ixgbe_mac_X550EM_x:
925 case ixgbe_mac_x550em_a:
926 if (direction == -1) {
928 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
929 index = ((queue & 1) * 8);
930 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
931 ivar &= ~(0xFF << index);
932 ivar |= (msix_vector << index);
933 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
936 /* tx or rx causes */
937 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
938 index = ((16 * (queue & 1)) + (8 * direction));
939 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
940 ivar &= ~(0xFF << index);
941 ivar |= (msix_vector << index);
942 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
950 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
955 switch (adapter->hw.mac.type) {
956 case ixgbe_mac_82598EB:
957 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
958 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
960 case ixgbe_mac_82599EB:
963 case ixgbe_mac_X550EM_x:
964 case ixgbe_mac_x550em_a:
965 mask = (qmask & 0xFFFFFFFF);
966 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
967 mask = (qmask >> 32);
968 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
975 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
977 struct ixgbe_hw *hw = &adapter->hw;
978 struct ixgbe_hw_stats *hwstats = &adapter->stats;
982 if ((hw->fc.current_mode != ixgbe_fc_full) &&
983 (hw->fc.current_mode != ixgbe_fc_rx_pause))
986 switch (hw->mac.type) {
987 case ixgbe_mac_82598EB:
988 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
991 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
993 hwstats->lxoffrxc += data;
995 /* refill credits (no tx hang) if we received xoff */
999 for (i = 0; i < adapter->num_tx_queues; i++)
1000 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1001 &adapter->tx_ring[i]->state);
1003 for (i = 0; i < adapter->num_xdp_queues; i++)
1004 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1005 &adapter->xdp_ring[i]->state);
1008 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1010 struct ixgbe_hw *hw = &adapter->hw;
1011 struct ixgbe_hw_stats *hwstats = &adapter->stats;
1015 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1017 if (adapter->ixgbe_ieee_pfc)
1018 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1020 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1021 ixgbe_update_xoff_rx_lfc(adapter);
1025 /* update stats for each tc, only valid with PFC enabled */
1026 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1029 switch (hw->mac.type) {
1030 case ixgbe_mac_82598EB:
1031 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1034 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1036 hwstats->pxoffrxc[i] += pxoffrxc;
1037 /* Get the TC for given UP */
1038 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1039 xoff[tc] += pxoffrxc;
1042 /* disarm tx queues that have received xoff frames */
1043 for (i = 0; i < adapter->num_tx_queues; i++) {
1044 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1046 tc = tx_ring->dcb_tc;
1048 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1051 for (i = 0; i < adapter->num_xdp_queues; i++) {
1052 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1054 tc = xdp_ring->dcb_tc;
1056 clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1060 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1062 return ring->stats.packets;
1065 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1067 struct ixgbe_adapter *adapter;
1068 struct ixgbe_hw *hw;
1071 if (ring->l2_accel_priv)
1072 adapter = ring->l2_accel_priv->real_adapter;
1074 adapter = netdev_priv(ring->netdev);
1077 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1078 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1081 return (head < tail) ?
1082 tail - head : (tail + ring->count - head);
1087 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1089 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1090 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1091 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1093 clear_check_for_tx_hang(tx_ring);
1096 * Check for a hung queue, but be thorough. This verifies
1097 * that a transmit has been completed since the previous
1098 * check AND there is at least one packet pending. The
1099 * ARMED bit is set to indicate a potential hang. The
1100 * bit is cleared if a pause frame is received to remove
1101 * false hang detection due to PFC or 802.3x frames. By
1102 * requiring this to fail twice we avoid races with
1103 * pfc clearing the ARMED bit and conditions where we
1104 * run the check_tx_hang logic with a transmit completion
1105 * pending but without time to complete it yet.
1107 if (tx_done_old == tx_done && tx_pending)
1108 /* make sure it is true for two checks in a row */
1109 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1111 /* update completed stats and continue */
1112 tx_ring->tx_stats.tx_done_old = tx_done;
1113 /* reset the countdown */
1114 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1120 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1121 * @adapter: driver private struct
1123 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1126 /* Do the reset outside of interrupt context */
1127 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1128 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1129 e_warn(drv, "initiating reset due to tx timeout\n");
1130 ixgbe_service_event_schedule(adapter);
1135 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1137 static int ixgbe_tx_maxrate(struct net_device *netdev,
1138 int queue_index, u32 maxrate)
1140 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1141 struct ixgbe_hw *hw = &adapter->hw;
1142 u32 bcnrc_val = ixgbe_link_mbps(adapter);
1147 /* Calculate the rate factor values to set */
1148 bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1149 bcnrc_val /= maxrate;
1151 /* clear everything but the rate factor */
1152 bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1153 IXGBE_RTTBCNRC_RF_DEC_MASK;
1155 /* enable the rate scheduler */
1156 bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1158 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1159 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1165 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1166 * @q_vector: structure containing interrupt and ring information
1167 * @tx_ring: tx ring to clean
1168 * @napi_budget: Used to determine if we are in netpoll
1170 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1171 struct ixgbe_ring *tx_ring, int napi_budget)
1173 struct ixgbe_adapter *adapter = q_vector->adapter;
1174 struct ixgbe_tx_buffer *tx_buffer;
1175 union ixgbe_adv_tx_desc *tx_desc;
1176 unsigned int total_bytes = 0, total_packets = 0;
1177 unsigned int budget = q_vector->tx.work_limit;
1178 unsigned int i = tx_ring->next_to_clean;
1180 if (test_bit(__IXGBE_DOWN, &adapter->state))
1183 tx_buffer = &tx_ring->tx_buffer_info[i];
1184 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1185 i -= tx_ring->count;
1188 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1190 /* if next_to_watch is not set then there is no work pending */
1194 /* prevent any other reads prior to eop_desc */
1195 read_barrier_depends();
1197 /* if DD is not set pending work has not been completed */
1198 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1201 /* clear next_to_watch to prevent false hangs */
1202 tx_buffer->next_to_watch = NULL;
1204 /* update the statistics for this packet */
1205 total_bytes += tx_buffer->bytecount;
1206 total_packets += tx_buffer->gso_segs;
1209 if (ring_is_xdp(tx_ring))
1210 page_frag_free(tx_buffer->data);
1212 napi_consume_skb(tx_buffer->skb, napi_budget);
1214 /* unmap skb header data */
1215 dma_unmap_single(tx_ring->dev,
1216 dma_unmap_addr(tx_buffer, dma),
1217 dma_unmap_len(tx_buffer, len),
1220 /* clear tx_buffer data */
1221 dma_unmap_len_set(tx_buffer, len, 0);
1223 /* unmap remaining buffers */
1224 while (tx_desc != eop_desc) {
1229 i -= tx_ring->count;
1230 tx_buffer = tx_ring->tx_buffer_info;
1231 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1234 /* unmap any remaining paged data */
1235 if (dma_unmap_len(tx_buffer, len)) {
1236 dma_unmap_page(tx_ring->dev,
1237 dma_unmap_addr(tx_buffer, dma),
1238 dma_unmap_len(tx_buffer, len),
1240 dma_unmap_len_set(tx_buffer, len, 0);
1244 /* move us one more past the eop_desc for start of next pkt */
1249 i -= tx_ring->count;
1250 tx_buffer = tx_ring->tx_buffer_info;
1251 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1254 /* issue prefetch for next Tx descriptor */
1257 /* update budget accounting */
1259 } while (likely(budget));
1261 i += tx_ring->count;
1262 tx_ring->next_to_clean = i;
1263 u64_stats_update_begin(&tx_ring->syncp);
1264 tx_ring->stats.bytes += total_bytes;
1265 tx_ring->stats.packets += total_packets;
1266 u64_stats_update_end(&tx_ring->syncp);
1267 q_vector->tx.total_bytes += total_bytes;
1268 q_vector->tx.total_packets += total_packets;
1270 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1271 /* schedule immediate reset if we believe we hung */
1272 struct ixgbe_hw *hw = &adapter->hw;
1273 e_err(drv, "Detected Tx Unit Hang %s\n"
1275 " TDH, TDT <%x>, <%x>\n"
1276 " next_to_use <%x>\n"
1277 " next_to_clean <%x>\n"
1278 "tx_buffer_info[next_to_clean]\n"
1279 " time_stamp <%lx>\n"
1281 ring_is_xdp(tx_ring) ? "(XDP)" : "",
1282 tx_ring->queue_index,
1283 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1284 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1285 tx_ring->next_to_use, i,
1286 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1288 if (!ring_is_xdp(tx_ring))
1289 netif_stop_subqueue(tx_ring->netdev,
1290 tx_ring->queue_index);
1293 "tx hang %d detected on queue %d, resetting adapter\n",
1294 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1296 /* schedule immediate reset if we believe we hung */
1297 ixgbe_tx_timeout_reset(adapter);
1299 /* the adapter is about to reset, no point in enabling stuff */
1303 if (ring_is_xdp(tx_ring))
1306 netdev_tx_completed_queue(txring_txq(tx_ring),
1307 total_packets, total_bytes);
1309 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1310 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1311 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1312 /* Make sure that anybody stopping the queue after this
1313 * sees the new next_to_clean.
1316 if (__netif_subqueue_stopped(tx_ring->netdev,
1317 tx_ring->queue_index)
1318 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1319 netif_wake_subqueue(tx_ring->netdev,
1320 tx_ring->queue_index);
1321 ++tx_ring->tx_stats.restart_queue;
1328 #ifdef CONFIG_IXGBE_DCA
1329 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1330 struct ixgbe_ring *tx_ring,
1333 struct ixgbe_hw *hw = &adapter->hw;
1337 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1340 switch (hw->mac.type) {
1341 case ixgbe_mac_82598EB:
1342 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1344 case ixgbe_mac_82599EB:
1345 case ixgbe_mac_X540:
1346 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1347 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1350 /* for unknown hardware do not write register */
1355 * We can enable relaxed ordering for reads, but not writes when
1356 * DCA is enabled. This is due to a known issue in some chipsets
1357 * which will cause the DCA tag to be cleared.
1359 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1360 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1361 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1363 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1366 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1367 struct ixgbe_ring *rx_ring,
1370 struct ixgbe_hw *hw = &adapter->hw;
1372 u8 reg_idx = rx_ring->reg_idx;
1374 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1375 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1377 switch (hw->mac.type) {
1378 case ixgbe_mac_82599EB:
1379 case ixgbe_mac_X540:
1380 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1387 * We can enable relaxed ordering for reads, but not writes when
1388 * DCA is enabled. This is due to a known issue in some chipsets
1389 * which will cause the DCA tag to be cleared.
1391 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1392 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1393 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1395 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1398 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1400 struct ixgbe_adapter *adapter = q_vector->adapter;
1401 struct ixgbe_ring *ring;
1402 int cpu = get_cpu();
1404 if (q_vector->cpu == cpu)
1407 ixgbe_for_each_ring(ring, q_vector->tx)
1408 ixgbe_update_tx_dca(adapter, ring, cpu);
1410 ixgbe_for_each_ring(ring, q_vector->rx)
1411 ixgbe_update_rx_dca(adapter, ring, cpu);
1413 q_vector->cpu = cpu;
1418 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1422 /* always use CB2 mode, difference is masked in the CB driver */
1423 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1424 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1425 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1427 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1428 IXGBE_DCA_CTRL_DCA_DISABLE);
1430 for (i = 0; i < adapter->num_q_vectors; i++) {
1431 adapter->q_vector[i]->cpu = -1;
1432 ixgbe_update_dca(adapter->q_vector[i]);
1436 static int __ixgbe_notify_dca(struct device *dev, void *data)
1438 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1439 unsigned long event = *(unsigned long *)data;
1441 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1445 case DCA_PROVIDER_ADD:
1446 /* if we're already enabled, don't do it again */
1447 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1449 if (dca_add_requester(dev) == 0) {
1450 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1451 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1452 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1455 /* fall through - DCA is disabled. */
1456 case DCA_PROVIDER_REMOVE:
1457 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1458 dca_remove_requester(dev);
1459 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1460 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1461 IXGBE_DCA_CTRL_DCA_DISABLE);
1469 #endif /* CONFIG_IXGBE_DCA */
1471 #define IXGBE_RSS_L4_TYPES_MASK \
1472 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1473 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1474 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1475 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1477 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1478 union ixgbe_adv_rx_desc *rx_desc,
1479 struct sk_buff *skb)
1483 if (!(ring->netdev->features & NETIF_F_RXHASH))
1486 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1487 IXGBE_RXDADV_RSSTYPE_MASK;
1492 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1493 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1494 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1499 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1500 * @ring: structure containing ring specific data
1501 * @rx_desc: advanced rx descriptor
1503 * Returns : true if it is FCoE pkt
1505 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1506 union ixgbe_adv_rx_desc *rx_desc)
1508 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1510 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1511 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1512 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1513 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1516 #endif /* IXGBE_FCOE */
1518 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1519 * @ring: structure containing ring specific data
1520 * @rx_desc: current Rx descriptor being processed
1521 * @skb: skb currently being received and modified
1523 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1524 union ixgbe_adv_rx_desc *rx_desc,
1525 struct sk_buff *skb)
1527 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1528 bool encap_pkt = false;
1530 skb_checksum_none_assert(skb);
1532 /* Rx csum disabled */
1533 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1536 /* check for VXLAN and Geneve packets */
1537 if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1539 skb->encapsulation = 1;
1542 /* if IP and error */
1543 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1544 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1545 ring->rx_stats.csum_err++;
1549 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1552 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1554 * 82599 errata, UDP frames with a 0 checksum can be marked as
1557 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1558 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1561 ring->rx_stats.csum_err++;
1565 /* It must be a TCP or UDP packet with a valid checksum */
1566 skb->ip_summed = CHECKSUM_UNNECESSARY;
1568 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1571 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1572 skb->ip_summed = CHECKSUM_NONE;
1575 /* If we checked the outer header let the stack know */
1576 skb->csum_level = 1;
1580 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1582 return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1585 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1586 struct ixgbe_rx_buffer *bi)
1588 struct page *page = bi->page;
1591 /* since we are recycling buffers we should seldom need to alloc */
1595 /* alloc new page for storage */
1596 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1597 if (unlikely(!page)) {
1598 rx_ring->rx_stats.alloc_rx_page_failed++;
1602 /* map page for use */
1603 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1604 ixgbe_rx_pg_size(rx_ring),
1609 * if mapping failed free memory back to system since
1610 * there isn't much point in holding memory we can't use
1612 if (dma_mapping_error(rx_ring->dev, dma)) {
1613 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1615 rx_ring->rx_stats.alloc_rx_page_failed++;
1621 bi->page_offset = ixgbe_rx_offset(rx_ring);
1622 bi->pagecnt_bias = 1;
1628 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1629 * @rx_ring: ring to place buffers on
1630 * @cleaned_count: number of buffers to replace
1632 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1634 union ixgbe_adv_rx_desc *rx_desc;
1635 struct ixgbe_rx_buffer *bi;
1636 u16 i = rx_ring->next_to_use;
1643 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1644 bi = &rx_ring->rx_buffer_info[i];
1645 i -= rx_ring->count;
1647 bufsz = ixgbe_rx_bufsz(rx_ring);
1650 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1653 /* sync the buffer for use by the device */
1654 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1655 bi->page_offset, bufsz,
1659 * Refresh the desc even if buffer_addrs didn't change
1660 * because each write-back erases this info.
1662 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1668 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1669 bi = rx_ring->rx_buffer_info;
1670 i -= rx_ring->count;
1673 /* clear the length for the next_to_use descriptor */
1674 rx_desc->wb.upper.length = 0;
1677 } while (cleaned_count);
1679 i += rx_ring->count;
1681 if (rx_ring->next_to_use != i) {
1682 rx_ring->next_to_use = i;
1684 /* update next to alloc since we have filled the ring */
1685 rx_ring->next_to_alloc = i;
1687 /* Force memory writes to complete before letting h/w
1688 * know there are new descriptors to fetch. (Only
1689 * applicable for weak-ordered memory model archs,
1693 writel(i, rx_ring->tail);
1697 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1698 struct sk_buff *skb)
1700 u16 hdr_len = skb_headlen(skb);
1702 /* set gso_size to avoid messing up TCP MSS */
1703 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1704 IXGBE_CB(skb)->append_cnt);
1705 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1708 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1709 struct sk_buff *skb)
1711 /* if append_cnt is 0 then frame is not RSC */
1712 if (!IXGBE_CB(skb)->append_cnt)
1715 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1716 rx_ring->rx_stats.rsc_flush++;
1718 ixgbe_set_rsc_gso_size(rx_ring, skb);
1720 /* gso_size is computed using append_cnt so always clear it last */
1721 IXGBE_CB(skb)->append_cnt = 0;
1725 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1726 * @rx_ring: rx descriptor ring packet is being transacted on
1727 * @rx_desc: pointer to the EOP Rx descriptor
1728 * @skb: pointer to current skb being populated
1730 * This function checks the ring, descriptor, and packet information in
1731 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1732 * other fields within the skb.
1734 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1735 union ixgbe_adv_rx_desc *rx_desc,
1736 struct sk_buff *skb)
1738 struct net_device *dev = rx_ring->netdev;
1739 u32 flags = rx_ring->q_vector->adapter->flags;
1741 ixgbe_update_rsc_stats(rx_ring, skb);
1743 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1745 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1747 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1748 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1750 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1751 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1752 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1753 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1756 skb_record_rx_queue(skb, rx_ring->queue_index);
1758 skb->protocol = eth_type_trans(skb, dev);
1761 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1762 struct sk_buff *skb)
1764 napi_gro_receive(&q_vector->napi, skb);
1768 * ixgbe_is_non_eop - process handling of non-EOP buffers
1769 * @rx_ring: Rx ring being processed
1770 * @rx_desc: Rx descriptor for current buffer
1771 * @skb: Current socket buffer containing buffer in progress
1773 * This function updates next to clean. If the buffer is an EOP buffer
1774 * this function exits returning false, otherwise it will place the
1775 * sk_buff in the next buffer to be chained and return true indicating
1776 * that this is in fact a non-EOP buffer.
1778 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1779 union ixgbe_adv_rx_desc *rx_desc,
1780 struct sk_buff *skb)
1782 u32 ntc = rx_ring->next_to_clean + 1;
1784 /* fetch, update, and store next to clean */
1785 ntc = (ntc < rx_ring->count) ? ntc : 0;
1786 rx_ring->next_to_clean = ntc;
1788 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1790 /* update RSC append count if present */
1791 if (ring_is_rsc_enabled(rx_ring)) {
1792 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1793 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1795 if (unlikely(rsc_enabled)) {
1796 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1798 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1799 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1801 /* update ntc based on RSC value */
1802 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1803 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1804 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1808 /* if we are the last buffer then there is nothing else to do */
1809 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1812 /* place skb in next buffer to be received */
1813 rx_ring->rx_buffer_info[ntc].skb = skb;
1814 rx_ring->rx_stats.non_eop_descs++;
1820 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1821 * @rx_ring: rx descriptor ring packet is being transacted on
1822 * @skb: pointer to current skb being adjusted
1824 * This function is an ixgbe specific version of __pskb_pull_tail. The
1825 * main difference between this version and the original function is that
1826 * this function can make several assumptions about the state of things
1827 * that allow for significant optimizations versus the standard function.
1828 * As a result we can do things like drop a frag and maintain an accurate
1829 * truesize for the skb.
1831 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1832 struct sk_buff *skb)
1834 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1836 unsigned int pull_len;
1839 * it is valid to use page_address instead of kmap since we are
1840 * working with pages allocated out of the lomem pool per
1841 * alloc_page(GFP_ATOMIC)
1843 va = skb_frag_address(frag);
1846 * we need the header to contain the greater of either ETH_HLEN or
1847 * 60 bytes if the skb->len is less than 60 for skb_pad.
1849 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1851 /* align pull length to size of long to optimize memcpy performance */
1852 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1854 /* update all of the pointers */
1855 skb_frag_size_sub(frag, pull_len);
1856 frag->page_offset += pull_len;
1857 skb->data_len -= pull_len;
1858 skb->tail += pull_len;
1862 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1863 * @rx_ring: rx descriptor ring packet is being transacted on
1864 * @skb: pointer to current skb being updated
1866 * This function provides a basic DMA sync up for the first fragment of an
1867 * skb. The reason for doing this is that the first fragment cannot be
1868 * unmapped until we have reached the end of packet descriptor for a buffer
1871 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1872 struct sk_buff *skb)
1874 /* if the page was released unmap it, else just sync our portion */
1875 if (unlikely(IXGBE_CB(skb)->page_released)) {
1876 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1877 ixgbe_rx_pg_size(rx_ring),
1881 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1883 dma_sync_single_range_for_cpu(rx_ring->dev,
1886 skb_frag_size(frag),
1892 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1893 * @rx_ring: rx descriptor ring packet is being transacted on
1894 * @rx_desc: pointer to the EOP Rx descriptor
1895 * @skb: pointer to current skb being fixed
1897 * Check if the skb is valid in the XDP case it will be an error pointer.
1898 * Return true in this case to abort processing and advance to next
1901 * Check for corrupted packet headers caused by senders on the local L2
1902 * embedded NIC switch not setting up their Tx Descriptors right. These
1903 * should be very rare.
1905 * Also address the case where we are pulling data in on pages only
1906 * and as such no data is present in the skb header.
1908 * In addition if skb is not at least 60 bytes we need to pad it so that
1909 * it is large enough to qualify as a valid Ethernet frame.
1911 * Returns true if an error was encountered and skb was freed.
1913 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1914 union ixgbe_adv_rx_desc *rx_desc,
1915 struct sk_buff *skb)
1917 struct net_device *netdev = rx_ring->netdev;
1919 /* XDP packets use error pointer so abort at this point */
1923 /* verify that the packet does not have any known errors */
1924 if (unlikely(ixgbe_test_staterr(rx_desc,
1925 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1926 !(netdev->features & NETIF_F_RXALL))) {
1927 dev_kfree_skb_any(skb);
1931 /* place header in linear portion of buffer */
1932 if (!skb_headlen(skb))
1933 ixgbe_pull_tail(rx_ring, skb);
1936 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1937 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1941 /* if eth_skb_pad returns an error the skb was freed */
1942 if (eth_skb_pad(skb))
1949 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1950 * @rx_ring: rx descriptor ring to store buffers on
1951 * @old_buff: donor buffer to have page reused
1953 * Synchronizes page for reuse by the adapter
1955 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1956 struct ixgbe_rx_buffer *old_buff)
1958 struct ixgbe_rx_buffer *new_buff;
1959 u16 nta = rx_ring->next_to_alloc;
1961 new_buff = &rx_ring->rx_buffer_info[nta];
1963 /* update, and store next to alloc */
1965 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1967 /* Transfer page from old buffer to new buffer.
1968 * Move each member individually to avoid possible store
1969 * forwarding stalls and unnecessary copy of skb.
1971 new_buff->dma = old_buff->dma;
1972 new_buff->page = old_buff->page;
1973 new_buff->page_offset = old_buff->page_offset;
1974 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
1977 static inline bool ixgbe_page_is_reserved(struct page *page)
1979 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1982 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1984 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1985 struct page *page = rx_buffer->page;
1987 /* avoid re-using remote pages */
1988 if (unlikely(ixgbe_page_is_reserved(page)))
1991 #if (PAGE_SIZE < 8192)
1992 /* if we are only owner of page we can reuse it */
1993 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1996 /* The last offset is a bit aggressive in that we assume the
1997 * worst case of FCoE being enabled and using a 3K buffer.
1998 * However this should have minimal impact as the 1K extra is
1999 * still less than one buffer in size.
2001 #define IXGBE_LAST_OFFSET \
2002 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
2003 if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
2007 /* If we have drained the page fragment pool we need to update
2008 * the pagecnt_bias and page count so that we fully restock the
2009 * number of references the driver holds.
2011 if (unlikely(!pagecnt_bias)) {
2012 page_ref_add(page, USHRT_MAX);
2013 rx_buffer->pagecnt_bias = USHRT_MAX;
2020 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
2021 * @rx_ring: rx descriptor ring to transact packets on
2022 * @rx_buffer: buffer containing page to add
2023 * @rx_desc: descriptor containing length of buffer written by hardware
2024 * @skb: sk_buff to place the data into
2026 * This function will add the data contained in rx_buffer->page to the skb.
2027 * This is done either through a direct copy if the data in the buffer is
2028 * less than the skb header size, otherwise it will just attach the page as
2029 * a frag to the skb.
2031 * The function will then update the page offset if necessary and return
2032 * true if the buffer can be reused by the adapter.
2034 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2035 struct ixgbe_rx_buffer *rx_buffer,
2036 struct sk_buff *skb,
2039 #if (PAGE_SIZE < 8192)
2040 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2042 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2043 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2044 SKB_DATA_ALIGN(size);
2046 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2047 rx_buffer->page_offset, size, truesize);
2048 #if (PAGE_SIZE < 8192)
2049 rx_buffer->page_offset ^= truesize;
2051 rx_buffer->page_offset += truesize;
2055 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2056 union ixgbe_adv_rx_desc *rx_desc,
2057 struct sk_buff **skb,
2058 const unsigned int size)
2060 struct ixgbe_rx_buffer *rx_buffer;
2062 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2063 prefetchw(rx_buffer->page);
2064 *skb = rx_buffer->skb;
2066 /* Delay unmapping of the first packet. It carries the header
2067 * information, HW may still access the header after the writeback.
2068 * Only unmap it when EOP is reached
2070 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2075 ixgbe_dma_sync_frag(rx_ring, *skb);
2078 /* we are reusing so sync this buffer for CPU use */
2079 dma_sync_single_range_for_cpu(rx_ring->dev,
2081 rx_buffer->page_offset,
2085 rx_buffer->pagecnt_bias--;
2090 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2091 struct ixgbe_rx_buffer *rx_buffer,
2092 struct sk_buff *skb)
2094 if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2095 /* hand second half of page back to the ring */
2096 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2098 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2099 /* the page has been released from the ring */
2100 IXGBE_CB(skb)->page_released = true;
2102 /* we are not reusing the buffer so unmap it */
2103 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2104 ixgbe_rx_pg_size(rx_ring),
2108 __page_frag_cache_drain(rx_buffer->page,
2109 rx_buffer->pagecnt_bias);
2112 /* clear contents of rx_buffer */
2113 rx_buffer->page = NULL;
2114 rx_buffer->skb = NULL;
2117 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2118 struct ixgbe_rx_buffer *rx_buffer,
2119 struct xdp_buff *xdp,
2120 union ixgbe_adv_rx_desc *rx_desc)
2122 unsigned int size = xdp->data_end - xdp->data;
2123 #if (PAGE_SIZE < 8192)
2124 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2126 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2127 xdp->data_hard_start);
2129 struct sk_buff *skb;
2131 /* prefetch first cache line of first page */
2132 prefetch(xdp->data);
2133 #if L1_CACHE_BYTES < 128
2134 prefetch(xdp->data + L1_CACHE_BYTES);
2137 /* allocate a skb to store the frags */
2138 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2142 if (size > IXGBE_RX_HDR_SIZE) {
2143 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2144 IXGBE_CB(skb)->dma = rx_buffer->dma;
2146 skb_add_rx_frag(skb, 0, rx_buffer->page,
2147 xdp->data - page_address(rx_buffer->page),
2149 #if (PAGE_SIZE < 8192)
2150 rx_buffer->page_offset ^= truesize;
2152 rx_buffer->page_offset += truesize;
2155 memcpy(__skb_put(skb, size),
2156 xdp->data, ALIGN(size, sizeof(long)));
2157 rx_buffer->pagecnt_bias++;
2163 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2164 struct ixgbe_rx_buffer *rx_buffer,
2165 struct xdp_buff *xdp,
2166 union ixgbe_adv_rx_desc *rx_desc)
2168 #if (PAGE_SIZE < 8192)
2169 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2171 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2172 SKB_DATA_ALIGN(xdp->data_end -
2173 xdp->data_hard_start);
2175 struct sk_buff *skb;
2177 /* prefetch first cache line of first page */
2178 prefetch(xdp->data);
2179 #if L1_CACHE_BYTES < 128
2180 prefetch(xdp->data + L1_CACHE_BYTES);
2183 /* build an skb to around the page buffer */
2184 skb = build_skb(xdp->data_hard_start, truesize);
2188 /* update pointers within the skb to store the data */
2189 skb_reserve(skb, xdp->data - xdp->data_hard_start);
2190 __skb_put(skb, xdp->data_end - xdp->data);
2192 /* record DMA address if this is the start of a chain of buffers */
2193 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2194 IXGBE_CB(skb)->dma = rx_buffer->dma;
2196 /* update buffer offset */
2197 #if (PAGE_SIZE < 8192)
2198 rx_buffer->page_offset ^= truesize;
2200 rx_buffer->page_offset += truesize;
2206 #define IXGBE_XDP_PASS 0
2207 #define IXGBE_XDP_CONSUMED 1
2208 #define IXGBE_XDP_TX 2
2210 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2211 struct xdp_buff *xdp);
2213 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2214 struct ixgbe_ring *rx_ring,
2215 struct xdp_buff *xdp)
2217 int err, result = IXGBE_XDP_PASS;
2218 struct bpf_prog *xdp_prog;
2222 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2227 act = bpf_prog_run_xdp(xdp_prog, xdp);
2232 result = ixgbe_xmit_xdp_ring(adapter, xdp);
2235 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2237 result = IXGBE_XDP_TX;
2239 result = IXGBE_XDP_CONSUMED;
2242 bpf_warn_invalid_xdp_action(act);
2245 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2246 /* fallthrough -- handle aborts by dropping packet */
2248 result = IXGBE_XDP_CONSUMED;
2253 return ERR_PTR(-result);
2256 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2257 struct ixgbe_rx_buffer *rx_buffer,
2260 #if (PAGE_SIZE < 8192)
2261 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2263 rx_buffer->page_offset ^= truesize;
2265 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2266 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2267 SKB_DATA_ALIGN(size);
2269 rx_buffer->page_offset += truesize;
2274 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2275 * @q_vector: structure containing interrupt and ring information
2276 * @rx_ring: rx descriptor ring to transact packets on
2277 * @budget: Total limit on number of packets to process
2279 * This function provides a "bounce buffer" approach to Rx interrupt
2280 * processing. The advantage to this is that on systems that have
2281 * expensive overhead for IOMMU access this provides a means of avoiding
2282 * it by maintaining the mapping of the page to the syste.
2284 * Returns amount of work completed
2286 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2287 struct ixgbe_ring *rx_ring,
2290 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2291 struct ixgbe_adapter *adapter = q_vector->adapter;
2294 unsigned int mss = 0;
2295 #endif /* IXGBE_FCOE */
2296 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2297 bool xdp_xmit = false;
2299 while (likely(total_rx_packets < budget)) {
2300 union ixgbe_adv_rx_desc *rx_desc;
2301 struct ixgbe_rx_buffer *rx_buffer;
2302 struct sk_buff *skb;
2303 struct xdp_buff xdp;
2306 /* return some buffers to hardware, one at a time is too slow */
2307 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2308 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2312 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2313 size = le16_to_cpu(rx_desc->wb.upper.length);
2317 /* This memory barrier is needed to keep us from reading
2318 * any other fields out of the rx_desc until we know the
2319 * descriptor has been written back
2323 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2325 /* retrieve a buffer from the ring */
2327 xdp.data = page_address(rx_buffer->page) +
2328 rx_buffer->page_offset;
2329 xdp.data_hard_start = xdp.data -
2330 ixgbe_rx_offset(rx_ring);
2331 xdp.data_end = xdp.data + size;
2333 skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2337 if (PTR_ERR(skb) == -IXGBE_XDP_TX) {
2339 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2341 rx_buffer->pagecnt_bias++;
2344 total_rx_bytes += size;
2346 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2347 } else if (ring_uses_build_skb(rx_ring)) {
2348 skb = ixgbe_build_skb(rx_ring, rx_buffer,
2351 skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2355 /* exit if we failed to retrieve a buffer */
2357 rx_ring->rx_stats.alloc_rx_buff_failed++;
2358 rx_buffer->pagecnt_bias++;
2362 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2365 /* place incomplete frames back on ring for completion */
2366 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2369 /* verify the packet layout is correct */
2370 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2373 /* probably a little skewed due to removing CRC */
2374 total_rx_bytes += skb->len;
2376 /* populate checksum, timestamp, VLAN, and protocol */
2377 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2380 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2381 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2382 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2383 /* include DDPed FCoE data */
2384 if (ddp_bytes > 0) {
2386 mss = rx_ring->netdev->mtu -
2387 sizeof(struct fcoe_hdr) -
2388 sizeof(struct fc_frame_header) -
2389 sizeof(struct fcoe_crc_eof);
2393 total_rx_bytes += ddp_bytes;
2394 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2398 dev_kfree_skb_any(skb);
2403 #endif /* IXGBE_FCOE */
2404 ixgbe_rx_skb(q_vector, skb);
2406 /* update budget accounting */
2411 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2413 /* Force memory writes to complete before letting h/w
2414 * know there are new descriptors to fetch.
2417 writel(ring->next_to_use, ring->tail);
2422 u64_stats_update_begin(&rx_ring->syncp);
2423 rx_ring->stats.packets += total_rx_packets;
2424 rx_ring->stats.bytes += total_rx_bytes;
2425 u64_stats_update_end(&rx_ring->syncp);
2426 q_vector->rx.total_packets += total_rx_packets;
2427 q_vector->rx.total_bytes += total_rx_bytes;
2429 return total_rx_packets;
2433 * ixgbe_configure_msix - Configure MSI-X hardware
2434 * @adapter: board private structure
2436 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2439 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2441 struct ixgbe_q_vector *q_vector;
2445 /* Populate MSIX to EITR Select */
2446 if (adapter->num_vfs > 32) {
2447 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2448 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2452 * Populate the IVAR table and set the ITR values to the
2453 * corresponding register.
2455 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2456 struct ixgbe_ring *ring;
2457 q_vector = adapter->q_vector[v_idx];
2459 ixgbe_for_each_ring(ring, q_vector->rx)
2460 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2462 ixgbe_for_each_ring(ring, q_vector->tx)
2463 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2465 ixgbe_write_eitr(q_vector);
2468 switch (adapter->hw.mac.type) {
2469 case ixgbe_mac_82598EB:
2470 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2473 case ixgbe_mac_82599EB:
2474 case ixgbe_mac_X540:
2475 case ixgbe_mac_X550:
2476 case ixgbe_mac_X550EM_x:
2477 case ixgbe_mac_x550em_a:
2478 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2483 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2485 /* set up to autoclear timer, and the vectors */
2486 mask = IXGBE_EIMS_ENABLE_MASK;
2487 mask &= ~(IXGBE_EIMS_OTHER |
2488 IXGBE_EIMS_MAILBOX |
2491 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2494 enum latency_range {
2498 latency_invalid = 255
2502 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2503 * @q_vector: structure containing interrupt and ring information
2504 * @ring_container: structure containing ring performance data
2506 * Stores a new ITR value based on packets and byte
2507 * counts during the last interrupt. The advantage of per interrupt
2508 * computation is faster updates and more accurate ITR for the current
2509 * traffic pattern. Constants in this function were computed
2510 * based on theoretical maximum wire speed and thresholds were set based
2511 * on testing data as well as attempting to minimize response time
2512 * while increasing bulk throughput.
2513 * this functionality is controlled by the InterruptThrottleRate module
2514 * parameter (see ixgbe_param.c)
2516 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2517 struct ixgbe_ring_container *ring_container)
2519 int bytes = ring_container->total_bytes;
2520 int packets = ring_container->total_packets;
2523 u8 itr_setting = ring_container->itr;
2528 /* simple throttlerate management
2529 * 0-10MB/s lowest (100000 ints/s)
2530 * 10-20MB/s low (20000 ints/s)
2531 * 20-1249MB/s bulk (12000 ints/s)
2533 /* what was last interrupt timeslice? */
2534 timepassed_us = q_vector->itr >> 2;
2535 if (timepassed_us == 0)
2538 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2540 switch (itr_setting) {
2541 case lowest_latency:
2542 if (bytes_perint > 10)
2543 itr_setting = low_latency;
2546 if (bytes_perint > 20)
2547 itr_setting = bulk_latency;
2548 else if (bytes_perint <= 10)
2549 itr_setting = lowest_latency;
2552 if (bytes_perint <= 20)
2553 itr_setting = low_latency;
2557 /* clear work counters since we have the values we need */
2558 ring_container->total_bytes = 0;
2559 ring_container->total_packets = 0;
2561 /* write updated itr to ring container */
2562 ring_container->itr = itr_setting;
2566 * ixgbe_write_eitr - write EITR register in hardware specific way
2567 * @q_vector: structure containing interrupt and ring information
2569 * This function is made to be called by ethtool and by the driver
2570 * when it needs to update EITR registers at runtime. Hardware
2571 * specific quirks/differences are taken care of here.
2573 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2575 struct ixgbe_adapter *adapter = q_vector->adapter;
2576 struct ixgbe_hw *hw = &adapter->hw;
2577 int v_idx = q_vector->v_idx;
2578 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2580 switch (adapter->hw.mac.type) {
2581 case ixgbe_mac_82598EB:
2582 /* must write high and low 16 bits to reset counter */
2583 itr_reg |= (itr_reg << 16);
2585 case ixgbe_mac_82599EB:
2586 case ixgbe_mac_X540:
2587 case ixgbe_mac_X550:
2588 case ixgbe_mac_X550EM_x:
2589 case ixgbe_mac_x550em_a:
2591 * set the WDIS bit to not clear the timer bits and cause an
2592 * immediate assertion of the interrupt
2594 itr_reg |= IXGBE_EITR_CNT_WDIS;
2599 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2602 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2604 u32 new_itr = q_vector->itr;
2607 ixgbe_update_itr(q_vector, &q_vector->tx);
2608 ixgbe_update_itr(q_vector, &q_vector->rx);
2610 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2612 switch (current_itr) {
2613 /* counts and packets in update_itr are dependent on these numbers */
2614 case lowest_latency:
2615 new_itr = IXGBE_100K_ITR;
2618 new_itr = IXGBE_20K_ITR;
2621 new_itr = IXGBE_12K_ITR;
2627 if (new_itr != q_vector->itr) {
2628 /* do an exponential smoothing */
2629 new_itr = (10 * new_itr * q_vector->itr) /
2630 ((9 * new_itr) + q_vector->itr);
2632 /* save the algorithm value here */
2633 q_vector->itr = new_itr;
2635 ixgbe_write_eitr(q_vector);
2640 * ixgbe_check_overtemp_subtask - check for over temperature
2641 * @adapter: pointer to adapter
2643 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2645 struct ixgbe_hw *hw = &adapter->hw;
2646 u32 eicr = adapter->interrupt_event;
2649 if (test_bit(__IXGBE_DOWN, &adapter->state))
2652 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2655 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2657 switch (hw->device_id) {
2658 case IXGBE_DEV_ID_82599_T3_LOM:
2660 * Since the warning interrupt is for both ports
2661 * we don't have to check if:
2662 * - This interrupt wasn't for our port.
2663 * - We may have missed the interrupt so always have to
2664 * check if we got a LSC
2666 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2667 !(eicr & IXGBE_EICR_LSC))
2670 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2672 bool link_up = false;
2674 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2680 /* Check if this is not due to overtemp */
2681 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2685 case IXGBE_DEV_ID_X550EM_A_1G_T:
2686 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2687 rc = hw->phy.ops.check_overtemp(hw);
2688 if (rc != IXGBE_ERR_OVERTEMP)
2692 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2694 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2698 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2700 adapter->interrupt_event = 0;
2703 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2705 struct ixgbe_hw *hw = &adapter->hw;
2707 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2708 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2709 e_crit(probe, "Fan has stopped, replace the adapter\n");
2710 /* write to clear the interrupt */
2711 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2715 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2717 struct ixgbe_hw *hw = &adapter->hw;
2719 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2722 switch (adapter->hw.mac.type) {
2723 case ixgbe_mac_82599EB:
2725 * Need to check link state so complete overtemp check
2728 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2729 (eicr & IXGBE_EICR_LSC)) &&
2730 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2731 adapter->interrupt_event = eicr;
2732 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2733 ixgbe_service_event_schedule(adapter);
2737 case ixgbe_mac_x550em_a:
2738 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2739 adapter->interrupt_event = eicr;
2740 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2741 ixgbe_service_event_schedule(adapter);
2742 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2743 IXGBE_EICR_GPI_SDP0_X550EM_a);
2744 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2745 IXGBE_EICR_GPI_SDP0_X550EM_a);
2748 case ixgbe_mac_X550:
2749 case ixgbe_mac_X540:
2750 if (!(eicr & IXGBE_EICR_TS))
2757 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2760 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2762 switch (hw->mac.type) {
2763 case ixgbe_mac_82598EB:
2764 if (hw->phy.type == ixgbe_phy_nl)
2767 case ixgbe_mac_82599EB:
2768 case ixgbe_mac_X550EM_x:
2769 case ixgbe_mac_x550em_a:
2770 switch (hw->mac.ops.get_media_type(hw)) {
2771 case ixgbe_media_type_fiber:
2772 case ixgbe_media_type_fiber_qsfp:
2782 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2784 struct ixgbe_hw *hw = &adapter->hw;
2785 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2787 if (!ixgbe_is_sfp(hw))
2790 /* Later MAC's use different SDP */
2791 if (hw->mac.type >= ixgbe_mac_X540)
2792 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2794 if (eicr & eicr_mask) {
2795 /* Clear the interrupt */
2796 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2797 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2798 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2799 adapter->sfp_poll_time = 0;
2800 ixgbe_service_event_schedule(adapter);
2804 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2805 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2806 /* Clear the interrupt */
2807 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2808 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2809 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2810 ixgbe_service_event_schedule(adapter);
2815 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2817 struct ixgbe_hw *hw = &adapter->hw;
2820 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2821 adapter->link_check_timeout = jiffies;
2822 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2823 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2824 IXGBE_WRITE_FLUSH(hw);
2825 ixgbe_service_event_schedule(adapter);
2829 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2833 struct ixgbe_hw *hw = &adapter->hw;
2835 switch (hw->mac.type) {
2836 case ixgbe_mac_82598EB:
2837 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2838 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2840 case ixgbe_mac_82599EB:
2841 case ixgbe_mac_X540:
2842 case ixgbe_mac_X550:
2843 case ixgbe_mac_X550EM_x:
2844 case ixgbe_mac_x550em_a:
2845 mask = (qmask & 0xFFFFFFFF);
2847 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2848 mask = (qmask >> 32);
2850 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2855 /* skip the flush */
2858 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2862 struct ixgbe_hw *hw = &adapter->hw;
2864 switch (hw->mac.type) {
2865 case ixgbe_mac_82598EB:
2866 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2867 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2869 case ixgbe_mac_82599EB:
2870 case ixgbe_mac_X540:
2871 case ixgbe_mac_X550:
2872 case ixgbe_mac_X550EM_x:
2873 case ixgbe_mac_x550em_a:
2874 mask = (qmask & 0xFFFFFFFF);
2876 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2877 mask = (qmask >> 32);
2879 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2884 /* skip the flush */
2888 * ixgbe_irq_enable - Enable default interrupt generation settings
2889 * @adapter: board private structure
2891 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2894 struct ixgbe_hw *hw = &adapter->hw;
2895 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2897 /* don't reenable LSC while waiting for link */
2898 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2899 mask &= ~IXGBE_EIMS_LSC;
2901 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2902 switch (adapter->hw.mac.type) {
2903 case ixgbe_mac_82599EB:
2904 mask |= IXGBE_EIMS_GPI_SDP0(hw);
2906 case ixgbe_mac_X540:
2907 case ixgbe_mac_X550:
2908 case ixgbe_mac_X550EM_x:
2909 case ixgbe_mac_x550em_a:
2910 mask |= IXGBE_EIMS_TS;
2915 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2916 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2917 switch (adapter->hw.mac.type) {
2918 case ixgbe_mac_82599EB:
2919 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2920 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2922 case ixgbe_mac_X540:
2923 case ixgbe_mac_X550:
2924 case ixgbe_mac_X550EM_x:
2925 case ixgbe_mac_x550em_a:
2926 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2927 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2928 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2929 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2930 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2931 mask |= IXGBE_EICR_GPI_SDP0_X540;
2932 mask |= IXGBE_EIMS_ECC;
2933 mask |= IXGBE_EIMS_MAILBOX;
2939 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2940 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2941 mask |= IXGBE_EIMS_FLOW_DIR;
2943 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2945 ixgbe_irq_enable_queues(adapter, ~0);
2947 IXGBE_WRITE_FLUSH(&adapter->hw);
2950 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2952 struct ixgbe_adapter *adapter = data;
2953 struct ixgbe_hw *hw = &adapter->hw;
2957 * Workaround for Silicon errata. Use clear-by-write instead
2958 * of clear-by-read. Reading with EICS will return the
2959 * interrupt causes without clearing, which later be done
2960 * with the write to EICR.
2962 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2964 /* The lower 16bits of the EICR register are for the queue interrupts
2965 * which should be masked here in order to not accidentally clear them if
2966 * the bits are high when ixgbe_msix_other is called. There is a race
2967 * condition otherwise which results in possible performance loss
2968 * especially if the ixgbe_msix_other interrupt is triggering
2969 * consistently (as it would when PPS is turned on for the X540 device)
2973 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2975 if (eicr & IXGBE_EICR_LSC)
2976 ixgbe_check_lsc(adapter);
2978 if (eicr & IXGBE_EICR_MAILBOX)
2979 ixgbe_msg_task(adapter);
2981 switch (hw->mac.type) {
2982 case ixgbe_mac_82599EB:
2983 case ixgbe_mac_X540:
2984 case ixgbe_mac_X550:
2985 case ixgbe_mac_X550EM_x:
2986 case ixgbe_mac_x550em_a:
2987 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2988 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2989 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2990 ixgbe_service_event_schedule(adapter);
2991 IXGBE_WRITE_REG(hw, IXGBE_EICR,
2992 IXGBE_EICR_GPI_SDP0_X540);
2994 if (eicr & IXGBE_EICR_ECC) {
2995 e_info(link, "Received ECC Err, initiating reset\n");
2996 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2997 ixgbe_service_event_schedule(adapter);
2998 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3000 /* Handle Flow Director Full threshold interrupt */
3001 if (eicr & IXGBE_EICR_FLOW_DIR) {
3002 int reinit_count = 0;
3004 for (i = 0; i < adapter->num_tx_queues; i++) {
3005 struct ixgbe_ring *ring = adapter->tx_ring[i];
3006 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3011 /* no more flow director interrupts until after init */
3012 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3013 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3014 ixgbe_service_event_schedule(adapter);
3017 ixgbe_check_sfp_event(adapter, eicr);
3018 ixgbe_check_overtemp_event(adapter, eicr);
3024 ixgbe_check_fan_failure(adapter, eicr);
3026 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3027 ixgbe_ptp_check_pps_event(adapter);
3029 /* re-enable the original interrupt state, no lsc, no queues */
3030 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3031 ixgbe_irq_enable(adapter, false, false);
3036 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3038 struct ixgbe_q_vector *q_vector = data;
3040 /* EIAM disabled interrupts (on this vector) for us */
3042 if (q_vector->rx.ring || q_vector->tx.ring)
3043 napi_schedule_irqoff(&q_vector->napi);
3049 * ixgbe_poll - NAPI Rx polling callback
3050 * @napi: structure for representing this polling device
3051 * @budget: how many packets driver is allowed to clean
3053 * This function is used for legacy and MSI, NAPI mode
3055 int ixgbe_poll(struct napi_struct *napi, int budget)
3057 struct ixgbe_q_vector *q_vector =
3058 container_of(napi, struct ixgbe_q_vector, napi);
3059 struct ixgbe_adapter *adapter = q_vector->adapter;
3060 struct ixgbe_ring *ring;
3061 int per_ring_budget, work_done = 0;
3062 bool clean_complete = true;
3064 #ifdef CONFIG_IXGBE_DCA
3065 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3066 ixgbe_update_dca(q_vector);
3069 ixgbe_for_each_ring(ring, q_vector->tx) {
3070 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3071 clean_complete = false;
3074 /* Exit if we are called by netpoll */
3078 /* attempt to distribute budget to each queue fairly, but don't allow
3079 * the budget to go below 1 because we'll exit polling */
3080 if (q_vector->rx.count > 1)
3081 per_ring_budget = max(budget/q_vector->rx.count, 1);
3083 per_ring_budget = budget;
3085 ixgbe_for_each_ring(ring, q_vector->rx) {
3086 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3089 work_done += cleaned;
3090 if (cleaned >= per_ring_budget)
3091 clean_complete = false;
3094 /* If all work not completed, return budget and keep polling */
3095 if (!clean_complete)
3098 /* all work done, exit the polling mode */
3099 napi_complete_done(napi, work_done);
3100 if (adapter->rx_itr_setting & 1)
3101 ixgbe_set_itr(q_vector);
3102 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3103 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3105 return min(work_done, budget - 1);
3109 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3110 * @adapter: board private structure
3112 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3113 * interrupts from the kernel.
3115 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3117 struct net_device *netdev = adapter->netdev;
3118 unsigned int ri = 0, ti = 0;
3121 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3122 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3123 struct msix_entry *entry = &adapter->msix_entries[vector];
3125 if (q_vector->tx.ring && q_vector->rx.ring) {
3126 snprintf(q_vector->name, sizeof(q_vector->name),
3127 "%s-TxRx-%u", netdev->name, ri++);
3129 } else if (q_vector->rx.ring) {
3130 snprintf(q_vector->name, sizeof(q_vector->name),
3131 "%s-rx-%u", netdev->name, ri++);
3132 } else if (q_vector->tx.ring) {
3133 snprintf(q_vector->name, sizeof(q_vector->name),
3134 "%s-tx-%u", netdev->name, ti++);
3136 /* skip this unused q_vector */
3139 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3140 q_vector->name, q_vector);
3142 e_err(probe, "request_irq failed for MSIX interrupt "
3143 "Error: %d\n", err);
3144 goto free_queue_irqs;
3146 /* If Flow Director is enabled, set interrupt affinity */
3147 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3148 /* assign the mask for this irq */
3149 irq_set_affinity_hint(entry->vector,
3150 &q_vector->affinity_mask);
3154 err = request_irq(adapter->msix_entries[vector].vector,
3155 ixgbe_msix_other, 0, netdev->name, adapter);
3157 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3158 goto free_queue_irqs;
3166 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3168 free_irq(adapter->msix_entries[vector].vector,
3169 adapter->q_vector[vector]);
3171 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3172 pci_disable_msix(adapter->pdev);
3173 kfree(adapter->msix_entries);
3174 adapter->msix_entries = NULL;
3179 * ixgbe_intr - legacy mode Interrupt Handler
3180 * @irq: interrupt number
3181 * @data: pointer to a network interface device structure
3183 static irqreturn_t ixgbe_intr(int irq, void *data)
3185 struct ixgbe_adapter *adapter = data;
3186 struct ixgbe_hw *hw = &adapter->hw;
3187 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3191 * Workaround for silicon errata #26 on 82598. Mask the interrupt
3192 * before the read of EICR.
3194 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3196 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3197 * therefore no explicit interrupt disable is necessary */
3198 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3201 * shared interrupt alert!
3202 * make sure interrupts are enabled because the read will
3203 * have disabled interrupts due to EIAM
3204 * finish the workaround of silicon errata on 82598. Unmask
3205 * the interrupt that we masked before the EICR read.
3207 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3208 ixgbe_irq_enable(adapter, true, true);
3209 return IRQ_NONE; /* Not our interrupt */
3212 if (eicr & IXGBE_EICR_LSC)
3213 ixgbe_check_lsc(adapter);
3215 switch (hw->mac.type) {
3216 case ixgbe_mac_82599EB:
3217 ixgbe_check_sfp_event(adapter, eicr);
3219 case ixgbe_mac_X540:
3220 case ixgbe_mac_X550:
3221 case ixgbe_mac_X550EM_x:
3222 case ixgbe_mac_x550em_a:
3223 if (eicr & IXGBE_EICR_ECC) {
3224 e_info(link, "Received ECC Err, initiating reset\n");
3225 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3226 ixgbe_service_event_schedule(adapter);
3227 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3229 ixgbe_check_overtemp_event(adapter, eicr);
3235 ixgbe_check_fan_failure(adapter, eicr);
3236 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3237 ixgbe_ptp_check_pps_event(adapter);
3239 /* would disable interrupts here but EIAM disabled it */
3240 napi_schedule_irqoff(&q_vector->napi);
3243 * re-enable link(maybe) and non-queue interrupts, no flush.
3244 * ixgbe_poll will re-enable the queue interrupts
3246 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3247 ixgbe_irq_enable(adapter, false, false);
3253 * ixgbe_request_irq - initialize interrupts
3254 * @adapter: board private structure
3256 * Attempts to configure interrupts using the best available
3257 * capabilities of the hardware and kernel.
3259 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3261 struct net_device *netdev = adapter->netdev;
3264 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3265 err = ixgbe_request_msix_irqs(adapter);
3266 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3267 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3268 netdev->name, adapter);
3270 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3271 netdev->name, adapter);
3274 e_err(probe, "request_irq failed, Error %d\n", err);
3279 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3283 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3284 free_irq(adapter->pdev->irq, adapter);
3288 if (!adapter->msix_entries)
3291 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3292 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3293 struct msix_entry *entry = &adapter->msix_entries[vector];
3295 /* free only the irqs that were actually requested */
3296 if (!q_vector->rx.ring && !q_vector->tx.ring)
3299 /* clear the affinity_mask in the IRQ descriptor */
3300 irq_set_affinity_hint(entry->vector, NULL);
3302 free_irq(entry->vector, q_vector);
3305 free_irq(adapter->msix_entries[vector].vector, adapter);
3309 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3310 * @adapter: board private structure
3312 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3314 switch (adapter->hw.mac.type) {
3315 case ixgbe_mac_82598EB:
3316 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3318 case ixgbe_mac_82599EB:
3319 case ixgbe_mac_X540:
3320 case ixgbe_mac_X550:
3321 case ixgbe_mac_X550EM_x:
3322 case ixgbe_mac_x550em_a:
3323 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3324 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3325 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3330 IXGBE_WRITE_FLUSH(&adapter->hw);
3331 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3334 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3335 synchronize_irq(adapter->msix_entries[vector].vector);
3337 synchronize_irq(adapter->msix_entries[vector++].vector);
3339 synchronize_irq(adapter->pdev->irq);
3344 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3347 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3349 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3351 ixgbe_write_eitr(q_vector);
3353 ixgbe_set_ivar(adapter, 0, 0, 0);
3354 ixgbe_set_ivar(adapter, 1, 0, 0);
3356 e_info(hw, "Legacy interrupt IVAR setup done\n");
3360 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3361 * @adapter: board private structure
3362 * @ring: structure containing ring specific data
3364 * Configure the Tx descriptor ring after a reset.
3366 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3367 struct ixgbe_ring *ring)
3369 struct ixgbe_hw *hw = &adapter->hw;
3370 u64 tdba = ring->dma;
3372 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3373 u8 reg_idx = ring->reg_idx;
3375 /* disable queue to avoid issues while updating state */
3376 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3377 IXGBE_WRITE_FLUSH(hw);
3379 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3380 (tdba & DMA_BIT_MASK(32)));
3381 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3382 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3383 ring->count * sizeof(union ixgbe_adv_tx_desc));
3384 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3385 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3386 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3389 * set WTHRESH to encourage burst writeback, it should not be set
3390 * higher than 1 when:
3391 * - ITR is 0 as it could cause false TX hangs
3392 * - ITR is set to > 100k int/sec and BQL is enabled
3394 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3395 * to or less than the number of on chip descriptors, which is
3398 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3399 txdctl |= 1u << 16; /* WTHRESH = 1 */
3401 txdctl |= 8u << 16; /* WTHRESH = 8 */
3404 * Setting PTHRESH to 32 both improves performance
3405 * and avoids a TX hang with DFP enabled
3407 txdctl |= (1u << 8) | /* HTHRESH = 1 */
3408 32; /* PTHRESH = 32 */
3410 /* reinitialize flowdirector state */
3411 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3412 ring->atr_sample_rate = adapter->atr_sample_rate;
3413 ring->atr_count = 0;
3414 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3416 ring->atr_sample_rate = 0;
3419 /* initialize XPS */
3420 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3421 struct ixgbe_q_vector *q_vector = ring->q_vector;
3424 netif_set_xps_queue(ring->netdev,
3425 &q_vector->affinity_mask,
3429 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3431 /* reinitialize tx_buffer_info */
3432 memset(ring->tx_buffer_info, 0,
3433 sizeof(struct ixgbe_tx_buffer) * ring->count);
3436 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3438 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3439 if (hw->mac.type == ixgbe_mac_82598EB &&
3440 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3443 /* poll to verify queue is enabled */
3445 usleep_range(1000, 2000);
3446 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3447 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3449 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3452 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3454 struct ixgbe_hw *hw = &adapter->hw;
3456 u8 tcs = netdev_get_num_tc(adapter->netdev);
3458 if (hw->mac.type == ixgbe_mac_82598EB)
3461 /* disable the arbiter while setting MTQC */
3462 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3463 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3464 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3466 /* set transmit pool layout */
3467 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3468 mtqc = IXGBE_MTQC_VT_ENA;
3470 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3472 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3473 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3474 IXGBE_82599_VMDQ_4Q_MASK)
3475 mtqc |= IXGBE_MTQC_32VF;
3477 mtqc |= IXGBE_MTQC_64VF;
3480 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3482 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3484 mtqc = IXGBE_MTQC_64Q_1PB;
3487 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3489 /* Enable Security TX Buffer IFG for multiple pb */
3491 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3492 sectx |= IXGBE_SECTX_DCB;
3493 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3496 /* re-enable the arbiter */
3497 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3498 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3502 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3503 * @adapter: board private structure
3505 * Configure the Tx unit of the MAC after a reset.
3507 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3509 struct ixgbe_hw *hw = &adapter->hw;
3513 ixgbe_setup_mtqc(adapter);
3515 if (hw->mac.type != ixgbe_mac_82598EB) {
3516 /* DMATXCTL.EN must be before Tx queues are enabled */
3517 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3518 dmatxctl |= IXGBE_DMATXCTL_TE;
3519 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3522 /* Setup the HW Tx Head and Tail descriptor pointers */
3523 for (i = 0; i < adapter->num_tx_queues; i++)
3524 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3525 for (i = 0; i < adapter->num_xdp_queues; i++)
3526 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3529 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3530 struct ixgbe_ring *ring)
3532 struct ixgbe_hw *hw = &adapter->hw;
3533 u8 reg_idx = ring->reg_idx;
3534 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3536 srrctl |= IXGBE_SRRCTL_DROP_EN;
3538 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3541 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3542 struct ixgbe_ring *ring)
3544 struct ixgbe_hw *hw = &adapter->hw;
3545 u8 reg_idx = ring->reg_idx;
3546 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3548 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3550 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3553 #ifdef CONFIG_IXGBE_DCB
3554 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3556 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3560 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3562 if (adapter->ixgbe_ieee_pfc)
3563 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3566 * We should set the drop enable bit if:
3569 * Number of Rx queues > 1 and flow control is disabled
3571 * This allows us to avoid head of line blocking for security
3572 * and performance reasons.
3574 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3575 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3576 for (i = 0; i < adapter->num_rx_queues; i++)
3577 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3579 for (i = 0; i < adapter->num_rx_queues; i++)
3580 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3584 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3586 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3587 struct ixgbe_ring *rx_ring)
3589 struct ixgbe_hw *hw = &adapter->hw;
3591 u8 reg_idx = rx_ring->reg_idx;
3593 if (hw->mac.type == ixgbe_mac_82598EB) {
3594 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3597 * if VMDq is not active we must program one srrctl register
3598 * per RSS queue since we have enabled RDRXCTL.MVMEN
3603 /* configure header buffer length, needed for RSC */
3604 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3606 /* configure the packet buffer length */
3607 if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3608 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3610 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3612 /* configure descriptor type */
3613 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3615 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3619 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3620 * @adapter: device handle
3622 * - 82598/82599/X540: 128
3623 * - X550(non-SRIOV mode): 512
3624 * - X550(SRIOV mode): 64
3626 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3628 if (adapter->hw.mac.type < ixgbe_mac_X550)
3630 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3637 * ixgbe_store_key - Write the RSS key to HW
3638 * @adapter: device handle
3640 * Write the RSS key stored in adapter.rss_key to HW.
3642 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3644 struct ixgbe_hw *hw = &adapter->hw;
3647 for (i = 0; i < 10; i++)
3648 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3652 * ixgbe_init_rss_key - Initialize adapter RSS key
3653 * @adapter: device handle
3655 * Allocates and initializes the RSS key if it is not allocated.
3657 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3661 if (!adapter->rss_key) {
3662 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3663 if (unlikely(!rss_key))
3666 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3667 adapter->rss_key = rss_key;
3674 * ixgbe_store_reta - Write the RETA table to HW
3675 * @adapter: device handle
3677 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3679 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3681 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3682 struct ixgbe_hw *hw = &adapter->hw;
3685 u8 *indir_tbl = adapter->rss_indir_tbl;
3687 /* Fill out the redirection table as follows:
3688 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3690 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3691 * - X550: 8 bit wide entries containing 6 bit RSS index
3693 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3694 indices_multi = 0x11;
3696 indices_multi = 0x1;
3698 /* Write redirection table to HW */
3699 for (i = 0; i < reta_entries; i++) {
3700 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3703 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3705 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3713 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3714 * @adapter: device handle
3716 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3718 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3720 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3721 struct ixgbe_hw *hw = &adapter->hw;
3723 unsigned int pf_pool = adapter->num_vfs;
3725 /* Write redirection table to HW */
3726 for (i = 0; i < reta_entries; i++) {
3727 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3729 IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3736 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3739 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3740 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3742 /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3743 * make full use of any rings they may have. We will use the
3744 * PSRTYPE register to control how many rings we use within the PF.
3746 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3749 /* Fill out hash function seeds */
3750 ixgbe_store_key(adapter);
3752 /* Fill out redirection table */
3753 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3755 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3759 adapter->rss_indir_tbl[i] = j;
3762 ixgbe_store_reta(adapter);
3765 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3767 struct ixgbe_hw *hw = &adapter->hw;
3768 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3769 unsigned int pf_pool = adapter->num_vfs;
3772 /* Fill out hash function seeds */
3773 for (i = 0; i < 10; i++)
3774 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3775 *(adapter->rss_key + i));
3777 /* Fill out the redirection table */
3778 for (i = 0, j = 0; i < 64; i++, j++) {
3782 adapter->rss_indir_tbl[i] = j;
3785 ixgbe_store_vfreta(adapter);
3788 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3790 struct ixgbe_hw *hw = &adapter->hw;
3791 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3794 /* Disable indicating checksum in descriptor, enables RSS hash */
3795 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3796 rxcsum |= IXGBE_RXCSUM_PCSD;
3797 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3799 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3800 if (adapter->ring_feature[RING_F_RSS].mask)
3801 mrqc = IXGBE_MRQC_RSSEN;
3803 u8 tcs = netdev_get_num_tc(adapter->netdev);
3805 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3807 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3809 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3810 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3811 IXGBE_82599_VMDQ_4Q_MASK)
3812 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3814 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3816 /* Enable L3/L4 for Tx Switched packets */
3817 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3820 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3822 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3824 mrqc = IXGBE_MRQC_RSSEN;
3828 /* Perform hash on these packet types */
3829 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3830 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3831 IXGBE_MRQC_RSS_FIELD_IPV6 |
3832 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3834 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3835 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3836 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3837 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3839 if ((hw->mac.type >= ixgbe_mac_X550) &&
3840 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3841 unsigned int pf_pool = adapter->num_vfs;
3843 /* Enable VF RSS mode */
3844 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3845 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3847 /* Setup RSS through the VF registers */
3848 ixgbe_setup_vfreta(adapter);
3849 vfmrqc = IXGBE_MRQC_RSSEN;
3850 vfmrqc |= rss_field;
3851 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3853 ixgbe_setup_reta(adapter);
3855 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3860 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3861 * @adapter: address of board private structure
3862 * @index: index of ring to set
3864 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3865 struct ixgbe_ring *ring)
3867 struct ixgbe_hw *hw = &adapter->hw;
3869 u8 reg_idx = ring->reg_idx;
3871 if (!ring_is_rsc_enabled(ring))
3874 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3875 rscctrl |= IXGBE_RSCCTL_RSCEN;
3877 * we must limit the number of descriptors so that the
3878 * total size of max desc * buf_len is not greater
3881 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3882 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3885 #define IXGBE_MAX_RX_DESC_POLL 10
3886 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3887 struct ixgbe_ring *ring)
3889 struct ixgbe_hw *hw = &adapter->hw;
3890 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3892 u8 reg_idx = ring->reg_idx;
3894 if (ixgbe_removed(hw->hw_addr))
3896 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3897 if (hw->mac.type == ixgbe_mac_82598EB &&
3898 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3902 usleep_range(1000, 2000);
3903 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3904 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3907 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3908 "the polling period\n", reg_idx);
3912 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3913 struct ixgbe_ring *ring)
3915 struct ixgbe_hw *hw = &adapter->hw;
3916 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3918 u8 reg_idx = ring->reg_idx;
3920 if (ixgbe_removed(hw->hw_addr))
3922 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3923 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3925 /* write value back with RXDCTL.ENABLE bit cleared */
3926 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3928 if (hw->mac.type == ixgbe_mac_82598EB &&
3929 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3932 /* the hardware may take up to 100us to really disable the rx queue */
3935 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3936 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3939 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3940 "the polling period\n", reg_idx);
3944 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3945 struct ixgbe_ring *ring)
3947 struct ixgbe_hw *hw = &adapter->hw;
3948 union ixgbe_adv_rx_desc *rx_desc;
3949 u64 rdba = ring->dma;
3951 u8 reg_idx = ring->reg_idx;
3953 /* disable queue to avoid issues while updating state */
3954 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3955 ixgbe_disable_rx_queue(adapter, ring);
3957 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3958 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3959 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3960 ring->count * sizeof(union ixgbe_adv_rx_desc));
3961 /* Force flushing of IXGBE_RDLEN to prevent MDD */
3962 IXGBE_WRITE_FLUSH(hw);
3964 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3965 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3966 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3968 ixgbe_configure_srrctl(adapter, ring);
3969 ixgbe_configure_rscctl(adapter, ring);
3971 if (hw->mac.type == ixgbe_mac_82598EB) {
3973 * enable cache line friendly hardware writes:
3974 * PTHRESH=32 descriptors (half the internal cache),
3975 * this also removes ugly rx_no_buffer_count increment
3976 * HTHRESH=4 descriptors (to minimize latency on fetch)
3977 * WTHRESH=8 burst writeback up to two cache lines
3979 rxdctl &= ~0x3FFFFF;
3981 #if (PAGE_SIZE < 8192)
3983 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
3984 IXGBE_RXDCTL_RLPML_EN);
3986 /* Limit the maximum frame size so we don't overrun the skb */
3987 if (ring_uses_build_skb(ring) &&
3988 !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
3989 rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
3990 IXGBE_RXDCTL_RLPML_EN;
3994 /* initialize rx_buffer_info */
3995 memset(ring->rx_buffer_info, 0,
3996 sizeof(struct ixgbe_rx_buffer) * ring->count);
3998 /* initialize Rx descriptor 0 */
3999 rx_desc = IXGBE_RX_DESC(ring, 0);
4000 rx_desc->wb.upper.length = 0;
4002 /* enable receive descriptor ring */
4003 rxdctl |= IXGBE_RXDCTL_ENABLE;
4004 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4006 ixgbe_rx_desc_queue_enable(adapter, ring);
4007 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4010 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4012 struct ixgbe_hw *hw = &adapter->hw;
4013 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4016 /* PSRTYPE must be initialized in non 82598 adapters */
4017 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4018 IXGBE_PSRTYPE_UDPHDR |
4019 IXGBE_PSRTYPE_IPV4HDR |
4020 IXGBE_PSRTYPE_L2HDR |
4021 IXGBE_PSRTYPE_IPV6HDR;
4023 if (hw->mac.type == ixgbe_mac_82598EB)
4027 psrtype |= 2u << 29;
4029 psrtype |= 1u << 29;
4031 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
4032 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4035 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4037 struct ixgbe_hw *hw = &adapter->hw;
4038 u32 reg_offset, vf_shift;
4039 u32 gcr_ext, vmdctl;
4042 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4045 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4046 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4047 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4048 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4049 vmdctl |= IXGBE_VT_CTL_REPLEN;
4050 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4052 vf_shift = VMDQ_P(0) % 32;
4053 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4055 /* Enable only the PF's pool for Tx/Rx */
4056 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4057 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4058 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4059 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4060 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4061 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4063 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4064 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4066 /* clear VLAN promisc flag so VFTA will be updated if necessary */
4067 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4070 * Set up VF register offsets for selected VT Mode,
4071 * i.e. 32 or 64 VFs for SR-IOV
4073 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4074 case IXGBE_82599_VMDQ_8Q_MASK:
4075 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4077 case IXGBE_82599_VMDQ_4Q_MASK:
4078 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4081 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4085 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4087 for (i = 0; i < adapter->num_vfs; i++) {
4088 /* configure spoof checking */
4089 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4090 adapter->vfinfo[i].spoofchk_enabled);
4092 /* Enable/Disable RSS query feature */
4093 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4094 adapter->vfinfo[i].rss_query_enabled);
4098 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4100 struct ixgbe_hw *hw = &adapter->hw;
4101 struct net_device *netdev = adapter->netdev;
4102 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4103 struct ixgbe_ring *rx_ring;
4108 /* adjust max frame to be able to do baby jumbo for FCoE */
4109 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4110 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4111 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4113 #endif /* IXGBE_FCOE */
4115 /* adjust max frame to be at least the size of a standard frame */
4116 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4117 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4119 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4120 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4121 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4122 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4124 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4127 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4128 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4129 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4130 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4133 * Setup the HW Rx Head and Tail Descriptor Pointers and
4134 * the Base and Length of the Rx Descriptor Ring
4136 for (i = 0; i < adapter->num_rx_queues; i++) {
4137 rx_ring = adapter->rx_ring[i];
4139 clear_ring_rsc_enabled(rx_ring);
4140 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4141 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4143 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4144 set_ring_rsc_enabled(rx_ring);
4146 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4147 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4149 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4150 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4153 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4155 #if (PAGE_SIZE < 8192)
4156 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4157 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4159 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4160 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4161 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4166 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4168 struct ixgbe_hw *hw = &adapter->hw;
4169 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4171 switch (hw->mac.type) {
4172 case ixgbe_mac_82598EB:
4174 * For VMDq support of different descriptor types or
4175 * buffer sizes through the use of multiple SRRCTL
4176 * registers, RDRXCTL.MVMEN must be set to 1
4178 * also, the manual doesn't mention it clearly but DCA hints
4179 * will only use queue 0's tags unless this bit is set. Side
4180 * effects of setting this bit are only that SRRCTL must be
4181 * fully programmed [0..15]
4183 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4185 case ixgbe_mac_X550:
4186 case ixgbe_mac_X550EM_x:
4187 case ixgbe_mac_x550em_a:
4188 if (adapter->num_vfs)
4189 rdrxctl |= IXGBE_RDRXCTL_PSP;
4191 case ixgbe_mac_82599EB:
4192 case ixgbe_mac_X540:
4193 /* Disable RSC for ACK packets */
4194 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4195 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4196 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4197 /* hardware requires some bits to be set by default */
4198 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4199 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4202 /* We should do nothing since we don't know this hardware */
4206 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4210 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4211 * @adapter: board private structure
4213 * Configure the Rx unit of the MAC after a reset.
4215 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4217 struct ixgbe_hw *hw = &adapter->hw;
4221 /* disable receives while setting up the descriptors */
4222 hw->mac.ops.disable_rx(hw);
4224 ixgbe_setup_psrtype(adapter);
4225 ixgbe_setup_rdrxctl(adapter);
4228 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4229 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4230 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4231 rfctl |= IXGBE_RFCTL_RSC_DIS;
4233 /* disable NFS filtering */
4234 rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4235 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4237 /* Program registers for the distribution of queues */
4238 ixgbe_setup_mrqc(adapter);
4240 /* set_rx_buffer_len must be called before ring initialization */
4241 ixgbe_set_rx_buffer_len(adapter);
4244 * Setup the HW Rx Head and Tail Descriptor Pointers and
4245 * the Base and Length of the Rx Descriptor Ring
4247 for (i = 0; i < adapter->num_rx_queues; i++)
4248 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4250 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4251 /* disable drop enable for 82598 parts */
4252 if (hw->mac.type == ixgbe_mac_82598EB)
4253 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4255 /* enable all receives */
4256 rxctrl |= IXGBE_RXCTRL_RXEN;
4257 hw->mac.ops.enable_rx_dma(hw, rxctrl);
4260 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4261 __be16 proto, u16 vid)
4263 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4264 struct ixgbe_hw *hw = &adapter->hw;
4266 /* add VID to filter table */
4267 if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4268 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4270 set_bit(vid, adapter->active_vlans);
4275 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4280 /* short cut the special case */
4284 /* Search for the vlan id in the VLVF entries */
4285 for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4286 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4287 if ((vlvf & VLAN_VID_MASK) == vlan)
4294 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4296 struct ixgbe_hw *hw = &adapter->hw;
4300 idx = ixgbe_find_vlvf_entry(hw, vid);
4304 /* See if any other pools are set for this VLAN filter
4305 * entry other than the PF.
4307 word = idx * 2 + (VMDQ_P(0) / 32);
4308 bits = ~BIT(VMDQ_P(0) % 32);
4309 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4311 /* Disable the filter so this falls into the default pool. */
4312 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4313 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4314 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4315 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4319 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4320 __be16 proto, u16 vid)
4322 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4323 struct ixgbe_hw *hw = &adapter->hw;
4325 /* remove VID from filter table */
4326 if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4327 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4329 clear_bit(vid, adapter->active_vlans);
4335 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4336 * @adapter: driver data
4338 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4340 struct ixgbe_hw *hw = &adapter->hw;
4344 switch (hw->mac.type) {
4345 case ixgbe_mac_82598EB:
4346 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4347 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4348 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4350 case ixgbe_mac_82599EB:
4351 case ixgbe_mac_X540:
4352 case ixgbe_mac_X550:
4353 case ixgbe_mac_X550EM_x:
4354 case ixgbe_mac_x550em_a:
4355 for (i = 0; i < adapter->num_rx_queues; i++) {
4356 struct ixgbe_ring *ring = adapter->rx_ring[i];
4358 if (ring->l2_accel_priv)
4361 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4362 vlnctrl &= ~IXGBE_RXDCTL_VME;
4363 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4372 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4373 * @adapter: driver data
4375 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4377 struct ixgbe_hw *hw = &adapter->hw;
4381 switch (hw->mac.type) {
4382 case ixgbe_mac_82598EB:
4383 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4384 vlnctrl |= IXGBE_VLNCTRL_VME;
4385 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4387 case ixgbe_mac_82599EB:
4388 case ixgbe_mac_X540:
4389 case ixgbe_mac_X550:
4390 case ixgbe_mac_X550EM_x:
4391 case ixgbe_mac_x550em_a:
4392 for (i = 0; i < adapter->num_rx_queues; i++) {
4393 struct ixgbe_ring *ring = adapter->rx_ring[i];
4395 if (ring->l2_accel_priv)
4398 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4399 vlnctrl |= IXGBE_RXDCTL_VME;
4400 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4408 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4410 struct ixgbe_hw *hw = &adapter->hw;
4413 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4415 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4416 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4417 vlnctrl |= IXGBE_VLNCTRL_VFE;
4418 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4420 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4421 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4425 /* Nothing to do for 82598 */
4426 if (hw->mac.type == ixgbe_mac_82598EB)
4429 /* We are already in VLAN promisc, nothing to do */
4430 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4433 /* Set flag so we don't redo unnecessary work */
4434 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4436 /* Add PF to all active pools */
4437 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4438 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4439 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4441 vlvfb |= BIT(VMDQ_P(0) % 32);
4442 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4445 /* Set all bits in the VLAN filter table array */
4446 for (i = hw->mac.vft_size; i--;)
4447 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4450 #define VFTA_BLOCK_SIZE 8
4451 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4453 struct ixgbe_hw *hw = &adapter->hw;
4454 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4455 u32 vid_start = vfta_offset * 32;
4456 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4457 u32 i, vid, word, bits;
4459 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4460 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4462 /* pull VLAN ID from VLVF */
4463 vid = vlvf & VLAN_VID_MASK;
4465 /* only concern outselves with a certain range */
4466 if (vid < vid_start || vid >= vid_end)
4470 /* record VLAN ID in VFTA */
4471 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4473 /* if PF is part of this then continue */
4474 if (test_bit(vid, adapter->active_vlans))
4478 /* remove PF from the pool */
4479 word = i * 2 + VMDQ_P(0) / 32;
4480 bits = ~BIT(VMDQ_P(0) % 32);
4481 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4482 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4485 /* extract values from active_vlans and write back to VFTA */
4486 for (i = VFTA_BLOCK_SIZE; i--;) {
4487 vid = (vfta_offset + i) * 32;
4488 word = vid / BITS_PER_LONG;
4489 bits = vid % BITS_PER_LONG;
4491 vfta[i] |= adapter->active_vlans[word] >> bits;
4493 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4497 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4499 struct ixgbe_hw *hw = &adapter->hw;
4502 /* Set VLAN filtering to enabled */
4503 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4504 vlnctrl |= IXGBE_VLNCTRL_VFE;
4505 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4507 if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4508 hw->mac.type == ixgbe_mac_82598EB)
4511 /* We are not in VLAN promisc, nothing to do */
4512 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4515 /* Set flag so we don't redo unnecessary work */
4516 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4518 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4519 ixgbe_scrub_vfta(adapter, i);
4522 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4526 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4528 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4529 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4533 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4534 * @netdev: network interface device structure
4536 * Writes multicast address list to the MTA hash table.
4537 * Returns: -ENOMEM on failure
4538 * 0 on no addresses written
4539 * X on writing X addresses to MTA
4541 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4543 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4544 struct ixgbe_hw *hw = &adapter->hw;
4546 if (!netif_running(netdev))
4549 if (hw->mac.ops.update_mc_addr_list)
4550 hw->mac.ops.update_mc_addr_list(hw, netdev);
4554 #ifdef CONFIG_PCI_IOV
4555 ixgbe_restore_vf_multicasts(adapter);
4558 return netdev_mc_count(netdev);
4561 #ifdef CONFIG_PCI_IOV
4562 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4564 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4565 struct ixgbe_hw *hw = &adapter->hw;
4568 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4569 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4571 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4572 hw->mac.ops.set_rar(hw, i,
4577 hw->mac.ops.clear_rar(hw, i);
4582 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4584 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4585 struct ixgbe_hw *hw = &adapter->hw;
4588 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4589 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4592 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4594 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4595 hw->mac.ops.set_rar(hw, i,
4600 hw->mac.ops.clear_rar(hw, i);
4604 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4606 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4607 struct ixgbe_hw *hw = &adapter->hw;
4610 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4611 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4612 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4615 ixgbe_sync_mac_table(adapter);
4618 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4620 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4621 struct ixgbe_hw *hw = &adapter->hw;
4624 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4625 /* do not count default RAR as available */
4626 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4629 /* only count unused and addresses that belong to us */
4630 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4631 if (mac_table->pool != pool)
4641 /* this function destroys the first RAR entry */
4642 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4644 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4645 struct ixgbe_hw *hw = &adapter->hw;
4647 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4648 mac_table->pool = VMDQ_P(0);
4650 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4652 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4656 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4657 const u8 *addr, u16 pool)
4659 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4660 struct ixgbe_hw *hw = &adapter->hw;
4663 if (is_zero_ether_addr(addr))
4666 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4667 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4670 ether_addr_copy(mac_table->addr, addr);
4671 mac_table->pool = pool;
4673 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4674 IXGBE_MAC_STATE_IN_USE;
4676 ixgbe_sync_mac_table(adapter);
4684 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4685 const u8 *addr, u16 pool)
4687 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4688 struct ixgbe_hw *hw = &adapter->hw;
4691 if (is_zero_ether_addr(addr))
4694 /* search table for addr, if found clear IN_USE flag and sync */
4695 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4696 /* we can only delete an entry if it is in use */
4697 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4699 /* we only care about entries that belong to the given pool */
4700 if (mac_table->pool != pool)
4702 /* we only care about a specific MAC address */
4703 if (!ether_addr_equal(addr, mac_table->addr))
4706 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4707 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4709 ixgbe_sync_mac_table(adapter);
4717 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4718 * @netdev: network interface device structure
4720 * Writes unicast address list to the RAR table.
4721 * Returns: -ENOMEM on failure/insufficient address space
4722 * 0 on no addresses written
4723 * X on writing X addresses to the RAR table
4725 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4727 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4730 /* return ENOMEM indicating insufficient memory for addresses */
4731 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4734 if (!netdev_uc_empty(netdev)) {
4735 struct netdev_hw_addr *ha;
4736 netdev_for_each_uc_addr(ha, netdev) {
4737 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4738 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4745 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4747 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4750 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4752 return min_t(int, ret, 0);
4755 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4757 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4759 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4765 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4766 * @netdev: network interface device structure
4768 * The set_rx_method entry point is called whenever the unicast/multicast
4769 * address list or the network interface flags are updated. This routine is
4770 * responsible for configuring the hardware for proper unicast, multicast and
4773 void ixgbe_set_rx_mode(struct net_device *netdev)
4775 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4776 struct ixgbe_hw *hw = &adapter->hw;
4777 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4778 netdev_features_t features = netdev->features;
4781 /* Check for Promiscuous and All Multicast modes */
4782 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4784 /* set all bits that we expect to always be set */
4785 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4786 fctrl |= IXGBE_FCTRL_BAM;
4787 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4788 fctrl |= IXGBE_FCTRL_PMCF;
4790 /* clear the bits we are changing the status of */
4791 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4792 if (netdev->flags & IFF_PROMISC) {
4793 hw->addr_ctrl.user_set_promisc = true;
4794 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4795 vmolr |= IXGBE_VMOLR_MPE;
4796 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4798 if (netdev->flags & IFF_ALLMULTI) {
4799 fctrl |= IXGBE_FCTRL_MPE;
4800 vmolr |= IXGBE_VMOLR_MPE;
4802 hw->addr_ctrl.user_set_promisc = false;
4806 * Write addresses to available RAR registers, if there is not
4807 * sufficient space to store all the addresses then enable
4808 * unicast promiscuous mode
4810 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4811 fctrl |= IXGBE_FCTRL_UPE;
4812 vmolr |= IXGBE_VMOLR_ROPE;
4815 /* Write addresses to the MTA, if the attempt fails
4816 * then we should just turn on promiscuous mode so
4817 * that we can at least receive multicast traffic
4819 count = ixgbe_write_mc_addr_list(netdev);
4821 fctrl |= IXGBE_FCTRL_MPE;
4822 vmolr |= IXGBE_VMOLR_MPE;
4824 vmolr |= IXGBE_VMOLR_ROMPE;
4827 if (hw->mac.type != ixgbe_mac_82598EB) {
4828 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4829 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4831 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4834 /* This is useful for sniffing bad packets. */
4835 if (features & NETIF_F_RXALL) {
4836 /* UPE and MPE will be handled by normal PROMISC logic
4837 * in e1000e_set_rx_mode */
4838 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4839 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4840 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4842 fctrl &= ~(IXGBE_FCTRL_DPF);
4843 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4846 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4848 if (features & NETIF_F_HW_VLAN_CTAG_RX)
4849 ixgbe_vlan_strip_enable(adapter);
4851 ixgbe_vlan_strip_disable(adapter);
4853 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4854 ixgbe_vlan_promisc_disable(adapter);
4856 ixgbe_vlan_promisc_enable(adapter);
4859 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4863 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4864 napi_enable(&adapter->q_vector[q_idx]->napi);
4867 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4871 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4872 napi_disable(&adapter->q_vector[q_idx]->napi);
4875 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4877 struct ixgbe_hw *hw = &adapter->hw;
4880 if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4881 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4884 vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4885 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4887 if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4888 adapter->vxlan_port = 0;
4890 if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4891 adapter->geneve_port = 0;
4894 #ifdef CONFIG_IXGBE_DCB
4896 * ixgbe_configure_dcb - Configure DCB hardware
4897 * @adapter: ixgbe adapter struct
4899 * This is called by the driver on open to configure the DCB hardware.
4900 * This is also called by the gennetlink interface when reconfiguring
4903 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4905 struct ixgbe_hw *hw = &adapter->hw;
4906 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4908 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4909 if (hw->mac.type == ixgbe_mac_82598EB)
4910 netif_set_gso_max_size(adapter->netdev, 65536);
4914 if (hw->mac.type == ixgbe_mac_82598EB)
4915 netif_set_gso_max_size(adapter->netdev, 32768);
4918 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4919 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4922 /* reconfigure the hardware */
4923 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4924 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4926 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4928 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4929 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4930 ixgbe_dcb_hw_ets(&adapter->hw,
4931 adapter->ixgbe_ieee_ets,
4933 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4934 adapter->ixgbe_ieee_pfc->pfc_en,
4935 adapter->ixgbe_ieee_ets->prio_tc);
4938 /* Enable RSS Hash per TC */
4939 if (hw->mac.type != ixgbe_mac_82598EB) {
4941 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4948 /* write msb to all 8 TCs in one write */
4949 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4954 /* Additional bittime to account for IXGBE framing */
4955 #define IXGBE_ETH_FRAMING 20
4958 * ixgbe_hpbthresh - calculate high water mark for flow control
4960 * @adapter: board private structure to calculate for
4961 * @pb: packet buffer to calculate
4963 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4965 struct ixgbe_hw *hw = &adapter->hw;
4966 struct net_device *dev = adapter->netdev;
4967 int link, tc, kb, marker;
4970 /* Calculate max LAN frame size */
4971 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4974 /* FCoE traffic class uses FCOE jumbo frames */
4975 if ((dev->features & NETIF_F_FCOE_MTU) &&
4976 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4977 (pb == ixgbe_fcoe_get_tc(adapter)))
4978 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4981 /* Calculate delay value for device */
4982 switch (hw->mac.type) {
4983 case ixgbe_mac_X540:
4984 case ixgbe_mac_X550:
4985 case ixgbe_mac_X550EM_x:
4986 case ixgbe_mac_x550em_a:
4987 dv_id = IXGBE_DV_X540(link, tc);
4990 dv_id = IXGBE_DV(link, tc);
4994 /* Loopback switch introduces additional latency */
4995 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4996 dv_id += IXGBE_B2BT(tc);
4998 /* Delay value is calculated in bit times convert to KB */
4999 kb = IXGBE_BT2KB(dv_id);
5000 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5002 marker = rx_pba - kb;
5004 /* It is possible that the packet buffer is not large enough
5005 * to provide required headroom. In this case throw an error
5006 * to user and a do the best we can.
5009 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5010 "headroom to support flow control."
5011 "Decrease MTU or number of traffic classes\n", pb);
5019 * ixgbe_lpbthresh - calculate low water mark for for flow control
5021 * @adapter: board private structure to calculate for
5022 * @pb: packet buffer to calculate
5024 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5026 struct ixgbe_hw *hw = &adapter->hw;
5027 struct net_device *dev = adapter->netdev;
5031 /* Calculate max LAN frame size */
5032 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5035 /* FCoE traffic class uses FCOE jumbo frames */
5036 if ((dev->features & NETIF_F_FCOE_MTU) &&
5037 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5038 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5039 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5042 /* Calculate delay value for device */
5043 switch (hw->mac.type) {
5044 case ixgbe_mac_X540:
5045 case ixgbe_mac_X550:
5046 case ixgbe_mac_X550EM_x:
5047 case ixgbe_mac_x550em_a:
5048 dv_id = IXGBE_LOW_DV_X540(tc);
5051 dv_id = IXGBE_LOW_DV(tc);
5055 /* Delay value is calculated in bit times convert to KB */
5056 return IXGBE_BT2KB(dv_id);
5060 * ixgbe_pbthresh_setup - calculate and setup high low water marks
5062 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5064 struct ixgbe_hw *hw = &adapter->hw;
5065 int num_tc = netdev_get_num_tc(adapter->netdev);
5071 for (i = 0; i < num_tc; i++) {
5072 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5073 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5075 /* Low water marks must not be larger than high water marks */
5076 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5077 hw->fc.low_water[i] = 0;
5080 for (; i < MAX_TRAFFIC_CLASS; i++)
5081 hw->fc.high_water[i] = 0;
5084 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5086 struct ixgbe_hw *hw = &adapter->hw;
5088 u8 tc = netdev_get_num_tc(adapter->netdev);
5090 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5091 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5092 hdrm = 32 << adapter->fdir_pballoc;
5096 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5097 ixgbe_pbthresh_setup(adapter);
5100 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5102 struct ixgbe_hw *hw = &adapter->hw;
5103 struct hlist_node *node2;
5104 struct ixgbe_fdir_filter *filter;
5106 spin_lock(&adapter->fdir_perfect_lock);
5108 if (!hlist_empty(&adapter->fdir_filter_list))
5109 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5111 hlist_for_each_entry_safe(filter, node2,
5112 &adapter->fdir_filter_list, fdir_node) {
5113 ixgbe_fdir_write_perfect_filter_82599(hw,
5116 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5117 IXGBE_FDIR_DROP_QUEUE :
5118 adapter->rx_ring[filter->action]->reg_idx);
5121 spin_unlock(&adapter->fdir_perfect_lock);
5124 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
5125 struct ixgbe_adapter *adapter)
5127 struct ixgbe_hw *hw = &adapter->hw;
5130 /* No unicast promiscuous support for VMDQ devices. */
5131 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
5132 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
5134 /* clear the affected bit */
5135 vmolr &= ~IXGBE_VMOLR_MPE;
5137 if (dev->flags & IFF_ALLMULTI) {
5138 vmolr |= IXGBE_VMOLR_MPE;
5140 vmolr |= IXGBE_VMOLR_ROMPE;
5141 hw->mac.ops.update_mc_addr_list(hw, dev);
5143 ixgbe_write_uc_addr_list(adapter->netdev, pool);
5144 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
5147 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
5149 struct ixgbe_adapter *adapter = vadapter->real_adapter;
5150 int rss_i = adapter->num_rx_queues_per_pool;
5151 struct ixgbe_hw *hw = &adapter->hw;
5152 u16 pool = vadapter->pool;
5153 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
5154 IXGBE_PSRTYPE_UDPHDR |
5155 IXGBE_PSRTYPE_IPV4HDR |
5156 IXGBE_PSRTYPE_L2HDR |
5157 IXGBE_PSRTYPE_IPV6HDR;
5159 if (hw->mac.type == ixgbe_mac_82598EB)
5163 psrtype |= 2u << 29;
5165 psrtype |= 1u << 29;
5167 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
5171 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5172 * @rx_ring: ring to free buffers from
5174 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5176 u16 i = rx_ring->next_to_clean;
5177 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5179 /* Free all the Rx ring sk_buffs */
5180 while (i != rx_ring->next_to_alloc) {
5181 if (rx_buffer->skb) {
5182 struct sk_buff *skb = rx_buffer->skb;
5183 if (IXGBE_CB(skb)->page_released)
5184 dma_unmap_page_attrs(rx_ring->dev,
5186 ixgbe_rx_pg_size(rx_ring),
5192 /* Invalidate cache lines that may have been written to by
5193 * device so that we avoid corrupting memory.
5195 dma_sync_single_range_for_cpu(rx_ring->dev,
5197 rx_buffer->page_offset,
5198 ixgbe_rx_bufsz(rx_ring),
5201 /* free resources associated with mapping */
5202 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5203 ixgbe_rx_pg_size(rx_ring),
5206 __page_frag_cache_drain(rx_buffer->page,
5207 rx_buffer->pagecnt_bias);
5211 if (i == rx_ring->count) {
5213 rx_buffer = rx_ring->rx_buffer_info;
5217 rx_ring->next_to_alloc = 0;
5218 rx_ring->next_to_clean = 0;
5219 rx_ring->next_to_use = 0;
5222 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
5223 struct ixgbe_ring *rx_ring)
5225 struct ixgbe_adapter *adapter = vadapter->real_adapter;
5226 int index = rx_ring->queue_index + vadapter->rx_base_queue;
5228 /* shutdown specific queue receive and wait for dma to settle */
5229 ixgbe_disable_rx_queue(adapter, rx_ring);
5230 usleep_range(10000, 20000);
5231 ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
5232 ixgbe_clean_rx_ring(rx_ring);
5233 rx_ring->l2_accel_priv = NULL;
5236 static int ixgbe_fwd_ring_down(struct net_device *vdev,
5237 struct ixgbe_fwd_adapter *accel)
5239 struct ixgbe_adapter *adapter = accel->real_adapter;
5240 unsigned int rxbase = accel->rx_base_queue;
5241 unsigned int txbase = accel->tx_base_queue;
5244 netif_tx_stop_all_queues(vdev);
5246 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5247 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5248 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
5251 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5252 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
5253 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
5260 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5261 struct ixgbe_fwd_adapter *accel)
5263 struct ixgbe_adapter *adapter = accel->real_adapter;
5264 unsigned int rxbase, txbase, queues;
5265 int i, baseq, err = 0;
5267 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
5270 baseq = accel->pool * adapter->num_rx_queues_per_pool;
5271 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
5272 accel->pool, adapter->num_rx_pools,
5273 baseq, baseq + adapter->num_rx_queues_per_pool,
5274 adapter->fwd_bitmask);
5276 accel->netdev = vdev;
5277 accel->rx_base_queue = rxbase = baseq;
5278 accel->tx_base_queue = txbase = baseq;
5280 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5281 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5283 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5284 adapter->rx_ring[rxbase + i]->netdev = vdev;
5285 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5286 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5289 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5290 adapter->tx_ring[txbase + i]->netdev = vdev;
5291 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5294 queues = min_t(unsigned int,
5295 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5296 err = netif_set_real_num_tx_queues(vdev, queues);
5300 err = netif_set_real_num_rx_queues(vdev, queues);
5304 if (is_valid_ether_addr(vdev->dev_addr))
5305 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5307 ixgbe_fwd_psrtype(accel);
5308 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5311 ixgbe_fwd_ring_down(vdev, accel);
5315 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5317 if (netif_is_macvlan(upper)) {
5318 struct macvlan_dev *dfwd = netdev_priv(upper);
5319 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5322 ixgbe_fwd_ring_up(upper, vadapter);
5328 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5330 netdev_walk_all_upper_dev_rcu(adapter->netdev,
5331 ixgbe_upper_dev_walk, NULL);
5334 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5336 struct ixgbe_hw *hw = &adapter->hw;
5338 ixgbe_configure_pb(adapter);
5339 #ifdef CONFIG_IXGBE_DCB
5340 ixgbe_configure_dcb(adapter);
5343 * We must restore virtualization before VLANs or else
5344 * the VLVF registers will not be populated
5346 ixgbe_configure_virtualization(adapter);
5348 ixgbe_set_rx_mode(adapter->netdev);
5349 ixgbe_restore_vlan(adapter);
5351 switch (hw->mac.type) {
5352 case ixgbe_mac_82599EB:
5353 case ixgbe_mac_X540:
5354 hw->mac.ops.disable_rx_buff(hw);
5360 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5361 ixgbe_init_fdir_signature_82599(&adapter->hw,
5362 adapter->fdir_pballoc);
5363 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5364 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5365 adapter->fdir_pballoc);
5366 ixgbe_fdir_filter_restore(adapter);
5369 switch (hw->mac.type) {
5370 case ixgbe_mac_82599EB:
5371 case ixgbe_mac_X540:
5372 hw->mac.ops.enable_rx_buff(hw);
5378 #ifdef CONFIG_IXGBE_DCA
5380 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5381 ixgbe_setup_dca(adapter);
5382 #endif /* CONFIG_IXGBE_DCA */
5385 /* configure FCoE L2 filters, redirection table, and Rx control */
5386 ixgbe_configure_fcoe(adapter);
5388 #endif /* IXGBE_FCOE */
5389 ixgbe_configure_tx(adapter);
5390 ixgbe_configure_rx(adapter);
5391 ixgbe_configure_dfwd(adapter);
5395 * ixgbe_sfp_link_config - set up SFP+ link
5396 * @adapter: pointer to private adapter struct
5398 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5401 * We are assuming the worst case scenario here, and that
5402 * is that an SFP was inserted/removed after the reset
5403 * but before SFP detection was enabled. As such the best
5404 * solution is to just start searching as soon as we start
5406 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5407 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5409 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5410 adapter->sfp_poll_time = 0;
5414 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5415 * @hw: pointer to private hardware struct
5417 * Returns 0 on success, negative on failure
5419 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5422 bool autoneg, link_up = false;
5423 int ret = IXGBE_ERR_LINK_SETUP;
5425 if (hw->mac.ops.check_link)
5426 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5431 speed = hw->phy.autoneg_advertised;
5432 if ((!speed) && (hw->mac.ops.get_link_capabilities))
5433 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5438 if (hw->mac.ops.setup_link)
5439 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5444 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5446 struct ixgbe_hw *hw = &adapter->hw;
5449 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5450 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5452 gpie |= IXGBE_GPIE_EIAME;
5454 * use EIAM to auto-mask when MSI-X interrupt is asserted
5455 * this saves a register write for every interrupt
5457 switch (hw->mac.type) {
5458 case ixgbe_mac_82598EB:
5459 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5461 case ixgbe_mac_82599EB:
5462 case ixgbe_mac_X540:
5463 case ixgbe_mac_X550:
5464 case ixgbe_mac_X550EM_x:
5465 case ixgbe_mac_x550em_a:
5467 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5468 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5472 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5473 * specifically only auto mask tx and rx interrupts */
5474 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5477 /* XXX: to interrupt immediately for EICS writes, enable this */
5478 /* gpie |= IXGBE_GPIE_EIMEN; */
5480 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5481 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5483 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5484 case IXGBE_82599_VMDQ_8Q_MASK:
5485 gpie |= IXGBE_GPIE_VTMODE_16;
5487 case IXGBE_82599_VMDQ_4Q_MASK:
5488 gpie |= IXGBE_GPIE_VTMODE_32;
5491 gpie |= IXGBE_GPIE_VTMODE_64;
5496 /* Enable Thermal over heat sensor interrupt */
5497 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5498 switch (adapter->hw.mac.type) {
5499 case ixgbe_mac_82599EB:
5500 gpie |= IXGBE_SDP0_GPIEN_8259X;
5507 /* Enable fan failure interrupt */
5508 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5509 gpie |= IXGBE_SDP1_GPIEN(hw);
5511 switch (hw->mac.type) {
5512 case ixgbe_mac_82599EB:
5513 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5515 case ixgbe_mac_X550EM_x:
5516 case ixgbe_mac_x550em_a:
5517 gpie |= IXGBE_SDP0_GPIEN_X540;
5523 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5526 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5528 struct ixgbe_hw *hw = &adapter->hw;
5532 ixgbe_get_hw_control(adapter);
5533 ixgbe_setup_gpie(adapter);
5535 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5536 ixgbe_configure_msix(adapter);
5538 ixgbe_configure_msi_and_legacy(adapter);
5540 /* enable the optics for 82599 SFP+ fiber */
5541 if (hw->mac.ops.enable_tx_laser)
5542 hw->mac.ops.enable_tx_laser(hw);
5544 if (hw->phy.ops.set_phy_power)
5545 hw->phy.ops.set_phy_power(hw, true);
5547 smp_mb__before_atomic();
5548 clear_bit(__IXGBE_DOWN, &adapter->state);
5549 ixgbe_napi_enable_all(adapter);
5551 if (ixgbe_is_sfp(hw)) {
5552 ixgbe_sfp_link_config(adapter);
5554 err = ixgbe_non_sfp_link_config(hw);
5556 e_err(probe, "link_config FAILED %d\n", err);
5559 /* clear any pending interrupts, may auto mask */
5560 IXGBE_READ_REG(hw, IXGBE_EICR);
5561 ixgbe_irq_enable(adapter, true, true);
5564 * If this adapter has a fan, check to see if we had a failure
5565 * before we enabled the interrupt.
5567 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5568 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5569 if (esdp & IXGBE_ESDP_SDP1)
5570 e_crit(drv, "Fan has stopped, replace the adapter\n");
5573 /* bring the link up in the watchdog, this could race with our first
5574 * link up interrupt but shouldn't be a problem */
5575 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5576 adapter->link_check_timeout = jiffies;
5577 mod_timer(&adapter->service_timer, jiffies);
5579 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5580 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5581 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5582 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5585 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5587 WARN_ON(in_interrupt());
5588 /* put off any impending NetWatchDogTimeout */
5589 netif_trans_update(adapter->netdev);
5591 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5592 usleep_range(1000, 2000);
5593 if (adapter->hw.phy.type == ixgbe_phy_fw)
5594 ixgbe_watchdog_link_is_down(adapter);
5595 ixgbe_down(adapter);
5597 * If SR-IOV enabled then wait a bit before bringing the adapter
5598 * back up to give the VFs time to respond to the reset. The
5599 * two second wait is based upon the watchdog timer cycle in
5602 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5605 clear_bit(__IXGBE_RESETTING, &adapter->state);
5608 void ixgbe_up(struct ixgbe_adapter *adapter)
5610 /* hardware has been reset, we need to reload some things */
5611 ixgbe_configure(adapter);
5613 ixgbe_up_complete(adapter);
5616 void ixgbe_reset(struct ixgbe_adapter *adapter)
5618 struct ixgbe_hw *hw = &adapter->hw;
5619 struct net_device *netdev = adapter->netdev;
5622 if (ixgbe_removed(hw->hw_addr))
5624 /* lock SFP init bit to prevent race conditions with the watchdog */
5625 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5626 usleep_range(1000, 2000);
5628 /* clear all SFP and link config related flags while holding SFP_INIT */
5629 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5630 IXGBE_FLAG2_SFP_NEEDS_RESET);
5631 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5633 err = hw->mac.ops.init_hw(hw);
5636 case IXGBE_ERR_SFP_NOT_PRESENT:
5637 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5639 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5640 e_dev_err("master disable timed out\n");
5642 case IXGBE_ERR_EEPROM_VERSION:
5643 /* We are running on a pre-production device, log a warning */
5644 e_dev_warn("This device is a pre-production adapter/LOM. "
5645 "Please be aware there may be issues associated with "
5646 "your hardware. If you are experiencing problems "
5647 "please contact your Intel or hardware "
5648 "representative who provided you with this "
5652 e_dev_err("Hardware Error: %d\n", err);
5655 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5657 /* flush entries out of MAC table */
5658 ixgbe_flush_sw_mac_table(adapter);
5659 __dev_uc_unsync(netdev, NULL);
5661 /* do not flush user set addresses */
5662 ixgbe_mac_set_default_filter(adapter);
5664 /* update SAN MAC vmdq pool selection */
5665 if (hw->mac.san_mac_rar_index)
5666 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5668 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5669 ixgbe_ptp_reset(adapter);
5671 if (hw->phy.ops.set_phy_power) {
5672 if (!netif_running(adapter->netdev) && !adapter->wol)
5673 hw->phy.ops.set_phy_power(hw, false);
5675 hw->phy.ops.set_phy_power(hw, true);
5680 * ixgbe_clean_tx_ring - Free Tx Buffers
5681 * @tx_ring: ring to be cleaned
5683 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5685 u16 i = tx_ring->next_to_clean;
5686 struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5688 while (i != tx_ring->next_to_use) {
5689 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5691 /* Free all the Tx ring sk_buffs */
5692 if (ring_is_xdp(tx_ring))
5693 page_frag_free(tx_buffer->data);
5695 dev_kfree_skb_any(tx_buffer->skb);
5697 /* unmap skb header data */
5698 dma_unmap_single(tx_ring->dev,
5699 dma_unmap_addr(tx_buffer, dma),
5700 dma_unmap_len(tx_buffer, len),
5703 /* check for eop_desc to determine the end of the packet */
5704 eop_desc = tx_buffer->next_to_watch;
5705 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5707 /* unmap remaining buffers */
5708 while (tx_desc != eop_desc) {
5712 if (unlikely(i == tx_ring->count)) {
5714 tx_buffer = tx_ring->tx_buffer_info;
5715 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5718 /* unmap any remaining paged data */
5719 if (dma_unmap_len(tx_buffer, len))
5720 dma_unmap_page(tx_ring->dev,
5721 dma_unmap_addr(tx_buffer, dma),
5722 dma_unmap_len(tx_buffer, len),
5726 /* move us one more past the eop_desc for start of next pkt */
5729 if (unlikely(i == tx_ring->count)) {
5731 tx_buffer = tx_ring->tx_buffer_info;
5735 /* reset BQL for queue */
5736 if (!ring_is_xdp(tx_ring))
5737 netdev_tx_reset_queue(txring_txq(tx_ring));
5739 /* reset next_to_use and next_to_clean */
5740 tx_ring->next_to_use = 0;
5741 tx_ring->next_to_clean = 0;
5745 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5746 * @adapter: board private structure
5748 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5752 for (i = 0; i < adapter->num_rx_queues; i++)
5753 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5757 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5758 * @adapter: board private structure
5760 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5764 for (i = 0; i < adapter->num_tx_queues; i++)
5765 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5766 for (i = 0; i < adapter->num_xdp_queues; i++)
5767 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5770 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5772 struct hlist_node *node2;
5773 struct ixgbe_fdir_filter *filter;
5775 spin_lock(&adapter->fdir_perfect_lock);
5777 hlist_for_each_entry_safe(filter, node2,
5778 &adapter->fdir_filter_list, fdir_node) {
5779 hlist_del(&filter->fdir_node);
5782 adapter->fdir_filter_count = 0;
5784 spin_unlock(&adapter->fdir_perfect_lock);
5787 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5789 if (netif_is_macvlan(upper)) {
5790 struct macvlan_dev *vlan = netdev_priv(upper);
5792 if (vlan->fwd_priv) {
5793 netif_tx_stop_all_queues(upper);
5794 netif_carrier_off(upper);
5795 netif_tx_disable(upper);
5802 void ixgbe_down(struct ixgbe_adapter *adapter)
5804 struct net_device *netdev = adapter->netdev;
5805 struct ixgbe_hw *hw = &adapter->hw;
5808 /* signal that we are down to the interrupt handler */
5809 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5810 return; /* do nothing if already down */
5812 /* disable receives */
5813 hw->mac.ops.disable_rx(hw);
5815 /* disable all enabled rx queues */
5816 for (i = 0; i < adapter->num_rx_queues; i++)
5817 /* this call also flushes the previous write */
5818 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5820 usleep_range(10000, 20000);
5822 /* synchronize_sched() needed for pending XDP buffers to drain */
5823 if (adapter->xdp_ring[0])
5824 synchronize_sched();
5825 netif_tx_stop_all_queues(netdev);
5827 /* call carrier off first to avoid false dev_watchdog timeouts */
5828 netif_carrier_off(netdev);
5829 netif_tx_disable(netdev);
5831 /* disable any upper devices */
5832 netdev_walk_all_upper_dev_rcu(adapter->netdev,
5833 ixgbe_disable_macvlan, NULL);
5835 ixgbe_irq_disable(adapter);
5837 ixgbe_napi_disable_all(adapter);
5839 clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5840 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5841 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5843 del_timer_sync(&adapter->service_timer);
5845 if (adapter->num_vfs) {
5846 /* Clear EITR Select mapping */
5847 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5849 /* Mark all the VFs as inactive */
5850 for (i = 0 ; i < adapter->num_vfs; i++)
5851 adapter->vfinfo[i].clear_to_send = false;
5853 /* ping all the active vfs to let them know we are going down */
5854 ixgbe_ping_all_vfs(adapter);
5856 /* Disable all VFTE/VFRE TX/RX */
5857 ixgbe_disable_tx_rx(adapter);
5860 /* disable transmits in the hardware now that interrupts are off */
5861 for (i = 0; i < adapter->num_tx_queues; i++) {
5862 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5863 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5865 for (i = 0; i < adapter->num_xdp_queues; i++) {
5866 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
5868 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5871 /* Disable the Tx DMA engine on 82599 and later MAC */
5872 switch (hw->mac.type) {
5873 case ixgbe_mac_82599EB:
5874 case ixgbe_mac_X540:
5875 case ixgbe_mac_X550:
5876 case ixgbe_mac_X550EM_x:
5877 case ixgbe_mac_x550em_a:
5878 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5879 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5880 ~IXGBE_DMATXCTL_TE));
5886 if (!pci_channel_offline(adapter->pdev))
5887 ixgbe_reset(adapter);
5889 /* power down the optics for 82599 SFP+ fiber */
5890 if (hw->mac.ops.disable_tx_laser)
5891 hw->mac.ops.disable_tx_laser(hw);
5893 ixgbe_clean_all_tx_rings(adapter);
5894 ixgbe_clean_all_rx_rings(adapter);
5898 * ixgbe_eee_capable - helper function to determine EEE support on X550
5899 * @adapter: board private structure
5901 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5903 struct ixgbe_hw *hw = &adapter->hw;
5905 switch (hw->device_id) {
5906 case IXGBE_DEV_ID_X550EM_A_1G_T:
5907 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5908 if (!hw->phy.eee_speeds_supported)
5910 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5911 if (!hw->phy.eee_speeds_advertised)
5913 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5916 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5917 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5923 * ixgbe_tx_timeout - Respond to a Tx Hang
5924 * @netdev: network interface device structure
5926 static void ixgbe_tx_timeout(struct net_device *netdev)
5928 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5930 /* Do the reset outside of interrupt context */
5931 ixgbe_tx_timeout_reset(adapter);
5934 #ifdef CONFIG_IXGBE_DCB
5935 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5937 struct ixgbe_hw *hw = &adapter->hw;
5938 struct tc_configuration *tc;
5941 switch (hw->mac.type) {
5942 case ixgbe_mac_82598EB:
5943 case ixgbe_mac_82599EB:
5944 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5945 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5947 case ixgbe_mac_X540:
5948 case ixgbe_mac_X550:
5949 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5950 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5952 case ixgbe_mac_X550EM_x:
5953 case ixgbe_mac_x550em_a:
5955 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5956 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5960 /* Configure DCB traffic classes */
5961 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5962 tc = &adapter->dcb_cfg.tc_config[j];
5963 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5964 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5965 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5966 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5967 tc->dcb_pfc = pfc_disabled;
5970 /* Initialize default user to priority mapping, UPx->TC0 */
5971 tc = &adapter->dcb_cfg.tc_config[0];
5972 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5973 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5975 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5976 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5977 adapter->dcb_cfg.pfc_mode_enable = false;
5978 adapter->dcb_set_bitmap = 0x00;
5979 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5980 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5981 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5982 sizeof(adapter->temp_dcb_cfg));
5987 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5988 * @adapter: board private structure to initialize
5990 * ixgbe_sw_init initializes the Adapter private data structure.
5991 * Fields are initialized based on PCI device information and
5992 * OS network device settings (MTU size).
5994 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
5995 const struct ixgbe_info *ii)
5997 struct ixgbe_hw *hw = &adapter->hw;
5998 struct pci_dev *pdev = adapter->pdev;
5999 unsigned int rss, fdir;
6003 /* PCI config space info */
6005 hw->vendor_id = pdev->vendor;
6006 hw->device_id = pdev->device;
6007 hw->revision_id = pdev->revision;
6008 hw->subsystem_vendor_id = pdev->subsystem_vendor;
6009 hw->subsystem_device_id = pdev->subsystem_device;
6011 /* get_invariants needs the device IDs */
6012 ii->get_invariants(hw);
6014 /* Set common capability flags and settings */
6015 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6016 adapter->ring_feature[RING_F_RSS].limit = rss;
6017 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6018 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6019 adapter->atr_sample_rate = 20;
6020 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6021 adapter->ring_feature[RING_F_FDIR].limit = fdir;
6022 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6023 #ifdef CONFIG_IXGBE_DCA
6024 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6026 #ifdef CONFIG_IXGBE_DCB
6027 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6028 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6031 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6032 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6033 #ifdef CONFIG_IXGBE_DCB
6034 /* Default traffic class to use for FCoE */
6035 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6036 #endif /* CONFIG_IXGBE_DCB */
6037 #endif /* IXGBE_FCOE */
6039 /* initialize static ixgbe jump table entries */
6040 adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6042 if (!adapter->jump_tables[0])
6044 adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6046 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6047 adapter->jump_tables[i] = NULL;
6049 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
6050 hw->mac.num_rar_entries,
6052 if (!adapter->mac_table)
6055 if (ixgbe_init_rss_key(adapter))
6058 /* Set MAC specific capability flags and exceptions */
6059 switch (hw->mac.type) {
6060 case ixgbe_mac_82598EB:
6061 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6063 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6064 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6066 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6067 adapter->ring_feature[RING_F_FDIR].limit = 0;
6068 adapter->atr_sample_rate = 0;
6069 adapter->fdir_pballoc = 0;
6071 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6072 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6073 #ifdef CONFIG_IXGBE_DCB
6074 adapter->fcoe.up = 0;
6075 #endif /* IXGBE_DCB */
6076 #endif /* IXGBE_FCOE */
6078 case ixgbe_mac_82599EB:
6079 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6080 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6082 case ixgbe_mac_X540:
6083 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6084 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6085 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6087 case ixgbe_mac_x550em_a:
6088 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6089 switch (hw->device_id) {
6090 case IXGBE_DEV_ID_X550EM_A_1G_T:
6091 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6092 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6098 case ixgbe_mac_X550EM_x:
6099 #ifdef CONFIG_IXGBE_DCB
6100 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6103 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6104 #ifdef CONFIG_IXGBE_DCB
6105 adapter->fcoe.up = 0;
6106 #endif /* IXGBE_DCB */
6107 #endif /* IXGBE_FCOE */
6109 case ixgbe_mac_X550:
6110 if (hw->mac.type == ixgbe_mac_X550)
6111 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6112 #ifdef CONFIG_IXGBE_DCA
6113 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6115 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6122 /* FCoE support exists, always init the FCoE lock */
6123 spin_lock_init(&adapter->fcoe.lock);
6126 /* n-tuple support exists, always init our spinlock */
6127 spin_lock_init(&adapter->fdir_perfect_lock);
6129 #ifdef CONFIG_IXGBE_DCB
6130 ixgbe_init_dcb(adapter);
6133 /* default flow control settings */
6134 hw->fc.requested_mode = ixgbe_fc_full;
6135 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
6136 ixgbe_pbthresh_setup(adapter);
6137 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6138 hw->fc.send_xon = true;
6139 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6141 #ifdef CONFIG_PCI_IOV
6143 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6145 /* assign number of SR-IOV VFs */
6146 if (hw->mac.type != ixgbe_mac_82598EB) {
6147 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6149 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6152 #endif /* CONFIG_PCI_IOV */
6154 /* enable itr by default in dynamic mode */
6155 adapter->rx_itr_setting = 1;
6156 adapter->tx_itr_setting = 1;
6158 /* set default ring sizes */
6159 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6160 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6162 /* set default work limits */
6163 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6165 /* initialize eeprom parameters */
6166 if (ixgbe_init_eeprom_params_generic(hw)) {
6167 e_dev_err("EEPROM initialization failed\n");
6171 /* PF holds first pool slot */
6172 set_bit(0, &adapter->fwd_bitmask);
6173 set_bit(__IXGBE_DOWN, &adapter->state);
6179 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6180 * @tx_ring: tx descriptor ring (for a specific queue) to setup
6182 * Return 0 on success, negative on failure
6184 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6186 struct device *dev = tx_ring->dev;
6187 int orig_node = dev_to_node(dev);
6191 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6193 if (tx_ring->q_vector)
6194 ring_node = tx_ring->q_vector->numa_node;
6196 tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6197 if (!tx_ring->tx_buffer_info)
6198 tx_ring->tx_buffer_info = vmalloc(size);
6199 if (!tx_ring->tx_buffer_info)
6202 /* round up to nearest 4K */
6203 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6204 tx_ring->size = ALIGN(tx_ring->size, 4096);
6206 set_dev_node(dev, ring_node);
6207 tx_ring->desc = dma_alloc_coherent(dev,
6211 set_dev_node(dev, orig_node);
6213 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6214 &tx_ring->dma, GFP_KERNEL);
6218 tx_ring->next_to_use = 0;
6219 tx_ring->next_to_clean = 0;
6223 vfree(tx_ring->tx_buffer_info);
6224 tx_ring->tx_buffer_info = NULL;
6225 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6230 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6231 * @adapter: board private structure
6233 * If this function returns with an error, then it's possible one or
6234 * more of the rings is populated (while the rest are not). It is the
6235 * callers duty to clean those orphaned rings.
6237 * Return 0 on success, negative on failure
6239 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6241 int i, j = 0, err = 0;
6243 for (i = 0; i < adapter->num_tx_queues; i++) {
6244 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6248 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6251 for (j = 0; j < adapter->num_xdp_queues; j++) {
6252 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6256 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6262 /* rewind the index freeing the rings as we go */
6264 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6266 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6271 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6272 * @rx_ring: rx descriptor ring (for a specific queue) to setup
6274 * Returns 0 on success, negative on failure
6276 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6277 struct ixgbe_ring *rx_ring)
6279 struct device *dev = rx_ring->dev;
6280 int orig_node = dev_to_node(dev);
6284 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6286 if (rx_ring->q_vector)
6287 ring_node = rx_ring->q_vector->numa_node;
6289 rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6290 if (!rx_ring->rx_buffer_info)
6291 rx_ring->rx_buffer_info = vmalloc(size);
6292 if (!rx_ring->rx_buffer_info)
6295 /* Round up to nearest 4K */
6296 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6297 rx_ring->size = ALIGN(rx_ring->size, 4096);
6299 set_dev_node(dev, ring_node);
6300 rx_ring->desc = dma_alloc_coherent(dev,
6304 set_dev_node(dev, orig_node);
6306 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6307 &rx_ring->dma, GFP_KERNEL);
6311 rx_ring->next_to_clean = 0;
6312 rx_ring->next_to_use = 0;
6314 rx_ring->xdp_prog = adapter->xdp_prog;
6318 vfree(rx_ring->rx_buffer_info);
6319 rx_ring->rx_buffer_info = NULL;
6320 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6325 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6326 * @adapter: board private structure
6328 * If this function returns with an error, then it's possible one or
6329 * more of the rings is populated (while the rest are not). It is the
6330 * callers duty to clean those orphaned rings.
6332 * Return 0 on success, negative on failure
6334 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6338 for (i = 0; i < adapter->num_rx_queues; i++) {
6339 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6343 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6348 err = ixgbe_setup_fcoe_ddp_resources(adapter);
6353 /* rewind the index freeing the rings as we go */
6355 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6360 * ixgbe_free_tx_resources - Free Tx Resources per Queue
6361 * @tx_ring: Tx descriptor ring for a specific queue
6363 * Free all transmit software resources
6365 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6367 ixgbe_clean_tx_ring(tx_ring);
6369 vfree(tx_ring->tx_buffer_info);
6370 tx_ring->tx_buffer_info = NULL;
6372 /* if not set, then don't free */
6376 dma_free_coherent(tx_ring->dev, tx_ring->size,
6377 tx_ring->desc, tx_ring->dma);
6379 tx_ring->desc = NULL;
6383 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6384 * @adapter: board private structure
6386 * Free all transmit software resources
6388 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6392 for (i = 0; i < adapter->num_tx_queues; i++)
6393 if (adapter->tx_ring[i]->desc)
6394 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6395 for (i = 0; i < adapter->num_xdp_queues; i++)
6396 if (adapter->xdp_ring[i]->desc)
6397 ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6401 * ixgbe_free_rx_resources - Free Rx Resources
6402 * @rx_ring: ring to clean the resources from
6404 * Free all receive software resources
6406 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6408 ixgbe_clean_rx_ring(rx_ring);
6410 rx_ring->xdp_prog = NULL;
6411 vfree(rx_ring->rx_buffer_info);
6412 rx_ring->rx_buffer_info = NULL;
6414 /* if not set, then don't free */
6418 dma_free_coherent(rx_ring->dev, rx_ring->size,
6419 rx_ring->desc, rx_ring->dma);
6421 rx_ring->desc = NULL;
6425 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6426 * @adapter: board private structure
6428 * Free all receive software resources
6430 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6435 ixgbe_free_fcoe_ddp_resources(adapter);
6438 for (i = 0; i < adapter->num_rx_queues; i++)
6439 if (adapter->rx_ring[i]->desc)
6440 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6444 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6445 * @netdev: network interface device structure
6446 * @new_mtu: new value for maximum frame size
6448 * Returns 0 on success, negative on failure
6450 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6452 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6455 * For 82599EB we cannot allow legacy VFs to enable their receive
6456 * paths when MTU greater than 1500 is configured. So display a
6457 * warning that legacy VFs will be disabled.
6459 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6460 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6461 (new_mtu > ETH_DATA_LEN))
6462 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6464 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6466 /* must set new MTU before calling down or up */
6467 netdev->mtu = new_mtu;
6469 if (netif_running(netdev))
6470 ixgbe_reinit_locked(adapter);
6476 * ixgbe_open - Called when a network interface is made active
6477 * @netdev: network interface device structure
6479 * Returns 0 on success, negative value on failure
6481 * The open entry point is called when a network interface is made
6482 * active by the system (IFF_UP). At this point all resources needed
6483 * for transmit and receive operations are allocated, the interrupt
6484 * handler is registered with the OS, the watchdog timer is started,
6485 * and the stack is notified that the interface is ready.
6487 int ixgbe_open(struct net_device *netdev)
6489 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6490 struct ixgbe_hw *hw = &adapter->hw;
6493 /* disallow open during test */
6494 if (test_bit(__IXGBE_TESTING, &adapter->state))
6497 netif_carrier_off(netdev);
6499 /* allocate transmit descriptors */
6500 err = ixgbe_setup_all_tx_resources(adapter);
6504 /* allocate receive descriptors */
6505 err = ixgbe_setup_all_rx_resources(adapter);
6509 ixgbe_configure(adapter);
6511 err = ixgbe_request_irq(adapter);
6515 /* Notify the stack of the actual queue counts. */
6516 if (adapter->num_rx_pools > 1)
6517 queues = adapter->num_rx_queues_per_pool;
6519 queues = adapter->num_tx_queues;
6521 err = netif_set_real_num_tx_queues(netdev, queues);
6523 goto err_set_queues;
6525 if (adapter->num_rx_pools > 1 &&
6526 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6527 queues = IXGBE_MAX_L2A_QUEUES;
6529 queues = adapter->num_rx_queues;
6530 err = netif_set_real_num_rx_queues(netdev, queues);
6532 goto err_set_queues;
6534 ixgbe_ptp_init(adapter);
6536 ixgbe_up_complete(adapter);
6538 ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6539 udp_tunnel_get_rx_info(netdev);
6544 ixgbe_free_irq(adapter);
6546 ixgbe_free_all_rx_resources(adapter);
6547 if (hw->phy.ops.set_phy_power && !adapter->wol)
6548 hw->phy.ops.set_phy_power(&adapter->hw, false);
6550 ixgbe_free_all_tx_resources(adapter);
6552 ixgbe_reset(adapter);
6557 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6559 ixgbe_ptp_suspend(adapter);
6561 if (adapter->hw.phy.ops.enter_lplu) {
6562 adapter->hw.phy.reset_disable = true;
6563 ixgbe_down(adapter);
6564 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6565 adapter->hw.phy.reset_disable = false;
6567 ixgbe_down(adapter);
6570 ixgbe_free_irq(adapter);
6572 ixgbe_free_all_tx_resources(adapter);
6573 ixgbe_free_all_rx_resources(adapter);
6577 * ixgbe_close - Disables a network interface
6578 * @netdev: network interface device structure
6580 * Returns 0, this is not allowed to fail
6582 * The close entry point is called when an interface is de-activated
6583 * by the OS. The hardware is still under the drivers control, but
6584 * needs to be disabled. A global MAC reset is issued to stop the
6585 * hardware, and all transmit and receive resources are freed.
6587 int ixgbe_close(struct net_device *netdev)
6589 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6591 ixgbe_ptp_stop(adapter);
6593 if (netif_device_present(netdev))
6594 ixgbe_close_suspend(adapter);
6596 ixgbe_fdir_filter_exit(adapter);
6598 ixgbe_release_hw_control(adapter);
6604 static int ixgbe_resume(struct pci_dev *pdev)
6606 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6607 struct net_device *netdev = adapter->netdev;
6610 adapter->hw.hw_addr = adapter->io_addr;
6611 pci_set_power_state(pdev, PCI_D0);
6612 pci_restore_state(pdev);
6614 * pci_restore_state clears dev->state_saved so call
6615 * pci_save_state to restore it.
6617 pci_save_state(pdev);
6619 err = pci_enable_device_mem(pdev);
6621 e_dev_err("Cannot enable PCI device from suspend\n");
6624 smp_mb__before_atomic();
6625 clear_bit(__IXGBE_DISABLED, &adapter->state);
6626 pci_set_master(pdev);
6628 pci_wake_from_d3(pdev, false);
6630 ixgbe_reset(adapter);
6632 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6635 err = ixgbe_init_interrupt_scheme(adapter);
6636 if (!err && netif_running(netdev))
6637 err = ixgbe_open(netdev);
6641 netif_device_attach(netdev);
6646 #endif /* CONFIG_PM */
6648 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6650 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6651 struct net_device *netdev = adapter->netdev;
6652 struct ixgbe_hw *hw = &adapter->hw;
6654 u32 wufc = adapter->wol;
6660 netif_device_detach(netdev);
6662 if (netif_running(netdev))
6663 ixgbe_close_suspend(adapter);
6665 ixgbe_clear_interrupt_scheme(adapter);
6669 retval = pci_save_state(pdev);
6674 if (hw->mac.ops.stop_link_on_d3)
6675 hw->mac.ops.stop_link_on_d3(hw);
6678 ixgbe_set_rx_mode(netdev);
6680 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6681 if (hw->mac.ops.enable_tx_laser)
6682 hw->mac.ops.enable_tx_laser(hw);
6684 /* turn on all-multi mode if wake on multicast is enabled */
6685 if (wufc & IXGBE_WUFC_MC) {
6686 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6687 fctrl |= IXGBE_FCTRL_MPE;
6688 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6691 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6692 ctrl |= IXGBE_CTRL_GIO_DIS;
6693 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6695 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6697 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6698 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6701 switch (hw->mac.type) {
6702 case ixgbe_mac_82598EB:
6703 pci_wake_from_d3(pdev, false);
6705 case ixgbe_mac_82599EB:
6706 case ixgbe_mac_X540:
6707 case ixgbe_mac_X550:
6708 case ixgbe_mac_X550EM_x:
6709 case ixgbe_mac_x550em_a:
6710 pci_wake_from_d3(pdev, !!wufc);
6716 *enable_wake = !!wufc;
6717 if (hw->phy.ops.set_phy_power && !*enable_wake)
6718 hw->phy.ops.set_phy_power(hw, false);
6720 ixgbe_release_hw_control(adapter);
6722 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6723 pci_disable_device(pdev);
6729 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6734 retval = __ixgbe_shutdown(pdev, &wake);
6739 pci_prepare_to_sleep(pdev);
6741 pci_wake_from_d3(pdev, false);
6742 pci_set_power_state(pdev, PCI_D3hot);
6747 #endif /* CONFIG_PM */
6749 static void ixgbe_shutdown(struct pci_dev *pdev)
6753 __ixgbe_shutdown(pdev, &wake);
6755 if (system_state == SYSTEM_POWER_OFF) {
6756 pci_wake_from_d3(pdev, wake);
6757 pci_set_power_state(pdev, PCI_D3hot);
6762 * ixgbe_update_stats - Update the board statistics counters.
6763 * @adapter: board private structure
6765 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6767 struct net_device *netdev = adapter->netdev;
6768 struct ixgbe_hw *hw = &adapter->hw;
6769 struct ixgbe_hw_stats *hwstats = &adapter->stats;
6771 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6772 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6773 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6774 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6776 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6777 test_bit(__IXGBE_RESETTING, &adapter->state))
6780 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6783 for (i = 0; i < adapter->num_rx_queues; i++) {
6784 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6785 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6787 adapter->rsc_total_count = rsc_count;
6788 adapter->rsc_total_flush = rsc_flush;
6791 for (i = 0; i < adapter->num_rx_queues; i++) {
6792 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6793 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6794 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6795 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6796 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6797 bytes += rx_ring->stats.bytes;
6798 packets += rx_ring->stats.packets;
6800 adapter->non_eop_descs = non_eop_descs;
6801 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6802 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6803 adapter->hw_csum_rx_error = hw_csum_rx_error;
6804 netdev->stats.rx_bytes = bytes;
6805 netdev->stats.rx_packets = packets;
6809 /* gather some stats to the adapter struct that are per queue */
6810 for (i = 0; i < adapter->num_tx_queues; i++) {
6811 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6812 restart_queue += tx_ring->tx_stats.restart_queue;
6813 tx_busy += tx_ring->tx_stats.tx_busy;
6814 bytes += tx_ring->stats.bytes;
6815 packets += tx_ring->stats.packets;
6817 for (i = 0; i < adapter->num_xdp_queues; i++) {
6818 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6820 restart_queue += xdp_ring->tx_stats.restart_queue;
6821 tx_busy += xdp_ring->tx_stats.tx_busy;
6822 bytes += xdp_ring->stats.bytes;
6823 packets += xdp_ring->stats.packets;
6825 adapter->restart_queue = restart_queue;
6826 adapter->tx_busy = tx_busy;
6827 netdev->stats.tx_bytes = bytes;
6828 netdev->stats.tx_packets = packets;
6830 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6832 /* 8 register reads */
6833 for (i = 0; i < 8; i++) {
6834 /* for packet buffers not used, the register should read 0 */
6835 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6837 hwstats->mpc[i] += mpc;
6838 total_mpc += hwstats->mpc[i];
6839 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6840 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6841 switch (hw->mac.type) {
6842 case ixgbe_mac_82598EB:
6843 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6844 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6845 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6846 hwstats->pxonrxc[i] +=
6847 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6849 case ixgbe_mac_82599EB:
6850 case ixgbe_mac_X540:
6851 case ixgbe_mac_X550:
6852 case ixgbe_mac_X550EM_x:
6853 case ixgbe_mac_x550em_a:
6854 hwstats->pxonrxc[i] +=
6855 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6862 /*16 register reads */
6863 for (i = 0; i < 16; i++) {
6864 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6865 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6866 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6867 (hw->mac.type == ixgbe_mac_X540) ||
6868 (hw->mac.type == ixgbe_mac_X550) ||
6869 (hw->mac.type == ixgbe_mac_X550EM_x) ||
6870 (hw->mac.type == ixgbe_mac_x550em_a)) {
6871 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6872 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6873 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6874 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6878 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6879 /* work around hardware counting issue */
6880 hwstats->gprc -= missed_rx;
6882 ixgbe_update_xoff_received(adapter);
6884 /* 82598 hardware only has a 32 bit counter in the high register */
6885 switch (hw->mac.type) {
6886 case ixgbe_mac_82598EB:
6887 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6888 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6889 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6890 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6892 case ixgbe_mac_X540:
6893 case ixgbe_mac_X550:
6894 case ixgbe_mac_X550EM_x:
6895 case ixgbe_mac_x550em_a:
6896 /* OS2BMC stats are X540 and later */
6897 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6898 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6899 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6900 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6902 case ixgbe_mac_82599EB:
6903 for (i = 0; i < 16; i++)
6904 adapter->hw_rx_no_dma_resources +=
6905 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6906 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6907 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6908 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6909 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6910 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6911 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6912 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6913 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6914 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6916 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6917 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6918 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6919 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6920 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6921 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6922 /* Add up per cpu counters for total ddp aloc fail */
6923 if (adapter->fcoe.ddp_pool) {
6924 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6925 struct ixgbe_fcoe_ddp_pool *ddp_pool;
6927 u64 noddp = 0, noddp_ext_buff = 0;
6928 for_each_possible_cpu(cpu) {
6929 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6930 noddp += ddp_pool->noddp;
6931 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6933 hwstats->fcoe_noddp = noddp;
6934 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6936 #endif /* IXGBE_FCOE */
6941 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6942 hwstats->bprc += bprc;
6943 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6944 if (hw->mac.type == ixgbe_mac_82598EB)
6945 hwstats->mprc -= bprc;
6946 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6947 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6948 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6949 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6950 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6951 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6952 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6953 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6954 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6955 hwstats->lxontxc += lxon;
6956 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6957 hwstats->lxofftxc += lxoff;
6958 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6959 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6961 * 82598 errata - tx of flow control packets is included in tx counters
6963 xon_off_tot = lxon + lxoff;
6964 hwstats->gptc -= xon_off_tot;
6965 hwstats->mptc -= xon_off_tot;
6966 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6967 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6968 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6969 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6970 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6971 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6972 hwstats->ptc64 -= xon_off_tot;
6973 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6974 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6975 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6976 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6977 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6978 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6980 /* Fill out the OS statistics structure */
6981 netdev->stats.multicast = hwstats->mprc;
6984 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6985 netdev->stats.rx_dropped = 0;
6986 netdev->stats.rx_length_errors = hwstats->rlec;
6987 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6988 netdev->stats.rx_missed_errors = total_mpc;
6992 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6993 * @adapter: pointer to the device adapter structure
6995 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6997 struct ixgbe_hw *hw = &adapter->hw;
7000 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7003 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7005 /* if interface is down do nothing */
7006 if (test_bit(__IXGBE_DOWN, &adapter->state))
7009 /* do nothing if we are not using signature filters */
7010 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7013 adapter->fdir_overflow++;
7015 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7016 for (i = 0; i < adapter->num_tx_queues; i++)
7017 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7018 &(adapter->tx_ring[i]->state));
7019 for (i = 0; i < adapter->num_xdp_queues; i++)
7020 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7021 &adapter->xdp_ring[i]->state);
7022 /* re-enable flow director interrupts */
7023 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7025 e_err(probe, "failed to finish FDIR re-initialization, "
7026 "ignored adding FDIR ATR filters\n");
7031 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7032 * @adapter: pointer to the device adapter structure
7034 * This function serves two purposes. First it strobes the interrupt lines
7035 * in order to make certain interrupts are occurring. Secondly it sets the
7036 * bits needed to check for TX hangs. As a result we should immediately
7037 * determine if a hang has occurred.
7039 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7041 struct ixgbe_hw *hw = &adapter->hw;
7045 /* If we're down, removing or resetting, just bail */
7046 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7047 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7048 test_bit(__IXGBE_RESETTING, &adapter->state))
7051 /* Force detection of hung controller */
7052 if (netif_carrier_ok(adapter->netdev)) {
7053 for (i = 0; i < adapter->num_tx_queues; i++)
7054 set_check_for_tx_hang(adapter->tx_ring[i]);
7055 for (i = 0; i < adapter->num_xdp_queues; i++)
7056 set_check_for_tx_hang(adapter->xdp_ring[i]);
7059 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7061 * for legacy and MSI interrupts don't set any bits
7062 * that are enabled for EIAM, because this operation
7063 * would set *both* EIMS and EICS for any bit in EIAM
7065 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7066 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7068 /* get one bit for every active tx/rx interrupt vector */
7069 for (i = 0; i < adapter->num_q_vectors; i++) {
7070 struct ixgbe_q_vector *qv = adapter->q_vector[i];
7071 if (qv->rx.ring || qv->tx.ring)
7076 /* Cause software interrupt to ensure rings are cleaned */
7077 ixgbe_irq_rearm_queues(adapter, eics);
7081 * ixgbe_watchdog_update_link - update the link status
7082 * @adapter: pointer to the device adapter structure
7083 * @link_speed: pointer to a u32 to store the link_speed
7085 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7087 struct ixgbe_hw *hw = &adapter->hw;
7088 u32 link_speed = adapter->link_speed;
7089 bool link_up = adapter->link_up;
7090 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7092 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7095 if (hw->mac.ops.check_link) {
7096 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7098 /* always assume link is up, if no check link function */
7099 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7103 if (adapter->ixgbe_ieee_pfc)
7104 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7106 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7107 hw->mac.ops.fc_enable(hw);
7108 ixgbe_set_rx_drop_en(adapter);
7112 time_after(jiffies, (adapter->link_check_timeout +
7113 IXGBE_TRY_LINK_TIMEOUT))) {
7114 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7115 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7116 IXGBE_WRITE_FLUSH(hw);
7119 adapter->link_up = link_up;
7120 adapter->link_speed = link_speed;
7123 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7125 #ifdef CONFIG_IXGBE_DCB
7126 struct net_device *netdev = adapter->netdev;
7127 struct dcb_app app = {
7128 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7133 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7134 up = dcb_ieee_getapp_mask(netdev, &app);
7136 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7140 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
7142 if (netif_is_macvlan(upper)) {
7143 struct macvlan_dev *vlan = netdev_priv(upper);
7146 netif_tx_wake_all_queues(upper);
7153 * ixgbe_watchdog_link_is_up - update netif_carrier status and
7154 * print link up message
7155 * @adapter: pointer to the device adapter structure
7157 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7159 struct net_device *netdev = adapter->netdev;
7160 struct ixgbe_hw *hw = &adapter->hw;
7161 u32 link_speed = adapter->link_speed;
7162 const char *speed_str;
7163 bool flow_rx, flow_tx;
7165 /* only continue if link was previously down */
7166 if (netif_carrier_ok(netdev))
7169 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7171 switch (hw->mac.type) {
7172 case ixgbe_mac_82598EB: {
7173 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7174 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7175 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7176 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7179 case ixgbe_mac_X540:
7180 case ixgbe_mac_X550:
7181 case ixgbe_mac_X550EM_x:
7182 case ixgbe_mac_x550em_a:
7183 case ixgbe_mac_82599EB: {
7184 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7185 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7186 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7187 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7196 adapter->last_rx_ptp_check = jiffies;
7198 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7199 ixgbe_ptp_start_cyclecounter(adapter);
7201 switch (link_speed) {
7202 case IXGBE_LINK_SPEED_10GB_FULL:
7203 speed_str = "10 Gbps";
7205 case IXGBE_LINK_SPEED_2_5GB_FULL:
7206 speed_str = "2.5 Gbps";
7208 case IXGBE_LINK_SPEED_1GB_FULL:
7209 speed_str = "1 Gbps";
7211 case IXGBE_LINK_SPEED_100_FULL:
7212 speed_str = "100 Mbps";
7214 case IXGBE_LINK_SPEED_10_FULL:
7215 speed_str = "10 Mbps";
7218 speed_str = "unknown speed";
7221 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7222 ((flow_rx && flow_tx) ? "RX/TX" :
7224 (flow_tx ? "TX" : "None"))));
7226 netif_carrier_on(netdev);
7227 ixgbe_check_vf_rate_limit(adapter);
7229 /* enable transmits */
7230 netif_tx_wake_all_queues(adapter->netdev);
7232 /* enable any upper devices */
7234 netdev_walk_all_upper_dev_rcu(adapter->netdev,
7235 ixgbe_enable_macvlan, NULL);
7238 /* update the default user priority for VFs */
7239 ixgbe_update_default_up(adapter);
7241 /* ping all the active vfs to let them know link has changed */
7242 ixgbe_ping_all_vfs(adapter);
7246 * ixgbe_watchdog_link_is_down - update netif_carrier status and
7247 * print link down message
7248 * @adapter: pointer to the adapter structure
7250 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7252 struct net_device *netdev = adapter->netdev;
7253 struct ixgbe_hw *hw = &adapter->hw;
7255 adapter->link_up = false;
7256 adapter->link_speed = 0;
7258 /* only continue if link was up previously */
7259 if (!netif_carrier_ok(netdev))
7262 /* poll for SFP+ cable when link is down */
7263 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7264 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7266 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7267 ixgbe_ptp_start_cyclecounter(adapter);
7269 e_info(drv, "NIC Link is Down\n");
7270 netif_carrier_off(netdev);
7272 /* ping all the active vfs to let them know link has changed */
7273 ixgbe_ping_all_vfs(adapter);
7276 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7280 for (i = 0; i < adapter->num_tx_queues; i++) {
7281 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7283 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7287 for (i = 0; i < adapter->num_xdp_queues; i++) {
7288 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7290 if (ring->next_to_use != ring->next_to_clean)
7297 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7299 struct ixgbe_hw *hw = &adapter->hw;
7300 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7301 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7305 if (!adapter->num_vfs)
7308 /* resetting the PF is only needed for MAC before X550 */
7309 if (hw->mac.type >= ixgbe_mac_X550)
7312 for (i = 0; i < adapter->num_vfs; i++) {
7313 for (j = 0; j < q_per_pool; j++) {
7316 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7317 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7328 * ixgbe_watchdog_flush_tx - flush queues on link down
7329 * @adapter: pointer to the device adapter structure
7331 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7333 if (!netif_carrier_ok(adapter->netdev)) {
7334 if (ixgbe_ring_tx_pending(adapter) ||
7335 ixgbe_vf_tx_pending(adapter)) {
7336 /* We've lost link, so the controller stops DMA,
7337 * but we've got queued Tx work that's never going
7338 * to get done, so reset controller to flush Tx.
7339 * (Do the reset outside of interrupt context).
7341 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7342 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7347 #ifdef CONFIG_PCI_IOV
7348 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7350 struct ixgbe_hw *hw = &adapter->hw;
7351 struct pci_dev *pdev = adapter->pdev;
7355 if (!(netif_carrier_ok(adapter->netdev)))
7358 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7359 if (gpc) /* If incrementing then no need for the check below */
7361 /* Check to see if a bad DMA write target from an errant or
7362 * malicious VF has caused a PCIe error. If so then we can
7363 * issue a VFLR to the offending VF(s) and then resume without
7364 * requesting a full slot reset.
7370 /* check status reg for all VFs owned by this PF */
7371 for (vf = 0; vf < adapter->num_vfs; ++vf) {
7372 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7377 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7378 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7379 status_reg & PCI_STATUS_REC_MASTER_ABORT)
7384 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7388 /* Do not perform spoof check for 82598 or if not in IOV mode */
7389 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7390 adapter->num_vfs == 0)
7393 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7396 * ssvpc register is cleared on read, if zero then no
7397 * spoofed packets in the last interval.
7402 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7405 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7410 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7413 #endif /* CONFIG_PCI_IOV */
7417 * ixgbe_watchdog_subtask - check and bring link up
7418 * @adapter: pointer to the device adapter structure
7420 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7422 /* if interface is down, removing or resetting, do nothing */
7423 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7424 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7425 test_bit(__IXGBE_RESETTING, &adapter->state))
7428 ixgbe_watchdog_update_link(adapter);
7430 if (adapter->link_up)
7431 ixgbe_watchdog_link_is_up(adapter);
7433 ixgbe_watchdog_link_is_down(adapter);
7435 ixgbe_check_for_bad_vf(adapter);
7436 ixgbe_spoof_check(adapter);
7437 ixgbe_update_stats(adapter);
7439 ixgbe_watchdog_flush_tx(adapter);
7443 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7444 * @adapter: the ixgbe adapter structure
7446 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7448 struct ixgbe_hw *hw = &adapter->hw;
7451 /* not searching for SFP so there is nothing to do here */
7452 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7453 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7456 if (adapter->sfp_poll_time &&
7457 time_after(adapter->sfp_poll_time, jiffies))
7458 return; /* If not yet time to poll for SFP */
7460 /* someone else is in init, wait until next service event */
7461 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7464 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7466 err = hw->phy.ops.identify_sfp(hw);
7467 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7470 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7471 /* If no cable is present, then we need to reset
7472 * the next time we find a good cable. */
7473 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7480 /* exit if reset not needed */
7481 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7484 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7487 * A module may be identified correctly, but the EEPROM may not have
7488 * support for that module. setup_sfp() will fail in that case, so
7489 * we should not allow that module to load.
7491 if (hw->mac.type == ixgbe_mac_82598EB)
7492 err = hw->phy.ops.reset(hw);
7494 err = hw->mac.ops.setup_sfp(hw);
7496 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7499 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7500 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7503 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7505 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7506 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7507 e_dev_err("failed to initialize because an unsupported "
7508 "SFP+ module type was detected.\n");
7509 e_dev_err("Reload the driver after installing a "
7510 "supported module.\n");
7511 unregister_netdev(adapter->netdev);
7516 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7517 * @adapter: the ixgbe adapter structure
7519 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7521 struct ixgbe_hw *hw = &adapter->hw;
7523 bool autoneg = false;
7525 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7528 /* someone else is in init, wait until next service event */
7529 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7532 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7534 speed = hw->phy.autoneg_advertised;
7535 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7536 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7538 /* setup the highest link when no autoneg */
7540 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7541 speed = IXGBE_LINK_SPEED_10GB_FULL;
7545 if (hw->mac.ops.setup_link)
7546 hw->mac.ops.setup_link(hw, speed, true);
7548 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7549 adapter->link_check_timeout = jiffies;
7550 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7554 * ixgbe_service_timer - Timer Call-back
7555 * @data: pointer to adapter cast into an unsigned long
7557 static void ixgbe_service_timer(unsigned long data)
7559 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7560 unsigned long next_event_offset;
7562 /* poll faster when waiting for link */
7563 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7564 next_event_offset = HZ / 10;
7566 next_event_offset = HZ * 2;
7568 /* Reset the timer */
7569 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7571 ixgbe_service_event_schedule(adapter);
7574 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7576 struct ixgbe_hw *hw = &adapter->hw;
7579 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7582 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7584 if (!hw->phy.ops.handle_lasi)
7587 status = hw->phy.ops.handle_lasi(&adapter->hw);
7588 if (status != IXGBE_ERR_OVERTEMP)
7591 e_crit(drv, "%s\n", ixgbe_overheat_msg);
7594 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7596 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7599 /* If we're already down, removing or resetting, just bail */
7600 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7601 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7602 test_bit(__IXGBE_RESETTING, &adapter->state))
7605 ixgbe_dump(adapter);
7606 netdev_err(adapter->netdev, "Reset adapter\n");
7607 adapter->tx_timeout_count++;
7610 ixgbe_reinit_locked(adapter);
7615 * ixgbe_service_task - manages and runs subtasks
7616 * @work: pointer to work_struct containing our data
7618 static void ixgbe_service_task(struct work_struct *work)
7620 struct ixgbe_adapter *adapter = container_of(work,
7621 struct ixgbe_adapter,
7623 if (ixgbe_removed(adapter->hw.hw_addr)) {
7624 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7626 ixgbe_down(adapter);
7629 ixgbe_service_event_complete(adapter);
7632 if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7634 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7635 udp_tunnel_get_rx_info(adapter->netdev);
7638 ixgbe_reset_subtask(adapter);
7639 ixgbe_phy_interrupt_subtask(adapter);
7640 ixgbe_sfp_detection_subtask(adapter);
7641 ixgbe_sfp_link_config_subtask(adapter);
7642 ixgbe_check_overtemp_subtask(adapter);
7643 ixgbe_watchdog_subtask(adapter);
7644 ixgbe_fdir_reinit_subtask(adapter);
7645 ixgbe_check_hang_subtask(adapter);
7647 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7648 ixgbe_ptp_overflow_check(adapter);
7649 ixgbe_ptp_rx_hang(adapter);
7650 ixgbe_ptp_tx_hang(adapter);
7653 ixgbe_service_event_complete(adapter);
7656 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7657 struct ixgbe_tx_buffer *first,
7660 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7661 struct sk_buff *skb = first->skb;
7671 u32 paylen, l4_offset;
7674 if (skb->ip_summed != CHECKSUM_PARTIAL)
7677 if (!skb_is_gso(skb))
7680 err = skb_cow_head(skb, 0);
7684 if (eth_p_mpls(first->protocol))
7685 ip.hdr = skb_inner_network_header(skb);
7687 ip.hdr = skb_network_header(skb);
7688 l4.hdr = skb_checksum_start(skb);
7690 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7691 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7693 /* initialize outer IP header fields */
7694 if (ip.v4->version == 4) {
7695 unsigned char *csum_start = skb_checksum_start(skb);
7696 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7698 /* IP header will have to cancel out any data that
7699 * is not a part of the outer IP header
7701 ip.v4->check = csum_fold(csum_partial(trans_start,
7702 csum_start - trans_start,
7704 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7707 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7708 IXGBE_TX_FLAGS_CSUM |
7709 IXGBE_TX_FLAGS_IPV4;
7711 ip.v6->payload_len = 0;
7712 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7713 IXGBE_TX_FLAGS_CSUM;
7716 /* determine offset of inner transport header */
7717 l4_offset = l4.hdr - skb->data;
7719 /* compute length of segmentation header */
7720 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7722 /* remove payload length from inner checksum */
7723 paylen = skb->len - l4_offset;
7724 csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7726 /* update gso size and bytecount with header size */
7727 first->gso_segs = skb_shinfo(skb)->gso_segs;
7728 first->bytecount += (first->gso_segs - 1) * *hdr_len;
7730 /* mss_l4len_id: use 0 as index for TSO */
7731 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7732 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7734 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7735 vlan_macip_lens = l4.hdr - ip.hdr;
7736 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7737 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7739 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7745 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7747 unsigned int offset = 0;
7749 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7751 return offset == skb_checksum_start_offset(skb);
7754 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7755 struct ixgbe_tx_buffer *first)
7757 struct sk_buff *skb = first->skb;
7758 u32 vlan_macip_lens = 0;
7761 if (skb->ip_summed != CHECKSUM_PARTIAL) {
7763 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7764 IXGBE_TX_FLAGS_CC)))
7769 switch (skb->csum_offset) {
7770 case offsetof(struct tcphdr, check):
7771 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7773 case offsetof(struct udphdr, check):
7775 case offsetof(struct sctphdr, checksum):
7776 /* validate that this is actually an SCTP request */
7777 if (((first->protocol == htons(ETH_P_IP)) &&
7778 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7779 ((first->protocol == htons(ETH_P_IPV6)) &&
7780 ixgbe_ipv6_csum_is_sctp(skb))) {
7781 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7786 skb_checksum_help(skb);
7790 /* update TX checksum flag */
7791 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7792 vlan_macip_lens = skb_checksum_start_offset(skb) -
7793 skb_network_offset(skb);
7795 /* vlan_macip_lens: MACLEN, VLAN tag */
7796 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7797 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7799 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7802 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7803 ((_flag <= _result) ? \
7804 ((u32)(_input & _flag) * (_result / _flag)) : \
7805 ((u32)(_input & _flag) / (_flag / _result)))
7807 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7809 /* set type for advanced descriptor with frame checksum insertion */
7810 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7811 IXGBE_ADVTXD_DCMD_DEXT |
7812 IXGBE_ADVTXD_DCMD_IFCS;
7814 /* set HW vlan bit if vlan is present */
7815 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7816 IXGBE_ADVTXD_DCMD_VLE);
7818 /* set segmentation enable bits for TSO/FSO */
7819 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7820 IXGBE_ADVTXD_DCMD_TSE);
7822 /* set timestamp bit if present */
7823 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7824 IXGBE_ADVTXD_MAC_TSTAMP);
7826 /* insert frame checksum */
7827 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7832 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7833 u32 tx_flags, unsigned int paylen)
7835 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7837 /* enable L4 checksum for TSO and TX checksum offload */
7838 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7839 IXGBE_TX_FLAGS_CSUM,
7840 IXGBE_ADVTXD_POPTS_TXSM);
7842 /* enble IPv4 checksum for TSO */
7843 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7844 IXGBE_TX_FLAGS_IPV4,
7845 IXGBE_ADVTXD_POPTS_IXSM);
7848 * Check Context must be set if Tx switch is enabled, which it
7849 * always is for case where virtual functions are running
7851 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7855 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7858 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7860 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7862 /* Herbert's original patch had:
7863 * smp_mb__after_netif_stop_queue();
7864 * but since that doesn't exist yet, just open code it.
7868 /* We need to check again in a case another CPU has just
7869 * made room available.
7871 if (likely(ixgbe_desc_unused(tx_ring) < size))
7874 /* A reprieve! - use start_queue because it doesn't call schedule */
7875 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7876 ++tx_ring->tx_stats.restart_queue;
7880 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7882 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7885 return __ixgbe_maybe_stop_tx(tx_ring, size);
7888 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7891 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7892 struct ixgbe_tx_buffer *first,
7895 struct sk_buff *skb = first->skb;
7896 struct ixgbe_tx_buffer *tx_buffer;
7897 union ixgbe_adv_tx_desc *tx_desc;
7898 struct skb_frag_struct *frag;
7900 unsigned int data_len, size;
7901 u32 tx_flags = first->tx_flags;
7902 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7903 u16 i = tx_ring->next_to_use;
7905 tx_desc = IXGBE_TX_DESC(tx_ring, i);
7907 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7909 size = skb_headlen(skb);
7910 data_len = skb->data_len;
7913 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7914 if (data_len < sizeof(struct fcoe_crc_eof)) {
7915 size -= sizeof(struct fcoe_crc_eof) - data_len;
7918 data_len -= sizeof(struct fcoe_crc_eof);
7923 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7927 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7928 if (dma_mapping_error(tx_ring->dev, dma))
7931 /* record length, and DMA address */
7932 dma_unmap_len_set(tx_buffer, len, size);
7933 dma_unmap_addr_set(tx_buffer, dma, dma);
7935 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7937 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7938 tx_desc->read.cmd_type_len =
7939 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7943 if (i == tx_ring->count) {
7944 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7947 tx_desc->read.olinfo_status = 0;
7949 dma += IXGBE_MAX_DATA_PER_TXD;
7950 size -= IXGBE_MAX_DATA_PER_TXD;
7952 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7955 if (likely(!data_len))
7958 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7962 if (i == tx_ring->count) {
7963 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7966 tx_desc->read.olinfo_status = 0;
7969 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7971 size = skb_frag_size(frag);
7975 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7978 tx_buffer = &tx_ring->tx_buffer_info[i];
7981 /* write last descriptor with RS and EOP bits */
7982 cmd_type |= size | IXGBE_TXD_CMD;
7983 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7985 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7987 /* set the timestamp */
7988 first->time_stamp = jiffies;
7991 * Force memory writes to complete before letting h/w know there
7992 * are new descriptors to fetch. (Only applicable for weak-ordered
7993 * memory model archs, such as IA-64).
7995 * We also need this memory barrier to make certain all of the
7996 * status bits have been updated before next_to_watch is written.
8000 /* set next_to_watch value indicating a packet is present */
8001 first->next_to_watch = tx_desc;
8004 if (i == tx_ring->count)
8007 tx_ring->next_to_use = i;
8009 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8011 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8012 writel(i, tx_ring->tail);
8014 /* we need this if more than one processor can write to our tail
8015 * at a time, it synchronizes IO on IA64/Altix systems
8022 dev_err(tx_ring->dev, "TX DMA map failed\n");
8023 tx_buffer = &tx_ring->tx_buffer_info[i];
8025 /* clear dma mappings for failed tx_buffer_info map */
8026 while (tx_buffer != first) {
8027 if (dma_unmap_len(tx_buffer, len))
8028 dma_unmap_page(tx_ring->dev,
8029 dma_unmap_addr(tx_buffer, dma),
8030 dma_unmap_len(tx_buffer, len),
8032 dma_unmap_len_set(tx_buffer, len, 0);
8035 i += tx_ring->count;
8036 tx_buffer = &tx_ring->tx_buffer_info[i];
8039 if (dma_unmap_len(tx_buffer, len))
8040 dma_unmap_single(tx_ring->dev,
8041 dma_unmap_addr(tx_buffer, dma),
8042 dma_unmap_len(tx_buffer, len),
8044 dma_unmap_len_set(tx_buffer, len, 0);
8046 dev_kfree_skb_any(first->skb);
8049 tx_ring->next_to_use = i;
8054 static void ixgbe_atr(struct ixgbe_ring *ring,
8055 struct ixgbe_tx_buffer *first)
8057 struct ixgbe_q_vector *q_vector = ring->q_vector;
8058 union ixgbe_atr_hash_dword input = { .dword = 0 };
8059 union ixgbe_atr_hash_dword common = { .dword = 0 };
8061 unsigned char *network;
8063 struct ipv6hdr *ipv6;
8067 struct sk_buff *skb;
8071 /* if ring doesn't have a interrupt vector, cannot perform ATR */
8075 /* do nothing if sampling is disabled */
8076 if (!ring->atr_sample_rate)
8081 /* currently only IPv4/IPv6 with TCP is supported */
8082 if ((first->protocol != htons(ETH_P_IP)) &&
8083 (first->protocol != htons(ETH_P_IPV6)))
8086 /* snag network header to get L4 type and address */
8088 hdr.network = skb_network_header(skb);
8089 if (unlikely(hdr.network <= skb->data))
8091 if (skb->encapsulation &&
8092 first->protocol == htons(ETH_P_IP) &&
8093 hdr.ipv4->protocol == IPPROTO_UDP) {
8094 struct ixgbe_adapter *adapter = q_vector->adapter;
8096 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8100 /* verify the port is recognized as VXLAN */
8101 if (adapter->vxlan_port &&
8102 udp_hdr(skb)->dest == adapter->vxlan_port)
8103 hdr.network = skb_inner_network_header(skb);
8105 if (adapter->geneve_port &&
8106 udp_hdr(skb)->dest == adapter->geneve_port)
8107 hdr.network = skb_inner_network_header(skb);
8110 /* Make sure we have at least [minimum IPv4 header + TCP]
8111 * or [IPv6 header] bytes
8113 if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8116 /* Currently only IPv4/IPv6 with TCP is supported */
8117 switch (hdr.ipv4->version) {
8119 /* access ihl as u8 to avoid unaligned access on ia64 */
8120 hlen = (hdr.network[0] & 0x0F) << 2;
8121 l4_proto = hdr.ipv4->protocol;
8124 hlen = hdr.network - skb->data;
8125 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8126 hlen -= hdr.network - skb->data;
8132 if (l4_proto != IPPROTO_TCP)
8135 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8136 hlen + sizeof(struct tcphdr)))
8139 th = (struct tcphdr *)(hdr.network + hlen);
8141 /* skip this packet since the socket is closing */
8145 /* sample on all syn packets or once every atr sample count */
8146 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8149 /* reset sample count */
8150 ring->atr_count = 0;
8152 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8155 * src and dst are inverted, think how the receiver sees them
8157 * The input is broken into two sections, a non-compressed section
8158 * containing vm_pool, vlan_id, and flow_type. The rest of the data
8159 * is XORed together and stored in the compressed dword.
8161 input.formatted.vlan_id = vlan_id;
8164 * since src port and flex bytes occupy the same word XOR them together
8165 * and write the value to source port portion of compressed dword
8167 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8168 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8170 common.port.src ^= th->dest ^ first->protocol;
8171 common.port.dst ^= th->source;
8173 switch (hdr.ipv4->version) {
8175 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8176 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8179 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8180 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8181 hdr.ipv6->saddr.s6_addr32[1] ^
8182 hdr.ipv6->saddr.s6_addr32[2] ^
8183 hdr.ipv6->saddr.s6_addr32[3] ^
8184 hdr.ipv6->daddr.s6_addr32[0] ^
8185 hdr.ipv6->daddr.s6_addr32[1] ^
8186 hdr.ipv6->daddr.s6_addr32[2] ^
8187 hdr.ipv6->daddr.s6_addr32[3];
8193 if (hdr.network != skb_network_header(skb))
8194 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8196 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8197 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8198 input, common, ring->queue_index);
8201 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8202 void *accel_priv, select_queue_fallback_t fallback)
8204 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
8206 struct ixgbe_adapter *adapter;
8207 struct ixgbe_ring_feature *f;
8212 return skb->queue_mapping + fwd_adapter->tx_base_queue;
8217 * only execute the code below if protocol is FCoE
8218 * or FIP and we have FCoE enabled on the adapter
8220 switch (vlan_get_protocol(skb)) {
8221 case htons(ETH_P_FCOE):
8222 case htons(ETH_P_FIP):
8223 adapter = netdev_priv(dev);
8225 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
8229 return fallback(dev, skb);
8232 f = &adapter->ring_feature[RING_F_FCOE];
8234 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8237 while (txq >= f->indices)
8240 return txq + f->offset;
8242 return fallback(dev, skb);
8246 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8247 struct xdp_buff *xdp)
8249 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8250 struct ixgbe_tx_buffer *tx_buffer;
8251 union ixgbe_adv_tx_desc *tx_desc;
8256 len = xdp->data_end - xdp->data;
8258 if (unlikely(!ixgbe_desc_unused(ring)))
8259 return IXGBE_XDP_CONSUMED;
8261 dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
8262 if (dma_mapping_error(ring->dev, dma))
8263 return IXGBE_XDP_CONSUMED;
8265 /* record the location of the first descriptor for this packet */
8266 tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8267 tx_buffer->bytecount = len;
8268 tx_buffer->gso_segs = 1;
8269 tx_buffer->protocol = 0;
8271 i = ring->next_to_use;
8272 tx_desc = IXGBE_TX_DESC(ring, i);
8274 dma_unmap_len_set(tx_buffer, len, len);
8275 dma_unmap_addr_set(tx_buffer, dma, dma);
8276 tx_buffer->data = xdp->data;
8277 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8279 /* put descriptor type bits */
8280 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8281 IXGBE_ADVTXD_DCMD_DEXT |
8282 IXGBE_ADVTXD_DCMD_IFCS;
8283 cmd_type |= len | IXGBE_TXD_CMD;
8284 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8285 tx_desc->read.olinfo_status =
8286 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8288 /* Avoid any potential race with xdp_xmit and cleanup */
8291 /* set next_to_watch value indicating a packet is present */
8293 if (i == ring->count)
8296 tx_buffer->next_to_watch = tx_desc;
8297 ring->next_to_use = i;
8299 return IXGBE_XDP_TX;
8302 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8303 struct ixgbe_adapter *adapter,
8304 struct ixgbe_ring *tx_ring)
8306 struct ixgbe_tx_buffer *first;
8310 u16 count = TXD_USE_COUNT(skb_headlen(skb));
8311 __be16 protocol = skb->protocol;
8315 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8316 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8317 * + 2 desc gap to keep tail from touching head,
8318 * + 1 desc for context descriptor,
8319 * otherwise try next time
8321 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8322 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8324 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8325 tx_ring->tx_stats.tx_busy++;
8326 return NETDEV_TX_BUSY;
8329 /* record the location of the first descriptor for this packet */
8330 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8332 first->bytecount = skb->len;
8333 first->gso_segs = 1;
8335 /* if we have a HW VLAN tag being added default to the HW one */
8336 if (skb_vlan_tag_present(skb)) {
8337 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8338 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8339 /* else if it is a SW VLAN check the next protocol and store the tag */
8340 } else if (protocol == htons(ETH_P_8021Q)) {
8341 struct vlan_hdr *vhdr, _vhdr;
8342 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8346 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8347 IXGBE_TX_FLAGS_VLAN_SHIFT;
8348 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8350 protocol = vlan_get_protocol(skb);
8352 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8353 adapter->ptp_clock) {
8354 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8356 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8357 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8359 /* schedule check for Tx timestamp */
8360 adapter->ptp_tx_skb = skb_get(skb);
8361 adapter->ptp_tx_start = jiffies;
8362 schedule_work(&adapter->ptp_tx_work);
8364 adapter->tx_hwtstamp_skipped++;
8368 skb_tx_timestamp(skb);
8370 #ifdef CONFIG_PCI_IOV
8372 * Use the l2switch_enable flag - would be false if the DMA
8373 * Tx switch had been disabled.
8375 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8376 tx_flags |= IXGBE_TX_FLAGS_CC;
8379 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8380 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8381 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8382 (skb->priority != TC_PRIO_CONTROL))) {
8383 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8384 tx_flags |= (skb->priority & 0x7) <<
8385 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8386 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8387 struct vlan_ethhdr *vhdr;
8389 if (skb_cow_head(skb, 0))
8391 vhdr = (struct vlan_ethhdr *)skb->data;
8392 vhdr->h_vlan_TCI = htons(tx_flags >>
8393 IXGBE_TX_FLAGS_VLAN_SHIFT);
8395 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8399 /* record initial flags and protocol */
8400 first->tx_flags = tx_flags;
8401 first->protocol = protocol;
8404 /* setup tx offload for FCoE */
8405 if ((protocol == htons(ETH_P_FCOE)) &&
8406 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8407 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8414 #endif /* IXGBE_FCOE */
8415 tso = ixgbe_tso(tx_ring, first, &hdr_len);
8419 ixgbe_tx_csum(tx_ring, first);
8421 /* add the ATR filter if ATR is on */
8422 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8423 ixgbe_atr(tx_ring, first);
8427 #endif /* IXGBE_FCOE */
8428 if (ixgbe_tx_map(tx_ring, first, hdr_len))
8429 goto cleanup_tx_timestamp;
8431 return NETDEV_TX_OK;
8434 dev_kfree_skb_any(first->skb);
8436 cleanup_tx_timestamp:
8437 if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8438 dev_kfree_skb_any(adapter->ptp_tx_skb);
8439 adapter->ptp_tx_skb = NULL;
8440 cancel_work_sync(&adapter->ptp_tx_work);
8441 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8444 return NETDEV_TX_OK;
8447 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8448 struct net_device *netdev,
8449 struct ixgbe_ring *ring)
8451 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8452 struct ixgbe_ring *tx_ring;
8455 * The minimum packet size for olinfo paylen is 17 so pad the skb
8456 * in order to meet this minimum size requirement.
8458 if (skb_put_padto(skb, 17))
8459 return NETDEV_TX_OK;
8461 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8463 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8466 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8467 struct net_device *netdev)
8469 return __ixgbe_xmit_frame(skb, netdev, NULL);
8473 * ixgbe_set_mac - Change the Ethernet Address of the NIC
8474 * @netdev: network interface device structure
8475 * @p: pointer to an address structure
8477 * Returns 0 on success, negative on failure
8479 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8481 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8482 struct ixgbe_hw *hw = &adapter->hw;
8483 struct sockaddr *addr = p;
8485 if (!is_valid_ether_addr(addr->sa_data))
8486 return -EADDRNOTAVAIL;
8488 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8489 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8491 ixgbe_mac_set_default_filter(adapter);
8497 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8499 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8500 struct ixgbe_hw *hw = &adapter->hw;
8504 if (prtad != hw->phy.mdio.prtad)
8506 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8512 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8513 u16 addr, u16 value)
8515 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8516 struct ixgbe_hw *hw = &adapter->hw;
8518 if (prtad != hw->phy.mdio.prtad)
8520 return hw->phy.ops.write_reg(hw, addr, devad, value);
8523 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8525 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8529 return ixgbe_ptp_set_ts_config(adapter, req);
8531 return ixgbe_ptp_get_ts_config(adapter, req);
8533 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8538 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8540 * @netdev: network interface device structure
8542 * Returns non-zero on failure
8544 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8547 struct ixgbe_adapter *adapter = netdev_priv(dev);
8548 struct ixgbe_hw *hw = &adapter->hw;
8550 if (is_valid_ether_addr(hw->mac.san_addr)) {
8552 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8555 /* update SAN MAC vmdq pool selection */
8556 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8562 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8564 * @netdev: network interface device structure
8566 * Returns non-zero on failure
8568 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8571 struct ixgbe_adapter *adapter = netdev_priv(dev);
8572 struct ixgbe_mac_info *mac = &adapter->hw.mac;
8574 if (is_valid_ether_addr(mac->san_addr)) {
8576 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8582 #ifdef CONFIG_NET_POLL_CONTROLLER
8584 * Polling 'interrupt' - used by things like netconsole to send skbs
8585 * without having to re-enable interrupts. It's not called while
8586 * the interrupt routine is executing.
8588 static void ixgbe_netpoll(struct net_device *netdev)
8590 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8593 /* if interface is down do nothing */
8594 if (test_bit(__IXGBE_DOWN, &adapter->state))
8597 /* loop through and schedule all active queues */
8598 for (i = 0; i < adapter->num_q_vectors; i++)
8599 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8604 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8605 struct ixgbe_ring *ring)
8612 start = u64_stats_fetch_begin_irq(&ring->syncp);
8613 packets = ring->stats.packets;
8614 bytes = ring->stats.bytes;
8615 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8616 stats->tx_packets += packets;
8617 stats->tx_bytes += bytes;
8621 static void ixgbe_get_stats64(struct net_device *netdev,
8622 struct rtnl_link_stats64 *stats)
8624 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8628 for (i = 0; i < adapter->num_rx_queues; i++) {
8629 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8635 start = u64_stats_fetch_begin_irq(&ring->syncp);
8636 packets = ring->stats.packets;
8637 bytes = ring->stats.bytes;
8638 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8639 stats->rx_packets += packets;
8640 stats->rx_bytes += bytes;
8644 for (i = 0; i < adapter->num_tx_queues; i++) {
8645 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8647 ixgbe_get_ring_stats64(stats, ring);
8649 for (i = 0; i < adapter->num_xdp_queues; i++) {
8650 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->xdp_ring[i]);
8652 ixgbe_get_ring_stats64(stats, ring);
8656 /* following stats updated by ixgbe_watchdog_task() */
8657 stats->multicast = netdev->stats.multicast;
8658 stats->rx_errors = netdev->stats.rx_errors;
8659 stats->rx_length_errors = netdev->stats.rx_length_errors;
8660 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
8661 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8664 #ifdef CONFIG_IXGBE_DCB
8666 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8667 * @adapter: pointer to ixgbe_adapter
8668 * @tc: number of traffic classes currently enabled
8670 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8671 * 802.1Q priority maps to a packet buffer that exists.
8673 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8675 struct ixgbe_hw *hw = &adapter->hw;
8679 /* 82598 have a static priority to TC mapping that can not
8680 * be changed so no validation is needed.
8682 if (hw->mac.type == ixgbe_mac_82598EB)
8685 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8688 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8689 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8691 /* If up2tc is out of bounds default to zero */
8693 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8697 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8703 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8704 * @adapter: Pointer to adapter struct
8706 * Populate the netdev user priority to tc map
8708 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8710 struct net_device *dev = adapter->netdev;
8711 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8712 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8715 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8718 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8719 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8721 tc = ets->prio_tc[prio];
8723 netdev_set_prio_tc_map(dev, prio, tc);
8727 #endif /* CONFIG_IXGBE_DCB */
8729 * ixgbe_setup_tc - configure net_device for multiple traffic classes
8731 * @netdev: net device to configure
8732 * @tc: number of traffic classes to enable
8734 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8736 struct ixgbe_adapter *adapter = netdev_priv(dev);
8737 struct ixgbe_hw *hw = &adapter->hw;
8740 /* Hardware supports up to 8 traffic classes */
8741 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8744 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8747 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8748 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8751 /* Hardware has to reinitialize queues and interrupts to
8752 * match packet buffer alignment. Unfortunately, the
8753 * hardware is not flexible enough to do this dynamically.
8755 if (netif_running(dev))
8758 ixgbe_reset(adapter);
8760 ixgbe_clear_interrupt_scheme(adapter);
8762 #ifdef CONFIG_IXGBE_DCB
8764 netdev_set_num_tc(dev, tc);
8765 ixgbe_set_prio_tc_map(adapter);
8767 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8769 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8770 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8771 adapter->hw.fc.requested_mode = ixgbe_fc_none;
8774 netdev_reset_tc(dev);
8776 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8777 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8779 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8781 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8782 adapter->dcb_cfg.pfc_mode_enable = false;
8785 ixgbe_validate_rtr(adapter, tc);
8787 #endif /* CONFIG_IXGBE_DCB */
8788 ixgbe_init_interrupt_scheme(adapter);
8790 if (netif_running(dev))
8791 return ixgbe_open(dev);
8796 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8797 struct tc_cls_u32_offload *cls)
8799 u32 hdl = cls->knode.handle;
8800 u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8801 u32 loc = cls->knode.handle & 0xfffff;
8803 struct ixgbe_jump_table *jump = NULL;
8805 if (loc > IXGBE_MAX_HW_ENTRIES)
8808 if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8811 /* Clear this filter in the link data it is associated with */
8812 if (uhtid != 0x800) {
8813 jump = adapter->jump_tables[uhtid];
8816 if (!test_bit(loc - 1, jump->child_loc_map))
8818 clear_bit(loc - 1, jump->child_loc_map);
8821 /* Check if the filter being deleted is a link */
8822 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8823 jump = adapter->jump_tables[i];
8824 if (jump && jump->link_hdl == hdl) {
8825 /* Delete filters in the hardware in the child hash
8826 * table associated with this link
8828 for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8829 if (!test_bit(j, jump->child_loc_map))
8831 spin_lock(&adapter->fdir_perfect_lock);
8832 err = ixgbe_update_ethtool_fdir_entry(adapter,
8835 spin_unlock(&adapter->fdir_perfect_lock);
8836 clear_bit(j, jump->child_loc_map);
8838 /* Remove resources for this link */
8842 adapter->jump_tables[i] = NULL;
8847 spin_lock(&adapter->fdir_perfect_lock);
8848 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8849 spin_unlock(&adapter->fdir_perfect_lock);
8853 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8855 struct tc_cls_u32_offload *cls)
8857 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8859 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8862 /* This ixgbe devices do not support hash tables at the moment
8863 * so abort when given hash tables.
8865 if (cls->hnode.divisor > 0)
8868 set_bit(uhtid - 1, &adapter->tables);
8872 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8873 struct tc_cls_u32_offload *cls)
8875 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8877 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8880 clear_bit(uhtid - 1, &adapter->tables);
8884 #ifdef CONFIG_NET_CLS_ACT
8885 struct upper_walk_data {
8886 struct ixgbe_adapter *adapter;
8892 static int get_macvlan_queue(struct net_device *upper, void *_data)
8894 if (netif_is_macvlan(upper)) {
8895 struct macvlan_dev *dfwd = netdev_priv(upper);
8896 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8897 struct upper_walk_data *data = _data;
8898 struct ixgbe_adapter *adapter = data->adapter;
8899 int ifindex = data->ifindex;
8901 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8902 data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8903 data->action = data->queue;
8911 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8912 u8 *queue, u64 *action)
8914 unsigned int num_vfs = adapter->num_vfs, vf;
8915 struct upper_walk_data data;
8916 struct net_device *upper;
8918 /* redirect to a SRIOV VF */
8919 for (vf = 0; vf < num_vfs; ++vf) {
8920 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8921 if (upper->ifindex == ifindex) {
8922 if (adapter->num_rx_pools > 1)
8925 *queue = vf * adapter->num_rx_queues_per_pool;
8928 *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8933 /* redirect to a offloaded macvlan netdev */
8934 data.adapter = adapter;
8935 data.ifindex = ifindex;
8938 if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
8939 get_macvlan_queue, &data)) {
8940 *action = data.action;
8941 *queue = data.queue;
8949 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8950 struct tcf_exts *exts, u64 *action, u8 *queue)
8952 const struct tc_action *a;
8956 if (tc_no_actions(exts))
8959 tcf_exts_to_list(exts, &actions);
8960 list_for_each_entry(a, &actions, list) {
8963 if (is_tcf_gact_shot(a)) {
8964 *action = IXGBE_FDIR_DROP_QUEUE;
8965 *queue = IXGBE_FDIR_DROP_QUEUE;
8969 /* Redirect to a VF or a offloaded macvlan */
8970 if (is_tcf_mirred_egress_redirect(a)) {
8971 int ifindex = tcf_mirred_ifindex(a);
8973 err = handle_redirect_action(adapter, ifindex, queue,
8983 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8984 struct tcf_exts *exts, u64 *action, u8 *queue)
8988 #endif /* CONFIG_NET_CLS_ACT */
8990 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8991 union ixgbe_atr_input *mask,
8992 struct tc_cls_u32_offload *cls,
8993 struct ixgbe_mat_field *field_ptr,
8994 struct ixgbe_nexthdr *nexthdr)
8998 bool found_entry = false, found_jump_field = false;
9000 for (i = 0; i < cls->knode.sel->nkeys; i++) {
9001 off = cls->knode.sel->keys[i].off;
9002 val = cls->knode.sel->keys[i].val;
9003 m = cls->knode.sel->keys[i].mask;
9005 for (j = 0; field_ptr[j].val; j++) {
9006 if (field_ptr[j].off == off) {
9007 field_ptr[j].val(input, mask, val, m);
9008 input->filter.formatted.flow_type |=
9015 if (nexthdr->off == cls->knode.sel->keys[i].off &&
9016 nexthdr->val == cls->knode.sel->keys[i].val &&
9017 nexthdr->mask == cls->knode.sel->keys[i].mask)
9018 found_jump_field = true;
9024 if (nexthdr && !found_jump_field)
9030 mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9031 IXGBE_ATR_L4TYPE_MASK;
9033 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9034 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9039 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9041 struct tc_cls_u32_offload *cls)
9043 u32 loc = cls->knode.handle & 0xfffff;
9044 struct ixgbe_hw *hw = &adapter->hw;
9045 struct ixgbe_mat_field *field_ptr;
9046 struct ixgbe_fdir_filter *input = NULL;
9047 union ixgbe_atr_input *mask = NULL;
9048 struct ixgbe_jump_table *jump = NULL;
9049 int i, err = -EINVAL;
9051 u32 uhtid, link_uhtid;
9053 uhtid = TC_U32_USERHTID(cls->knode.handle);
9054 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9056 /* At the moment cls_u32 jumps to network layer and skips past
9057 * L2 headers. The canonical method to match L2 frames is to use
9058 * negative values. However this is error prone at best but really
9059 * just broken because there is no way to "know" what sort of hdr
9060 * is in front of the network layer. Fix cls_u32 to support L2
9061 * headers when needed.
9063 if (protocol != htons(ETH_P_IP))
9066 if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9067 e_err(drv, "Location out of range\n");
9071 /* cls u32 is a graph starting at root node 0x800. The driver tracks
9072 * links and also the fields used to advance the parser across each
9073 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9074 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9075 * To add support for new nodes update ixgbe_model.h parse structures
9076 * this function _should_ be generic try not to hardcode values here.
9078 if (uhtid == 0x800) {
9079 field_ptr = (adapter->jump_tables[0])->mat;
9081 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9083 if (!adapter->jump_tables[uhtid])
9085 field_ptr = (adapter->jump_tables[uhtid])->mat;
9091 /* At this point we know the field_ptr is valid and need to either
9092 * build cls_u32 link or attach filter. Because adding a link to
9093 * a handle that does not exist is invalid and the same for adding
9094 * rules to handles that don't exist.
9098 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9100 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9103 if (!test_bit(link_uhtid - 1, &adapter->tables))
9106 /* Multiple filters as links to the same hash table are not
9107 * supported. To add a new filter with the same next header
9108 * but different match/jump conditions, create a new hash table
9111 if (adapter->jump_tables[link_uhtid] &&
9112 (adapter->jump_tables[link_uhtid])->link_hdl) {
9113 e_err(drv, "Link filter exists for link: %x\n",
9118 for (i = 0; nexthdr[i].jump; i++) {
9119 if (nexthdr[i].o != cls->knode.sel->offoff ||
9120 nexthdr[i].s != cls->knode.sel->offshift ||
9121 nexthdr[i].m != cls->knode.sel->offmask)
9124 jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9127 input = kzalloc(sizeof(*input), GFP_KERNEL);
9132 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9137 jump->input = input;
9139 jump->link_hdl = cls->knode.handle;
9141 err = ixgbe_clsu32_build_input(input, mask, cls,
9142 field_ptr, &nexthdr[i]);
9144 jump->mat = nexthdr[i].jump;
9145 adapter->jump_tables[link_uhtid] = jump;
9152 input = kzalloc(sizeof(*input), GFP_KERNEL);
9155 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9161 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9162 if ((adapter->jump_tables[uhtid])->input)
9163 memcpy(input, (adapter->jump_tables[uhtid])->input,
9165 if ((adapter->jump_tables[uhtid])->mask)
9166 memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9169 /* Lookup in all child hash tables if this location is already
9170 * filled with a filter
9172 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9173 struct ixgbe_jump_table *link = adapter->jump_tables[i];
9175 if (link && (test_bit(loc - 1, link->child_loc_map))) {
9176 e_err(drv, "Filter exists in location: %x\n",
9183 err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9187 err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9192 input->sw_idx = loc;
9194 spin_lock(&adapter->fdir_perfect_lock);
9196 if (hlist_empty(&adapter->fdir_filter_list)) {
9197 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9198 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9200 goto err_out_w_lock;
9201 } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9203 goto err_out_w_lock;
9206 ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9207 err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9208 input->sw_idx, queue);
9210 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9211 spin_unlock(&adapter->fdir_perfect_lock);
9213 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9214 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9219 spin_unlock(&adapter->fdir_perfect_lock);
9229 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, u32 chain_index,
9230 __be16 proto, struct tc_to_netdev *tc)
9232 struct ixgbe_adapter *adapter = netdev_priv(dev);
9237 if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
9238 tc->type == TC_SETUP_CLSU32) {
9239 switch (tc->cls_u32->command) {
9240 case TC_CLSU32_NEW_KNODE:
9241 case TC_CLSU32_REPLACE_KNODE:
9242 return ixgbe_configure_clsu32(adapter,
9243 proto, tc->cls_u32);
9244 case TC_CLSU32_DELETE_KNODE:
9245 return ixgbe_delete_clsu32(adapter, tc->cls_u32);
9246 case TC_CLSU32_NEW_HNODE:
9247 case TC_CLSU32_REPLACE_HNODE:
9248 return ixgbe_configure_clsu32_add_hnode(adapter, proto,
9250 case TC_CLSU32_DELETE_HNODE:
9251 return ixgbe_configure_clsu32_del_hnode(adapter,
9258 if (tc->type != TC_SETUP_MQPRIO)
9261 tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9263 return ixgbe_setup_tc(dev, tc->mqprio->num_tc);
9266 #ifdef CONFIG_PCI_IOV
9267 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9269 struct net_device *netdev = adapter->netdev;
9272 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
9277 void ixgbe_do_reset(struct net_device *netdev)
9279 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9281 if (netif_running(netdev))
9282 ixgbe_reinit_locked(adapter);
9284 ixgbe_reset(adapter);
9287 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9288 netdev_features_t features)
9290 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9292 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9293 if (!(features & NETIF_F_RXCSUM))
9294 features &= ~NETIF_F_LRO;
9296 /* Turn off LRO if not RSC capable */
9297 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9298 features &= ~NETIF_F_LRO;
9303 static int ixgbe_set_features(struct net_device *netdev,
9304 netdev_features_t features)
9306 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9307 netdev_features_t changed = netdev->features ^ features;
9308 bool need_reset = false;
9310 /* Make sure RSC matches LRO, reset if change */
9311 if (!(features & NETIF_F_LRO)) {
9312 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9314 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9315 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9316 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9317 if (adapter->rx_itr_setting == 1 ||
9318 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9319 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9321 } else if ((changed ^ features) & NETIF_F_LRO) {
9322 e_info(probe, "rx-usecs set too low, "
9328 * Check if Flow Director n-tuple support or hw_tc support was
9329 * enabled or disabled. If the state changed, we need to reset.
9331 if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9332 /* turn off ATR, enable perfect filters and reset */
9333 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9336 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9337 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9339 /* turn off perfect filters, enable ATR and reset */
9340 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9343 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9345 /* We cannot enable ATR if SR-IOV is enabled */
9346 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9347 /* We cannot enable ATR if we have 2 or more tcs */
9348 (netdev_get_num_tc(netdev) > 1) ||
9349 /* We cannot enable ATR if RSS is disabled */
9350 (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9351 /* A sample rate of 0 indicates ATR disabled */
9352 (!adapter->atr_sample_rate))
9353 ; /* do nothing not supported */
9354 else /* otherwise supported and set the flag */
9355 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9358 if (changed & NETIF_F_RXALL)
9361 netdev->features = features;
9363 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9364 if (features & NETIF_F_RXCSUM) {
9365 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9367 u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9369 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9373 if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9374 if (features & NETIF_F_RXCSUM) {
9375 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9377 u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9379 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9384 ixgbe_do_reset(netdev);
9385 else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9386 NETIF_F_HW_VLAN_CTAG_FILTER))
9387 ixgbe_set_rx_mode(netdev);
9393 * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9394 * @dev: The port's netdev
9395 * @ti: Tunnel endpoint information
9397 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9398 struct udp_tunnel_info *ti)
9400 struct ixgbe_adapter *adapter = netdev_priv(dev);
9401 struct ixgbe_hw *hw = &adapter->hw;
9402 __be16 port = ti->port;
9406 if (ti->sa_family != AF_INET)
9410 case UDP_TUNNEL_TYPE_VXLAN:
9411 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9414 if (adapter->vxlan_port == port)
9417 if (adapter->vxlan_port) {
9419 "VXLAN port %d set, not adding port %d\n",
9420 ntohs(adapter->vxlan_port),
9425 adapter->vxlan_port = port;
9427 case UDP_TUNNEL_TYPE_GENEVE:
9428 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9431 if (adapter->geneve_port == port)
9434 if (adapter->geneve_port) {
9436 "GENEVE port %d set, not adding port %d\n",
9437 ntohs(adapter->geneve_port),
9442 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9443 adapter->geneve_port = port;
9449 reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9450 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9454 * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9455 * @dev: The port's netdev
9456 * @ti: Tunnel endpoint information
9458 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9459 struct udp_tunnel_info *ti)
9461 struct ixgbe_adapter *adapter = netdev_priv(dev);
9464 if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9465 ti->type != UDP_TUNNEL_TYPE_GENEVE)
9468 if (ti->sa_family != AF_INET)
9472 case UDP_TUNNEL_TYPE_VXLAN:
9473 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9476 if (adapter->vxlan_port != ti->port) {
9477 netdev_info(dev, "VXLAN port %d not found\n",
9482 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9484 case UDP_TUNNEL_TYPE_GENEVE:
9485 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9488 if (adapter->geneve_port != ti->port) {
9489 netdev_info(dev, "GENEVE port %d not found\n",
9494 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9500 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9501 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9504 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9505 struct net_device *dev,
9506 const unsigned char *addr, u16 vid,
9509 /* guarantee we can provide a unique filter for the unicast address */
9510 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9511 struct ixgbe_adapter *adapter = netdev_priv(dev);
9512 u16 pool = VMDQ_P(0);
9514 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9518 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9522 * ixgbe_configure_bridge_mode - set various bridge modes
9523 * @adapter - the private structure
9524 * @mode - requested bridge mode
9526 * Configure some settings require for various bridge modes.
9528 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9531 struct ixgbe_hw *hw = &adapter->hw;
9532 unsigned int p, num_pools;
9536 case BRIDGE_MODE_VEPA:
9537 /* disable Tx loopback, rely on switch hairpin mode */
9538 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9540 /* must enable Rx switching replication to allow multicast
9541 * packet reception on all VFs, and to enable source address
9544 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9545 vmdctl |= IXGBE_VT_CTL_REPLEN;
9546 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9548 /* enable Rx source address pruning. Note, this requires
9549 * replication to be enabled or else it does nothing.
9551 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9552 for (p = 0; p < num_pools; p++) {
9553 if (hw->mac.ops.set_source_address_pruning)
9554 hw->mac.ops.set_source_address_pruning(hw,
9559 case BRIDGE_MODE_VEB:
9560 /* enable Tx loopback for internal VF/PF communication */
9561 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9562 IXGBE_PFDTXGSWC_VT_LBEN);
9564 /* disable Rx switching replication unless we have SR-IOV
9567 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9568 if (!adapter->num_vfs)
9569 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9570 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9572 /* disable Rx source address pruning, since we don't expect to
9573 * be receiving external loopback of our transmitted frames.
9575 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9576 for (p = 0; p < num_pools; p++) {
9577 if (hw->mac.ops.set_source_address_pruning)
9578 hw->mac.ops.set_source_address_pruning(hw,
9587 adapter->bridge_mode = mode;
9589 e_info(drv, "enabling bridge mode: %s\n",
9590 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9595 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9596 struct nlmsghdr *nlh, u16 flags)
9598 struct ixgbe_adapter *adapter = netdev_priv(dev);
9599 struct nlattr *attr, *br_spec;
9602 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9605 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9609 nla_for_each_nested(attr, br_spec, rem) {
9613 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9616 if (nla_len(attr) < sizeof(mode))
9619 mode = nla_get_u16(attr);
9620 status = ixgbe_configure_bridge_mode(adapter, mode);
9630 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9631 struct net_device *dev,
9632 u32 filter_mask, int nlflags)
9634 struct ixgbe_adapter *adapter = netdev_priv(dev);
9636 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9639 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9640 adapter->bridge_mode, 0, 0, nlflags,
9644 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9646 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9647 struct ixgbe_adapter *adapter = netdev_priv(pdev);
9648 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9652 /* Hardware has a limited number of available pools. Each VF, and the
9653 * PF require a pool. Check to ensure we don't attempt to use more
9654 * then the available number of pools.
9656 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9657 return ERR_PTR(-EINVAL);
9660 if (vdev->num_rx_queues != vdev->num_tx_queues) {
9661 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9663 return ERR_PTR(-EINVAL);
9666 /* Check for hardware restriction on number of rx/tx queues */
9667 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9668 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9670 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9672 return ERR_PTR(-EINVAL);
9675 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9676 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9677 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9678 return ERR_PTR(-EBUSY);
9680 fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9682 return ERR_PTR(-ENOMEM);
9684 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9685 adapter->num_rx_pools++;
9686 set_bit(pool, &adapter->fwd_bitmask);
9687 limit = find_last_bit(&adapter->fwd_bitmask, 32);
9689 /* Enable VMDq flag so device will be set in VM mode */
9690 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9691 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9692 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9694 /* Force reinit of ring allocation with VMDQ enabled */
9695 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9698 fwd_adapter->pool = pool;
9699 fwd_adapter->real_adapter = adapter;
9701 if (netif_running(pdev)) {
9702 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9705 netif_tx_start_all_queues(vdev);
9710 /* unwind counter and free adapter struct */
9712 "%s: dfwd hardware acceleration failed\n", vdev->name);
9713 clear_bit(pool, &adapter->fwd_bitmask);
9714 adapter->num_rx_pools--;
9716 return ERR_PTR(err);
9719 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9721 struct ixgbe_fwd_adapter *fwd_adapter = priv;
9722 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9725 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9726 adapter->num_rx_pools--;
9728 limit = find_last_bit(&adapter->fwd_bitmask, 32);
9729 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9730 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9731 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9732 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9733 fwd_adapter->pool, adapter->num_rx_pools,
9734 fwd_adapter->rx_base_queue,
9735 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9736 adapter->fwd_bitmask);
9740 #define IXGBE_MAX_MAC_HDR_LEN 127
9741 #define IXGBE_MAX_NETWORK_HDR_LEN 511
9743 static netdev_features_t
9744 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9745 netdev_features_t features)
9747 unsigned int network_hdr_len, mac_hdr_len;
9749 /* Make certain the headers can be described by a context descriptor */
9750 mac_hdr_len = skb_network_header(skb) - skb->data;
9751 if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9752 return features & ~(NETIF_F_HW_CSUM |
9754 NETIF_F_HW_VLAN_CTAG_TX |
9758 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9759 if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN))
9760 return features & ~(NETIF_F_HW_CSUM |
9765 /* We can only support IPV4 TSO in tunnels if we can mangle the
9766 * inner IP ID field, so strip TSO if MANGLEID is not supported.
9768 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9769 features &= ~NETIF_F_TSO;
9774 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
9776 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
9777 struct ixgbe_adapter *adapter = netdev_priv(dev);
9778 struct bpf_prog *old_prog;
9780 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
9783 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
9786 /* verify ixgbe ring attributes are sufficient for XDP */
9787 for (i = 0; i < adapter->num_rx_queues; i++) {
9788 struct ixgbe_ring *ring = adapter->rx_ring[i];
9790 if (ring_is_rsc_enabled(ring))
9793 if (frame_size > ixgbe_rx_bufsz(ring))
9797 if (nr_cpu_ids > MAX_XDP_QUEUES)
9800 old_prog = xchg(&adapter->xdp_prog, prog);
9802 /* If transitioning XDP modes reconfigure rings */
9803 if (!!prog != !!old_prog) {
9804 int err = ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
9807 rcu_assign_pointer(adapter->xdp_prog, old_prog);
9811 for (i = 0; i < adapter->num_rx_queues; i++)
9812 xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
9816 bpf_prog_put(old_prog);
9821 static int ixgbe_xdp(struct net_device *dev, struct netdev_xdp *xdp)
9823 struct ixgbe_adapter *adapter = netdev_priv(dev);
9825 switch (xdp->command) {
9826 case XDP_SETUP_PROG:
9827 return ixgbe_xdp_setup(dev, xdp->prog);
9828 case XDP_QUERY_PROG:
9829 xdp->prog_attached = !!(adapter->xdp_prog);
9830 xdp->prog_id = adapter->xdp_prog ?
9831 adapter->xdp_prog->aux->id : 0;
9838 static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp)
9840 struct ixgbe_adapter *adapter = netdev_priv(dev);
9841 struct ixgbe_ring *ring;
9844 if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
9847 /* During program transitions its possible adapter->xdp_prog is assigned
9848 * but ring has not been configured yet. In this case simply abort xmit.
9850 ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
9851 if (unlikely(!ring))
9854 err = ixgbe_xmit_xdp_ring(adapter, xdp);
9855 if (err != IXGBE_XDP_TX)
9861 static void ixgbe_xdp_flush(struct net_device *dev)
9863 struct ixgbe_adapter *adapter = netdev_priv(dev);
9864 struct ixgbe_ring *ring;
9866 /* Its possible the device went down between xdp xmit and flush so
9867 * we need to ensure device is still up.
9869 if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
9872 ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
9873 if (unlikely(!ring))
9876 /* Force memory writes to complete before letting h/w know there
9877 * are new descriptors to fetch.
9880 writel(ring->next_to_use, ring->tail);
9885 static const struct net_device_ops ixgbe_netdev_ops = {
9886 .ndo_open = ixgbe_open,
9887 .ndo_stop = ixgbe_close,
9888 .ndo_start_xmit = ixgbe_xmit_frame,
9889 .ndo_select_queue = ixgbe_select_queue,
9890 .ndo_set_rx_mode = ixgbe_set_rx_mode,
9891 .ndo_validate_addr = eth_validate_addr,
9892 .ndo_set_mac_address = ixgbe_set_mac,
9893 .ndo_change_mtu = ixgbe_change_mtu,
9894 .ndo_tx_timeout = ixgbe_tx_timeout,
9895 .ndo_set_tx_maxrate = ixgbe_tx_maxrate,
9896 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
9897 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
9898 .ndo_do_ioctl = ixgbe_ioctl,
9899 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
9900 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
9901 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
9902 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
9903 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9904 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust,
9905 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
9906 .ndo_get_stats64 = ixgbe_get_stats64,
9907 .ndo_setup_tc = __ixgbe_setup_tc,
9908 #ifdef CONFIG_NET_POLL_CONTROLLER
9909 .ndo_poll_controller = ixgbe_netpoll,
9912 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9913 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9914 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9915 .ndo_fcoe_enable = ixgbe_fcoe_enable,
9916 .ndo_fcoe_disable = ixgbe_fcoe_disable,
9917 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9918 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9919 #endif /* IXGBE_FCOE */
9920 .ndo_set_features = ixgbe_set_features,
9921 .ndo_fix_features = ixgbe_fix_features,
9922 .ndo_fdb_add = ixgbe_ndo_fdb_add,
9923 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
9924 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
9925 .ndo_dfwd_add_station = ixgbe_fwd_add,
9926 .ndo_dfwd_del_station = ixgbe_fwd_del,
9927 .ndo_udp_tunnel_add = ixgbe_add_udp_tunnel_port,
9928 .ndo_udp_tunnel_del = ixgbe_del_udp_tunnel_port,
9929 .ndo_features_check = ixgbe_features_check,
9930 .ndo_xdp = ixgbe_xdp,
9931 .ndo_xdp_xmit = ixgbe_xdp_xmit,
9932 .ndo_xdp_flush = ixgbe_xdp_flush,
9936 * ixgbe_enumerate_functions - Get the number of ports this device has
9937 * @adapter: adapter structure
9939 * This function enumerates the phsyical functions co-located on a single slot,
9940 * in order to determine how many ports a device has. This is most useful in
9941 * determining the required GT/s of PCIe bandwidth necessary for optimal
9944 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9946 struct pci_dev *entry, *pdev = adapter->pdev;
9949 /* Some cards can not use the generic count PCIe functions method,
9950 * because they are behind a parent switch, so we hardcode these with
9951 * the correct number of functions.
9953 if (ixgbe_pcie_from_parent(&adapter->hw))
9956 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9957 /* don't count virtual functions */
9958 if (entry->is_virtfn)
9961 /* When the devices on the bus don't all match our device ID,
9962 * we can't reliably determine the correct number of
9963 * functions. This can occur if a function has been direct
9964 * attached to a virtual machine using VT-d, for example. In
9965 * this case, simply return -1 to indicate this.
9967 if ((entry->vendor != pdev->vendor) ||
9968 (entry->device != pdev->device))
9978 * ixgbe_wol_supported - Check whether device supports WoL
9979 * @adapter: the adapter private structure
9980 * @device_id: the device ID
9981 * @subdev_id: the subsystem device ID
9983 * This function is used by probe and ethtool to determine
9984 * which devices have WoL support
9987 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9990 struct ixgbe_hw *hw = &adapter->hw;
9991 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9993 /* WOL not supported on 82598 */
9994 if (hw->mac.type == ixgbe_mac_82598EB)
9997 /* check eeprom to see if WOL is enabled for X540 and newer */
9998 if (hw->mac.type >= ixgbe_mac_X540) {
9999 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10000 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10001 (hw->bus.func == 0)))
10005 /* WOL is determined based on device IDs for 82599 MACs */
10006 switch (device_id) {
10007 case IXGBE_DEV_ID_82599_SFP:
10008 /* Only these subdevices could supports WOL */
10009 switch (subdevice_id) {
10010 case IXGBE_SUBDEV_ID_82599_560FLR:
10011 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10012 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10013 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10014 /* only support first port */
10015 if (hw->bus.func != 0)
10018 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10019 case IXGBE_SUBDEV_ID_82599_SFP:
10020 case IXGBE_SUBDEV_ID_82599_RNDC:
10021 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10022 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10023 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10024 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10028 case IXGBE_DEV_ID_82599EN_SFP:
10029 /* Only these subdevices support WOL */
10030 switch (subdevice_id) {
10031 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10035 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10036 /* All except this subdevice support WOL */
10037 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10040 case IXGBE_DEV_ID_82599_KX4:
10050 * ixgbe_probe - Device Initialization Routine
10051 * @pdev: PCI device information struct
10052 * @ent: entry in ixgbe_pci_tbl
10054 * Returns 0 on success, negative on failure
10056 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10057 * The OS initialization, configuring of the adapter private structure,
10058 * and a hardware reset occur.
10060 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10062 struct net_device *netdev;
10063 struct ixgbe_adapter *adapter = NULL;
10064 struct ixgbe_hw *hw;
10065 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10066 int i, err, pci_using_dac, expected_gts;
10067 unsigned int indices = MAX_TX_QUEUES;
10068 u8 part_str[IXGBE_PBANUM_LENGTH];
10069 bool disable_dev = false;
10075 /* Catch broken hardware that put the wrong VF device ID in
10076 * the PCIe SR-IOV capability.
10078 if (pdev->is_virtfn) {
10079 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10080 pci_name(pdev), pdev->vendor, pdev->device);
10084 err = pci_enable_device_mem(pdev);
10088 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10091 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10093 dev_err(&pdev->dev,
10094 "No usable DMA configuration, aborting\n");
10100 err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10102 dev_err(&pdev->dev,
10103 "pci_request_selected_regions failed 0x%x\n", err);
10107 pci_enable_pcie_error_reporting(pdev);
10109 pci_set_master(pdev);
10110 pci_save_state(pdev);
10112 if (ii->mac == ixgbe_mac_82598EB) {
10113 #ifdef CONFIG_IXGBE_DCB
10114 /* 8 TC w/ 4 queues per TC */
10115 indices = 4 * MAX_TRAFFIC_CLASS;
10117 indices = IXGBE_MAX_RSS_INDICES;
10121 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10124 goto err_alloc_etherdev;
10127 SET_NETDEV_DEV(netdev, &pdev->dev);
10129 adapter = netdev_priv(netdev);
10131 adapter->netdev = netdev;
10132 adapter->pdev = pdev;
10134 hw->back = adapter;
10135 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10137 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10138 pci_resource_len(pdev, 0));
10139 adapter->io_addr = hw->hw_addr;
10140 if (!hw->hw_addr) {
10145 netdev->netdev_ops = &ixgbe_netdev_ops;
10146 ixgbe_set_ethtool_ops(netdev);
10147 netdev->watchdog_timeo = 5 * HZ;
10148 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10151 hw->mac.ops = *ii->mac_ops;
10152 hw->mac.type = ii->mac;
10153 hw->mvals = ii->mvals;
10155 hw->link.ops = *ii->link_ops;
10158 hw->eeprom.ops = *ii->eeprom_ops;
10159 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10160 if (ixgbe_removed(hw->hw_addr)) {
10164 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10165 if (!(eec & BIT(8)))
10166 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10169 hw->phy.ops = *ii->phy_ops;
10170 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10171 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10172 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10173 hw->phy.mdio.mmds = 0;
10174 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10175 hw->phy.mdio.dev = netdev;
10176 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10177 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10179 /* setup the private structure */
10180 err = ixgbe_sw_init(adapter, ii);
10184 /* Make sure the SWFW semaphore is in a valid state */
10185 if (hw->mac.ops.init_swfw_sync)
10186 hw->mac.ops.init_swfw_sync(hw);
10188 /* Make it possible the adapter to be woken up via WOL */
10189 switch (adapter->hw.mac.type) {
10190 case ixgbe_mac_82599EB:
10191 case ixgbe_mac_X540:
10192 case ixgbe_mac_X550:
10193 case ixgbe_mac_X550EM_x:
10194 case ixgbe_mac_x550em_a:
10195 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10202 * If there is a fan on this device and it has failed log the
10205 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10206 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10207 if (esdp & IXGBE_ESDP_SDP1)
10208 e_crit(probe, "Fan has stopped, replace the adapter\n");
10211 if (allow_unsupported_sfp)
10212 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10214 /* reset_hw fills in the perm_addr as well */
10215 hw->phy.reset_if_overtemp = true;
10216 err = hw->mac.ops.reset_hw(hw);
10217 hw->phy.reset_if_overtemp = false;
10218 ixgbe_set_eee_capable(adapter);
10219 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10221 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10222 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10223 e_dev_err("Reload the driver after installing a supported module.\n");
10226 e_dev_err("HW Init failed: %d\n", err);
10230 #ifdef CONFIG_PCI_IOV
10231 /* SR-IOV not supported on the 82598 */
10232 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10235 ixgbe_init_mbx_params_pf(hw);
10236 hw->mbx.ops = ii->mbx_ops;
10237 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10238 ixgbe_enable_sriov(adapter, max_vfs);
10242 netdev->features = NETIF_F_SG |
10249 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10250 NETIF_F_GSO_GRE_CSUM | \
10251 NETIF_F_GSO_IPXIP4 | \
10252 NETIF_F_GSO_IPXIP6 | \
10253 NETIF_F_GSO_UDP_TUNNEL | \
10254 NETIF_F_GSO_UDP_TUNNEL_CSUM)
10256 netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10257 netdev->features |= NETIF_F_GSO_PARTIAL |
10258 IXGBE_GSO_PARTIAL_FEATURES;
10260 if (hw->mac.type >= ixgbe_mac_82599EB)
10261 netdev->features |= NETIF_F_SCTP_CRC;
10263 /* copy netdev features into list of user selectable features */
10264 netdev->hw_features |= netdev->features |
10265 NETIF_F_HW_VLAN_CTAG_FILTER |
10266 NETIF_F_HW_VLAN_CTAG_RX |
10267 NETIF_F_HW_VLAN_CTAG_TX |
10269 NETIF_F_HW_L2FW_DOFFLOAD;
10271 if (hw->mac.type >= ixgbe_mac_82599EB)
10272 netdev->hw_features |= NETIF_F_NTUPLE |
10276 netdev->features |= NETIF_F_HIGHDMA;
10278 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10279 netdev->hw_enc_features |= netdev->vlan_features;
10280 netdev->mpls_features |= NETIF_F_SG |
10284 netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10286 /* set this bit last since it cannot be part of vlan_features */
10287 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10288 NETIF_F_HW_VLAN_CTAG_RX |
10289 NETIF_F_HW_VLAN_CTAG_TX;
10291 netdev->priv_flags |= IFF_UNICAST_FLT;
10292 netdev->priv_flags |= IFF_SUPP_NOFCS;
10294 /* MTU range: 68 - 9710 */
10295 netdev->min_mtu = ETH_MIN_MTU;
10296 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10298 #ifdef CONFIG_IXGBE_DCB
10299 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10300 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10304 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10305 unsigned int fcoe_l;
10307 if (hw->mac.ops.get_device_caps) {
10308 hw->mac.ops.get_device_caps(hw, &device_caps);
10309 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10310 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10314 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10315 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10317 netdev->features |= NETIF_F_FSO |
10320 netdev->vlan_features |= NETIF_F_FSO |
10324 #endif /* IXGBE_FCOE */
10326 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10327 netdev->hw_features |= NETIF_F_LRO;
10328 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10329 netdev->features |= NETIF_F_LRO;
10331 /* make sure the EEPROM is good */
10332 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10333 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10338 eth_platform_get_mac_address(&adapter->pdev->dev,
10339 adapter->hw.mac.perm_addr);
10341 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10343 if (!is_valid_ether_addr(netdev->dev_addr)) {
10344 e_dev_err("invalid MAC address\n");
10349 /* Set hw->mac.addr to permanent MAC address */
10350 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10351 ixgbe_mac_set_default_filter(adapter);
10353 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
10354 (unsigned long) adapter);
10356 if (ixgbe_removed(hw->hw_addr)) {
10360 INIT_WORK(&adapter->service_task, ixgbe_service_task);
10361 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10362 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10364 err = ixgbe_init_interrupt_scheme(adapter);
10368 for (i = 0; i < adapter->num_rx_queues; i++)
10369 u64_stats_init(&adapter->rx_ring[i]->syncp);
10370 for (i = 0; i < adapter->num_tx_queues; i++)
10371 u64_stats_init(&adapter->tx_ring[i]->syncp);
10372 for (i = 0; i < adapter->num_xdp_queues; i++)
10373 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10375 /* WOL not supported for all devices */
10377 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10378 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10379 pdev->subsystem_device);
10380 if (hw->wol_enabled)
10381 adapter->wol = IXGBE_WUFC_MAG;
10383 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10385 /* save off EEPROM version number */
10386 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
10387 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
10389 /* pick up the PCI bus settings for reporting later */
10390 if (ixgbe_pcie_from_parent(hw))
10391 ixgbe_get_parent_bus_info(adapter);
10393 hw->mac.ops.get_bus_info(hw);
10395 /* calculate the expected PCIe bandwidth required for optimal
10396 * performance. Note that some older parts will never have enough
10397 * bandwidth due to being older generation PCIe parts. We clamp these
10398 * parts to ensure no warning is displayed if it can't be fixed.
10400 switch (hw->mac.type) {
10401 case ixgbe_mac_82598EB:
10402 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10405 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10409 /* don't check link if we failed to enumerate functions */
10410 if (expected_gts > 0)
10411 ixgbe_check_minimum_link(adapter, expected_gts);
10413 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10415 strlcpy(part_str, "Unknown", sizeof(part_str));
10416 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10417 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10418 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10421 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10422 hw->mac.type, hw->phy.type, part_str);
10424 e_dev_info("%pM\n", netdev->dev_addr);
10426 /* reset the hardware with the new settings */
10427 err = hw->mac.ops.start_hw(hw);
10428 if (err == IXGBE_ERR_EEPROM_VERSION) {
10429 /* We are running on a pre-production device, log a warning */
10430 e_dev_warn("This device is a pre-production adapter/LOM. "
10431 "Please be aware there may be issues associated "
10432 "with your hardware. If you are experiencing "
10433 "problems please contact your Intel or hardware "
10434 "representative who provided you with this "
10437 strcpy(netdev->name, "eth%d");
10438 pci_set_drvdata(pdev, adapter);
10439 err = register_netdev(netdev);
10444 /* power down the optics for 82599 SFP+ fiber */
10445 if (hw->mac.ops.disable_tx_laser)
10446 hw->mac.ops.disable_tx_laser(hw);
10448 /* carrier off reporting is important to ethtool even BEFORE open */
10449 netif_carrier_off(netdev);
10451 #ifdef CONFIG_IXGBE_DCA
10452 if (dca_add_requester(&pdev->dev) == 0) {
10453 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10454 ixgbe_setup_dca(adapter);
10457 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10458 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10459 for (i = 0; i < adapter->num_vfs; i++)
10460 ixgbe_vf_configuration(pdev, (i | 0x10000000));
10463 /* firmware requires driver version to be 0xFFFFFFFF
10464 * since os does not support feature
10466 if (hw->mac.ops.set_fw_drv_ver)
10467 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10468 sizeof(ixgbe_driver_version) - 1,
10469 ixgbe_driver_version);
10471 /* add san mac addr to netdev */
10472 ixgbe_add_sanmac_netdev(netdev);
10474 e_dev_info("%s\n", ixgbe_default_device_descr);
10476 #ifdef CONFIG_IXGBE_HWMON
10477 if (ixgbe_sysfs_init(adapter))
10478 e_err(probe, "failed to allocate sysfs resources\n");
10479 #endif /* CONFIG_IXGBE_HWMON */
10481 ixgbe_dbg_adapter_init(adapter);
10483 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10484 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10485 hw->mac.ops.setup_link(hw,
10486 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10492 ixgbe_release_hw_control(adapter);
10493 ixgbe_clear_interrupt_scheme(adapter);
10495 ixgbe_disable_sriov(adapter);
10496 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10497 iounmap(adapter->io_addr);
10498 kfree(adapter->jump_tables[0]);
10499 kfree(adapter->mac_table);
10500 kfree(adapter->rss_key);
10502 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10503 free_netdev(netdev);
10504 err_alloc_etherdev:
10505 pci_release_mem_regions(pdev);
10508 if (!adapter || disable_dev)
10509 pci_disable_device(pdev);
10514 * ixgbe_remove - Device Removal Routine
10515 * @pdev: PCI device information struct
10517 * ixgbe_remove is called by the PCI subsystem to alert the driver
10518 * that it should release a PCI device. The could be caused by a
10519 * Hot-Plug event, or because the driver is going to be removed from
10522 static void ixgbe_remove(struct pci_dev *pdev)
10524 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10525 struct net_device *netdev;
10529 /* if !adapter then we already cleaned up in probe */
10533 netdev = adapter->netdev;
10534 ixgbe_dbg_adapter_exit(adapter);
10536 set_bit(__IXGBE_REMOVING, &adapter->state);
10537 cancel_work_sync(&adapter->service_task);
10540 #ifdef CONFIG_IXGBE_DCA
10541 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10542 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10543 dca_remove_requester(&pdev->dev);
10544 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10545 IXGBE_DCA_CTRL_DCA_DISABLE);
10549 #ifdef CONFIG_IXGBE_HWMON
10550 ixgbe_sysfs_exit(adapter);
10551 #endif /* CONFIG_IXGBE_HWMON */
10553 /* remove the added san mac */
10554 ixgbe_del_sanmac_netdev(netdev);
10556 #ifdef CONFIG_PCI_IOV
10557 ixgbe_disable_sriov(adapter);
10559 if (netdev->reg_state == NETREG_REGISTERED)
10560 unregister_netdev(netdev);
10562 ixgbe_clear_interrupt_scheme(adapter);
10564 ixgbe_release_hw_control(adapter);
10567 kfree(adapter->ixgbe_ieee_pfc);
10568 kfree(adapter->ixgbe_ieee_ets);
10571 iounmap(adapter->io_addr);
10572 pci_release_mem_regions(pdev);
10574 e_dev_info("complete\n");
10576 for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10577 if (adapter->jump_tables[i]) {
10578 kfree(adapter->jump_tables[i]->input);
10579 kfree(adapter->jump_tables[i]->mask);
10581 kfree(adapter->jump_tables[i]);
10584 kfree(adapter->mac_table);
10585 kfree(adapter->rss_key);
10586 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10587 free_netdev(netdev);
10589 pci_disable_pcie_error_reporting(pdev);
10592 pci_disable_device(pdev);
10596 * ixgbe_io_error_detected - called when PCI error is detected
10597 * @pdev: Pointer to PCI device
10598 * @state: The current pci connection state
10600 * This function is called after a PCI bus error affecting
10601 * this device has been detected.
10603 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10604 pci_channel_state_t state)
10606 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10607 struct net_device *netdev = adapter->netdev;
10609 #ifdef CONFIG_PCI_IOV
10610 struct ixgbe_hw *hw = &adapter->hw;
10611 struct pci_dev *bdev, *vfdev;
10612 u32 dw0, dw1, dw2, dw3;
10614 u16 req_id, pf_func;
10616 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10617 adapter->num_vfs == 0)
10618 goto skip_bad_vf_detection;
10620 bdev = pdev->bus->self;
10621 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10622 bdev = bdev->bus->self;
10625 goto skip_bad_vf_detection;
10627 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10629 goto skip_bad_vf_detection;
10631 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10632 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10633 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10634 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10635 if (ixgbe_removed(hw->hw_addr))
10636 goto skip_bad_vf_detection;
10638 req_id = dw1 >> 16;
10639 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10640 if (!(req_id & 0x0080))
10641 goto skip_bad_vf_detection;
10643 pf_func = req_id & 0x01;
10644 if ((pf_func & 1) == (pdev->devfn & 1)) {
10645 unsigned int device_id;
10647 vf = (req_id & 0x7F) >> 1;
10648 e_dev_err("VF %d has caused a PCIe error\n", vf);
10649 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10650 "%8.8x\tdw3: %8.8x\n",
10651 dw0, dw1, dw2, dw3);
10652 switch (adapter->hw.mac.type) {
10653 case ixgbe_mac_82599EB:
10654 device_id = IXGBE_82599_VF_DEVICE_ID;
10656 case ixgbe_mac_X540:
10657 device_id = IXGBE_X540_VF_DEVICE_ID;
10659 case ixgbe_mac_X550:
10660 device_id = IXGBE_DEV_ID_X550_VF;
10662 case ixgbe_mac_X550EM_x:
10663 device_id = IXGBE_DEV_ID_X550EM_X_VF;
10665 case ixgbe_mac_x550em_a:
10666 device_id = IXGBE_DEV_ID_X550EM_A_VF;
10673 /* Find the pci device of the offending VF */
10674 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10676 if (vfdev->devfn == (req_id & 0xFF))
10678 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10682 * There's a slim chance the VF could have been hot plugged,
10683 * so if it is no longer present we don't need to issue the
10684 * VFLR. Just clean up the AER in that case.
10688 /* Free device reference count */
10689 pci_dev_put(vfdev);
10692 pci_cleanup_aer_uncorrect_error_status(pdev);
10696 * Even though the error may have occurred on the other port
10697 * we still need to increment the vf error reference count for
10698 * both ports because the I/O resume function will be called
10699 * for both of them.
10701 adapter->vferr_refcount++;
10703 return PCI_ERS_RESULT_RECOVERED;
10705 skip_bad_vf_detection:
10706 #endif /* CONFIG_PCI_IOV */
10707 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10708 return PCI_ERS_RESULT_DISCONNECT;
10711 netif_device_detach(netdev);
10713 if (state == pci_channel_io_perm_failure) {
10715 return PCI_ERS_RESULT_DISCONNECT;
10718 if (netif_running(netdev))
10719 ixgbe_close_suspend(adapter);
10721 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10722 pci_disable_device(pdev);
10725 /* Request a slot reset. */
10726 return PCI_ERS_RESULT_NEED_RESET;
10730 * ixgbe_io_slot_reset - called after the pci bus has been reset.
10731 * @pdev: Pointer to PCI device
10733 * Restart the card from scratch, as if from a cold-boot.
10735 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10737 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10738 pci_ers_result_t result;
10741 if (pci_enable_device_mem(pdev)) {
10742 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10743 result = PCI_ERS_RESULT_DISCONNECT;
10745 smp_mb__before_atomic();
10746 clear_bit(__IXGBE_DISABLED, &adapter->state);
10747 adapter->hw.hw_addr = adapter->io_addr;
10748 pci_set_master(pdev);
10749 pci_restore_state(pdev);
10750 pci_save_state(pdev);
10752 pci_wake_from_d3(pdev, false);
10754 ixgbe_reset(adapter);
10755 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10756 result = PCI_ERS_RESULT_RECOVERED;
10759 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10761 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10762 "failed 0x%0x\n", err);
10763 /* non-fatal, continue */
10770 * ixgbe_io_resume - called when traffic can start flowing again.
10771 * @pdev: Pointer to PCI device
10773 * This callback is called when the error recovery driver tells us that
10774 * its OK to resume normal operation.
10776 static void ixgbe_io_resume(struct pci_dev *pdev)
10778 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10779 struct net_device *netdev = adapter->netdev;
10781 #ifdef CONFIG_PCI_IOV
10782 if (adapter->vferr_refcount) {
10783 e_info(drv, "Resuming after VF err\n");
10784 adapter->vferr_refcount--;
10790 if (netif_running(netdev))
10791 ixgbe_open(netdev);
10793 netif_device_attach(netdev);
10797 static const struct pci_error_handlers ixgbe_err_handler = {
10798 .error_detected = ixgbe_io_error_detected,
10799 .slot_reset = ixgbe_io_slot_reset,
10800 .resume = ixgbe_io_resume,
10803 static struct pci_driver ixgbe_driver = {
10804 .name = ixgbe_driver_name,
10805 .id_table = ixgbe_pci_tbl,
10806 .probe = ixgbe_probe,
10807 .remove = ixgbe_remove,
10809 .suspend = ixgbe_suspend,
10810 .resume = ixgbe_resume,
10812 .shutdown = ixgbe_shutdown,
10813 .sriov_configure = ixgbe_pci_sriov_configure,
10814 .err_handler = &ixgbe_err_handler
10818 * ixgbe_init_module - Driver Registration Routine
10820 * ixgbe_init_module is the first routine called when the driver is
10821 * loaded. All it does is register with the PCI subsystem.
10823 static int __init ixgbe_init_module(void)
10826 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10827 pr_info("%s\n", ixgbe_copyright);
10829 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10831 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10837 ret = pci_register_driver(&ixgbe_driver);
10839 destroy_workqueue(ixgbe_wq);
10844 #ifdef CONFIG_IXGBE_DCA
10845 dca_register_notify(&dca_notifier);
10851 module_init(ixgbe_init_module);
10854 * ixgbe_exit_module - Driver Exit Cleanup Routine
10856 * ixgbe_exit_module is called just before the driver is removed
10859 static void __exit ixgbe_exit_module(void)
10861 #ifdef CONFIG_IXGBE_DCA
10862 dca_unregister_notify(&dca_notifier);
10864 pci_unregister_driver(&ixgbe_driver);
10868 destroy_workqueue(ixgbe_wq);
10873 #ifdef CONFIG_IXGBE_DCA
10874 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10879 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10880 __ixgbe_notify_dca);
10882 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10885 #endif /* CONFIG_IXGBE_DCA */
10887 module_exit(ixgbe_exit_module);