drivers/net/ethernet/intel/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29
  30 #include <linux/module.h>
  31 #include <linux/types.h>
  32 #include <linux/init.h>
  33 #include <linux/bitops.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/pagemap.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ipv6.h>
  38 #include <linux/slab.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/net_tstamp.h>
  42 #include <linux/mii.h>
  43 #include <linux/ethtool.h>
  44 #include <linux/if.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/pci.h>
  47 #include <linux/pci-aspm.h>
  48 #include <linux/delay.h>
  49 #include <linux/interrupt.h>
  50 #include <linux/ip.h>
  51 #include <linux/tcp.h>
  52 #include <linux/sctp.h>
  53 #include <linux/if_ether.h>
  54 #include <linux/aer.h>
  55 #include <linux/prefetch.h>
  56 #include <linux/pm_runtime.h>
  57 #ifdef CONFIG_IGB_DCA
  58 #include <linux/dca.h>
  59 #endif
  60 #include <linux/i2c.h>
  61 #include "igb.h"
  62
  63 #define MAJ 5
  64 #define MIN 0
  65 #define BUILD 5
  66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  67 __stringify(BUILD) "-k"
  68 char igb_driver_name[] = "igb";
  69 char igb_driver_version[] = DRV_VERSION;
  70 static const char igb_driver_string[] =
  71                                 "Intel(R) Gigabit Ethernet Network Driver";
  72 static const char igb_copyright[] =
  73                                 "Copyright (c) 2007-2013 Intel Corporation.";
  74
  75 static const struct e1000_info *igb_info_tbl[] = {
  76         [board_82575] = &e1000_82575_info,
  77 };
  78
  79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 128 static void igb_remove(struct pci_dev *pdev);
 129 static int igb_sw_init(struct igb_adapter *);
 130 static int igb_open(struct net_device *);
 131 static int igb_close(struct net_device *);
 132 static void igb_configure(struct igb_adapter *);
 133 static void igb_configure_tx(struct igb_adapter *);
 134 static void igb_configure_rx(struct igb_adapter *);
 135 static void igb_clean_all_tx_rings(struct igb_adapter *);
 136 static void igb_clean_all_rx_rings(struct igb_adapter *);
 137 static void igb_clean_tx_ring(struct igb_ring *);
 138 static void igb_clean_rx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 144 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 145                                                  struct rtnl_link_stats64 *stats);
 146 static int igb_change_mtu(struct net_device *, int);
 147 static int igb_set_mac(struct net_device *, void *);
 148 static void igb_set_uta(struct igb_adapter *adapter);
 149 static irqreturn_t igb_intr(int irq, void *);
 150 static irqreturn_t igb_intr_msi(int irq, void *);
 151 static irqreturn_t igb_msix_other(int irq, void *);
 152 static irqreturn_t igb_msix_ring(int irq, void *);
 153 #ifdef CONFIG_IGB_DCA
 154 static void igb_update_dca(struct igb_q_vector *);
 155 static void igb_setup_dca(struct igb_adapter *);
 156 #endif /* CONFIG_IGB_DCA */
 157 static int igb_poll(struct napi_struct *, int);
 158 static bool igb_clean_tx_irq(struct igb_q_vector *);
 159 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 160 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 161 static void igb_tx_timeout(struct net_device *);
 162 static void igb_reset_task(struct work_struct *);
 163 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
 164 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 165 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 166 static void igb_restore_vlan(struct igb_adapter *);
 167 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 168 static void igb_ping_all_vfs(struct igb_adapter *);
 169 static void igb_msg_task(struct igb_adapter *);
 170 static void igb_vmm_control(struct igb_adapter *);
 171 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 172 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 173 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 174 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 175                                int vf, u16 vlan, u8 qos);
 176 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 177 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 178                                    bool setting);
 179 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 180                                  struct ifla_vf_info *ivi);
 181 static void igb_check_vf_rate_limit(struct igb_adapter *);
 182
 183 #ifdef CONFIG_PCI_IOV
 184 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 185 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 186 #endif
 187
 188 #ifdef CONFIG_PM
 189 #ifdef CONFIG_PM_SLEEP
 190 static int igb_suspend(struct device *);
 191 #endif
 192 static int igb_resume(struct device *);
 193 #ifdef CONFIG_PM_RUNTIME
 194 static int igb_runtime_suspend(struct device *dev);
 195 static int igb_runtime_resume(struct device *dev);
 196 static int igb_runtime_idle(struct device *dev);
 197 #endif
 198 static const struct dev_pm_ops igb_pm_ops = {
 199         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 200         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 201                         igb_runtime_idle)
 202 };
 203 #endif
 204 static void igb_shutdown(struct pci_dev *);
 205 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 206 #ifdef CONFIG_IGB_DCA
 207 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 208 static struct notifier_block dca_notifier = {
 209         .notifier_call  = igb_notify_dca,
 210         .next           = NULL,
 211         .priority       = 0
 212 };
 213 #endif
 214 #ifdef CONFIG_NET_POLL_CONTROLLER
 215 /* for netdump / net console */
 216 static void igb_netpoll(struct net_device *);
 217 #endif
 218 #ifdef CONFIG_PCI_IOV
 219 static unsigned int max_vfs = 0;
 220 module_param(max_vfs, uint, 0);
 221 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
 222                  "per physical function");
 223 #endif /* CONFIG_PCI_IOV */
 224
 225 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 226                      pci_channel_state_t);
 227 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 228 static void igb_io_resume(struct pci_dev *);
 229
 230 static const struct pci_error_handlers igb_err_handler = {
 231         .error_detected = igb_io_error_detected,
 232         .slot_reset = igb_io_slot_reset,
 233         .resume = igb_io_resume,
 234 };
 235
 236 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 237
 238 static struct pci_driver igb_driver = {
 239         .name     = igb_driver_name,
 240         .id_table = igb_pci_tbl,
 241         .probe    = igb_probe,
 242         .remove   = igb_remove,
 243 #ifdef CONFIG_PM
 244         .driver.pm = &igb_pm_ops,
 245 #endif
 246         .shutdown = igb_shutdown,
 247         .sriov_configure = igb_pci_sriov_configure,
 248         .err_handler = &igb_err_handler
 249 };
 250
 251 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 252 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 253 MODULE_LICENSE("GPL");
 254 MODULE_VERSION(DRV_VERSION);
 255
 256 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 257 static int debug = -1;
 258 module_param(debug, int, 0);
 259 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 260
 261 struct igb_reg_info {
 262         u32 ofs;
 263         char *name;
 264 };
 265
 266 static const struct igb_reg_info igb_reg_info_tbl[] = {
 267
 268         /* General Registers */
 269         {E1000_CTRL, "CTRL"},
 270         {E1000_STATUS, "STATUS"},
 271         {E1000_CTRL_EXT, "CTRL_EXT"},
 272
 273         /* Interrupt Registers */
 274         {E1000_ICR, "ICR"},
 275
 276         /* RX Registers */
 277         {E1000_RCTL, "RCTL"},
 278         {E1000_RDLEN(0), "RDLEN"},
 279         {E1000_RDH(0), "RDH"},
 280         {E1000_RDT(0), "RDT"},
 281         {E1000_RXDCTL(0), "RXDCTL"},
 282         {E1000_RDBAL(0), "RDBAL"},
 283         {E1000_RDBAH(0), "RDBAH"},
 284
 285         /* TX Registers */
 286         {E1000_TCTL, "TCTL"},
 287         {E1000_TDBAL(0), "TDBAL"},
 288         {E1000_TDBAH(0), "TDBAH"},
 289         {E1000_TDLEN(0), "TDLEN"},
 290         {E1000_TDH(0), "TDH"},
 291         {E1000_TDT(0), "TDT"},
 292         {E1000_TXDCTL(0), "TXDCTL"},
 293         {E1000_TDFH, "TDFH"},
 294         {E1000_TDFT, "TDFT"},
 295         {E1000_TDFHS, "TDFHS"},
 296         {E1000_TDFPC, "TDFPC"},
 297
 298         /* List Terminator */
 299         {}
 300 };
 301
 302 /* igb_regdump - register printout routine */
 303 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 304 {
 305         int n = 0;
 306         char rname[16];
 307         u32 regs[8];
 308
 309         switch (reginfo->ofs) {
 310         case E1000_RDLEN(0):
 311                 for (n = 0; n < 4; n++)
 312                         regs[n] = rd32(E1000_RDLEN(n));
 313                 break;
 314         case E1000_RDH(0):
 315                 for (n = 0; n < 4; n++)
 316                         regs[n] = rd32(E1000_RDH(n));
 317                 break;
 318         case E1000_RDT(0):
 319                 for (n = 0; n < 4; n++)
 320                         regs[n] = rd32(E1000_RDT(n));
 321                 break;
 322         case E1000_RXDCTL(0):
 323                 for (n = 0; n < 4; n++)
 324                         regs[n] = rd32(E1000_RXDCTL(n));
 325                 break;
 326         case E1000_RDBAL(0):
 327                 for (n = 0; n < 4; n++)
 328                         regs[n] = rd32(E1000_RDBAL(n));
 329                 break;
 330         case E1000_RDBAH(0):
 331                 for (n = 0; n < 4; n++)
 332                         regs[n] = rd32(E1000_RDBAH(n));
 333                 break;
 334         case E1000_TDBAL(0):
 335                 for (n = 0; n < 4; n++)
 336                         regs[n] = rd32(E1000_RDBAL(n));
 337                 break;
 338         case E1000_TDBAH(0):
 339                 for (n = 0; n < 4; n++)
 340                         regs[n] = rd32(E1000_TDBAH(n));
 341                 break;
 342         case E1000_TDLEN(0):
 343                 for (n = 0; n < 4; n++)
 344                         regs[n] = rd32(E1000_TDLEN(n));
 345                 break;
 346         case E1000_TDH(0):
 347                 for (n = 0; n < 4; n++)
 348                         regs[n] = rd32(E1000_TDH(n));
 349                 break;
 350         case E1000_TDT(0):
 351                 for (n = 0; n < 4; n++)
 352                         regs[n] = rd32(E1000_TDT(n));
 353                 break;
 354         case E1000_TXDCTL(0):
 355                 for (n = 0; n < 4; n++)
 356                         regs[n] = rd32(E1000_TXDCTL(n));
 357                 break;
 358         default:
 359                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 360                 return;
 361         }
 362
 363         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 364         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 365                 regs[2], regs[3]);
 366 }
 367
 368 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 369 static void igb_dump(struct igb_adapter *adapter)
 370 {
 371         struct net_device *netdev = adapter->netdev;
 372         struct e1000_hw *hw = &adapter->hw;
 373         struct igb_reg_info *reginfo;
 374         struct igb_ring *tx_ring;
 375         union e1000_adv_tx_desc *tx_desc;
 376         struct my_u0 { u64 a; u64 b; } *u0;
 377         struct igb_ring *rx_ring;
 378         union e1000_adv_rx_desc *rx_desc;
 379         u32 staterr;
 380         u16 i, n;
 381
 382         if (!netif_msg_hw(adapter))
 383                 return;
 384
 385         /* Print netdevice Info */
 386         if (netdev) {
 387                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 388                 pr_info("Device Name     state            trans_start      "
 389                         "last_rx\n");
 390                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 391                         netdev->state, netdev->trans_start, netdev->last_rx);
 392         }
 393
 394         /* Print Registers */
 395         dev_info(&adapter->pdev->dev, "Register Dump\n");
 396         pr_info(" Register Name   Value\n");
 397         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 398              reginfo->name; reginfo++) {
 399                 igb_regdump(hw, reginfo);
 400         }
 401
 402         /* Print TX Ring Summary */
 403         if (!netdev || !netif_running(netdev))
 404                 goto exit;
 405
 406         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 407         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 408         for (n = 0; n < adapter->num_tx_queues; n++) {
 409                 struct igb_tx_buffer *buffer_info;
 410                 tx_ring = adapter->tx_ring[n];
 411                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 412                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 413                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 414                         (u64)dma_unmap_addr(buffer_info, dma),
 415                         dma_unmap_len(buffer_info, len),
 416                         buffer_info->next_to_watch,
 417                         (u64)buffer_info->time_stamp);
 418         }
 419
 420         /* Print TX Rings */
 421         if (!netif_msg_tx_done(adapter))
 422                 goto rx_ring_summary;
 423
 424         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 425
 426         /* Transmit Descriptor Formats
 427          *
 428          * Advanced Transmit Descriptor
 429          *   +--------------------------------------------------------------+
 430          * 0 |         Buffer Address [63:0]                                |
 431          *   +--------------------------------------------------------------+
 432          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 433          *   +--------------------------------------------------------------+
 434          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 435          */
 436
 437         for (n = 0; n < adapter->num_tx_queues; n++) {
 438                 tx_ring = adapter->tx_ring[n];
 439                 pr_info("------------------------------------\n");
 440                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 441                 pr_info("------------------------------------\n");
 442                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] "
 443                         "[bi->dma       ] leng  ntw timestamp        "
 444                         "bi->skb\n");
 445
 446                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 447                         const char *next_desc;
 448                         struct igb_tx_buffer *buffer_info;
 449                         tx_desc = IGB_TX_DESC(tx_ring, i);
 450                         buffer_info = &tx_ring->tx_buffer_info[i];
 451                         u0 = (struct my_u0 *)tx_desc;
 452                         if (i == tx_ring->next_to_use &&
 453                             i == tx_ring->next_to_clean)
 454                                 next_desc = " NTC/U";
 455                         else if (i == tx_ring->next_to_use)
 456                                 next_desc = " NTU";
 457                         else if (i == tx_ring->next_to_clean)
 458                                 next_desc = " NTC";
 459                         else
 460                                 next_desc = "";
 461
 462                         pr_info("T [0x%03X]    %016llX %016llX %016llX"
 463                                 " %04X  %p %016llX %p%s\n", i,
 464                                 le64_to_cpu(u0->a),
 465                                 le64_to_cpu(u0->b),
 466                                 (u64)dma_unmap_addr(buffer_info, dma),
 467                                 dma_unmap_len(buffer_info, len),
 468                                 buffer_info->next_to_watch,
 469                                 (u64)buffer_info->time_stamp,
 470                                 buffer_info->skb, next_desc);
 471
 472                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 473                                 print_hex_dump(KERN_INFO, "",
 474                                         DUMP_PREFIX_ADDRESS,
 475                                         16, 1, buffer_info->skb->data,
 476                                         dma_unmap_len(buffer_info, len),
 477                                         true);
 478                 }
 479         }
 480
 481         /* Print RX Rings Summary */
 482 rx_ring_summary:
 483         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 484         pr_info("Queue [NTU] [NTC]\n");
 485         for (n = 0; n < adapter->num_rx_queues; n++) {
 486                 rx_ring = adapter->rx_ring[n];
 487                 pr_info(" %5d %5X %5X\n",
 488                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 489         }
 490
 491         /* Print RX Rings */
 492         if (!netif_msg_rx_status(adapter))
 493                 goto exit;
 494
 495         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 496
 497         /* Advanced Receive Descriptor (Read) Format
 498          *    63                                           1        0
 499          *    +-----------------------------------------------------+
 500          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 501          *    +----------------------------------------------+------+
 502          *  8 |       Header Buffer Address [63:1]           |  DD  |
 503          *    +-----------------------------------------------------+
 504          *
 505          *
 506          * Advanced Receive Descriptor (Write-Back) Format
 507          *
 508          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 509          *   +------------------------------------------------------+
 510          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 511          *   | Checksum   Ident  |   |           |    | Type | Type |
 512          *   +------------------------------------------------------+
 513          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 514          *   +------------------------------------------------------+
 515          *   63       48 47    32 31            20 19               0
 516          */
 517
 518         for (n = 0; n < adapter->num_rx_queues; n++) {
 519                 rx_ring = adapter->rx_ring[n];
 520                 pr_info("------------------------------------\n");
 521                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 522                 pr_info("------------------------------------\n");
 523                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] "
 524                         "[bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 525                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] -----"
 526                         "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
 527
 528                 for (i = 0; i < rx_ring->count; i++) {
 529                         const char *next_desc;
 530                         struct igb_rx_buffer *buffer_info;
 531                         buffer_info = &rx_ring->rx_buffer_info[i];
 532                         rx_desc = IGB_RX_DESC(rx_ring, i);
 533                         u0 = (struct my_u0 *)rx_desc;
 534                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 535
 536                         if (i == rx_ring->next_to_use)
 537                                 next_desc = " NTU";
 538                         else if (i == rx_ring->next_to_clean)
 539                                 next_desc = " NTC";
 540                         else
 541                                 next_desc = "";
 542
 543                         if (staterr & E1000_RXD_STAT_DD) {
 544                                 /* Descriptor Done */
 545                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 546                                         "RWB", i,
 547                                         le64_to_cpu(u0->a),
 548                                         le64_to_cpu(u0->b),
 549                                         next_desc);
 550                         } else {
 551                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 552                                         "R  ", i,
 553                                         le64_to_cpu(u0->a),
 554                                         le64_to_cpu(u0->b),
 555                                         (u64)buffer_info->dma,
 556                                         next_desc);
 557
 558                                 if (netif_msg_pktdata(adapter) &&
 559                                     buffer_info->dma && buffer_info->page) {
 560                                         print_hex_dump(KERN_INFO, "",
 561                                           DUMP_PREFIX_ADDRESS,
 562                                           16, 1,
 563                                           page_address(buffer_info->page) +
 564                                                       buffer_info->page_offset,
 565                                           IGB_RX_BUFSZ, true);
 566                                 }
 567                         }
 568                 }
 569         }
 570
 571 exit:
 572         return;
 573 }
 574
 575 /**
 576  *  igb_get_i2c_data - Reads the I2C SDA data bit
 577  *  @hw: pointer to hardware structure
 578  *  @i2cctl: Current value of I2CCTL register
 579  *
 580  *  Returns the I2C data bit value
 581  **/
 582 static int igb_get_i2c_data(void *data)
 583 {
 584         struct igb_adapter *adapter = (struct igb_adapter *)data;
 585         struct e1000_hw *hw = &adapter->hw;
 586         s32 i2cctl = rd32(E1000_I2CPARAMS);
 587
 588         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
 589 }
 590
 591 /**
 592  *  igb_set_i2c_data - Sets the I2C data bit
 593  *  @data: pointer to hardware structure
 594  *  @state: I2C data value (0 or 1) to set
 595  *
 596  *  Sets the I2C data bit
 597  **/
 598 static void igb_set_i2c_data(void *data, int state)
 599 {
 600         struct igb_adapter *adapter = (struct igb_adapter *)data;
 601         struct e1000_hw *hw = &adapter->hw;
 602         s32 i2cctl = rd32(E1000_I2CPARAMS);
 603
 604         if (state)
 605                 i2cctl |= E1000_I2C_DATA_OUT;
 606         else
 607                 i2cctl &= ~E1000_I2C_DATA_OUT;
 608
 609         i2cctl &= ~E1000_I2C_DATA_OE_N;
 610         i2cctl |= E1000_I2C_CLK_OE_N;
 611         wr32(E1000_I2CPARAMS, i2cctl);
 612         wrfl();
 613
 614 }
 615
 616 /**
 617  *  igb_set_i2c_clk - Sets the I2C SCL clock
 618  *  @data: pointer to hardware structure
 619  *  @state: state to set clock
 620  *
 621  *  Sets the I2C clock line to state
 622  **/
 623 static void igb_set_i2c_clk(void *data, int state)
 624 {
 625         struct igb_adapter *adapter = (struct igb_adapter *)data;
 626         struct e1000_hw *hw = &adapter->hw;
 627         s32 i2cctl = rd32(E1000_I2CPARAMS);
 628
 629         if (state) {
 630                 i2cctl |= E1000_I2C_CLK_OUT;
 631                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 632         } else {
 633                 i2cctl &= ~E1000_I2C_CLK_OUT;
 634                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 635         }
 636         wr32(E1000_I2CPARAMS, i2cctl);
 637         wrfl();
 638 }
 639
 640 /**
 641  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 642  *  @data: pointer to hardware structure
 643  *
 644  *  Gets the I2C clock state
 645  **/
 646 static int igb_get_i2c_clk(void *data)
 647 {
 648         struct igb_adapter *adapter = (struct igb_adapter *)data;
 649         struct e1000_hw *hw = &adapter->hw;
 650         s32 i2cctl = rd32(E1000_I2CPARAMS);
 651
 652         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
 653 }
 654
 655 static const struct i2c_algo_bit_data igb_i2c_algo = {
 656         .setsda         = igb_set_i2c_data,
 657         .setscl         = igb_set_i2c_clk,
 658         .getsda         = igb_get_i2c_data,
 659         .getscl         = igb_get_i2c_clk,
 660         .udelay         = 5,
 661         .timeout        = 20,
 662 };
 663
 664 /**
 665  *  igb_get_hw_dev - return device
 666  *  @hw: pointer to hardware structure
 667  *
 668  *  used by hardware layer to print debugging information
 669  **/
 670 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 671 {
 672         struct igb_adapter *adapter = hw->back;
 673         return adapter->netdev;
 674 }
 675
 676 /**
 677  *  igb_init_module - Driver Registration Routine
 678  *
 679  *  igb_init_module is the first routine called when the driver is
 680  *  loaded. All it does is register with the PCI subsystem.
 681  **/
 682 static int __init igb_init_module(void)
 683 {
 684         int ret;
 685         pr_info("%s - version %s\n",
 686                igb_driver_string, igb_driver_version);
 687
 688         pr_info("%s\n", igb_copyright);
 689
 690 #ifdef CONFIG_IGB_DCA
 691         dca_register_notify(&dca_notifier);
 692 #endif
 693         ret = pci_register_driver(&igb_driver);
 694         return ret;
 695 }
 696
 697 module_init(igb_init_module);
 698
 699 /**
 700  *  igb_exit_module - Driver Exit Cleanup Routine
 701  *
 702  *  igb_exit_module is called just before the driver is removed
 703  *  from memory.
 704  **/
 705 static void __exit igb_exit_module(void)
 706 {
 707 #ifdef CONFIG_IGB_DCA
 708         dca_unregister_notify(&dca_notifier);
 709 #endif
 710         pci_unregister_driver(&igb_driver);
 711 }
 712
 713 module_exit(igb_exit_module);
 714
 715 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 716 /**
 717  *  igb_cache_ring_register - Descriptor ring to register mapping
 718  *  @adapter: board private structure to initialize
 719  *
 720  *  Once we know the feature-set enabled for the device, we'll cache
 721  *  the register offset the descriptor ring is assigned to.
 722  **/
 723 static void igb_cache_ring_register(struct igb_adapter *adapter)
 724 {
 725         int i = 0, j = 0;
 726         u32 rbase_offset = adapter->vfs_allocated_count;
 727
 728         switch (adapter->hw.mac.type) {
 729         case e1000_82576:
 730                 /* The queues are allocated for virtualization such that VF 0
 731                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 732                  * In order to avoid collision we start at the first free queue
 733                  * and continue consuming queues in the same sequence
 734                  */
 735                 if (adapter->vfs_allocated_count) {
 736                         for (; i < adapter->rss_queues; i++)
 737                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 738                                                                Q_IDX_82576(i);
 739                 }
 740         case e1000_82575:
 741         case e1000_82580:
 742         case e1000_i350:
 743         case e1000_i354:
 744         case e1000_i210:
 745         case e1000_i211:
 746         default:
 747                 for (; i < adapter->num_rx_queues; i++)
 748                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 749                 for (; j < adapter->num_tx_queues; j++)
 750                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 751                 break;
 752         }
 753 }
 754
 755 /**
 756  *  igb_write_ivar - configure ivar for given MSI-X vector
 757  *  @hw: pointer to the HW structure
 758  *  @msix_vector: vector number we are allocating to a given ring
 759  *  @index: row index of IVAR register to write within IVAR table
 760  *  @offset: column offset of in IVAR, should be multiple of 8
 761  *
 762  *  This function is intended to handle the writing of the IVAR register
 763  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 764  *  each containing an cause allocation for an Rx and Tx ring, and a
 765  *  variable number of rows depending on the number of queues supported.
 766  **/
 767 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 768                            int index, int offset)
 769 {
 770         u32 ivar = array_rd32(E1000_IVAR0, index);
 771
 772         /* clear any bits that are currently set */
 773         ivar &= ~((u32)0xFF << offset);
 774
 775         /* write vector and valid bit */
 776         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 777
 778         array_wr32(E1000_IVAR0, index, ivar);
 779 }
 780
 781 #define IGB_N0_QUEUE -1
 782 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 783 {
 784         struct igb_adapter *adapter = q_vector->adapter;
 785         struct e1000_hw *hw = &adapter->hw;
 786         int rx_queue = IGB_N0_QUEUE;
 787         int tx_queue = IGB_N0_QUEUE;
 788         u32 msixbm = 0;
 789
 790         if (q_vector->rx.ring)
 791                 rx_queue = q_vector->rx.ring->reg_idx;
 792         if (q_vector->tx.ring)
 793                 tx_queue = q_vector->tx.ring->reg_idx;
 794
 795         switch (hw->mac.type) {
 796         case e1000_82575:
 797                 /* The 82575 assigns vectors using a bitmask, which matches the
 798                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 799                  * or more queues to a vector, we write the appropriate bits
 800                  * into the MSIXBM register for that vector.
 801                  */
 802                 if (rx_queue > IGB_N0_QUEUE)
 803                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 804                 if (tx_queue > IGB_N0_QUEUE)
 805                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 806                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 807                         msixbm |= E1000_EIMS_OTHER;
 808                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 809                 q_vector->eims_value = msixbm;
 810                 break;
 811         case e1000_82576:
 812                 /* 82576 uses a table that essentially consists of 2 columns
 813                  * with 8 rows.  The ordering is column-major so we use the
 814                  * lower 3 bits as the row index, and the 4th bit as the
 815                  * column offset.
 816                  */
 817                 if (rx_queue > IGB_N0_QUEUE)
 818                         igb_write_ivar(hw, msix_vector,
 819                                        rx_queue & 0x7,
 820                                        (rx_queue & 0x8) << 1);
 821                 if (tx_queue > IGB_N0_QUEUE)
 822                         igb_write_ivar(hw, msix_vector,
 823                                        tx_queue & 0x7,
 824                                        ((tx_queue & 0x8) << 1) + 8);
 825                 q_vector->eims_value = 1 << msix_vector;
 826                 break;
 827         case e1000_82580:
 828         case e1000_i350:
 829         case e1000_i354:
 830         case e1000_i210:
 831         case e1000_i211:
 832                 /* On 82580 and newer adapters the scheme is similar to 82576
 833                  * however instead of ordering column-major we have things
 834                  * ordered row-major.  So we traverse the table by using
 835                  * bit 0 as the column offset, and the remaining bits as the
 836                  * row index.
 837                  */
 838                 if (rx_queue > IGB_N0_QUEUE)
 839                         igb_write_ivar(hw, msix_vector,
 840                                        rx_queue >> 1,
 841                                        (rx_queue & 0x1) << 4);
 842                 if (tx_queue > IGB_N0_QUEUE)
 843                         igb_write_ivar(hw, msix_vector,
 844                                        tx_queue >> 1,
 845                                        ((tx_queue & 0x1) << 4) + 8);
 846                 q_vector->eims_value = 1 << msix_vector;
 847                 break;
 848         default:
 849                 BUG();
 850                 break;
 851         }
 852
 853         /* add q_vector eims value to global eims_enable_mask */
 854         adapter->eims_enable_mask |= q_vector->eims_value;
 855
 856         /* configure q_vector to set itr on first interrupt */
 857         q_vector->set_itr = 1;
 858 }
 859
 860 /**
 861  *  igb_configure_msix - Configure MSI-X hardware
 862  *  @adapter: board private structure to initialize
 863  *
 864  *  igb_configure_msix sets up the hardware to properly
 865  *  generate MSI-X interrupts.
 866  **/
 867 static void igb_configure_msix(struct igb_adapter *adapter)
 868 {
 869         u32 tmp;
 870         int i, vector = 0;
 871         struct e1000_hw *hw = &adapter->hw;
 872
 873         adapter->eims_enable_mask = 0;
 874
 875         /* set vector for other causes, i.e. link changes */
 876         switch (hw->mac.type) {
 877         case e1000_82575:
 878                 tmp = rd32(E1000_CTRL_EXT);
 879                 /* enable MSI-X PBA support*/
 880                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 881
 882                 /* Auto-Mask interrupts upon ICR read. */
 883                 tmp |= E1000_CTRL_EXT_EIAME;
 884                 tmp |= E1000_CTRL_EXT_IRCA;
 885
 886                 wr32(E1000_CTRL_EXT, tmp);
 887
 888                 /* enable msix_other interrupt */
 889                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 890                 adapter->eims_other = E1000_EIMS_OTHER;
 891
 892                 break;
 893
 894         case e1000_82576:
 895         case e1000_82580:
 896         case e1000_i350:
 897         case e1000_i354:
 898         case e1000_i210:
 899         case e1000_i211:
 900                 /* Turn on MSI-X capability first, or our settings
 901                  * won't stick.  And it will take days to debug.
 902                  */
 903                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 904                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 905                      E1000_GPIE_NSICR);
 906
 907                 /* enable msix_other interrupt */
 908                 adapter->eims_other = 1 << vector;
 909                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 910
 911                 wr32(E1000_IVAR_MISC, tmp);
 912                 break;
 913         default:
 914                 /* do nothing, since nothing else supports MSI-X */
 915                 break;
 916         } /* switch (hw->mac.type) */
 917
 918         adapter->eims_enable_mask |= adapter->eims_other;
 919
 920         for (i = 0; i < adapter->num_q_vectors; i++)
 921                 igb_assign_vector(adapter->q_vector[i], vector++);
 922
 923         wrfl();
 924 }
 925
 926 /**
 927  *  igb_request_msix - Initialize MSI-X interrupts
 928  *  @adapter: board private structure to initialize
 929  *
 930  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 931  *  kernel.
 932  **/
 933 static int igb_request_msix(struct igb_adapter *adapter)
 934 {
 935         struct net_device *netdev = adapter->netdev;
 936         struct e1000_hw *hw = &adapter->hw;
 937         int i, err = 0, vector = 0, free_vector = 0;
 938
 939         err = request_irq(adapter->msix_entries[vector].vector,
 940                           igb_msix_other, 0, netdev->name, adapter);
 941         if (err)
 942                 goto err_out;
 943
 944         for (i = 0; i < adapter->num_q_vectors; i++) {
 945                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 946
 947                 vector++;
 948
 949                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 950
 951                 if (q_vector->rx.ring && q_vector->tx.ring)
 952                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 953                                 q_vector->rx.ring->queue_index);
 954                 else if (q_vector->tx.ring)
 955                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 956                                 q_vector->tx.ring->queue_index);
 957                 else if (q_vector->rx.ring)
 958                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 959                                 q_vector->rx.ring->queue_index);
 960                 else
 961                         sprintf(q_vector->name, "%s-unused", netdev->name);
 962
 963                 err = request_irq(adapter->msix_entries[vector].vector,
 964                                   igb_msix_ring, 0, q_vector->name,
 965                                   q_vector);
 966                 if (err)
 967                         goto err_free;
 968         }
 969
 970         igb_configure_msix(adapter);
 971         return 0;
 972
 973 err_free:
 974         /* free already assigned IRQs */
 975         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 976
 977         vector--;
 978         for (i = 0; i < vector; i++) {
 979                 free_irq(adapter->msix_entries[free_vector++].vector,
 980                          adapter->q_vector[i]);
 981         }
 982 err_out:
 983         return err;
 984 }
 985
 986 /**
 987  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 988  *  @adapter: board private structure to initialize
 989  *  @v_idx: Index of vector to be freed
 990  *
 991  *  This function frees the memory allocated to the q_vector.
 992  **/
 993 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 994 {
 995         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 996
 997         adapter->q_vector[v_idx] = NULL;
 998
 999         /* igb_get_stats64() might access the rings on this vector,
1000          * we must wait a grace period before freeing it.
1001          */
1002         kfree_rcu(q_vector, rcu);
1003 }
1004
1005 /**
1006  *  igb_reset_q_vector - Reset config for interrupt vector
1007  *  @adapter: board private structure to initialize
1008  *  @v_idx: Index of vector to be reset
1009  *
1010  *  If NAPI is enabled it will delete any references to the
1011  *  NAPI struct. This is preparation for igb_free_q_vector.
1012  **/
1013 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1014 {
1015         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1016
1017         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1018          * allocated. So, q_vector is NULL so we should stop here.
1019          */
1020         if (!q_vector)
1021                 return;
1022
1023         if (q_vector->tx.ring)
1024                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1025
1026         if (q_vector->rx.ring)
1027                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1028
1029         netif_napi_del(&q_vector->napi);
1030
1031 }
1032
1033 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1034 {
1035         int v_idx = adapter->num_q_vectors;
1036
1037         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1038                 pci_disable_msix(adapter->pdev);
1039         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1040                 pci_disable_msi(adapter->pdev);
1041
1042         while (v_idx--)
1043                 igb_reset_q_vector(adapter, v_idx);
1044 }
1045
1046 /**
1047  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1048  *  @adapter: board private structure to initialize
1049  *
1050  *  This function frees the memory allocated to the q_vectors.  In addition if
1051  *  NAPI is enabled it will delete any references to the NAPI struct prior
1052  *  to freeing the q_vector.
1053  **/
1054 static void igb_free_q_vectors(struct igb_adapter *adapter)
1055 {
1056         int v_idx = adapter->num_q_vectors;
1057
1058         adapter->num_tx_queues = 0;
1059         adapter->num_rx_queues = 0;
1060         adapter->num_q_vectors = 0;
1061
1062         while (v_idx--) {
1063                 igb_reset_q_vector(adapter, v_idx);
1064                 igb_free_q_vector(adapter, v_idx);
1065         }
1066 }
1067
1068 /**
1069  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1070  *  @adapter: board private structure to initialize
1071  *
1072  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1073  *  MSI-X interrupts allocated.
1074  */
1075 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1076 {
1077         igb_free_q_vectors(adapter);
1078         igb_reset_interrupt_capability(adapter);
1079 }
1080
1081 /**
1082  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1083  *  @adapter: board private structure to initialize
1084  *  @msix: boolean value of MSIX capability
1085  *
1086  *  Attempt to configure interrupts using the best available
1087  *  capabilities of the hardware and kernel.
1088  **/
1089 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1090 {
1091         int err;
1092         int numvecs, i;
1093
1094         if (!msix)
1095                 goto msi_only;
1096         adapter->flags |= IGB_FLAG_HAS_MSIX;
1097
1098         /* Number of supported queues. */
1099         adapter->num_rx_queues = adapter->rss_queues;
1100         if (adapter->vfs_allocated_count)
1101                 adapter->num_tx_queues = 1;
1102         else
1103                 adapter->num_tx_queues = adapter->rss_queues;
1104
1105         /* start with one vector for every Rx queue */
1106         numvecs = adapter->num_rx_queues;
1107
1108         /* if Tx handler is separate add 1 for every Tx queue */
1109         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1110                 numvecs += adapter->num_tx_queues;
1111
1112         /* store the number of vectors reserved for queues */
1113         adapter->num_q_vectors = numvecs;
1114
1115         /* add 1 vector for link status interrupts */
1116         numvecs++;
1117         for (i = 0; i < numvecs; i++)
1118                 adapter->msix_entries[i].entry = i;
1119
1120         err = pci_enable_msix(adapter->pdev,
1121                               adapter->msix_entries,
1122                               numvecs);
1123         if (err == 0)
1124                 return;
1125
1126         igb_reset_interrupt_capability(adapter);
1127
1128         /* If we can't do MSI-X, try MSI */
1129 msi_only:
1130         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1131 #ifdef CONFIG_PCI_IOV
1132         /* disable SR-IOV for non MSI-X configurations */
1133         if (adapter->vf_data) {
1134                 struct e1000_hw *hw = &adapter->hw;
1135                 /* disable iov and allow time for transactions to clear */
1136                 pci_disable_sriov(adapter->pdev);
1137                 msleep(500);
1138
1139                 kfree(adapter->vf_data);
1140                 adapter->vf_data = NULL;
1141                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1142                 wrfl();
1143                 msleep(100);
1144                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1145         }
1146 #endif
1147         adapter->vfs_allocated_count = 0;
1148         adapter->rss_queues = 1;
1149         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1150         adapter->num_rx_queues = 1;
1151         adapter->num_tx_queues = 1;
1152         adapter->num_q_vectors = 1;
1153         if (!pci_enable_msi(adapter->pdev))
1154                 adapter->flags |= IGB_FLAG_HAS_MSI;
1155 }
1156
1157 static void igb_add_ring(struct igb_ring *ring,
1158                          struct igb_ring_container *head)
1159 {
1160         head->ring = ring;
1161         head->count++;
1162 }
1163
1164 /**
1165  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1166  *  @adapter: board private structure to initialize
1167  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1168  *  @v_idx: index of vector in adapter struct
1169  *  @txr_count: total number of Tx rings to allocate
1170  *  @txr_idx: index of first Tx ring to allocate
1171  *  @rxr_count: total number of Rx rings to allocate
1172  *  @rxr_idx: index of first Rx ring to allocate
1173  *
1174  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1175  **/
1176 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1177                               int v_count, int v_idx,
1178                               int txr_count, int txr_idx,
1179                               int rxr_count, int rxr_idx)
1180 {
1181         struct igb_q_vector *q_vector;
1182         struct igb_ring *ring;
1183         int ring_count, size;
1184
1185         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1186         if (txr_count > 1 || rxr_count > 1)
1187                 return -ENOMEM;
1188
1189         ring_count = txr_count + rxr_count;
1190         size = sizeof(struct igb_q_vector) +
1191                (sizeof(struct igb_ring) * ring_count);
1192
1193         /* allocate q_vector and rings */
1194         q_vector = adapter->q_vector[v_idx];
1195         if (!q_vector)
1196                 q_vector = kzalloc(size, GFP_KERNEL);
1197         if (!q_vector)
1198                 return -ENOMEM;
1199
1200         /* initialize NAPI */
1201         netif_napi_add(adapter->netdev, &q_vector->napi,
1202                        igb_poll, 64);
1203
1204         /* tie q_vector and adapter together */
1205         adapter->q_vector[v_idx] = q_vector;
1206         q_vector->adapter = adapter;
1207
1208         /* initialize work limits */
1209         q_vector->tx.work_limit = adapter->tx_work_limit;
1210
1211         /* initialize ITR configuration */
1212         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1213         q_vector->itr_val = IGB_START_ITR;
1214
1215         /* initialize pointer to rings */
1216         ring = q_vector->ring;
1217
1218         /* intialize ITR */
1219         if (rxr_count) {
1220                 /* rx or rx/tx vector */
1221                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1222                         q_vector->itr_val = adapter->rx_itr_setting;
1223         } else {
1224                 /* tx only vector */
1225                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1226                         q_vector->itr_val = adapter->tx_itr_setting;
1227         }
1228
1229         if (txr_count) {
1230                 /* assign generic ring traits */
1231                 ring->dev = &adapter->pdev->dev;
1232                 ring->netdev = adapter->netdev;
1233
1234                 /* configure backlink on ring */
1235                 ring->q_vector = q_vector;
1236
1237                 /* update q_vector Tx values */
1238                 igb_add_ring(ring, &q_vector->tx);
1239
1240                 /* For 82575, context index must be unique per ring. */
1241                 if (adapter->hw.mac.type == e1000_82575)
1242                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1243
1244                 /* apply Tx specific ring traits */
1245                 ring->count = adapter->tx_ring_count;
1246                 ring->queue_index = txr_idx;
1247
1248                 u64_stats_init(&ring->tx_syncp);
1249                 u64_stats_init(&ring->tx_syncp2);
1250
1251                 /* assign ring to adapter */
1252                 adapter->tx_ring[txr_idx] = ring;
1253
1254                 /* push pointer to next ring */
1255                 ring++;
1256         }
1257
1258         if (rxr_count) {
1259                 /* assign generic ring traits */
1260                 ring->dev = &adapter->pdev->dev;
1261                 ring->netdev = adapter->netdev;
1262
1263                 /* configure backlink on ring */
1264                 ring->q_vector = q_vector;
1265
1266                 /* update q_vector Rx values */
1267                 igb_add_ring(ring, &q_vector->rx);
1268
1269                 /* set flag indicating ring supports SCTP checksum offload */
1270                 if (adapter->hw.mac.type >= e1000_82576)
1271                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1272
1273                 /*
1274                  * On i350, i354, i210, and i211, loopback VLAN packets
1275                  * have the tag byte-swapped.
1276                  */
1277                 if (adapter->hw.mac.type >= e1000_i350)
1278                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1279
1280                 /* apply Rx specific ring traits */
1281                 ring->count = adapter->rx_ring_count;
1282                 ring->queue_index = rxr_idx;
1283
1284                 u64_stats_init(&ring->rx_syncp);
1285
1286                 /* assign ring to adapter */
1287                 adapter->rx_ring[rxr_idx] = ring;
1288         }
1289
1290         return 0;
1291 }
1292
1293
1294 /**
1295  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1296  *  @adapter: board private structure to initialize
1297  *
1298  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1299  *  return -ENOMEM.
1300  **/
1301 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1302 {
1303         int q_vectors = adapter->num_q_vectors;
1304         int rxr_remaining = adapter->num_rx_queues;
1305         int txr_remaining = adapter->num_tx_queues;
1306         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1307         int err;
1308
1309         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1310                 for (; rxr_remaining; v_idx++) {
1311                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1312                                                  0, 0, 1, rxr_idx);
1313
1314                         if (err)
1315                                 goto err_out;
1316
1317                         /* update counts and index */
1318                         rxr_remaining--;
1319                         rxr_idx++;
1320                 }
1321         }
1322
1323         for (; v_idx < q_vectors; v_idx++) {
1324                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1325                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1326                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1327                                          tqpv, txr_idx, rqpv, rxr_idx);
1328
1329                 if (err)
1330                         goto err_out;
1331
1332                 /* update counts and index */
1333                 rxr_remaining -= rqpv;
1334                 txr_remaining -= tqpv;
1335                 rxr_idx++;
1336                 txr_idx++;
1337         }
1338
1339         return 0;
1340
1341 err_out:
1342         adapter->num_tx_queues = 0;
1343         adapter->num_rx_queues = 0;
1344         adapter->num_q_vectors = 0;
1345
1346         while (v_idx--)
1347                 igb_free_q_vector(adapter, v_idx);
1348
1349         return -ENOMEM;
1350 }
1351
1352 /**
1353  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1354  *  @adapter: board private structure to initialize
1355  *  @msix: boolean value of MSIX capability
1356  *
1357  *  This function initializes the interrupts and allocates all of the queues.
1358  **/
1359 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1360 {
1361         struct pci_dev *pdev = adapter->pdev;
1362         int err;
1363
1364         igb_set_interrupt_capability(adapter, msix);
1365
1366         err = igb_alloc_q_vectors(adapter);
1367         if (err) {
1368                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1369                 goto err_alloc_q_vectors;
1370         }
1371
1372         igb_cache_ring_register(adapter);
1373
1374         return 0;
1375
1376 err_alloc_q_vectors:
1377         igb_reset_interrupt_capability(adapter);
1378         return err;
1379 }
1380
1381 /**
1382  *  igb_request_irq - initialize interrupts
1383  *  @adapter: board private structure to initialize
1384  *
1385  *  Attempts to configure interrupts using the best available
1386  *  capabilities of the hardware and kernel.
1387  **/
1388 static int igb_request_irq(struct igb_adapter *adapter)
1389 {
1390         struct net_device *netdev = adapter->netdev;
1391         struct pci_dev *pdev = adapter->pdev;
1392         int err = 0;
1393
1394         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1395                 err = igb_request_msix(adapter);
1396                 if (!err)
1397                         goto request_done;
1398                 /* fall back to MSI */
1399                 igb_free_all_tx_resources(adapter);
1400                 igb_free_all_rx_resources(adapter);
1401
1402                 igb_clear_interrupt_scheme(adapter);
1403                 err = igb_init_interrupt_scheme(adapter, false);
1404                 if (err)
1405                         goto request_done;
1406
1407                 igb_setup_all_tx_resources(adapter);
1408                 igb_setup_all_rx_resources(adapter);
1409                 igb_configure(adapter);
1410         }
1411
1412         igb_assign_vector(adapter->q_vector[0], 0);
1413
1414         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1415                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1416                                   netdev->name, adapter);
1417                 if (!err)
1418                         goto request_done;
1419
1420                 /* fall back to legacy interrupts */
1421                 igb_reset_interrupt_capability(adapter);
1422                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1423         }
1424
1425         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1426                           netdev->name, adapter);
1427
1428         if (err)
1429                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1430                         err);
1431
1432 request_done:
1433         return err;
1434 }
1435
1436 static void igb_free_irq(struct igb_adapter *adapter)
1437 {
1438         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1439                 int vector = 0, i;
1440
1441                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1442
1443                 for (i = 0; i < adapter->num_q_vectors; i++)
1444                         free_irq(adapter->msix_entries[vector++].vector,
1445                                  adapter->q_vector[i]);
1446         } else {
1447                 free_irq(adapter->pdev->irq, adapter);
1448         }
1449 }
1450
1451 /**
1452  *  igb_irq_disable - Mask off interrupt generation on the NIC
1453  *  @adapter: board private structure
1454  **/
1455 static void igb_irq_disable(struct igb_adapter *adapter)
1456 {
1457         struct e1000_hw *hw = &adapter->hw;
1458
1459         /* we need to be careful when disabling interrupts.  The VFs are also
1460          * mapped into these registers and so clearing the bits can cause
1461          * issues on the VF drivers so we only need to clear what we set
1462          */
1463         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1464                 u32 regval = rd32(E1000_EIAM);
1465                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1466                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1467                 regval = rd32(E1000_EIAC);
1468                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1469         }
1470
1471         wr32(E1000_IAM, 0);
1472         wr32(E1000_IMC, ~0);
1473         wrfl();
1474         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1475                 int i;
1476                 for (i = 0; i < adapter->num_q_vectors; i++)
1477                         synchronize_irq(adapter->msix_entries[i].vector);
1478         } else {
1479                 synchronize_irq(adapter->pdev->irq);
1480         }
1481 }
1482
1483 /**
1484  *  igb_irq_enable - Enable default interrupt generation settings
1485  *  @adapter: board private structure
1486  **/
1487 static void igb_irq_enable(struct igb_adapter *adapter)
1488 {
1489         struct e1000_hw *hw = &adapter->hw;
1490
1491         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1492                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1493                 u32 regval = rd32(E1000_EIAC);
1494                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1495                 regval = rd32(E1000_EIAM);
1496                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1497                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1498                 if (adapter->vfs_allocated_count) {
1499                         wr32(E1000_MBVFIMR, 0xFF);
1500                         ims |= E1000_IMS_VMMB;
1501                 }
1502                 wr32(E1000_IMS, ims);
1503         } else {
1504                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1505                                 E1000_IMS_DRSTA);
1506                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1507                                 E1000_IMS_DRSTA);
1508         }
1509 }
1510
1511 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1512 {
1513         struct e1000_hw *hw = &adapter->hw;
1514         u16 vid = adapter->hw.mng_cookie.vlan_id;
1515         u16 old_vid = adapter->mng_vlan_id;
1516
1517         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1518                 /* add VID to filter table */
1519                 igb_vfta_set(hw, vid, true);
1520                 adapter->mng_vlan_id = vid;
1521         } else {
1522                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1523         }
1524
1525         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1526             (vid != old_vid) &&
1527             !test_bit(old_vid, adapter->active_vlans)) {
1528                 /* remove VID from filter table */
1529                 igb_vfta_set(hw, old_vid, false);
1530         }
1531 }
1532
1533 /**
1534  *  igb_release_hw_control - release control of the h/w to f/w
1535  *  @adapter: address of board private structure
1536  *
1537  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1538  *  For ASF and Pass Through versions of f/w this means that the
1539  *  driver is no longer loaded.
1540  **/
1541 static void igb_release_hw_control(struct igb_adapter *adapter)
1542 {
1543         struct e1000_hw *hw = &adapter->hw;
1544         u32 ctrl_ext;
1545
1546         /* Let firmware take over control of h/w */
1547         ctrl_ext = rd32(E1000_CTRL_EXT);
1548         wr32(E1000_CTRL_EXT,
1549                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1550 }
1551
1552 /**
1553  *  igb_get_hw_control - get control of the h/w from f/w
1554  *  @adapter: address of board private structure
1555  *
1556  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1557  *  For ASF and Pass Through versions of f/w this means that
1558  *  the driver is loaded.
1559  **/
1560 static void igb_get_hw_control(struct igb_adapter *adapter)
1561 {
1562         struct e1000_hw *hw = &adapter->hw;
1563         u32 ctrl_ext;
1564
1565         /* Let firmware know the driver has taken over */
1566         ctrl_ext = rd32(E1000_CTRL_EXT);
1567         wr32(E1000_CTRL_EXT,
1568                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1569 }
1570
1571 /**
1572  *  igb_configure - configure the hardware for RX and TX
1573  *  @adapter: private board structure
1574  **/
1575 static void igb_configure(struct igb_adapter *adapter)
1576 {
1577         struct net_device *netdev = adapter->netdev;
1578         int i;
1579
1580         igb_get_hw_control(adapter);
1581         igb_set_rx_mode(netdev);
1582
1583         igb_restore_vlan(adapter);
1584
1585         igb_setup_tctl(adapter);
1586         igb_setup_mrqc(adapter);
1587         igb_setup_rctl(adapter);
1588
1589         igb_configure_tx(adapter);
1590         igb_configure_rx(adapter);
1591
1592         igb_rx_fifo_flush_82575(&adapter->hw);
1593
1594         /* call igb_desc_unused which always leaves
1595          * at least 1 descriptor unused to make sure
1596          * next_to_use != next_to_clean
1597          */
1598         for (i = 0; i < adapter->num_rx_queues; i++) {
1599                 struct igb_ring *ring = adapter->rx_ring[i];
1600                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1601         }
1602 }
1603
1604 /**
1605  *  igb_power_up_link - Power up the phy/serdes link
1606  *  @adapter: address of board private structure
1607  **/
1608 void igb_power_up_link(struct igb_adapter *adapter)
1609 {
1610         igb_reset_phy(&adapter->hw);
1611
1612         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1613                 igb_power_up_phy_copper(&adapter->hw);
1614         else
1615                 igb_power_up_serdes_link_82575(&adapter->hw);
1616 }
1617
1618 /**
1619  *  igb_power_down_link - Power down the phy/serdes link
1620  *  @adapter: address of board private structure
1621  */
1622 static void igb_power_down_link(struct igb_adapter *adapter)
1623 {
1624         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1625                 igb_power_down_phy_copper_82575(&adapter->hw);
1626         else
1627                 igb_shutdown_serdes_link_82575(&adapter->hw);
1628 }
1629
1630 /**
1631  * Detect and switch function for Media Auto Sense
1632  * @adapter: address of the board private structure
1633  **/
1634 static void igb_check_swap_media(struct igb_adapter *adapter)
1635 {
1636         struct e1000_hw *hw = &adapter->hw;
1637         u32 ctrl_ext, connsw;
1638         bool swap_now = false;
1639
1640         ctrl_ext = rd32(E1000_CTRL_EXT);
1641         connsw = rd32(E1000_CONNSW);
1642
1643         /* need to live swap if current media is copper and we have fiber/serdes
1644          * to go to.
1645          */
1646
1647         if ((hw->phy.media_type == e1000_media_type_copper) &&
1648             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1649                 swap_now = true;
1650         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1651                 /* copper signal takes time to appear */
1652                 if (adapter->copper_tries < 4) {
1653                         adapter->copper_tries++;
1654                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1655                         wr32(E1000_CONNSW, connsw);
1656                         return;
1657                 } else {
1658                         adapter->copper_tries = 0;
1659                         if ((connsw & E1000_CONNSW_PHYSD) &&
1660                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1661                                 swap_now = true;
1662                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1663                                 wr32(E1000_CONNSW, connsw);
1664                         }
1665                 }
1666         }
1667
1668         if (!swap_now)
1669                 return;
1670
1671         switch (hw->phy.media_type) {
1672         case e1000_media_type_copper:
1673                 netdev_info(adapter->netdev,
1674                         "MAS: changing media to fiber/serdes\n");
1675                 ctrl_ext |=
1676                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1677                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1678                 adapter->copper_tries = 0;
1679                 break;
1680         case e1000_media_type_internal_serdes:
1681         case e1000_media_type_fiber:
1682                 netdev_info(adapter->netdev,
1683                         "MAS: changing media to copper\n");
1684                 ctrl_ext &=
1685                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1686                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1687                 break;
1688         default:
1689                 /* shouldn't get here during regular operation */
1690                 netdev_err(adapter->netdev,
1691                         "AMS: Invalid media type found, returning\n");
1692                 break;
1693         }
1694         wr32(E1000_CTRL_EXT, ctrl_ext);
1695 }
1696
1697 /**
1698  *  igb_up - Open the interface and prepare it to handle traffic
1699  *  @adapter: board private structure
1700  **/
1701 int igb_up(struct igb_adapter *adapter)
1702 {
1703         struct e1000_hw *hw = &adapter->hw;
1704         int i;
1705
1706         /* hardware has been reset, we need to reload some things */
1707         igb_configure(adapter);
1708
1709         clear_bit(__IGB_DOWN, &adapter->state);
1710
1711         for (i = 0; i < adapter->num_q_vectors; i++)
1712                 napi_enable(&(adapter->q_vector[i]->napi));
1713
1714         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1715                 igb_configure_msix(adapter);
1716         else
1717                 igb_assign_vector(adapter->q_vector[0], 0);
1718
1719         /* Clear any pending interrupts. */
1720         rd32(E1000_ICR);
1721         igb_irq_enable(adapter);
1722
1723         /* notify VFs that reset has been completed */
1724         if (adapter->vfs_allocated_count) {
1725                 u32 reg_data = rd32(E1000_CTRL_EXT);
1726                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1727                 wr32(E1000_CTRL_EXT, reg_data);
1728         }
1729
1730         netif_tx_start_all_queues(adapter->netdev);
1731
1732         /* start the watchdog. */
1733         hw->mac.get_link_status = 1;
1734         schedule_work(&adapter->watchdog_task);
1735
1736         return 0;
1737 }
1738
1739 void igb_down(struct igb_adapter *adapter)
1740 {
1741         struct net_device *netdev = adapter->netdev;
1742         struct e1000_hw *hw = &adapter->hw;
1743         u32 tctl, rctl;
1744         int i;
1745
1746         /* signal that we're down so the interrupt handler does not
1747          * reschedule our watchdog timer
1748          */
1749         set_bit(__IGB_DOWN, &adapter->state);
1750
1751         /* disable receives in the hardware */
1752         rctl = rd32(E1000_RCTL);
1753         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1754         /* flush and sleep below */
1755
1756         netif_tx_stop_all_queues(netdev);
1757
1758         /* disable transmits in the hardware */
1759         tctl = rd32(E1000_TCTL);
1760         tctl &= ~E1000_TCTL_EN;
1761         wr32(E1000_TCTL, tctl);
1762         /* flush both disables and wait for them to finish */
1763         wrfl();
1764         msleep(10);
1765
1766         igb_irq_disable(adapter);
1767
1768         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1769
1770         for (i = 0; i < adapter->num_q_vectors; i++) {
1771                 napi_synchronize(&(adapter->q_vector[i]->napi));
1772                 napi_disable(&(adapter->q_vector[i]->napi));
1773         }
1774
1775
1776         del_timer_sync(&adapter->watchdog_timer);
1777         del_timer_sync(&adapter->phy_info_timer);
1778
1779         netif_carrier_off(netdev);
1780
1781         /* record the stats before reset*/
1782         spin_lock(&adapter->stats64_lock);
1783         igb_update_stats(adapter, &adapter->stats64);
1784         spin_unlock(&adapter->stats64_lock);
1785
1786         adapter->link_speed = 0;
1787         adapter->link_duplex = 0;
1788
1789         if (!pci_channel_offline(adapter->pdev))
1790                 igb_reset(adapter);
1791         igb_clean_all_tx_rings(adapter);
1792         igb_clean_all_rx_rings(adapter);
1793 #ifdef CONFIG_IGB_DCA
1794
1795         /* since we reset the hardware DCA settings were cleared */
1796         igb_setup_dca(adapter);
1797 #endif
1798 }
1799
1800 void igb_reinit_locked(struct igb_adapter *adapter)
1801 {
1802         WARN_ON(in_interrupt());
1803         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1804                 msleep(1);
1805         igb_down(adapter);
1806         igb_up(adapter);
1807         clear_bit(__IGB_RESETTING, &adapter->state);
1808 }
1809
1810 /** igb_enable_mas - Media Autosense re-enable after swap
1811  *
1812  * @adapter: adapter struct
1813  **/
1814 static s32 igb_enable_mas(struct igb_adapter *adapter)
1815 {
1816         struct e1000_hw *hw = &adapter->hw;
1817         u32 connsw;
1818         s32 ret_val = 0;
1819
1820         connsw = rd32(E1000_CONNSW);
1821         if (!(hw->phy.media_type == e1000_media_type_copper))
1822                 return ret_val;
1823
1824         /* configure for SerDes media detect */
1825         if (!(connsw & E1000_CONNSW_SERDESD)) {
1826                 connsw |= E1000_CONNSW_ENRGSRC;
1827                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1828                 wr32(E1000_CONNSW, connsw);
1829                 wrfl();
1830         } else if (connsw & E1000_CONNSW_SERDESD) {
1831                 /* already SerDes, no need to enable anything */
1832                 return ret_val;
1833         } else {
1834                 netdev_info(adapter->netdev,
1835                         "MAS: Unable to configure feature, disabling..\n");
1836                 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1837         }
1838         return ret_val;
1839 }
1840
1841 void igb_reset(struct igb_adapter *adapter)
1842 {
1843         struct pci_dev *pdev = adapter->pdev;
1844         struct e1000_hw *hw = &adapter->hw;
1845         struct e1000_mac_info *mac = &hw->mac;
1846         struct e1000_fc_info *fc = &hw->fc;
1847         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1848
1849         /* Repartition Pba for greater than 9k mtu
1850          * To take effect CTRL.RST is required.
1851          */
1852         switch (mac->type) {
1853         case e1000_i350:
1854         case e1000_i354:
1855         case e1000_82580:
1856                 pba = rd32(E1000_RXPBS);
1857                 pba = igb_rxpbs_adjust_82580(pba);
1858                 break;
1859         case e1000_82576:
1860                 pba = rd32(E1000_RXPBS);
1861                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1862                 break;
1863         case e1000_82575:
1864         case e1000_i210:
1865         case e1000_i211:
1866         default:
1867                 pba = E1000_PBA_34K;
1868                 break;
1869         }
1870
1871         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1872             (mac->type < e1000_82576)) {
1873                 /* adjust PBA for jumbo frames */
1874                 wr32(E1000_PBA, pba);
1875
1876                 /* To maintain wire speed transmits, the Tx FIFO should be
1877                  * large enough to accommodate two full transmit packets,
1878                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1879                  * the Rx FIFO should be large enough to accommodate at least
1880                  * one full receive packet and is similarly rounded up and
1881                  * expressed in KB.
1882                  */
1883                 pba = rd32(E1000_PBA);
1884                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1885                 tx_space = pba >> 16;
1886                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1887                 pba &= 0xffff;
1888                 /* the Tx fifo also stores 16 bytes of information about the Tx
1889                  * but don't include ethernet FCS because hardware appends it
1890                  */
1891                 min_tx_space = (adapter->max_frame_size +
1892                                 sizeof(union e1000_adv_tx_desc) -
1893                                 ETH_FCS_LEN) * 2;
1894                 min_tx_space = ALIGN(min_tx_space, 1024);
1895                 min_tx_space >>= 10;
1896                 /* software strips receive CRC, so leave room for it */
1897                 min_rx_space = adapter->max_frame_size;
1898                 min_rx_space = ALIGN(min_rx_space, 1024);
1899                 min_rx_space >>= 10;
1900
1901                 /* If current Tx allocation is less than the min Tx FIFO size,
1902                  * and the min Tx FIFO size is less than the current Rx FIFO
1903                  * allocation, take space away from current Rx allocation
1904                  */
1905                 if (tx_space < min_tx_space &&
1906                     ((min_tx_space - tx_space) < pba)) {
1907                         pba = pba - (min_tx_space - tx_space);
1908
1909                         /* if short on Rx space, Rx wins and must trump Tx
1910                          * adjustment
1911                          */
1912                         if (pba < min_rx_space)
1913                                 pba = min_rx_space;
1914                 }
1915                 wr32(E1000_PBA, pba);
1916         }
1917
1918         /* flow control settings */
1919         /* The high water mark must be low enough to fit one full frame
1920          * (or the size used for early receive) above it in the Rx FIFO.
1921          * Set it to the lower of:
1922          * - 90% of the Rx FIFO size, or
1923          * - the full Rx FIFO size minus one full frame
1924          */
1925         hwm = min(((pba << 10) * 9 / 10),
1926                         ((pba << 10) - 2 * adapter->max_frame_size));
1927
1928         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1929         fc->low_water = fc->high_water - 16;
1930         fc->pause_time = 0xFFFF;
1931         fc->send_xon = 1;
1932         fc->current_mode = fc->requested_mode;
1933
1934         /* disable receive for all VFs and wait one second */
1935         if (adapter->vfs_allocated_count) {
1936                 int i;
1937                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1938                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1939
1940                 /* ping all the active vfs to let them know we are going down */
1941                 igb_ping_all_vfs(adapter);
1942
1943                 /* disable transmits and receives */
1944                 wr32(E1000_VFRE, 0);
1945                 wr32(E1000_VFTE, 0);
1946         }
1947
1948         /* Allow time for pending master requests to run */
1949         hw->mac.ops.reset_hw(hw);
1950         wr32(E1000_WUC, 0);
1951
1952         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1953                 /* need to resetup here after media swap */
1954                 adapter->ei.get_invariants(hw);
1955                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1956         }
1957         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
1958                 if (igb_enable_mas(adapter))
1959                         dev_err(&pdev->dev,
1960                                 "Error enabling Media Auto Sense\n");
1961         }
1962         if (hw->mac.ops.init_hw(hw))
1963                 dev_err(&pdev->dev, "Hardware Error\n");
1964
1965         /* Flow control settings reset on hardware reset, so guarantee flow
1966          * control is off when forcing speed.
1967          */
1968         if (!hw->mac.autoneg)
1969                 igb_force_mac_fc(hw);
1970
1971         igb_init_dmac(adapter, pba);
1972 #ifdef CONFIG_IGB_HWMON
1973         /* Re-initialize the thermal sensor on i350 devices. */
1974         if (!test_bit(__IGB_DOWN, &adapter->state)) {
1975                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1976                         /* If present, re-initialize the external thermal sensor
1977                          * interface.
1978                          */
1979                         if (adapter->ets)
1980                                 mac->ops.init_thermal_sensor_thresh(hw);
1981                 }
1982         }
1983 #endif
1984         if (!netif_running(adapter->netdev))
1985                 igb_power_down_link(adapter);
1986
1987         igb_update_mng_vlan(adapter);
1988
1989         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1990         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1991
1992         /* Re-enable PTP, where applicable. */
1993         igb_ptp_reset(adapter);
1994
1995         igb_get_phy_info(hw);
1996 }
1997
1998 static netdev_features_t igb_fix_features(struct net_device *netdev,
1999         netdev_features_t features)
2000 {
2001         /* Since there is no support for separate Rx/Tx vlan accel
2002          * enable/disable make sure Tx flag is always in same state as Rx.
2003          */
2004         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2005                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2006         else
2007                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2008
2009         return features;
2010 }
2011
2012 static int igb_set_features(struct net_device *netdev,
2013         netdev_features_t features)
2014 {
2015         netdev_features_t changed = netdev->features ^ features;
2016         struct igb_adapter *adapter = netdev_priv(netdev);
2017
2018         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2019                 igb_vlan_mode(netdev, features);
2020
2021         if (!(changed & NETIF_F_RXALL))
2022                 return 0;
2023
2024         netdev->features = features;
2025
2026         if (netif_running(netdev))
2027                 igb_reinit_locked(adapter);
2028         else
2029                 igb_reset(adapter);
2030
2031         return 0;
2032 }
2033
2034 static const struct net_device_ops igb_netdev_ops = {
2035         .ndo_open               = igb_open,
2036         .ndo_stop               = igb_close,
2037         .ndo_start_xmit         = igb_xmit_frame,
2038         .ndo_get_stats64        = igb_get_stats64,
2039         .ndo_set_rx_mode        = igb_set_rx_mode,
2040         .ndo_set_mac_address    = igb_set_mac,
2041         .ndo_change_mtu         = igb_change_mtu,
2042         .ndo_do_ioctl           = igb_ioctl,
2043         .ndo_tx_timeout         = igb_tx_timeout,
2044         .ndo_validate_addr      = eth_validate_addr,
2045         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2046         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2047         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2048         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2049         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2050         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2051         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2052 #ifdef CONFIG_NET_POLL_CONTROLLER
2053         .ndo_poll_controller    = igb_netpoll,
2054 #endif
2055         .ndo_fix_features       = igb_fix_features,
2056         .ndo_set_features       = igb_set_features,
2057 };
2058
2059 /**
2060  * igb_set_fw_version - Configure version string for ethtool
2061  * @adapter: adapter struct
2062  **/
2063 void igb_set_fw_version(struct igb_adapter *adapter)
2064 {
2065         struct e1000_hw *hw = &adapter->hw;
2066         struct e1000_fw_version fw;
2067
2068         igb_get_fw_version(hw, &fw);
2069
2070         switch (hw->mac.type) {
2071         case e1000_i210:
2072         case e1000_i211:
2073                 if (!(igb_get_flash_presence_i210(hw))) {
2074                         snprintf(adapter->fw_version,
2075                                  sizeof(adapter->fw_version),
2076                                  "%2d.%2d-%d",
2077                                  fw.invm_major, fw.invm_minor,
2078                                  fw.invm_img_type);
2079                         break;
2080                 }
2081                 /* fall through */
2082         default:
2083                 /* if option is rom valid, display its version too */
2084                 if (fw.or_valid) {
2085                         snprintf(adapter->fw_version,
2086                                  sizeof(adapter->fw_version),
2087                                  "%d.%d, 0x%08x, %d.%d.%d",
2088                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2089                                  fw.or_major, fw.or_build, fw.or_patch);
2090                 /* no option rom */
2091                 } else if (fw.etrack_id != 0X0000) {
2092                         snprintf(adapter->fw_version,
2093                             sizeof(adapter->fw_version),
2094                             "%d.%d, 0x%08x",
2095                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2096                 } else {
2097                 snprintf(adapter->fw_version,
2098                     sizeof(adapter->fw_version),
2099                     "%d.%d.%d",
2100                     fw.eep_major, fw.eep_minor, fw.eep_build);
2101                 }
2102                 break;
2103         }
2104         return;
2105 }
2106
2107 /**
2108  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2109  *
2110  * @adapter: adapter struct
2111  **/
2112 static void igb_init_mas(struct igb_adapter *adapter)
2113 {
2114         struct e1000_hw *hw = &adapter->hw;
2115         u16 eeprom_data;
2116
2117         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2118         switch (hw->bus.func) {
2119         case E1000_FUNC_0:
2120                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2121                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2122                         netdev_info(adapter->netdev,
2123                                 "MAS: Enabling Media Autosense for port %d\n",
2124                                 hw->bus.func);
2125                 }
2126                 break;
2127         case E1000_FUNC_1:
2128                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2129                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2130                         netdev_info(adapter->netdev,
2131                                 "MAS: Enabling Media Autosense for port %d\n",
2132                                 hw->bus.func);
2133                 }
2134                 break;
2135         case E1000_FUNC_2:
2136                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2137                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2138                         netdev_info(adapter->netdev,
2139                                 "MAS: Enabling Media Autosense for port %d\n",
2140                                 hw->bus.func);
2141                 }
2142                 break;
2143         case E1000_FUNC_3:
2144                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2145                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2146                         netdev_info(adapter->netdev,
2147                                 "MAS: Enabling Media Autosense for port %d\n",
2148                                 hw->bus.func);
2149                 }
2150                 break;
2151         default:
2152                 /* Shouldn't get here */
2153                 netdev_err(adapter->netdev,
2154                         "MAS: Invalid port configuration, returning\n");
2155                 break;
2156         }
2157 }
2158
2159 /**
2160  *  igb_init_i2c - Init I2C interface
2161  *  @adapter: pointer to adapter structure
2162  **/
2163 static s32 igb_init_i2c(struct igb_adapter *adapter)
2164 {
2165         s32 status = E1000_SUCCESS;
2166
2167         /* I2C interface supported on i350 devices */
2168         if (adapter->hw.mac.type != e1000_i350)
2169                 return E1000_SUCCESS;
2170
2171         /* Initialize the i2c bus which is controlled by the registers.
2172          * This bus will use the i2c_algo_bit structue that implements
2173          * the protocol through toggling of the 4 bits in the register.
2174          */
2175         adapter->i2c_adap.owner = THIS_MODULE;
2176         adapter->i2c_algo = igb_i2c_algo;
2177         adapter->i2c_algo.data = adapter;
2178         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2179         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2180         strlcpy(adapter->i2c_adap.name, "igb BB",
2181                 sizeof(adapter->i2c_adap.name));
2182         status = i2c_bit_add_bus(&adapter->i2c_adap);
2183         return status;
2184 }
2185
2186 /**
2187  *  igb_probe - Device Initialization Routine
2188  *  @pdev: PCI device information struct
2189  *  @ent: entry in igb_pci_tbl
2190  *
2191  *  Returns 0 on success, negative on failure
2192  *
2193  *  igb_probe initializes an adapter identified by a pci_dev structure.
2194  *  The OS initialization, configuring of the adapter private structure,
2195  *  and a hardware reset occur.
2196  **/
2197 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2198 {
2199         struct net_device *netdev;
2200         struct igb_adapter *adapter;
2201         struct e1000_hw *hw;
2202         u16 eeprom_data = 0;
2203         s32 ret_val;
2204         static int global_quad_port_a; /* global quad port a indication */
2205         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2206         int err, pci_using_dac;
2207         u8 part_str[E1000_PBANUM_LENGTH];
2208
2209         /* Catch broken hardware that put the wrong VF device ID in
2210          * the PCIe SR-IOV capability.
2211          */
2212         if (pdev->is_virtfn) {
2213                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2214                         pci_name(pdev), pdev->vendor, pdev->device);
2215                 return -EINVAL;
2216         }
2217
2218         err = pci_enable_device_mem(pdev);
2219         if (err)
2220                 return err;
2221
2222         pci_using_dac = 0;
2223         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2224         if (!err) {
2225                 pci_using_dac = 1;
2226         } else {
2227                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2228                 if (err) {
2229                         dev_err(&pdev->dev,
2230                                 "No usable DMA configuration, aborting\n");
2231                         goto err_dma;
2232                 }
2233         }
2234
2235         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2236                                            IORESOURCE_MEM),
2237                                            igb_driver_name);
2238         if (err)
2239                 goto err_pci_reg;
2240
2241         pci_enable_pcie_error_reporting(pdev);
2242
2243         pci_set_master(pdev);
2244         pci_save_state(pdev);
2245
2246         err = -ENOMEM;
2247         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2248                                    IGB_MAX_TX_QUEUES);
2249         if (!netdev)
2250                 goto err_alloc_etherdev;
2251
2252         SET_NETDEV_DEV(netdev, &pdev->dev);
2253
2254         pci_set_drvdata(pdev, netdev);
2255         adapter = netdev_priv(netdev);
2256         adapter->netdev = netdev;
2257         adapter->pdev = pdev;
2258         hw = &adapter->hw;
2259         hw->back = adapter;
2260         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2261
2262         err = -EIO;
2263         hw->hw_addr = pci_iomap(pdev, 0, 0);
2264         if (!hw->hw_addr)
2265                 goto err_ioremap;
2266
2267         netdev->netdev_ops = &igb_netdev_ops;
2268         igb_set_ethtool_ops(netdev);
2269         netdev->watchdog_timeo = 5 * HZ;
2270
2271         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2272
2273         netdev->mem_start = pci_resource_start(pdev, 0);
2274         netdev->mem_end = pci_resource_end(pdev, 0);
2275
2276         /* PCI config space info */
2277         hw->vendor_id = pdev->vendor;
2278         hw->device_id = pdev->device;
2279         hw->revision_id = pdev->revision;
2280         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2281         hw->subsystem_device_id = pdev->subsystem_device;
2282
2283         /* Copy the default MAC, PHY and NVM function pointers */
2284         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2285         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2286         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2287         /* Initialize skew-specific constants */
2288         err = ei->get_invariants(hw);
2289         if (err)
2290                 goto err_sw_init;
2291
2292         /* setup the private structure */
2293         err = igb_sw_init(adapter);
2294         if (err)
2295                 goto err_sw_init;
2296
2297         igb_get_bus_info_pcie(hw);
2298
2299         hw->phy.autoneg_wait_to_complete = false;
2300
2301         /* Copper options */
2302         if (hw->phy.media_type == e1000_media_type_copper) {
2303                 hw->phy.mdix = AUTO_ALL_MODES;
2304                 hw->phy.disable_polarity_correction = false;
2305                 hw->phy.ms_type = e1000_ms_hw_default;
2306         }
2307
2308         if (igb_check_reset_block(hw))
2309                 dev_info(&pdev->dev,
2310                         "PHY reset is blocked due to SOL/IDER session.\n");
2311
2312         /* features is initialized to 0 in allocation, it might have bits
2313          * set by igb_sw_init so we should use an or instead of an
2314          * assignment.
2315          */
2316         netdev->features |= NETIF_F_SG |
2317                             NETIF_F_IP_CSUM |
2318                             NETIF_F_IPV6_CSUM |
2319                             NETIF_F_TSO |
2320                             NETIF_F_TSO6 |
2321                             NETIF_F_RXHASH |
2322                             NETIF_F_RXCSUM |
2323                             NETIF_F_HW_VLAN_CTAG_RX |
2324                             NETIF_F_HW_VLAN_CTAG_TX;
2325
2326         /* copy netdev features into list of user selectable features */
2327         netdev->hw_features |= netdev->features;
2328         netdev->hw_features |= NETIF_F_RXALL;
2329
2330         /* set this bit last since it cannot be part of hw_features */
2331         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2332
2333         netdev->vlan_features |= NETIF_F_TSO |
2334                                  NETIF_F_TSO6 |
2335                                  NETIF_F_IP_CSUM |
2336                                  NETIF_F_IPV6_CSUM |
2337                                  NETIF_F_SG;
2338
2339         netdev->priv_flags |= IFF_SUPP_NOFCS;
2340
2341         if (pci_using_dac) {
2342                 netdev->features |= NETIF_F_HIGHDMA;
2343                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2344         }
2345
2346         if (hw->mac.type >= e1000_82576) {
2347                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2348                 netdev->features |= NETIF_F_SCTP_CSUM;
2349         }
2350
2351         netdev->priv_flags |= IFF_UNICAST_FLT;
2352
2353         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2354
2355         /* before reading the NVM, reset the controller to put the device in a
2356          * known good starting state
2357          */
2358         hw->mac.ops.reset_hw(hw);
2359
2360         /* make sure the NVM is good , i211/i210 parts can have special NVM
2361          * that doesn't contain a checksum
2362          */
2363         switch (hw->mac.type) {
2364         case e1000_i210:
2365         case e1000_i211:
2366                 if (igb_get_flash_presence_i210(hw)) {
2367                         if (hw->nvm.ops.validate(hw) < 0) {
2368                                 dev_err(&pdev->dev,
2369                                         "The NVM Checksum Is Not Valid\n");
2370                                 err = -EIO;
2371                                 goto err_eeprom;
2372                         }
2373                 }
2374                 break;
2375         default:
2376                 if (hw->nvm.ops.validate(hw) < 0) {
2377                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2378                         err = -EIO;
2379                         goto err_eeprom;
2380                 }
2381                 break;
2382         }
2383
2384         /* copy the MAC address out of the NVM */
2385         if (hw->mac.ops.read_mac_addr(hw))
2386                 dev_err(&pdev->dev, "NVM Read Error\n");
2387
2388         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2389
2390         if (!is_valid_ether_addr(netdev->dev_addr)) {
2391                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2392                 err = -EIO;
2393                 goto err_eeprom;
2394         }
2395
2396         /* get firmware version for ethtool -i */
2397         igb_set_fw_version(adapter);
2398
2399         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2400                     (unsigned long) adapter);
2401         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2402                     (unsigned long) adapter);
2403
2404         INIT_WORK(&adapter->reset_task, igb_reset_task);
2405         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2406
2407         /* Initialize link properties that are user-changeable */
2408         adapter->fc_autoneg = true;
2409         hw->mac.autoneg = true;
2410         hw->phy.autoneg_advertised = 0x2f;
2411
2412         hw->fc.requested_mode = e1000_fc_default;
2413         hw->fc.current_mode = e1000_fc_default;
2414
2415         igb_validate_mdi_setting(hw);
2416
2417         /* By default, support wake on port A */
2418         if (hw->bus.func == 0)
2419                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2420
2421         /* Check the NVM for wake support on non-port A ports */
2422         if (hw->mac.type >= e1000_82580)
2423                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2424                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2425                                  &eeprom_data);
2426         else if (hw->bus.func == 1)
2427                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2428
2429         if (eeprom_data & IGB_EEPROM_APME)
2430                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2431
2432         /* now that we have the eeprom settings, apply the special cases where
2433          * the eeprom may be wrong or the board simply won't support wake on
2434          * lan on a particular port
2435          */
2436         switch (pdev->device) {
2437         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2438                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2439                 break;
2440         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2441         case E1000_DEV_ID_82576_FIBER:
2442         case E1000_DEV_ID_82576_SERDES:
2443                 /* Wake events only supported on port A for dual fiber
2444                  * regardless of eeprom setting
2445                  */
2446                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2447                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2448                 break;
2449         case E1000_DEV_ID_82576_QUAD_COPPER:
2450         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2451                 /* if quad port adapter, disable WoL on all but port A */
2452                 if (global_quad_port_a != 0)
2453                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2454                 else
2455                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2456                 /* Reset for multiple quad port adapters */
2457                 if (++global_quad_port_a == 4)
2458                         global_quad_port_a = 0;
2459                 break;
2460         default:
2461                 /* If the device can't wake, don't set software support */
2462                 if (!device_can_wakeup(&adapter->pdev->dev))
2463                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2464         }
2465
2466         /* initialize the wol settings based on the eeprom settings */
2467         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2468                 adapter->wol |= E1000_WUFC_MAG;
2469
2470         /* Some vendors want WoL disabled by default, but still supported */
2471         if ((hw->mac.type == e1000_i350) &&
2472             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2473                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2474                 adapter->wol = 0;
2475         }
2476
2477         device_set_wakeup_enable(&adapter->pdev->dev,
2478                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2479
2480         /* reset the hardware with the new settings */
2481         igb_reset(adapter);
2482
2483         /* Init the I2C interface */
2484         err = igb_init_i2c(adapter);
2485         if (err) {
2486                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2487                 goto err_eeprom;
2488         }
2489
2490         /* let the f/w know that the h/w is now under the control of the
2491          * driver. */
2492         igb_get_hw_control(adapter);
2493
2494         strcpy(netdev->name, "eth%d");
2495         err = register_netdev(netdev);
2496         if (err)
2497                 goto err_register;
2498
2499         /* carrier off reporting is important to ethtool even BEFORE open */
2500         netif_carrier_off(netdev);
2501
2502 #ifdef CONFIG_IGB_DCA
2503         if (dca_add_requester(&pdev->dev) == 0) {
2504                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2505                 dev_info(&pdev->dev, "DCA enabled\n");
2506                 igb_setup_dca(adapter);
2507         }
2508
2509 #endif
2510 #ifdef CONFIG_IGB_HWMON
2511         /* Initialize the thermal sensor on i350 devices. */
2512         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2513                 u16 ets_word;
2514
2515                 /* Read the NVM to determine if this i350 device supports an
2516                  * external thermal sensor.
2517                  */
2518                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2519                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2520                         adapter->ets = true;
2521                 else
2522                         adapter->ets = false;
2523                 if (igb_sysfs_init(adapter))
2524                         dev_err(&pdev->dev,
2525                                 "failed to allocate sysfs resources\n");
2526         } else {
2527                 adapter->ets = false;
2528         }
2529 #endif
2530         /* Check if Media Autosense is enabled */
2531         adapter->ei = *ei;
2532         if (hw->dev_spec._82575.mas_capable)
2533                 igb_init_mas(adapter);
2534
2535         /* do hw tstamp init after resetting */
2536         igb_ptp_init(adapter);
2537
2538         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2539         /* print bus type/speed/width info, not applicable to i354 */
2540         if (hw->mac.type != e1000_i354) {
2541                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2542                          netdev->name,
2543                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2544                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2545                            "unknown"),
2546                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2547                           "Width x4" :
2548                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2549                           "Width x2" :
2550                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2551                           "Width x1" : "unknown"), netdev->dev_addr);
2552         }
2553
2554         if ((hw->mac.type >= e1000_i210 ||
2555              igb_get_flash_presence_i210(hw))) {
2556                 ret_val = igb_read_part_string(hw, part_str,
2557                                                E1000_PBANUM_LENGTH);
2558         } else {
2559                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2560         }
2561
2562         if (ret_val)
2563                 strcpy(part_str, "Unknown");
2564         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2565         dev_info(&pdev->dev,
2566                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2567                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2568                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2569                 adapter->num_rx_queues, adapter->num_tx_queues);
2570         switch (hw->mac.type) {
2571         case e1000_i350:
2572         case e1000_i210:
2573         case e1000_i211:
2574                 igb_set_eee_i350(hw);
2575                 break;
2576         case e1000_i354:
2577                 if (hw->phy.media_type == e1000_media_type_copper) {
2578                         if ((rd32(E1000_CTRL_EXT) &
2579                             E1000_CTRL_EXT_LINK_MODE_SGMII))
2580                                 igb_set_eee_i354(hw);
2581                 }
2582                 break;
2583         default:
2584                 break;
2585         }
2586
2587         pm_runtime_put_noidle(&pdev->dev);
2588         return 0;
2589
2590 err_register:
2591         igb_release_hw_control(adapter);
2592         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2593 err_eeprom:
2594         if (!igb_check_reset_block(hw))
2595                 igb_reset_phy(hw);
2596
2597         if (hw->flash_address)
2598                 iounmap(hw->flash_address);
2599 err_sw_init:
2600         igb_clear_interrupt_scheme(adapter);
2601         iounmap(hw->hw_addr);
2602 err_ioremap:
2603         free_netdev(netdev);
2604 err_alloc_etherdev:
2605         pci_release_selected_regions(pdev,
2606                                      pci_select_bars(pdev, IORESOURCE_MEM));
2607 err_pci_reg:
2608 err_dma:
2609         pci_disable_device(pdev);
2610         return err;
2611 }
2612
2613 #ifdef CONFIG_PCI_IOV
2614 static int igb_disable_sriov(struct pci_dev *pdev)
2615 {
2616         struct net_device *netdev = pci_get_drvdata(pdev);
2617         struct igb_adapter *adapter = netdev_priv(netdev);
2618         struct e1000_hw *hw = &adapter->hw;
2619
2620         /* reclaim resources allocated to VFs */
2621         if (adapter->vf_data) {
2622                 /* disable iov and allow time for transactions to clear */
2623                 if (pci_vfs_assigned(pdev)) {
2624                         dev_warn(&pdev->dev,
2625                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2626                         return -EPERM;
2627                 } else {
2628                         pci_disable_sriov(pdev);
2629                         msleep(500);
2630                 }
2631
2632                 kfree(adapter->vf_data);
2633                 adapter->vf_data = NULL;
2634                 adapter->vfs_allocated_count = 0;
2635                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2636                 wrfl();
2637                 msleep(100);
2638                 dev_info(&pdev->dev, "IOV Disabled\n");
2639
2640                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2641                 adapter->flags |= IGB_FLAG_DMAC;
2642         }
2643
2644         return 0;
2645 }
2646
2647 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2648 {
2649         struct net_device *netdev = pci_get_drvdata(pdev);
2650         struct igb_adapter *adapter = netdev_priv(netdev);
2651         int old_vfs = pci_num_vf(pdev);
2652         int err = 0;
2653         int i;
2654
2655         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2656                 err = -EPERM;
2657                 goto out;
2658         }
2659         if (!num_vfs)
2660                 goto out;
2661
2662         if (old_vfs) {
2663                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2664                          old_vfs, max_vfs);
2665                 adapter->vfs_allocated_count = old_vfs;
2666         } else
2667                 adapter->vfs_allocated_count = num_vfs;
2668
2669         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2670                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2671
2672         /* if allocation failed then we do not support SR-IOV */
2673         if (!adapter->vf_data) {
2674                 adapter->vfs_allocated_count = 0;
2675                 dev_err(&pdev->dev,
2676                         "Unable to allocate memory for VF Data Storage\n");
2677                 err = -ENOMEM;
2678                 goto out;
2679         }
2680
2681         /* only call pci_enable_sriov() if no VFs are allocated already */
2682         if (!old_vfs) {
2683                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2684                 if (err)
2685                         goto err_out;
2686         }
2687         dev_info(&pdev->dev, "%d VFs allocated\n",
2688                  adapter->vfs_allocated_count);
2689         for (i = 0; i < adapter->vfs_allocated_count; i++)
2690                 igb_vf_configure(adapter, i);
2691
2692         /* DMA Coalescing is not supported in IOV mode. */
2693         adapter->flags &= ~IGB_FLAG_DMAC;
2694         goto out;
2695
2696 err_out:
2697         kfree(adapter->vf_data);
2698         adapter->vf_data = NULL;
2699         adapter->vfs_allocated_count = 0;
2700 out:
2701         return err;
2702 }
2703
2704 #endif
2705 /**
2706  *  igb_remove_i2c - Cleanup  I2C interface
2707  *  @adapter: pointer to adapter structure
2708  **/
2709 static void igb_remove_i2c(struct igb_adapter *adapter)
2710 {
2711         /* free the adapter bus structure */
2712         i2c_del_adapter(&adapter->i2c_adap);
2713 }
2714
2715 /**
2716  *  igb_remove - Device Removal Routine
2717  *  @pdev: PCI device information struct
2718  *
2719  *  igb_remove is called by the PCI subsystem to alert the driver
2720  *  that it should release a PCI device.  The could be caused by a
2721  *  Hot-Plug event, or because the driver is going to be removed from
2722  *  memory.
2723  **/
2724 static void igb_remove(struct pci_dev *pdev)
2725 {
2726         struct net_device *netdev = pci_get_drvdata(pdev);
2727         struct igb_adapter *adapter = netdev_priv(netdev);
2728         struct e1000_hw *hw = &adapter->hw;
2729
2730         pm_runtime_get_noresume(&pdev->dev);
2731 #ifdef CONFIG_IGB_HWMON
2732         igb_sysfs_exit(adapter);
2733 #endif
2734         igb_remove_i2c(adapter);
2735         igb_ptp_stop(adapter);
2736         /* The watchdog timer may be rescheduled, so explicitly
2737          * disable watchdog from being rescheduled.
2738          */
2739         set_bit(__IGB_DOWN, &adapter->state);
2740         del_timer_sync(&adapter->watchdog_timer);
2741         del_timer_sync(&adapter->phy_info_timer);
2742
2743         cancel_work_sync(&adapter->reset_task);
2744         cancel_work_sync(&adapter->watchdog_task);
2745
2746 #ifdef CONFIG_IGB_DCA
2747         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2748                 dev_info(&pdev->dev, "DCA disabled\n");
2749                 dca_remove_requester(&pdev->dev);
2750                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2751                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2752         }
2753 #endif
2754
2755         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2756          * would have already happened in close and is redundant.
2757          */
2758         igb_release_hw_control(adapter);
2759
2760         unregister_netdev(netdev);
2761
2762         igb_clear_interrupt_scheme(adapter);
2763
2764 #ifdef CONFIG_PCI_IOV
2765         igb_disable_sriov(pdev);
2766 #endif
2767
2768         iounmap(hw->hw_addr);
2769         if (hw->flash_address)
2770                 iounmap(hw->flash_address);
2771         pci_release_selected_regions(pdev,
2772                                      pci_select_bars(pdev, IORESOURCE_MEM));
2773
2774         kfree(adapter->shadow_vfta);
2775         free_netdev(netdev);
2776
2777         pci_disable_pcie_error_reporting(pdev);
2778
2779         pci_disable_device(pdev);
2780 }
2781
2782 /**
2783  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2784  *  @adapter: board private structure to initialize
2785  *
2786  *  This function initializes the vf specific data storage and then attempts to
2787  *  allocate the VFs.  The reason for ordering it this way is because it is much
2788  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2789  *  the memory for the VFs.
2790  **/
2791 static void igb_probe_vfs(struct igb_adapter *adapter)
2792 {
2793 #ifdef CONFIG_PCI_IOV
2794         struct pci_dev *pdev = adapter->pdev;
2795         struct e1000_hw *hw = &adapter->hw;
2796
2797         /* Virtualization features not supported on i210 family. */
2798         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2799                 return;
2800
2801         pci_sriov_set_totalvfs(pdev, 7);
2802         igb_pci_enable_sriov(pdev, max_vfs);
2803
2804 #endif /* CONFIG_PCI_IOV */
2805 }
2806
2807 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2808 {
2809         struct e1000_hw *hw = &adapter->hw;
2810         u32 max_rss_queues;
2811
2812         /* Determine the maximum number of RSS queues supported. */
2813         switch (hw->mac.type) {
2814         case e1000_i211:
2815                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2816                 break;
2817         case e1000_82575:
2818         case e1000_i210:
2819                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2820                 break;
2821         case e1000_i350:
2822                 /* I350 cannot do RSS and SR-IOV at the same time */
2823                 if (!!adapter->vfs_allocated_count) {
2824                         max_rss_queues = 1;
2825                         break;
2826                 }
2827                 /* fall through */
2828         case e1000_82576:
2829                 if (!!adapter->vfs_allocated_count) {
2830                         max_rss_queues = 2;
2831                         break;
2832                 }
2833                 /* fall through */
2834         case e1000_82580:
2835         case e1000_i354:
2836         default:
2837                 max_rss_queues = IGB_MAX_RX_QUEUES;
2838                 break;
2839         }
2840
2841         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2842
2843         /* Determine if we need to pair queues. */
2844         switch (hw->mac.type) {
2845         case e1000_82575:
2846         case e1000_i211:
2847                 /* Device supports enough interrupts without queue pairing. */
2848                 break;
2849         case e1000_82576:
2850                 /* If VFs are going to be allocated with RSS queues then we
2851                  * should pair the queues in order to conserve interrupts due
2852                  * to limited supply.
2853                  */
2854                 if ((adapter->rss_queues > 1) &&
2855                     (adapter->vfs_allocated_count > 6))
2856                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2857                 /* fall through */
2858         case e1000_82580:
2859         case e1000_i350:
2860         case e1000_i354:
2861         case e1000_i210:
2862         default:
2863                 /* If rss_queues > half of max_rss_queues, pair the queues in
2864                  * order to conserve interrupts due to limited supply.
2865                  */
2866                 if (adapter->rss_queues > (max_rss_queues / 2))
2867                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2868                 break;
2869         }
2870 }
2871
2872 /**
2873  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2874  *  @adapter: board private structure to initialize
2875  *
2876  *  igb_sw_init initializes the Adapter private data structure.
2877  *  Fields are initialized based on PCI device information and
2878  *  OS network device settings (MTU size).
2879  **/
2880 static int igb_sw_init(struct igb_adapter *adapter)
2881 {
2882         struct e1000_hw *hw = &adapter->hw;
2883         struct net_device *netdev = adapter->netdev;
2884         struct pci_dev *pdev = adapter->pdev;
2885
2886         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2887
2888         /* set default ring sizes */
2889         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2890         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2891
2892         /* set default ITR values */
2893         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2894         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2895
2896         /* set default work limits */
2897         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2898
2899         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2900                                   VLAN_HLEN;
2901         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2902
2903         spin_lock_init(&adapter->stats64_lock);
2904 #ifdef CONFIG_PCI_IOV
2905         switch (hw->mac.type) {
2906         case e1000_82576:
2907         case e1000_i350:
2908                 if (max_vfs > 7) {
2909                         dev_warn(&pdev->dev,
2910                                  "Maximum of 7 VFs per PF, using max\n");
2911                         max_vfs = adapter->vfs_allocated_count = 7;
2912                 } else
2913                         adapter->vfs_allocated_count = max_vfs;
2914                 if (adapter->vfs_allocated_count)
2915                         dev_warn(&pdev->dev,
2916                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2917                 break;
2918         default:
2919                 break;
2920         }
2921 #endif /* CONFIG_PCI_IOV */
2922
2923         igb_init_queue_configuration(adapter);
2924
2925         /* Setup and initialize a copy of the hw vlan table array */
2926         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2927                                        GFP_ATOMIC);
2928
2929         /* This call may decrease the number of queues */
2930         if (igb_init_interrupt_scheme(adapter, true)) {
2931                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2932                 return -ENOMEM;
2933         }
2934
2935         igb_probe_vfs(adapter);
2936
2937         /* Explicitly disable IRQ since the NIC can be in any state. */
2938         igb_irq_disable(adapter);
2939
2940         if (hw->mac.type >= e1000_i350)
2941                 adapter->flags &= ~IGB_FLAG_DMAC;
2942
2943         set_bit(__IGB_DOWN, &adapter->state);
2944         return 0;
2945 }
2946
2947 /**
2948  *  igb_open - Called when a network interface is made active
2949  *  @netdev: network interface device structure
2950  *
2951  *  Returns 0 on success, negative value on failure
2952  *
2953  *  The open entry point is called when a network interface is made
2954  *  active by the system (IFF_UP).  At this point all resources needed
2955  *  for transmit and receive operations are allocated, the interrupt
2956  *  handler is registered with the OS, the watchdog timer is started,
2957  *  and the stack is notified that the interface is ready.
2958  **/
2959 static int __igb_open(struct net_device *netdev, bool resuming)
2960 {
2961         struct igb_adapter *adapter = netdev_priv(netdev);
2962         struct e1000_hw *hw = &adapter->hw;
2963         struct pci_dev *pdev = adapter->pdev;
2964         int err;
2965         int i;
2966
2967         /* disallow open during test */
2968         if (test_bit(__IGB_TESTING, &adapter->state)) {
2969                 WARN_ON(resuming);
2970                 return -EBUSY;
2971         }
2972
2973         if (!resuming)
2974                 pm_runtime_get_sync(&pdev->dev);
2975
2976         netif_carrier_off(netdev);
2977
2978         /* allocate transmit descriptors */
2979         err = igb_setup_all_tx_resources(adapter);
2980         if (err)
2981                 goto err_setup_tx;
2982
2983         /* allocate receive descriptors */
2984         err = igb_setup_all_rx_resources(adapter);
2985         if (err)
2986                 goto err_setup_rx;
2987
2988         igb_power_up_link(adapter);
2989
2990         /* before we allocate an interrupt, we must be ready to handle it.
2991          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2992          * as soon as we call pci_request_irq, so we have to setup our
2993          * clean_rx handler before we do so.
2994          */
2995         igb_configure(adapter);
2996
2997         err = igb_request_irq(adapter);
2998         if (err)
2999                 goto err_req_irq;
3000
3001         /* Notify the stack of the actual queue counts. */
3002         err = netif_set_real_num_tx_queues(adapter->netdev,
3003                                            adapter->num_tx_queues);
3004         if (err)
3005                 goto err_set_queues;
3006
3007         err = netif_set_real_num_rx_queues(adapter->netdev,
3008                                            adapter->num_rx_queues);
3009         if (err)
3010                 goto err_set_queues;
3011
3012         /* From here on the code is the same as igb_up() */
3013         clear_bit(__IGB_DOWN, &adapter->state);
3014
3015         for (i = 0; i < adapter->num_q_vectors; i++)
3016                 napi_enable(&(adapter->q_vector[i]->napi));
3017
3018         /* Clear any pending interrupts. */
3019         rd32(E1000_ICR);
3020
3021         igb_irq_enable(adapter);
3022
3023         /* notify VFs that reset has been completed */
3024         if (adapter->vfs_allocated_count) {
3025                 u32 reg_data = rd32(E1000_CTRL_EXT);
3026                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3027                 wr32(E1000_CTRL_EXT, reg_data);
3028         }
3029
3030         netif_tx_start_all_queues(netdev);
3031
3032         if (!resuming)
3033                 pm_runtime_put(&pdev->dev);
3034
3035         /* start the watchdog. */
3036         hw->mac.get_link_status = 1;
3037         schedule_work(&adapter->watchdog_task);
3038
3039         return 0;
3040
3041 err_set_queues:
3042         igb_free_irq(adapter);
3043 err_req_irq:
3044         igb_release_hw_control(adapter);
3045         igb_power_down_link(adapter);
3046         igb_free_all_rx_resources(adapter);
3047 err_setup_rx:
3048         igb_free_all_tx_resources(adapter);
3049 err_setup_tx:
3050         igb_reset(adapter);
3051         if (!resuming)
3052                 pm_runtime_put(&pdev->dev);
3053
3054         return err;
3055 }
3056
3057 static int igb_open(struct net_device *netdev)
3058 {
3059         return __igb_open(netdev, false);
3060 }
3061
3062 /**
3063  *  igb_close - Disables a network interface
3064  *  @netdev: network interface device structure
3065  *
3066  *  Returns 0, this is not allowed to fail
3067  *
3068  *  The close entry point is called when an interface is de-activated
3069  *  by the OS.  The hardware is still under the driver's control, but
3070  *  needs to be disabled.  A global MAC reset is issued to stop the
3071  *  hardware, and all transmit and receive resources are freed.
3072  **/
3073 static int __igb_close(struct net_device *netdev, bool suspending)
3074 {
3075         struct igb_adapter *adapter = netdev_priv(netdev);
3076         struct pci_dev *pdev = adapter->pdev;
3077
3078         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3079
3080         if (!suspending)
3081                 pm_runtime_get_sync(&pdev->dev);
3082
3083         igb_down(adapter);
3084         igb_free_irq(adapter);
3085
3086         igb_free_all_tx_resources(adapter);
3087         igb_free_all_rx_resources(adapter);
3088
3089         if (!suspending)
3090                 pm_runtime_put_sync(&pdev->dev);
3091         return 0;
3092 }
3093
3094 static int igb_close(struct net_device *netdev)
3095 {
3096         return __igb_close(netdev, false);
3097 }
3098
3099 /**
3100  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3101  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3102  *
3103  *  Return 0 on success, negative on failure
3104  **/
3105 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3106 {
3107         struct device *dev = tx_ring->dev;
3108         int size;
3109
3110         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3111
3112         tx_ring->tx_buffer_info = vzalloc(size);
3113         if (!tx_ring->tx_buffer_info)
3114                 goto err;
3115
3116         /* round up to nearest 4K */
3117         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3118         tx_ring->size = ALIGN(tx_ring->size, 4096);
3119
3120         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3121                                            &tx_ring->dma, GFP_KERNEL);
3122         if (!tx_ring->desc)
3123                 goto err;
3124
3125         tx_ring->next_to_use = 0;
3126         tx_ring->next_to_clean = 0;
3127
3128         return 0;
3129
3130 err:
3131         vfree(tx_ring->tx_buffer_info);
3132         tx_ring->tx_buffer_info = NULL;
3133         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3134         return -ENOMEM;
3135 }
3136
3137 /**
3138  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3139  *                               (Descriptors) for all queues
3140  *  @adapter: board private structure
3141  *
3142  *  Return 0 on success, negative on failure
3143  **/
3144 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3145 {
3146         struct pci_dev *pdev = adapter->pdev;
3147         int i, err = 0;
3148
3149         for (i = 0; i < adapter->num_tx_queues; i++) {
3150                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3151                 if (err) {
3152                         dev_err(&pdev->dev,
3153                                 "Allocation for Tx Queue %u failed\n", i);
3154                         for (i--; i >= 0; i--)
3155                                 igb_free_tx_resources(adapter->tx_ring[i]);
3156                         break;
3157                 }
3158         }
3159
3160         return err;
3161 }
3162
3163 /**
3164  *  igb_setup_tctl - configure the transmit control registers
3165  *  @adapter: Board private structure
3166  **/
3167 void igb_setup_tctl(struct igb_adapter *adapter)
3168 {
3169         struct e1000_hw *hw = &adapter->hw;
3170         u32 tctl;
3171
3172         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3173         wr32(E1000_TXDCTL(0), 0);
3174
3175         /* Program the Transmit Control Register */
3176         tctl = rd32(E1000_TCTL);
3177         tctl &= ~E1000_TCTL_CT;
3178         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3179                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3180
3181         igb_config_collision_dist(hw);
3182
3183         /* Enable transmits */
3184         tctl |= E1000_TCTL_EN;
3185
3186         wr32(E1000_TCTL, tctl);
3187 }
3188
3189 /**
3190  *  igb_configure_tx_ring - Configure transmit ring after Reset
3191  *  @adapter: board private structure
3192  *  @ring: tx ring to configure
3193  *
3194  *  Configure a transmit ring after a reset.
3195  **/
3196 void igb_configure_tx_ring(struct igb_adapter *adapter,
3197                            struct igb_ring *ring)
3198 {
3199         struct e1000_hw *hw = &adapter->hw;
3200         u32 txdctl = 0;
3201         u64 tdba = ring->dma;
3202         int reg_idx = ring->reg_idx;
3203
3204         /* disable the queue */
3205         wr32(E1000_TXDCTL(reg_idx), 0);
3206         wrfl();
3207         mdelay(10);
3208
3209         wr32(E1000_TDLEN(reg_idx),
3210              ring->count * sizeof(union e1000_adv_tx_desc));
3211         wr32(E1000_TDBAL(reg_idx),
3212              tdba & 0x00000000ffffffffULL);
3213         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3214
3215         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3216         wr32(E1000_TDH(reg_idx), 0);
3217         writel(0, ring->tail);
3218
3219         txdctl |= IGB_TX_PTHRESH;
3220         txdctl |= IGB_TX_HTHRESH << 8;
3221         txdctl |= IGB_TX_WTHRESH << 16;
3222
3223         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3224         wr32(E1000_TXDCTL(reg_idx), txdctl);
3225 }
3226
3227 /**
3228  *  igb_configure_tx - Configure transmit Unit after Reset
3229  *  @adapter: board private structure
3230  *
3231  *  Configure the Tx unit of the MAC after a reset.
3232  **/
3233 static void igb_configure_tx(struct igb_adapter *adapter)
3234 {
3235         int i;
3236
3237         for (i = 0; i < adapter->num_tx_queues; i++)
3238                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3239 }
3240
3241 /**
3242  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3243  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3244  *
3245  *  Returns 0 on success, negative on failure
3246  **/
3247 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3248 {
3249         struct device *dev = rx_ring->dev;
3250         int size;
3251
3252         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3253
3254         rx_ring->rx_buffer_info = vzalloc(size);
3255         if (!rx_ring->rx_buffer_info)
3256                 goto err;
3257
3258         /* Round up to nearest 4K */
3259         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3260         rx_ring->size = ALIGN(rx_ring->size, 4096);
3261
3262         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3263                                            &rx_ring->dma, GFP_KERNEL);
3264         if (!rx_ring->desc)
3265                 goto err;
3266
3267         rx_ring->next_to_alloc = 0;
3268         rx_ring->next_to_clean = 0;
3269         rx_ring->next_to_use = 0;
3270
3271         return 0;
3272
3273 err:
3274         vfree(rx_ring->rx_buffer_info);
3275         rx_ring->rx_buffer_info = NULL;
3276         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3277         return -ENOMEM;
3278 }
3279
3280 /**
3281  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3282  *                               (Descriptors) for all queues
3283  *  @adapter: board private structure
3284  *
3285  *  Return 0 on success, negative on failure
3286  **/
3287 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3288 {
3289         struct pci_dev *pdev = adapter->pdev;
3290         int i, err = 0;
3291
3292         for (i = 0; i < adapter->num_rx_queues; i++) {
3293                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3294                 if (err) {
3295                         dev_err(&pdev->dev,
3296                                 "Allocation for Rx Queue %u failed\n", i);
3297                         for (i--; i >= 0; i--)
3298                                 igb_free_rx_resources(adapter->rx_ring[i]);
3299                         break;
3300                 }
3301         }
3302
3303         return err;
3304 }
3305
3306 /**
3307  *  igb_setup_mrqc - configure the multiple receive queue control registers
3308  *  @adapter: Board private structure
3309  **/
3310 static void igb_setup_mrqc(struct igb_adapter *adapter)
3311 {
3312         struct e1000_hw *hw = &adapter->hw;
3313         u32 mrqc, rxcsum;
3314         u32 j, num_rx_queues;
3315         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3316                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3317                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3318                                         0xFA01ACBE };
3319
3320         /* Fill out hash function seeds */
3321         for (j = 0; j < 10; j++)
3322                 wr32(E1000_RSSRK(j), rsskey[j]);
3323
3324         num_rx_queues = adapter->rss_queues;
3325
3326         switch (hw->mac.type) {
3327         case e1000_82576:
3328                 /* 82576 supports 2 RSS queues for SR-IOV */
3329                 if (adapter->vfs_allocated_count)
3330                         num_rx_queues = 2;
3331                 break;
3332         default:
3333                 break;
3334         }
3335
3336         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3337                 for (j = 0; j < IGB_RETA_SIZE; j++)
3338                         adapter->rss_indir_tbl[j] = (j * num_rx_queues) / IGB_RETA_SIZE;
3339                 adapter->rss_indir_tbl_init = num_rx_queues;
3340         }
3341         igb_write_rss_indir_tbl(adapter);
3342
3343         /* Disable raw packet checksumming so that RSS hash is placed in
3344          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3345          * offloads as they are enabled by default
3346          */
3347         rxcsum = rd32(E1000_RXCSUM);
3348         rxcsum |= E1000_RXCSUM_PCSD;
3349
3350         if (adapter->hw.mac.type >= e1000_82576)
3351                 /* Enable Receive Checksum Offload for SCTP */
3352                 rxcsum |= E1000_RXCSUM_CRCOFL;
3353
3354         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3355         wr32(E1000_RXCSUM, rxcsum);
3356
3357         /* Generate RSS hash based on packet types, TCP/UDP
3358          * port numbers and/or IPv4/v6 src and dst addresses
3359          */
3360         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3361                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3362                E1000_MRQC_RSS_FIELD_IPV6 |
3363                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3364                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3365
3366         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3367                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3368         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3369                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3370
3371         /* If VMDq is enabled then we set the appropriate mode for that, else
3372          * we default to RSS so that an RSS hash is calculated per packet even
3373          * if we are only using one queue
3374          */
3375         if (adapter->vfs_allocated_count) {
3376                 if (hw->mac.type > e1000_82575) {
3377                         /* Set the default pool for the PF's first queue */
3378                         u32 vtctl = rd32(E1000_VT_CTL);
3379                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3380                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3381                         vtctl |= adapter->vfs_allocated_count <<
3382                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3383                         wr32(E1000_VT_CTL, vtctl);
3384                 }
3385                 if (adapter->rss_queues > 1)
3386                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3387                 else
3388                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3389         } else {
3390                 if (hw->mac.type != e1000_i211)
3391                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3392         }
3393         igb_vmm_control(adapter);
3394
3395         wr32(E1000_MRQC, mrqc);
3396 }
3397
3398 /**
3399  *  igb_setup_rctl - configure the receive control registers
3400  *  @adapter: Board private structure
3401  **/
3402 void igb_setup_rctl(struct igb_adapter *adapter)
3403 {
3404         struct e1000_hw *hw = &adapter->hw;
3405         u32 rctl;
3406
3407         rctl = rd32(E1000_RCTL);
3408
3409         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3410         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3411
3412         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3413                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3414
3415         /* enable stripping of CRC. It's unlikely this will break BMC
3416          * redirection as it did with e1000. Newer features require
3417          * that the HW strips the CRC.
3418          */
3419         rctl |= E1000_RCTL_SECRC;
3420
3421         /* disable store bad packets and clear size bits. */
3422         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3423
3424         /* enable LPE to prevent packets larger than max_frame_size */
3425         rctl |= E1000_RCTL_LPE;
3426
3427         /* disable queue 0 to prevent tail write w/o re-config */
3428         wr32(E1000_RXDCTL(0), 0);
3429
3430         /* Attention!!!  For SR-IOV PF driver operations you must enable
3431          * queue drop for all VF and PF queues to prevent head of line blocking
3432          * if an un-trusted VF does not provide descriptors to hardware.
3433          */
3434         if (adapter->vfs_allocated_count) {
3435                 /* set all queue drop enable bits */
3436                 wr32(E1000_QDE, ALL_QUEUES);
3437         }
3438
3439         /* This is useful for sniffing bad packets. */
3440         if (adapter->netdev->features & NETIF_F_RXALL) {
3441                 /* UPE and MPE will be handled by normal PROMISC logic
3442                  * in e1000e_set_rx_mode
3443                  */
3444                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3445                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3446                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3447
3448                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3449                           E1000_RCTL_DPF | /* Allow filtered pause */
3450                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3451                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3452                  * and that breaks VLANs.
3453                  */
3454         }
3455
3456         wr32(E1000_RCTL, rctl);
3457 }
3458
3459 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3460                                    int vfn)
3461 {
3462         struct e1000_hw *hw = &adapter->hw;
3463         u32 vmolr;
3464
3465         /* if it isn't the PF check to see if VFs are enabled and
3466          * increase the size to support vlan tags
3467          */
3468         if (vfn < adapter->vfs_allocated_count &&
3469             adapter->vf_data[vfn].vlans_enabled)
3470                 size += VLAN_TAG_SIZE;
3471
3472         vmolr = rd32(E1000_VMOLR(vfn));
3473         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3474         vmolr |= size | E1000_VMOLR_LPE;
3475         wr32(E1000_VMOLR(vfn), vmolr);
3476
3477         return 0;
3478 }
3479
3480 /**
3481  *  igb_rlpml_set - set maximum receive packet size
3482  *  @adapter: board private structure
3483  *
3484  *  Configure maximum receivable packet size.
3485  **/
3486 static void igb_rlpml_set(struct igb_adapter *adapter)
3487 {
3488         u32 max_frame_size = adapter->max_frame_size;
3489         struct e1000_hw *hw = &adapter->hw;
3490         u16 pf_id = adapter->vfs_allocated_count;
3491
3492         if (pf_id) {
3493                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3494                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3495                  * to our max jumbo frame size, in case we need to enable
3496                  * jumbo frames on one of the rings later.
3497                  * This will not pass over-length frames into the default
3498                  * queue because it's gated by the VMOLR.RLPML.
3499                  */
3500                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3501         }
3502
3503         wr32(E1000_RLPML, max_frame_size);
3504 }
3505
3506 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3507                                  int vfn, bool aupe)
3508 {
3509         struct e1000_hw *hw = &adapter->hw;
3510         u32 vmolr;
3511
3512         /* This register exists only on 82576 and newer so if we are older then
3513          * we should exit and do nothing
3514          */
3515         if (hw->mac.type < e1000_82576)
3516                 return;
3517
3518         vmolr = rd32(E1000_VMOLR(vfn));
3519         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3520         if (aupe)
3521                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3522         else
3523                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3524
3525         /* clear all bits that might not be set */
3526         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3527
3528         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3529                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3530         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3531          * multicast packets
3532          */
3533         if (vfn <= adapter->vfs_allocated_count)
3534                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3535
3536         wr32(E1000_VMOLR(vfn), vmolr);
3537 }
3538
3539 /**
3540  *  igb_configure_rx_ring - Configure a receive ring after Reset
3541  *  @adapter: board private structure
3542  *  @ring: receive ring to be configured
3543  *
3544  *  Configure the Rx unit of the MAC after a reset.
3545  **/
3546 void igb_configure_rx_ring(struct igb_adapter *adapter,
3547                            struct igb_ring *ring)
3548 {
3549         struct e1000_hw *hw = &adapter->hw;
3550         u64 rdba = ring->dma;
3551         int reg_idx = ring->reg_idx;
3552         u32 srrctl = 0, rxdctl = 0;
3553
3554         /* disable the queue */
3555         wr32(E1000_RXDCTL(reg_idx), 0);
3556
3557         /* Set DMA base address registers */
3558         wr32(E1000_RDBAL(reg_idx),
3559              rdba & 0x00000000ffffffffULL);
3560         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3561         wr32(E1000_RDLEN(reg_idx),
3562              ring->count * sizeof(union e1000_adv_rx_desc));
3563
3564         /* initialize head and tail */
3565         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3566         wr32(E1000_RDH(reg_idx), 0);
3567         writel(0, ring->tail);
3568
3569         /* set descriptor configuration */
3570         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3571         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3572         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3573         if (hw->mac.type >= e1000_82580)
3574                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3575         /* Only set Drop Enable if we are supporting multiple queues */
3576         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3577                 srrctl |= E1000_SRRCTL_DROP_EN;
3578
3579         wr32(E1000_SRRCTL(reg_idx), srrctl);
3580
3581         /* set filtering for VMDQ pools */
3582         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3583
3584         rxdctl |= IGB_RX_PTHRESH;
3585         rxdctl |= IGB_RX_HTHRESH << 8;
3586         rxdctl |= IGB_RX_WTHRESH << 16;
3587
3588         /* enable receive descriptor fetching */
3589         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3590         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3591 }
3592
3593 /**
3594  *  igb_configure_rx - Configure receive Unit after Reset
3595  *  @adapter: board private structure
3596  *
3597  *  Configure the Rx unit of the MAC after a reset.
3598  **/
3599 static void igb_configure_rx(struct igb_adapter *adapter)
3600 {
3601         int i;
3602
3603         /* set UTA to appropriate mode */
3604         igb_set_uta(adapter);
3605
3606         /* set the correct pool for the PF default MAC address in entry 0 */
3607         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3608                          adapter->vfs_allocated_count);
3609
3610         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3611          * the Base and Length of the Rx Descriptor Ring
3612          */
3613         for (i = 0; i < adapter->num_rx_queues; i++)
3614                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3615 }
3616
3617 /**
3618  *  igb_free_tx_resources - Free Tx Resources per Queue
3619  *  @tx_ring: Tx descriptor ring for a specific queue
3620  *
3621  *  Free all transmit software resources
3622  **/
3623 void igb_free_tx_resources(struct igb_ring *tx_ring)
3624 {
3625         igb_clean_tx_ring(tx_ring);
3626
3627         vfree(tx_ring->tx_buffer_info);
3628         tx_ring->tx_buffer_info = NULL;
3629
3630         /* if not set, then don't free */
3631         if (!tx_ring->desc)
3632                 return;
3633
3634         dma_free_coherent(tx_ring->dev, tx_ring->size,
3635                           tx_ring->desc, tx_ring->dma);
3636
3637         tx_ring->desc = NULL;
3638 }
3639
3640 /**
3641  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3642  *  @adapter: board private structure
3643  *
3644  *  Free all transmit software resources
3645  **/
3646 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3647 {
3648         int i;
3649
3650         for (i = 0; i < adapter->num_tx_queues; i++)
3651                 igb_free_tx_resources(adapter->tx_ring[i]);
3652 }
3653
3654 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3655                                     struct igb_tx_buffer *tx_buffer)
3656 {
3657         if (tx_buffer->skb) {
3658                 dev_kfree_skb_any(tx_buffer->skb);
3659                 if (dma_unmap_len(tx_buffer, len))
3660                         dma_unmap_single(ring->dev,
3661                                          dma_unmap_addr(tx_buffer, dma),
3662                                          dma_unmap_len(tx_buffer, len),
3663                                          DMA_TO_DEVICE);
3664         } else if (dma_unmap_len(tx_buffer, len)) {
3665                 dma_unmap_page(ring->dev,
3666                                dma_unmap_addr(tx_buffer, dma),
3667                                dma_unmap_len(tx_buffer, len),
3668                                DMA_TO_DEVICE);
3669         }
3670         tx_buffer->next_to_watch = NULL;
3671         tx_buffer->skb = NULL;
3672         dma_unmap_len_set(tx_buffer, len, 0);
3673         /* buffer_info must be completely set up in the transmit path */
3674 }
3675
3676 /**
3677  *  igb_clean_tx_ring - Free Tx Buffers
3678  *  @tx_ring: ring to be cleaned
3679  **/
3680 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3681 {
3682         struct igb_tx_buffer *buffer_info;
3683         unsigned long size;
3684         u16 i;
3685
3686         if (!tx_ring->tx_buffer_info)
3687                 return;
3688         /* Free all the Tx ring sk_buffs */
3689
3690         for (i = 0; i < tx_ring->count; i++) {
3691                 buffer_info = &tx_ring->tx_buffer_info[i];
3692                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3693         }
3694
3695         netdev_tx_reset_queue(txring_txq(tx_ring));
3696
3697         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3698         memset(tx_ring->tx_buffer_info, 0, size);
3699
3700         /* Zero out the descriptor ring */
3701         memset(tx_ring->desc, 0, tx_ring->size);
3702
3703         tx_ring->next_to_use = 0;
3704         tx_ring->next_to_clean = 0;
3705 }
3706
3707 /**
3708  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3709  *  @adapter: board private structure
3710  **/
3711 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3712 {
3713         int i;
3714
3715         for (i = 0; i < adapter->num_tx_queues; i++)
3716                 igb_clean_tx_ring(adapter->tx_ring[i]);
3717 }
3718
3719 /**
3720  *  igb_free_rx_resources - Free Rx Resources
3721  *  @rx_ring: ring to clean the resources from
3722  *
3723  *  Free all receive software resources
3724  **/
3725 void igb_free_rx_resources(struct igb_ring *rx_ring)
3726 {
3727         igb_clean_rx_ring(rx_ring);
3728
3729         vfree(rx_ring->rx_buffer_info);
3730         rx_ring->rx_buffer_info = NULL;
3731
3732         /* if not set, then don't free */
3733         if (!rx_ring->desc)
3734                 return;
3735
3736         dma_free_coherent(rx_ring->dev, rx_ring->size,
3737                           rx_ring->desc, rx_ring->dma);
3738
3739         rx_ring->desc = NULL;
3740 }
3741
3742 /**
3743  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3744  *  @adapter: board private structure
3745  *
3746  *  Free all receive software resources
3747  **/
3748 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3749 {
3750         int i;
3751
3752         for (i = 0; i < adapter->num_rx_queues; i++)
3753                 igb_free_rx_resources(adapter->rx_ring[i]);
3754 }
3755
3756 /**
3757  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3758  *  @rx_ring: ring to free buffers from
3759  **/
3760 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3761 {
3762         unsigned long size;
3763         u16 i;
3764
3765         if (rx_ring->skb)
3766                 dev_kfree_skb(rx_ring->skb);
3767         rx_ring->skb = NULL;
3768
3769         if (!rx_ring->rx_buffer_info)
3770                 return;
3771
3772         /* Free all the Rx ring sk_buffs */
3773         for (i = 0; i < rx_ring->count; i++) {
3774                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3775
3776                 if (!buffer_info->page)
3777                         continue;
3778
3779                 dma_unmap_page(rx_ring->dev,
3780                                buffer_info->dma,
3781                                PAGE_SIZE,
3782                                DMA_FROM_DEVICE);
3783                 __free_page(buffer_info->page);
3784
3785                 buffer_info->page = NULL;
3786         }
3787
3788         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3789         memset(rx_ring->rx_buffer_info, 0, size);
3790
3791         /* Zero out the descriptor ring */
3792         memset(rx_ring->desc, 0, rx_ring->size);
3793
3794         rx_ring->next_to_alloc = 0;
3795         rx_ring->next_to_clean = 0;
3796         rx_ring->next_to_use = 0;
3797 }
3798
3799 /**
3800  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3801  *  @adapter: board private structure
3802  **/
3803 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3804 {
3805         int i;
3806
3807         for (i = 0; i < adapter->num_rx_queues; i++)
3808                 igb_clean_rx_ring(adapter->rx_ring[i]);
3809 }
3810
3811 /**
3812  *  igb_set_mac - Change the Ethernet Address of the NIC
3813  *  @netdev: network interface device structure
3814  *  @p: pointer to an address structure
3815  *
3816  *  Returns 0 on success, negative on failure
3817  **/
3818 static int igb_set_mac(struct net_device *netdev, void *p)
3819 {
3820         struct igb_adapter *adapter = netdev_priv(netdev);
3821         struct e1000_hw *hw = &adapter->hw;
3822         struct sockaddr *addr = p;
3823
3824         if (!is_valid_ether_addr(addr->sa_data))
3825                 return -EADDRNOTAVAIL;
3826
3827         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3828         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3829
3830         /* set the correct pool for the new PF MAC address in entry 0 */
3831         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3832                          adapter->vfs_allocated_count);
3833
3834         return 0;
3835 }
3836
3837 /**
3838  *  igb_write_mc_addr_list - write multicast addresses to MTA
3839  *  @netdev: network interface device structure
3840  *
3841  *  Writes multicast address list to the MTA hash table.
3842  *  Returns: -ENOMEM on failure
3843  *           0 on no addresses written
3844  *           X on writing X addresses to MTA
3845  **/
3846 static int igb_write_mc_addr_list(struct net_device *netdev)
3847 {
3848         struct igb_adapter *adapter = netdev_priv(netdev);
3849         struct e1000_hw *hw = &adapter->hw;
3850         struct netdev_hw_addr *ha;
3851         u8  *mta_list;
3852         int i;
3853
3854         if (netdev_mc_empty(netdev)) {
3855                 /* nothing to program, so clear mc list */
3856                 igb_update_mc_addr_list(hw, NULL, 0);
3857                 igb_restore_vf_multicasts(adapter);
3858                 return 0;
3859         }
3860
3861         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3862         if (!mta_list)
3863                 return -ENOMEM;
3864
3865         /* The shared function expects a packed array of only addresses. */
3866         i = 0;
3867         netdev_for_each_mc_addr(ha, netdev)
3868                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3869
3870         igb_update_mc_addr_list(hw, mta_list, i);
3871         kfree(mta_list);
3872
3873         return netdev_mc_count(netdev);
3874 }
3875
3876 /**
3877  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3878  *  @netdev: network interface device structure
3879  *
3880  *  Writes unicast address list to the RAR table.
3881  *  Returns: -ENOMEM on failure/insufficient address space
3882  *           0 on no addresses written
3883  *           X on writing X addresses to the RAR table
3884  **/
3885 static int igb_write_uc_addr_list(struct net_device *netdev)
3886 {
3887         struct igb_adapter *adapter = netdev_priv(netdev);
3888         struct e1000_hw *hw = &adapter->hw;
3889         unsigned int vfn = adapter->vfs_allocated_count;
3890         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3891         int count = 0;
3892
3893         /* return ENOMEM indicating insufficient memory for addresses */
3894         if (netdev_uc_count(netdev) > rar_entries)
3895                 return -ENOMEM;
3896
3897         if (!netdev_uc_empty(netdev) && rar_entries) {
3898                 struct netdev_hw_addr *ha;
3899
3900                 netdev_for_each_uc_addr(ha, netdev) {
3901                         if (!rar_entries)
3902                                 break;
3903                         igb_rar_set_qsel(adapter, ha->addr,
3904                                          rar_entries--,
3905                                          vfn);
3906                         count++;
3907                 }
3908         }
3909         /* write the addresses in reverse order to avoid write combining */
3910         for (; rar_entries > 0 ; rar_entries--) {
3911                 wr32(E1000_RAH(rar_entries), 0);
3912                 wr32(E1000_RAL(rar_entries), 0);
3913         }
3914         wrfl();
3915
3916         return count;
3917 }
3918
3919 /**
3920  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3921  *  @netdev: network interface device structure
3922  *
3923  *  The set_rx_mode entry point is called whenever the unicast or multicast
3924  *  address lists or the network interface flags are updated.  This routine is
3925  *  responsible for configuring the hardware for proper unicast, multicast,
3926  *  promiscuous mode, and all-multi behavior.
3927  **/
3928 static void igb_set_rx_mode(struct net_device *netdev)
3929 {
3930         struct igb_adapter *adapter = netdev_priv(netdev);
3931         struct e1000_hw *hw = &adapter->hw;
3932         unsigned int vfn = adapter->vfs_allocated_count;
3933         u32 rctl, vmolr = 0;
3934         int count;
3935
3936         /* Check for Promiscuous and All Multicast modes */
3937         rctl = rd32(E1000_RCTL);
3938
3939         /* clear the effected bits */
3940         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3941
3942         if (netdev->flags & IFF_PROMISC) {
3943                 /* retain VLAN HW filtering if in VT mode */
3944                 if (adapter->vfs_allocated_count)
3945                         rctl |= E1000_RCTL_VFE;
3946                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3947                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3948         } else {
3949                 if (netdev->flags & IFF_ALLMULTI) {
3950                         rctl |= E1000_RCTL_MPE;
3951                         vmolr |= E1000_VMOLR_MPME;
3952                 } else {
3953                         /* Write addresses to the MTA, if the attempt fails
3954                          * then we should just turn on promiscuous mode so
3955                          * that we can at least receive multicast traffic
3956                          */
3957                         count = igb_write_mc_addr_list(netdev);
3958                         if (count < 0) {
3959                                 rctl |= E1000_RCTL_MPE;
3960                                 vmolr |= E1000_VMOLR_MPME;
3961                         } else if (count) {
3962                                 vmolr |= E1000_VMOLR_ROMPE;
3963                         }
3964                 }
3965                 /* Write addresses to available RAR registers, if there is not
3966                  * sufficient space to store all the addresses then enable
3967                  * unicast promiscuous mode
3968                  */
3969                 count = igb_write_uc_addr_list(netdev);
3970                 if (count < 0) {
3971                         rctl |= E1000_RCTL_UPE;
3972                         vmolr |= E1000_VMOLR_ROPE;
3973                 }
3974                 rctl |= E1000_RCTL_VFE;
3975         }
3976         wr32(E1000_RCTL, rctl);
3977
3978         /* In order to support SR-IOV and eventually VMDq it is necessary to set
3979          * the VMOLR to enable the appropriate modes.  Without this workaround
3980          * we will have issues with VLAN tag stripping not being done for frames
3981          * that are only arriving because we are the default pool
3982          */
3983         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3984                 return;
3985
3986         vmolr |= rd32(E1000_VMOLR(vfn)) &
3987                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3988         wr32(E1000_VMOLR(vfn), vmolr);
3989         igb_restore_vf_multicasts(adapter);
3990 }
3991
3992 static void igb_check_wvbr(struct igb_adapter *adapter)
3993 {
3994         struct e1000_hw *hw = &adapter->hw;
3995         u32 wvbr = 0;
3996
3997         switch (hw->mac.type) {
3998         case e1000_82576:
3999         case e1000_i350:
4000                 if (!(wvbr = rd32(E1000_WVBR)))
4001                         return;
4002                 break;
4003         default:
4004                 break;
4005         }
4006
4007         adapter->wvbr |= wvbr;
4008 }
4009
4010 #define IGB_STAGGERED_QUEUE_OFFSET 8
4011
4012 static void igb_spoof_check(struct igb_adapter *adapter)
4013 {
4014         int j;
4015
4016         if (!adapter->wvbr)
4017                 return;
4018
4019         for(j = 0; j < adapter->vfs_allocated_count; j++) {
4020                 if (adapter->wvbr & (1 << j) ||
4021                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4022                         dev_warn(&adapter->pdev->dev,
4023                                 "Spoof event(s) detected on VF %d\n", j);
4024                         adapter->wvbr &=
4025                                 ~((1 << j) |
4026                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4027                 }
4028         }
4029 }
4030
4031 /* Need to wait a few seconds after link up to get diagnostic information from
4032  * the phy
4033  */
4034 static void igb_update_phy_info(unsigned long data)
4035 {
4036         struct igb_adapter *adapter = (struct igb_adapter *) data;
4037         igb_get_phy_info(&adapter->hw);
4038 }
4039
4040 /**
4041  *  igb_has_link - check shared code for link and determine up/down
4042  *  @adapter: pointer to driver private info
4043  **/
4044 bool igb_has_link(struct igb_adapter *adapter)
4045 {
4046         struct e1000_hw *hw = &adapter->hw;
4047         bool link_active = false;
4048
4049         /* get_link_status is set on LSC (link status) interrupt or
4050          * rx sequence error interrupt.  get_link_status will stay
4051          * false until the e1000_check_for_link establishes link
4052          * for copper adapters ONLY
4053          */
4054         switch (hw->phy.media_type) {
4055         case e1000_media_type_copper:
4056                 if (!hw->mac.get_link_status)
4057                         return true;
4058         case e1000_media_type_internal_serdes:
4059                 hw->mac.ops.check_for_link(hw);
4060                 link_active = !hw->mac.get_link_status;
4061                 break;
4062         default:
4063         case e1000_media_type_unknown:
4064                 break;
4065         }
4066
4067         if (((hw->mac.type == e1000_i210) ||
4068              (hw->mac.type == e1000_i211)) &&
4069              (hw->phy.id == I210_I_PHY_ID)) {
4070                 if (!netif_carrier_ok(adapter->netdev)) {
4071                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4072                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4073                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4074                         adapter->link_check_timeout = jiffies;
4075                 }
4076         }
4077
4078         return link_active;
4079 }
4080
4081 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4082 {
4083         bool ret = false;
4084         u32 ctrl_ext, thstat;
4085
4086         /* check for thermal sensor event on i350 copper only */
4087         if (hw->mac.type == e1000_i350) {
4088                 thstat = rd32(E1000_THSTAT);
4089                 ctrl_ext = rd32(E1000_CTRL_EXT);
4090
4091                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4092                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4093                         ret = !!(thstat & event);
4094         }
4095
4096         return ret;
4097 }
4098
4099 /**
4100  *  igb_watchdog - Timer Call-back
4101  *  @data: pointer to adapter cast into an unsigned long
4102  **/
4103 static void igb_watchdog(unsigned long data)
4104 {
4105         struct igb_adapter *adapter = (struct igb_adapter *)data;
4106         /* Do the rest outside of interrupt context */
4107         schedule_work(&adapter->watchdog_task);
4108 }
4109
4110 static void igb_watchdog_task(struct work_struct *work)
4111 {
4112         struct igb_adapter *adapter = container_of(work,
4113                                                    struct igb_adapter,
4114                                                    watchdog_task);
4115         struct e1000_hw *hw = &adapter->hw;
4116         struct e1000_phy_info *phy = &hw->phy;
4117         struct net_device *netdev = adapter->netdev;
4118         u32 link;
4119         int i;
4120         u32 connsw;
4121
4122         link = igb_has_link(adapter);
4123
4124         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4125                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4126                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4127                 else
4128                         link = false;
4129         }
4130
4131         /* Force link down if we have fiber to swap to */
4132         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4133                 if (hw->phy.media_type == e1000_media_type_copper) {
4134                         connsw = rd32(E1000_CONNSW);
4135                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4136                                 link = 0;
4137                 }
4138         }
4139         if (link) {
4140                 /* Perform a reset if the media type changed. */
4141                 if (hw->dev_spec._82575.media_changed) {
4142                         hw->dev_spec._82575.media_changed = false;
4143                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4144                         igb_reset(adapter);
4145                 }
4146                 /* Cancel scheduled suspend requests. */
4147                 pm_runtime_resume(netdev->dev.parent);
4148
4149                 if (!netif_carrier_ok(netdev)) {
4150                         u32 ctrl;
4151                         hw->mac.ops.get_speed_and_duplex(hw,
4152                                                          &adapter->link_speed,
4153                                                          &adapter->link_duplex);
4154
4155                         ctrl = rd32(E1000_CTRL);
4156                         /* Links status message must follow this format */
4157                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
4158                                "Duplex, Flow Control: %s\n",
4159                                netdev->name,
4160                                adapter->link_speed,
4161                                adapter->link_duplex == FULL_DUPLEX ?
4162                                "Full" : "Half",
4163                                (ctrl & E1000_CTRL_TFCE) &&
4164                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4165                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4166                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4167
4168                         /* check if SmartSpeed worked */
4169                         igb_check_downshift(hw);
4170                         if (phy->speed_downgraded)
4171                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4172
4173                         /* check for thermal sensor event */
4174                         if (igb_thermal_sensor_event(hw,
4175                             E1000_THSTAT_LINK_THROTTLE)) {
4176                                 netdev_info(netdev, "The network adapter link "
4177                                             "speed was downshifted because it "
4178                                             "overheated\n");
4179                         }
4180
4181                         /* adjust timeout factor according to speed/duplex */
4182                         adapter->tx_timeout_factor = 1;
4183                         switch (adapter->link_speed) {
4184                         case SPEED_10:
4185                                 adapter->tx_timeout_factor = 14;
4186                                 break;
4187                         case SPEED_100:
4188                                 /* maybe add some timeout factor ? */
4189                                 break;
4190                         }
4191
4192                         netif_carrier_on(netdev);
4193
4194                         igb_ping_all_vfs(adapter);
4195                         igb_check_vf_rate_limit(adapter);
4196
4197                         /* link state has changed, schedule phy info update */
4198                         if (!test_bit(__IGB_DOWN, &adapter->state))
4199                                 mod_timer(&adapter->phy_info_timer,
4200                                           round_jiffies(jiffies + 2 * HZ));
4201                 }
4202         } else {
4203                 if (netif_carrier_ok(netdev)) {
4204                         adapter->link_speed = 0;
4205                         adapter->link_duplex = 0;
4206
4207                         /* check for thermal sensor event */
4208                         if (igb_thermal_sensor_event(hw,
4209                             E1000_THSTAT_PWR_DOWN)) {
4210                                 netdev_err(netdev, "The network adapter was "
4211                                            "stopped because it overheated\n");
4212                         }
4213
4214                         /* Links status message must follow this format */
4215                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4216                                netdev->name);
4217                         netif_carrier_off(netdev);
4218
4219                         igb_ping_all_vfs(adapter);
4220
4221                         /* link state has changed, schedule phy info update */
4222                         if (!test_bit(__IGB_DOWN, &adapter->state))
4223                                 mod_timer(&adapter->phy_info_timer,
4224                                           round_jiffies(jiffies + 2 * HZ));
4225
4226                         /* link is down, time to check for alternate media */
4227                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4228                                 igb_check_swap_media(adapter);
4229                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4230                                         schedule_work(&adapter->reset_task);
4231                                         /* return immediately */
4232                                         return;
4233                                 }
4234                         }
4235                         pm_schedule_suspend(netdev->dev.parent,
4236                                             MSEC_PER_SEC * 5);
4237
4238                 /* also check for alternate media here */
4239                 } else if (!netif_carrier_ok(netdev) &&
4240                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4241                         igb_check_swap_media(adapter);
4242                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4243                                 schedule_work(&adapter->reset_task);
4244                                 /* return immediately */
4245                                 return;
4246                         }
4247                 }
4248         }
4249
4250         spin_lock(&adapter->stats64_lock);
4251         igb_update_stats(adapter, &adapter->stats64);
4252         spin_unlock(&adapter->stats64_lock);
4253
4254         for (i = 0; i < adapter->num_tx_queues; i++) {
4255                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4256                 if (!netif_carrier_ok(netdev)) {
4257                         /* We've lost link, so the controller stops DMA,
4258                          * but we've got queued Tx work that's never going
4259                          * to get done, so reset controller to flush Tx.
4260                          * (Do the reset outside of interrupt context).
4261                          */
4262                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4263                                 adapter->tx_timeout_count++;
4264                                 schedule_work(&adapter->reset_task);
4265                                 /* return immediately since reset is imminent */
4266                                 return;
4267                         }
4268                 }
4269
4270                 /* Force detection of hung controller every watchdog period */
4271                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4272         }
4273
4274         /* Cause software interrupt to ensure Rx ring is cleaned */
4275         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4276                 u32 eics = 0;
4277                 for (i = 0; i < adapter->num_q_vectors; i++)
4278                         eics |= adapter->q_vector[i]->eims_value;
4279                 wr32(E1000_EICS, eics);
4280         } else {
4281                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4282         }
4283
4284         igb_spoof_check(adapter);
4285         igb_ptp_rx_hang(adapter);
4286
4287         /* Reset the timer */
4288         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4289                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4290                         mod_timer(&adapter->watchdog_timer,
4291                                   round_jiffies(jiffies +  HZ));
4292                 else
4293                         mod_timer(&adapter->watchdog_timer,
4294                                   round_jiffies(jiffies + 2 * HZ));
4295         }
4296 }
4297
4298 enum latency_range {
4299         lowest_latency = 0,
4300         low_latency = 1,
4301         bulk_latency = 2,
4302         latency_invalid = 255
4303 };
4304
4305 /**
4306  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4307  *  @q_vector: pointer to q_vector
4308  *
4309  *  Stores a new ITR value based on strictly on packet size.  This
4310  *  algorithm is less sophisticated than that used in igb_update_itr,
4311  *  due to the difficulty of synchronizing statistics across multiple
4312  *  receive rings.  The divisors and thresholds used by this function
4313  *  were determined based on theoretical maximum wire speed and testing
4314  *  data, in order to minimize response time while increasing bulk
4315  *  throughput.
4316  *  This functionality is controlled by the InterruptThrottleRate module
4317  *  parameter (see igb_param.c)
4318  *  NOTE:  This function is called only when operating in a multiqueue
4319  *         receive environment.
4320  **/
4321 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4322 {
4323         int new_val = q_vector->itr_val;
4324         int avg_wire_size = 0;
4325         struct igb_adapter *adapter = q_vector->adapter;
4326         unsigned int packets;
4327
4328         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4329          * ints/sec - ITR timer value of 120 ticks.
4330          */
4331         if (adapter->link_speed != SPEED_1000) {
4332                 new_val = IGB_4K_ITR;
4333                 goto set_itr_val;
4334         }
4335
4336         packets = q_vector->rx.total_packets;
4337         if (packets)
4338                 avg_wire_size = q_vector->rx.total_bytes / packets;
4339
4340         packets = q_vector->tx.total_packets;
4341         if (packets)
4342                 avg_wire_size = max_t(u32, avg_wire_size,
4343                                       q_vector->tx.total_bytes / packets);
4344
4345         /* if avg_wire_size isn't set no work was done */
4346         if (!avg_wire_size)
4347                 goto clear_counts;
4348
4349         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4350         avg_wire_size += 24;
4351
4352         /* Don't starve jumbo frames */
4353         avg_wire_size = min(avg_wire_size, 3000);
4354
4355         /* Give a little boost to mid-size frames */
4356         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4357                 new_val = avg_wire_size / 3;
4358         else
4359                 new_val = avg_wire_size / 2;
4360
4361         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4362         if (new_val < IGB_20K_ITR &&
4363             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4364              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4365                 new_val = IGB_20K_ITR;
4366
4367 set_itr_val:
4368         if (new_val != q_vector->itr_val) {
4369                 q_vector->itr_val = new_val;
4370                 q_vector->set_itr = 1;
4371         }
4372 clear_counts:
4373         q_vector->rx.total_bytes = 0;
4374         q_vector->rx.total_packets = 0;
4375         q_vector->tx.total_bytes = 0;
4376         q_vector->tx.total_packets = 0;
4377 }
4378
4379 /**
4380  *  igb_update_itr - update the dynamic ITR value based on statistics
4381  *  @q_vector: pointer to q_vector
4382  *  @ring_container: ring info to update the itr for
4383  *
4384  *  Stores a new ITR value based on packets and byte
4385  *  counts during the last interrupt.  The advantage of per interrupt
4386  *  computation is faster updates and more accurate ITR for the current
4387  *  traffic pattern.  Constants in this function were computed
4388  *  based on theoretical maximum wire speed and thresholds were set based
4389  *  on testing data as well as attempting to minimize response time
4390  *  while increasing bulk throughput.
4391  *  this functionality is controlled by the InterruptThrottleRate module
4392  *  parameter (see igb_param.c)
4393  *  NOTE:  These calculations are only valid when operating in a single-
4394  *         queue environment.
4395  **/
4396 static void igb_update_itr(struct igb_q_vector *q_vector,
4397                            struct igb_ring_container *ring_container)
4398 {
4399         unsigned int packets = ring_container->total_packets;
4400         unsigned int bytes = ring_container->total_bytes;
4401         u8 itrval = ring_container->itr;
4402
4403         /* no packets, exit with status unchanged */
4404         if (packets == 0)
4405                 return;
4406
4407         switch (itrval) {
4408         case lowest_latency:
4409                 /* handle TSO and jumbo frames */
4410                 if (bytes/packets > 8000)
4411                         itrval = bulk_latency;
4412                 else if ((packets < 5) && (bytes > 512))
4413                         itrval = low_latency;
4414                 break;
4415         case low_latency:  /* 50 usec aka 20000 ints/s */
4416                 if (bytes > 10000) {
4417                         /* this if handles the TSO accounting */
4418                         if (bytes/packets > 8000) {
4419                                 itrval = bulk_latency;
4420                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4421                                 itrval = bulk_latency;
4422                         } else if ((packets > 35)) {
4423                                 itrval = lowest_latency;
4424                         }
4425                 } else if (bytes/packets > 2000) {
4426                         itrval = bulk_latency;
4427                 } else if (packets <= 2 && bytes < 512) {
4428                         itrval = lowest_latency;
4429                 }
4430                 break;
4431         case bulk_latency: /* 250 usec aka 4000 ints/s */
4432                 if (bytes > 25000) {
4433                         if (packets > 35)
4434                                 itrval = low_latency;
4435                 } else if (bytes < 1500) {
4436                         itrval = low_latency;
4437                 }
4438                 break;
4439         }
4440
4441         /* clear work counters since we have the values we need */
4442         ring_container->total_bytes = 0;
4443         ring_container->total_packets = 0;
4444
4445         /* write updated itr to ring container */
4446         ring_container->itr = itrval;
4447 }
4448
4449 static void igb_set_itr(struct igb_q_vector *q_vector)
4450 {
4451         struct igb_adapter *adapter = q_vector->adapter;
4452         u32 new_itr = q_vector->itr_val;
4453         u8 current_itr = 0;
4454
4455         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4456         if (adapter->link_speed != SPEED_1000) {
4457                 current_itr = 0;
4458                 new_itr = IGB_4K_ITR;
4459                 goto set_itr_now;
4460         }
4461
4462         igb_update_itr(q_vector, &q_vector->tx);
4463         igb_update_itr(q_vector, &q_vector->rx);
4464
4465         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4466
4467         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4468         if (current_itr == lowest_latency &&
4469             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4470              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4471                 current_itr = low_latency;
4472
4473         switch (current_itr) {
4474         /* counts and packets in update_itr are dependent on these numbers */
4475         case lowest_latency:
4476                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4477                 break;
4478         case low_latency:
4479                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4480                 break;
4481         case bulk_latency:
4482                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4483                 break;
4484         default:
4485                 break;
4486         }
4487
4488 set_itr_now:
4489         if (new_itr != q_vector->itr_val) {
4490                 /* this attempts to bias the interrupt rate towards Bulk
4491                  * by adding intermediate steps when interrupt rate is
4492                  * increasing
4493                  */
4494                 new_itr = new_itr > q_vector->itr_val ?
4495                           max((new_itr * q_vector->itr_val) /
4496                           (new_itr + (q_vector->itr_val >> 2)),
4497                           new_itr) : new_itr;
4498                 /* Don't write the value here; it resets the adapter's
4499                  * internal timer, and causes us to delay far longer than
4500                  * we should between interrupts.  Instead, we write the ITR
4501                  * value at the beginning of the next interrupt so the timing
4502                  * ends up being correct.
4503                  */
4504                 q_vector->itr_val = new_itr;
4505                 q_vector->set_itr = 1;
4506         }
4507 }
4508
4509 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4510                             u32 type_tucmd, u32 mss_l4len_idx)
4511 {
4512         struct e1000_adv_tx_context_desc *context_desc;
4513         u16 i = tx_ring->next_to_use;
4514
4515         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4516
4517         i++;
4518         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4519
4520         /* set bits to identify this as an advanced context descriptor */
4521         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4522
4523         /* For 82575, context index must be unique per ring. */
4524         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4525                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4526
4527         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4528         context_desc->seqnum_seed       = 0;
4529         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4530         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4531 }
4532
4533 static int igb_tso(struct igb_ring *tx_ring,
4534                    struct igb_tx_buffer *first,
4535                    u8 *hdr_len)
4536 {
4537         struct sk_buff *skb = first->skb;
4538         u32 vlan_macip_lens, type_tucmd;
4539         u32 mss_l4len_idx, l4len;
4540
4541         if (skb->ip_summed != CHECKSUM_PARTIAL)
4542                 return 0;
4543
4544         if (!skb_is_gso(skb))
4545                 return 0;
4546
4547         if (skb_header_cloned(skb)) {
4548                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4549                 if (err)
4550                         return err;
4551         }
4552
4553         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4554         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4555
4556         if (first->protocol == __constant_htons(ETH_P_IP)) {
4557                 struct iphdr *iph = ip_hdr(skb);
4558                 iph->tot_len = 0;
4559                 iph->check = 0;
4560                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4561                                                          iph->daddr, 0,
4562                                                          IPPROTO_TCP,
4563                                                          0);
4564                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4565                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4566                                    IGB_TX_FLAGS_CSUM |
4567                                    IGB_TX_FLAGS_IPV4;
4568         } else if (skb_is_gso_v6(skb)) {
4569                 ipv6_hdr(skb)->payload_len = 0;
4570                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4571                                                        &ipv6_hdr(skb)->daddr,
4572                                                        0, IPPROTO_TCP, 0);
4573                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4574                                    IGB_TX_FLAGS_CSUM;
4575         }
4576
4577         /* compute header lengths */
4578         l4len = tcp_hdrlen(skb);
4579         *hdr_len = skb_transport_offset(skb) + l4len;
4580
4581         /* update gso size and bytecount with header size */
4582         first->gso_segs = skb_shinfo(skb)->gso_segs;
4583         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4584
4585         /* MSS L4LEN IDX */
4586         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4587         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4588
4589         /* VLAN MACLEN IPLEN */
4590         vlan_macip_lens = skb_network_header_len(skb);
4591         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4592         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4593
4594         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4595
4596         return 1;
4597 }
4598
4599 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4600 {
4601         struct sk_buff *skb = first->skb;
4602         u32 vlan_macip_lens = 0;
4603         u32 mss_l4len_idx = 0;
4604         u32 type_tucmd = 0;
4605
4606         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4607                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4608                         return;
4609         } else {
4610                 u8 l4_hdr = 0;
4611                 switch (first->protocol) {
4612                 case __constant_htons(ETH_P_IP):
4613                         vlan_macip_lens |= skb_network_header_len(skb);
4614                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4615                         l4_hdr = ip_hdr(skb)->protocol;
4616                         break;
4617                 case __constant_htons(ETH_P_IPV6):
4618                         vlan_macip_lens |= skb_network_header_len(skb);
4619                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4620                         break;
4621                 default:
4622                         if (unlikely(net_ratelimit())) {
4623                                 dev_warn(tx_ring->dev,
4624                                          "partial checksum but proto=%x!\n",
4625                                          first->protocol);
4626                         }
4627                         break;
4628                 }
4629
4630                 switch (l4_hdr) {
4631                 case IPPROTO_TCP:
4632                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4633                         mss_l4len_idx = tcp_hdrlen(skb) <<
4634                                         E1000_ADVTXD_L4LEN_SHIFT;
4635                         break;
4636                 case IPPROTO_SCTP:
4637                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4638                         mss_l4len_idx = sizeof(struct sctphdr) <<
4639                                         E1000_ADVTXD_L4LEN_SHIFT;
4640                         break;
4641                 case IPPROTO_UDP:
4642                         mss_l4len_idx = sizeof(struct udphdr) <<
4643                                         E1000_ADVTXD_L4LEN_SHIFT;
4644                         break;
4645                 default:
4646                         if (unlikely(net_ratelimit())) {
4647                                 dev_warn(tx_ring->dev,
4648                                          "partial checksum but l4 proto=%x!\n",
4649                                          l4_hdr);
4650                         }
4651                         break;
4652                 }
4653
4654                 /* update TX checksum flag */
4655                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4656         }
4657
4658         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4659         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4660
4661         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4662 }
4663
4664 #define IGB_SET_FLAG(_input, _flag, _result) \
4665         ((_flag <= _result) ? \
4666          ((u32)(_input & _flag) * (_result / _flag)) : \
4667          ((u32)(_input & _flag) / (_flag / _result)))
4668
4669 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4670 {
4671         /* set type for advanced descriptor with frame checksum insertion */
4672         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4673                        E1000_ADVTXD_DCMD_DEXT |
4674                        E1000_ADVTXD_DCMD_IFCS;
4675
4676         /* set HW vlan bit if vlan is present */
4677         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4678                                  (E1000_ADVTXD_DCMD_VLE));
4679
4680         /* set segmentation bits for TSO */
4681         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4682                                  (E1000_ADVTXD_DCMD_TSE));
4683
4684         /* set timestamp bit if present */
4685         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4686                                  (E1000_ADVTXD_MAC_TSTAMP));
4687
4688         /* insert frame checksum */
4689         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4690
4691         return cmd_type;
4692 }
4693
4694 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4695                                  union e1000_adv_tx_desc *tx_desc,
4696                                  u32 tx_flags, unsigned int paylen)
4697 {
4698         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4699
4700         /* 82575 requires a unique index per ring */
4701         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4702                 olinfo_status |= tx_ring->reg_idx << 4;
4703
4704         /* insert L4 checksum */
4705         olinfo_status |= IGB_SET_FLAG(tx_flags,
4706                                       IGB_TX_FLAGS_CSUM,
4707                                       (E1000_TXD_POPTS_TXSM << 8));
4708
4709         /* insert IPv4 checksum */
4710         olinfo_status |= IGB_SET_FLAG(tx_flags,
4711                                       IGB_TX_FLAGS_IPV4,
4712                                       (E1000_TXD_POPTS_IXSM << 8));
4713
4714         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4715 }
4716
4717 static void igb_tx_map(struct igb_ring *tx_ring,
4718                        struct igb_tx_buffer *first,
4719                        const u8 hdr_len)
4720 {
4721         struct sk_buff *skb = first->skb;
4722         struct igb_tx_buffer *tx_buffer;
4723         union e1000_adv_tx_desc *tx_desc;
4724         struct skb_frag_struct *frag;
4725         dma_addr_t dma;
4726         unsigned int data_len, size;
4727         u32 tx_flags = first->tx_flags;
4728         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4729         u16 i = tx_ring->next_to_use;
4730
4731         tx_desc = IGB_TX_DESC(tx_ring, i);
4732
4733         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4734
4735         size = skb_headlen(skb);
4736         data_len = skb->data_len;
4737
4738         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4739
4740         tx_buffer = first;
4741
4742         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4743                 if (dma_mapping_error(tx_ring->dev, dma))
4744                         goto dma_error;
4745
4746                 /* record length, and DMA address */
4747                 dma_unmap_len_set(tx_buffer, len, size);
4748                 dma_unmap_addr_set(tx_buffer, dma, dma);
4749
4750                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4751
4752                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4753                         tx_desc->read.cmd_type_len =
4754                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4755
4756                         i++;
4757                         tx_desc++;
4758                         if (i == tx_ring->count) {
4759                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4760                                 i = 0;
4761                         }
4762                         tx_desc->read.olinfo_status = 0;
4763
4764                         dma += IGB_MAX_DATA_PER_TXD;
4765                         size -= IGB_MAX_DATA_PER_TXD;
4766
4767                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4768                 }
4769
4770                 if (likely(!data_len))
4771                         break;
4772
4773                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4774
4775                 i++;
4776                 tx_desc++;
4777                 if (i == tx_ring->count) {
4778                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4779                         i = 0;
4780                 }
4781                 tx_desc->read.olinfo_status = 0;
4782
4783                 size = skb_frag_size(frag);
4784                 data_len -= size;
4785
4786                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4787                                        size, DMA_TO_DEVICE);
4788
4789                 tx_buffer = &tx_ring->tx_buffer_info[i];
4790         }
4791
4792         /* write last descriptor with RS and EOP bits */
4793         cmd_type |= size | IGB_TXD_DCMD;
4794         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4795
4796         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4797
4798         /* set the timestamp */
4799         first->time_stamp = jiffies;
4800
4801         /* Force memory writes to complete before letting h/w know there
4802          * are new descriptors to fetch.  (Only applicable for weak-ordered
4803          * memory model archs, such as IA-64).
4804          *
4805          * We also need this memory barrier to make certain all of the
4806          * status bits have been updated before next_to_watch is written.
4807          */
4808         wmb();
4809
4810         /* set next_to_watch value indicating a packet is present */
4811         first->next_to_watch = tx_desc;
4812
4813         i++;
4814         if (i == tx_ring->count)
4815                 i = 0;
4816
4817         tx_ring->next_to_use = i;
4818
4819         writel(i, tx_ring->tail);
4820
4821         /* we need this if more than one processor can write to our tail
4822          * at a time, it synchronizes IO on IA64/Altix systems
4823          */
4824         mmiowb();
4825
4826         return;
4827
4828 dma_error:
4829         dev_err(tx_ring->dev, "TX DMA map failed\n");
4830
4831         /* clear dma mappings for failed tx_buffer_info map */
4832         for (;;) {
4833                 tx_buffer = &tx_ring->tx_buffer_info[i];
4834                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4835                 if (tx_buffer == first)
4836                         break;
4837                 if (i == 0)
4838                         i = tx_ring->count;
4839                 i--;
4840         }
4841
4842         tx_ring->next_to_use = i;
4843 }
4844
4845 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4846 {
4847         struct net_device *netdev = tx_ring->netdev;
4848
4849         netif_stop_subqueue(netdev, tx_ring->queue_index);
4850
4851         /* Herbert's original patch had:
4852          *  smp_mb__after_netif_stop_queue();
4853          * but since that doesn't exist yet, just open code it.
4854          */
4855         smp_mb();
4856
4857         /* We need to check again in a case another CPU has just
4858          * made room available.
4859          */
4860         if (igb_desc_unused(tx_ring) < size)
4861                 return -EBUSY;
4862
4863         /* A reprieve! */
4864         netif_wake_subqueue(netdev, tx_ring->queue_index);
4865
4866         u64_stats_update_begin(&tx_ring->tx_syncp2);
4867         tx_ring->tx_stats.restart_queue2++;
4868         u64_stats_update_end(&tx_ring->tx_syncp2);
4869
4870         return 0;
4871 }
4872
4873 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4874 {
4875         if (igb_desc_unused(tx_ring) >= size)
4876                 return 0;
4877         return __igb_maybe_stop_tx(tx_ring, size);
4878 }
4879
4880 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4881                                 struct igb_ring *tx_ring)
4882 {
4883         struct igb_tx_buffer *first;
4884         int tso;
4885         u32 tx_flags = 0;
4886         u16 count = TXD_USE_COUNT(skb_headlen(skb));
4887         __be16 protocol = vlan_get_protocol(skb);
4888         u8 hdr_len = 0;
4889
4890         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4891          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4892          *       + 2 desc gap to keep tail from touching head,
4893          *       + 1 desc for context descriptor,
4894          * otherwise try next time
4895          */
4896         if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4897                 unsigned short f;
4898                 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4899                         count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4900         } else {
4901                 count += skb_shinfo(skb)->nr_frags;
4902         }
4903
4904         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4905                 /* this is a hard error */
4906                 return NETDEV_TX_BUSY;
4907         }
4908
4909         /* record the location of the first descriptor for this packet */
4910         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4911         first->skb = skb;
4912         first->bytecount = skb->len;
4913         first->gso_segs = 1;
4914
4915         skb_tx_timestamp(skb);
4916
4917         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4918                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4919
4920                 if (!(adapter->ptp_tx_skb)) {
4921                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4922                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
4923
4924                         adapter->ptp_tx_skb = skb_get(skb);
4925                         adapter->ptp_tx_start = jiffies;
4926                         if (adapter->hw.mac.type == e1000_82576)
4927                                 schedule_work(&adapter->ptp_tx_work);
4928                 }
4929         }
4930
4931         if (vlan_tx_tag_present(skb)) {
4932                 tx_flags |= IGB_TX_FLAGS_VLAN;
4933                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4934         }
4935
4936         /* record initial flags and protocol */
4937         first->tx_flags = tx_flags;
4938         first->protocol = protocol;
4939
4940         tso = igb_tso(tx_ring, first, &hdr_len);
4941         if (tso < 0)
4942                 goto out_drop;
4943         else if (!tso)
4944                 igb_tx_csum(tx_ring, first);
4945
4946         igb_tx_map(tx_ring, first, hdr_len);
4947
4948         /* Make sure there is space in the ring for the next send. */
4949         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4950
4951         return NETDEV_TX_OK;
4952
4953 out_drop:
4954         igb_unmap_and_free_tx_resource(tx_ring, first);
4955
4956         return NETDEV_TX_OK;
4957 }
4958
4959 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4960                                                     struct sk_buff *skb)
4961 {
4962         unsigned int r_idx = skb->queue_mapping;
4963
4964         if (r_idx >= adapter->num_tx_queues)
4965                 r_idx = r_idx % adapter->num_tx_queues;
4966
4967         return adapter->tx_ring[r_idx];
4968 }
4969
4970 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4971                                   struct net_device *netdev)
4972 {
4973         struct igb_adapter *adapter = netdev_priv(netdev);
4974
4975         if (test_bit(__IGB_DOWN, &adapter->state)) {
4976                 dev_kfree_skb_any(skb);
4977                 return NETDEV_TX_OK;
4978         }
4979
4980         if (skb->len <= 0) {
4981                 dev_kfree_skb_any(skb);
4982                 return NETDEV_TX_OK;
4983         }
4984
4985         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4986          * in order to meet this minimum size requirement.
4987          */
4988         if (unlikely(skb->len < 17)) {
4989                 if (skb_pad(skb, 17 - skb->len))
4990                         return NETDEV_TX_OK;
4991                 skb->len = 17;
4992                 skb_set_tail_pointer(skb, 17);
4993         }
4994
4995         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4996 }
4997
4998 /**
4999  *  igb_tx_timeout - Respond to a Tx Hang
5000  *  @netdev: network interface device structure
5001  **/
5002 static void igb_tx_timeout(struct net_device *netdev)
5003 {
5004         struct igb_adapter *adapter = netdev_priv(netdev);
5005         struct e1000_hw *hw = &adapter->hw;
5006
5007         /* Do the reset outside of interrupt context */
5008         adapter->tx_timeout_count++;
5009
5010         if (hw->mac.type >= e1000_82580)
5011                 hw->dev_spec._82575.global_device_reset = true;
5012
5013         schedule_work(&adapter->reset_task);
5014         wr32(E1000_EICS,
5015              (adapter->eims_enable_mask & ~adapter->eims_other));
5016 }
5017
5018 static void igb_reset_task(struct work_struct *work)
5019 {
5020         struct igb_adapter *adapter;
5021         adapter = container_of(work, struct igb_adapter, reset_task);
5022
5023         igb_dump(adapter);
5024         netdev_err(adapter->netdev, "Reset adapter\n");
5025         igb_reinit_locked(adapter);
5026 }
5027
5028 /**
5029  *  igb_get_stats64 - Get System Network Statistics
5030  *  @netdev: network interface device structure
5031  *  @stats: rtnl_link_stats64 pointer
5032  **/
5033 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5034                                                 struct rtnl_link_stats64 *stats)
5035 {
5036         struct igb_adapter *adapter = netdev_priv(netdev);
5037
5038         spin_lock(&adapter->stats64_lock);
5039         igb_update_stats(adapter, &adapter->stats64);
5040         memcpy(stats, &adapter->stats64, sizeof(*stats));
5041         spin_unlock(&adapter->stats64_lock);
5042
5043         return stats;
5044 }
5045
5046 /**
5047  *  igb_change_mtu - Change the Maximum Transfer Unit
5048  *  @netdev: network interface device structure
5049  *  @new_mtu: new value for maximum frame size
5050  *
5051  *  Returns 0 on success, negative on failure
5052  **/
5053 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5054 {
5055         struct igb_adapter *adapter = netdev_priv(netdev);
5056         struct pci_dev *pdev = adapter->pdev;
5057         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5058
5059         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5060                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5061                 return -EINVAL;
5062         }
5063
5064 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5065         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5066                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5067                 return -EINVAL;
5068         }
5069
5070         /* adjust max frame to be at least the size of a standard frame */
5071         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5072                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5073
5074         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5075                 msleep(1);
5076
5077         /* igb_down has a dependency on max_frame_size */
5078         adapter->max_frame_size = max_frame;
5079
5080         if (netif_running(netdev))
5081                 igb_down(adapter);
5082
5083         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5084                  netdev->mtu, new_mtu);
5085         netdev->mtu = new_mtu;
5086
5087         if (netif_running(netdev))
5088                 igb_up(adapter);
5089         else
5090                 igb_reset(adapter);
5091
5092         clear_bit(__IGB_RESETTING, &adapter->state);
5093
5094         return 0;
5095 }
5096
5097 /**
5098  *  igb_update_stats - Update the board statistics counters
5099  *  @adapter: board private structure
5100  **/
5101 void igb_update_stats(struct igb_adapter *adapter,
5102                       struct rtnl_link_stats64 *net_stats)
5103 {
5104         struct e1000_hw *hw = &adapter->hw;
5105         struct pci_dev *pdev = adapter->pdev;
5106         u32 reg, mpc;
5107         u16 phy_tmp;
5108         int i;
5109         u64 bytes, packets;
5110         unsigned int start;
5111         u64 _bytes, _packets;
5112
5113 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5114
5115         /* Prevent stats update while adapter is being reset, or if the pci
5116          * connection is down.
5117          */
5118         if (adapter->link_speed == 0)
5119                 return;
5120         if (pci_channel_offline(pdev))
5121                 return;
5122
5123         bytes = 0;
5124         packets = 0;
5125
5126         rcu_read_lock();
5127         for (i = 0; i < adapter->num_rx_queues; i++) {
5128                 u32 rqdpc = rd32(E1000_RQDPC(i));
5129                 struct igb_ring *ring = adapter->rx_ring[i];
5130
5131                 if (rqdpc) {
5132                         ring->rx_stats.drops += rqdpc;
5133                         net_stats->rx_fifo_errors += rqdpc;
5134                 }
5135
5136                 do {
5137                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
5138                         _bytes = ring->rx_stats.bytes;
5139                         _packets = ring->rx_stats.packets;
5140                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
5141                 bytes += _bytes;
5142                 packets += _packets;
5143         }
5144
5145         net_stats->rx_bytes = bytes;
5146         net_stats->rx_packets = packets;
5147
5148         bytes = 0;
5149         packets = 0;
5150         for (i = 0; i < adapter->num_tx_queues; i++) {
5151                 struct igb_ring *ring = adapter->tx_ring[i];
5152                 do {
5153                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
5154                         _bytes = ring->tx_stats.bytes;
5155                         _packets = ring->tx_stats.packets;
5156                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
5157                 bytes += _bytes;
5158                 packets += _packets;
5159         }
5160         net_stats->tx_bytes = bytes;
5161         net_stats->tx_packets = packets;
5162         rcu_read_unlock();
5163
5164         /* read stats registers */
5165         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5166         adapter->stats.gprc += rd32(E1000_GPRC);
5167         adapter->stats.gorc += rd32(E1000_GORCL);
5168         rd32(E1000_GORCH); /* clear GORCL */
5169         adapter->stats.bprc += rd32(E1000_BPRC);
5170         adapter->stats.mprc += rd32(E1000_MPRC);
5171         adapter->stats.roc += rd32(E1000_ROC);
5172
5173         adapter->stats.prc64 += rd32(E1000_PRC64);
5174         adapter->stats.prc127 += rd32(E1000_PRC127);
5175         adapter->stats.prc255 += rd32(E1000_PRC255);
5176         adapter->stats.prc511 += rd32(E1000_PRC511);
5177         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5178         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5179         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5180         adapter->stats.sec += rd32(E1000_SEC);
5181
5182         mpc = rd32(E1000_MPC);
5183         adapter->stats.mpc += mpc;
5184         net_stats->rx_fifo_errors += mpc;
5185         adapter->stats.scc += rd32(E1000_SCC);
5186         adapter->stats.ecol += rd32(E1000_ECOL);
5187         adapter->stats.mcc += rd32(E1000_MCC);
5188         adapter->stats.latecol += rd32(E1000_LATECOL);
5189         adapter->stats.dc += rd32(E1000_DC);
5190         adapter->stats.rlec += rd32(E1000_RLEC);
5191         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5192         adapter->stats.xontxc += rd32(E1000_XONTXC);
5193         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5194         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5195         adapter->stats.fcruc += rd32(E1000_FCRUC);
5196         adapter->stats.gptc += rd32(E1000_GPTC);
5197         adapter->stats.gotc += rd32(E1000_GOTCL);
5198         rd32(E1000_GOTCH); /* clear GOTCL */
5199         adapter->stats.rnbc += rd32(E1000_RNBC);
5200         adapter->stats.ruc += rd32(E1000_RUC);
5201         adapter->stats.rfc += rd32(E1000_RFC);
5202         adapter->stats.rjc += rd32(E1000_RJC);
5203         adapter->stats.tor += rd32(E1000_TORH);
5204         adapter->stats.tot += rd32(E1000_TOTH);
5205         adapter->stats.tpr += rd32(E1000_TPR);
5206
5207         adapter->stats.ptc64 += rd32(E1000_PTC64);
5208         adapter->stats.ptc127 += rd32(E1000_PTC127);
5209         adapter->stats.ptc255 += rd32(E1000_PTC255);
5210         adapter->stats.ptc511 += rd32(E1000_PTC511);
5211         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5212         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5213
5214         adapter->stats.mptc += rd32(E1000_MPTC);
5215         adapter->stats.bptc += rd32(E1000_BPTC);
5216
5217         adapter->stats.tpt += rd32(E1000_TPT);
5218         adapter->stats.colc += rd32(E1000_COLC);
5219
5220         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5221         /* read internal phy specific stats */
5222         reg = rd32(E1000_CTRL_EXT);
5223         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5224                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5225
5226                 /* this stat has invalid values on i210/i211 */
5227                 if ((hw->mac.type != e1000_i210) &&
5228                     (hw->mac.type != e1000_i211))
5229                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5230         }
5231
5232         adapter->stats.tsctc += rd32(E1000_TSCTC);
5233         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5234
5235         adapter->stats.iac += rd32(E1000_IAC);
5236         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5237         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5238         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5239         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5240         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5241         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5242         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5243         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5244
5245         /* Fill out the OS statistics structure */
5246         net_stats->multicast = adapter->stats.mprc;
5247         net_stats->collisions = adapter->stats.colc;
5248
5249         /* Rx Errors */
5250
5251         /* RLEC on some newer hardware can be incorrect so build
5252          * our own version based on RUC and ROC
5253          */
5254         net_stats->rx_errors = adapter->stats.rxerrc +
5255                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5256                 adapter->stats.ruc + adapter->stats.roc +
5257                 adapter->stats.cexterr;
5258         net_stats->rx_length_errors = adapter->stats.ruc +
5259                                       adapter->stats.roc;
5260         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5261         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5262         net_stats->rx_missed_errors = adapter->stats.mpc;
5263
5264         /* Tx Errors */
5265         net_stats->tx_errors = adapter->stats.ecol +
5266                                adapter->stats.latecol;
5267         net_stats->tx_aborted_errors = adapter->stats.ecol;
5268         net_stats->tx_window_errors = adapter->stats.latecol;
5269         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5270
5271         /* Tx Dropped needs to be maintained elsewhere */
5272
5273         /* Phy Stats */
5274         if (hw->phy.media_type == e1000_media_type_copper) {
5275                 if ((adapter->link_speed == SPEED_1000) &&
5276                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5277                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5278                         adapter->phy_stats.idle_errors += phy_tmp;
5279                 }
5280         }
5281
5282         /* Management Stats */
5283         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5284         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5285         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5286
5287         /* OS2BMC Stats */
5288         reg = rd32(E1000_MANC);
5289         if (reg & E1000_MANC_EN_BMC2OS) {
5290                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5291                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5292                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5293                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5294         }
5295 }
5296
5297 static irqreturn_t igb_msix_other(int irq, void *data)
5298 {
5299         struct igb_adapter *adapter = data;
5300         struct e1000_hw *hw = &adapter->hw;
5301         u32 icr = rd32(E1000_ICR);
5302         /* reading ICR causes bit 31 of EICR to be cleared */
5303
5304         if (icr & E1000_ICR_DRSTA)
5305                 schedule_work(&adapter->reset_task);
5306
5307         if (icr & E1000_ICR_DOUTSYNC) {
5308                 /* HW is reporting DMA is out of sync */
5309                 adapter->stats.doosync++;
5310                 /* The DMA Out of Sync is also indication of a spoof event
5311                  * in IOV mode. Check the Wrong VM Behavior register to
5312                  * see if it is really a spoof event.
5313                  */
5314                 igb_check_wvbr(adapter);
5315         }
5316
5317         /* Check for a mailbox event */
5318         if (icr & E1000_ICR_VMMB)
5319                 igb_msg_task(adapter);
5320
5321         if (icr & E1000_ICR_LSC) {
5322                 hw->mac.get_link_status = 1;
5323                 /* guard against interrupt when we're going down */
5324                 if (!test_bit(__IGB_DOWN, &adapter->state))
5325                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5326         }
5327
5328         if (icr & E1000_ICR_TS) {
5329                 u32 tsicr = rd32(E1000_TSICR);
5330
5331                 if (tsicr & E1000_TSICR_TXTS) {
5332                         /* acknowledge the interrupt */
5333                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5334                         /* retrieve hardware timestamp */
5335                         schedule_work(&adapter->ptp_tx_work);
5336                 }
5337         }
5338
5339         wr32(E1000_EIMS, adapter->eims_other);
5340
5341         return IRQ_HANDLED;
5342 }
5343
5344 static void igb_write_itr(struct igb_q_vector *q_vector)
5345 {
5346         struct igb_adapter *adapter = q_vector->adapter;
5347         u32 itr_val = q_vector->itr_val & 0x7FFC;
5348
5349         if (!q_vector->set_itr)
5350                 return;
5351
5352         if (!itr_val)
5353                 itr_val = 0x4;
5354
5355         if (adapter->hw.mac.type == e1000_82575)
5356                 itr_val |= itr_val << 16;
5357         else
5358                 itr_val |= E1000_EITR_CNT_IGNR;
5359
5360         writel(itr_val, q_vector->itr_register);
5361         q_vector->set_itr = 0;
5362 }
5363
5364 static irqreturn_t igb_msix_ring(int irq, void *data)
5365 {
5366         struct igb_q_vector *q_vector = data;
5367
5368         /* Write the ITR value calculated from the previous interrupt. */
5369         igb_write_itr(q_vector);
5370
5371         napi_schedule(&q_vector->napi);
5372
5373         return IRQ_HANDLED;
5374 }
5375
5376 #ifdef CONFIG_IGB_DCA
5377 static void igb_update_tx_dca(struct igb_adapter *adapter,
5378                               struct igb_ring *tx_ring,
5379                               int cpu)
5380 {
5381         struct e1000_hw *hw = &adapter->hw;
5382         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5383
5384         if (hw->mac.type != e1000_82575)
5385                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5386
5387         /* We can enable relaxed ordering for reads, but not writes when
5388          * DCA is enabled.  This is due to a known issue in some chipsets
5389          * which will cause the DCA tag to be cleared.
5390          */
5391         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5392                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5393                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5394
5395         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5396 }
5397
5398 static void igb_update_rx_dca(struct igb_adapter *adapter,
5399                               struct igb_ring *rx_ring,
5400                               int cpu)
5401 {
5402         struct e1000_hw *hw = &adapter->hw;
5403         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5404
5405         if (hw->mac.type != e1000_82575)
5406                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5407
5408         /* We can enable relaxed ordering for reads, but not writes when
5409          * DCA is enabled.  This is due to a known issue in some chipsets
5410          * which will cause the DCA tag to be cleared.
5411          */
5412         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5413                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5414
5415         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5416 }
5417
5418 static void igb_update_dca(struct igb_q_vector *q_vector)
5419 {
5420         struct igb_adapter *adapter = q_vector->adapter;
5421         int cpu = get_cpu();
5422
5423         if (q_vector->cpu == cpu)
5424                 goto out_no_update;
5425
5426         if (q_vector->tx.ring)
5427                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5428
5429         if (q_vector->rx.ring)
5430                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5431
5432         q_vector->cpu = cpu;
5433 out_no_update:
5434         put_cpu();
5435 }
5436
5437 static void igb_setup_dca(struct igb_adapter *adapter)
5438 {
5439         struct e1000_hw *hw = &adapter->hw;
5440         int i;
5441
5442         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5443                 return;
5444
5445         /* Always use CB2 mode, difference is masked in the CB driver. */
5446         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5447
5448         for (i = 0; i < adapter->num_q_vectors; i++) {
5449                 adapter->q_vector[i]->cpu = -1;
5450                 igb_update_dca(adapter->q_vector[i]);
5451         }
5452 }
5453
5454 static int __igb_notify_dca(struct device *dev, void *data)
5455 {
5456         struct net_device *netdev = dev_get_drvdata(dev);
5457         struct igb_adapter *adapter = netdev_priv(netdev);
5458         struct pci_dev *pdev = adapter->pdev;
5459         struct e1000_hw *hw = &adapter->hw;
5460         unsigned long event = *(unsigned long *)data;
5461
5462         switch (event) {
5463         case DCA_PROVIDER_ADD:
5464                 /* if already enabled, don't do it again */
5465                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5466                         break;
5467                 if (dca_add_requester(dev) == 0) {
5468                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5469                         dev_info(&pdev->dev, "DCA enabled\n");
5470                         igb_setup_dca(adapter);
5471                         break;
5472                 }
5473                 /* Fall Through since DCA is disabled. */
5474         case DCA_PROVIDER_REMOVE:
5475                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5476                         /* without this a class_device is left
5477                          * hanging around in the sysfs model
5478                          */
5479                         dca_remove_requester(dev);
5480                         dev_info(&pdev->dev, "DCA disabled\n");
5481                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5482                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5483                 }
5484                 break;
5485         }
5486
5487         return 0;
5488 }
5489
5490 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5491                           void *p)
5492 {
5493         int ret_val;
5494
5495         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5496                                          __igb_notify_dca);
5497
5498         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5499 }
5500 #endif /* CONFIG_IGB_DCA */
5501
5502 #ifdef CONFIG_PCI_IOV
5503 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5504 {
5505         unsigned char mac_addr[ETH_ALEN];
5506
5507         eth_zero_addr(mac_addr);
5508         igb_set_vf_mac(adapter, vf, mac_addr);
5509
5510         /* By default spoof check is enabled for all VFs */
5511         adapter->vf_data[vf].spoofchk_enabled = true;
5512
5513         return 0;
5514 }
5515
5516 #endif
5517 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5518 {
5519         struct e1000_hw *hw = &adapter->hw;
5520         u32 ping;
5521         int i;
5522
5523         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5524                 ping = E1000_PF_CONTROL_MSG;
5525                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5526                         ping |= E1000_VT_MSGTYPE_CTS;
5527                 igb_write_mbx(hw, &ping, 1, i);
5528         }
5529 }
5530
5531 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5532 {
5533         struct e1000_hw *hw = &adapter->hw;
5534         u32 vmolr = rd32(E1000_VMOLR(vf));
5535         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5536
5537         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5538                             IGB_VF_FLAG_MULTI_PROMISC);
5539         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5540
5541         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5542                 vmolr |= E1000_VMOLR_MPME;
5543                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5544                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5545         } else {
5546                 /* if we have hashes and we are clearing a multicast promisc
5547                  * flag we need to write the hashes to the MTA as this step
5548                  * was previously skipped
5549                  */
5550                 if (vf_data->num_vf_mc_hashes > 30) {
5551                         vmolr |= E1000_VMOLR_MPME;
5552                 } else if (vf_data->num_vf_mc_hashes) {
5553                         int j;
5554                         vmolr |= E1000_VMOLR_ROMPE;
5555                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5556                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5557                 }
5558         }
5559
5560         wr32(E1000_VMOLR(vf), vmolr);
5561
5562         /* there are flags left unprocessed, likely not supported */
5563         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5564                 return -EINVAL;
5565
5566         return 0;
5567 }
5568
5569 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5570                                   u32 *msgbuf, u32 vf)
5571 {
5572         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5573         u16 *hash_list = (u16 *)&msgbuf[1];
5574         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5575         int i;
5576
5577         /* salt away the number of multicast addresses assigned
5578          * to this VF for later use to restore when the PF multi cast
5579          * list changes
5580          */
5581         vf_data->num_vf_mc_hashes = n;
5582
5583         /* only up to 30 hash values supported */
5584         if (n > 30)
5585                 n = 30;
5586
5587         /* store the hashes for later use */
5588         for (i = 0; i < n; i++)
5589                 vf_data->vf_mc_hashes[i] = hash_list[i];
5590
5591         /* Flush and reset the mta with the new values */
5592         igb_set_rx_mode(adapter->netdev);
5593
5594         return 0;
5595 }
5596
5597 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5598 {
5599         struct e1000_hw *hw = &adapter->hw;
5600         struct vf_data_storage *vf_data;
5601         int i, j;
5602
5603         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5604                 u32 vmolr = rd32(E1000_VMOLR(i));
5605                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5606
5607                 vf_data = &adapter->vf_data[i];
5608
5609                 if ((vf_data->num_vf_mc_hashes > 30) ||
5610                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5611                         vmolr |= E1000_VMOLR_MPME;
5612                 } else if (vf_data->num_vf_mc_hashes) {
5613                         vmolr |= E1000_VMOLR_ROMPE;
5614                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5615                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5616                 }
5617                 wr32(E1000_VMOLR(i), vmolr);
5618         }
5619 }
5620
5621 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5622 {
5623         struct e1000_hw *hw = &adapter->hw;
5624         u32 pool_mask, reg, vid;
5625         int i;
5626
5627         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5628
5629         /* Find the vlan filter for this id */
5630         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5631                 reg = rd32(E1000_VLVF(i));
5632
5633                 /* remove the vf from the pool */
5634                 reg &= ~pool_mask;
5635
5636                 /* if pool is empty then remove entry from vfta */
5637                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5638                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5639                         reg = 0;
5640                         vid = reg & E1000_VLVF_VLANID_MASK;
5641                         igb_vfta_set(hw, vid, false);
5642                 }
5643
5644                 wr32(E1000_VLVF(i), reg);
5645         }
5646
5647         adapter->vf_data[vf].vlans_enabled = 0;
5648 }
5649
5650 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5651 {
5652         struct e1000_hw *hw = &adapter->hw;
5653         u32 reg, i;
5654
5655         /* The vlvf table only exists on 82576 hardware and newer */
5656         if (hw->mac.type < e1000_82576)
5657                 return -1;
5658
5659         /* we only need to do this if VMDq is enabled */
5660         if (!adapter->vfs_allocated_count)
5661                 return -1;
5662
5663         /* Find the vlan filter for this id */
5664         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5665                 reg = rd32(E1000_VLVF(i));
5666                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5667                     vid == (reg & E1000_VLVF_VLANID_MASK))
5668                         break;
5669         }
5670
5671         if (add) {
5672                 if (i == E1000_VLVF_ARRAY_SIZE) {
5673                         /* Did not find a matching VLAN ID entry that was
5674                          * enabled.  Search for a free filter entry, i.e.
5675                          * one without the enable bit set
5676                          */
5677                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5678                                 reg = rd32(E1000_VLVF(i));
5679                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5680                                         break;
5681                         }
5682                 }
5683                 if (i < E1000_VLVF_ARRAY_SIZE) {
5684                         /* Found an enabled/available entry */
5685                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5686
5687                         /* if !enabled we need to set this up in vfta */
5688                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5689                                 /* add VID to filter table */
5690                                 igb_vfta_set(hw, vid, true);
5691                                 reg |= E1000_VLVF_VLANID_ENABLE;
5692                         }
5693                         reg &= ~E1000_VLVF_VLANID_MASK;
5694                         reg |= vid;
5695                         wr32(E1000_VLVF(i), reg);
5696
5697                         /* do not modify RLPML for PF devices */
5698                         if (vf >= adapter->vfs_allocated_count)
5699                                 return 0;
5700
5701                         if (!adapter->vf_data[vf].vlans_enabled) {
5702                                 u32 size;
5703                                 reg = rd32(E1000_VMOLR(vf));
5704                                 size = reg & E1000_VMOLR_RLPML_MASK;
5705                                 size += 4;
5706                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5707                                 reg |= size;
5708                                 wr32(E1000_VMOLR(vf), reg);
5709                         }
5710
5711                         adapter->vf_data[vf].vlans_enabled++;
5712                 }
5713         } else {
5714                 if (i < E1000_VLVF_ARRAY_SIZE) {
5715                         /* remove vf from the pool */
5716                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5717                         /* if pool is empty then remove entry from vfta */
5718                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5719                                 reg = 0;
5720                                 igb_vfta_set(hw, vid, false);
5721                         }
5722                         wr32(E1000_VLVF(i), reg);
5723
5724                         /* do not modify RLPML for PF devices */
5725                         if (vf >= adapter->vfs_allocated_count)
5726                                 return 0;
5727
5728                         adapter->vf_data[vf].vlans_enabled--;
5729                         if (!adapter->vf_data[vf].vlans_enabled) {
5730                                 u32 size;
5731                                 reg = rd32(E1000_VMOLR(vf));
5732                                 size = reg & E1000_VMOLR_RLPML_MASK;
5733                                 size -= 4;
5734                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5735                                 reg |= size;
5736                                 wr32(E1000_VMOLR(vf), reg);
5737                         }
5738                 }
5739         }
5740         return 0;
5741 }
5742
5743 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5744 {
5745         struct e1000_hw *hw = &adapter->hw;
5746
5747         if (vid)
5748                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5749         else
5750                 wr32(E1000_VMVIR(vf), 0);
5751 }
5752
5753 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5754                                int vf, u16 vlan, u8 qos)
5755 {
5756         int err = 0;
5757         struct igb_adapter *adapter = netdev_priv(netdev);
5758
5759         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5760                 return -EINVAL;
5761         if (vlan || qos) {
5762                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5763                 if (err)
5764                         goto out;
5765                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5766                 igb_set_vmolr(adapter, vf, !vlan);
5767                 adapter->vf_data[vf].pf_vlan = vlan;
5768                 adapter->vf_data[vf].pf_qos = qos;
5769                 dev_info(&adapter->pdev->dev,
5770                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5771                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5772                         dev_warn(&adapter->pdev->dev,
5773                                  "The VF VLAN has been set, but the PF device is not up.\n");
5774                         dev_warn(&adapter->pdev->dev,
5775                                  "Bring the PF device up before attempting to use the VF device.\n");
5776                 }
5777         } else {
5778                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5779                              false, vf);
5780                 igb_set_vmvir(adapter, vlan, vf);
5781                 igb_set_vmolr(adapter, vf, true);
5782                 adapter->vf_data[vf].pf_vlan = 0;
5783                 adapter->vf_data[vf].pf_qos = 0;
5784         }
5785 out:
5786         return err;
5787 }
5788
5789 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5790 {
5791         struct e1000_hw *hw = &adapter->hw;
5792         int i;
5793         u32 reg;
5794
5795         /* Find the vlan filter for this id */
5796         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5797                 reg = rd32(E1000_VLVF(i));
5798                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5799                     vid == (reg & E1000_VLVF_VLANID_MASK))
5800                         break;
5801         }
5802
5803         if (i >= E1000_VLVF_ARRAY_SIZE)
5804                 i = -1;
5805
5806         return i;
5807 }
5808
5809 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5810 {
5811         struct e1000_hw *hw = &adapter->hw;
5812         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5813         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5814         int err = 0;
5815
5816         /* If in promiscuous mode we need to make sure the PF also has
5817          * the VLAN filter set.
5818          */
5819         if (add && (adapter->netdev->flags & IFF_PROMISC))
5820                 err = igb_vlvf_set(adapter, vid, add,
5821                                    adapter->vfs_allocated_count);
5822         if (err)
5823                 goto out;
5824
5825         err = igb_vlvf_set(adapter, vid, add, vf);
5826
5827         if (err)
5828                 goto out;
5829
5830         /* Go through all the checks to see if the VLAN filter should
5831          * be wiped completely.
5832          */
5833         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5834                 u32 vlvf, bits;
5835
5836                 int regndx = igb_find_vlvf_entry(adapter, vid);
5837                 if (regndx < 0)
5838                         goto out;
5839                 /* See if any other pools are set for this VLAN filter
5840                  * entry other than the PF.
5841                  */
5842                 vlvf = bits = rd32(E1000_VLVF(regndx));
5843                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5844                               adapter->vfs_allocated_count);
5845                 /* If the filter was removed then ensure PF pool bit
5846                  * is cleared if the PF only added itself to the pool
5847                  * because the PF is in promiscuous mode.
5848                  */
5849                 if ((vlvf & VLAN_VID_MASK) == vid &&
5850                     !test_bit(vid, adapter->active_vlans) &&
5851                     !bits)
5852                         igb_vlvf_set(adapter, vid, add,
5853                                      adapter->vfs_allocated_count);
5854         }
5855
5856 out:
5857         return err;
5858 }
5859
5860 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5861 {
5862         /* clear flags - except flag that indicates PF has set the MAC */
5863         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5864         adapter->vf_data[vf].last_nack = jiffies;
5865
5866         /* reset offloads to defaults */
5867         igb_set_vmolr(adapter, vf, true);
5868
5869         /* reset vlans for device */
5870         igb_clear_vf_vfta(adapter, vf);
5871         if (adapter->vf_data[vf].pf_vlan)
5872                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5873                                     adapter->vf_data[vf].pf_vlan,
5874                                     adapter->vf_data[vf].pf_qos);
5875         else
5876                 igb_clear_vf_vfta(adapter, vf);
5877
5878         /* reset multicast table array for vf */
5879         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5880
5881         /* Flush and reset the mta with the new values */
5882         igb_set_rx_mode(adapter->netdev);
5883 }
5884
5885 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5886 {
5887         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5888
5889         /* clear mac address as we were hotplug removed/added */
5890         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5891                 eth_zero_addr(vf_mac);
5892
5893         /* process remaining reset events */
5894         igb_vf_reset(adapter, vf);
5895 }
5896
5897 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5898 {
5899         struct e1000_hw *hw = &adapter->hw;
5900         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5901         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5902         u32 reg, msgbuf[3];
5903         u8 *addr = (u8 *)(&msgbuf[1]);
5904
5905         /* process all the same items cleared in a function level reset */
5906         igb_vf_reset(adapter, vf);
5907
5908         /* set vf mac address */
5909         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5910
5911         /* enable transmit and receive for vf */
5912         reg = rd32(E1000_VFTE);
5913         wr32(E1000_VFTE, reg | (1 << vf));
5914         reg = rd32(E1000_VFRE);
5915         wr32(E1000_VFRE, reg | (1 << vf));
5916
5917         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5918
5919         /* reply to reset with ack and vf mac address */
5920         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5921         memcpy(addr, vf_mac, ETH_ALEN);
5922         igb_write_mbx(hw, msgbuf, 3, vf);
5923 }
5924
5925 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5926 {
5927         /* The VF MAC Address is stored in a packed array of bytes
5928          * starting at the second 32 bit word of the msg array
5929          */
5930         unsigned char *addr = (char *)&msg[1];
5931         int err = -1;
5932
5933         if (is_valid_ether_addr(addr))
5934                 err = igb_set_vf_mac(adapter, vf, addr);
5935
5936         return err;
5937 }
5938
5939 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5940 {
5941         struct e1000_hw *hw = &adapter->hw;
5942         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5943         u32 msg = E1000_VT_MSGTYPE_NACK;
5944
5945         /* if device isn't clear to send it shouldn't be reading either */
5946         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5947             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5948                 igb_write_mbx(hw, &msg, 1, vf);
5949                 vf_data->last_nack = jiffies;
5950         }
5951 }
5952
5953 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5954 {
5955         struct pci_dev *pdev = adapter->pdev;
5956         u32 msgbuf[E1000_VFMAILBOX_SIZE];
5957         struct e1000_hw *hw = &adapter->hw;
5958         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5959         s32 retval;
5960
5961         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5962
5963         if (retval) {
5964                 /* if receive failed revoke VF CTS stats and restart init */
5965                 dev_err(&pdev->dev, "Error receiving message from VF\n");
5966                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5967                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5968                         return;
5969                 goto out;
5970         }
5971
5972         /* this is a message we already processed, do nothing */
5973         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5974                 return;
5975
5976         /* until the vf completes a reset it should not be
5977          * allowed to start any configuration.
5978          */
5979         if (msgbuf[0] == E1000_VF_RESET) {
5980                 igb_vf_reset_msg(adapter, vf);
5981                 return;
5982         }
5983
5984         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5985                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5986                         return;
5987                 retval = -1;
5988                 goto out;
5989         }
5990
5991         switch ((msgbuf[0] & 0xFFFF)) {
5992         case E1000_VF_SET_MAC_ADDR:
5993                 retval = -EINVAL;
5994                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5995                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5996                 else
5997                         dev_warn(&pdev->dev,
5998                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5999                                  vf);
6000                 break;
6001         case E1000_VF_SET_PROMISC:
6002                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6003                 break;
6004         case E1000_VF_SET_MULTICAST:
6005                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6006                 break;
6007         case E1000_VF_SET_LPE:
6008                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6009                 break;
6010         case E1000_VF_SET_VLAN:
6011                 retval = -1;
6012                 if (vf_data->pf_vlan)
6013                         dev_warn(&pdev->dev,
6014                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6015                                  vf);
6016                 else
6017                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6018                 break;
6019         default:
6020                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6021                 retval = -1;
6022                 break;
6023         }
6024
6025         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6026 out:
6027         /* notify the VF of the results of what it sent us */
6028         if (retval)
6029                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6030         else
6031                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6032
6033         igb_write_mbx(hw, msgbuf, 1, vf);
6034 }
6035
6036 static void igb_msg_task(struct igb_adapter *adapter)
6037 {
6038         struct e1000_hw *hw = &adapter->hw;
6039         u32 vf;
6040
6041         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6042                 /* process any reset requests */
6043                 if (!igb_check_for_rst(hw, vf))
6044                         igb_vf_reset_event(adapter, vf);
6045
6046                 /* process any messages pending */
6047                 if (!igb_check_for_msg(hw, vf))
6048                         igb_rcv_msg_from_vf(adapter, vf);
6049
6050                 /* process any acks */
6051                 if (!igb_check_for_ack(hw, vf))
6052                         igb_rcv_ack_from_vf(adapter, vf);
6053         }
6054 }
6055
6056 /**
6057  *  igb_set_uta - Set unicast filter table address
6058  *  @adapter: board private structure
6059  *
6060  *  The unicast table address is a register array of 32-bit registers.
6061  *  The table is meant to be used in a way similar to how the MTA is used
6062  *  however due to certain limitations in the hardware it is necessary to
6063  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6064  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6065  **/
6066 static void igb_set_uta(struct igb_adapter *adapter)
6067 {
6068         struct e1000_hw *hw = &adapter->hw;
6069         int i;
6070
6071         /* The UTA table only exists on 82576 hardware and newer */
6072         if (hw->mac.type < e1000_82576)
6073                 return;
6074
6075         /* we only need to do this if VMDq is enabled */
6076         if (!adapter->vfs_allocated_count)
6077                 return;
6078
6079         for (i = 0; i < hw->mac.uta_reg_count; i++)
6080                 array_wr32(E1000_UTA, i, ~0);
6081 }
6082
6083 /**
6084  *  igb_intr_msi - Interrupt Handler
6085  *  @irq: interrupt number
6086  *  @data: pointer to a network interface device structure
6087  **/
6088 static irqreturn_t igb_intr_msi(int irq, void *data)
6089 {
6090         struct igb_adapter *adapter = data;
6091         struct igb_q_vector *q_vector = adapter->q_vector[0];
6092         struct e1000_hw *hw = &adapter->hw;
6093         /* read ICR disables interrupts using IAM */
6094         u32 icr = rd32(E1000_ICR);
6095
6096         igb_write_itr(q_vector);
6097
6098         if (icr & E1000_ICR_DRSTA)
6099                 schedule_work(&adapter->reset_task);
6100
6101         if (icr & E1000_ICR_DOUTSYNC) {
6102                 /* HW is reporting DMA is out of sync */
6103                 adapter->stats.doosync++;
6104         }
6105
6106         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6107                 hw->mac.get_link_status = 1;
6108                 if (!test_bit(__IGB_DOWN, &adapter->state))
6109                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6110         }
6111
6112         if (icr & E1000_ICR_TS) {
6113                 u32 tsicr = rd32(E1000_TSICR);
6114
6115                 if (tsicr & E1000_TSICR_TXTS) {
6116                         /* acknowledge the interrupt */
6117                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6118                         /* retrieve hardware timestamp */
6119                         schedule_work(&adapter->ptp_tx_work);
6120                 }
6121         }
6122
6123         napi_schedule(&q_vector->napi);
6124
6125         return IRQ_HANDLED;
6126 }
6127
6128 /**
6129  *  igb_intr - Legacy Interrupt Handler
6130  *  @irq: interrupt number
6131  *  @data: pointer to a network interface device structure
6132  **/
6133 static irqreturn_t igb_intr(int irq, void *data)
6134 {
6135         struct igb_adapter *adapter = data;
6136         struct igb_q_vector *q_vector = adapter->q_vector[0];
6137         struct e1000_hw *hw = &adapter->hw;
6138         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6139          * need for the IMC write
6140          */
6141         u32 icr = rd32(E1000_ICR);
6142
6143         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6144          * not set, then the adapter didn't send an interrupt
6145          */
6146         if (!(icr & E1000_ICR_INT_ASSERTED))
6147                 return IRQ_NONE;
6148
6149         igb_write_itr(q_vector);
6150
6151         if (icr & E1000_ICR_DRSTA)
6152                 schedule_work(&adapter->reset_task);
6153
6154         if (icr & E1000_ICR_DOUTSYNC) {
6155                 /* HW is reporting DMA is out of sync */
6156                 adapter->stats.doosync++;
6157         }
6158
6159         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6160                 hw->mac.get_link_status = 1;
6161                 /* guard against interrupt when we're going down */
6162                 if (!test_bit(__IGB_DOWN, &adapter->state))
6163                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6164         }
6165
6166         if (icr & E1000_ICR_TS) {
6167                 u32 tsicr = rd32(E1000_TSICR);
6168
6169                 if (tsicr & E1000_TSICR_TXTS) {
6170                         /* acknowledge the interrupt */
6171                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6172                         /* retrieve hardware timestamp */
6173                         schedule_work(&adapter->ptp_tx_work);
6174                 }
6175         }
6176
6177         napi_schedule(&q_vector->napi);
6178
6179         return IRQ_HANDLED;
6180 }
6181
6182 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6183 {
6184         struct igb_adapter *adapter = q_vector->adapter;
6185         struct e1000_hw *hw = &adapter->hw;
6186
6187         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6188             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6189                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6190                         igb_set_itr(q_vector);
6191                 else
6192                         igb_update_ring_itr(q_vector);
6193         }
6194
6195         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6196                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6197                         wr32(E1000_EIMS, q_vector->eims_value);
6198                 else
6199                         igb_irq_enable(adapter);
6200         }
6201 }
6202
6203 /**
6204  *  igb_poll - NAPI Rx polling callback
6205  *  @napi: napi polling structure
6206  *  @budget: count of how many packets we should handle
6207  **/
6208 static int igb_poll(struct napi_struct *napi, int budget)
6209 {
6210         struct igb_q_vector *q_vector = container_of(napi,
6211                                                      struct igb_q_vector,
6212                                                      napi);
6213         bool clean_complete = true;
6214
6215 #ifdef CONFIG_IGB_DCA
6216         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6217                 igb_update_dca(q_vector);
6218 #endif
6219         if (q_vector->tx.ring)
6220                 clean_complete = igb_clean_tx_irq(q_vector);
6221
6222         if (q_vector->rx.ring)
6223                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6224
6225         /* If all work not completed, return budget and keep polling */
6226         if (!clean_complete)
6227                 return budget;
6228
6229         /* If not enough Rx work done, exit the polling mode */
6230         napi_complete(napi);
6231         igb_ring_irq_enable(q_vector);
6232
6233         return 0;
6234 }
6235
6236 /**
6237  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6238  *  @q_vector: pointer to q_vector containing needed info
6239  *
6240  *  returns true if ring is completely cleaned
6241  **/
6242 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6243 {
6244         struct igb_adapter *adapter = q_vector->adapter;
6245         struct igb_ring *tx_ring = q_vector->tx.ring;
6246         struct igb_tx_buffer *tx_buffer;
6247         union e1000_adv_tx_desc *tx_desc;
6248         unsigned int total_bytes = 0, total_packets = 0;
6249         unsigned int budget = q_vector->tx.work_limit;
6250         unsigned int i = tx_ring->next_to_clean;
6251
6252         if (test_bit(__IGB_DOWN, &adapter->state))
6253                 return true;
6254
6255         tx_buffer = &tx_ring->tx_buffer_info[i];
6256         tx_desc = IGB_TX_DESC(tx_ring, i);
6257         i -= tx_ring->count;
6258
6259         do {
6260                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6261
6262                 /* if next_to_watch is not set then there is no work pending */
6263                 if (!eop_desc)
6264                         break;
6265
6266                 /* prevent any other reads prior to eop_desc */
6267                 read_barrier_depends();
6268
6269                 /* if DD is not set pending work has not been completed */
6270                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6271                         break;
6272
6273                 /* clear next_to_watch to prevent false hangs */
6274                 tx_buffer->next_to_watch = NULL;
6275
6276                 /* update the statistics for this packet */
6277                 total_bytes += tx_buffer->bytecount;
6278                 total_packets += tx_buffer->gso_segs;
6279
6280                 /* free the skb */
6281                 dev_kfree_skb_any(tx_buffer->skb);
6282
6283                 /* unmap skb header data */
6284                 dma_unmap_single(tx_ring->dev,
6285                                  dma_unmap_addr(tx_buffer, dma),
6286                                  dma_unmap_len(tx_buffer, len),
6287                                  DMA_TO_DEVICE);
6288
6289                 /* clear tx_buffer data */
6290                 tx_buffer->skb = NULL;
6291                 dma_unmap_len_set(tx_buffer, len, 0);
6292
6293                 /* clear last DMA location and unmap remaining buffers */
6294                 while (tx_desc != eop_desc) {
6295                         tx_buffer++;
6296                         tx_desc++;
6297                         i++;
6298                         if (unlikely(!i)) {
6299                                 i -= tx_ring->count;
6300                                 tx_buffer = tx_ring->tx_buffer_info;
6301                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6302                         }
6303
6304                         /* unmap any remaining paged data */
6305                         if (dma_unmap_len(tx_buffer, len)) {
6306                                 dma_unmap_page(tx_ring->dev,
6307                                                dma_unmap_addr(tx_buffer, dma),
6308                                                dma_unmap_len(tx_buffer, len),
6309                                                DMA_TO_DEVICE);
6310                                 dma_unmap_len_set(tx_buffer, len, 0);
6311                         }
6312                 }
6313
6314                 /* move us one more past the eop_desc for start of next pkt */
6315                 tx_buffer++;
6316                 tx_desc++;
6317                 i++;
6318                 if (unlikely(!i)) {
6319                         i -= tx_ring->count;
6320                         tx_buffer = tx_ring->tx_buffer_info;
6321                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6322                 }
6323
6324                 /* issue prefetch for next Tx descriptor */
6325                 prefetch(tx_desc);
6326
6327                 /* update budget accounting */
6328                 budget--;
6329         } while (likely(budget));
6330
6331         netdev_tx_completed_queue(txring_txq(tx_ring),
6332                                   total_packets, total_bytes);
6333         i += tx_ring->count;
6334         tx_ring->next_to_clean = i;
6335         u64_stats_update_begin(&tx_ring->tx_syncp);
6336         tx_ring->tx_stats.bytes += total_bytes;
6337         tx_ring->tx_stats.packets += total_packets;
6338         u64_stats_update_end(&tx_ring->tx_syncp);
6339         q_vector->tx.total_bytes += total_bytes;
6340         q_vector->tx.total_packets += total_packets;
6341
6342         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6343                 struct e1000_hw *hw = &adapter->hw;
6344
6345                 /* Detect a transmit hang in hardware, this serializes the
6346                  * check with the clearing of time_stamp and movement of i
6347                  */
6348                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6349                 if (tx_buffer->next_to_watch &&
6350                     time_after(jiffies, tx_buffer->time_stamp +
6351                                (adapter->tx_timeout_factor * HZ)) &&
6352                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6353
6354                         /* detected Tx unit hang */
6355                         dev_err(tx_ring->dev,
6356                                 "Detected Tx Unit Hang\n"
6357                                 "  Tx Queue             <%d>\n"
6358                                 "  TDH                  <%x>\n"
6359                                 "  TDT                  <%x>\n"
6360                                 "  next_to_use          <%x>\n"
6361                                 "  next_to_clean        <%x>\n"
6362                                 "buffer_info[next_to_clean]\n"
6363                                 "  time_stamp           <%lx>\n"
6364                                 "  next_to_watch        <%p>\n"
6365                                 "  jiffies              <%lx>\n"
6366                                 "  desc.status          <%x>\n",
6367                                 tx_ring->queue_index,
6368                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6369                                 readl(tx_ring->tail),
6370                                 tx_ring->next_to_use,
6371                                 tx_ring->next_to_clean,
6372                                 tx_buffer->time_stamp,
6373                                 tx_buffer->next_to_watch,
6374                                 jiffies,
6375                                 tx_buffer->next_to_watch->wb.status);
6376                         netif_stop_subqueue(tx_ring->netdev,
6377                                             tx_ring->queue_index);
6378
6379                         /* we are about to reset, no point in enabling stuff */
6380                         return true;
6381                 }
6382         }
6383
6384 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6385         if (unlikely(total_packets &&
6386             netif_carrier_ok(tx_ring->netdev) &&
6387             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6388                 /* Make sure that anybody stopping the queue after this
6389                  * sees the new next_to_clean.
6390                  */
6391                 smp_mb();
6392                 if (__netif_subqueue_stopped(tx_ring->netdev,
6393                                              tx_ring->queue_index) &&
6394                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6395                         netif_wake_subqueue(tx_ring->netdev,
6396                                             tx_ring->queue_index);
6397
6398                         u64_stats_update_begin(&tx_ring->tx_syncp);
6399                         tx_ring->tx_stats.restart_queue++;
6400                         u64_stats_update_end(&tx_ring->tx_syncp);
6401                 }
6402         }
6403
6404         return !!budget;
6405 }
6406
6407 /**
6408  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6409  *  @rx_ring: rx descriptor ring to store buffers on
6410  *  @old_buff: donor buffer to have page reused
6411  *
6412  *  Synchronizes page for reuse by the adapter
6413  **/
6414 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6415                               struct igb_rx_buffer *old_buff)
6416 {
6417         struct igb_rx_buffer *new_buff;
6418         u16 nta = rx_ring->next_to_alloc;
6419
6420         new_buff = &rx_ring->rx_buffer_info[nta];
6421
6422         /* update, and store next to alloc */
6423         nta++;
6424         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6425
6426         /* transfer page from old buffer to new buffer */
6427         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6428
6429         /* sync the buffer for use by the device */
6430         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6431                                          old_buff->page_offset,
6432                                          IGB_RX_BUFSZ,
6433                                          DMA_FROM_DEVICE);
6434 }
6435
6436 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6437                                   struct page *page,
6438                                   unsigned int truesize)
6439 {
6440         /* avoid re-using remote pages */
6441         if (unlikely(page_to_nid(page) != numa_node_id()))
6442                 return false;
6443
6444 #if (PAGE_SIZE < 8192)
6445         /* if we are only owner of page we can reuse it */
6446         if (unlikely(page_count(page) != 1))
6447                 return false;
6448
6449         /* flip page offset to other buffer */
6450         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6451
6452         /* since we are the only owner of the page and we need to
6453          * increment it, just set the value to 2 in order to avoid
6454          * an unnecessary locked operation
6455          */
6456         atomic_set(&page->_count, 2);
6457 #else
6458         /* move offset up to the next cache line */
6459         rx_buffer->page_offset += truesize;
6460
6461         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6462                 return false;
6463
6464         /* bump ref count on page before it is given to the stack */
6465         get_page(page);
6466 #endif
6467
6468         return true;
6469 }
6470
6471 /**
6472  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6473  *  @rx_ring: rx descriptor ring to transact packets on
6474  *  @rx_buffer: buffer containing page to add
6475  *  @rx_desc: descriptor containing length of buffer written by hardware
6476  *  @skb: sk_buff to place the data into
6477  *
6478  *  This function will add the data contained in rx_buffer->page to the skb.
6479  *  This is done either through a direct copy if the data in the buffer is
6480  *  less than the skb header size, otherwise it will just attach the page as
6481  *  a frag to the skb.
6482  *
6483  *  The function will then update the page offset if necessary and return
6484  *  true if the buffer can be reused by the adapter.
6485  **/
6486 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6487                             struct igb_rx_buffer *rx_buffer,
6488                             union e1000_adv_rx_desc *rx_desc,
6489                             struct sk_buff *skb)
6490 {
6491         struct page *page = rx_buffer->page;
6492         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6493 #if (PAGE_SIZE < 8192)
6494         unsigned int truesize = IGB_RX_BUFSZ;
6495 #else
6496         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6497 #endif
6498
6499         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6500                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6501
6502                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6503                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6504                         va += IGB_TS_HDR_LEN;
6505                         size -= IGB_TS_HDR_LEN;
6506                 }
6507
6508                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6509
6510                 /* we can reuse buffer as-is, just make sure it is local */
6511                 if (likely(page_to_nid(page) == numa_node_id()))
6512                         return true;
6513
6514                 /* this page cannot be reused so discard it */
6515                 put_page(page);
6516                 return false;
6517         }
6518
6519         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6520                         rx_buffer->page_offset, size, truesize);
6521
6522         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6523 }
6524
6525 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6526                                            union e1000_adv_rx_desc *rx_desc,
6527                                            struct sk_buff *skb)
6528 {
6529         struct igb_rx_buffer *rx_buffer;
6530         struct page *page;
6531
6532         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6533
6534         page = rx_buffer->page;
6535         prefetchw(page);
6536
6537         if (likely(!skb)) {
6538                 void *page_addr = page_address(page) +
6539                                   rx_buffer->page_offset;
6540
6541                 /* prefetch first cache line of first page */
6542                 prefetch(page_addr);
6543 #if L1_CACHE_BYTES < 128
6544                 prefetch(page_addr + L1_CACHE_BYTES);
6545 #endif
6546
6547                 /* allocate a skb to store the frags */
6548                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6549                                                 IGB_RX_HDR_LEN);
6550                 if (unlikely(!skb)) {
6551                         rx_ring->rx_stats.alloc_failed++;
6552                         return NULL;
6553                 }
6554
6555                 /* we will be copying header into skb->data in
6556                  * pskb_may_pull so it is in our interest to prefetch
6557                  * it now to avoid a possible cache miss
6558                  */
6559                 prefetchw(skb->data);
6560         }
6561
6562         /* we are reusing so sync this buffer for CPU use */
6563         dma_sync_single_range_for_cpu(rx_ring->dev,
6564                                       rx_buffer->dma,
6565                                       rx_buffer->page_offset,
6566                                       IGB_RX_BUFSZ,
6567                                       DMA_FROM_DEVICE);
6568
6569         /* pull page into skb */
6570         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6571                 /* hand second half of page back to the ring */
6572                 igb_reuse_rx_page(rx_ring, rx_buffer);
6573         } else {
6574                 /* we are not reusing the buffer so unmap it */
6575                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6576                                PAGE_SIZE, DMA_FROM_DEVICE);
6577         }
6578
6579         /* clear contents of rx_buffer */
6580         rx_buffer->page = NULL;
6581
6582         return skb;
6583 }
6584
6585 static inline void igb_rx_checksum(struct igb_ring *ring,
6586                                    union e1000_adv_rx_desc *rx_desc,
6587                                    struct sk_buff *skb)
6588 {
6589         skb_checksum_none_assert(skb);
6590
6591         /* Ignore Checksum bit is set */
6592         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6593                 return;
6594
6595         /* Rx checksum disabled via ethtool */
6596         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6597                 return;
6598
6599         /* TCP/UDP checksum error bit is set */
6600         if (igb_test_staterr(rx_desc,
6601                              E1000_RXDEXT_STATERR_TCPE |
6602                              E1000_RXDEXT_STATERR_IPE)) {
6603                 /* work around errata with sctp packets where the TCPE aka
6604                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6605                  * packets, (aka let the stack check the crc32c)
6606                  */
6607                 if (!((skb->len == 60) &&
6608                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6609                         u64_stats_update_begin(&ring->rx_syncp);
6610                         ring->rx_stats.csum_err++;
6611                         u64_stats_update_end(&ring->rx_syncp);
6612                 }
6613                 /* let the stack verify checksum errors */
6614                 return;
6615         }
6616         /* It must be a TCP or UDP packet with a valid checksum */
6617         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6618                                       E1000_RXD_STAT_UDPCS))
6619                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6620
6621         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6622                 le32_to_cpu(rx_desc->wb.upper.status_error));
6623 }
6624
6625 static inline void igb_rx_hash(struct igb_ring *ring,
6626                                union e1000_adv_rx_desc *rx_desc,
6627                                struct sk_buff *skb)
6628 {
6629         if (ring->netdev->features & NETIF_F_RXHASH)
6630                 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6631 }
6632
6633 /**
6634  *  igb_is_non_eop - process handling of non-EOP buffers
6635  *  @rx_ring: Rx ring being processed
6636  *  @rx_desc: Rx descriptor for current buffer
6637  *  @skb: current socket buffer containing buffer in progress
6638  *
6639  *  This function updates next to clean.  If the buffer is an EOP buffer
6640  *  this function exits returning false, otherwise it will place the
6641  *  sk_buff in the next buffer to be chained and return true indicating
6642  *  that this is in fact a non-EOP buffer.
6643  **/
6644 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6645                            union e1000_adv_rx_desc *rx_desc)
6646 {
6647         u32 ntc = rx_ring->next_to_clean + 1;
6648
6649         /* fetch, update, and store next to clean */
6650         ntc = (ntc < rx_ring->count) ? ntc : 0;
6651         rx_ring->next_to_clean = ntc;
6652
6653         prefetch(IGB_RX_DESC(rx_ring, ntc));
6654
6655         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6656                 return false;
6657
6658         return true;
6659 }
6660
6661 /**
6662  *  igb_get_headlen - determine size of header for LRO/GRO
6663  *  @data: pointer to the start of the headers
6664  *  @max_len: total length of section to find headers in
6665  *
6666  *  This function is meant to determine the length of headers that will
6667  *  be recognized by hardware for LRO, and GRO offloads.  The main
6668  *  motivation of doing this is to only perform one pull for IPv4 TCP
6669  *  packets so that we can do basic things like calculating the gso_size
6670  *  based on the average data per packet.
6671  **/
6672 static unsigned int igb_get_headlen(unsigned char *data,
6673                                     unsigned int max_len)
6674 {
6675         union {
6676                 unsigned char *network;
6677                 /* l2 headers */
6678                 struct ethhdr *eth;
6679                 struct vlan_hdr *vlan;
6680                 /* l3 headers */
6681                 struct iphdr *ipv4;
6682                 struct ipv6hdr *ipv6;
6683         } hdr;
6684         __be16 protocol;
6685         u8 nexthdr = 0; /* default to not TCP */
6686         u8 hlen;
6687
6688         /* this should never happen, but better safe than sorry */
6689         if (max_len < ETH_HLEN)
6690                 return max_len;
6691
6692         /* initialize network frame pointer */
6693         hdr.network = data;
6694
6695         /* set first protocol and move network header forward */
6696         protocol = hdr.eth->h_proto;
6697         hdr.network += ETH_HLEN;
6698
6699         /* handle any vlan tag if present */
6700         if (protocol == __constant_htons(ETH_P_8021Q)) {
6701                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6702                         return max_len;
6703
6704                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6705                 hdr.network += VLAN_HLEN;
6706         }
6707
6708         /* handle L3 protocols */
6709         if (protocol == __constant_htons(ETH_P_IP)) {
6710                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6711                         return max_len;
6712
6713                 /* access ihl as a u8 to avoid unaligned access on ia64 */
6714                 hlen = (hdr.network[0] & 0x0F) << 2;
6715
6716                 /* verify hlen meets minimum size requirements */
6717                 if (hlen < sizeof(struct iphdr))
6718                         return hdr.network - data;
6719
6720                 /* record next protocol if header is present */
6721                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6722                         nexthdr = hdr.ipv4->protocol;
6723         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6724                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6725                         return max_len;
6726
6727                 /* record next protocol */
6728                 nexthdr = hdr.ipv6->nexthdr;
6729                 hlen = sizeof(struct ipv6hdr);
6730         } else {
6731                 return hdr.network - data;
6732         }
6733
6734         /* relocate pointer to start of L4 header */
6735         hdr.network += hlen;
6736
6737         /* finally sort out TCP */
6738         if (nexthdr == IPPROTO_TCP) {
6739                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6740                         return max_len;
6741
6742                 /* access doff as a u8 to avoid unaligned access on ia64 */
6743                 hlen = (hdr.network[12] & 0xF0) >> 2;
6744
6745                 /* verify hlen meets minimum size requirements */
6746                 if (hlen < sizeof(struct tcphdr))
6747                         return hdr.network - data;
6748
6749                 hdr.network += hlen;
6750         } else if (nexthdr == IPPROTO_UDP) {
6751                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6752                         return max_len;
6753
6754                 hdr.network += sizeof(struct udphdr);
6755         }
6756
6757         /* If everything has gone correctly hdr.network should be the
6758          * data section of the packet and will be the end of the header.
6759          * If not then it probably represents the end of the last recognized
6760          * header.
6761          */
6762         if ((hdr.network - data) < max_len)
6763                 return hdr.network - data;
6764         else
6765                 return max_len;
6766 }
6767
6768 /**
6769  *  igb_pull_tail - igb specific version of skb_pull_tail
6770  *  @rx_ring: rx descriptor ring packet is being transacted on
6771  *  @rx_desc: pointer to the EOP Rx descriptor
6772  *  @skb: pointer to current skb being adjusted
6773  *
6774  *  This function is an igb specific version of __pskb_pull_tail.  The
6775  *  main difference between this version and the original function is that
6776  *  this function can make several assumptions about the state of things
6777  *  that allow for significant optimizations versus the standard function.
6778  *  As a result we can do things like drop a frag and maintain an accurate
6779  *  truesize for the skb.
6780  */
6781 static void igb_pull_tail(struct igb_ring *rx_ring,
6782                           union e1000_adv_rx_desc *rx_desc,
6783                           struct sk_buff *skb)
6784 {
6785         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6786         unsigned char *va;
6787         unsigned int pull_len;
6788
6789         /* it is valid to use page_address instead of kmap since we are
6790          * working with pages allocated out of the lomem pool per
6791          * alloc_page(GFP_ATOMIC)
6792          */
6793         va = skb_frag_address(frag);
6794
6795         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6796                 /* retrieve timestamp from buffer */
6797                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6798
6799                 /* update pointers to remove timestamp header */
6800                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6801                 frag->page_offset += IGB_TS_HDR_LEN;
6802                 skb->data_len -= IGB_TS_HDR_LEN;
6803                 skb->len -= IGB_TS_HDR_LEN;
6804
6805                 /* move va to start of packet data */
6806                 va += IGB_TS_HDR_LEN;
6807         }
6808
6809         /* we need the header to contain the greater of either ETH_HLEN or
6810          * 60 bytes if the skb->len is less than 60 for skb_pad.
6811          */
6812         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6813
6814         /* align pull length to size of long to optimize memcpy performance */
6815         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6816
6817         /* update all of the pointers */
6818         skb_frag_size_sub(frag, pull_len);
6819         frag->page_offset += pull_len;
6820         skb->data_len -= pull_len;
6821         skb->tail += pull_len;
6822 }
6823
6824 /**
6825  *  igb_cleanup_headers - Correct corrupted or empty headers
6826  *  @rx_ring: rx descriptor ring packet is being transacted on
6827  *  @rx_desc: pointer to the EOP Rx descriptor
6828  *  @skb: pointer to current skb being fixed
6829  *
6830  *  Address the case where we are pulling data in on pages only
6831  *  and as such no data is present in the skb header.
6832  *
6833  *  In addition if skb is not at least 60 bytes we need to pad it so that
6834  *  it is large enough to qualify as a valid Ethernet frame.
6835  *
6836  *  Returns true if an error was encountered and skb was freed.
6837  **/
6838 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6839                                 union e1000_adv_rx_desc *rx_desc,
6840                                 struct sk_buff *skb)
6841 {
6842         if (unlikely((igb_test_staterr(rx_desc,
6843                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6844                 struct net_device *netdev = rx_ring->netdev;
6845                 if (!(netdev->features & NETIF_F_RXALL)) {
6846                         dev_kfree_skb_any(skb);
6847                         return true;
6848                 }
6849         }
6850
6851         /* place header in linear portion of buffer */
6852         if (skb_is_nonlinear(skb))
6853                 igb_pull_tail(rx_ring, rx_desc, skb);
6854
6855         /* if skb_pad returns an error the skb was freed */
6856         if (unlikely(skb->len < 60)) {
6857                 int pad_len = 60 - skb->len;
6858
6859                 if (skb_pad(skb, pad_len))
6860                         return true;
6861                 __skb_put(skb, pad_len);
6862         }
6863
6864         return false;
6865 }
6866
6867 /**
6868  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6869  *  @rx_ring: rx descriptor ring packet is being transacted on
6870  *  @rx_desc: pointer to the EOP Rx descriptor
6871  *  @skb: pointer to current skb being populated
6872  *
6873  *  This function checks the ring, descriptor, and packet information in
6874  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6875  *  other fields within the skb.
6876  **/
6877 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6878                                    union e1000_adv_rx_desc *rx_desc,
6879                                    struct sk_buff *skb)
6880 {
6881         struct net_device *dev = rx_ring->netdev;
6882
6883         igb_rx_hash(rx_ring, rx_desc, skb);
6884
6885         igb_rx_checksum(rx_ring, rx_desc, skb);
6886
6887         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
6888
6889         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6890             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6891                 u16 vid;
6892                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6893                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6894                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6895                 else
6896                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6897
6898                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6899         }
6900
6901         skb_record_rx_queue(skb, rx_ring->queue_index);
6902
6903         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6904 }
6905
6906 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6907 {
6908         struct igb_ring *rx_ring = q_vector->rx.ring;
6909         struct sk_buff *skb = rx_ring->skb;
6910         unsigned int total_bytes = 0, total_packets = 0;
6911         u16 cleaned_count = igb_desc_unused(rx_ring);
6912
6913         do {
6914                 union e1000_adv_rx_desc *rx_desc;
6915
6916                 /* return some buffers to hardware, one at a time is too slow */
6917                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6918                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6919                         cleaned_count = 0;
6920                 }
6921
6922                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6923
6924                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6925                         break;
6926
6927                 /* This memory barrier is needed to keep us from reading
6928                  * any other fields out of the rx_desc until we know the
6929                  * RXD_STAT_DD bit is set
6930                  */
6931                 rmb();
6932
6933                 /* retrieve a buffer from the ring */
6934                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6935
6936                 /* exit if we failed to retrieve a buffer */
6937                 if (!skb)
6938                         break;
6939
6940                 cleaned_count++;
6941
6942                 /* fetch next buffer in frame if non-eop */
6943                 if (igb_is_non_eop(rx_ring, rx_desc))
6944                         continue;
6945
6946                 /* verify the packet layout is correct */
6947                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6948                         skb = NULL;
6949                         continue;
6950                 }
6951
6952                 /* probably a little skewed due to removing CRC */
6953                 total_bytes += skb->len;
6954
6955                 /* populate checksum, timestamp, VLAN, and protocol */
6956                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6957
6958                 napi_gro_receive(&q_vector->napi, skb);
6959
6960                 /* reset skb pointer */
6961                 skb = NULL;
6962
6963                 /* update budget accounting */
6964                 total_packets++;
6965         } while (likely(total_packets < budget));
6966
6967         /* place incomplete frames back on ring for completion */
6968         rx_ring->skb = skb;
6969
6970         u64_stats_update_begin(&rx_ring->rx_syncp);
6971         rx_ring->rx_stats.packets += total_packets;
6972         rx_ring->rx_stats.bytes += total_bytes;
6973         u64_stats_update_end(&rx_ring->rx_syncp);
6974         q_vector->rx.total_packets += total_packets;
6975         q_vector->rx.total_bytes += total_bytes;
6976
6977         if (cleaned_count)
6978                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6979
6980         return (total_packets < budget);
6981 }
6982
6983 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6984                                   struct igb_rx_buffer *bi)
6985 {
6986         struct page *page = bi->page;
6987         dma_addr_t dma;
6988
6989         /* since we are recycling buffers we should seldom need to alloc */
6990         if (likely(page))
6991                 return true;
6992
6993         /* alloc new page for storage */
6994         page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6995         if (unlikely(!page)) {
6996                 rx_ring->rx_stats.alloc_failed++;
6997                 return false;
6998         }
6999
7000         /* map page for use */
7001         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7002
7003         /* if mapping failed free memory back to system since
7004          * there isn't much point in holding memory we can't use
7005          */
7006         if (dma_mapping_error(rx_ring->dev, dma)) {
7007                 __free_page(page);
7008
7009                 rx_ring->rx_stats.alloc_failed++;
7010                 return false;
7011         }
7012
7013         bi->dma = dma;
7014         bi->page = page;
7015         bi->page_offset = 0;
7016
7017         return true;
7018 }
7019
7020 /**
7021  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7022  *  @adapter: address of board private structure
7023  **/
7024 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7025 {
7026         union e1000_adv_rx_desc *rx_desc;
7027         struct igb_rx_buffer *bi;
7028         u16 i = rx_ring->next_to_use;
7029
7030         /* nothing to do */
7031         if (!cleaned_count)
7032                 return;
7033
7034         rx_desc = IGB_RX_DESC(rx_ring, i);
7035         bi = &rx_ring->rx_buffer_info[i];
7036         i -= rx_ring->count;
7037
7038         do {
7039                 if (!igb_alloc_mapped_page(rx_ring, bi))
7040                         break;
7041
7042                 /* Refresh the desc even if buffer_addrs didn't change
7043                  * because each write-back erases this info.
7044                  */
7045                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7046
7047                 rx_desc++;
7048                 bi++;
7049                 i++;
7050                 if (unlikely(!i)) {
7051                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7052                         bi = rx_ring->rx_buffer_info;
7053                         i -= rx_ring->count;
7054                 }
7055
7056                 /* clear the hdr_addr for the next_to_use descriptor */
7057                 rx_desc->read.hdr_addr = 0;
7058
7059                 cleaned_count--;
7060         } while (cleaned_count);
7061
7062         i += rx_ring->count;
7063
7064         if (rx_ring->next_to_use != i) {
7065                 /* record the next descriptor to use */
7066                 rx_ring->next_to_use = i;
7067
7068                 /* update next to alloc since we have filled the ring */
7069                 rx_ring->next_to_alloc = i;
7070
7071                 /* Force memory writes to complete before letting h/w
7072                  * know there are new descriptors to fetch.  (Only
7073                  * applicable for weak-ordered memory model archs,
7074                  * such as IA-64).
7075                  */
7076                 wmb();
7077                 writel(i, rx_ring->tail);
7078         }
7079 }
7080
7081 /**
7082  * igb_mii_ioctl -
7083  * @netdev:
7084  * @ifreq:
7085  * @cmd:
7086  **/
7087 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7088 {
7089         struct igb_adapter *adapter = netdev_priv(netdev);
7090         struct mii_ioctl_data *data = if_mii(ifr);
7091
7092         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7093                 return -EOPNOTSUPP;
7094
7095         switch (cmd) {
7096         case SIOCGMIIPHY:
7097                 data->phy_id = adapter->hw.phy.addr;
7098                 break;
7099         case SIOCGMIIREG:
7100                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7101                                      &data->val_out))
7102                         return -EIO;
7103                 break;
7104         case SIOCSMIIREG:
7105         default:
7106                 return -EOPNOTSUPP;
7107         }
7108         return 0;
7109 }
7110
7111 /**
7112  * igb_ioctl -
7113  * @netdev:
7114  * @ifreq:
7115  * @cmd:
7116  **/
7117 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7118 {
7119         switch (cmd) {
7120         case SIOCGMIIPHY:
7121         case SIOCGMIIREG:
7122         case SIOCSMIIREG:
7123                 return igb_mii_ioctl(netdev, ifr, cmd);
7124         case SIOCSHWTSTAMP:
7125                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
7126         default:
7127                 return -EOPNOTSUPP;
7128         }
7129 }
7130
7131 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7132 {
7133         struct igb_adapter *adapter = hw->back;
7134
7135         pci_read_config_word(adapter->pdev, reg, value);
7136 }
7137
7138 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7139 {
7140         struct igb_adapter *adapter = hw->back;
7141
7142         pci_write_config_word(adapter->pdev, reg, *value);
7143 }
7144
7145 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7146 {
7147         struct igb_adapter *adapter = hw->back;
7148
7149         if (pcie_capability_read_word(adapter->pdev, reg, value))
7150                 return -E1000_ERR_CONFIG;
7151
7152         return 0;
7153 }
7154
7155 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7156 {
7157         struct igb_adapter *adapter = hw->back;
7158
7159         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7160                 return -E1000_ERR_CONFIG;
7161
7162         return 0;
7163 }
7164
7165 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7166 {
7167         struct igb_adapter *adapter = netdev_priv(netdev);
7168         struct e1000_hw *hw = &adapter->hw;
7169         u32 ctrl, rctl;
7170         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7171
7172         if (enable) {
7173                 /* enable VLAN tag insert/strip */
7174                 ctrl = rd32(E1000_CTRL);
7175                 ctrl |= E1000_CTRL_VME;
7176                 wr32(E1000_CTRL, ctrl);
7177
7178                 /* Disable CFI check */
7179                 rctl = rd32(E1000_RCTL);
7180                 rctl &= ~E1000_RCTL_CFIEN;
7181                 wr32(E1000_RCTL, rctl);
7182         } else {
7183                 /* disable VLAN tag insert/strip */
7184                 ctrl = rd32(E1000_CTRL);
7185                 ctrl &= ~E1000_CTRL_VME;
7186                 wr32(E1000_CTRL, ctrl);
7187         }
7188
7189         igb_rlpml_set(adapter);
7190 }
7191
7192 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7193                                __be16 proto, u16 vid)
7194 {
7195         struct igb_adapter *adapter = netdev_priv(netdev);
7196         struct e1000_hw *hw = &adapter->hw;
7197         int pf_id = adapter->vfs_allocated_count;
7198
7199         /* attempt to add filter to vlvf array */
7200         igb_vlvf_set(adapter, vid, true, pf_id);
7201
7202         /* add the filter since PF can receive vlans w/o entry in vlvf */
7203         igb_vfta_set(hw, vid, true);
7204
7205         set_bit(vid, adapter->active_vlans);
7206
7207         return 0;
7208 }
7209
7210 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7211                                 __be16 proto, u16 vid)
7212 {
7213         struct igb_adapter *adapter = netdev_priv(netdev);
7214         struct e1000_hw *hw = &adapter->hw;
7215         int pf_id = adapter->vfs_allocated_count;
7216         s32 err;
7217
7218         /* remove vlan from VLVF table array */
7219         err = igb_vlvf_set(adapter, vid, false, pf_id);
7220
7221         /* if vid was not present in VLVF just remove it from table */
7222         if (err)
7223                 igb_vfta_set(hw, vid, false);
7224
7225         clear_bit(vid, adapter->active_vlans);
7226
7227         return 0;
7228 }
7229
7230 static void igb_restore_vlan(struct igb_adapter *adapter)
7231 {
7232         u16 vid;
7233
7234         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7235
7236         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7237                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7238 }
7239
7240 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7241 {
7242         struct pci_dev *pdev = adapter->pdev;
7243         struct e1000_mac_info *mac = &adapter->hw.mac;
7244
7245         mac->autoneg = 0;
7246
7247         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7248          * for the switch() below to work
7249          */
7250         if ((spd & 1) || (dplx & ~1))
7251                 goto err_inval;
7252
7253         /* Fiber NIC's only allow 1000 gbps Full duplex
7254          * and 100Mbps Full duplex for 100baseFx sfp
7255          */
7256         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7257                 switch (spd + dplx) {
7258                 case SPEED_10 + DUPLEX_HALF:
7259                 case SPEED_10 + DUPLEX_FULL:
7260                 case SPEED_100 + DUPLEX_HALF:
7261                         goto err_inval;
7262                 default:
7263                         break;
7264                 }
7265         }
7266
7267         switch (spd + dplx) {
7268         case SPEED_10 + DUPLEX_HALF:
7269                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7270                 break;
7271         case SPEED_10 + DUPLEX_FULL:
7272                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7273                 break;
7274         case SPEED_100 + DUPLEX_HALF:
7275                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7276                 break;
7277         case SPEED_100 + DUPLEX_FULL:
7278                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7279                 break;
7280         case SPEED_1000 + DUPLEX_FULL:
7281                 mac->autoneg = 1;
7282                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7283                 break;
7284         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7285         default:
7286                 goto err_inval;
7287         }
7288
7289         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7290         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7291
7292         return 0;
7293
7294 err_inval:
7295         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7296         return -EINVAL;
7297 }
7298
7299 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7300                           bool runtime)
7301 {
7302         struct net_device *netdev = pci_get_drvdata(pdev);
7303         struct igb_adapter *adapter = netdev_priv(netdev);
7304         struct e1000_hw *hw = &adapter->hw;
7305         u32 ctrl, rctl, status;
7306         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7307 #ifdef CONFIG_PM
7308         int retval = 0;
7309 #endif
7310
7311         netif_device_detach(netdev);
7312
7313         if (netif_running(netdev))
7314                 __igb_close(netdev, true);
7315
7316         igb_clear_interrupt_scheme(adapter);
7317
7318 #ifdef CONFIG_PM
7319         retval = pci_save_state(pdev);
7320         if (retval)
7321                 return retval;
7322 #endif
7323
7324         status = rd32(E1000_STATUS);
7325         if (status & E1000_STATUS_LU)
7326                 wufc &= ~E1000_WUFC_LNKC;
7327
7328         if (wufc) {
7329                 igb_setup_rctl(adapter);
7330                 igb_set_rx_mode(netdev);
7331
7332                 /* turn on all-multi mode if wake on multicast is enabled */
7333                 if (wufc & E1000_WUFC_MC) {
7334                         rctl = rd32(E1000_RCTL);
7335                         rctl |= E1000_RCTL_MPE;
7336                         wr32(E1000_RCTL, rctl);
7337                 }
7338
7339                 ctrl = rd32(E1000_CTRL);
7340                 /* advertise wake from D3Cold */
7341                 #define E1000_CTRL_ADVD3WUC 0x00100000
7342                 /* phy power management enable */
7343                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7344                 ctrl |= E1000_CTRL_ADVD3WUC;
7345                 wr32(E1000_CTRL, ctrl);
7346
7347                 /* Allow time for pending master requests to run */
7348                 igb_disable_pcie_master(hw);
7349
7350                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7351                 wr32(E1000_WUFC, wufc);
7352         } else {
7353                 wr32(E1000_WUC, 0);
7354                 wr32(E1000_WUFC, 0);
7355         }
7356
7357         *enable_wake = wufc || adapter->en_mng_pt;
7358         if (!*enable_wake)
7359                 igb_power_down_link(adapter);
7360         else
7361                 igb_power_up_link(adapter);
7362
7363         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7364          * would have already happened in close and is redundant.
7365          */
7366         igb_release_hw_control(adapter);
7367
7368         pci_disable_device(pdev);
7369
7370         return 0;
7371 }
7372
7373 #ifdef CONFIG_PM
7374 #ifdef CONFIG_PM_SLEEP
7375 static int igb_suspend(struct device *dev)
7376 {
7377         int retval;
7378         bool wake;
7379         struct pci_dev *pdev = to_pci_dev(dev);
7380
7381         retval = __igb_shutdown(pdev, &wake, 0);
7382         if (retval)
7383                 return retval;
7384
7385         if (wake) {
7386                 pci_prepare_to_sleep(pdev);
7387         } else {
7388                 pci_wake_from_d3(pdev, false);
7389                 pci_set_power_state(pdev, PCI_D3hot);
7390         }
7391
7392         return 0;
7393 }
7394 #endif /* CONFIG_PM_SLEEP */
7395
7396 static int igb_resume(struct device *dev)
7397 {
7398         struct pci_dev *pdev = to_pci_dev(dev);
7399         struct net_device *netdev = pci_get_drvdata(pdev);
7400         struct igb_adapter *adapter = netdev_priv(netdev);
7401         struct e1000_hw *hw = &adapter->hw;
7402         u32 err;
7403
7404         pci_set_power_state(pdev, PCI_D0);
7405         pci_restore_state(pdev);
7406         pci_save_state(pdev);
7407
7408         err = pci_enable_device_mem(pdev);
7409         if (err) {
7410                 dev_err(&pdev->dev,
7411                         "igb: Cannot enable PCI device from suspend\n");
7412                 return err;
7413         }
7414         pci_set_master(pdev);
7415
7416         pci_enable_wake(pdev, PCI_D3hot, 0);
7417         pci_enable_wake(pdev, PCI_D3cold, 0);
7418
7419         if (igb_init_interrupt_scheme(adapter, true)) {
7420                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7421                 return -ENOMEM;
7422         }
7423
7424         igb_reset(adapter);
7425
7426         /* let the f/w know that the h/w is now under the control of the
7427          * driver.
7428          */
7429         igb_get_hw_control(adapter);
7430
7431         wr32(E1000_WUS, ~0);
7432
7433         if (netdev->flags & IFF_UP) {
7434                 rtnl_lock();
7435                 err = __igb_open(netdev, true);
7436                 rtnl_unlock();
7437                 if (err)
7438                         return err;
7439         }
7440
7441         netif_device_attach(netdev);
7442         return 0;
7443 }
7444
7445 #ifdef CONFIG_PM_RUNTIME
7446 static int igb_runtime_idle(struct device *dev)
7447 {
7448         struct pci_dev *pdev = to_pci_dev(dev);
7449         struct net_device *netdev = pci_get_drvdata(pdev);
7450         struct igb_adapter *adapter = netdev_priv(netdev);
7451
7452         if (!igb_has_link(adapter))
7453                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7454
7455         return -EBUSY;
7456 }
7457
7458 static int igb_runtime_suspend(struct device *dev)
7459 {
7460         struct pci_dev *pdev = to_pci_dev(dev);
7461         int retval;
7462         bool wake;
7463
7464         retval = __igb_shutdown(pdev, &wake, 1);
7465         if (retval)
7466                 return retval;
7467
7468         if (wake) {
7469                 pci_prepare_to_sleep(pdev);
7470         } else {
7471                 pci_wake_from_d3(pdev, false);
7472                 pci_set_power_state(pdev, PCI_D3hot);
7473         }
7474
7475         return 0;
7476 }
7477
7478 static int igb_runtime_resume(struct device *dev)
7479 {
7480         return igb_resume(dev);
7481 }
7482 #endif /* CONFIG_PM_RUNTIME */
7483 #endif
7484
7485 static void igb_shutdown(struct pci_dev *pdev)
7486 {
7487         bool wake;
7488
7489         __igb_shutdown(pdev, &wake, 0);
7490
7491         if (system_state == SYSTEM_POWER_OFF) {
7492                 pci_wake_from_d3(pdev, wake);
7493                 pci_set_power_state(pdev, PCI_D3hot);
7494         }
7495 }
7496
7497 #ifdef CONFIG_PCI_IOV
7498 static int igb_sriov_reinit(struct pci_dev *dev)
7499 {
7500         struct net_device *netdev = pci_get_drvdata(dev);
7501         struct igb_adapter *adapter = netdev_priv(netdev);
7502         struct pci_dev *pdev = adapter->pdev;
7503
7504         rtnl_lock();
7505
7506         if (netif_running(netdev))
7507                 igb_close(netdev);
7508         else
7509                 igb_reset(adapter);
7510
7511         igb_clear_interrupt_scheme(adapter);
7512
7513         igb_init_queue_configuration(adapter);
7514
7515         if (igb_init_interrupt_scheme(adapter, true)) {
7516                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7517                 return -ENOMEM;
7518         }
7519
7520         if (netif_running(netdev))
7521                 igb_open(netdev);
7522
7523         rtnl_unlock();
7524
7525         return 0;
7526 }
7527
7528 static int igb_pci_disable_sriov(struct pci_dev *dev)
7529 {
7530         int err = igb_disable_sriov(dev);
7531
7532         if (!err)
7533                 err = igb_sriov_reinit(dev);
7534
7535         return err;
7536 }
7537
7538 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7539 {
7540         int err = igb_enable_sriov(dev, num_vfs);
7541
7542         if (err)
7543                 goto out;
7544
7545         err = igb_sriov_reinit(dev);
7546         if (!err)
7547                 return num_vfs;
7548
7549 out:
7550         return err;
7551 }
7552
7553 #endif
7554 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7555 {
7556 #ifdef CONFIG_PCI_IOV
7557         if (num_vfs == 0)
7558                 return igb_pci_disable_sriov(dev);
7559         else
7560                 return igb_pci_enable_sriov(dev, num_vfs);
7561 #endif
7562         return 0;
7563 }
7564
7565 #ifdef CONFIG_NET_POLL_CONTROLLER
7566 /* Polling 'interrupt' - used by things like netconsole to send skbs
7567  * without having to re-enable interrupts. It's not called while
7568  * the interrupt routine is executing.
7569  */
7570 static void igb_netpoll(struct net_device *netdev)
7571 {
7572         struct igb_adapter *adapter = netdev_priv(netdev);
7573         struct e1000_hw *hw = &adapter->hw;
7574         struct igb_q_vector *q_vector;
7575         int i;
7576
7577         for (i = 0; i < adapter->num_q_vectors; i++) {
7578                 q_vector = adapter->q_vector[i];
7579                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7580                         wr32(E1000_EIMC, q_vector->eims_value);
7581                 else
7582                         igb_irq_disable(adapter);
7583                 napi_schedule(&q_vector->napi);
7584         }
7585 }
7586 #endif /* CONFIG_NET_POLL_CONTROLLER */
7587
7588 /**
7589  *  igb_io_error_detected - called when PCI error is detected
7590  *  @pdev: Pointer to PCI device
7591  *  @state: The current pci connection state
7592  *
7593  *  This function is called after a PCI bus error affecting
7594  *  this device has been detected.
7595  **/
7596 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7597                                               pci_channel_state_t state)
7598 {
7599         struct net_device *netdev = pci_get_drvdata(pdev);
7600         struct igb_adapter *adapter = netdev_priv(netdev);
7601
7602         netif_device_detach(netdev);
7603
7604         if (state == pci_channel_io_perm_failure)
7605                 return PCI_ERS_RESULT_DISCONNECT;
7606
7607         if (netif_running(netdev))
7608                 igb_down(adapter);
7609         pci_disable_device(pdev);
7610
7611         /* Request a slot slot reset. */
7612         return PCI_ERS_RESULT_NEED_RESET;
7613 }
7614
7615 /**
7616  *  igb_io_slot_reset - called after the pci bus has been reset.
7617  *  @pdev: Pointer to PCI device
7618  *
7619  *  Restart the card from scratch, as if from a cold-boot. Implementation
7620  *  resembles the first-half of the igb_resume routine.
7621  **/
7622 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7623 {
7624         struct net_device *netdev = pci_get_drvdata(pdev);
7625         struct igb_adapter *adapter = netdev_priv(netdev);
7626         struct e1000_hw *hw = &adapter->hw;
7627         pci_ers_result_t result;
7628         int err;
7629
7630         if (pci_enable_device_mem(pdev)) {
7631                 dev_err(&pdev->dev,
7632                         "Cannot re-enable PCI device after reset.\n");
7633                 result = PCI_ERS_RESULT_DISCONNECT;
7634         } else {
7635                 pci_set_master(pdev);
7636                 pci_restore_state(pdev);
7637                 pci_save_state(pdev);
7638
7639                 pci_enable_wake(pdev, PCI_D3hot, 0);
7640                 pci_enable_wake(pdev, PCI_D3cold, 0);
7641
7642                 igb_reset(adapter);
7643                 wr32(E1000_WUS, ~0);
7644                 result = PCI_ERS_RESULT_RECOVERED;
7645         }
7646
7647         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7648         if (err) {
7649                 dev_err(&pdev->dev,
7650                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7651                         err);
7652                 /* non-fatal, continue */
7653         }
7654
7655         return result;
7656 }
7657
7658 /**
7659  *  igb_io_resume - called when traffic can start flowing again.
7660  *  @pdev: Pointer to PCI device
7661  *
7662  *  This callback is called when the error recovery driver tells us that
7663  *  its OK to resume normal operation. Implementation resembles the
7664  *  second-half of the igb_resume routine.
7665  */
7666 static void igb_io_resume(struct pci_dev *pdev)
7667 {
7668         struct net_device *netdev = pci_get_drvdata(pdev);
7669         struct igb_adapter *adapter = netdev_priv(netdev);
7670
7671         if (netif_running(netdev)) {
7672                 if (igb_up(adapter)) {
7673                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7674                         return;
7675                 }
7676         }
7677
7678         netif_device_attach(netdev);
7679
7680         /* let the f/w know that the h/w is now under the control of the
7681          * driver.
7682          */
7683         igb_get_hw_control(adapter);
7684 }
7685
7686 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7687                              u8 qsel)
7688 {
7689         u32 rar_low, rar_high;
7690         struct e1000_hw *hw = &adapter->hw;
7691
7692         /* HW expects these in little endian so we reverse the byte order
7693          * from network order (big endian) to little endian
7694          */
7695         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7696                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7697         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7698
7699         /* Indicate to hardware the Address is Valid. */
7700         rar_high |= E1000_RAH_AV;
7701
7702         if (hw->mac.type == e1000_82575)
7703                 rar_high |= E1000_RAH_POOL_1 * qsel;
7704         else
7705                 rar_high |= E1000_RAH_POOL_1 << qsel;
7706
7707         wr32(E1000_RAL(index), rar_low);
7708         wrfl();
7709         wr32(E1000_RAH(index), rar_high);
7710         wrfl();
7711 }
7712
7713 static int igb_set_vf_mac(struct igb_adapter *adapter,
7714                           int vf, unsigned char *mac_addr)
7715 {
7716         struct e1000_hw *hw = &adapter->hw;
7717         /* VF MAC addresses start at end of receive addresses and moves
7718          * towards the first, as a result a collision should not be possible
7719          */
7720         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7721
7722         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7723
7724         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7725
7726         return 0;
7727 }
7728
7729 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7730 {
7731         struct igb_adapter *adapter = netdev_priv(netdev);
7732         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7733                 return -EINVAL;
7734         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7735         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7736         dev_info(&adapter->pdev->dev,
7737                  "Reload the VF driver to make this change effective.");
7738         if (test_bit(__IGB_DOWN, &adapter->state)) {
7739                 dev_warn(&adapter->pdev->dev,
7740                          "The VF MAC address has been set, but the PF device is not up.\n");
7741                 dev_warn(&adapter->pdev->dev,
7742                          "Bring the PF device up before attempting to use the VF device.\n");
7743         }
7744         return igb_set_vf_mac(adapter, vf, mac);
7745 }
7746
7747 static int igb_link_mbps(int internal_link_speed)
7748 {
7749         switch (internal_link_speed) {
7750         case SPEED_100:
7751                 return 100;
7752         case SPEED_1000:
7753                 return 1000;
7754         default:
7755                 return 0;
7756         }
7757 }
7758
7759 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7760                                   int link_speed)
7761 {
7762         int rf_dec, rf_int;
7763         u32 bcnrc_val;
7764
7765         if (tx_rate != 0) {
7766                 /* Calculate the rate factor values to set */
7767                 rf_int = link_speed / tx_rate;
7768                 rf_dec = (link_speed - (rf_int * tx_rate));
7769                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7770                          tx_rate;
7771
7772                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7773                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7774                               E1000_RTTBCNRC_RF_INT_MASK);
7775                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7776         } else {
7777                 bcnrc_val = 0;
7778         }
7779
7780         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7781         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7782          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7783          */
7784         wr32(E1000_RTTBCNRM, 0x14);
7785         wr32(E1000_RTTBCNRC, bcnrc_val);
7786 }
7787
7788 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7789 {
7790         int actual_link_speed, i;
7791         bool reset_rate = false;
7792
7793         /* VF TX rate limit was not set or not supported */
7794         if ((adapter->vf_rate_link_speed == 0) ||
7795             (adapter->hw.mac.type != e1000_82576))
7796                 return;
7797
7798         actual_link_speed = igb_link_mbps(adapter->link_speed);
7799         if (actual_link_speed != adapter->vf_rate_link_speed) {
7800                 reset_rate = true;
7801                 adapter->vf_rate_link_speed = 0;
7802                 dev_info(&adapter->pdev->dev,
7803                          "Link speed has been changed. VF Transmit rate is disabled\n");
7804         }
7805
7806         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7807                 if (reset_rate)
7808                         adapter->vf_data[i].tx_rate = 0;
7809
7810                 igb_set_vf_rate_limit(&adapter->hw, i,
7811                                       adapter->vf_data[i].tx_rate,
7812                                       actual_link_speed);
7813         }
7814 }
7815
7816 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7817 {
7818         struct igb_adapter *adapter = netdev_priv(netdev);
7819         struct e1000_hw *hw = &adapter->hw;
7820         int actual_link_speed;
7821
7822         if (hw->mac.type != e1000_82576)
7823                 return -EOPNOTSUPP;
7824
7825         actual_link_speed = igb_link_mbps(adapter->link_speed);
7826         if ((vf >= adapter->vfs_allocated_count) ||
7827             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7828             (tx_rate < 0) || (tx_rate > actual_link_speed))
7829                 return -EINVAL;
7830
7831         adapter->vf_rate_link_speed = actual_link_speed;
7832         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7833         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7834
7835         return 0;
7836 }
7837
7838 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7839                                    bool setting)
7840 {
7841         struct igb_adapter *adapter = netdev_priv(netdev);
7842         struct e1000_hw *hw = &adapter->hw;
7843         u32 reg_val, reg_offset;
7844
7845         if (!adapter->vfs_allocated_count)
7846                 return -EOPNOTSUPP;
7847
7848         if (vf >= adapter->vfs_allocated_count)
7849                 return -EINVAL;
7850
7851         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7852         reg_val = rd32(reg_offset);
7853         if (setting)
7854                 reg_val |= ((1 << vf) |
7855                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7856         else
7857                 reg_val &= ~((1 << vf) |
7858                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7859         wr32(reg_offset, reg_val);
7860
7861         adapter->vf_data[vf].spoofchk_enabled = setting;
7862         return E1000_SUCCESS;
7863 }
7864
7865 static int igb_ndo_get_vf_config(struct net_device *netdev,
7866                                  int vf, struct ifla_vf_info *ivi)
7867 {
7868         struct igb_adapter *adapter = netdev_priv(netdev);
7869         if (vf >= adapter->vfs_allocated_count)
7870                 return -EINVAL;
7871         ivi->vf = vf;
7872         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7873         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7874         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7875         ivi->qos = adapter->vf_data[vf].pf_qos;
7876         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7877         return 0;
7878 }
7879
7880 static void igb_vmm_control(struct igb_adapter *adapter)
7881 {
7882         struct e1000_hw *hw = &adapter->hw;
7883         u32 reg;
7884
7885         switch (hw->mac.type) {
7886         case e1000_82575:
7887         case e1000_i210:
7888         case e1000_i211:
7889         case e1000_i354:
7890         default:
7891                 /* replication is not supported for 82575 */
7892                 return;
7893         case e1000_82576:
7894                 /* notify HW that the MAC is adding vlan tags */
7895                 reg = rd32(E1000_DTXCTL);
7896                 reg |= E1000_DTXCTL_VLAN_ADDED;
7897                 wr32(E1000_DTXCTL, reg);
7898         case e1000_82580:
7899                 /* enable replication vlan tag stripping */
7900                 reg = rd32(E1000_RPLOLR);
7901                 reg |= E1000_RPLOLR_STRVLAN;
7902                 wr32(E1000_RPLOLR, reg);
7903         case e1000_i350:
7904                 /* none of the above registers are supported by i350 */
7905                 break;
7906         }
7907
7908         if (adapter->vfs_allocated_count) {
7909                 igb_vmdq_set_loopback_pf(hw, true);
7910                 igb_vmdq_set_replication_pf(hw, true);
7911                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7912                                               adapter->vfs_allocated_count);
7913         } else {
7914                 igb_vmdq_set_loopback_pf(hw, false);
7915                 igb_vmdq_set_replication_pf(hw, false);
7916         }
7917 }
7918
7919 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7920 {
7921         struct e1000_hw *hw = &adapter->hw;
7922         u32 dmac_thr;
7923         u16 hwm;
7924
7925         if (hw->mac.type > e1000_82580) {
7926                 if (adapter->flags & IGB_FLAG_DMAC) {
7927                         u32 reg;
7928
7929                         /* force threshold to 0. */
7930                         wr32(E1000_DMCTXTH, 0);
7931
7932                         /* DMA Coalescing high water mark needs to be greater
7933                          * than the Rx threshold. Set hwm to PBA - max frame
7934                          * size in 16B units, capping it at PBA - 6KB.
7935                          */
7936                         hwm = 64 * pba - adapter->max_frame_size / 16;
7937                         if (hwm < 64 * (pba - 6))
7938                                 hwm = 64 * (pba - 6);
7939                         reg = rd32(E1000_FCRTC);
7940                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7941                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7942                                 & E1000_FCRTC_RTH_COAL_MASK);
7943                         wr32(E1000_FCRTC, reg);
7944
7945                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7946                          * frame size, capping it at PBA - 10KB.
7947                          */
7948                         dmac_thr = pba - adapter->max_frame_size / 512;
7949                         if (dmac_thr < pba - 10)
7950                                 dmac_thr = pba - 10;
7951                         reg = rd32(E1000_DMACR);
7952                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7953                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7954                                 & E1000_DMACR_DMACTHR_MASK);
7955
7956                         /* transition to L0x or L1 if available..*/
7957                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7958
7959                         /* watchdog timer= +-1000 usec in 32usec intervals */
7960                         reg |= (1000 >> 5);
7961
7962                         /* Disable BMC-to-OS Watchdog Enable */
7963                         if (hw->mac.type != e1000_i354)
7964                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7965
7966                         wr32(E1000_DMACR, reg);
7967
7968                         /* no lower threshold to disable
7969                          * coalescing(smart fifb)-UTRESH=0
7970                          */
7971                         wr32(E1000_DMCRTRH, 0);
7972
7973                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7974
7975                         wr32(E1000_DMCTLX, reg);
7976
7977                         /* free space in tx packet buffer to wake from
7978                          * DMA coal
7979                          */
7980                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7981                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7982
7983                         /* make low power state decision controlled
7984                          * by DMA coal
7985                          */
7986                         reg = rd32(E1000_PCIEMISC);
7987                         reg &= ~E1000_PCIEMISC_LX_DECISION;
7988                         wr32(E1000_PCIEMISC, reg);
7989                 } /* endif adapter->dmac is not disabled */
7990         } else if (hw->mac.type == e1000_82580) {
7991                 u32 reg = rd32(E1000_PCIEMISC);
7992                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7993                 wr32(E1000_DMACR, 0);
7994         }
7995 }
7996
7997 /**
7998  *  igb_read_i2c_byte - Reads 8 bit word over I2C
7999  *  @hw: pointer to hardware structure
8000  *  @byte_offset: byte offset to read
8001  *  @dev_addr: device address
8002  *  @data: value read
8003  *
8004  *  Performs byte read operation over I2C interface at
8005  *  a specified device address.
8006  **/
8007 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8008                       u8 dev_addr, u8 *data)
8009 {
8010         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8011         struct i2c_client *this_client = adapter->i2c_client;
8012         s32 status;
8013         u16 swfw_mask = 0;
8014
8015         if (!this_client)
8016                 return E1000_ERR_I2C;
8017
8018         swfw_mask = E1000_SWFW_PHY0_SM;
8019
8020         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
8021             != E1000_SUCCESS)
8022                 return E1000_ERR_SWFW_SYNC;
8023
8024         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8025         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8026
8027         if (status < 0)
8028                 return E1000_ERR_I2C;
8029         else {
8030                 *data = status;
8031                 return E1000_SUCCESS;
8032         }
8033 }
8034
8035 /**
8036  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8037  *  @hw: pointer to hardware structure
8038  *  @byte_offset: byte offset to write
8039  *  @dev_addr: device address
8040  *  @data: value to write
8041  *
8042  *  Performs byte write operation over I2C interface at
8043  *  a specified device address.
8044  **/
8045 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8046                        u8 dev_addr, u8 data)
8047 {
8048         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8049         struct i2c_client *this_client = adapter->i2c_client;
8050         s32 status;
8051         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8052
8053         if (!this_client)
8054                 return E1000_ERR_I2C;
8055
8056         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
8057                 return E1000_ERR_SWFW_SYNC;
8058         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8059         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8060
8061         if (status)
8062                 return E1000_ERR_I2C;
8063         else
8064                 return E1000_SUCCESS;
8065
8066 }
8067
8068 int igb_reinit_queues(struct igb_adapter *adapter)
8069 {
8070         struct net_device *netdev = adapter->netdev;
8071         struct pci_dev *pdev = adapter->pdev;
8072         int err = 0;
8073
8074         if (netif_running(netdev))
8075                 igb_close(netdev);
8076
8077         igb_reset_interrupt_capability(adapter);
8078
8079         if (igb_init_interrupt_scheme(adapter, true)) {
8080                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8081                 return -ENOMEM;
8082         }
8083
8084         if (netif_running(netdev))
8085                 err = igb_open(netdev);
8086
8087         return err;
8088 }
8089 /* igb_main.c */