drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/aer.h>
  32 #include <linux/prefetch.h>
  33 #include <linux/bpf.h>
  34 #include <linux/bpf_trace.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/etherdevice.h>
  37 #ifdef CONFIG_IGB_DCA
  38 #include <linux/dca.h>
  39 #endif
  40 #include <linux/i2c.h>
  41 #include "igb.h"
  42
  43 enum queue_mode {
  44         QUEUE_MODE_STRICT_PRIORITY,
  45         QUEUE_MODE_STREAM_RESERVATION,
  46 };
  47
  48 enum tx_queue_prio {
  49         TX_QUEUE_PRIO_HIGH,
  50         TX_QUEUE_PRIO_LOW,
  51 };
  52
  53 char igb_driver_name[] = "igb";
  54 static const char igb_driver_string[] =
  55                                 "Intel(R) Gigabit Ethernet Network Driver";
  56 static const char igb_copyright[] =
  57                                 "Copyright (c) 2007-2014 Intel Corporation.";
  58
  59 static const struct e1000_info *igb_info_tbl[] = {
  60         [board_82575] = &e1000_82575_info,
  61 };
  62
  63 static const struct pci_device_id igb_pci_tbl[] = {
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  68         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  99         /* required last entry */
 100         {0, }
 101 };
 102
 103 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 104
 105 static int igb_setup_all_tx_resources(struct igb_adapter *);
 106 static int igb_setup_all_rx_resources(struct igb_adapter *);
 107 static void igb_free_all_tx_resources(struct igb_adapter *);
 108 static void igb_free_all_rx_resources(struct igb_adapter *);
 109 static void igb_setup_mrqc(struct igb_adapter *);
 110 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 111 static void igb_remove(struct pci_dev *pdev);
 112 static int igb_sw_init(struct igb_adapter *);
 113 int igb_open(struct net_device *);
 114 int igb_close(struct net_device *);
 115 static void igb_configure(struct igb_adapter *);
 116 static void igb_configure_tx(struct igb_adapter *);
 117 static void igb_configure_rx(struct igb_adapter *);
 118 static void igb_clean_all_tx_rings(struct igb_adapter *);
 119 static void igb_clean_all_rx_rings(struct igb_adapter *);
 120 static void igb_clean_tx_ring(struct igb_ring *);
 121 static void igb_clean_rx_ring(struct igb_ring *);
 122 static void igb_set_rx_mode(struct net_device *);
 123 static void igb_update_phy_info(struct timer_list *);
 124 static void igb_watchdog(struct timer_list *);
 125 static void igb_watchdog_task(struct work_struct *);
 126 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 127 static void igb_get_stats64(struct net_device *dev,
 128                             struct rtnl_link_stats64 *stats);
 129 static int igb_change_mtu(struct net_device *, int);
 130 static int igb_set_mac(struct net_device *, void *);
 131 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 132 static irqreturn_t igb_intr(int irq, void *);
 133 static irqreturn_t igb_intr_msi(int irq, void *);
 134 static irqreturn_t igb_msix_other(int irq, void *);
 135 static irqreturn_t igb_msix_ring(int irq, void *);
 136 #ifdef CONFIG_IGB_DCA
 137 static void igb_update_dca(struct igb_q_vector *);
 138 static void igb_setup_dca(struct igb_adapter *);
 139 #endif /* CONFIG_IGB_DCA */
 140 static int igb_poll(struct napi_struct *, int);
 141 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 142 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 143 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 144 static void igb_tx_timeout(struct net_device *, unsigned int txqueue);
 145 static void igb_reset_task(struct work_struct *);
 146 static void igb_vlan_mode(struct net_device *netdev,
 147                           netdev_features_t features);
 148 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 149 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 150 static void igb_restore_vlan(struct igb_adapter *);
 151 static void igb_rar_set_index(struct igb_adapter *, u32);
 152 static void igb_ping_all_vfs(struct igb_adapter *);
 153 static void igb_msg_task(struct igb_adapter *);
 154 static void igb_vmm_control(struct igb_adapter *);
 155 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 156 static void igb_flush_mac_table(struct igb_adapter *);
 157 static int igb_available_rars(struct igb_adapter *, u8);
 158 static void igb_set_default_mac_filter(struct igb_adapter *);
 159 static int igb_uc_sync(struct net_device *, const unsigned char *);
 160 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 161 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 162 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 163 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 164                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 165 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 166 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 167                                    bool setting);
 168 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 169                                 bool setting);
 170 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 171                                  struct ifla_vf_info *ivi);
 172 static void igb_check_vf_rate_limit(struct igb_adapter *);
 173 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 174 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 175
 176 #ifdef CONFIG_PCI_IOV
 177 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 178 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 179 static int igb_disable_sriov(struct pci_dev *dev);
 180 static int igb_pci_disable_sriov(struct pci_dev *dev);
 181 #endif
 182
 183 static int igb_suspend(struct device *);
 184 static int igb_resume(struct device *);
 185 static int igb_runtime_suspend(struct device *dev);
 186 static int igb_runtime_resume(struct device *dev);
 187 static int igb_runtime_idle(struct device *dev);
 188 static const struct dev_pm_ops igb_pm_ops = {
 189         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 190         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 191                         igb_runtime_idle)
 192 };
 193 static void igb_shutdown(struct pci_dev *);
 194 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 195 #ifdef CONFIG_IGB_DCA
 196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 197 static struct notifier_block dca_notifier = {
 198         .notifier_call  = igb_notify_dca,
 199         .next           = NULL,
 200         .priority       = 0
 201 };
 202 #endif
 203 #ifdef CONFIG_PCI_IOV
 204 static unsigned int max_vfs;
 205 module_param(max_vfs, uint, 0);
 206 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 207 #endif /* CONFIG_PCI_IOV */
 208
 209 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 210                      pci_channel_state_t);
 211 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 212 static void igb_io_resume(struct pci_dev *);
 213
 214 static const struct pci_error_handlers igb_err_handler = {
 215         .error_detected = igb_io_error_detected,
 216         .slot_reset = igb_io_slot_reset,
 217         .resume = igb_io_resume,
 218 };
 219
 220 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 221
 222 static struct pci_driver igb_driver = {
 223         .name     = igb_driver_name,
 224         .id_table = igb_pci_tbl,
 225         .probe    = igb_probe,
 226         .remove   = igb_remove,
 227 #ifdef CONFIG_PM
 228         .driver.pm = &igb_pm_ops,
 229 #endif
 230         .shutdown = igb_shutdown,
 231         .sriov_configure = igb_pci_sriov_configure,
 232         .err_handler = &igb_err_handler
 233 };
 234
 235 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 236 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 237 MODULE_LICENSE("GPL v2");
 238
 239 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 240 static int debug = -1;
 241 module_param(debug, int, 0);
 242 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 243
 244 struct igb_reg_info {
 245         u32 ofs;
 246         char *name;
 247 };
 248
 249 static const struct igb_reg_info igb_reg_info_tbl[] = {
 250
 251         /* General Registers */
 252         {E1000_CTRL, "CTRL"},
 253         {E1000_STATUS, "STATUS"},
 254         {E1000_CTRL_EXT, "CTRL_EXT"},
 255
 256         /* Interrupt Registers */
 257         {E1000_ICR, "ICR"},
 258
 259         /* RX Registers */
 260         {E1000_RCTL, "RCTL"},
 261         {E1000_RDLEN(0), "RDLEN"},
 262         {E1000_RDH(0), "RDH"},
 263         {E1000_RDT(0), "RDT"},
 264         {E1000_RXDCTL(0), "RXDCTL"},
 265         {E1000_RDBAL(0), "RDBAL"},
 266         {E1000_RDBAH(0), "RDBAH"},
 267
 268         /* TX Registers */
 269         {E1000_TCTL, "TCTL"},
 270         {E1000_TDBAL(0), "TDBAL"},
 271         {E1000_TDBAH(0), "TDBAH"},
 272         {E1000_TDLEN(0), "TDLEN"},
 273         {E1000_TDH(0), "TDH"},
 274         {E1000_TDT(0), "TDT"},
 275         {E1000_TXDCTL(0), "TXDCTL"},
 276         {E1000_TDFH, "TDFH"},
 277         {E1000_TDFT, "TDFT"},
 278         {E1000_TDFHS, "TDFHS"},
 279         {E1000_TDFPC, "TDFPC"},
 280
 281         /* List Terminator */
 282         {}
 283 };
 284
 285 /* igb_regdump - register printout routine */
 286 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 287 {
 288         int n = 0;
 289         char rname[16];
 290         u32 regs[8];
 291
 292         switch (reginfo->ofs) {
 293         case E1000_RDLEN(0):
 294                 for (n = 0; n < 4; n++)
 295                         regs[n] = rd32(E1000_RDLEN(n));
 296                 break;
 297         case E1000_RDH(0):
 298                 for (n = 0; n < 4; n++)
 299                         regs[n] = rd32(E1000_RDH(n));
 300                 break;
 301         case E1000_RDT(0):
 302                 for (n = 0; n < 4; n++)
 303                         regs[n] = rd32(E1000_RDT(n));
 304                 break;
 305         case E1000_RXDCTL(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RXDCTL(n));
 308                 break;
 309         case E1000_RDBAL(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDBAL(n));
 312                 break;
 313         case E1000_RDBAH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDBAH(n));
 316                 break;
 317         case E1000_TDBAL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_TDBAL(n));
 320                 break;
 321         case E1000_TDBAH(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_TDBAH(n));
 324                 break;
 325         case E1000_TDLEN(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_TDLEN(n));
 328                 break;
 329         case E1000_TDH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_TDH(n));
 332                 break;
 333         case E1000_TDT(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDT(n));
 336                 break;
 337         case E1000_TXDCTL(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TXDCTL(n));
 340                 break;
 341         default:
 342                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 343                 return;
 344         }
 345
 346         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 347         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 348                 regs[2], regs[3]);
 349 }
 350
 351 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 352 static void igb_dump(struct igb_adapter *adapter)
 353 {
 354         struct net_device *netdev = adapter->netdev;
 355         struct e1000_hw *hw = &adapter->hw;
 356         struct igb_reg_info *reginfo;
 357         struct igb_ring *tx_ring;
 358         union e1000_adv_tx_desc *tx_desc;
 359         struct my_u0 { __le64 a; __le64 b; } *u0;
 360         struct igb_ring *rx_ring;
 361         union e1000_adv_rx_desc *rx_desc;
 362         u32 staterr;
 363         u16 i, n;
 364
 365         if (!netif_msg_hw(adapter))
 366                 return;
 367
 368         /* Print netdevice Info */
 369         if (netdev) {
 370                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 371                 pr_info("Device Name     state            trans_start\n");
 372                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 373                         netdev->state, dev_trans_start(netdev));
 374         }
 375
 376         /* Print Registers */
 377         dev_info(&adapter->pdev->dev, "Register Dump\n");
 378         pr_info(" Register Name   Value\n");
 379         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 380              reginfo->name; reginfo++) {
 381                 igb_regdump(hw, reginfo);
 382         }
 383
 384         /* Print TX Ring Summary */
 385         if (!netdev || !netif_running(netdev))
 386                 goto exit;
 387
 388         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 389         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 390         for (n = 0; n < adapter->num_tx_queues; n++) {
 391                 struct igb_tx_buffer *buffer_info;
 392                 tx_ring = adapter->tx_ring[n];
 393                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 394                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 395                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 396                         (u64)dma_unmap_addr(buffer_info, dma),
 397                         dma_unmap_len(buffer_info, len),
 398                         buffer_info->next_to_watch,
 399                         (u64)buffer_info->time_stamp);
 400         }
 401
 402         /* Print TX Rings */
 403         if (!netif_msg_tx_done(adapter))
 404                 goto rx_ring_summary;
 405
 406         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 407
 408         /* Transmit Descriptor Formats
 409          *
 410          * Advanced Transmit Descriptor
 411          *   +--------------------------------------------------------------+
 412          * 0 |         Buffer Address [63:0]                                |
 413          *   +--------------------------------------------------------------+
 414          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 415          *   +--------------------------------------------------------------+
 416          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 417          */
 418
 419         for (n = 0; n < adapter->num_tx_queues; n++) {
 420                 tx_ring = adapter->tx_ring[n];
 421                 pr_info("------------------------------------\n");
 422                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 423                 pr_info("------------------------------------\n");
 424                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 425
 426                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 427                         const char *next_desc;
 428                         struct igb_tx_buffer *buffer_info;
 429                         tx_desc = IGB_TX_DESC(tx_ring, i);
 430                         buffer_info = &tx_ring->tx_buffer_info[i];
 431                         u0 = (struct my_u0 *)tx_desc;
 432                         if (i == tx_ring->next_to_use &&
 433                             i == tx_ring->next_to_clean)
 434                                 next_desc = " NTC/U";
 435                         else if (i == tx_ring->next_to_use)
 436                                 next_desc = " NTU";
 437                         else if (i == tx_ring->next_to_clean)
 438                                 next_desc = " NTC";
 439                         else
 440                                 next_desc = "";
 441
 442                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 443                                 i, le64_to_cpu(u0->a),
 444                                 le64_to_cpu(u0->b),
 445                                 (u64)dma_unmap_addr(buffer_info, dma),
 446                                 dma_unmap_len(buffer_info, len),
 447                                 buffer_info->next_to_watch,
 448                                 (u64)buffer_info->time_stamp,
 449                                 buffer_info->skb, next_desc);
 450
 451                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 452                                 print_hex_dump(KERN_INFO, "",
 453                                         DUMP_PREFIX_ADDRESS,
 454                                         16, 1, buffer_info->skb->data,
 455                                         dma_unmap_len(buffer_info, len),
 456                                         true);
 457                 }
 458         }
 459
 460         /* Print RX Rings Summary */
 461 rx_ring_summary:
 462         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 463         pr_info("Queue [NTU] [NTC]\n");
 464         for (n = 0; n < adapter->num_rx_queues; n++) {
 465                 rx_ring = adapter->rx_ring[n];
 466                 pr_info(" %5d %5X %5X\n",
 467                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 468         }
 469
 470         /* Print RX Rings */
 471         if (!netif_msg_rx_status(adapter))
 472                 goto exit;
 473
 474         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 475
 476         /* Advanced Receive Descriptor (Read) Format
 477          *    63                                           1        0
 478          *    +-----------------------------------------------------+
 479          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 480          *    +----------------------------------------------+------+
 481          *  8 |       Header Buffer Address [63:1]           |  DD  |
 482          *    +-----------------------------------------------------+
 483          *
 484          *
 485          * Advanced Receive Descriptor (Write-Back) Format
 486          *
 487          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 488          *   +------------------------------------------------------+
 489          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 490          *   | Checksum   Ident  |   |           |    | Type | Type |
 491          *   +------------------------------------------------------+
 492          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 493          *   +------------------------------------------------------+
 494          *   63       48 47    32 31            20 19               0
 495          */
 496
 497         for (n = 0; n < adapter->num_rx_queues; n++) {
 498                 rx_ring = adapter->rx_ring[n];
 499                 pr_info("------------------------------------\n");
 500                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 501                 pr_info("------------------------------------\n");
 502                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 503                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 504
 505                 for (i = 0; i < rx_ring->count; i++) {
 506                         const char *next_desc;
 507                         struct igb_rx_buffer *buffer_info;
 508                         buffer_info = &rx_ring->rx_buffer_info[i];
 509                         rx_desc = IGB_RX_DESC(rx_ring, i);
 510                         u0 = (struct my_u0 *)rx_desc;
 511                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 512
 513                         if (i == rx_ring->next_to_use)
 514                                 next_desc = " NTU";
 515                         else if (i == rx_ring->next_to_clean)
 516                                 next_desc = " NTC";
 517                         else
 518                                 next_desc = "";
 519
 520                         if (staterr & E1000_RXD_STAT_DD) {
 521                                 /* Descriptor Done */
 522                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 523                                         "RWB", i,
 524                                         le64_to_cpu(u0->a),
 525                                         le64_to_cpu(u0->b),
 526                                         next_desc);
 527                         } else {
 528                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 529                                         "R  ", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         (u64)buffer_info->dma,
 533                                         next_desc);
 534
 535                                 if (netif_msg_pktdata(adapter) &&
 536                                     buffer_info->dma && buffer_info->page) {
 537                                         print_hex_dump(KERN_INFO, "",
 538                                           DUMP_PREFIX_ADDRESS,
 539                                           16, 1,
 540                                           page_address(buffer_info->page) +
 541                                                       buffer_info->page_offset,
 542                                           igb_rx_bufsz(rx_ring), true);
 543                                 }
 544                         }
 545                 }
 546         }
 547
 548 exit:
 549         return;
 550 }
 551
 552 /**
 553  *  igb_get_i2c_data - Reads the I2C SDA data bit
 554  *  @data: opaque pointer to adapter struct
 555  *
 556  *  Returns the I2C data bit value
 557  **/
 558 static int igb_get_i2c_data(void *data)
 559 {
 560         struct igb_adapter *adapter = (struct igb_adapter *)data;
 561         struct e1000_hw *hw = &adapter->hw;
 562         s32 i2cctl = rd32(E1000_I2CPARAMS);
 563
 564         return !!(i2cctl & E1000_I2C_DATA_IN);
 565 }
 566
 567 /**
 568  *  igb_set_i2c_data - Sets the I2C data bit
 569  *  @data: pointer to hardware structure
 570  *  @state: I2C data value (0 or 1) to set
 571  *
 572  *  Sets the I2C data bit
 573  **/
 574 static void igb_set_i2c_data(void *data, int state)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         if (state)
 581                 i2cctl |= E1000_I2C_DATA_OUT;
 582         else
 583                 i2cctl &= ~E1000_I2C_DATA_OUT;
 584
 585         i2cctl &= ~E1000_I2C_DATA_OE_N;
 586         i2cctl |= E1000_I2C_CLK_OE_N;
 587         wr32(E1000_I2CPARAMS, i2cctl);
 588         wrfl();
 589
 590 }
 591
 592 /**
 593  *  igb_set_i2c_clk - Sets the I2C SCL clock
 594  *  @data: pointer to hardware structure
 595  *  @state: state to set clock
 596  *
 597  *  Sets the I2C clock line to state
 598  **/
 599 static void igb_set_i2c_clk(void *data, int state)
 600 {
 601         struct igb_adapter *adapter = (struct igb_adapter *)data;
 602         struct e1000_hw *hw = &adapter->hw;
 603         s32 i2cctl = rd32(E1000_I2CPARAMS);
 604
 605         if (state) {
 606                 i2cctl |= E1000_I2C_CLK_OUT;
 607                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 608         } else {
 609                 i2cctl &= ~E1000_I2C_CLK_OUT;
 610                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 611         }
 612         wr32(E1000_I2CPARAMS, i2cctl);
 613         wrfl();
 614 }
 615
 616 /**
 617  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 618  *  @data: pointer to hardware structure
 619  *
 620  *  Gets the I2C clock state
 621  **/
 622 static int igb_get_i2c_clk(void *data)
 623 {
 624         struct igb_adapter *adapter = (struct igb_adapter *)data;
 625         struct e1000_hw *hw = &adapter->hw;
 626         s32 i2cctl = rd32(E1000_I2CPARAMS);
 627
 628         return !!(i2cctl & E1000_I2C_CLK_IN);
 629 }
 630
 631 static const struct i2c_algo_bit_data igb_i2c_algo = {
 632         .setsda         = igb_set_i2c_data,
 633         .setscl         = igb_set_i2c_clk,
 634         .getsda         = igb_get_i2c_data,
 635         .getscl         = igb_get_i2c_clk,
 636         .udelay         = 5,
 637         .timeout        = 20,
 638 };
 639
 640 /**
 641  *  igb_get_hw_dev - return device
 642  *  @hw: pointer to hardware structure
 643  *
 644  *  used by hardware layer to print debugging information
 645  **/
 646 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 647 {
 648         struct igb_adapter *adapter = hw->back;
 649         return adapter->netdev;
 650 }
 651
 652 /**
 653  *  igb_init_module - Driver Registration Routine
 654  *
 655  *  igb_init_module is the first routine called when the driver is
 656  *  loaded. All it does is register with the PCI subsystem.
 657  **/
 658 static int __init igb_init_module(void)
 659 {
 660         int ret;
 661
 662         pr_info("%s\n", igb_driver_string);
 663         pr_info("%s\n", igb_copyright);
 664
 665 #ifdef CONFIG_IGB_DCA
 666         dca_register_notify(&dca_notifier);
 667 #endif
 668         ret = pci_register_driver(&igb_driver);
 669         return ret;
 670 }
 671
 672 module_init(igb_init_module);
 673
 674 /**
 675  *  igb_exit_module - Driver Exit Cleanup Routine
 676  *
 677  *  igb_exit_module is called just before the driver is removed
 678  *  from memory.
 679  **/
 680 static void __exit igb_exit_module(void)
 681 {
 682 #ifdef CONFIG_IGB_DCA
 683         dca_unregister_notify(&dca_notifier);
 684 #endif
 685         pci_unregister_driver(&igb_driver);
 686 }
 687
 688 module_exit(igb_exit_module);
 689
 690 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 691 /**
 692  *  igb_cache_ring_register - Descriptor ring to register mapping
 693  *  @adapter: board private structure to initialize
 694  *
 695  *  Once we know the feature-set enabled for the device, we'll cache
 696  *  the register offset the descriptor ring is assigned to.
 697  **/
 698 static void igb_cache_ring_register(struct igb_adapter *adapter)
 699 {
 700         int i = 0, j = 0;
 701         u32 rbase_offset = adapter->vfs_allocated_count;
 702
 703         switch (adapter->hw.mac.type) {
 704         case e1000_82576:
 705                 /* The queues are allocated for virtualization such that VF 0
 706                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 707                  * In order to avoid collision we start at the first free queue
 708                  * and continue consuming queues in the same sequence
 709                  */
 710                 if (adapter->vfs_allocated_count) {
 711                         for (; i < adapter->rss_queues; i++)
 712                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 713                                                                Q_IDX_82576(i);
 714                 }
 715                 fallthrough;
 716         case e1000_82575:
 717         case e1000_82580:
 718         case e1000_i350:
 719         case e1000_i354:
 720         case e1000_i210:
 721         case e1000_i211:
 722         default:
 723                 for (; i < adapter->num_rx_queues; i++)
 724                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 725                 for (; j < adapter->num_tx_queues; j++)
 726                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 727                 break;
 728         }
 729 }
 730
 731 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 732 {
 733         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 734         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 735         u32 value = 0;
 736
 737         if (E1000_REMOVED(hw_addr))
 738                 return ~value;
 739
 740         value = readl(&hw_addr[reg]);
 741
 742         /* reads should not return all F's */
 743         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 744                 struct net_device *netdev = igb->netdev;
 745                 hw->hw_addr = NULL;
 746                 netdev_err(netdev, "PCIe link lost\n");
 747                 WARN(pci_device_is_present(igb->pdev),
 748                      "igb: Failed to read reg 0x%x!\n", reg);
 749         }
 750
 751         return value;
 752 }
 753
 754 /**
 755  *  igb_write_ivar - configure ivar for given MSI-X vector
 756  *  @hw: pointer to the HW structure
 757  *  @msix_vector: vector number we are allocating to a given ring
 758  *  @index: row index of IVAR register to write within IVAR table
 759  *  @offset: column offset of in IVAR, should be multiple of 8
 760  *
 761  *  This function is intended to handle the writing of the IVAR register
 762  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 763  *  each containing an cause allocation for an Rx and Tx ring, and a
 764  *  variable number of rows depending on the number of queues supported.
 765  **/
 766 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 767                            int index, int offset)
 768 {
 769         u32 ivar = array_rd32(E1000_IVAR0, index);
 770
 771         /* clear any bits that are currently set */
 772         ivar &= ~((u32)0xFF << offset);
 773
 774         /* write vector and valid bit */
 775         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 776
 777         array_wr32(E1000_IVAR0, index, ivar);
 778 }
 779
 780 #define IGB_N0_QUEUE -1
 781 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 782 {
 783         struct igb_adapter *adapter = q_vector->adapter;
 784         struct e1000_hw *hw = &adapter->hw;
 785         int rx_queue = IGB_N0_QUEUE;
 786         int tx_queue = IGB_N0_QUEUE;
 787         u32 msixbm = 0;
 788
 789         if (q_vector->rx.ring)
 790                 rx_queue = q_vector->rx.ring->reg_idx;
 791         if (q_vector->tx.ring)
 792                 tx_queue = q_vector->tx.ring->reg_idx;
 793
 794         switch (hw->mac.type) {
 795         case e1000_82575:
 796                 /* The 82575 assigns vectors using a bitmask, which matches the
 797                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 798                  * or more queues to a vector, we write the appropriate bits
 799                  * into the MSIXBM register for that vector.
 800                  */
 801                 if (rx_queue > IGB_N0_QUEUE)
 802                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 803                 if (tx_queue > IGB_N0_QUEUE)
 804                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 805                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 806                         msixbm |= E1000_EIMS_OTHER;
 807                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 808                 q_vector->eims_value = msixbm;
 809                 break;
 810         case e1000_82576:
 811                 /* 82576 uses a table that essentially consists of 2 columns
 812                  * with 8 rows.  The ordering is column-major so we use the
 813                  * lower 3 bits as the row index, and the 4th bit as the
 814                  * column offset.
 815                  */
 816                 if (rx_queue > IGB_N0_QUEUE)
 817                         igb_write_ivar(hw, msix_vector,
 818                                        rx_queue & 0x7,
 819                                        (rx_queue & 0x8) << 1);
 820                 if (tx_queue > IGB_N0_QUEUE)
 821                         igb_write_ivar(hw, msix_vector,
 822                                        tx_queue & 0x7,
 823                                        ((tx_queue & 0x8) << 1) + 8);
 824                 q_vector->eims_value = BIT(msix_vector);
 825                 break;
 826         case e1000_82580:
 827         case e1000_i350:
 828         case e1000_i354:
 829         case e1000_i210:
 830         case e1000_i211:
 831                 /* On 82580 and newer adapters the scheme is similar to 82576
 832                  * however instead of ordering column-major we have things
 833                  * ordered row-major.  So we traverse the table by using
 834                  * bit 0 as the column offset, and the remaining bits as the
 835                  * row index.
 836                  */
 837                 if (rx_queue > IGB_N0_QUEUE)
 838                         igb_write_ivar(hw, msix_vector,
 839                                        rx_queue >> 1,
 840                                        (rx_queue & 0x1) << 4);
 841                 if (tx_queue > IGB_N0_QUEUE)
 842                         igb_write_ivar(hw, msix_vector,
 843                                        tx_queue >> 1,
 844                                        ((tx_queue & 0x1) << 4) + 8);
 845                 q_vector->eims_value = BIT(msix_vector);
 846                 break;
 847         default:
 848                 BUG();
 849                 break;
 850         }
 851
 852         /* add q_vector eims value to global eims_enable_mask */
 853         adapter->eims_enable_mask |= q_vector->eims_value;
 854
 855         /* configure q_vector to set itr on first interrupt */
 856         q_vector->set_itr = 1;
 857 }
 858
 859 /**
 860  *  igb_configure_msix - Configure MSI-X hardware
 861  *  @adapter: board private structure to initialize
 862  *
 863  *  igb_configure_msix sets up the hardware to properly
 864  *  generate MSI-X interrupts.
 865  **/
 866 static void igb_configure_msix(struct igb_adapter *adapter)
 867 {
 868         u32 tmp;
 869         int i, vector = 0;
 870         struct e1000_hw *hw = &adapter->hw;
 871
 872         adapter->eims_enable_mask = 0;
 873
 874         /* set vector for other causes, i.e. link changes */
 875         switch (hw->mac.type) {
 876         case e1000_82575:
 877                 tmp = rd32(E1000_CTRL_EXT);
 878                 /* enable MSI-X PBA support*/
 879                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 880
 881                 /* Auto-Mask interrupts upon ICR read. */
 882                 tmp |= E1000_CTRL_EXT_EIAME;
 883                 tmp |= E1000_CTRL_EXT_IRCA;
 884
 885                 wr32(E1000_CTRL_EXT, tmp);
 886
 887                 /* enable msix_other interrupt */
 888                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 889                 adapter->eims_other = E1000_EIMS_OTHER;
 890
 891                 break;
 892
 893         case e1000_82576:
 894         case e1000_82580:
 895         case e1000_i350:
 896         case e1000_i354:
 897         case e1000_i210:
 898         case e1000_i211:
 899                 /* Turn on MSI-X capability first, or our settings
 900                  * won't stick.  And it will take days to debug.
 901                  */
 902                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 903                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 904                      E1000_GPIE_NSICR);
 905
 906                 /* enable msix_other interrupt */
 907                 adapter->eims_other = BIT(vector);
 908                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 909
 910                 wr32(E1000_IVAR_MISC, tmp);
 911                 break;
 912         default:
 913                 /* do nothing, since nothing else supports MSI-X */
 914                 break;
 915         } /* switch (hw->mac.type) */
 916
 917         adapter->eims_enable_mask |= adapter->eims_other;
 918
 919         for (i = 0; i < adapter->num_q_vectors; i++)
 920                 igb_assign_vector(adapter->q_vector[i], vector++);
 921
 922         wrfl();
 923 }
 924
 925 /**
 926  *  igb_request_msix - Initialize MSI-X interrupts
 927  *  @adapter: board private structure to initialize
 928  *
 929  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 930  *  kernel.
 931  **/
 932 static int igb_request_msix(struct igb_adapter *adapter)
 933 {
 934         unsigned int num_q_vectors = adapter->num_q_vectors;
 935         struct net_device *netdev = adapter->netdev;
 936         int i, err = 0, vector = 0, free_vector = 0;
 937
 938         err = request_irq(adapter->msix_entries[vector].vector,
 939                           igb_msix_other, 0, netdev->name, adapter);
 940         if (err)
 941                 goto err_out;
 942
 943         if (num_q_vectors > MAX_Q_VECTORS) {
 944                 num_q_vectors = MAX_Q_VECTORS;
 945                 dev_warn(&adapter->pdev->dev,
 946                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 947                          adapter->num_q_vectors, MAX_Q_VECTORS);
 948         }
 949         for (i = 0; i < num_q_vectors; i++) {
 950                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 951
 952                 vector++;
 953
 954                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 955
 956                 if (q_vector->rx.ring && q_vector->tx.ring)
 957                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 958                                 q_vector->rx.ring->queue_index);
 959                 else if (q_vector->tx.ring)
 960                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 961                                 q_vector->tx.ring->queue_index);
 962                 else if (q_vector->rx.ring)
 963                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 964                                 q_vector->rx.ring->queue_index);
 965                 else
 966                         sprintf(q_vector->name, "%s-unused", netdev->name);
 967
 968                 err = request_irq(adapter->msix_entries[vector].vector,
 969                                   igb_msix_ring, 0, q_vector->name,
 970                                   q_vector);
 971                 if (err)
 972                         goto err_free;
 973         }
 974
 975         igb_configure_msix(adapter);
 976         return 0;
 977
 978 err_free:
 979         /* free already assigned IRQs */
 980         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 981
 982         vector--;
 983         for (i = 0; i < vector; i++) {
 984                 free_irq(adapter->msix_entries[free_vector++].vector,
 985                          adapter->q_vector[i]);
 986         }
 987 err_out:
 988         return err;
 989 }
 990
 991 /**
 992  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 993  *  @adapter: board private structure to initialize
 994  *  @v_idx: Index of vector to be freed
 995  *
 996  *  This function frees the memory allocated to the q_vector.
 997  **/
 998 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 999 {
1000         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1001
1002         adapter->q_vector[v_idx] = NULL;
1003
1004         /* igb_get_stats64() might access the rings on this vector,
1005          * we must wait a grace period before freeing it.
1006          */
1007         if (q_vector)
1008                 kfree_rcu(q_vector, rcu);
1009 }
1010
1011 /**
1012  *  igb_reset_q_vector - Reset config for interrupt vector
1013  *  @adapter: board private structure to initialize
1014  *  @v_idx: Index of vector to be reset
1015  *
1016  *  If NAPI is enabled it will delete any references to the
1017  *  NAPI struct. This is preparation for igb_free_q_vector.
1018  **/
1019 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1020 {
1021         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1022
1023         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1024          * allocated. So, q_vector is NULL so we should stop here.
1025          */
1026         if (!q_vector)
1027                 return;
1028
1029         if (q_vector->tx.ring)
1030                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1031
1032         if (q_vector->rx.ring)
1033                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1034
1035         netif_napi_del(&q_vector->napi);
1036
1037 }
1038
1039 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1040 {
1041         int v_idx = adapter->num_q_vectors;
1042
1043         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1044                 pci_disable_msix(adapter->pdev);
1045         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1046                 pci_disable_msi(adapter->pdev);
1047
1048         while (v_idx--)
1049                 igb_reset_q_vector(adapter, v_idx);
1050 }
1051
1052 /**
1053  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1054  *  @adapter: board private structure to initialize
1055  *
1056  *  This function frees the memory allocated to the q_vectors.  In addition if
1057  *  NAPI is enabled it will delete any references to the NAPI struct prior
1058  *  to freeing the q_vector.
1059  **/
1060 static void igb_free_q_vectors(struct igb_adapter *adapter)
1061 {
1062         int v_idx = adapter->num_q_vectors;
1063
1064         adapter->num_tx_queues = 0;
1065         adapter->num_rx_queues = 0;
1066         adapter->num_q_vectors = 0;
1067
1068         while (v_idx--) {
1069                 igb_reset_q_vector(adapter, v_idx);
1070                 igb_free_q_vector(adapter, v_idx);
1071         }
1072 }
1073
1074 /**
1075  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1076  *  @adapter: board private structure to initialize
1077  *
1078  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1079  *  MSI-X interrupts allocated.
1080  */
1081 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1082 {
1083         igb_free_q_vectors(adapter);
1084         igb_reset_interrupt_capability(adapter);
1085 }
1086
1087 /**
1088  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1089  *  @adapter: board private structure to initialize
1090  *  @msix: boolean value of MSIX capability
1091  *
1092  *  Attempt to configure interrupts using the best available
1093  *  capabilities of the hardware and kernel.
1094  **/
1095 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1096 {
1097         int err;
1098         int numvecs, i;
1099
1100         if (!msix)
1101                 goto msi_only;
1102         adapter->flags |= IGB_FLAG_HAS_MSIX;
1103
1104         /* Number of supported queues. */
1105         adapter->num_rx_queues = adapter->rss_queues;
1106         if (adapter->vfs_allocated_count)
1107                 adapter->num_tx_queues = 1;
1108         else
1109                 adapter->num_tx_queues = adapter->rss_queues;
1110
1111         /* start with one vector for every Rx queue */
1112         numvecs = adapter->num_rx_queues;
1113
1114         /* if Tx handler is separate add 1 for every Tx queue */
1115         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1116                 numvecs += adapter->num_tx_queues;
1117
1118         /* store the number of vectors reserved for queues */
1119         adapter->num_q_vectors = numvecs;
1120
1121         /* add 1 vector for link status interrupts */
1122         numvecs++;
1123         for (i = 0; i < numvecs; i++)
1124                 adapter->msix_entries[i].entry = i;
1125
1126         err = pci_enable_msix_range(adapter->pdev,
1127                                     adapter->msix_entries,
1128                                     numvecs,
1129                                     numvecs);
1130         if (err > 0)
1131                 return;
1132
1133         igb_reset_interrupt_capability(adapter);
1134
1135         /* If we can't do MSI-X, try MSI */
1136 msi_only:
1137         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1138 #ifdef CONFIG_PCI_IOV
1139         /* disable SR-IOV for non MSI-X configurations */
1140         if (adapter->vf_data) {
1141                 struct e1000_hw *hw = &adapter->hw;
1142                 /* disable iov and allow time for transactions to clear */
1143                 pci_disable_sriov(adapter->pdev);
1144                 msleep(500);
1145
1146                 kfree(adapter->vf_mac_list);
1147                 adapter->vf_mac_list = NULL;
1148                 kfree(adapter->vf_data);
1149                 adapter->vf_data = NULL;
1150                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1151                 wrfl();
1152                 msleep(100);
1153                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1154         }
1155 #endif
1156         adapter->vfs_allocated_count = 0;
1157         adapter->rss_queues = 1;
1158         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1159         adapter->num_rx_queues = 1;
1160         adapter->num_tx_queues = 1;
1161         adapter->num_q_vectors = 1;
1162         if (!pci_enable_msi(adapter->pdev))
1163                 adapter->flags |= IGB_FLAG_HAS_MSI;
1164 }
1165
1166 static void igb_add_ring(struct igb_ring *ring,
1167                          struct igb_ring_container *head)
1168 {
1169         head->ring = ring;
1170         head->count++;
1171 }
1172
1173 /**
1174  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1175  *  @adapter: board private structure to initialize
1176  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1177  *  @v_idx: index of vector in adapter struct
1178  *  @txr_count: total number of Tx rings to allocate
1179  *  @txr_idx: index of first Tx ring to allocate
1180  *  @rxr_count: total number of Rx rings to allocate
1181  *  @rxr_idx: index of first Rx ring to allocate
1182  *
1183  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1184  **/
1185 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1186                               int v_count, int v_idx,
1187                               int txr_count, int txr_idx,
1188                               int rxr_count, int rxr_idx)
1189 {
1190         struct igb_q_vector *q_vector;
1191         struct igb_ring *ring;
1192         int ring_count;
1193         size_t size;
1194
1195         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1196         if (txr_count > 1 || rxr_count > 1)
1197                 return -ENOMEM;
1198
1199         ring_count = txr_count + rxr_count;
1200         size = struct_size(q_vector, ring, ring_count);
1201
1202         /* allocate q_vector and rings */
1203         q_vector = adapter->q_vector[v_idx];
1204         if (!q_vector) {
1205                 q_vector = kzalloc(size, GFP_KERNEL);
1206         } else if (size > ksize(q_vector)) {
1207                 kfree_rcu(q_vector, rcu);
1208                 q_vector = kzalloc(size, GFP_KERNEL);
1209         } else {
1210                 memset(q_vector, 0, size);
1211         }
1212         if (!q_vector)
1213                 return -ENOMEM;
1214
1215         /* initialize NAPI */
1216         netif_napi_add(adapter->netdev, &q_vector->napi,
1217                        igb_poll, 64);
1218
1219         /* tie q_vector and adapter together */
1220         adapter->q_vector[v_idx] = q_vector;
1221         q_vector->adapter = adapter;
1222
1223         /* initialize work limits */
1224         q_vector->tx.work_limit = adapter->tx_work_limit;
1225
1226         /* initialize ITR configuration */
1227         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1228         q_vector->itr_val = IGB_START_ITR;
1229
1230         /* initialize pointer to rings */
1231         ring = q_vector->ring;
1232
1233         /* intialize ITR */
1234         if (rxr_count) {
1235                 /* rx or rx/tx vector */
1236                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1237                         q_vector->itr_val = adapter->rx_itr_setting;
1238         } else {
1239                 /* tx only vector */
1240                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1241                         q_vector->itr_val = adapter->tx_itr_setting;
1242         }
1243
1244         if (txr_count) {
1245                 /* assign generic ring traits */
1246                 ring->dev = &adapter->pdev->dev;
1247                 ring->netdev = adapter->netdev;
1248
1249                 /* configure backlink on ring */
1250                 ring->q_vector = q_vector;
1251
1252                 /* update q_vector Tx values */
1253                 igb_add_ring(ring, &q_vector->tx);
1254
1255                 /* For 82575, context index must be unique per ring. */
1256                 if (adapter->hw.mac.type == e1000_82575)
1257                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1258
1259                 /* apply Tx specific ring traits */
1260                 ring->count = adapter->tx_ring_count;
1261                 ring->queue_index = txr_idx;
1262
1263                 ring->cbs_enable = false;
1264                 ring->idleslope = 0;
1265                 ring->sendslope = 0;
1266                 ring->hicredit = 0;
1267                 ring->locredit = 0;
1268
1269                 u64_stats_init(&ring->tx_syncp);
1270                 u64_stats_init(&ring->tx_syncp2);
1271
1272                 /* assign ring to adapter */
1273                 adapter->tx_ring[txr_idx] = ring;
1274
1275                 /* push pointer to next ring */
1276                 ring++;
1277         }
1278
1279         if (rxr_count) {
1280                 /* assign generic ring traits */
1281                 ring->dev = &adapter->pdev->dev;
1282                 ring->netdev = adapter->netdev;
1283
1284                 /* configure backlink on ring */
1285                 ring->q_vector = q_vector;
1286
1287                 /* update q_vector Rx values */
1288                 igb_add_ring(ring, &q_vector->rx);
1289
1290                 /* set flag indicating ring supports SCTP checksum offload */
1291                 if (adapter->hw.mac.type >= e1000_82576)
1292                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1293
1294                 /* On i350, i354, i210, and i211, loopback VLAN packets
1295                  * have the tag byte-swapped.
1296                  */
1297                 if (adapter->hw.mac.type >= e1000_i350)
1298                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1299
1300                 /* apply Rx specific ring traits */
1301                 ring->count = adapter->rx_ring_count;
1302                 ring->queue_index = rxr_idx;
1303
1304                 u64_stats_init(&ring->rx_syncp);
1305
1306                 /* assign ring to adapter */
1307                 adapter->rx_ring[rxr_idx] = ring;
1308         }
1309
1310         return 0;
1311 }
1312
1313
1314 /**
1315  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1316  *  @adapter: board private structure to initialize
1317  *
1318  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1319  *  return -ENOMEM.
1320  **/
1321 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1322 {
1323         int q_vectors = adapter->num_q_vectors;
1324         int rxr_remaining = adapter->num_rx_queues;
1325         int txr_remaining = adapter->num_tx_queues;
1326         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1327         int err;
1328
1329         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1330                 for (; rxr_remaining; v_idx++) {
1331                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1332                                                  0, 0, 1, rxr_idx);
1333
1334                         if (err)
1335                                 goto err_out;
1336
1337                         /* update counts and index */
1338                         rxr_remaining--;
1339                         rxr_idx++;
1340                 }
1341         }
1342
1343         for (; v_idx < q_vectors; v_idx++) {
1344                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1345                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1346
1347                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1348                                          tqpv, txr_idx, rqpv, rxr_idx);
1349
1350                 if (err)
1351                         goto err_out;
1352
1353                 /* update counts and index */
1354                 rxr_remaining -= rqpv;
1355                 txr_remaining -= tqpv;
1356                 rxr_idx++;
1357                 txr_idx++;
1358         }
1359
1360         return 0;
1361
1362 err_out:
1363         adapter->num_tx_queues = 0;
1364         adapter->num_rx_queues = 0;
1365         adapter->num_q_vectors = 0;
1366
1367         while (v_idx--)
1368                 igb_free_q_vector(adapter, v_idx);
1369
1370         return -ENOMEM;
1371 }
1372
1373 /**
1374  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1375  *  @adapter: board private structure to initialize
1376  *  @msix: boolean value of MSIX capability
1377  *
1378  *  This function initializes the interrupts and allocates all of the queues.
1379  **/
1380 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1381 {
1382         struct pci_dev *pdev = adapter->pdev;
1383         int err;
1384
1385         igb_set_interrupt_capability(adapter, msix);
1386
1387         err = igb_alloc_q_vectors(adapter);
1388         if (err) {
1389                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1390                 goto err_alloc_q_vectors;
1391         }
1392
1393         igb_cache_ring_register(adapter);
1394
1395         return 0;
1396
1397 err_alloc_q_vectors:
1398         igb_reset_interrupt_capability(adapter);
1399         return err;
1400 }
1401
1402 /**
1403  *  igb_request_irq - initialize interrupts
1404  *  @adapter: board private structure to initialize
1405  *
1406  *  Attempts to configure interrupts using the best available
1407  *  capabilities of the hardware and kernel.
1408  **/
1409 static int igb_request_irq(struct igb_adapter *adapter)
1410 {
1411         struct net_device *netdev = adapter->netdev;
1412         struct pci_dev *pdev = adapter->pdev;
1413         int err = 0;
1414
1415         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1416                 err = igb_request_msix(adapter);
1417                 if (!err)
1418                         goto request_done;
1419                 /* fall back to MSI */
1420                 igb_free_all_tx_resources(adapter);
1421                 igb_free_all_rx_resources(adapter);
1422
1423                 igb_clear_interrupt_scheme(adapter);
1424                 err = igb_init_interrupt_scheme(adapter, false);
1425                 if (err)
1426                         goto request_done;
1427
1428                 igb_setup_all_tx_resources(adapter);
1429                 igb_setup_all_rx_resources(adapter);
1430                 igb_configure(adapter);
1431         }
1432
1433         igb_assign_vector(adapter->q_vector[0], 0);
1434
1435         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1436                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1437                                   netdev->name, adapter);
1438                 if (!err)
1439                         goto request_done;
1440
1441                 /* fall back to legacy interrupts */
1442                 igb_reset_interrupt_capability(adapter);
1443                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1444         }
1445
1446         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1447                           netdev->name, adapter);
1448
1449         if (err)
1450                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1451                         err);
1452
1453 request_done:
1454         return err;
1455 }
1456
1457 static void igb_free_irq(struct igb_adapter *adapter)
1458 {
1459         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1460                 int vector = 0, i;
1461
1462                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1463
1464                 for (i = 0; i < adapter->num_q_vectors; i++)
1465                         free_irq(adapter->msix_entries[vector++].vector,
1466                                  adapter->q_vector[i]);
1467         } else {
1468                 free_irq(adapter->pdev->irq, adapter);
1469         }
1470 }
1471
1472 /**
1473  *  igb_irq_disable - Mask off interrupt generation on the NIC
1474  *  @adapter: board private structure
1475  **/
1476 static void igb_irq_disable(struct igb_adapter *adapter)
1477 {
1478         struct e1000_hw *hw = &adapter->hw;
1479
1480         /* we need to be careful when disabling interrupts.  The VFs are also
1481          * mapped into these registers and so clearing the bits can cause
1482          * issues on the VF drivers so we only need to clear what we set
1483          */
1484         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1485                 u32 regval = rd32(E1000_EIAM);
1486
1487                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1488                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1489                 regval = rd32(E1000_EIAC);
1490                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1491         }
1492
1493         wr32(E1000_IAM, 0);
1494         wr32(E1000_IMC, ~0);
1495         wrfl();
1496         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1497                 int i;
1498
1499                 for (i = 0; i < adapter->num_q_vectors; i++)
1500                         synchronize_irq(adapter->msix_entries[i].vector);
1501         } else {
1502                 synchronize_irq(adapter->pdev->irq);
1503         }
1504 }
1505
1506 /**
1507  *  igb_irq_enable - Enable default interrupt generation settings
1508  *  @adapter: board private structure
1509  **/
1510 static void igb_irq_enable(struct igb_adapter *adapter)
1511 {
1512         struct e1000_hw *hw = &adapter->hw;
1513
1514         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1515                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1516                 u32 regval = rd32(E1000_EIAC);
1517
1518                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1519                 regval = rd32(E1000_EIAM);
1520                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1521                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1522                 if (adapter->vfs_allocated_count) {
1523                         wr32(E1000_MBVFIMR, 0xFF);
1524                         ims |= E1000_IMS_VMMB;
1525                 }
1526                 wr32(E1000_IMS, ims);
1527         } else {
1528                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1529                                 E1000_IMS_DRSTA);
1530                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1531                                 E1000_IMS_DRSTA);
1532         }
1533 }
1534
1535 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1536 {
1537         struct e1000_hw *hw = &adapter->hw;
1538         u16 pf_id = adapter->vfs_allocated_count;
1539         u16 vid = adapter->hw.mng_cookie.vlan_id;
1540         u16 old_vid = adapter->mng_vlan_id;
1541
1542         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1543                 /* add VID to filter table */
1544                 igb_vfta_set(hw, vid, pf_id, true, true);
1545                 adapter->mng_vlan_id = vid;
1546         } else {
1547                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1548         }
1549
1550         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1551             (vid != old_vid) &&
1552             !test_bit(old_vid, adapter->active_vlans)) {
1553                 /* remove VID from filter table */
1554                 igb_vfta_set(hw, vid, pf_id, false, true);
1555         }
1556 }
1557
1558 /**
1559  *  igb_release_hw_control - release control of the h/w to f/w
1560  *  @adapter: address of board private structure
1561  *
1562  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1563  *  For ASF and Pass Through versions of f/w this means that the
1564  *  driver is no longer loaded.
1565  **/
1566 static void igb_release_hw_control(struct igb_adapter *adapter)
1567 {
1568         struct e1000_hw *hw = &adapter->hw;
1569         u32 ctrl_ext;
1570
1571         /* Let firmware take over control of h/w */
1572         ctrl_ext = rd32(E1000_CTRL_EXT);
1573         wr32(E1000_CTRL_EXT,
1574                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1575 }
1576
1577 /**
1578  *  igb_get_hw_control - get control of the h/w from f/w
1579  *  @adapter: address of board private structure
1580  *
1581  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1582  *  For ASF and Pass Through versions of f/w this means that
1583  *  the driver is loaded.
1584  **/
1585 static void igb_get_hw_control(struct igb_adapter *adapter)
1586 {
1587         struct e1000_hw *hw = &adapter->hw;
1588         u32 ctrl_ext;
1589
1590         /* Let firmware know the driver has taken over */
1591         ctrl_ext = rd32(E1000_CTRL_EXT);
1592         wr32(E1000_CTRL_EXT,
1593                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1594 }
1595
1596 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1597 {
1598         struct net_device *netdev = adapter->netdev;
1599         struct e1000_hw *hw = &adapter->hw;
1600
1601         WARN_ON(hw->mac.type != e1000_i210);
1602
1603         if (enable)
1604                 adapter->flags |= IGB_FLAG_FQTSS;
1605         else
1606                 adapter->flags &= ~IGB_FLAG_FQTSS;
1607
1608         if (netif_running(netdev))
1609                 schedule_work(&adapter->reset_task);
1610 }
1611
1612 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1613 {
1614         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1615 }
1616
1617 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1618                                    enum tx_queue_prio prio)
1619 {
1620         u32 val;
1621
1622         WARN_ON(hw->mac.type != e1000_i210);
1623         WARN_ON(queue < 0 || queue > 4);
1624
1625         val = rd32(E1000_I210_TXDCTL(queue));
1626
1627         if (prio == TX_QUEUE_PRIO_HIGH)
1628                 val |= E1000_TXDCTL_PRIORITY;
1629         else
1630                 val &= ~E1000_TXDCTL_PRIORITY;
1631
1632         wr32(E1000_I210_TXDCTL(queue), val);
1633 }
1634
1635 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1636 {
1637         u32 val;
1638
1639         WARN_ON(hw->mac.type != e1000_i210);
1640         WARN_ON(queue < 0 || queue > 1);
1641
1642         val = rd32(E1000_I210_TQAVCC(queue));
1643
1644         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1645                 val |= E1000_TQAVCC_QUEUEMODE;
1646         else
1647                 val &= ~E1000_TQAVCC_QUEUEMODE;
1648
1649         wr32(E1000_I210_TQAVCC(queue), val);
1650 }
1651
1652 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1653 {
1654         int i;
1655
1656         for (i = 0; i < adapter->num_tx_queues; i++) {
1657                 if (adapter->tx_ring[i]->cbs_enable)
1658                         return true;
1659         }
1660
1661         return false;
1662 }
1663
1664 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1665 {
1666         int i;
1667
1668         for (i = 0; i < adapter->num_tx_queues; i++) {
1669                 if (adapter->tx_ring[i]->launchtime_enable)
1670                         return true;
1671         }
1672
1673         return false;
1674 }
1675
1676 /**
1677  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1678  *  @adapter: pointer to adapter struct
1679  *  @queue: queue number
1680  *
1681  *  Configure CBS and Launchtime for a given hardware queue.
1682  *  Parameters are retrieved from the correct Tx ring, so
1683  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1684  *  for setting those correctly prior to this function being called.
1685  **/
1686 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1687 {
1688         struct net_device *netdev = adapter->netdev;
1689         struct e1000_hw *hw = &adapter->hw;
1690         struct igb_ring *ring;
1691         u32 tqavcc, tqavctrl;
1692         u16 value;
1693
1694         WARN_ON(hw->mac.type != e1000_i210);
1695         WARN_ON(queue < 0 || queue > 1);
1696         ring = adapter->tx_ring[queue];
1697
1698         /* If any of the Qav features is enabled, configure queues as SR and
1699          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1700          * as SP.
1701          */
1702         if (ring->cbs_enable || ring->launchtime_enable) {
1703                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1704                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1705         } else {
1706                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1707                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1708         }
1709
1710         /* If CBS is enabled, set DataTranARB and config its parameters. */
1711         if (ring->cbs_enable || queue == 0) {
1712                 /* i210 does not allow the queue 0 to be in the Strict
1713                  * Priority mode while the Qav mode is enabled, so,
1714                  * instead of disabling strict priority mode, we give
1715                  * queue 0 the maximum of credits possible.
1716                  *
1717                  * See section 8.12.19 of the i210 datasheet, "Note:
1718                  * Queue0 QueueMode must be set to 1b when
1719                  * TransmitMode is set to Qav."
1720                  */
1721                 if (queue == 0 && !ring->cbs_enable) {
1722                         /* max "linkspeed" idleslope in kbps */
1723                         ring->idleslope = 1000000;
1724                         ring->hicredit = ETH_FRAME_LEN;
1725                 }
1726
1727                 /* Always set data transfer arbitration to credit-based
1728                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1729                  * the queues.
1730                  */
1731                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1732                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1733                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1734
1735                 /* According to i210 datasheet section 7.2.7.7, we should set
1736                  * the 'idleSlope' field from TQAVCC register following the
1737                  * equation:
1738                  *
1739                  * For 100 Mbps link speed:
1740                  *
1741                  *     value = BW * 0x7735 * 0.2                          (E1)
1742                  *
1743                  * For 1000Mbps link speed:
1744                  *
1745                  *     value = BW * 0x7735 * 2                            (E2)
1746                  *
1747                  * E1 and E2 can be merged into one equation as shown below.
1748                  * Note that 'link-speed' is in Mbps.
1749                  *
1750                  *     value = BW * 0x7735 * 2 * link-speed
1751                  *                           --------------               (E3)
1752                  *                                1000
1753                  *
1754                  * 'BW' is the percentage bandwidth out of full link speed
1755                  * which can be found with the following equation. Note that
1756                  * idleSlope here is the parameter from this function which
1757                  * is in kbps.
1758                  *
1759                  *     BW =     idleSlope
1760                  *          -----------------                             (E4)
1761                  *          link-speed * 1000
1762                  *
1763                  * That said, we can come up with a generic equation to
1764                  * calculate the value we should set it TQAVCC register by
1765                  * replacing 'BW' in E3 by E4. The resulting equation is:
1766                  *
1767                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1768                  *         -----------------            --------------    (E5)
1769                  *         link-speed * 1000                 1000
1770                  *
1771                  * 'link-speed' is present in both sides of the fraction so
1772                  * it is canceled out. The final equation is the following:
1773                  *
1774                  *     value = idleSlope * 61034
1775                  *             -----------------                          (E6)
1776                  *                  1000000
1777                  *
1778                  * NOTE: For i210, given the above, we can see that idleslope
1779                  *       is represented in 16.38431 kbps units by the value at
1780                  *       the TQAVCC register (1Gbps / 61034), which reduces
1781                  *       the granularity for idleslope increments.
1782                  *       For instance, if you want to configure a 2576kbps
1783                  *       idleslope, the value to be written on the register
1784                  *       would have to be 157.23. If rounded down, you end
1785                  *       up with less bandwidth available than originally
1786                  *       required (~2572 kbps). If rounded up, you end up
1787                  *       with a higher bandwidth (~2589 kbps). Below the
1788                  *       approach we take is to always round up the
1789                  *       calculated value, so the resulting bandwidth might
1790                  *       be slightly higher for some configurations.
1791                  */
1792                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1793
1794                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1795                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1796                 tqavcc |= value;
1797                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1798
1799                 wr32(E1000_I210_TQAVHC(queue),
1800                      0x80000000 + ring->hicredit * 0x7735);
1801         } else {
1802
1803                 /* Set idleSlope to zero. */
1804                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1805                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1806                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1807
1808                 /* Set hiCredit to zero. */
1809                 wr32(E1000_I210_TQAVHC(queue), 0);
1810
1811                 /* If CBS is not enabled for any queues anymore, then return to
1812                  * the default state of Data Transmission Arbitration on
1813                  * TQAVCTRL.
1814                  */
1815                 if (!is_any_cbs_enabled(adapter)) {
1816                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1817                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1818                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1819                 }
1820         }
1821
1822         /* If LaunchTime is enabled, set DataTranTIM. */
1823         if (ring->launchtime_enable) {
1824                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1825                  * for any of the SR queues, and configure fetchtime delta.
1826                  * XXX NOTE:
1827                  *     - LaunchTime will be enabled for all SR queues.
1828                  *     - A fixed offset can be added relative to the launch
1829                  *       time of all packets if configured at reg LAUNCH_OS0.
1830                  *       We are keeping it as 0 for now (default value).
1831                  */
1832                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1833                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1834                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1835                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1836         } else {
1837                 /* If Launchtime is not enabled for any SR queues anymore,
1838                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1839                  * effectively disabling Launchtime.
1840                  */
1841                 if (!is_any_txtime_enabled(adapter)) {
1842                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1843                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1844                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1845                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1846                 }
1847         }
1848
1849         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1850          * CBS are not configurable by software so we don't do any 'controller
1851          * configuration' in respect to these parameters.
1852          */
1853
1854         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1855                    ring->cbs_enable ? "enabled" : "disabled",
1856                    ring->launchtime_enable ? "enabled" : "disabled",
1857                    queue,
1858                    ring->idleslope, ring->sendslope,
1859                    ring->hicredit, ring->locredit);
1860 }
1861
1862 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1863                                   bool enable)
1864 {
1865         struct igb_ring *ring;
1866
1867         if (queue < 0 || queue > adapter->num_tx_queues)
1868                 return -EINVAL;
1869
1870         ring = adapter->tx_ring[queue];
1871         ring->launchtime_enable = enable;
1872
1873         return 0;
1874 }
1875
1876 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1877                                bool enable, int idleslope, int sendslope,
1878                                int hicredit, int locredit)
1879 {
1880         struct igb_ring *ring;
1881
1882         if (queue < 0 || queue > adapter->num_tx_queues)
1883                 return -EINVAL;
1884
1885         ring = adapter->tx_ring[queue];
1886
1887         ring->cbs_enable = enable;
1888         ring->idleslope = idleslope;
1889         ring->sendslope = sendslope;
1890         ring->hicredit = hicredit;
1891         ring->locredit = locredit;
1892
1893         return 0;
1894 }
1895
1896 /**
1897  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1898  *  @adapter: pointer to adapter struct
1899  *
1900  *  Configure TQAVCTRL register switching the controller's Tx mode
1901  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1902  *  a call to igb_config_tx_modes() per queue so any previously saved
1903  *  Tx parameters are applied.
1904  **/
1905 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1906 {
1907         struct net_device *netdev = adapter->netdev;
1908         struct e1000_hw *hw = &adapter->hw;
1909         u32 val;
1910
1911         /* Only i210 controller supports changing the transmission mode. */
1912         if (hw->mac.type != e1000_i210)
1913                 return;
1914
1915         if (is_fqtss_enabled(adapter)) {
1916                 int i, max_queue;
1917
1918                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1919                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1920                  * so SP queues wait for SR ones.
1921                  */
1922                 val = rd32(E1000_I210_TQAVCTRL);
1923                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1924                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1925                 wr32(E1000_I210_TQAVCTRL, val);
1926
1927                 /* Configure Tx and Rx packet buffers sizes as described in
1928                  * i210 datasheet section 7.2.7.7.
1929                  */
1930                 val = rd32(E1000_TXPBS);
1931                 val &= ~I210_TXPBSIZE_MASK;
1932                 val |= I210_TXPBSIZE_PB0_6KB | I210_TXPBSIZE_PB1_6KB |
1933                         I210_TXPBSIZE_PB2_6KB | I210_TXPBSIZE_PB3_6KB;
1934                 wr32(E1000_TXPBS, val);
1935
1936                 val = rd32(E1000_RXPBS);
1937                 val &= ~I210_RXPBSIZE_MASK;
1938                 val |= I210_RXPBSIZE_PB_30KB;
1939                 wr32(E1000_RXPBS, val);
1940
1941                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1942                  * register should not exceed the buffer size programmed in
1943                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1944                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1945                  * 4kB / 64.
1946                  *
1947                  * However, when we do so, no frame from queue 2 and 3 are
1948                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1949                  * or _equal_ to the buffer size programmed in TXPBS. For this
1950                  * reason, we set set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1951                  */
1952                 val = (4096 - 1) / 64;
1953                 wr32(E1000_I210_DTXMXPKTSZ, val);
1954
1955                 /* Since FQTSS mode is enabled, apply any CBS configuration
1956                  * previously set. If no previous CBS configuration has been
1957                  * done, then the initial configuration is applied, which means
1958                  * CBS is disabled.
1959                  */
1960                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1961                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1962
1963                 for (i = 0; i < max_queue; i++) {
1964                         igb_config_tx_modes(adapter, i);
1965                 }
1966         } else {
1967                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1968                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1969                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1970
1971                 val = rd32(E1000_I210_TQAVCTRL);
1972                 /* According to Section 8.12.21, the other flags we've set when
1973                  * enabling FQTSS are not relevant when disabling FQTSS so we
1974                  * don't set they here.
1975                  */
1976                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1977                 wr32(E1000_I210_TQAVCTRL, val);
1978         }
1979
1980         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1981                    "enabled" : "disabled");
1982 }
1983
1984 /**
1985  *  igb_configure - configure the hardware for RX and TX
1986  *  @adapter: private board structure
1987  **/
1988 static void igb_configure(struct igb_adapter *adapter)
1989 {
1990         struct net_device *netdev = adapter->netdev;
1991         int i;
1992
1993         igb_get_hw_control(adapter);
1994         igb_set_rx_mode(netdev);
1995         igb_setup_tx_mode(adapter);
1996
1997         igb_restore_vlan(adapter);
1998
1999         igb_setup_tctl(adapter);
2000         igb_setup_mrqc(adapter);
2001         igb_setup_rctl(adapter);
2002
2003         igb_nfc_filter_restore(adapter);
2004         igb_configure_tx(adapter);
2005         igb_configure_rx(adapter);
2006
2007         igb_rx_fifo_flush_82575(&adapter->hw);
2008
2009         /* call igb_desc_unused which always leaves
2010          * at least 1 descriptor unused to make sure
2011          * next_to_use != next_to_clean
2012          */
2013         for (i = 0; i < adapter->num_rx_queues; i++) {
2014                 struct igb_ring *ring = adapter->rx_ring[i];
2015                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2016         }
2017 }
2018
2019 /**
2020  *  igb_power_up_link - Power up the phy/serdes link
2021  *  @adapter: address of board private structure
2022  **/
2023 void igb_power_up_link(struct igb_adapter *adapter)
2024 {
2025         igb_reset_phy(&adapter->hw);
2026
2027         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2028                 igb_power_up_phy_copper(&adapter->hw);
2029         else
2030                 igb_power_up_serdes_link_82575(&adapter->hw);
2031
2032         igb_setup_link(&adapter->hw);
2033 }
2034
2035 /**
2036  *  igb_power_down_link - Power down the phy/serdes link
2037  *  @adapter: address of board private structure
2038  */
2039 static void igb_power_down_link(struct igb_adapter *adapter)
2040 {
2041         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2042                 igb_power_down_phy_copper_82575(&adapter->hw);
2043         else
2044                 igb_shutdown_serdes_link_82575(&adapter->hw);
2045 }
2046
2047 /**
2048  * igb_check_swap_media -  Detect and switch function for Media Auto Sense
2049  * @adapter: address of the board private structure
2050  **/
2051 static void igb_check_swap_media(struct igb_adapter *adapter)
2052 {
2053         struct e1000_hw *hw = &adapter->hw;
2054         u32 ctrl_ext, connsw;
2055         bool swap_now = false;
2056
2057         ctrl_ext = rd32(E1000_CTRL_EXT);
2058         connsw = rd32(E1000_CONNSW);
2059
2060         /* need to live swap if current media is copper and we have fiber/serdes
2061          * to go to.
2062          */
2063
2064         if ((hw->phy.media_type == e1000_media_type_copper) &&
2065             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2066                 swap_now = true;
2067         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2068                    !(connsw & E1000_CONNSW_SERDESD)) {
2069                 /* copper signal takes time to appear */
2070                 if (adapter->copper_tries < 4) {
2071                         adapter->copper_tries++;
2072                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2073                         wr32(E1000_CONNSW, connsw);
2074                         return;
2075                 } else {
2076                         adapter->copper_tries = 0;
2077                         if ((connsw & E1000_CONNSW_PHYSD) &&
2078                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2079                                 swap_now = true;
2080                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2081                                 wr32(E1000_CONNSW, connsw);
2082                         }
2083                 }
2084         }
2085
2086         if (!swap_now)
2087                 return;
2088
2089         switch (hw->phy.media_type) {
2090         case e1000_media_type_copper:
2091                 netdev_info(adapter->netdev,
2092                         "MAS: changing media to fiber/serdes\n");
2093                 ctrl_ext |=
2094                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2095                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2096                 adapter->copper_tries = 0;
2097                 break;
2098         case e1000_media_type_internal_serdes:
2099         case e1000_media_type_fiber:
2100                 netdev_info(adapter->netdev,
2101                         "MAS: changing media to copper\n");
2102                 ctrl_ext &=
2103                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2104                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2105                 break;
2106         default:
2107                 /* shouldn't get here during regular operation */
2108                 netdev_err(adapter->netdev,
2109                         "AMS: Invalid media type found, returning\n");
2110                 break;
2111         }
2112         wr32(E1000_CTRL_EXT, ctrl_ext);
2113 }
2114
2115 /**
2116  *  igb_up - Open the interface and prepare it to handle traffic
2117  *  @adapter: board private structure
2118  **/
2119 int igb_up(struct igb_adapter *adapter)
2120 {
2121         struct e1000_hw *hw = &adapter->hw;
2122         int i;
2123
2124         /* hardware has been reset, we need to reload some things */
2125         igb_configure(adapter);
2126
2127         clear_bit(__IGB_DOWN, &adapter->state);
2128
2129         for (i = 0; i < adapter->num_q_vectors; i++)
2130                 napi_enable(&(adapter->q_vector[i]->napi));
2131
2132         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2133                 igb_configure_msix(adapter);
2134         else
2135                 igb_assign_vector(adapter->q_vector[0], 0);
2136
2137         /* Clear any pending interrupts. */
2138         rd32(E1000_TSICR);
2139         rd32(E1000_ICR);
2140         igb_irq_enable(adapter);
2141
2142         /* notify VFs that reset has been completed */
2143         if (adapter->vfs_allocated_count) {
2144                 u32 reg_data = rd32(E1000_CTRL_EXT);
2145
2146                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2147                 wr32(E1000_CTRL_EXT, reg_data);
2148         }
2149
2150         netif_tx_start_all_queues(adapter->netdev);
2151
2152         /* start the watchdog. */
2153         hw->mac.get_link_status = 1;
2154         schedule_work(&adapter->watchdog_task);
2155
2156         if ((adapter->flags & IGB_FLAG_EEE) &&
2157             (!hw->dev_spec._82575.eee_disable))
2158                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2159
2160         return 0;
2161 }
2162
2163 void igb_down(struct igb_adapter *adapter)
2164 {
2165         struct net_device *netdev = adapter->netdev;
2166         struct e1000_hw *hw = &adapter->hw;
2167         u32 tctl, rctl;
2168         int i;
2169
2170         /* signal that we're down so the interrupt handler does not
2171          * reschedule our watchdog timer
2172          */
2173         set_bit(__IGB_DOWN, &adapter->state);
2174
2175         /* disable receives in the hardware */
2176         rctl = rd32(E1000_RCTL);
2177         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2178         /* flush and sleep below */
2179
2180         igb_nfc_filter_exit(adapter);
2181
2182         netif_carrier_off(netdev);
2183         netif_tx_stop_all_queues(netdev);
2184
2185         /* disable transmits in the hardware */
2186         tctl = rd32(E1000_TCTL);
2187         tctl &= ~E1000_TCTL_EN;
2188         wr32(E1000_TCTL, tctl);
2189         /* flush both disables and wait for them to finish */
2190         wrfl();
2191         usleep_range(10000, 11000);
2192
2193         igb_irq_disable(adapter);
2194
2195         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2196
2197         for (i = 0; i < adapter->num_q_vectors; i++) {
2198                 if (adapter->q_vector[i]) {
2199                         napi_synchronize(&adapter->q_vector[i]->napi);
2200                         napi_disable(&adapter->q_vector[i]->napi);
2201                 }
2202         }
2203
2204         del_timer_sync(&adapter->watchdog_timer);
2205         del_timer_sync(&adapter->phy_info_timer);
2206
2207         /* record the stats before reset*/
2208         spin_lock(&adapter->stats64_lock);
2209         igb_update_stats(adapter);
2210         spin_unlock(&adapter->stats64_lock);
2211
2212         adapter->link_speed = 0;
2213         adapter->link_duplex = 0;
2214
2215         if (!pci_channel_offline(adapter->pdev))
2216                 igb_reset(adapter);
2217
2218         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2219         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2220
2221         igb_clean_all_tx_rings(adapter);
2222         igb_clean_all_rx_rings(adapter);
2223 #ifdef CONFIG_IGB_DCA
2224
2225         /* since we reset the hardware DCA settings were cleared */
2226         igb_setup_dca(adapter);
2227 #endif
2228 }
2229
2230 void igb_reinit_locked(struct igb_adapter *adapter)
2231 {
2232         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2233                 usleep_range(1000, 2000);
2234         igb_down(adapter);
2235         igb_up(adapter);
2236         clear_bit(__IGB_RESETTING, &adapter->state);
2237 }
2238
2239 /** igb_enable_mas - Media Autosense re-enable after swap
2240  *
2241  * @adapter: adapter struct
2242  **/
2243 static void igb_enable_mas(struct igb_adapter *adapter)
2244 {
2245         struct e1000_hw *hw = &adapter->hw;
2246         u32 connsw = rd32(E1000_CONNSW);
2247
2248         /* configure for SerDes media detect */
2249         if ((hw->phy.media_type == e1000_media_type_copper) &&
2250             (!(connsw & E1000_CONNSW_SERDESD))) {
2251                 connsw |= E1000_CONNSW_ENRGSRC;
2252                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2253                 wr32(E1000_CONNSW, connsw);
2254                 wrfl();
2255         }
2256 }
2257
2258 void igb_reset(struct igb_adapter *adapter)
2259 {
2260         struct pci_dev *pdev = adapter->pdev;
2261         struct e1000_hw *hw = &adapter->hw;
2262         struct e1000_mac_info *mac = &hw->mac;
2263         struct e1000_fc_info *fc = &hw->fc;
2264         u32 pba, hwm;
2265
2266         /* Repartition Pba for greater than 9k mtu
2267          * To take effect CTRL.RST is required.
2268          */
2269         switch (mac->type) {
2270         case e1000_i350:
2271         case e1000_i354:
2272         case e1000_82580:
2273                 pba = rd32(E1000_RXPBS);
2274                 pba = igb_rxpbs_adjust_82580(pba);
2275                 break;
2276         case e1000_82576:
2277                 pba = rd32(E1000_RXPBS);
2278                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2279                 break;
2280         case e1000_82575:
2281         case e1000_i210:
2282         case e1000_i211:
2283         default:
2284                 pba = E1000_PBA_34K;
2285                 break;
2286         }
2287
2288         if (mac->type == e1000_82575) {
2289                 u32 min_rx_space, min_tx_space, needed_tx_space;
2290
2291                 /* write Rx PBA so that hardware can report correct Tx PBA */
2292                 wr32(E1000_PBA, pba);
2293
2294                 /* To maintain wire speed transmits, the Tx FIFO should be
2295                  * large enough to accommodate two full transmit packets,
2296                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2297                  * the Rx FIFO should be large enough to accommodate at least
2298                  * one full receive packet and is similarly rounded up and
2299                  * expressed in KB.
2300                  */
2301                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2302
2303                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2304                  * but don't include Ethernet FCS because hardware appends it.
2305                  * We only need to round down to the nearest 512 byte block
2306                  * count since the value we care about is 2 frames, not 1.
2307                  */
2308                 min_tx_space = adapter->max_frame_size;
2309                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2310                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2311
2312                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2313                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2314
2315                 /* If current Tx allocation is less than the min Tx FIFO size,
2316                  * and the min Tx FIFO size is less than the current Rx FIFO
2317                  * allocation, take space away from current Rx allocation.
2318                  */
2319                 if (needed_tx_space < pba) {
2320                         pba -= needed_tx_space;
2321
2322                         /* if short on Rx space, Rx wins and must trump Tx
2323                          * adjustment
2324                          */
2325                         if (pba < min_rx_space)
2326                                 pba = min_rx_space;
2327                 }
2328
2329                 /* adjust PBA for jumbo frames */
2330                 wr32(E1000_PBA, pba);
2331         }
2332
2333         /* flow control settings
2334          * The high water mark must be low enough to fit one full frame
2335          * after transmitting the pause frame.  As such we must have enough
2336          * space to allow for us to complete our current transmit and then
2337          * receive the frame that is in progress from the link partner.
2338          * Set it to:
2339          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2340          */
2341         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2342
2343         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2344         fc->low_water = fc->high_water - 16;
2345         fc->pause_time = 0xFFFF;
2346         fc->send_xon = 1;
2347         fc->current_mode = fc->requested_mode;
2348
2349         /* disable receive for all VFs and wait one second */
2350         if (adapter->vfs_allocated_count) {
2351                 int i;
2352
2353                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2354                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2355
2356                 /* ping all the active vfs to let them know we are going down */
2357                 igb_ping_all_vfs(adapter);
2358
2359                 /* disable transmits and receives */
2360                 wr32(E1000_VFRE, 0);
2361                 wr32(E1000_VFTE, 0);
2362         }
2363
2364         /* Allow time for pending master requests to run */
2365         hw->mac.ops.reset_hw(hw);
2366         wr32(E1000_WUC, 0);
2367
2368         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2369                 /* need to resetup here after media swap */
2370                 adapter->ei.get_invariants(hw);
2371                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2372         }
2373         if ((mac->type == e1000_82575 || mac->type == e1000_i350) &&
2374             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2375                 igb_enable_mas(adapter);
2376         }
2377         if (hw->mac.ops.init_hw(hw))
2378                 dev_err(&pdev->dev, "Hardware Error\n");
2379
2380         /* RAR registers were cleared during init_hw, clear mac table */
2381         igb_flush_mac_table(adapter);
2382         __dev_uc_unsync(adapter->netdev, NULL);
2383
2384         /* Recover default RAR entry */
2385         igb_set_default_mac_filter(adapter);
2386
2387         /* Flow control settings reset on hardware reset, so guarantee flow
2388          * control is off when forcing speed.
2389          */
2390         if (!hw->mac.autoneg)
2391                 igb_force_mac_fc(hw);
2392
2393         igb_init_dmac(adapter, pba);
2394 #ifdef CONFIG_IGB_HWMON
2395         /* Re-initialize the thermal sensor on i350 devices. */
2396         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2397                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2398                         /* If present, re-initialize the external thermal sensor
2399                          * interface.
2400                          */
2401                         if (adapter->ets)
2402                                 mac->ops.init_thermal_sensor_thresh(hw);
2403                 }
2404         }
2405 #endif
2406         /* Re-establish EEE setting */
2407         if (hw->phy.media_type == e1000_media_type_copper) {
2408                 switch (mac->type) {
2409                 case e1000_i350:
2410                 case e1000_i210:
2411                 case e1000_i211:
2412                         igb_set_eee_i350(hw, true, true);
2413                         break;
2414                 case e1000_i354:
2415                         igb_set_eee_i354(hw, true, true);
2416                         break;
2417                 default:
2418                         break;
2419                 }
2420         }
2421         if (!netif_running(adapter->netdev))
2422                 igb_power_down_link(adapter);
2423
2424         igb_update_mng_vlan(adapter);
2425
2426         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2427         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2428
2429         /* Re-enable PTP, where applicable. */
2430         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2431                 igb_ptp_reset(adapter);
2432
2433         igb_get_phy_info(hw);
2434 }
2435
2436 static netdev_features_t igb_fix_features(struct net_device *netdev,
2437         netdev_features_t features)
2438 {
2439         /* Since there is no support for separate Rx/Tx vlan accel
2440          * enable/disable make sure Tx flag is always in same state as Rx.
2441          */
2442         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2443                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2444         else
2445                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2446
2447         return features;
2448 }
2449
2450 static int igb_set_features(struct net_device *netdev,
2451         netdev_features_t features)
2452 {
2453         netdev_features_t changed = netdev->features ^ features;
2454         struct igb_adapter *adapter = netdev_priv(netdev);
2455
2456         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2457                 igb_vlan_mode(netdev, features);
2458
2459         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2460                 return 0;
2461
2462         if (!(features & NETIF_F_NTUPLE)) {
2463                 struct hlist_node *node2;
2464                 struct igb_nfc_filter *rule;
2465
2466                 spin_lock(&adapter->nfc_lock);
2467                 hlist_for_each_entry_safe(rule, node2,
2468                                           &adapter->nfc_filter_list, nfc_node) {
2469                         igb_erase_filter(adapter, rule);
2470                         hlist_del(&rule->nfc_node);
2471                         kfree(rule);
2472                 }
2473                 spin_unlock(&adapter->nfc_lock);
2474                 adapter->nfc_filter_count = 0;
2475         }
2476
2477         netdev->features = features;
2478
2479         if (netif_running(netdev))
2480                 igb_reinit_locked(adapter);
2481         else
2482                 igb_reset(adapter);
2483
2484         return 1;
2485 }
2486
2487 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2488                            struct net_device *dev,
2489                            const unsigned char *addr, u16 vid,
2490                            u16 flags,
2491                            struct netlink_ext_ack *extack)
2492 {
2493         /* guarantee we can provide a unique filter for the unicast address */
2494         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2495                 struct igb_adapter *adapter = netdev_priv(dev);
2496                 int vfn = adapter->vfs_allocated_count;
2497
2498                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2499                         return -ENOMEM;
2500         }
2501
2502         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2503 }
2504
2505 #define IGB_MAX_MAC_HDR_LEN     127
2506 #define IGB_MAX_NETWORK_HDR_LEN 511
2507
2508 static netdev_features_t
2509 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2510                    netdev_features_t features)
2511 {
2512         unsigned int network_hdr_len, mac_hdr_len;
2513
2514         /* Make certain the headers can be described by a context descriptor */
2515         mac_hdr_len = skb_network_header(skb) - skb->data;
2516         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2517                 return features & ~(NETIF_F_HW_CSUM |
2518                                     NETIF_F_SCTP_CRC |
2519                                     NETIF_F_GSO_UDP_L4 |
2520                                     NETIF_F_HW_VLAN_CTAG_TX |
2521                                     NETIF_F_TSO |
2522                                     NETIF_F_TSO6);
2523
2524         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2525         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2526                 return features & ~(NETIF_F_HW_CSUM |
2527                                     NETIF_F_SCTP_CRC |
2528                                     NETIF_F_GSO_UDP_L4 |
2529                                     NETIF_F_TSO |
2530                                     NETIF_F_TSO6);
2531
2532         /* We can only support IPV4 TSO in tunnels if we can mangle the
2533          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2534          */
2535         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2536                 features &= ~NETIF_F_TSO;
2537
2538         return features;
2539 }
2540
2541 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2542 {
2543         if (!is_fqtss_enabled(adapter)) {
2544                 enable_fqtss(adapter, true);
2545                 return;
2546         }
2547
2548         igb_config_tx_modes(adapter, queue);
2549
2550         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2551                 enable_fqtss(adapter, false);
2552 }
2553
2554 static int igb_offload_cbs(struct igb_adapter *adapter,
2555                            struct tc_cbs_qopt_offload *qopt)
2556 {
2557         struct e1000_hw *hw = &adapter->hw;
2558         int err;
2559
2560         /* CBS offloading is only supported by i210 controller. */
2561         if (hw->mac.type != e1000_i210)
2562                 return -EOPNOTSUPP;
2563
2564         /* CBS offloading is only supported by queue 0 and queue 1. */
2565         if (qopt->queue < 0 || qopt->queue > 1)
2566                 return -EINVAL;
2567
2568         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2569                                   qopt->idleslope, qopt->sendslope,
2570                                   qopt->hicredit, qopt->locredit);
2571         if (err)
2572                 return err;
2573
2574         igb_offload_apply(adapter, qopt->queue);
2575
2576         return 0;
2577 }
2578
2579 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2580 #define VLAN_PRIO_FULL_MASK (0x07)
2581
2582 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2583                                 struct flow_cls_offload *f,
2584                                 int traffic_class,
2585                                 struct igb_nfc_filter *input)
2586 {
2587         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2588         struct flow_dissector *dissector = rule->match.dissector;
2589         struct netlink_ext_ack *extack = f->common.extack;
2590
2591         if (dissector->used_keys &
2592             ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2593               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2594               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2595               BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2596                 NL_SET_ERR_MSG_MOD(extack,
2597                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2598                 return -EOPNOTSUPP;
2599         }
2600
2601         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2602                 struct flow_match_eth_addrs match;
2603
2604                 flow_rule_match_eth_addrs(rule, &match);
2605                 if (!is_zero_ether_addr(match.mask->dst)) {
2606                         if (!is_broadcast_ether_addr(match.mask->dst)) {
2607                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2608                                 return -EINVAL;
2609                         }
2610
2611                         input->filter.match_flags |=
2612                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2613                         ether_addr_copy(input->filter.dst_addr, match.key->dst);
2614                 }
2615
2616                 if (!is_zero_ether_addr(match.mask->src)) {
2617                         if (!is_broadcast_ether_addr(match.mask->src)) {
2618                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2619                                 return -EINVAL;
2620                         }
2621
2622                         input->filter.match_flags |=
2623                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2624                         ether_addr_copy(input->filter.src_addr, match.key->src);
2625                 }
2626         }
2627
2628         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2629                 struct flow_match_basic match;
2630
2631                 flow_rule_match_basic(rule, &match);
2632                 if (match.mask->n_proto) {
2633                         if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
2634                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2635                                 return -EINVAL;
2636                         }
2637
2638                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2639                         input->filter.etype = match.key->n_proto;
2640                 }
2641         }
2642
2643         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
2644                 struct flow_match_vlan match;
2645
2646                 flow_rule_match_vlan(rule, &match);
2647                 if (match.mask->vlan_priority) {
2648                         if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2649                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2650                                 return -EINVAL;
2651                         }
2652
2653                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2654                         input->filter.vlan_tci =
2655                                 (__force __be16)match.key->vlan_priority;
2656                 }
2657         }
2658
2659         input->action = traffic_class;
2660         input->cookie = f->cookie;
2661
2662         return 0;
2663 }
2664
2665 static int igb_configure_clsflower(struct igb_adapter *adapter,
2666                                    struct flow_cls_offload *cls_flower)
2667 {
2668         struct netlink_ext_ack *extack = cls_flower->common.extack;
2669         struct igb_nfc_filter *filter, *f;
2670         int err, tc;
2671
2672         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2673         if (tc < 0) {
2674                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2675                 return -EINVAL;
2676         }
2677
2678         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2679         if (!filter)
2680                 return -ENOMEM;
2681
2682         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2683         if (err < 0)
2684                 goto err_parse;
2685
2686         spin_lock(&adapter->nfc_lock);
2687
2688         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2689                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2690                         err = -EEXIST;
2691                         NL_SET_ERR_MSG_MOD(extack,
2692                                            "This filter is already set in ethtool");
2693                         goto err_locked;
2694                 }
2695         }
2696
2697         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2698                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2699                         err = -EEXIST;
2700                         NL_SET_ERR_MSG_MOD(extack,
2701                                            "This filter is already set in cls_flower");
2702                         goto err_locked;
2703                 }
2704         }
2705
2706         err = igb_add_filter(adapter, filter);
2707         if (err < 0) {
2708                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2709                 goto err_locked;
2710         }
2711
2712         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2713
2714         spin_unlock(&adapter->nfc_lock);
2715
2716         return 0;
2717
2718 err_locked:
2719         spin_unlock(&adapter->nfc_lock);
2720
2721 err_parse:
2722         kfree(filter);
2723
2724         return err;
2725 }
2726
2727 static int igb_delete_clsflower(struct igb_adapter *adapter,
2728                                 struct flow_cls_offload *cls_flower)
2729 {
2730         struct igb_nfc_filter *filter;
2731         int err;
2732
2733         spin_lock(&adapter->nfc_lock);
2734
2735         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2736                 if (filter->cookie == cls_flower->cookie)
2737                         break;
2738
2739         if (!filter) {
2740                 err = -ENOENT;
2741                 goto out;
2742         }
2743
2744         err = igb_erase_filter(adapter, filter);
2745         if (err < 0)
2746                 goto out;
2747
2748         hlist_del(&filter->nfc_node);
2749         kfree(filter);
2750
2751 out:
2752         spin_unlock(&adapter->nfc_lock);
2753
2754         return err;
2755 }
2756
2757 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2758                                    struct flow_cls_offload *cls_flower)
2759 {
2760         switch (cls_flower->command) {
2761         case FLOW_CLS_REPLACE:
2762                 return igb_configure_clsflower(adapter, cls_flower);
2763         case FLOW_CLS_DESTROY:
2764                 return igb_delete_clsflower(adapter, cls_flower);
2765         case FLOW_CLS_STATS:
2766                 return -EOPNOTSUPP;
2767         default:
2768                 return -EOPNOTSUPP;
2769         }
2770 }
2771
2772 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2773                                  void *cb_priv)
2774 {
2775         struct igb_adapter *adapter = cb_priv;
2776
2777         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2778                 return -EOPNOTSUPP;
2779
2780         switch (type) {
2781         case TC_SETUP_CLSFLOWER:
2782                 return igb_setup_tc_cls_flower(adapter, type_data);
2783
2784         default:
2785                 return -EOPNOTSUPP;
2786         }
2787 }
2788
2789 static int igb_offload_txtime(struct igb_adapter *adapter,
2790                               struct tc_etf_qopt_offload *qopt)
2791 {
2792         struct e1000_hw *hw = &adapter->hw;
2793         int err;
2794
2795         /* Launchtime offloading is only supported by i210 controller. */
2796         if (hw->mac.type != e1000_i210)
2797                 return -EOPNOTSUPP;
2798
2799         /* Launchtime offloading is only supported by queues 0 and 1. */
2800         if (qopt->queue < 0 || qopt->queue > 1)
2801                 return -EINVAL;
2802
2803         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2804         if (err)
2805                 return err;
2806
2807         igb_offload_apply(adapter, qopt->queue);
2808
2809         return 0;
2810 }
2811
2812 static LIST_HEAD(igb_block_cb_list);
2813
2814 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2815                         void *type_data)
2816 {
2817         struct igb_adapter *adapter = netdev_priv(dev);
2818
2819         switch (type) {
2820         case TC_SETUP_QDISC_CBS:
2821                 return igb_offload_cbs(adapter, type_data);
2822         case TC_SETUP_BLOCK:
2823                 return flow_block_cb_setup_simple(type_data,
2824                                                   &igb_block_cb_list,
2825                                                   igb_setup_tc_block_cb,
2826                                                   adapter, adapter, true);
2827
2828         case TC_SETUP_QDISC_ETF:
2829                 return igb_offload_txtime(adapter, type_data);
2830
2831         default:
2832                 return -EOPNOTSUPP;
2833         }
2834 }
2835
2836 static int igb_xdp_setup(struct net_device *dev, struct netdev_bpf *bpf)
2837 {
2838         int i, frame_size = dev->mtu + IGB_ETH_PKT_HDR_PAD;
2839         struct igb_adapter *adapter = netdev_priv(dev);
2840         struct bpf_prog *prog = bpf->prog, *old_prog;
2841         bool running = netif_running(dev);
2842         bool need_reset;
2843
2844         /* verify igb ring attributes are sufficient for XDP */
2845         for (i = 0; i < adapter->num_rx_queues; i++) {
2846                 struct igb_ring *ring = adapter->rx_ring[i];
2847
2848                 if (frame_size > igb_rx_bufsz(ring)) {
2849                         NL_SET_ERR_MSG_MOD(bpf->extack,
2850                                            "The RX buffer size is too small for the frame size");
2851                         netdev_warn(dev, "XDP RX buffer size %d is too small for the frame size %d\n",
2852                                     igb_rx_bufsz(ring), frame_size);
2853                         return -EINVAL;
2854                 }
2855         }
2856
2857         old_prog = xchg(&adapter->xdp_prog, prog);
2858         need_reset = (!!prog != !!old_prog);
2859
2860         /* device is up and bpf is added/removed, must setup the RX queues */
2861         if (need_reset && running) {
2862                 igb_close(dev);
2863         } else {
2864                 for (i = 0; i < adapter->num_rx_queues; i++)
2865                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
2866                             adapter->xdp_prog);
2867         }
2868
2869         if (old_prog)
2870                 bpf_prog_put(old_prog);
2871
2872         /* bpf is just replaced, RXQ and MTU are already setup */
2873         if (!need_reset)
2874                 return 0;
2875
2876         if (running)
2877                 igb_open(dev);
2878
2879         return 0;
2880 }
2881
2882 static int igb_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2883 {
2884         switch (xdp->command) {
2885         case XDP_SETUP_PROG:
2886                 return igb_xdp_setup(dev, xdp);
2887         default:
2888                 return -EINVAL;
2889         }
2890 }
2891
2892 static void igb_xdp_ring_update_tail(struct igb_ring *ring)
2893 {
2894         /* Force memory writes to complete before letting h/w know there
2895          * are new descriptors to fetch.
2896          */
2897         wmb();
2898         writel(ring->next_to_use, ring->tail);
2899 }
2900
2901 static struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)
2902 {
2903         unsigned int r_idx = smp_processor_id();
2904
2905         if (r_idx >= adapter->num_tx_queues)
2906                 r_idx = r_idx % adapter->num_tx_queues;
2907
2908         return adapter->tx_ring[r_idx];
2909 }
2910
2911 static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)
2912 {
2913         struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
2914         int cpu = smp_processor_id();
2915         struct igb_ring *tx_ring;
2916         struct netdev_queue *nq;
2917         u32 ret;
2918
2919         if (unlikely(!xdpf))
2920                 return IGB_XDP_CONSUMED;
2921
2922         /* During program transitions its possible adapter->xdp_prog is assigned
2923          * but ring has not been configured yet. In this case simply abort xmit.
2924          */
2925         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2926         if (unlikely(!tx_ring))
2927                 return IGB_XDP_CONSUMED;
2928
2929         nq = txring_txq(tx_ring);
2930         __netif_tx_lock(nq, cpu);
2931         /* Avoid transmit queue timeout since we share it with the slow path */
2932         nq->trans_start = jiffies;
2933         ret = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2934         __netif_tx_unlock(nq);
2935
2936         return ret;
2937 }
2938
2939 static int igb_xdp_xmit(struct net_device *dev, int n,
2940                         struct xdp_frame **frames, u32 flags)
2941 {
2942         struct igb_adapter *adapter = netdev_priv(dev);
2943         int cpu = smp_processor_id();
2944         struct igb_ring *tx_ring;
2945         struct netdev_queue *nq;
2946         int nxmit = 0;
2947         int i;
2948
2949         if (unlikely(test_bit(__IGB_DOWN, &adapter->state)))
2950                 return -ENETDOWN;
2951
2952         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
2953                 return -EINVAL;
2954
2955         /* During program transitions its possible adapter->xdp_prog is assigned
2956          * but ring has not been configured yet. In this case simply abort xmit.
2957          */
2958         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2959         if (unlikely(!tx_ring))
2960                 return -ENXIO;
2961
2962         nq = txring_txq(tx_ring);
2963         __netif_tx_lock(nq, cpu);
2964
2965         /* Avoid transmit queue timeout since we share it with the slow path */
2966         nq->trans_start = jiffies;
2967
2968         for (i = 0; i < n; i++) {
2969                 struct xdp_frame *xdpf = frames[i];
2970                 int err;
2971
2972                 err = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2973                 if (err != IGB_XDP_TX)
2974                         break;
2975                 nxmit++;
2976         }
2977
2978         __netif_tx_unlock(nq);
2979
2980         if (unlikely(flags & XDP_XMIT_FLUSH))
2981                 igb_xdp_ring_update_tail(tx_ring);
2982
2983         return nxmit;
2984 }
2985
2986 static const struct net_device_ops igb_netdev_ops = {
2987         .ndo_open               = igb_open,
2988         .ndo_stop               = igb_close,
2989         .ndo_start_xmit         = igb_xmit_frame,
2990         .ndo_get_stats64        = igb_get_stats64,
2991         .ndo_set_rx_mode        = igb_set_rx_mode,
2992         .ndo_set_mac_address    = igb_set_mac,
2993         .ndo_change_mtu         = igb_change_mtu,
2994         .ndo_eth_ioctl          = igb_ioctl,
2995         .ndo_tx_timeout         = igb_tx_timeout,
2996         .ndo_validate_addr      = eth_validate_addr,
2997         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2998         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2999         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
3000         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
3001         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
3002         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
3003         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
3004         .ndo_get_vf_config      = igb_ndo_get_vf_config,
3005         .ndo_fix_features       = igb_fix_features,
3006         .ndo_set_features       = igb_set_features,
3007         .ndo_fdb_add            = igb_ndo_fdb_add,
3008         .ndo_features_check     = igb_features_check,
3009         .ndo_setup_tc           = igb_setup_tc,
3010         .ndo_bpf                = igb_xdp,
3011         .ndo_xdp_xmit           = igb_xdp_xmit,
3012 };
3013
3014 /**
3015  * igb_set_fw_version - Configure version string for ethtool
3016  * @adapter: adapter struct
3017  **/
3018 void igb_set_fw_version(struct igb_adapter *adapter)
3019 {
3020         struct e1000_hw *hw = &adapter->hw;
3021         struct e1000_fw_version fw;
3022
3023         igb_get_fw_version(hw, &fw);
3024
3025         switch (hw->mac.type) {
3026         case e1000_i210:
3027         case e1000_i211:
3028                 if (!(igb_get_flash_presence_i210(hw))) {
3029                         snprintf(adapter->fw_version,
3030                                  sizeof(adapter->fw_version),
3031                                  "%2d.%2d-%d",
3032                                  fw.invm_major, fw.invm_minor,
3033                                  fw.invm_img_type);
3034                         break;
3035                 }
3036                 fallthrough;
3037         default:
3038                 /* if option is rom valid, display its version too */
3039                 if (fw.or_valid) {
3040                         snprintf(adapter->fw_version,
3041                                  sizeof(adapter->fw_version),
3042                                  "%d.%d, 0x%08x, %d.%d.%d",
3043                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
3044                                  fw.or_major, fw.or_build, fw.or_patch);
3045                 /* no option rom */
3046                 } else if (fw.etrack_id != 0X0000) {
3047                         snprintf(adapter->fw_version,
3048                             sizeof(adapter->fw_version),
3049                             "%d.%d, 0x%08x",
3050                             fw.eep_major, fw.eep_minor, fw.etrack_id);
3051                 } else {
3052                 snprintf(adapter->fw_version,
3053                     sizeof(adapter->fw_version),
3054                     "%d.%d.%d",
3055                     fw.eep_major, fw.eep_minor, fw.eep_build);
3056                 }
3057                 break;
3058         }
3059 }
3060
3061 /**
3062  * igb_init_mas - init Media Autosense feature if enabled in the NVM
3063  *
3064  * @adapter: adapter struct
3065  **/
3066 static void igb_init_mas(struct igb_adapter *adapter)
3067 {
3068         struct e1000_hw *hw = &adapter->hw;
3069         u16 eeprom_data;
3070
3071         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
3072         switch (hw->bus.func) {
3073         case E1000_FUNC_0:
3074                 if (eeprom_data & IGB_MAS_ENABLE_0) {
3075                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3076                         netdev_info(adapter->netdev,
3077                                 "MAS: Enabling Media Autosense for port %d\n",
3078                                 hw->bus.func);
3079                 }
3080                 break;
3081         case E1000_FUNC_1:
3082                 if (eeprom_data & IGB_MAS_ENABLE_1) {
3083                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3084                         netdev_info(adapter->netdev,
3085                                 "MAS: Enabling Media Autosense for port %d\n",
3086                                 hw->bus.func);
3087                 }
3088                 break;
3089         case E1000_FUNC_2:
3090                 if (eeprom_data & IGB_MAS_ENABLE_2) {
3091                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3092                         netdev_info(adapter->netdev,
3093                                 "MAS: Enabling Media Autosense for port %d\n",
3094                                 hw->bus.func);
3095                 }
3096                 break;
3097         case E1000_FUNC_3:
3098                 if (eeprom_data & IGB_MAS_ENABLE_3) {
3099                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3100                         netdev_info(adapter->netdev,
3101                                 "MAS: Enabling Media Autosense for port %d\n",
3102                                 hw->bus.func);
3103                 }
3104                 break;
3105         default:
3106                 /* Shouldn't get here */
3107                 netdev_err(adapter->netdev,
3108                         "MAS: Invalid port configuration, returning\n");
3109                 break;
3110         }
3111 }
3112
3113 /**
3114  *  igb_init_i2c - Init I2C interface
3115  *  @adapter: pointer to adapter structure
3116  **/
3117 static s32 igb_init_i2c(struct igb_adapter *adapter)
3118 {
3119         s32 status = 0;
3120
3121         /* I2C interface supported on i350 devices */
3122         if (adapter->hw.mac.type != e1000_i350)
3123                 return 0;
3124
3125         /* Initialize the i2c bus which is controlled by the registers.
3126          * This bus will use the i2c_algo_bit structure that implements
3127          * the protocol through toggling of the 4 bits in the register.
3128          */
3129         adapter->i2c_adap.owner = THIS_MODULE;
3130         adapter->i2c_algo = igb_i2c_algo;
3131         adapter->i2c_algo.data = adapter;
3132         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3133         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3134         strlcpy(adapter->i2c_adap.name, "igb BB",
3135                 sizeof(adapter->i2c_adap.name));
3136         status = i2c_bit_add_bus(&adapter->i2c_adap);
3137         return status;
3138 }
3139
3140 /**
3141  *  igb_probe - Device Initialization Routine
3142  *  @pdev: PCI device information struct
3143  *  @ent: entry in igb_pci_tbl
3144  *
3145  *  Returns 0 on success, negative on failure
3146  *
3147  *  igb_probe initializes an adapter identified by a pci_dev structure.
3148  *  The OS initialization, configuring of the adapter private structure,
3149  *  and a hardware reset occur.
3150  **/
3151 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3152 {
3153         struct net_device *netdev;
3154         struct igb_adapter *adapter;
3155         struct e1000_hw *hw;
3156         u16 eeprom_data = 0;
3157         s32 ret_val;
3158         static int global_quad_port_a; /* global quad port a indication */
3159         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3160         int err, pci_using_dac;
3161         u8 part_str[E1000_PBANUM_LENGTH];
3162
3163         /* Catch broken hardware that put the wrong VF device ID in
3164          * the PCIe SR-IOV capability.
3165          */
3166         if (pdev->is_virtfn) {
3167                 WARN(1, KERN_ERR "%s (%x:%x) should not be a VF!\n",
3168                         pci_name(pdev), pdev->vendor, pdev->device);
3169                 return -EINVAL;
3170         }
3171
3172         err = pci_enable_device_mem(pdev);
3173         if (err)
3174                 return err;
3175
3176         pci_using_dac = 0;
3177         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3178         if (!err) {
3179                 pci_using_dac = 1;
3180         } else {
3181                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3182                 if (err) {
3183                         dev_err(&pdev->dev,
3184                                 "No usable DMA configuration, aborting\n");
3185                         goto err_dma;
3186                 }
3187         }
3188
3189         err = pci_request_mem_regions(pdev, igb_driver_name);
3190         if (err)
3191                 goto err_pci_reg;
3192
3193         pci_enable_pcie_error_reporting(pdev);
3194
3195         pci_set_master(pdev);
3196         pci_save_state(pdev);
3197
3198         err = -ENOMEM;
3199         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3200                                    IGB_MAX_TX_QUEUES);
3201         if (!netdev)
3202                 goto err_alloc_etherdev;
3203
3204         SET_NETDEV_DEV(netdev, &pdev->dev);
3205
3206         pci_set_drvdata(pdev, netdev);
3207         adapter = netdev_priv(netdev);
3208         adapter->netdev = netdev;
3209         adapter->pdev = pdev;
3210         hw = &adapter->hw;
3211         hw->back = adapter;
3212         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3213
3214         err = -EIO;
3215         adapter->io_addr = pci_iomap(pdev, 0, 0);
3216         if (!adapter->io_addr)
3217                 goto err_ioremap;
3218         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3219         hw->hw_addr = adapter->io_addr;
3220
3221         netdev->netdev_ops = &igb_netdev_ops;
3222         igb_set_ethtool_ops(netdev);
3223         netdev->watchdog_timeo = 5 * HZ;
3224
3225         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3226
3227         netdev->mem_start = pci_resource_start(pdev, 0);
3228         netdev->mem_end = pci_resource_end(pdev, 0);
3229
3230         /* PCI config space info */
3231         hw->vendor_id = pdev->vendor;
3232         hw->device_id = pdev->device;
3233         hw->revision_id = pdev->revision;
3234         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3235         hw->subsystem_device_id = pdev->subsystem_device;
3236
3237         /* Copy the default MAC, PHY and NVM function pointers */
3238         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3239         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3240         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3241         /* Initialize skew-specific constants */
3242         err = ei->get_invariants(hw);
3243         if (err)
3244                 goto err_sw_init;
3245
3246         /* setup the private structure */
3247         err = igb_sw_init(adapter);
3248         if (err)
3249                 goto err_sw_init;
3250
3251         igb_get_bus_info_pcie(hw);
3252
3253         hw->phy.autoneg_wait_to_complete = false;
3254
3255         /* Copper options */
3256         if (hw->phy.media_type == e1000_media_type_copper) {
3257                 hw->phy.mdix = AUTO_ALL_MODES;
3258                 hw->phy.disable_polarity_correction = false;
3259                 hw->phy.ms_type = e1000_ms_hw_default;
3260         }
3261
3262         if (igb_check_reset_block(hw))
3263                 dev_info(&pdev->dev,
3264                         "PHY reset is blocked due to SOL/IDER session.\n");
3265
3266         /* features is initialized to 0 in allocation, it might have bits
3267          * set by igb_sw_init so we should use an or instead of an
3268          * assignment.
3269          */
3270         netdev->features |= NETIF_F_SG |
3271                             NETIF_F_TSO |
3272                             NETIF_F_TSO6 |
3273                             NETIF_F_RXHASH |
3274                             NETIF_F_RXCSUM |
3275                             NETIF_F_HW_CSUM;
3276
3277         if (hw->mac.type >= e1000_82576)
3278                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
3279
3280         if (hw->mac.type >= e1000_i350)
3281                 netdev->features |= NETIF_F_HW_TC;
3282
3283 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3284                                   NETIF_F_GSO_GRE_CSUM | \
3285                                   NETIF_F_GSO_IPXIP4 | \
3286                                   NETIF_F_GSO_IPXIP6 | \
3287                                   NETIF_F_GSO_UDP_TUNNEL | \
3288                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3289
3290         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3291         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3292
3293         /* copy netdev features into list of user selectable features */
3294         netdev->hw_features |= netdev->features |
3295                                NETIF_F_HW_VLAN_CTAG_RX |
3296                                NETIF_F_HW_VLAN_CTAG_TX |
3297                                NETIF_F_RXALL;
3298
3299         if (hw->mac.type >= e1000_i350)
3300                 netdev->hw_features |= NETIF_F_NTUPLE;
3301
3302         if (pci_using_dac)
3303                 netdev->features |= NETIF_F_HIGHDMA;
3304
3305         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3306         netdev->mpls_features |= NETIF_F_HW_CSUM;
3307         netdev->hw_enc_features |= netdev->vlan_features;
3308
3309         /* set this bit last since it cannot be part of vlan_features */
3310         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3311                             NETIF_F_HW_VLAN_CTAG_RX |
3312                             NETIF_F_HW_VLAN_CTAG_TX;
3313
3314         netdev->priv_flags |= IFF_SUPP_NOFCS;
3315
3316         netdev->priv_flags |= IFF_UNICAST_FLT;
3317
3318         /* MTU range: 68 - 9216 */
3319         netdev->min_mtu = ETH_MIN_MTU;
3320         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3321
3322         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3323
3324         /* before reading the NVM, reset the controller to put the device in a
3325          * known good starting state
3326          */
3327         hw->mac.ops.reset_hw(hw);
3328
3329         /* make sure the NVM is good , i211/i210 parts can have special NVM
3330          * that doesn't contain a checksum
3331          */
3332         switch (hw->mac.type) {
3333         case e1000_i210:
3334         case e1000_i211:
3335                 if (igb_get_flash_presence_i210(hw)) {
3336                         if (hw->nvm.ops.validate(hw) < 0) {
3337                                 dev_err(&pdev->dev,
3338                                         "The NVM Checksum Is Not Valid\n");
3339                                 err = -EIO;
3340                                 goto err_eeprom;
3341                         }
3342                 }
3343                 break;
3344         default:
3345                 if (hw->nvm.ops.validate(hw) < 0) {
3346                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3347                         err = -EIO;
3348                         goto err_eeprom;
3349                 }
3350                 break;
3351         }
3352
3353         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3354                 /* copy the MAC address out of the NVM */
3355                 if (hw->mac.ops.read_mac_addr(hw))
3356                         dev_err(&pdev->dev, "NVM Read Error\n");
3357         }
3358
3359         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
3360
3361         if (!is_valid_ether_addr(netdev->dev_addr)) {
3362                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3363                 err = -EIO;
3364                 goto err_eeprom;
3365         }
3366
3367         igb_set_default_mac_filter(adapter);
3368
3369         /* get firmware version for ethtool -i */
3370         igb_set_fw_version(adapter);
3371
3372         /* configure RXPBSIZE and TXPBSIZE */
3373         if (hw->mac.type == e1000_i210) {
3374                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3375                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3376         }
3377
3378         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3379         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3380
3381         INIT_WORK(&adapter->reset_task, igb_reset_task);
3382         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3383
3384         /* Initialize link properties that are user-changeable */
3385         adapter->fc_autoneg = true;
3386         hw->mac.autoneg = true;
3387         hw->phy.autoneg_advertised = 0x2f;
3388
3389         hw->fc.requested_mode = e1000_fc_default;
3390         hw->fc.current_mode = e1000_fc_default;
3391
3392         igb_validate_mdi_setting(hw);
3393
3394         /* By default, support wake on port A */
3395         if (hw->bus.func == 0)
3396                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3397
3398         /* Check the NVM for wake support on non-port A ports */
3399         if (hw->mac.type >= e1000_82580)
3400                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3401                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3402                                  &eeprom_data);
3403         else if (hw->bus.func == 1)
3404                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3405
3406         if (eeprom_data & IGB_EEPROM_APME)
3407                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3408
3409         /* now that we have the eeprom settings, apply the special cases where
3410          * the eeprom may be wrong or the board simply won't support wake on
3411          * lan on a particular port
3412          */
3413         switch (pdev->device) {
3414         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3415                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3416                 break;
3417         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3418         case E1000_DEV_ID_82576_FIBER:
3419         case E1000_DEV_ID_82576_SERDES:
3420                 /* Wake events only supported on port A for dual fiber
3421                  * regardless of eeprom setting
3422                  */
3423                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3424                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3425                 break;
3426         case E1000_DEV_ID_82576_QUAD_COPPER:
3427         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3428                 /* if quad port adapter, disable WoL on all but port A */
3429                 if (global_quad_port_a != 0)
3430                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3431                 else
3432                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3433                 /* Reset for multiple quad port adapters */
3434                 if (++global_quad_port_a == 4)
3435                         global_quad_port_a = 0;
3436                 break;
3437         default:
3438                 /* If the device can't wake, don't set software support */
3439                 if (!device_can_wakeup(&adapter->pdev->dev))
3440                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3441         }
3442
3443         /* initialize the wol settings based on the eeprom settings */
3444         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3445                 adapter->wol |= E1000_WUFC_MAG;
3446
3447         /* Some vendors want WoL disabled by default, but still supported */
3448         if ((hw->mac.type == e1000_i350) &&
3449             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3450                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3451                 adapter->wol = 0;
3452         }
3453
3454         /* Some vendors want the ability to Use the EEPROM setting as
3455          * enable/disable only, and not for capability
3456          */
3457         if (((hw->mac.type == e1000_i350) ||
3458              (hw->mac.type == e1000_i354)) &&
3459             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3460                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3461                 adapter->wol = 0;
3462         }
3463         if (hw->mac.type == e1000_i350) {
3464                 if (((pdev->subsystem_device == 0x5001) ||
3465                      (pdev->subsystem_device == 0x5002)) &&
3466                                 (hw->bus.func == 0)) {
3467                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3468                         adapter->wol = 0;
3469                 }
3470                 if (pdev->subsystem_device == 0x1F52)
3471                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3472         }
3473
3474         device_set_wakeup_enable(&adapter->pdev->dev,
3475                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3476
3477         /* reset the hardware with the new settings */
3478         igb_reset(adapter);
3479
3480         /* Init the I2C interface */
3481         err = igb_init_i2c(adapter);
3482         if (err) {
3483                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3484                 goto err_eeprom;
3485         }
3486
3487         /* let the f/w know that the h/w is now under the control of the
3488          * driver.
3489          */
3490         igb_get_hw_control(adapter);
3491
3492         strcpy(netdev->name, "eth%d");
3493         err = register_netdev(netdev);
3494         if (err)
3495                 goto err_register;
3496
3497         /* carrier off reporting is important to ethtool even BEFORE open */
3498         netif_carrier_off(netdev);
3499
3500 #ifdef CONFIG_IGB_DCA
3501         if (dca_add_requester(&pdev->dev) == 0) {
3502                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3503                 dev_info(&pdev->dev, "DCA enabled\n");
3504                 igb_setup_dca(adapter);
3505         }
3506
3507 #endif
3508 #ifdef CONFIG_IGB_HWMON
3509         /* Initialize the thermal sensor on i350 devices. */
3510         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3511                 u16 ets_word;
3512
3513                 /* Read the NVM to determine if this i350 device supports an
3514                  * external thermal sensor.
3515                  */
3516                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3517                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3518                         adapter->ets = true;
3519                 else
3520                         adapter->ets = false;
3521                 if (igb_sysfs_init(adapter))
3522                         dev_err(&pdev->dev,
3523                                 "failed to allocate sysfs resources\n");
3524         } else {
3525                 adapter->ets = false;
3526         }
3527 #endif
3528         /* Check if Media Autosense is enabled */
3529         adapter->ei = *ei;
3530         if (hw->dev_spec._82575.mas_capable)
3531                 igb_init_mas(adapter);
3532
3533         /* do hw tstamp init after resetting */
3534         igb_ptp_init(adapter);
3535
3536         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3537         /* print bus type/speed/width info, not applicable to i354 */
3538         if (hw->mac.type != e1000_i354) {
3539                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3540                          netdev->name,
3541                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3542                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3543                            "unknown"),
3544                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3545                           "Width x4" :
3546                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3547                           "Width x2" :
3548                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3549                           "Width x1" : "unknown"), netdev->dev_addr);
3550         }
3551
3552         if ((hw->mac.type == e1000_82576 &&
3553              rd32(E1000_EECD) & E1000_EECD_PRES) ||
3554             (hw->mac.type >= e1000_i210 ||
3555              igb_get_flash_presence_i210(hw))) {
3556                 ret_val = igb_read_part_string(hw, part_str,
3557                                                E1000_PBANUM_LENGTH);
3558         } else {
3559                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3560         }
3561
3562         if (ret_val)
3563                 strcpy(part_str, "Unknown");
3564         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3565         dev_info(&pdev->dev,
3566                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3567                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3568                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3569                 adapter->num_rx_queues, adapter->num_tx_queues);
3570         if (hw->phy.media_type == e1000_media_type_copper) {
3571                 switch (hw->mac.type) {
3572                 case e1000_i350:
3573                 case e1000_i210:
3574                 case e1000_i211:
3575                         /* Enable EEE for internal copper PHY devices */
3576                         err = igb_set_eee_i350(hw, true, true);
3577                         if ((!err) &&
3578                             (!hw->dev_spec._82575.eee_disable)) {
3579                                 adapter->eee_advert =
3580                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3581                                 adapter->flags |= IGB_FLAG_EEE;
3582                         }
3583                         break;
3584                 case e1000_i354:
3585                         if ((rd32(E1000_CTRL_EXT) &
3586                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3587                                 err = igb_set_eee_i354(hw, true, true);
3588                                 if ((!err) &&
3589                                         (!hw->dev_spec._82575.eee_disable)) {
3590                                         adapter->eee_advert =
3591                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3592                                         adapter->flags |= IGB_FLAG_EEE;
3593                                 }
3594                         }
3595                         break;
3596                 default:
3597                         break;
3598                 }
3599         }
3600
3601         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
3602
3603         pm_runtime_put_noidle(&pdev->dev);
3604         return 0;
3605
3606 err_register:
3607         igb_release_hw_control(adapter);
3608         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3609 err_eeprom:
3610         if (!igb_check_reset_block(hw))
3611                 igb_reset_phy(hw);
3612
3613         if (hw->flash_address)
3614                 iounmap(hw->flash_address);
3615 err_sw_init:
3616         kfree(adapter->mac_table);
3617         kfree(adapter->shadow_vfta);
3618         igb_clear_interrupt_scheme(adapter);
3619 #ifdef CONFIG_PCI_IOV
3620         igb_disable_sriov(pdev);
3621 #endif
3622         pci_iounmap(pdev, adapter->io_addr);
3623 err_ioremap:
3624         free_netdev(netdev);
3625 err_alloc_etherdev:
3626         pci_disable_pcie_error_reporting(pdev);
3627         pci_release_mem_regions(pdev);
3628 err_pci_reg:
3629 err_dma:
3630         pci_disable_device(pdev);
3631         return err;
3632 }
3633
3634 #ifdef CONFIG_PCI_IOV
3635 static int igb_disable_sriov(struct pci_dev *pdev)
3636 {
3637         struct net_device *netdev = pci_get_drvdata(pdev);
3638         struct igb_adapter *adapter = netdev_priv(netdev);
3639         struct e1000_hw *hw = &adapter->hw;
3640
3641         /* reclaim resources allocated to VFs */
3642         if (adapter->vf_data) {
3643                 /* disable iov and allow time for transactions to clear */
3644                 if (pci_vfs_assigned(pdev)) {
3645                         dev_warn(&pdev->dev,
3646                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3647                         return -EPERM;
3648                 } else {
3649                         pci_disable_sriov(pdev);
3650                         msleep(500);
3651                 }
3652
3653                 kfree(adapter->vf_mac_list);
3654                 adapter->vf_mac_list = NULL;
3655                 kfree(adapter->vf_data);
3656                 adapter->vf_data = NULL;
3657                 adapter->vfs_allocated_count = 0;
3658                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3659                 wrfl();
3660                 msleep(100);
3661                 dev_info(&pdev->dev, "IOV Disabled\n");
3662
3663                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3664                 adapter->flags |= IGB_FLAG_DMAC;
3665         }
3666
3667         return 0;
3668 }
3669
3670 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3671 {
3672         struct net_device *netdev = pci_get_drvdata(pdev);
3673         struct igb_adapter *adapter = netdev_priv(netdev);
3674         int old_vfs = pci_num_vf(pdev);
3675         struct vf_mac_filter *mac_list;
3676         int err = 0;
3677         int num_vf_mac_filters, i;
3678
3679         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3680                 err = -EPERM;
3681                 goto out;
3682         }
3683         if (!num_vfs)
3684                 goto out;
3685
3686         if (old_vfs) {
3687                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3688                          old_vfs, max_vfs);
3689                 adapter->vfs_allocated_count = old_vfs;
3690         } else
3691                 adapter->vfs_allocated_count = num_vfs;
3692
3693         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3694                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3695
3696         /* if allocation failed then we do not support SR-IOV */
3697         if (!adapter->vf_data) {
3698                 adapter->vfs_allocated_count = 0;
3699                 err = -ENOMEM;
3700                 goto out;
3701         }
3702
3703         /* Due to the limited number of RAR entries calculate potential
3704          * number of MAC filters available for the VFs. Reserve entries
3705          * for PF default MAC, PF MAC filters and at least one RAR entry
3706          * for each VF for VF MAC.
3707          */
3708         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3709                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3710                               adapter->vfs_allocated_count);
3711
3712         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3713                                        sizeof(struct vf_mac_filter),
3714                                        GFP_KERNEL);
3715
3716         mac_list = adapter->vf_mac_list;
3717         INIT_LIST_HEAD(&adapter->vf_macs.l);
3718
3719         if (adapter->vf_mac_list) {
3720                 /* Initialize list of VF MAC filters */
3721                 for (i = 0; i < num_vf_mac_filters; i++) {
3722                         mac_list->vf = -1;
3723                         mac_list->free = true;
3724                         list_add(&mac_list->l, &adapter->vf_macs.l);
3725                         mac_list++;
3726                 }
3727         } else {
3728                 /* If we could not allocate memory for the VF MAC filters
3729                  * we can continue without this feature but warn user.
3730                  */
3731                 dev_err(&pdev->dev,
3732                         "Unable to allocate memory for VF MAC filter list\n");
3733         }
3734
3735         /* only call pci_enable_sriov() if no VFs are allocated already */
3736         if (!old_vfs) {
3737                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3738                 if (err)
3739                         goto err_out;
3740         }
3741         dev_info(&pdev->dev, "%d VFs allocated\n",
3742                  adapter->vfs_allocated_count);
3743         for (i = 0; i < adapter->vfs_allocated_count; i++)
3744                 igb_vf_configure(adapter, i);
3745
3746         /* DMA Coalescing is not supported in IOV mode. */
3747         adapter->flags &= ~IGB_FLAG_DMAC;
3748         goto out;
3749
3750 err_out:
3751         kfree(adapter->vf_mac_list);
3752         adapter->vf_mac_list = NULL;
3753         kfree(adapter->vf_data);
3754         adapter->vf_data = NULL;
3755         adapter->vfs_allocated_count = 0;
3756 out:
3757         return err;
3758 }
3759
3760 #endif
3761 /**
3762  *  igb_remove_i2c - Cleanup  I2C interface
3763  *  @adapter: pointer to adapter structure
3764  **/
3765 static void igb_remove_i2c(struct igb_adapter *adapter)
3766 {
3767         /* free the adapter bus structure */
3768         i2c_del_adapter(&adapter->i2c_adap);
3769 }
3770
3771 /**
3772  *  igb_remove - Device Removal Routine
3773  *  @pdev: PCI device information struct
3774  *
3775  *  igb_remove is called by the PCI subsystem to alert the driver
3776  *  that it should release a PCI device.  The could be caused by a
3777  *  Hot-Plug event, or because the driver is going to be removed from
3778  *  memory.
3779  **/
3780 static void igb_remove(struct pci_dev *pdev)
3781 {
3782         struct net_device *netdev = pci_get_drvdata(pdev);
3783         struct igb_adapter *adapter = netdev_priv(netdev);
3784         struct e1000_hw *hw = &adapter->hw;
3785
3786         pm_runtime_get_noresume(&pdev->dev);
3787 #ifdef CONFIG_IGB_HWMON
3788         igb_sysfs_exit(adapter);
3789 #endif
3790         igb_remove_i2c(adapter);
3791         igb_ptp_stop(adapter);
3792         /* The watchdog timer may be rescheduled, so explicitly
3793          * disable watchdog from being rescheduled.
3794          */
3795         set_bit(__IGB_DOWN, &adapter->state);
3796         del_timer_sync(&adapter->watchdog_timer);
3797         del_timer_sync(&adapter->phy_info_timer);
3798
3799         cancel_work_sync(&adapter->reset_task);
3800         cancel_work_sync(&adapter->watchdog_task);
3801
3802 #ifdef CONFIG_IGB_DCA
3803         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3804                 dev_info(&pdev->dev, "DCA disabled\n");
3805                 dca_remove_requester(&pdev->dev);
3806                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3807                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3808         }
3809 #endif
3810
3811         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3812          * would have already happened in close and is redundant.
3813          */
3814         igb_release_hw_control(adapter);
3815
3816 #ifdef CONFIG_PCI_IOV
3817         igb_disable_sriov(pdev);
3818 #endif
3819
3820         unregister_netdev(netdev);
3821
3822         igb_clear_interrupt_scheme(adapter);
3823
3824         pci_iounmap(pdev, adapter->io_addr);
3825         if (hw->flash_address)
3826                 iounmap(hw->flash_address);
3827         pci_release_mem_regions(pdev);
3828
3829         kfree(adapter->mac_table);
3830         kfree(adapter->shadow_vfta);
3831         free_netdev(netdev);
3832
3833         pci_disable_pcie_error_reporting(pdev);
3834
3835         pci_disable_device(pdev);
3836 }
3837
3838 /**
3839  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3840  *  @adapter: board private structure to initialize
3841  *
3842  *  This function initializes the vf specific data storage and then attempts to
3843  *  allocate the VFs.  The reason for ordering it this way is because it is much
3844  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3845  *  the memory for the VFs.
3846  **/
3847 static void igb_probe_vfs(struct igb_adapter *adapter)
3848 {
3849 #ifdef CONFIG_PCI_IOV
3850         struct pci_dev *pdev = adapter->pdev;
3851         struct e1000_hw *hw = &adapter->hw;
3852
3853         /* Virtualization features not supported on i210 family. */
3854         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3855                 return;
3856
3857         /* Of the below we really only want the effect of getting
3858          * IGB_FLAG_HAS_MSIX set (if available), without which
3859          * igb_enable_sriov() has no effect.
3860          */
3861         igb_set_interrupt_capability(adapter, true);
3862         igb_reset_interrupt_capability(adapter);
3863
3864         pci_sriov_set_totalvfs(pdev, 7);
3865         igb_enable_sriov(pdev, max_vfs);
3866
3867 #endif /* CONFIG_PCI_IOV */
3868 }
3869
3870 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3871 {
3872         struct e1000_hw *hw = &adapter->hw;
3873         unsigned int max_rss_queues;
3874
3875         /* Determine the maximum number of RSS queues supported. */
3876         switch (hw->mac.type) {
3877         case e1000_i211:
3878                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3879                 break;
3880         case e1000_82575:
3881         case e1000_i210:
3882                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3883                 break;
3884         case e1000_i350:
3885                 /* I350 cannot do RSS and SR-IOV at the same time */
3886                 if (!!adapter->vfs_allocated_count) {
3887                         max_rss_queues = 1;
3888                         break;
3889                 }
3890                 fallthrough;
3891         case e1000_82576:
3892                 if (!!adapter->vfs_allocated_count) {
3893                         max_rss_queues = 2;
3894                         break;
3895                 }
3896                 fallthrough;
3897         case e1000_82580:
3898         case e1000_i354:
3899         default:
3900                 max_rss_queues = IGB_MAX_RX_QUEUES;
3901                 break;
3902         }
3903
3904         return max_rss_queues;
3905 }
3906
3907 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3908 {
3909         u32 max_rss_queues;
3910
3911         max_rss_queues = igb_get_max_rss_queues(adapter);
3912         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3913
3914         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3915 }
3916
3917 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3918                               const u32 max_rss_queues)
3919 {
3920         struct e1000_hw *hw = &adapter->hw;
3921
3922         /* Determine if we need to pair queues. */
3923         switch (hw->mac.type) {
3924         case e1000_82575:
3925         case e1000_i211:
3926                 /* Device supports enough interrupts without queue pairing. */
3927                 break;
3928         case e1000_82576:
3929         case e1000_82580:
3930         case e1000_i350:
3931         case e1000_i354:
3932         case e1000_i210:
3933         default:
3934                 /* If rss_queues > half of max_rss_queues, pair the queues in
3935                  * order to conserve interrupts due to limited supply.
3936                  */
3937                 if (adapter->rss_queues > (max_rss_queues / 2))
3938                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3939                 else
3940                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3941                 break;
3942         }
3943 }
3944
3945 /**
3946  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3947  *  @adapter: board private structure to initialize
3948  *
3949  *  igb_sw_init initializes the Adapter private data structure.
3950  *  Fields are initialized based on PCI device information and
3951  *  OS network device settings (MTU size).
3952  **/
3953 static int igb_sw_init(struct igb_adapter *adapter)
3954 {
3955         struct e1000_hw *hw = &adapter->hw;
3956         struct net_device *netdev = adapter->netdev;
3957         struct pci_dev *pdev = adapter->pdev;
3958
3959         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3960
3961         /* set default ring sizes */
3962         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3963         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3964
3965         /* set default ITR values */
3966         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3967         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3968
3969         /* set default work limits */
3970         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3971
3972         adapter->max_frame_size = netdev->mtu + IGB_ETH_PKT_HDR_PAD;
3973         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3974
3975         spin_lock_init(&adapter->nfc_lock);
3976         spin_lock_init(&adapter->stats64_lock);
3977 #ifdef CONFIG_PCI_IOV
3978         switch (hw->mac.type) {
3979         case e1000_82576:
3980         case e1000_i350:
3981                 if (max_vfs > 7) {
3982                         dev_warn(&pdev->dev,
3983                                  "Maximum of 7 VFs per PF, using max\n");
3984                         max_vfs = adapter->vfs_allocated_count = 7;
3985                 } else
3986                         adapter->vfs_allocated_count = max_vfs;
3987                 if (adapter->vfs_allocated_count)
3988                         dev_warn(&pdev->dev,
3989                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3990                 break;
3991         default:
3992                 break;
3993         }
3994 #endif /* CONFIG_PCI_IOV */
3995
3996         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3997         adapter->flags |= IGB_FLAG_HAS_MSIX;
3998
3999         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
4000                                      sizeof(struct igb_mac_addr),
4001                                      GFP_KERNEL);
4002         if (!adapter->mac_table)
4003                 return -ENOMEM;
4004
4005         igb_probe_vfs(adapter);
4006
4007         igb_init_queue_configuration(adapter);
4008
4009         /* Setup and initialize a copy of the hw vlan table array */
4010         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
4011                                        GFP_KERNEL);
4012         if (!adapter->shadow_vfta)
4013                 return -ENOMEM;
4014
4015         /* This call may decrease the number of queues */
4016         if (igb_init_interrupt_scheme(adapter, true)) {
4017                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4018                 return -ENOMEM;
4019         }
4020
4021         /* Explicitly disable IRQ since the NIC can be in any state. */
4022         igb_irq_disable(adapter);
4023
4024         if (hw->mac.type >= e1000_i350)
4025                 adapter->flags &= ~IGB_FLAG_DMAC;
4026
4027         set_bit(__IGB_DOWN, &adapter->state);
4028         return 0;
4029 }
4030
4031 /**
4032  *  __igb_open - Called when a network interface is made active
4033  *  @netdev: network interface device structure
4034  *  @resuming: indicates whether we are in a resume call
4035  *
4036  *  Returns 0 on success, negative value on failure
4037  *
4038  *  The open entry point is called when a network interface is made
4039  *  active by the system (IFF_UP).  At this point all resources needed
4040  *  for transmit and receive operations are allocated, the interrupt
4041  *  handler is registered with the OS, the watchdog timer is started,
4042  *  and the stack is notified that the interface is ready.
4043  **/
4044 static int __igb_open(struct net_device *netdev, bool resuming)
4045 {
4046         struct igb_adapter *adapter = netdev_priv(netdev);
4047         struct e1000_hw *hw = &adapter->hw;
4048         struct pci_dev *pdev = adapter->pdev;
4049         int err;
4050         int i;
4051
4052         /* disallow open during test */
4053         if (test_bit(__IGB_TESTING, &adapter->state)) {
4054                 WARN_ON(resuming);
4055                 return -EBUSY;
4056         }
4057
4058         if (!resuming)
4059                 pm_runtime_get_sync(&pdev->dev);
4060
4061         netif_carrier_off(netdev);
4062
4063         /* allocate transmit descriptors */
4064         err = igb_setup_all_tx_resources(adapter);
4065         if (err)
4066                 goto err_setup_tx;
4067
4068         /* allocate receive descriptors */
4069         err = igb_setup_all_rx_resources(adapter);
4070         if (err)
4071                 goto err_setup_rx;
4072
4073         igb_power_up_link(adapter);
4074
4075         /* before we allocate an interrupt, we must be ready to handle it.
4076          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4077          * as soon as we call pci_request_irq, so we have to setup our
4078          * clean_rx handler before we do so.
4079          */
4080         igb_configure(adapter);
4081
4082         err = igb_request_irq(adapter);
4083         if (err)
4084                 goto err_req_irq;
4085
4086         /* Notify the stack of the actual queue counts. */
4087         err = netif_set_real_num_tx_queues(adapter->netdev,
4088                                            adapter->num_tx_queues);
4089         if (err)
4090                 goto err_set_queues;
4091
4092         err = netif_set_real_num_rx_queues(adapter->netdev,
4093                                            adapter->num_rx_queues);
4094         if (err)
4095                 goto err_set_queues;
4096
4097         /* From here on the code is the same as igb_up() */
4098         clear_bit(__IGB_DOWN, &adapter->state);
4099
4100         for (i = 0; i < adapter->num_q_vectors; i++)
4101                 napi_enable(&(adapter->q_vector[i]->napi));
4102
4103         /* Clear any pending interrupts. */
4104         rd32(E1000_TSICR);
4105         rd32(E1000_ICR);
4106
4107         igb_irq_enable(adapter);
4108
4109         /* notify VFs that reset has been completed */
4110         if (adapter->vfs_allocated_count) {
4111                 u32 reg_data = rd32(E1000_CTRL_EXT);
4112
4113                 reg_data |= E1000_CTRL_EXT_PFRSTD;
4114                 wr32(E1000_CTRL_EXT, reg_data);
4115         }
4116
4117         netif_tx_start_all_queues(netdev);
4118
4119         if (!resuming)
4120                 pm_runtime_put(&pdev->dev);
4121
4122         /* start the watchdog. */
4123         hw->mac.get_link_status = 1;
4124         schedule_work(&adapter->watchdog_task);
4125
4126         return 0;
4127
4128 err_set_queues:
4129         igb_free_irq(adapter);
4130 err_req_irq:
4131         igb_release_hw_control(adapter);
4132         igb_power_down_link(adapter);
4133         igb_free_all_rx_resources(adapter);
4134 err_setup_rx:
4135         igb_free_all_tx_resources(adapter);
4136 err_setup_tx:
4137         igb_reset(adapter);
4138         if (!resuming)
4139                 pm_runtime_put(&pdev->dev);
4140
4141         return err;
4142 }
4143
4144 int igb_open(struct net_device *netdev)
4145 {
4146         return __igb_open(netdev, false);
4147 }
4148
4149 /**
4150  *  __igb_close - Disables a network interface
4151  *  @netdev: network interface device structure
4152  *  @suspending: indicates we are in a suspend call
4153  *
4154  *  Returns 0, this is not allowed to fail
4155  *
4156  *  The close entry point is called when an interface is de-activated
4157  *  by the OS.  The hardware is still under the driver's control, but
4158  *  needs to be disabled.  A global MAC reset is issued to stop the
4159  *  hardware, and all transmit and receive resources are freed.
4160  **/
4161 static int __igb_close(struct net_device *netdev, bool suspending)
4162 {
4163         struct igb_adapter *adapter = netdev_priv(netdev);
4164         struct pci_dev *pdev = adapter->pdev;
4165
4166         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4167
4168         if (!suspending)
4169                 pm_runtime_get_sync(&pdev->dev);
4170
4171         igb_down(adapter);
4172         igb_free_irq(adapter);
4173
4174         igb_free_all_tx_resources(adapter);
4175         igb_free_all_rx_resources(adapter);
4176
4177         if (!suspending)
4178                 pm_runtime_put_sync(&pdev->dev);
4179         return 0;
4180 }
4181
4182 int igb_close(struct net_device *netdev)
4183 {
4184         if (netif_device_present(netdev) || netdev->dismantle)
4185                 return __igb_close(netdev, false);
4186         return 0;
4187 }
4188
4189 /**
4190  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4191  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4192  *
4193  *  Return 0 on success, negative on failure
4194  **/
4195 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4196 {
4197         struct device *dev = tx_ring->dev;
4198         int size;
4199
4200         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4201
4202         tx_ring->tx_buffer_info = vmalloc(size);
4203         if (!tx_ring->tx_buffer_info)
4204                 goto err;
4205
4206         /* round up to nearest 4K */
4207         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4208         tx_ring->size = ALIGN(tx_ring->size, 4096);
4209
4210         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4211                                            &tx_ring->dma, GFP_KERNEL);
4212         if (!tx_ring->desc)
4213                 goto err;
4214
4215         tx_ring->next_to_use = 0;
4216         tx_ring->next_to_clean = 0;
4217
4218         return 0;
4219
4220 err:
4221         vfree(tx_ring->tx_buffer_info);
4222         tx_ring->tx_buffer_info = NULL;
4223         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4224         return -ENOMEM;
4225 }
4226
4227 /**
4228  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4229  *                               (Descriptors) for all queues
4230  *  @adapter: board private structure
4231  *
4232  *  Return 0 on success, negative on failure
4233  **/
4234 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4235 {
4236         struct pci_dev *pdev = adapter->pdev;
4237         int i, err = 0;
4238
4239         for (i = 0; i < adapter->num_tx_queues; i++) {
4240                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4241                 if (err) {
4242                         dev_err(&pdev->dev,
4243                                 "Allocation for Tx Queue %u failed\n", i);
4244                         for (i--; i >= 0; i--)
4245                                 igb_free_tx_resources(adapter->tx_ring[i]);
4246                         break;
4247                 }
4248         }
4249
4250         return err;
4251 }
4252
4253 /**
4254  *  igb_setup_tctl - configure the transmit control registers
4255  *  @adapter: Board private structure
4256  **/
4257 void igb_setup_tctl(struct igb_adapter *adapter)
4258 {
4259         struct e1000_hw *hw = &adapter->hw;
4260         u32 tctl;
4261
4262         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4263         wr32(E1000_TXDCTL(0), 0);
4264
4265         /* Program the Transmit Control Register */
4266         tctl = rd32(E1000_TCTL);
4267         tctl &= ~E1000_TCTL_CT;
4268         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4269                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4270
4271         igb_config_collision_dist(hw);
4272
4273         /* Enable transmits */
4274         tctl |= E1000_TCTL_EN;
4275
4276         wr32(E1000_TCTL, tctl);
4277 }
4278
4279 /**
4280  *  igb_configure_tx_ring - Configure transmit ring after Reset
4281  *  @adapter: board private structure
4282  *  @ring: tx ring to configure
4283  *
4284  *  Configure a transmit ring after a reset.
4285  **/
4286 void igb_configure_tx_ring(struct igb_adapter *adapter,
4287                            struct igb_ring *ring)
4288 {
4289         struct e1000_hw *hw = &adapter->hw;
4290         u32 txdctl = 0;
4291         u64 tdba = ring->dma;
4292         int reg_idx = ring->reg_idx;
4293
4294         wr32(E1000_TDLEN(reg_idx),
4295              ring->count * sizeof(union e1000_adv_tx_desc));
4296         wr32(E1000_TDBAL(reg_idx),
4297              tdba & 0x00000000ffffffffULL);
4298         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4299
4300         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4301         wr32(E1000_TDH(reg_idx), 0);
4302         writel(0, ring->tail);
4303
4304         txdctl |= IGB_TX_PTHRESH;
4305         txdctl |= IGB_TX_HTHRESH << 8;
4306         txdctl |= IGB_TX_WTHRESH << 16;
4307
4308         /* reinitialize tx_buffer_info */
4309         memset(ring->tx_buffer_info, 0,
4310                sizeof(struct igb_tx_buffer) * ring->count);
4311
4312         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4313         wr32(E1000_TXDCTL(reg_idx), txdctl);
4314 }
4315
4316 /**
4317  *  igb_configure_tx - Configure transmit Unit after Reset
4318  *  @adapter: board private structure
4319  *
4320  *  Configure the Tx unit of the MAC after a reset.
4321  **/
4322 static void igb_configure_tx(struct igb_adapter *adapter)
4323 {
4324         struct e1000_hw *hw = &adapter->hw;
4325         int i;
4326
4327         /* disable the queues */
4328         for (i = 0; i < adapter->num_tx_queues; i++)
4329                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4330
4331         wrfl();
4332         usleep_range(10000, 20000);
4333
4334         for (i = 0; i < adapter->num_tx_queues; i++)
4335                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4336 }
4337
4338 /**
4339  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4340  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4341  *
4342  *  Returns 0 on success, negative on failure
4343  **/
4344 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4345 {
4346         struct igb_adapter *adapter = netdev_priv(rx_ring->netdev);
4347         struct device *dev = rx_ring->dev;
4348         int size, res;
4349
4350         /* XDP RX-queue info */
4351         if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
4352                 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4353         res = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
4354                                rx_ring->queue_index, 0);
4355         if (res < 0) {
4356                 dev_err(dev, "Failed to register xdp_rxq index %u\n",
4357                         rx_ring->queue_index);
4358                 return res;
4359         }
4360
4361         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4362
4363         rx_ring->rx_buffer_info = vmalloc(size);
4364         if (!rx_ring->rx_buffer_info)
4365                 goto err;
4366
4367         /* Round up to nearest 4K */
4368         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4369         rx_ring->size = ALIGN(rx_ring->size, 4096);
4370
4371         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4372                                            &rx_ring->dma, GFP_KERNEL);
4373         if (!rx_ring->desc)
4374                 goto err;
4375
4376         rx_ring->next_to_alloc = 0;
4377         rx_ring->next_to_clean = 0;
4378         rx_ring->next_to_use = 0;
4379
4380         rx_ring->xdp_prog = adapter->xdp_prog;
4381
4382         return 0;
4383
4384 err:
4385         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4386         vfree(rx_ring->rx_buffer_info);
4387         rx_ring->rx_buffer_info = NULL;
4388         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4389         return -ENOMEM;
4390 }
4391
4392 /**
4393  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4394  *                               (Descriptors) for all queues
4395  *  @adapter: board private structure
4396  *
4397  *  Return 0 on success, negative on failure
4398  **/
4399 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4400 {
4401         struct pci_dev *pdev = adapter->pdev;
4402         int i, err = 0;
4403
4404         for (i = 0; i < adapter->num_rx_queues; i++) {
4405                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4406                 if (err) {
4407                         dev_err(&pdev->dev,
4408                                 "Allocation for Rx Queue %u failed\n", i);
4409                         for (i--; i >= 0; i--)
4410                                 igb_free_rx_resources(adapter->rx_ring[i]);
4411                         break;
4412                 }
4413         }
4414
4415         return err;
4416 }
4417
4418 /**
4419  *  igb_setup_mrqc - configure the multiple receive queue control registers
4420  *  @adapter: Board private structure
4421  **/
4422 static void igb_setup_mrqc(struct igb_adapter *adapter)
4423 {
4424         struct e1000_hw *hw = &adapter->hw;
4425         u32 mrqc, rxcsum;
4426         u32 j, num_rx_queues;
4427         u32 rss_key[10];
4428
4429         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4430         for (j = 0; j < 10; j++)
4431                 wr32(E1000_RSSRK(j), rss_key[j]);
4432
4433         num_rx_queues = adapter->rss_queues;
4434
4435         switch (hw->mac.type) {
4436         case e1000_82576:
4437                 /* 82576 supports 2 RSS queues for SR-IOV */
4438                 if (adapter->vfs_allocated_count)
4439                         num_rx_queues = 2;
4440                 break;
4441         default:
4442                 break;
4443         }
4444
4445         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4446                 for (j = 0; j < IGB_RETA_SIZE; j++)
4447                         adapter->rss_indir_tbl[j] =
4448                         (j * num_rx_queues) / IGB_RETA_SIZE;
4449                 adapter->rss_indir_tbl_init = num_rx_queues;
4450         }
4451         igb_write_rss_indir_tbl(adapter);
4452
4453         /* Disable raw packet checksumming so that RSS hash is placed in
4454          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4455          * offloads as they are enabled by default
4456          */
4457         rxcsum = rd32(E1000_RXCSUM);
4458         rxcsum |= E1000_RXCSUM_PCSD;
4459
4460         if (adapter->hw.mac.type >= e1000_82576)
4461                 /* Enable Receive Checksum Offload for SCTP */
4462                 rxcsum |= E1000_RXCSUM_CRCOFL;
4463
4464         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4465         wr32(E1000_RXCSUM, rxcsum);
4466
4467         /* Generate RSS hash based on packet types, TCP/UDP
4468          * port numbers and/or IPv4/v6 src and dst addresses
4469          */
4470         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4471                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4472                E1000_MRQC_RSS_FIELD_IPV6 |
4473                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4474                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4475
4476         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4477                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4478         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4479                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4480
4481         /* If VMDq is enabled then we set the appropriate mode for that, else
4482          * we default to RSS so that an RSS hash is calculated per packet even
4483          * if we are only using one queue
4484          */
4485         if (adapter->vfs_allocated_count) {
4486                 if (hw->mac.type > e1000_82575) {
4487                         /* Set the default pool for the PF's first queue */
4488                         u32 vtctl = rd32(E1000_VT_CTL);
4489
4490                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4491                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4492                         vtctl |= adapter->vfs_allocated_count <<
4493                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4494                         wr32(E1000_VT_CTL, vtctl);
4495                 }
4496                 if (adapter->rss_queues > 1)
4497                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4498                 else
4499                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4500         } else {
4501                 mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4502         }
4503         igb_vmm_control(adapter);
4504
4505         wr32(E1000_MRQC, mrqc);
4506 }
4507
4508 /**
4509  *  igb_setup_rctl - configure the receive control registers
4510  *  @adapter: Board private structure
4511  **/
4512 void igb_setup_rctl(struct igb_adapter *adapter)
4513 {
4514         struct e1000_hw *hw = &adapter->hw;
4515         u32 rctl;
4516
4517         rctl = rd32(E1000_RCTL);
4518
4519         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4520         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4521
4522         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4523                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4524
4525         /* enable stripping of CRC. It's unlikely this will break BMC
4526          * redirection as it did with e1000. Newer features require
4527          * that the HW strips the CRC.
4528          */
4529         rctl |= E1000_RCTL_SECRC;
4530
4531         /* disable store bad packets and clear size bits. */
4532         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4533
4534         /* enable LPE to allow for reception of jumbo frames */
4535         rctl |= E1000_RCTL_LPE;
4536
4537         /* disable queue 0 to prevent tail write w/o re-config */
4538         wr32(E1000_RXDCTL(0), 0);
4539
4540         /* Attention!!!  For SR-IOV PF driver operations you must enable
4541          * queue drop for all VF and PF queues to prevent head of line blocking
4542          * if an un-trusted VF does not provide descriptors to hardware.
4543          */
4544         if (adapter->vfs_allocated_count) {
4545                 /* set all queue drop enable bits */
4546                 wr32(E1000_QDE, ALL_QUEUES);
4547         }
4548
4549         /* This is useful for sniffing bad packets. */
4550         if (adapter->netdev->features & NETIF_F_RXALL) {
4551                 /* UPE and MPE will be handled by normal PROMISC logic
4552                  * in e1000e_set_rx_mode
4553                  */
4554                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4555                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4556                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4557
4558                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4559                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4560                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4561                  * and that breaks VLANs.
4562                  */
4563         }
4564
4565         wr32(E1000_RCTL, rctl);
4566 }
4567
4568 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4569                                    int vfn)
4570 {
4571         struct e1000_hw *hw = &adapter->hw;
4572         u32 vmolr;
4573
4574         if (size > MAX_JUMBO_FRAME_SIZE)
4575                 size = MAX_JUMBO_FRAME_SIZE;
4576
4577         vmolr = rd32(E1000_VMOLR(vfn));
4578         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4579         vmolr |= size | E1000_VMOLR_LPE;
4580         wr32(E1000_VMOLR(vfn), vmolr);
4581
4582         return 0;
4583 }
4584
4585 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4586                                          int vfn, bool enable)
4587 {
4588         struct e1000_hw *hw = &adapter->hw;
4589         u32 val, reg;
4590
4591         if (hw->mac.type < e1000_82576)
4592                 return;
4593
4594         if (hw->mac.type == e1000_i350)
4595                 reg = E1000_DVMOLR(vfn);
4596         else
4597                 reg = E1000_VMOLR(vfn);
4598
4599         val = rd32(reg);
4600         if (enable)
4601                 val |= E1000_VMOLR_STRVLAN;
4602         else
4603                 val &= ~(E1000_VMOLR_STRVLAN);
4604         wr32(reg, val);
4605 }
4606
4607 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4608                                  int vfn, bool aupe)
4609 {
4610         struct e1000_hw *hw = &adapter->hw;
4611         u32 vmolr;
4612
4613         /* This register exists only on 82576 and newer so if we are older then
4614          * we should exit and do nothing
4615          */
4616         if (hw->mac.type < e1000_82576)
4617                 return;
4618
4619         vmolr = rd32(E1000_VMOLR(vfn));
4620         if (aupe)
4621                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4622         else
4623                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4624
4625         /* clear all bits that might not be set */
4626         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4627
4628         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4629                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4630         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4631          * multicast packets
4632          */
4633         if (vfn <= adapter->vfs_allocated_count)
4634                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4635
4636         wr32(E1000_VMOLR(vfn), vmolr);
4637 }
4638
4639 /**
4640  *  igb_setup_srrctl - configure the split and replication receive control
4641  *                     registers
4642  *  @adapter: Board private structure
4643  *  @ring: receive ring to be configured
4644  **/
4645 void igb_setup_srrctl(struct igb_adapter *adapter, struct igb_ring *ring)
4646 {
4647         struct e1000_hw *hw = &adapter->hw;
4648         int reg_idx = ring->reg_idx;
4649         u32 srrctl = 0;
4650
4651         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4652         if (ring_uses_large_buffer(ring))
4653                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4654         else
4655                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4656         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4657         if (hw->mac.type >= e1000_82580)
4658                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4659         /* Only set Drop Enable if VFs allocated, or we are supporting multiple
4660          * queues and rx flow control is disabled
4661          */
4662         if (adapter->vfs_allocated_count ||
4663             (!(hw->fc.current_mode & e1000_fc_rx_pause) &&
4664              adapter->num_rx_queues > 1))
4665                 srrctl |= E1000_SRRCTL_DROP_EN;
4666
4667         wr32(E1000_SRRCTL(reg_idx), srrctl);
4668 }
4669
4670 /**
4671  *  igb_configure_rx_ring - Configure a receive ring after Reset
4672  *  @adapter: board private structure
4673  *  @ring: receive ring to be configured
4674  *
4675  *  Configure the Rx unit of the MAC after a reset.
4676  **/
4677 void igb_configure_rx_ring(struct igb_adapter *adapter,
4678                            struct igb_ring *ring)
4679 {
4680         struct e1000_hw *hw = &adapter->hw;
4681         union e1000_adv_rx_desc *rx_desc;
4682         u64 rdba = ring->dma;
4683         int reg_idx = ring->reg_idx;
4684         u32 rxdctl = 0;
4685
4686         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4687         WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4688                                            MEM_TYPE_PAGE_SHARED, NULL));
4689
4690         /* disable the queue */
4691         wr32(E1000_RXDCTL(reg_idx), 0);
4692
4693         /* Set DMA base address registers */
4694         wr32(E1000_RDBAL(reg_idx),
4695              rdba & 0x00000000ffffffffULL);
4696         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4697         wr32(E1000_RDLEN(reg_idx),
4698              ring->count * sizeof(union e1000_adv_rx_desc));
4699
4700         /* initialize head and tail */
4701         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4702         wr32(E1000_RDH(reg_idx), 0);
4703         writel(0, ring->tail);
4704
4705         /* set descriptor configuration */
4706         igb_setup_srrctl(adapter, ring);
4707
4708         /* set filtering for VMDQ pools */
4709         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4710
4711         rxdctl |= IGB_RX_PTHRESH;
4712         rxdctl |= IGB_RX_HTHRESH << 8;
4713         rxdctl |= IGB_RX_WTHRESH << 16;
4714
4715         /* initialize rx_buffer_info */
4716         memset(ring->rx_buffer_info, 0,
4717                sizeof(struct igb_rx_buffer) * ring->count);
4718
4719         /* initialize Rx descriptor 0 */
4720         rx_desc = IGB_RX_DESC(ring, 0);
4721         rx_desc->wb.upper.length = 0;
4722
4723         /* enable receive descriptor fetching */
4724         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4725         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4726 }
4727
4728 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4729                                   struct igb_ring *rx_ring)
4730 {
4731         /* set build_skb and buffer size flags */
4732         clear_ring_build_skb_enabled(rx_ring);
4733         clear_ring_uses_large_buffer(rx_ring);
4734
4735         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4736                 return;
4737
4738         set_ring_build_skb_enabled(rx_ring);
4739
4740 #if (PAGE_SIZE < 8192)
4741         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4742                 return;
4743
4744         set_ring_uses_large_buffer(rx_ring);
4745 #endif
4746 }
4747
4748 /**
4749  *  igb_configure_rx - Configure receive Unit after Reset
4750  *  @adapter: board private structure
4751  *
4752  *  Configure the Rx unit of the MAC after a reset.
4753  **/
4754 static void igb_configure_rx(struct igb_adapter *adapter)
4755 {
4756         int i;
4757
4758         /* set the correct pool for the PF default MAC address in entry 0 */
4759         igb_set_default_mac_filter(adapter);
4760
4761         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4762          * the Base and Length of the Rx Descriptor Ring
4763          */
4764         for (i = 0; i < adapter->num_rx_queues; i++) {
4765                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4766
4767                 igb_set_rx_buffer_len(adapter, rx_ring);
4768                 igb_configure_rx_ring(adapter, rx_ring);
4769         }
4770 }
4771
4772 /**
4773  *  igb_free_tx_resources - Free Tx Resources per Queue
4774  *  @tx_ring: Tx descriptor ring for a specific queue
4775  *
4776  *  Free all transmit software resources
4777  **/
4778 void igb_free_tx_resources(struct igb_ring *tx_ring)
4779 {
4780         igb_clean_tx_ring(tx_ring);
4781
4782         vfree(tx_ring->tx_buffer_info);
4783         tx_ring->tx_buffer_info = NULL;
4784
4785         /* if not set, then don't free */
4786         if (!tx_ring->desc)
4787                 return;
4788
4789         dma_free_coherent(tx_ring->dev, tx_ring->size,
4790                           tx_ring->desc, tx_ring->dma);
4791
4792         tx_ring->desc = NULL;
4793 }
4794
4795 /**
4796  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4797  *  @adapter: board private structure
4798  *
4799  *  Free all transmit software resources
4800  **/
4801 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4802 {
4803         int i;
4804
4805         for (i = 0; i < adapter->num_tx_queues; i++)
4806                 if (adapter->tx_ring[i])
4807                         igb_free_tx_resources(adapter->tx_ring[i]);
4808 }
4809
4810 /**
4811  *  igb_clean_tx_ring - Free Tx Buffers
4812  *  @tx_ring: ring to be cleaned
4813  **/
4814 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4815 {
4816         u16 i = tx_ring->next_to_clean;
4817         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4818
4819         while (i != tx_ring->next_to_use) {
4820                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4821
4822                 /* Free all the Tx ring sk_buffs or xdp frames */
4823                 if (tx_buffer->type == IGB_TYPE_SKB)
4824                         dev_kfree_skb_any(tx_buffer->skb);
4825                 else
4826                         xdp_return_frame(tx_buffer->xdpf);
4827
4828                 /* unmap skb header data */
4829                 dma_unmap_single(tx_ring->dev,
4830                                  dma_unmap_addr(tx_buffer, dma),
4831                                  dma_unmap_len(tx_buffer, len),
4832                                  DMA_TO_DEVICE);
4833
4834                 /* check for eop_desc to determine the end of the packet */
4835                 eop_desc = tx_buffer->next_to_watch;
4836                 tx_desc = IGB_TX_DESC(tx_ring, i);
4837
4838                 /* unmap remaining buffers */
4839                 while (tx_desc != eop_desc) {
4840                         tx_buffer++;
4841                         tx_desc++;
4842                         i++;
4843                         if (unlikely(i == tx_ring->count)) {
4844                                 i = 0;
4845                                 tx_buffer = tx_ring->tx_buffer_info;
4846                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4847                         }
4848
4849                         /* unmap any remaining paged data */
4850                         if (dma_unmap_len(tx_buffer, len))
4851                                 dma_unmap_page(tx_ring->dev,
4852                                                dma_unmap_addr(tx_buffer, dma),
4853                                                dma_unmap_len(tx_buffer, len),
4854                                                DMA_TO_DEVICE);
4855                 }
4856
4857                 tx_buffer->next_to_watch = NULL;
4858
4859                 /* move us one more past the eop_desc for start of next pkt */
4860                 tx_buffer++;
4861                 i++;
4862                 if (unlikely(i == tx_ring->count)) {
4863                         i = 0;
4864                         tx_buffer = tx_ring->tx_buffer_info;
4865                 }
4866         }
4867
4868         /* reset BQL for queue */
4869         netdev_tx_reset_queue(txring_txq(tx_ring));
4870
4871         /* reset next_to_use and next_to_clean */
4872         tx_ring->next_to_use = 0;
4873         tx_ring->next_to_clean = 0;
4874 }
4875
4876 /**
4877  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4878  *  @adapter: board private structure
4879  **/
4880 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4881 {
4882         int i;
4883
4884         for (i = 0; i < adapter->num_tx_queues; i++)
4885                 if (adapter->tx_ring[i])
4886                         igb_clean_tx_ring(adapter->tx_ring[i]);
4887 }
4888
4889 /**
4890  *  igb_free_rx_resources - Free Rx Resources
4891  *  @rx_ring: ring to clean the resources from
4892  *
4893  *  Free all receive software resources
4894  **/
4895 void igb_free_rx_resources(struct igb_ring *rx_ring)
4896 {
4897         igb_clean_rx_ring(rx_ring);
4898
4899         rx_ring->xdp_prog = NULL;
4900         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4901         vfree(rx_ring->rx_buffer_info);
4902         rx_ring->rx_buffer_info = NULL;
4903
4904         /* if not set, then don't free */
4905         if (!rx_ring->desc)
4906                 return;
4907
4908         dma_free_coherent(rx_ring->dev, rx_ring->size,
4909                           rx_ring->desc, rx_ring->dma);
4910
4911         rx_ring->desc = NULL;
4912 }
4913
4914 /**
4915  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4916  *  @adapter: board private structure
4917  *
4918  *  Free all receive software resources
4919  **/
4920 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4921 {
4922         int i;
4923
4924         for (i = 0; i < adapter->num_rx_queues; i++)
4925                 if (adapter->rx_ring[i])
4926                         igb_free_rx_resources(adapter->rx_ring[i]);
4927 }
4928
4929 /**
4930  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4931  *  @rx_ring: ring to free buffers from
4932  **/
4933 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4934 {
4935         u16 i = rx_ring->next_to_clean;
4936
4937         dev_kfree_skb(rx_ring->skb);
4938         rx_ring->skb = NULL;
4939
4940         /* Free all the Rx ring sk_buffs */
4941         while (i != rx_ring->next_to_alloc) {
4942                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4943
4944                 /* Invalidate cache lines that may have been written to by
4945                  * device so that we avoid corrupting memory.
4946                  */
4947                 dma_sync_single_range_for_cpu(rx_ring->dev,
4948                                               buffer_info->dma,
4949                                               buffer_info->page_offset,
4950                                               igb_rx_bufsz(rx_ring),
4951                                               DMA_FROM_DEVICE);
4952
4953                 /* free resources associated with mapping */
4954                 dma_unmap_page_attrs(rx_ring->dev,
4955                                      buffer_info->dma,
4956                                      igb_rx_pg_size(rx_ring),
4957                                      DMA_FROM_DEVICE,
4958                                      IGB_RX_DMA_ATTR);
4959                 __page_frag_cache_drain(buffer_info->page,
4960                                         buffer_info->pagecnt_bias);
4961
4962                 i++;
4963                 if (i == rx_ring->count)
4964                         i = 0;
4965         }
4966
4967         rx_ring->next_to_alloc = 0;
4968         rx_ring->next_to_clean = 0;
4969         rx_ring->next_to_use = 0;
4970 }
4971
4972 /**
4973  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4974  *  @adapter: board private structure
4975  **/
4976 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4977 {
4978         int i;
4979
4980         for (i = 0; i < adapter->num_rx_queues; i++)
4981                 if (adapter->rx_ring[i])
4982                         igb_clean_rx_ring(adapter->rx_ring[i]);
4983 }
4984
4985 /**
4986  *  igb_set_mac - Change the Ethernet Address of the NIC
4987  *  @netdev: network interface device structure
4988  *  @p: pointer to an address structure
4989  *
4990  *  Returns 0 on success, negative on failure
4991  **/
4992 static int igb_set_mac(struct net_device *netdev, void *p)
4993 {
4994         struct igb_adapter *adapter = netdev_priv(netdev);
4995         struct e1000_hw *hw = &adapter->hw;
4996         struct sockaddr *addr = p;
4997
4998         if (!is_valid_ether_addr(addr->sa_data))
4999                 return -EADDRNOTAVAIL;
5000
5001         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
5002         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
5003
5004         /* set the correct pool for the new PF MAC address in entry 0 */
5005         igb_set_default_mac_filter(adapter);
5006
5007         return 0;
5008 }
5009
5010 /**
5011  *  igb_write_mc_addr_list - write multicast addresses to MTA
5012  *  @netdev: network interface device structure
5013  *
5014  *  Writes multicast address list to the MTA hash table.
5015  *  Returns: -ENOMEM on failure
5016  *           0 on no addresses written
5017  *           X on writing X addresses to MTA
5018  **/
5019 static int igb_write_mc_addr_list(struct net_device *netdev)
5020 {
5021         struct igb_adapter *adapter = netdev_priv(netdev);
5022         struct e1000_hw *hw = &adapter->hw;
5023         struct netdev_hw_addr *ha;
5024         u8  *mta_list;
5025         int i;
5026
5027         if (netdev_mc_empty(netdev)) {
5028                 /* nothing to program, so clear mc list */
5029                 igb_update_mc_addr_list(hw, NULL, 0);
5030                 igb_restore_vf_multicasts(adapter);
5031                 return 0;
5032         }
5033
5034         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
5035         if (!mta_list)
5036                 return -ENOMEM;
5037
5038         /* The shared function expects a packed array of only addresses. */
5039         i = 0;
5040         netdev_for_each_mc_addr(ha, netdev)
5041                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
5042
5043         igb_update_mc_addr_list(hw, mta_list, i);
5044         kfree(mta_list);
5045
5046         return netdev_mc_count(netdev);
5047 }
5048
5049 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
5050 {
5051         struct e1000_hw *hw = &adapter->hw;
5052         u32 i, pf_id;
5053
5054         switch (hw->mac.type) {
5055         case e1000_i210:
5056         case e1000_i211:
5057         case e1000_i350:
5058                 /* VLAN filtering needed for VLAN prio filter */
5059                 if (adapter->netdev->features & NETIF_F_NTUPLE)
5060                         break;
5061                 fallthrough;
5062         case e1000_82576:
5063         case e1000_82580:
5064         case e1000_i354:
5065                 /* VLAN filtering needed for pool filtering */
5066                 if (adapter->vfs_allocated_count)
5067                         break;
5068                 fallthrough;
5069         default:
5070                 return 1;
5071         }
5072
5073         /* We are already in VLAN promisc, nothing to do */
5074         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
5075                 return 0;
5076
5077         if (!adapter->vfs_allocated_count)
5078                 goto set_vfta;
5079
5080         /* Add PF to all active pools */
5081         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5082
5083         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5084                 u32 vlvf = rd32(E1000_VLVF(i));
5085
5086                 vlvf |= BIT(pf_id);
5087                 wr32(E1000_VLVF(i), vlvf);
5088         }
5089
5090 set_vfta:
5091         /* Set all bits in the VLAN filter table array */
5092         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
5093                 hw->mac.ops.write_vfta(hw, i, ~0U);
5094
5095         /* Set flag so we don't redo unnecessary work */
5096         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
5097
5098         return 0;
5099 }
5100
5101 #define VFTA_BLOCK_SIZE 8
5102 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
5103 {
5104         struct e1000_hw *hw = &adapter->hw;
5105         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
5106         u32 vid_start = vfta_offset * 32;
5107         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
5108         u32 i, vid, word, bits, pf_id;
5109
5110         /* guarantee that we don't scrub out management VLAN */
5111         vid = adapter->mng_vlan_id;
5112         if (vid >= vid_start && vid < vid_end)
5113                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5114
5115         if (!adapter->vfs_allocated_count)
5116                 goto set_vfta;
5117
5118         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5119
5120         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5121                 u32 vlvf = rd32(E1000_VLVF(i));
5122
5123                 /* pull VLAN ID from VLVF */
5124                 vid = vlvf & VLAN_VID_MASK;
5125
5126                 /* only concern ourselves with a certain range */
5127                 if (vid < vid_start || vid >= vid_end)
5128                         continue;
5129
5130                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
5131                         /* record VLAN ID in VFTA */
5132                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5133
5134                         /* if PF is part of this then continue */
5135                         if (test_bit(vid, adapter->active_vlans))
5136                                 continue;
5137                 }
5138
5139                 /* remove PF from the pool */
5140                 bits = ~BIT(pf_id);
5141                 bits &= rd32(E1000_VLVF(i));
5142                 wr32(E1000_VLVF(i), bits);
5143         }
5144
5145 set_vfta:
5146         /* extract values from active_vlans and write back to VFTA */
5147         for (i = VFTA_BLOCK_SIZE; i--;) {
5148                 vid = (vfta_offset + i) * 32;
5149                 word = vid / BITS_PER_LONG;
5150                 bits = vid % BITS_PER_LONG;
5151
5152                 vfta[i] |= adapter->active_vlans[word] >> bits;
5153
5154                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
5155         }
5156 }
5157
5158 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
5159 {
5160         u32 i;
5161
5162         /* We are not in VLAN promisc, nothing to do */
5163         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
5164                 return;
5165
5166         /* Set flag so we don't redo unnecessary work */
5167         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
5168
5169         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
5170                 igb_scrub_vfta(adapter, i);
5171 }
5172
5173 /**
5174  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
5175  *  @netdev: network interface device structure
5176  *
5177  *  The set_rx_mode entry point is called whenever the unicast or multicast
5178  *  address lists or the network interface flags are updated.  This routine is
5179  *  responsible for configuring the hardware for proper unicast, multicast,
5180  *  promiscuous mode, and all-multi behavior.
5181  **/
5182 static void igb_set_rx_mode(struct net_device *netdev)
5183 {
5184         struct igb_adapter *adapter = netdev_priv(netdev);
5185         struct e1000_hw *hw = &adapter->hw;
5186         unsigned int vfn = adapter->vfs_allocated_count;
5187         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5188         int count;
5189
5190         /* Check for Promiscuous and All Multicast modes */
5191         if (netdev->flags & IFF_PROMISC) {
5192                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5193                 vmolr |= E1000_VMOLR_MPME;
5194
5195                 /* enable use of UTA filter to force packets to default pool */
5196                 if (hw->mac.type == e1000_82576)
5197                         vmolr |= E1000_VMOLR_ROPE;
5198         } else {
5199                 if (netdev->flags & IFF_ALLMULTI) {
5200                         rctl |= E1000_RCTL_MPE;
5201                         vmolr |= E1000_VMOLR_MPME;
5202                 } else {
5203                         /* Write addresses to the MTA, if the attempt fails
5204                          * then we should just turn on promiscuous mode so
5205                          * that we can at least receive multicast traffic
5206                          */
5207                         count = igb_write_mc_addr_list(netdev);
5208                         if (count < 0) {
5209                                 rctl |= E1000_RCTL_MPE;
5210                                 vmolr |= E1000_VMOLR_MPME;
5211                         } else if (count) {
5212                                 vmolr |= E1000_VMOLR_ROMPE;
5213                         }
5214                 }
5215         }
5216
5217         /* Write addresses to available RAR registers, if there is not
5218          * sufficient space to store all the addresses then enable
5219          * unicast promiscuous mode
5220          */
5221         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5222                 rctl |= E1000_RCTL_UPE;
5223                 vmolr |= E1000_VMOLR_ROPE;
5224         }
5225
5226         /* enable VLAN filtering by default */
5227         rctl |= E1000_RCTL_VFE;
5228
5229         /* disable VLAN filtering for modes that require it */
5230         if ((netdev->flags & IFF_PROMISC) ||
5231             (netdev->features & NETIF_F_RXALL)) {
5232                 /* if we fail to set all rules then just clear VFE */
5233                 if (igb_vlan_promisc_enable(adapter))
5234                         rctl &= ~E1000_RCTL_VFE;
5235         } else {
5236                 igb_vlan_promisc_disable(adapter);
5237         }
5238
5239         /* update state of unicast, multicast, and VLAN filtering modes */
5240         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5241                                      E1000_RCTL_VFE);
5242         wr32(E1000_RCTL, rctl);
5243
5244 #if (PAGE_SIZE < 8192)
5245         if (!adapter->vfs_allocated_count) {
5246                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5247                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5248         }
5249 #endif
5250         wr32(E1000_RLPML, rlpml);
5251
5252         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5253          * the VMOLR to enable the appropriate modes.  Without this workaround
5254          * we will have issues with VLAN tag stripping not being done for frames
5255          * that are only arriving because we are the default pool
5256          */
5257         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5258                 return;
5259
5260         /* set UTA to appropriate mode */
5261         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5262
5263         vmolr |= rd32(E1000_VMOLR(vfn)) &
5264                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5265
5266         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5267         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5268 #if (PAGE_SIZE < 8192)
5269         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5270                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5271         else
5272 #endif
5273                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5274         vmolr |= E1000_VMOLR_LPE;
5275
5276         wr32(E1000_VMOLR(vfn), vmolr);
5277
5278         igb_restore_vf_multicasts(adapter);
5279 }
5280
5281 static void igb_check_wvbr(struct igb_adapter *adapter)
5282 {
5283         struct e1000_hw *hw = &adapter->hw;
5284         u32 wvbr = 0;
5285
5286         switch (hw->mac.type) {
5287         case e1000_82576:
5288         case e1000_i350:
5289                 wvbr = rd32(E1000_WVBR);
5290                 if (!wvbr)
5291                         return;
5292                 break;
5293         default:
5294                 break;
5295         }
5296
5297         adapter->wvbr |= wvbr;
5298 }
5299
5300 #define IGB_STAGGERED_QUEUE_OFFSET 8
5301
5302 static void igb_spoof_check(struct igb_adapter *adapter)
5303 {
5304         int j;
5305
5306         if (!adapter->wvbr)
5307                 return;
5308
5309         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5310                 if (adapter->wvbr & BIT(j) ||
5311                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5312                         dev_warn(&adapter->pdev->dev,
5313                                 "Spoof event(s) detected on VF %d\n", j);
5314                         adapter->wvbr &=
5315                                 ~(BIT(j) |
5316                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5317                 }
5318         }
5319 }
5320
5321 /* Need to wait a few seconds after link up to get diagnostic information from
5322  * the phy
5323  */
5324 static void igb_update_phy_info(struct timer_list *t)
5325 {
5326         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5327         igb_get_phy_info(&adapter->hw);
5328 }
5329
5330 /**
5331  *  igb_has_link - check shared code for link and determine up/down
5332  *  @adapter: pointer to driver private info
5333  **/
5334 bool igb_has_link(struct igb_adapter *adapter)
5335 {
5336         struct e1000_hw *hw = &adapter->hw;
5337         bool link_active = false;
5338
5339         /* get_link_status is set on LSC (link status) interrupt or
5340          * rx sequence error interrupt.  get_link_status will stay
5341          * false until the e1000_check_for_link establishes link
5342          * for copper adapters ONLY
5343          */
5344         switch (hw->phy.media_type) {
5345         case e1000_media_type_copper:
5346                 if (!hw->mac.get_link_status)
5347                         return true;
5348                 fallthrough;
5349         case e1000_media_type_internal_serdes:
5350                 hw->mac.ops.check_for_link(hw);
5351                 link_active = !hw->mac.get_link_status;
5352                 break;
5353         default:
5354         case e1000_media_type_unknown:
5355                 break;
5356         }
5357
5358         if (((hw->mac.type == e1000_i210) ||
5359              (hw->mac.type == e1000_i211)) &&
5360              (hw->phy.id == I210_I_PHY_ID)) {
5361                 if (!netif_carrier_ok(adapter->netdev)) {
5362                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5363                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5364                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5365                         adapter->link_check_timeout = jiffies;
5366                 }
5367         }
5368
5369         return link_active;
5370 }
5371
5372 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5373 {
5374         bool ret = false;
5375         u32 ctrl_ext, thstat;
5376
5377         /* check for thermal sensor event on i350 copper only */
5378         if (hw->mac.type == e1000_i350) {
5379                 thstat = rd32(E1000_THSTAT);
5380                 ctrl_ext = rd32(E1000_CTRL_EXT);
5381
5382                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5383                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5384                         ret = !!(thstat & event);
5385         }
5386
5387         return ret;
5388 }
5389
5390 /**
5391  *  igb_check_lvmmc - check for malformed packets received
5392  *  and indicated in LVMMC register
5393  *  @adapter: pointer to adapter
5394  **/
5395 static void igb_check_lvmmc(struct igb_adapter *adapter)
5396 {
5397         struct e1000_hw *hw = &adapter->hw;
5398         u32 lvmmc;
5399
5400         lvmmc = rd32(E1000_LVMMC);
5401         if (lvmmc) {
5402                 if (unlikely(net_ratelimit())) {
5403                         netdev_warn(adapter->netdev,
5404                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5405                                     lvmmc);
5406                 }
5407         }
5408 }
5409
5410 /**
5411  *  igb_watchdog - Timer Call-back
5412  *  @t: pointer to timer_list containing our private info pointer
5413  **/
5414 static void igb_watchdog(struct timer_list *t)
5415 {
5416         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5417         /* Do the rest outside of interrupt context */
5418         schedule_work(&adapter->watchdog_task);
5419 }
5420
5421 static void igb_watchdog_task(struct work_struct *work)
5422 {
5423         struct igb_adapter *adapter = container_of(work,
5424                                                    struct igb_adapter,
5425                                                    watchdog_task);
5426         struct e1000_hw *hw = &adapter->hw;
5427         struct e1000_phy_info *phy = &hw->phy;
5428         struct net_device *netdev = adapter->netdev;
5429         u32 link;
5430         int i;
5431         u32 connsw;
5432         u16 phy_data, retry_count = 20;
5433
5434         link = igb_has_link(adapter);
5435
5436         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5437                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5438                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5439                 else
5440                         link = false;
5441         }
5442
5443         /* Force link down if we have fiber to swap to */
5444         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5445                 if (hw->phy.media_type == e1000_media_type_copper) {
5446                         connsw = rd32(E1000_CONNSW);
5447                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5448                                 link = 0;
5449                 }
5450         }
5451         if (link) {
5452                 /* Perform a reset if the media type changed. */
5453                 if (hw->dev_spec._82575.media_changed) {
5454                         hw->dev_spec._82575.media_changed = false;
5455                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5456                         igb_reset(adapter);
5457                 }
5458                 /* Cancel scheduled suspend requests. */
5459                 pm_runtime_resume(netdev->dev.parent);
5460
5461                 if (!netif_carrier_ok(netdev)) {
5462                         u32 ctrl;
5463
5464                         hw->mac.ops.get_speed_and_duplex(hw,
5465                                                          &adapter->link_speed,
5466                                                          &adapter->link_duplex);
5467
5468                         ctrl = rd32(E1000_CTRL);
5469                         /* Links status message must follow this format */
5470                         netdev_info(netdev,
5471                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5472                                netdev->name,
5473                                adapter->link_speed,
5474                                adapter->link_duplex == FULL_DUPLEX ?
5475                                "Full" : "Half",
5476                                (ctrl & E1000_CTRL_TFCE) &&
5477                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5478                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5479                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5480
5481                         /* disable EEE if enabled */
5482                         if ((adapter->flags & IGB_FLAG_EEE) &&
5483                                 (adapter->link_duplex == HALF_DUPLEX)) {
5484                                 dev_info(&adapter->pdev->dev,
5485                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5486                                 adapter->hw.dev_spec._82575.eee_disable = true;
5487                                 adapter->flags &= ~IGB_FLAG_EEE;
5488                         }
5489
5490                         /* check if SmartSpeed worked */
5491                         igb_check_downshift(hw);
5492                         if (phy->speed_downgraded)
5493                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5494
5495                         /* check for thermal sensor event */
5496                         if (igb_thermal_sensor_event(hw,
5497                             E1000_THSTAT_LINK_THROTTLE))
5498                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5499
5500                         /* adjust timeout factor according to speed/duplex */
5501                         adapter->tx_timeout_factor = 1;
5502                         switch (adapter->link_speed) {
5503                         case SPEED_10:
5504                                 adapter->tx_timeout_factor = 14;
5505                                 break;
5506                         case SPEED_100:
5507                                 /* maybe add some timeout factor ? */
5508                                 break;
5509                         }
5510
5511                         if (adapter->link_speed != SPEED_1000 ||
5512                             !hw->phy.ops.read_reg)
5513                                 goto no_wait;
5514
5515                         /* wait for Remote receiver status OK */
5516 retry_read_status:
5517                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5518                                               &phy_data)) {
5519                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5520                                     retry_count) {
5521                                         msleep(100);
5522                                         retry_count--;
5523                                         goto retry_read_status;
5524                                 } else if (!retry_count) {
5525                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5526                                 }
5527                         } else {
5528                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5529                         }
5530 no_wait:
5531                         netif_carrier_on(netdev);
5532
5533                         igb_ping_all_vfs(adapter);
5534                         igb_check_vf_rate_limit(adapter);
5535
5536                         /* link state has changed, schedule phy info update */
5537                         if (!test_bit(__IGB_DOWN, &adapter->state))
5538                                 mod_timer(&adapter->phy_info_timer,
5539                                           round_jiffies(jiffies + 2 * HZ));
5540                 }
5541         } else {
5542                 if (netif_carrier_ok(netdev)) {
5543                         adapter->link_speed = 0;
5544                         adapter->link_duplex = 0;
5545
5546                         /* check for thermal sensor event */
5547                         if (igb_thermal_sensor_event(hw,
5548                             E1000_THSTAT_PWR_DOWN)) {
5549                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5550                         }
5551
5552                         /* Links status message must follow this format */
5553                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5554                                netdev->name);
5555                         netif_carrier_off(netdev);
5556
5557                         igb_ping_all_vfs(adapter);
5558
5559                         /* link state has changed, schedule phy info update */
5560                         if (!test_bit(__IGB_DOWN, &adapter->state))
5561                                 mod_timer(&adapter->phy_info_timer,
5562                                           round_jiffies(jiffies + 2 * HZ));
5563
5564                         /* link is down, time to check for alternate media */
5565                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5566                                 igb_check_swap_media(adapter);
5567                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5568                                         schedule_work(&adapter->reset_task);
5569                                         /* return immediately */
5570                                         return;
5571                                 }
5572                         }
5573                         pm_schedule_suspend(netdev->dev.parent,
5574                                             MSEC_PER_SEC * 5);
5575
5576                 /* also check for alternate media here */
5577                 } else if (!netif_carrier_ok(netdev) &&
5578                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5579                         igb_check_swap_media(adapter);
5580                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5581                                 schedule_work(&adapter->reset_task);
5582                                 /* return immediately */
5583                                 return;
5584                         }
5585                 }
5586         }
5587
5588         spin_lock(&adapter->stats64_lock);
5589         igb_update_stats(adapter);
5590         spin_unlock(&adapter->stats64_lock);
5591
5592         for (i = 0; i < adapter->num_tx_queues; i++) {
5593                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5594                 if (!netif_carrier_ok(netdev)) {
5595                         /* We've lost link, so the controller stops DMA,
5596                          * but we've got queued Tx work that's never going
5597                          * to get done, so reset controller to flush Tx.
5598                          * (Do the reset outside of interrupt context).
5599                          */
5600                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5601                                 adapter->tx_timeout_count++;
5602                                 schedule_work(&adapter->reset_task);
5603                                 /* return immediately since reset is imminent */
5604                                 return;
5605                         }
5606                 }
5607
5608                 /* Force detection of hung controller every watchdog period */
5609                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5610         }
5611
5612         /* Cause software interrupt to ensure Rx ring is cleaned */
5613         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5614                 u32 eics = 0;
5615
5616                 for (i = 0; i < adapter->num_q_vectors; i++)
5617                         eics |= adapter->q_vector[i]->eims_value;
5618                 wr32(E1000_EICS, eics);
5619         } else {
5620                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5621         }
5622
5623         igb_spoof_check(adapter);
5624         igb_ptp_rx_hang(adapter);
5625         igb_ptp_tx_hang(adapter);
5626
5627         /* Check LVMMC register on i350/i354 only */
5628         if ((adapter->hw.mac.type == e1000_i350) ||
5629             (adapter->hw.mac.type == e1000_i354))
5630                 igb_check_lvmmc(adapter);
5631
5632         /* Reset the timer */
5633         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5634                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5635                         mod_timer(&adapter->watchdog_timer,
5636                                   round_jiffies(jiffies +  HZ));
5637                 else
5638                         mod_timer(&adapter->watchdog_timer,
5639                                   round_jiffies(jiffies + 2 * HZ));
5640         }
5641 }
5642
5643 enum latency_range {
5644         lowest_latency = 0,
5645         low_latency = 1,
5646         bulk_latency = 2,
5647         latency_invalid = 255
5648 };
5649
5650 /**
5651  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5652  *  @q_vector: pointer to q_vector
5653  *
5654  *  Stores a new ITR value based on strictly on packet size.  This
5655  *  algorithm is less sophisticated than that used in igb_update_itr,
5656  *  due to the difficulty of synchronizing statistics across multiple
5657  *  receive rings.  The divisors and thresholds used by this function
5658  *  were determined based on theoretical maximum wire speed and testing
5659  *  data, in order to minimize response time while increasing bulk
5660  *  throughput.
5661  *  This functionality is controlled by ethtool's coalescing settings.
5662  *  NOTE:  This function is called only when operating in a multiqueue
5663  *         receive environment.
5664  **/
5665 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5666 {
5667         int new_val = q_vector->itr_val;
5668         int avg_wire_size = 0;
5669         struct igb_adapter *adapter = q_vector->adapter;
5670         unsigned int packets;
5671
5672         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5673          * ints/sec - ITR timer value of 120 ticks.
5674          */
5675         if (adapter->link_speed != SPEED_1000) {
5676                 new_val = IGB_4K_ITR;
5677                 goto set_itr_val;
5678         }
5679
5680         packets = q_vector->rx.total_packets;
5681         if (packets)
5682                 avg_wire_size = q_vector->rx.total_bytes / packets;
5683
5684         packets = q_vector->tx.total_packets;
5685         if (packets)
5686                 avg_wire_size = max_t(u32, avg_wire_size,
5687                                       q_vector->tx.total_bytes / packets);
5688
5689         /* if avg_wire_size isn't set no work was done */
5690         if (!avg_wire_size)
5691                 goto clear_counts;
5692
5693         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5694         avg_wire_size += 24;
5695
5696         /* Don't starve jumbo frames */
5697         avg_wire_size = min(avg_wire_size, 3000);
5698
5699         /* Give a little boost to mid-size frames */
5700         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5701                 new_val = avg_wire_size / 3;
5702         else
5703                 new_val = avg_wire_size / 2;
5704
5705         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5706         if (new_val < IGB_20K_ITR &&
5707             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5708              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5709                 new_val = IGB_20K_ITR;
5710
5711 set_itr_val:
5712         if (new_val != q_vector->itr_val) {
5713                 q_vector->itr_val = new_val;
5714                 q_vector->set_itr = 1;
5715         }
5716 clear_counts:
5717         q_vector->rx.total_bytes = 0;
5718         q_vector->rx.total_packets = 0;
5719         q_vector->tx.total_bytes = 0;
5720         q_vector->tx.total_packets = 0;
5721 }
5722
5723 /**
5724  *  igb_update_itr - update the dynamic ITR value based on statistics
5725  *  @q_vector: pointer to q_vector
5726  *  @ring_container: ring info to update the itr for
5727  *
5728  *  Stores a new ITR value based on packets and byte
5729  *  counts during the last interrupt.  The advantage of per interrupt
5730  *  computation is faster updates and more accurate ITR for the current
5731  *  traffic pattern.  Constants in this function were computed
5732  *  based on theoretical maximum wire speed and thresholds were set based
5733  *  on testing data as well as attempting to minimize response time
5734  *  while increasing bulk throughput.
5735  *  This functionality is controlled by ethtool's coalescing settings.
5736  *  NOTE:  These calculations are only valid when operating in a single-
5737  *         queue environment.
5738  **/
5739 static void igb_update_itr(struct igb_q_vector *q_vector,
5740                            struct igb_ring_container *ring_container)
5741 {
5742         unsigned int packets = ring_container->total_packets;
5743         unsigned int bytes = ring_container->total_bytes;
5744         u8 itrval = ring_container->itr;
5745
5746         /* no packets, exit with status unchanged */
5747         if (packets == 0)
5748                 return;
5749
5750         switch (itrval) {
5751         case lowest_latency:
5752                 /* handle TSO and jumbo frames */
5753                 if (bytes/packets > 8000)
5754                         itrval = bulk_latency;
5755                 else if ((packets < 5) && (bytes > 512))
5756                         itrval = low_latency;
5757                 break;
5758         case low_latency:  /* 50 usec aka 20000 ints/s */
5759                 if (bytes > 10000) {
5760                         /* this if handles the TSO accounting */
5761                         if (bytes/packets > 8000)
5762                                 itrval = bulk_latency;
5763                         else if ((packets < 10) || ((bytes/packets) > 1200))
5764                                 itrval = bulk_latency;
5765                         else if ((packets > 35))
5766                                 itrval = lowest_latency;
5767                 } else if (bytes/packets > 2000) {
5768                         itrval = bulk_latency;
5769                 } else if (packets <= 2 && bytes < 512) {
5770                         itrval = lowest_latency;
5771                 }
5772                 break;
5773         case bulk_latency: /* 250 usec aka 4000 ints/s */
5774                 if (bytes > 25000) {
5775                         if (packets > 35)
5776                                 itrval = low_latency;
5777                 } else if (bytes < 1500) {
5778                         itrval = low_latency;
5779                 }
5780                 break;
5781         }
5782
5783         /* clear work counters since we have the values we need */
5784         ring_container->total_bytes = 0;
5785         ring_container->total_packets = 0;
5786
5787         /* write updated itr to ring container */
5788         ring_container->itr = itrval;
5789 }
5790
5791 static void igb_set_itr(struct igb_q_vector *q_vector)
5792 {
5793         struct igb_adapter *adapter = q_vector->adapter;
5794         u32 new_itr = q_vector->itr_val;
5795         u8 current_itr = 0;
5796
5797         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5798         if (adapter->link_speed != SPEED_1000) {
5799                 current_itr = 0;
5800                 new_itr = IGB_4K_ITR;
5801                 goto set_itr_now;
5802         }
5803
5804         igb_update_itr(q_vector, &q_vector->tx);
5805         igb_update_itr(q_vector, &q_vector->rx);
5806
5807         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5808
5809         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5810         if (current_itr == lowest_latency &&
5811             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5812              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5813                 current_itr = low_latency;
5814
5815         switch (current_itr) {
5816         /* counts and packets in update_itr are dependent on these numbers */
5817         case lowest_latency:
5818                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5819                 break;
5820         case low_latency:
5821                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5822                 break;
5823         case bulk_latency:
5824                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5825                 break;
5826         default:
5827                 break;
5828         }
5829
5830 set_itr_now:
5831         if (new_itr != q_vector->itr_val) {
5832                 /* this attempts to bias the interrupt rate towards Bulk
5833                  * by adding intermediate steps when interrupt rate is
5834                  * increasing
5835                  */
5836                 new_itr = new_itr > q_vector->itr_val ?
5837                           max((new_itr * q_vector->itr_val) /
5838                           (new_itr + (q_vector->itr_val >> 2)),
5839                           new_itr) : new_itr;
5840                 /* Don't write the value here; it resets the adapter's
5841                  * internal timer, and causes us to delay far longer than
5842                  * we should between interrupts.  Instead, we write the ITR
5843                  * value at the beginning of the next interrupt so the timing
5844                  * ends up being correct.
5845                  */
5846                 q_vector->itr_val = new_itr;
5847                 q_vector->set_itr = 1;
5848         }
5849 }
5850
5851 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5852                             struct igb_tx_buffer *first,
5853                             u32 vlan_macip_lens, u32 type_tucmd,
5854                             u32 mss_l4len_idx)
5855 {
5856         struct e1000_adv_tx_context_desc *context_desc;
5857         u16 i = tx_ring->next_to_use;
5858         struct timespec64 ts;
5859
5860         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5861
5862         i++;
5863         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5864
5865         /* set bits to identify this as an advanced context descriptor */
5866         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5867
5868         /* For 82575, context index must be unique per ring. */
5869         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5870                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5871
5872         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5873         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5874         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5875
5876         /* We assume there is always a valid tx time available. Invalid times
5877          * should have been handled by the upper layers.
5878          */
5879         if (tx_ring->launchtime_enable) {
5880                 ts = ktime_to_timespec64(first->skb->tstamp);
5881                 skb_txtime_consumed(first->skb);
5882                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5883         } else {
5884                 context_desc->seqnum_seed = 0;
5885         }
5886 }
5887
5888 static int igb_tso(struct igb_ring *tx_ring,
5889                    struct igb_tx_buffer *first,
5890                    u8 *hdr_len)
5891 {
5892         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5893         struct sk_buff *skb = first->skb;
5894         union {
5895                 struct iphdr *v4;
5896                 struct ipv6hdr *v6;
5897                 unsigned char *hdr;
5898         } ip;
5899         union {
5900                 struct tcphdr *tcp;
5901                 struct udphdr *udp;
5902                 unsigned char *hdr;
5903         } l4;
5904         u32 paylen, l4_offset;
5905         int err;
5906
5907         if (skb->ip_summed != CHECKSUM_PARTIAL)
5908                 return 0;
5909
5910         if (!skb_is_gso(skb))
5911                 return 0;
5912
5913         err = skb_cow_head(skb, 0);
5914         if (err < 0)
5915                 return err;
5916
5917         ip.hdr = skb_network_header(skb);
5918         l4.hdr = skb_checksum_start(skb);
5919
5920         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5921         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
5922                       E1000_ADVTXD_TUCMD_L4T_UDP : E1000_ADVTXD_TUCMD_L4T_TCP;
5923
5924         /* initialize outer IP header fields */
5925         if (ip.v4->version == 4) {
5926                 unsigned char *csum_start = skb_checksum_start(skb);
5927                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5928
5929                 /* IP header will have to cancel out any data that
5930                  * is not a part of the outer IP header
5931                  */
5932                 ip.v4->check = csum_fold(csum_partial(trans_start,
5933                                                       csum_start - trans_start,
5934                                                       0));
5935                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5936
5937                 ip.v4->tot_len = 0;
5938                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5939                                    IGB_TX_FLAGS_CSUM |
5940                                    IGB_TX_FLAGS_IPV4;
5941         } else {
5942                 ip.v6->payload_len = 0;
5943                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5944                                    IGB_TX_FLAGS_CSUM;
5945         }
5946
5947         /* determine offset of inner transport header */
5948         l4_offset = l4.hdr - skb->data;
5949
5950         /* remove payload length from inner checksum */
5951         paylen = skb->len - l4_offset;
5952         if (type_tucmd & E1000_ADVTXD_TUCMD_L4T_TCP) {
5953                 /* compute length of segmentation header */
5954                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5955                 csum_replace_by_diff(&l4.tcp->check,
5956                         (__force __wsum)htonl(paylen));
5957         } else {
5958                 /* compute length of segmentation header */
5959                 *hdr_len = sizeof(*l4.udp) + l4_offset;
5960                 csum_replace_by_diff(&l4.udp->check,
5961                                      (__force __wsum)htonl(paylen));
5962         }
5963
5964         /* update gso size and bytecount with header size */
5965         first->gso_segs = skb_shinfo(skb)->gso_segs;
5966         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5967
5968         /* MSS L4LEN IDX */
5969         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5970         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5971
5972         /* VLAN MACLEN IPLEN */
5973         vlan_macip_lens = l4.hdr - ip.hdr;
5974         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5975         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5976
5977         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
5978                         type_tucmd, mss_l4len_idx);
5979
5980         return 1;
5981 }
5982
5983 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5984 {
5985         struct sk_buff *skb = first->skb;
5986         u32 vlan_macip_lens = 0;
5987         u32 type_tucmd = 0;
5988
5989         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5990 csum_failed:
5991                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
5992                     !tx_ring->launchtime_enable)
5993                         return;
5994                 goto no_csum;
5995         }
5996
5997         switch (skb->csum_offset) {
5998         case offsetof(struct tcphdr, check):
5999                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
6000                 fallthrough;
6001         case offsetof(struct udphdr, check):
6002                 break;
6003         case offsetof(struct sctphdr, checksum):
6004                 /* validate that this is actually an SCTP request */
6005                 if (skb_csum_is_sctp(skb)) {
6006                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
6007                         break;
6008                 }
6009                 fallthrough;
6010         default:
6011                 skb_checksum_help(skb);
6012                 goto csum_failed;
6013         }
6014
6015         /* update TX checksum flag */
6016         first->tx_flags |= IGB_TX_FLAGS_CSUM;
6017         vlan_macip_lens = skb_checksum_start_offset(skb) -
6018                           skb_network_offset(skb);
6019 no_csum:
6020         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
6021         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6022
6023         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
6024 }
6025
6026 #define IGB_SET_FLAG(_input, _flag, _result) \
6027         ((_flag <= _result) ? \
6028          ((u32)(_input & _flag) * (_result / _flag)) : \
6029          ((u32)(_input & _flag) / (_flag / _result)))
6030
6031 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6032 {
6033         /* set type for advanced descriptor with frame checksum insertion */
6034         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
6035                        E1000_ADVTXD_DCMD_DEXT |
6036                        E1000_ADVTXD_DCMD_IFCS;
6037
6038         /* set HW vlan bit if vlan is present */
6039         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
6040                                  (E1000_ADVTXD_DCMD_VLE));
6041
6042         /* set segmentation bits for TSO */
6043         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
6044                                  (E1000_ADVTXD_DCMD_TSE));
6045
6046         /* set timestamp bit if present */
6047         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
6048                                  (E1000_ADVTXD_MAC_TSTAMP));
6049
6050         /* insert frame checksum */
6051         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
6052
6053         return cmd_type;
6054 }
6055
6056 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
6057                                  union e1000_adv_tx_desc *tx_desc,
6058                                  u32 tx_flags, unsigned int paylen)
6059 {
6060         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
6061
6062         /* 82575 requires a unique index per ring */
6063         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6064                 olinfo_status |= tx_ring->reg_idx << 4;
6065
6066         /* insert L4 checksum */
6067         olinfo_status |= IGB_SET_FLAG(tx_flags,
6068                                       IGB_TX_FLAGS_CSUM,
6069                                       (E1000_TXD_POPTS_TXSM << 8));
6070
6071         /* insert IPv4 checksum */
6072         olinfo_status |= IGB_SET_FLAG(tx_flags,
6073                                       IGB_TX_FLAGS_IPV4,
6074                                       (E1000_TXD_POPTS_IXSM << 8));
6075
6076         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6077 }
6078
6079 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6080 {
6081         struct net_device *netdev = tx_ring->netdev;
6082
6083         netif_stop_subqueue(netdev, tx_ring->queue_index);
6084
6085         /* Herbert's original patch had:
6086          *  smp_mb__after_netif_stop_queue();
6087          * but since that doesn't exist yet, just open code it.
6088          */
6089         smp_mb();
6090
6091         /* We need to check again in a case another CPU has just
6092          * made room available.
6093          */
6094         if (igb_desc_unused(tx_ring) < size)
6095                 return -EBUSY;
6096
6097         /* A reprieve! */
6098         netif_wake_subqueue(netdev, tx_ring->queue_index);
6099
6100         u64_stats_update_begin(&tx_ring->tx_syncp2);
6101         tx_ring->tx_stats.restart_queue2++;
6102         u64_stats_update_end(&tx_ring->tx_syncp2);
6103
6104         return 0;
6105 }
6106
6107 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6108 {
6109         if (igb_desc_unused(tx_ring) >= size)
6110                 return 0;
6111         return __igb_maybe_stop_tx(tx_ring, size);
6112 }
6113
6114 static int igb_tx_map(struct igb_ring *tx_ring,
6115                       struct igb_tx_buffer *first,
6116                       const u8 hdr_len)
6117 {
6118         struct sk_buff *skb = first->skb;
6119         struct igb_tx_buffer *tx_buffer;
6120         union e1000_adv_tx_desc *tx_desc;
6121         skb_frag_t *frag;
6122         dma_addr_t dma;
6123         unsigned int data_len, size;
6124         u32 tx_flags = first->tx_flags;
6125         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
6126         u16 i = tx_ring->next_to_use;
6127
6128         tx_desc = IGB_TX_DESC(tx_ring, i);
6129
6130         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
6131
6132         size = skb_headlen(skb);
6133         data_len = skb->data_len;
6134
6135         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6136
6137         tx_buffer = first;
6138
6139         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6140                 if (dma_mapping_error(tx_ring->dev, dma))
6141                         goto dma_error;
6142
6143                 /* record length, and DMA address */
6144                 dma_unmap_len_set(tx_buffer, len, size);
6145                 dma_unmap_addr_set(tx_buffer, dma, dma);
6146
6147                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6148
6149                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
6150                         tx_desc->read.cmd_type_len =
6151                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
6152
6153                         i++;
6154                         tx_desc++;
6155                         if (i == tx_ring->count) {
6156                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6157                                 i = 0;
6158                         }
6159                         tx_desc->read.olinfo_status = 0;
6160
6161                         dma += IGB_MAX_DATA_PER_TXD;
6162                         size -= IGB_MAX_DATA_PER_TXD;
6163
6164                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6165                 }
6166
6167                 if (likely(!data_len))
6168                         break;
6169
6170                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6171
6172                 i++;
6173                 tx_desc++;
6174                 if (i == tx_ring->count) {
6175                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6176                         i = 0;
6177                 }
6178                 tx_desc->read.olinfo_status = 0;
6179
6180                 size = skb_frag_size(frag);
6181                 data_len -= size;
6182
6183                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6184                                        size, DMA_TO_DEVICE);
6185
6186                 tx_buffer = &tx_ring->tx_buffer_info[i];
6187         }
6188
6189         /* write last descriptor with RS and EOP bits */
6190         cmd_type |= size | IGB_TXD_DCMD;
6191         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6192
6193         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6194
6195         /* set the timestamp */
6196         first->time_stamp = jiffies;
6197
6198         skb_tx_timestamp(skb);
6199
6200         /* Force memory writes to complete before letting h/w know there
6201          * are new descriptors to fetch.  (Only applicable for weak-ordered
6202          * memory model archs, such as IA-64).
6203          *
6204          * We also need this memory barrier to make certain all of the
6205          * status bits have been updated before next_to_watch is written.
6206          */
6207         dma_wmb();
6208
6209         /* set next_to_watch value indicating a packet is present */
6210         first->next_to_watch = tx_desc;
6211
6212         i++;
6213         if (i == tx_ring->count)
6214                 i = 0;
6215
6216         tx_ring->next_to_use = i;
6217
6218         /* Make sure there is space in the ring for the next send. */
6219         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6220
6221         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
6222                 writel(i, tx_ring->tail);
6223         }
6224         return 0;
6225
6226 dma_error:
6227         dev_err(tx_ring->dev, "TX DMA map failed\n");
6228         tx_buffer = &tx_ring->tx_buffer_info[i];
6229
6230         /* clear dma mappings for failed tx_buffer_info map */
6231         while (tx_buffer != first) {
6232                 if (dma_unmap_len(tx_buffer, len))
6233                         dma_unmap_page(tx_ring->dev,
6234                                        dma_unmap_addr(tx_buffer, dma),
6235                                        dma_unmap_len(tx_buffer, len),
6236                                        DMA_TO_DEVICE);
6237                 dma_unmap_len_set(tx_buffer, len, 0);
6238
6239                 if (i-- == 0)
6240                         i += tx_ring->count;
6241                 tx_buffer = &tx_ring->tx_buffer_info[i];
6242         }
6243
6244         if (dma_unmap_len(tx_buffer, len))
6245                 dma_unmap_single(tx_ring->dev,
6246                                  dma_unmap_addr(tx_buffer, dma),
6247                                  dma_unmap_len(tx_buffer, len),
6248                                  DMA_TO_DEVICE);
6249         dma_unmap_len_set(tx_buffer, len, 0);
6250
6251         dev_kfree_skb_any(tx_buffer->skb);
6252         tx_buffer->skb = NULL;
6253
6254         tx_ring->next_to_use = i;
6255
6256         return -1;
6257 }
6258
6259 int igb_xmit_xdp_ring(struct igb_adapter *adapter,
6260                       struct igb_ring *tx_ring,
6261                       struct xdp_frame *xdpf)
6262 {
6263         union e1000_adv_tx_desc *tx_desc;
6264         u32 len, cmd_type, olinfo_status;
6265         struct igb_tx_buffer *tx_buffer;
6266         dma_addr_t dma;
6267         u16 i;
6268
6269         len = xdpf->len;
6270
6271         if (unlikely(!igb_desc_unused(tx_ring)))
6272                 return IGB_XDP_CONSUMED;
6273
6274         dma = dma_map_single(tx_ring->dev, xdpf->data, len, DMA_TO_DEVICE);
6275         if (dma_mapping_error(tx_ring->dev, dma))
6276                 return IGB_XDP_CONSUMED;
6277
6278         /* record the location of the first descriptor for this packet */
6279         tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6280         tx_buffer->bytecount = len;
6281         tx_buffer->gso_segs = 1;
6282         tx_buffer->protocol = 0;
6283
6284         i = tx_ring->next_to_use;
6285         tx_desc = IGB_TX_DESC(tx_ring, i);
6286
6287         dma_unmap_len_set(tx_buffer, len, len);
6288         dma_unmap_addr_set(tx_buffer, dma, dma);
6289         tx_buffer->type = IGB_TYPE_XDP;
6290         tx_buffer->xdpf = xdpf;
6291
6292         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6293
6294         /* put descriptor type bits */
6295         cmd_type = E1000_ADVTXD_DTYP_DATA |
6296                    E1000_ADVTXD_DCMD_DEXT |
6297                    E1000_ADVTXD_DCMD_IFCS;
6298         cmd_type |= len | IGB_TXD_DCMD;
6299         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6300
6301         olinfo_status = len << E1000_ADVTXD_PAYLEN_SHIFT;
6302         /* 82575 requires a unique index per ring */
6303         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6304                 olinfo_status |= tx_ring->reg_idx << 4;
6305
6306         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6307
6308         netdev_tx_sent_queue(txring_txq(tx_ring), tx_buffer->bytecount);
6309
6310         /* set the timestamp */
6311         tx_buffer->time_stamp = jiffies;
6312
6313         /* Avoid any potential race with xdp_xmit and cleanup */
6314         smp_wmb();
6315
6316         /* set next_to_watch value indicating a packet is present */
6317         i++;
6318         if (i == tx_ring->count)
6319                 i = 0;
6320
6321         tx_buffer->next_to_watch = tx_desc;
6322         tx_ring->next_to_use = i;
6323
6324         /* Make sure there is space in the ring for the next send. */
6325         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6326
6327         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
6328                 writel(i, tx_ring->tail);
6329
6330         return IGB_XDP_TX;
6331 }
6332
6333 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6334                                 struct igb_ring *tx_ring)
6335 {
6336         struct igb_tx_buffer *first;
6337         int tso;
6338         u32 tx_flags = 0;
6339         unsigned short f;
6340         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6341         __be16 protocol = vlan_get_protocol(skb);
6342         u8 hdr_len = 0;
6343
6344         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6345          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6346          *       + 2 desc gap to keep tail from touching head,
6347          *       + 1 desc for context descriptor,
6348          * otherwise try next time
6349          */
6350         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6351                 count += TXD_USE_COUNT(skb_frag_size(
6352                                                 &skb_shinfo(skb)->frags[f]));
6353
6354         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6355                 /* this is a hard error */
6356                 return NETDEV_TX_BUSY;
6357         }
6358
6359         /* record the location of the first descriptor for this packet */
6360         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6361         first->type = IGB_TYPE_SKB;
6362         first->skb = skb;
6363         first->bytecount = skb->len;
6364         first->gso_segs = 1;
6365
6366         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6367                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6368
6369                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6370                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6371                                            &adapter->state)) {
6372                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6373                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6374
6375                         adapter->ptp_tx_skb = skb_get(skb);
6376                         adapter->ptp_tx_start = jiffies;
6377                         if (adapter->hw.mac.type == e1000_82576)
6378                                 schedule_work(&adapter->ptp_tx_work);
6379                 } else {
6380                         adapter->tx_hwtstamp_skipped++;
6381                 }
6382         }
6383
6384         if (skb_vlan_tag_present(skb)) {
6385                 tx_flags |= IGB_TX_FLAGS_VLAN;
6386                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6387         }
6388
6389         /* record initial flags and protocol */
6390         first->tx_flags = tx_flags;
6391         first->protocol = protocol;
6392
6393         tso = igb_tso(tx_ring, first, &hdr_len);
6394         if (tso < 0)
6395                 goto out_drop;
6396         else if (!tso)
6397                 igb_tx_csum(tx_ring, first);
6398
6399         if (igb_tx_map(tx_ring, first, hdr_len))
6400                 goto cleanup_tx_tstamp;
6401
6402         return NETDEV_TX_OK;
6403
6404 out_drop:
6405         dev_kfree_skb_any(first->skb);
6406         first->skb = NULL;
6407 cleanup_tx_tstamp:
6408         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6409                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6410
6411                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6412                 adapter->ptp_tx_skb = NULL;
6413                 if (adapter->hw.mac.type == e1000_82576)
6414                         cancel_work_sync(&adapter->ptp_tx_work);
6415                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6416         }
6417
6418         return NETDEV_TX_OK;
6419 }
6420
6421 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6422                                                     struct sk_buff *skb)
6423 {
6424         unsigned int r_idx = skb->queue_mapping;
6425
6426         if (r_idx >= adapter->num_tx_queues)
6427                 r_idx = r_idx % adapter->num_tx_queues;
6428
6429         return adapter->tx_ring[r_idx];
6430 }
6431
6432 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6433                                   struct net_device *netdev)
6434 {
6435         struct igb_adapter *adapter = netdev_priv(netdev);
6436
6437         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6438          * in order to meet this minimum size requirement.
6439          */
6440         if (skb_put_padto(skb, 17))
6441                 return NETDEV_TX_OK;
6442
6443         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6444 }
6445
6446 /**
6447  *  igb_tx_timeout - Respond to a Tx Hang
6448  *  @netdev: network interface device structure
6449  *  @txqueue: number of the Tx queue that hung (unused)
6450  **/
6451 static void igb_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6452 {
6453         struct igb_adapter *adapter = netdev_priv(netdev);
6454         struct e1000_hw *hw = &adapter->hw;
6455
6456         /* Do the reset outside of interrupt context */
6457         adapter->tx_timeout_count++;
6458
6459         if (hw->mac.type >= e1000_82580)
6460                 hw->dev_spec._82575.global_device_reset = true;
6461
6462         schedule_work(&adapter->reset_task);
6463         wr32(E1000_EICS,
6464              (adapter->eims_enable_mask & ~adapter->eims_other));
6465 }
6466
6467 static void igb_reset_task(struct work_struct *work)
6468 {
6469         struct igb_adapter *adapter;
6470         adapter = container_of(work, struct igb_adapter, reset_task);
6471
6472         rtnl_lock();
6473         /* If we're already down or resetting, just bail */
6474         if (test_bit(__IGB_DOWN, &adapter->state) ||
6475             test_bit(__IGB_RESETTING, &adapter->state)) {
6476                 rtnl_unlock();
6477                 return;
6478         }
6479
6480         igb_dump(adapter);
6481         netdev_err(adapter->netdev, "Reset adapter\n");
6482         igb_reinit_locked(adapter);
6483         rtnl_unlock();
6484 }
6485
6486 /**
6487  *  igb_get_stats64 - Get System Network Statistics
6488  *  @netdev: network interface device structure
6489  *  @stats: rtnl_link_stats64 pointer
6490  **/
6491 static void igb_get_stats64(struct net_device *netdev,
6492                             struct rtnl_link_stats64 *stats)
6493 {
6494         struct igb_adapter *adapter = netdev_priv(netdev);
6495
6496         spin_lock(&adapter->stats64_lock);
6497         igb_update_stats(adapter);
6498         memcpy(stats, &adapter->stats64, sizeof(*stats));
6499         spin_unlock(&adapter->stats64_lock);
6500 }
6501
6502 /**
6503  *  igb_change_mtu - Change the Maximum Transfer Unit
6504  *  @netdev: network interface device structure
6505  *  @new_mtu: new value for maximum frame size
6506  *
6507  *  Returns 0 on success, negative on failure
6508  **/
6509 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6510 {
6511         struct igb_adapter *adapter = netdev_priv(netdev);
6512         int max_frame = new_mtu + IGB_ETH_PKT_HDR_PAD;
6513
6514         if (adapter->xdp_prog) {
6515                 int i;
6516
6517                 for (i = 0; i < adapter->num_rx_queues; i++) {
6518                         struct igb_ring *ring = adapter->rx_ring[i];
6519
6520                         if (max_frame > igb_rx_bufsz(ring)) {
6521                                 netdev_warn(adapter->netdev,
6522                                             "Requested MTU size is not supported with XDP. Max frame size is %d\n",
6523                                             max_frame);
6524                                 return -EINVAL;
6525                         }
6526                 }
6527         }
6528
6529         /* adjust max frame to be at least the size of a standard frame */
6530         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6531                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6532
6533         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6534                 usleep_range(1000, 2000);
6535
6536         /* igb_down has a dependency on max_frame_size */
6537         adapter->max_frame_size = max_frame;
6538
6539         if (netif_running(netdev))
6540                 igb_down(adapter);
6541
6542         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6543                    netdev->mtu, new_mtu);
6544         netdev->mtu = new_mtu;
6545
6546         if (netif_running(netdev))
6547                 igb_up(adapter);
6548         else
6549                 igb_reset(adapter);
6550
6551         clear_bit(__IGB_RESETTING, &adapter->state);
6552
6553         return 0;
6554 }
6555
6556 /**
6557  *  igb_update_stats - Update the board statistics counters
6558  *  @adapter: board private structure
6559  **/
6560 void igb_update_stats(struct igb_adapter *adapter)
6561 {
6562         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6563         struct e1000_hw *hw = &adapter->hw;
6564         struct pci_dev *pdev = adapter->pdev;
6565         u32 reg, mpc;
6566         int i;
6567         u64 bytes, packets;
6568         unsigned int start;
6569         u64 _bytes, _packets;
6570
6571         /* Prevent stats update while adapter is being reset, or if the pci
6572          * connection is down.
6573          */
6574         if (adapter->link_speed == 0)
6575                 return;
6576         if (pci_channel_offline(pdev))
6577                 return;
6578
6579         bytes = 0;
6580         packets = 0;
6581
6582         rcu_read_lock();
6583         for (i = 0; i < adapter->num_rx_queues; i++) {
6584                 struct igb_ring *ring = adapter->rx_ring[i];
6585                 u32 rqdpc = rd32(E1000_RQDPC(i));
6586                 if (hw->mac.type >= e1000_i210)
6587                         wr32(E1000_RQDPC(i), 0);
6588
6589                 if (rqdpc) {
6590                         ring->rx_stats.drops += rqdpc;
6591                         net_stats->rx_fifo_errors += rqdpc;
6592                 }
6593
6594                 do {
6595                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
6596                         _bytes = ring->rx_stats.bytes;
6597                         _packets = ring->rx_stats.packets;
6598                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
6599                 bytes += _bytes;
6600                 packets += _packets;
6601         }
6602
6603         net_stats->rx_bytes = bytes;
6604         net_stats->rx_packets = packets;
6605
6606         bytes = 0;
6607         packets = 0;
6608         for (i = 0; i < adapter->num_tx_queues; i++) {
6609                 struct igb_ring *ring = adapter->tx_ring[i];
6610                 do {
6611                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
6612                         _bytes = ring->tx_stats.bytes;
6613                         _packets = ring->tx_stats.packets;
6614                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
6615                 bytes += _bytes;
6616                 packets += _packets;
6617         }
6618         net_stats->tx_bytes = bytes;
6619         net_stats->tx_packets = packets;
6620         rcu_read_unlock();
6621
6622         /* read stats registers */
6623         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6624         adapter->stats.gprc += rd32(E1000_GPRC);
6625         adapter->stats.gorc += rd32(E1000_GORCL);
6626         rd32(E1000_GORCH); /* clear GORCL */
6627         adapter->stats.bprc += rd32(E1000_BPRC);
6628         adapter->stats.mprc += rd32(E1000_MPRC);
6629         adapter->stats.roc += rd32(E1000_ROC);
6630
6631         adapter->stats.prc64 += rd32(E1000_PRC64);
6632         adapter->stats.prc127 += rd32(E1000_PRC127);
6633         adapter->stats.prc255 += rd32(E1000_PRC255);
6634         adapter->stats.prc511 += rd32(E1000_PRC511);
6635         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6636         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6637         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6638         adapter->stats.sec += rd32(E1000_SEC);
6639
6640         mpc = rd32(E1000_MPC);
6641         adapter->stats.mpc += mpc;
6642         net_stats->rx_fifo_errors += mpc;
6643         adapter->stats.scc += rd32(E1000_SCC);
6644         adapter->stats.ecol += rd32(E1000_ECOL);
6645         adapter->stats.mcc += rd32(E1000_MCC);
6646         adapter->stats.latecol += rd32(E1000_LATECOL);
6647         adapter->stats.dc += rd32(E1000_DC);
6648         adapter->stats.rlec += rd32(E1000_RLEC);
6649         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6650         adapter->stats.xontxc += rd32(E1000_XONTXC);
6651         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6652         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6653         adapter->stats.fcruc += rd32(E1000_FCRUC);
6654         adapter->stats.gptc += rd32(E1000_GPTC);
6655         adapter->stats.gotc += rd32(E1000_GOTCL);
6656         rd32(E1000_GOTCH); /* clear GOTCL */
6657         adapter->stats.rnbc += rd32(E1000_RNBC);
6658         adapter->stats.ruc += rd32(E1000_RUC);
6659         adapter->stats.rfc += rd32(E1000_RFC);
6660         adapter->stats.rjc += rd32(E1000_RJC);
6661         adapter->stats.tor += rd32(E1000_TORH);
6662         adapter->stats.tot += rd32(E1000_TOTH);
6663         adapter->stats.tpr += rd32(E1000_TPR);
6664
6665         adapter->stats.ptc64 += rd32(E1000_PTC64);
6666         adapter->stats.ptc127 += rd32(E1000_PTC127);
6667         adapter->stats.ptc255 += rd32(E1000_PTC255);
6668         adapter->stats.ptc511 += rd32(E1000_PTC511);
6669         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6670         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6671
6672         adapter->stats.mptc += rd32(E1000_MPTC);
6673         adapter->stats.bptc += rd32(E1000_BPTC);
6674
6675         adapter->stats.tpt += rd32(E1000_TPT);
6676         adapter->stats.colc += rd32(E1000_COLC);
6677
6678         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6679         /* read internal phy specific stats */
6680         reg = rd32(E1000_CTRL_EXT);
6681         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6682                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6683
6684                 /* this stat has invalid values on i210/i211 */
6685                 if ((hw->mac.type != e1000_i210) &&
6686                     (hw->mac.type != e1000_i211))
6687                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6688         }
6689
6690         adapter->stats.tsctc += rd32(E1000_TSCTC);
6691         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6692
6693         adapter->stats.iac += rd32(E1000_IAC);
6694         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6695         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6696         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6697         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6698         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6699         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6700         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6701         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6702
6703         /* Fill out the OS statistics structure */
6704         net_stats->multicast = adapter->stats.mprc;
6705         net_stats->collisions = adapter->stats.colc;
6706
6707         /* Rx Errors */
6708
6709         /* RLEC on some newer hardware can be incorrect so build
6710          * our own version based on RUC and ROC
6711          */
6712         net_stats->rx_errors = adapter->stats.rxerrc +
6713                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6714                 adapter->stats.ruc + adapter->stats.roc +
6715                 adapter->stats.cexterr;
6716         net_stats->rx_length_errors = adapter->stats.ruc +
6717                                       adapter->stats.roc;
6718         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6719         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6720         net_stats->rx_missed_errors = adapter->stats.mpc;
6721
6722         /* Tx Errors */
6723         net_stats->tx_errors = adapter->stats.ecol +
6724                                adapter->stats.latecol;
6725         net_stats->tx_aborted_errors = adapter->stats.ecol;
6726         net_stats->tx_window_errors = adapter->stats.latecol;
6727         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6728
6729         /* Tx Dropped needs to be maintained elsewhere */
6730
6731         /* Management Stats */
6732         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6733         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6734         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6735
6736         /* OS2BMC Stats */
6737         reg = rd32(E1000_MANC);
6738         if (reg & E1000_MANC_EN_BMC2OS) {
6739                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6740                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6741                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6742                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6743         }
6744 }
6745
6746 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6747 {
6748         struct e1000_hw *hw = &adapter->hw;
6749         struct ptp_clock_event event;
6750         struct timespec64 ts;
6751         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
6752
6753         if (tsicr & TSINTR_SYS_WRAP) {
6754                 event.type = PTP_CLOCK_PPS;
6755                 if (adapter->ptp_caps.pps)
6756                         ptp_clock_event(adapter->ptp_clock, &event);
6757                 ack |= TSINTR_SYS_WRAP;
6758         }
6759
6760         if (tsicr & E1000_TSICR_TXTS) {
6761                 /* retrieve hardware timestamp */
6762                 schedule_work(&adapter->ptp_tx_work);
6763                 ack |= E1000_TSICR_TXTS;
6764         }
6765
6766         if (tsicr & TSINTR_TT0) {
6767                 spin_lock(&adapter->tmreg_lock);
6768                 ts = timespec64_add(adapter->perout[0].start,
6769                                     adapter->perout[0].period);
6770                 /* u32 conversion of tv_sec is safe until y2106 */
6771                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
6772                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
6773                 tsauxc = rd32(E1000_TSAUXC);
6774                 tsauxc |= TSAUXC_EN_TT0;
6775                 wr32(E1000_TSAUXC, tsauxc);
6776                 adapter->perout[0].start = ts;
6777                 spin_unlock(&adapter->tmreg_lock);
6778                 ack |= TSINTR_TT0;
6779         }
6780
6781         if (tsicr & TSINTR_TT1) {
6782                 spin_lock(&adapter->tmreg_lock);
6783                 ts = timespec64_add(adapter->perout[1].start,
6784                                     adapter->perout[1].period);
6785                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
6786                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
6787                 tsauxc = rd32(E1000_TSAUXC);
6788                 tsauxc |= TSAUXC_EN_TT1;
6789                 wr32(E1000_TSAUXC, tsauxc);
6790                 adapter->perout[1].start = ts;
6791                 spin_unlock(&adapter->tmreg_lock);
6792                 ack |= TSINTR_TT1;
6793         }
6794
6795         if (tsicr & TSINTR_AUTT0) {
6796                 nsec = rd32(E1000_AUXSTMPL0);
6797                 sec  = rd32(E1000_AUXSTMPH0);
6798                 event.type = PTP_CLOCK_EXTTS;
6799                 event.index = 0;
6800                 event.timestamp = sec * 1000000000ULL + nsec;
6801                 ptp_clock_event(adapter->ptp_clock, &event);
6802                 ack |= TSINTR_AUTT0;
6803         }
6804
6805         if (tsicr & TSINTR_AUTT1) {
6806                 nsec = rd32(E1000_AUXSTMPL1);
6807                 sec  = rd32(E1000_AUXSTMPH1);
6808                 event.type = PTP_CLOCK_EXTTS;
6809                 event.index = 1;
6810                 event.timestamp = sec * 1000000000ULL + nsec;
6811                 ptp_clock_event(adapter->ptp_clock, &event);
6812                 ack |= TSINTR_AUTT1;
6813         }
6814
6815         /* acknowledge the interrupts */
6816         wr32(E1000_TSICR, ack);
6817 }
6818
6819 static irqreturn_t igb_msix_other(int irq, void *data)
6820 {
6821         struct igb_adapter *adapter = data;
6822         struct e1000_hw *hw = &adapter->hw;
6823         u32 icr = rd32(E1000_ICR);
6824         /* reading ICR causes bit 31 of EICR to be cleared */
6825
6826         if (icr & E1000_ICR_DRSTA)
6827                 schedule_work(&adapter->reset_task);
6828
6829         if (icr & E1000_ICR_DOUTSYNC) {
6830                 /* HW is reporting DMA is out of sync */
6831                 adapter->stats.doosync++;
6832                 /* The DMA Out of Sync is also indication of a spoof event
6833                  * in IOV mode. Check the Wrong VM Behavior register to
6834                  * see if it is really a spoof event.
6835                  */
6836                 igb_check_wvbr(adapter);
6837         }
6838
6839         /* Check for a mailbox event */
6840         if (icr & E1000_ICR_VMMB)
6841                 igb_msg_task(adapter);
6842
6843         if (icr & E1000_ICR_LSC) {
6844                 hw->mac.get_link_status = 1;
6845                 /* guard against interrupt when we're going down */
6846                 if (!test_bit(__IGB_DOWN, &adapter->state))
6847                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6848         }
6849
6850         if (icr & E1000_ICR_TS)
6851                 igb_tsync_interrupt(adapter);
6852
6853         wr32(E1000_EIMS, adapter->eims_other);
6854
6855         return IRQ_HANDLED;
6856 }
6857
6858 static void igb_write_itr(struct igb_q_vector *q_vector)
6859 {
6860         struct igb_adapter *adapter = q_vector->adapter;
6861         u32 itr_val = q_vector->itr_val & 0x7FFC;
6862
6863         if (!q_vector->set_itr)
6864                 return;
6865
6866         if (!itr_val)
6867                 itr_val = 0x4;
6868
6869         if (adapter->hw.mac.type == e1000_82575)
6870                 itr_val |= itr_val << 16;
6871         else
6872                 itr_val |= E1000_EITR_CNT_IGNR;
6873
6874         writel(itr_val, q_vector->itr_register);
6875         q_vector->set_itr = 0;
6876 }
6877
6878 static irqreturn_t igb_msix_ring(int irq, void *data)
6879 {
6880         struct igb_q_vector *q_vector = data;
6881
6882         /* Write the ITR value calculated from the previous interrupt. */
6883         igb_write_itr(q_vector);
6884
6885         napi_schedule(&q_vector->napi);
6886
6887         return IRQ_HANDLED;
6888 }
6889
6890 #ifdef CONFIG_IGB_DCA
6891 static void igb_update_tx_dca(struct igb_adapter *adapter,
6892                               struct igb_ring *tx_ring,
6893                               int cpu)
6894 {
6895         struct e1000_hw *hw = &adapter->hw;
6896         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6897
6898         if (hw->mac.type != e1000_82575)
6899                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
6900
6901         /* We can enable relaxed ordering for reads, but not writes when
6902          * DCA is enabled.  This is due to a known issue in some chipsets
6903          * which will cause the DCA tag to be cleared.
6904          */
6905         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6906                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6907                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6908
6909         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6910 }
6911
6912 static void igb_update_rx_dca(struct igb_adapter *adapter,
6913                               struct igb_ring *rx_ring,
6914                               int cpu)
6915 {
6916         struct e1000_hw *hw = &adapter->hw;
6917         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6918
6919         if (hw->mac.type != e1000_82575)
6920                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
6921
6922         /* We can enable relaxed ordering for reads, but not writes when
6923          * DCA is enabled.  This is due to a known issue in some chipsets
6924          * which will cause the DCA tag to be cleared.
6925          */
6926         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6927                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6928
6929         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6930 }
6931
6932 static void igb_update_dca(struct igb_q_vector *q_vector)
6933 {
6934         struct igb_adapter *adapter = q_vector->adapter;
6935         int cpu = get_cpu();
6936
6937         if (q_vector->cpu == cpu)
6938                 goto out_no_update;
6939
6940         if (q_vector->tx.ring)
6941                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6942
6943         if (q_vector->rx.ring)
6944                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6945
6946         q_vector->cpu = cpu;
6947 out_no_update:
6948         put_cpu();
6949 }
6950
6951 static void igb_setup_dca(struct igb_adapter *adapter)
6952 {
6953         struct e1000_hw *hw = &adapter->hw;
6954         int i;
6955
6956         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6957                 return;
6958
6959         /* Always use CB2 mode, difference is masked in the CB driver. */
6960         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6961
6962         for (i = 0; i < adapter->num_q_vectors; i++) {
6963                 adapter->q_vector[i]->cpu = -1;
6964                 igb_update_dca(adapter->q_vector[i]);
6965         }
6966 }
6967
6968 static int __igb_notify_dca(struct device *dev, void *data)
6969 {
6970         struct net_device *netdev = dev_get_drvdata(dev);
6971         struct igb_adapter *adapter = netdev_priv(netdev);
6972         struct pci_dev *pdev = adapter->pdev;
6973         struct e1000_hw *hw = &adapter->hw;
6974         unsigned long event = *(unsigned long *)data;
6975
6976         switch (event) {
6977         case DCA_PROVIDER_ADD:
6978                 /* if already enabled, don't do it again */
6979                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6980                         break;
6981                 if (dca_add_requester(dev) == 0) {
6982                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6983                         dev_info(&pdev->dev, "DCA enabled\n");
6984                         igb_setup_dca(adapter);
6985                         break;
6986                 }
6987                 fallthrough; /* since DCA is disabled. */
6988         case DCA_PROVIDER_REMOVE:
6989                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6990                         /* without this a class_device is left
6991                          * hanging around in the sysfs model
6992                          */
6993                         dca_remove_requester(dev);
6994                         dev_info(&pdev->dev, "DCA disabled\n");
6995                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6996                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
6997                 }
6998                 break;
6999         }
7000
7001         return 0;
7002 }
7003
7004 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
7005                           void *p)
7006 {
7007         int ret_val;
7008
7009         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
7010                                          __igb_notify_dca);
7011
7012         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7013 }
7014 #endif /* CONFIG_IGB_DCA */
7015
7016 #ifdef CONFIG_PCI_IOV
7017 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
7018 {
7019         unsigned char mac_addr[ETH_ALEN];
7020
7021         eth_zero_addr(mac_addr);
7022         igb_set_vf_mac(adapter, vf, mac_addr);
7023
7024         /* By default spoof check is enabled for all VFs */
7025         adapter->vf_data[vf].spoofchk_enabled = true;
7026
7027         /* By default VFs are not trusted */
7028         adapter->vf_data[vf].trusted = false;
7029
7030         return 0;
7031 }
7032
7033 #endif
7034 static void igb_ping_all_vfs(struct igb_adapter *adapter)
7035 {
7036         struct e1000_hw *hw = &adapter->hw;
7037         u32 ping;
7038         int i;
7039
7040         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
7041                 ping = E1000_PF_CONTROL_MSG;
7042                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
7043                         ping |= E1000_VT_MSGTYPE_CTS;
7044                 igb_write_mbx(hw, &ping, 1, i);
7045         }
7046 }
7047
7048 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7049 {
7050         struct e1000_hw *hw = &adapter->hw;
7051         u32 vmolr = rd32(E1000_VMOLR(vf));
7052         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7053
7054         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
7055                             IGB_VF_FLAG_MULTI_PROMISC);
7056         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7057
7058         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
7059                 vmolr |= E1000_VMOLR_MPME;
7060                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
7061                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
7062         } else {
7063                 /* if we have hashes and we are clearing a multicast promisc
7064                  * flag we need to write the hashes to the MTA as this step
7065                  * was previously skipped
7066                  */
7067                 if (vf_data->num_vf_mc_hashes > 30) {
7068                         vmolr |= E1000_VMOLR_MPME;
7069                 } else if (vf_data->num_vf_mc_hashes) {
7070                         int j;
7071
7072                         vmolr |= E1000_VMOLR_ROMPE;
7073                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7074                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7075                 }
7076         }
7077
7078         wr32(E1000_VMOLR(vf), vmolr);
7079
7080         /* there are flags left unprocessed, likely not supported */
7081         if (*msgbuf & E1000_VT_MSGINFO_MASK)
7082                 return -EINVAL;
7083
7084         return 0;
7085 }
7086
7087 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
7088                                   u32 *msgbuf, u32 vf)
7089 {
7090         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7091         u16 *hash_list = (u16 *)&msgbuf[1];
7092         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7093         int i;
7094
7095         /* salt away the number of multicast addresses assigned
7096          * to this VF for later use to restore when the PF multi cast
7097          * list changes
7098          */
7099         vf_data->num_vf_mc_hashes = n;
7100
7101         /* only up to 30 hash values supported */
7102         if (n > 30)
7103                 n = 30;
7104
7105         /* store the hashes for later use */
7106         for (i = 0; i < n; i++)
7107                 vf_data->vf_mc_hashes[i] = hash_list[i];
7108
7109         /* Flush and reset the mta with the new values */
7110         igb_set_rx_mode(adapter->netdev);
7111
7112         return 0;
7113 }
7114
7115 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
7116 {
7117         struct e1000_hw *hw = &adapter->hw;
7118         struct vf_data_storage *vf_data;
7119         int i, j;
7120
7121         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7122                 u32 vmolr = rd32(E1000_VMOLR(i));
7123
7124                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7125
7126                 vf_data = &adapter->vf_data[i];
7127
7128                 if ((vf_data->num_vf_mc_hashes > 30) ||
7129                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
7130                         vmolr |= E1000_VMOLR_MPME;
7131                 } else if (vf_data->num_vf_mc_hashes) {
7132                         vmolr |= E1000_VMOLR_ROMPE;
7133                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7134                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7135                 }
7136                 wr32(E1000_VMOLR(i), vmolr);
7137         }
7138 }
7139
7140 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
7141 {
7142         struct e1000_hw *hw = &adapter->hw;
7143         u32 pool_mask, vlvf_mask, i;
7144
7145         /* create mask for VF and other pools */
7146         pool_mask = E1000_VLVF_POOLSEL_MASK;
7147         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
7148
7149         /* drop PF from pool bits */
7150         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
7151                              adapter->vfs_allocated_count);
7152
7153         /* Find the vlan filter for this id */
7154         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
7155                 u32 vlvf = rd32(E1000_VLVF(i));
7156                 u32 vfta_mask, vid, vfta;
7157
7158                 /* remove the vf from the pool */
7159                 if (!(vlvf & vlvf_mask))
7160                         continue;
7161
7162                 /* clear out bit from VLVF */
7163                 vlvf ^= vlvf_mask;
7164
7165                 /* if other pools are present, just remove ourselves */
7166                 if (vlvf & pool_mask)
7167                         goto update_vlvfb;
7168
7169                 /* if PF is present, leave VFTA */
7170                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
7171                         goto update_vlvf;
7172
7173                 vid = vlvf & E1000_VLVF_VLANID_MASK;
7174                 vfta_mask = BIT(vid % 32);
7175
7176                 /* clear bit from VFTA */
7177                 vfta = adapter->shadow_vfta[vid / 32];
7178                 if (vfta & vfta_mask)
7179                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
7180 update_vlvf:
7181                 /* clear pool selection enable */
7182                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7183                         vlvf &= E1000_VLVF_POOLSEL_MASK;
7184                 else
7185                         vlvf = 0;
7186 update_vlvfb:
7187                 /* clear pool bits */
7188                 wr32(E1000_VLVF(i), vlvf);
7189         }
7190 }
7191
7192 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
7193 {
7194         u32 vlvf;
7195         int idx;
7196
7197         /* short cut the special case */
7198         if (vlan == 0)
7199                 return 0;
7200
7201         /* Search for the VLAN id in the VLVF entries */
7202         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
7203                 vlvf = rd32(E1000_VLVF(idx));
7204                 if ((vlvf & VLAN_VID_MASK) == vlan)
7205                         break;
7206         }
7207
7208         return idx;
7209 }
7210
7211 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
7212 {
7213         struct e1000_hw *hw = &adapter->hw;
7214         u32 bits, pf_id;
7215         int idx;
7216
7217         idx = igb_find_vlvf_entry(hw, vid);
7218         if (!idx)
7219                 return;
7220
7221         /* See if any other pools are set for this VLAN filter
7222          * entry other than the PF.
7223          */
7224         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
7225         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
7226         bits &= rd32(E1000_VLVF(idx));
7227
7228         /* Disable the filter so this falls into the default pool. */
7229         if (!bits) {
7230                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7231                         wr32(E1000_VLVF(idx), BIT(pf_id));
7232                 else
7233                         wr32(E1000_VLVF(idx), 0);
7234         }
7235 }
7236
7237 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
7238                            bool add, u32 vf)
7239 {
7240         int pf_id = adapter->vfs_allocated_count;
7241         struct e1000_hw *hw = &adapter->hw;
7242         int err;
7243
7244         /* If VLAN overlaps with one the PF is currently monitoring make
7245          * sure that we are able to allocate a VLVF entry.  This may be
7246          * redundant but it guarantees PF will maintain visibility to
7247          * the VLAN.
7248          */
7249         if (add && test_bit(vid, adapter->active_vlans)) {
7250                 err = igb_vfta_set(hw, vid, pf_id, true, false);
7251                 if (err)
7252                         return err;
7253         }
7254
7255         err = igb_vfta_set(hw, vid, vf, add, false);
7256
7257         if (add && !err)
7258                 return err;
7259
7260         /* If we failed to add the VF VLAN or we are removing the VF VLAN
7261          * we may need to drop the PF pool bit in order to allow us to free
7262          * up the VLVF resources.
7263          */
7264         if (test_bit(vid, adapter->active_vlans) ||
7265             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
7266                 igb_update_pf_vlvf(adapter, vid);
7267
7268         return err;
7269 }
7270
7271 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7272 {
7273         struct e1000_hw *hw = &adapter->hw;
7274
7275         if (vid)
7276                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7277         else
7278                 wr32(E1000_VMVIR(vf), 0);
7279 }
7280
7281 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7282                                 u16 vlan, u8 qos)
7283 {
7284         int err;
7285
7286         err = igb_set_vf_vlan(adapter, vlan, true, vf);
7287         if (err)
7288                 return err;
7289
7290         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7291         igb_set_vmolr(adapter, vf, !vlan);
7292
7293         /* revoke access to previous VLAN */
7294         if (vlan != adapter->vf_data[vf].pf_vlan)
7295                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7296                                 false, vf);
7297
7298         adapter->vf_data[vf].pf_vlan = vlan;
7299         adapter->vf_data[vf].pf_qos = qos;
7300         igb_set_vf_vlan_strip(adapter, vf, true);
7301         dev_info(&adapter->pdev->dev,
7302                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7303         if (test_bit(__IGB_DOWN, &adapter->state)) {
7304                 dev_warn(&adapter->pdev->dev,
7305                          "The VF VLAN has been set, but the PF device is not up.\n");
7306                 dev_warn(&adapter->pdev->dev,
7307                          "Bring the PF device up before attempting to use the VF device.\n");
7308         }
7309
7310         return err;
7311 }
7312
7313 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7314 {
7315         /* Restore tagless access via VLAN 0 */
7316         igb_set_vf_vlan(adapter, 0, true, vf);
7317
7318         igb_set_vmvir(adapter, 0, vf);
7319         igb_set_vmolr(adapter, vf, true);
7320
7321         /* Remove any PF assigned VLAN */
7322         if (adapter->vf_data[vf].pf_vlan)
7323                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7324                                 false, vf);
7325
7326         adapter->vf_data[vf].pf_vlan = 0;
7327         adapter->vf_data[vf].pf_qos = 0;
7328         igb_set_vf_vlan_strip(adapter, vf, false);
7329
7330         return 0;
7331 }
7332
7333 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7334                                u16 vlan, u8 qos, __be16 vlan_proto)
7335 {
7336         struct igb_adapter *adapter = netdev_priv(netdev);
7337
7338         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7339                 return -EINVAL;
7340
7341         if (vlan_proto != htons(ETH_P_8021Q))
7342                 return -EPROTONOSUPPORT;
7343
7344         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7345                                igb_disable_port_vlan(adapter, vf);
7346 }
7347
7348 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7349 {
7350         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7351         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7352         int ret;
7353
7354         if (adapter->vf_data[vf].pf_vlan)
7355                 return -1;
7356
7357         /* VLAN 0 is a special case, don't allow it to be removed */
7358         if (!vid && !add)
7359                 return 0;
7360
7361         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7362         if (!ret)
7363                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7364         return ret;
7365 }
7366
7367 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7368 {
7369         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7370
7371         /* clear flags - except flag that indicates PF has set the MAC */
7372         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7373         vf_data->last_nack = jiffies;
7374
7375         /* reset vlans for device */
7376         igb_clear_vf_vfta(adapter, vf);
7377         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7378         igb_set_vmvir(adapter, vf_data->pf_vlan |
7379                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7380         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7381         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7382
7383         /* reset multicast table array for vf */
7384         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7385
7386         /* Flush and reset the mta with the new values */
7387         igb_set_rx_mode(adapter->netdev);
7388 }
7389
7390 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7391 {
7392         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7393
7394         /* clear mac address as we were hotplug removed/added */
7395         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7396                 eth_zero_addr(vf_mac);
7397
7398         /* process remaining reset events */
7399         igb_vf_reset(adapter, vf);
7400 }
7401
7402 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7403 {
7404         struct e1000_hw *hw = &adapter->hw;
7405         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7406         u32 reg, msgbuf[3];
7407         u8 *addr = (u8 *)(&msgbuf[1]);
7408
7409         /* process all the same items cleared in a function level reset */
7410         igb_vf_reset(adapter, vf);
7411
7412         /* set vf mac address */
7413         igb_set_vf_mac(adapter, vf, vf_mac);
7414
7415         /* enable transmit and receive for vf */
7416         reg = rd32(E1000_VFTE);
7417         wr32(E1000_VFTE, reg | BIT(vf));
7418         reg = rd32(E1000_VFRE);
7419         wr32(E1000_VFRE, reg | BIT(vf));
7420
7421         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7422
7423         /* reply to reset with ack and vf mac address */
7424         if (!is_zero_ether_addr(vf_mac)) {
7425                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7426                 memcpy(addr, vf_mac, ETH_ALEN);
7427         } else {
7428                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7429         }
7430         igb_write_mbx(hw, msgbuf, 3, vf);
7431 }
7432
7433 static void igb_flush_mac_table(struct igb_adapter *adapter)
7434 {
7435         struct e1000_hw *hw = &adapter->hw;
7436         int i;
7437
7438         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7439                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7440                 eth_zero_addr(adapter->mac_table[i].addr);
7441                 adapter->mac_table[i].queue = 0;
7442                 igb_rar_set_index(adapter, i);
7443         }
7444 }
7445
7446 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7447 {
7448         struct e1000_hw *hw = &adapter->hw;
7449         /* do not count rar entries reserved for VFs MAC addresses */
7450         int rar_entries = hw->mac.rar_entry_count -
7451                           adapter->vfs_allocated_count;
7452         int i, count = 0;
7453
7454         for (i = 0; i < rar_entries; i++) {
7455                 /* do not count default entries */
7456                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7457                         continue;
7458
7459                 /* do not count "in use" entries for different queues */
7460                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7461                     (adapter->mac_table[i].queue != queue))
7462                         continue;
7463
7464                 count++;
7465         }
7466
7467         return count;
7468 }
7469
7470 /* Set default MAC address for the PF in the first RAR entry */
7471 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7472 {
7473         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7474
7475         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7476         mac_table->queue = adapter->vfs_allocated_count;
7477         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7478
7479         igb_rar_set_index(adapter, 0);
7480 }
7481
7482 /* If the filter to be added and an already existing filter express
7483  * the same address and address type, it should be possible to only
7484  * override the other configurations, for example the queue to steer
7485  * traffic.
7486  */
7487 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7488                                       const u8 *addr, const u8 flags)
7489 {
7490         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7491                 return true;
7492
7493         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7494             (flags & IGB_MAC_STATE_SRC_ADDR))
7495                 return false;
7496
7497         if (!ether_addr_equal(addr, entry->addr))
7498                 return false;
7499
7500         return true;
7501 }
7502
7503 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7504  * 'flags' is used to indicate what kind of match is made, match is by
7505  * default for the destination address, if matching by source address
7506  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7507  */
7508 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7509                                     const u8 *addr, const u8 queue,
7510                                     const u8 flags)
7511 {
7512         struct e1000_hw *hw = &adapter->hw;
7513         int rar_entries = hw->mac.rar_entry_count -
7514                           adapter->vfs_allocated_count;
7515         int i;
7516
7517         if (is_zero_ether_addr(addr))
7518                 return -EINVAL;
7519
7520         /* Search for the first empty entry in the MAC table.
7521          * Do not touch entries at the end of the table reserved for the VF MAC
7522          * addresses.
7523          */
7524         for (i = 0; i < rar_entries; i++) {
7525                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7526                                                addr, flags))
7527                         continue;
7528
7529                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7530                 adapter->mac_table[i].queue = queue;
7531                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7532
7533                 igb_rar_set_index(adapter, i);
7534                 return i;
7535         }
7536
7537         return -ENOSPC;
7538 }
7539
7540 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7541                               const u8 queue)
7542 {
7543         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7544 }
7545
7546 /* Remove a MAC filter for 'addr' directing matching traffic to
7547  * 'queue', 'flags' is used to indicate what kind of match need to be
7548  * removed, match is by default for the destination address, if
7549  * matching by source address is to be removed the flag
7550  * IGB_MAC_STATE_SRC_ADDR can be used.
7551  */
7552 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7553                                     const u8 *addr, const u8 queue,
7554                                     const u8 flags)
7555 {
7556         struct e1000_hw *hw = &adapter->hw;
7557         int rar_entries = hw->mac.rar_entry_count -
7558                           adapter->vfs_allocated_count;
7559         int i;
7560
7561         if (is_zero_ether_addr(addr))
7562                 return -EINVAL;
7563
7564         /* Search for matching entry in the MAC table based on given address
7565          * and queue. Do not touch entries at the end of the table reserved
7566          * for the VF MAC addresses.
7567          */
7568         for (i = 0; i < rar_entries; i++) {
7569                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7570                         continue;
7571                 if ((adapter->mac_table[i].state & flags) != flags)
7572                         continue;
7573                 if (adapter->mac_table[i].queue != queue)
7574                         continue;
7575                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7576                         continue;
7577
7578                 /* When a filter for the default address is "deleted",
7579                  * we return it to its initial configuration
7580                  */
7581                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7582                         adapter->mac_table[i].state =
7583                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7584                         adapter->mac_table[i].queue =
7585                                 adapter->vfs_allocated_count;
7586                 } else {
7587                         adapter->mac_table[i].state = 0;
7588                         adapter->mac_table[i].queue = 0;
7589                         eth_zero_addr(adapter->mac_table[i].addr);
7590                 }
7591
7592                 igb_rar_set_index(adapter, i);
7593                 return 0;
7594         }
7595
7596         return -ENOENT;
7597 }
7598
7599 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7600                               const u8 queue)
7601 {
7602         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7603 }
7604
7605 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7606                                 const u8 *addr, u8 queue, u8 flags)
7607 {
7608         struct e1000_hw *hw = &adapter->hw;
7609
7610         /* In theory, this should be supported on 82575 as well, but
7611          * that part wasn't easily accessible during development.
7612          */
7613         if (hw->mac.type != e1000_i210)
7614                 return -EOPNOTSUPP;
7615
7616         return igb_add_mac_filter_flags(adapter, addr, queue,
7617                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7618 }
7619
7620 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7621                                 const u8 *addr, u8 queue, u8 flags)
7622 {
7623         return igb_del_mac_filter_flags(adapter, addr, queue,
7624                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7625 }
7626
7627 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7628 {
7629         struct igb_adapter *adapter = netdev_priv(netdev);
7630         int ret;
7631
7632         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7633
7634         return min_t(int, ret, 0);
7635 }
7636
7637 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7638 {
7639         struct igb_adapter *adapter = netdev_priv(netdev);
7640
7641         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7642
7643         return 0;
7644 }
7645
7646 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7647                                  const u32 info, const u8 *addr)
7648 {
7649         struct pci_dev *pdev = adapter->pdev;
7650         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7651         struct list_head *pos;
7652         struct vf_mac_filter *entry = NULL;
7653         int ret = 0;
7654
7655         if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7656             !vf_data->trusted) {
7657                 dev_warn(&pdev->dev,
7658                          "VF %d requested MAC filter but is administratively denied\n",
7659                           vf);
7660                 return -EINVAL;
7661         }
7662         if (!is_valid_ether_addr(addr)) {
7663                 dev_warn(&pdev->dev,
7664                          "VF %d attempted to set invalid MAC filter\n",
7665                           vf);
7666                 return -EINVAL;
7667         }
7668
7669         switch (info) {
7670         case E1000_VF_MAC_FILTER_CLR:
7671                 /* remove all unicast MAC filters related to the current VF */
7672                 list_for_each(pos, &adapter->vf_macs.l) {
7673                         entry = list_entry(pos, struct vf_mac_filter, l);
7674                         if (entry->vf == vf) {
7675                                 entry->vf = -1;
7676                                 entry->free = true;
7677                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7678                         }
7679                 }
7680                 break;
7681         case E1000_VF_MAC_FILTER_ADD:
7682                 /* try to find empty slot in the list */
7683                 list_for_each(pos, &adapter->vf_macs.l) {
7684                         entry = list_entry(pos, struct vf_mac_filter, l);
7685                         if (entry->free)
7686                                 break;
7687                 }
7688
7689                 if (entry && entry->free) {
7690                         entry->free = false;
7691                         entry->vf = vf;
7692                         ether_addr_copy(entry->vf_mac, addr);
7693
7694                         ret = igb_add_mac_filter(adapter, addr, vf);
7695                         ret = min_t(int, ret, 0);
7696                 } else {
7697                         ret = -ENOSPC;
7698                 }
7699
7700                 if (ret == -ENOSPC)
7701                         dev_warn(&pdev->dev,
7702                                  "VF %d has requested MAC filter but there is no space for it\n",
7703                                  vf);
7704                 break;
7705         default:
7706                 ret = -EINVAL;
7707                 break;
7708         }
7709
7710         return ret;
7711 }
7712
7713 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7714 {
7715         struct pci_dev *pdev = adapter->pdev;
7716         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7717         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7718
7719         /* The VF MAC Address is stored in a packed array of bytes
7720          * starting at the second 32 bit word of the msg array
7721          */
7722         unsigned char *addr = (unsigned char *)&msg[1];
7723         int ret = 0;
7724
7725         if (!info) {
7726                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7727                     !vf_data->trusted) {
7728                         dev_warn(&pdev->dev,
7729                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7730                                  vf);
7731                         return -EINVAL;
7732                 }
7733
7734                 if (!is_valid_ether_addr(addr)) {
7735                         dev_warn(&pdev->dev,
7736                                  "VF %d attempted to set invalid MAC\n",
7737                                  vf);
7738                         return -EINVAL;
7739                 }
7740
7741                 ret = igb_set_vf_mac(adapter, vf, addr);
7742         } else {
7743                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7744         }
7745
7746         return ret;
7747 }
7748
7749 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7750 {
7751         struct e1000_hw *hw = &adapter->hw;
7752         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7753         u32 msg = E1000_VT_MSGTYPE_NACK;
7754
7755         /* if device isn't clear to send it shouldn't be reading either */
7756         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7757             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7758                 igb_write_mbx(hw, &msg, 1, vf);
7759                 vf_data->last_nack = jiffies;
7760         }
7761 }
7762
7763 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7764 {
7765         struct pci_dev *pdev = adapter->pdev;
7766         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7767         struct e1000_hw *hw = &adapter->hw;
7768         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7769         s32 retval;
7770
7771         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7772
7773         if (retval) {
7774                 /* if receive failed revoke VF CTS stats and restart init */
7775                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7776                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7777                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7778                         goto unlock;
7779                 goto out;
7780         }
7781
7782         /* this is a message we already processed, do nothing */
7783         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7784                 goto unlock;
7785
7786         /* until the vf completes a reset it should not be
7787          * allowed to start any configuration.
7788          */
7789         if (msgbuf[0] == E1000_VF_RESET) {
7790                 /* unlocks mailbox */
7791                 igb_vf_reset_msg(adapter, vf);
7792                 return;
7793         }
7794
7795         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7796                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7797                         goto unlock;
7798                 retval = -1;
7799                 goto out;
7800         }
7801
7802         switch ((msgbuf[0] & 0xFFFF)) {
7803         case E1000_VF_SET_MAC_ADDR:
7804                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7805                 break;
7806         case E1000_VF_SET_PROMISC:
7807                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7808                 break;
7809         case E1000_VF_SET_MULTICAST:
7810                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7811                 break;
7812         case E1000_VF_SET_LPE:
7813                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7814                 break;
7815         case E1000_VF_SET_VLAN:
7816                 retval = -1;
7817                 if (vf_data->pf_vlan)
7818                         dev_warn(&pdev->dev,
7819                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7820                                  vf);
7821                 else
7822                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7823                 break;
7824         default:
7825                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7826                 retval = -1;
7827                 break;
7828         }
7829
7830         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7831 out:
7832         /* notify the VF of the results of what it sent us */
7833         if (retval)
7834                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7835         else
7836                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7837
7838         /* unlocks mailbox */
7839         igb_write_mbx(hw, msgbuf, 1, vf);
7840         return;
7841
7842 unlock:
7843         igb_unlock_mbx(hw, vf);
7844 }
7845
7846 static void igb_msg_task(struct igb_adapter *adapter)
7847 {
7848         struct e1000_hw *hw = &adapter->hw;
7849         u32 vf;
7850
7851         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7852                 /* process any reset requests */
7853                 if (!igb_check_for_rst(hw, vf))
7854                         igb_vf_reset_event(adapter, vf);
7855
7856                 /* process any messages pending */
7857                 if (!igb_check_for_msg(hw, vf))
7858                         igb_rcv_msg_from_vf(adapter, vf);
7859
7860                 /* process any acks */
7861                 if (!igb_check_for_ack(hw, vf))
7862                         igb_rcv_ack_from_vf(adapter, vf);
7863         }
7864 }
7865
7866 /**
7867  *  igb_set_uta - Set unicast filter table address
7868  *  @adapter: board private structure
7869  *  @set: boolean indicating if we are setting or clearing bits
7870  *
7871  *  The unicast table address is a register array of 32-bit registers.
7872  *  The table is meant to be used in a way similar to how the MTA is used
7873  *  however due to certain limitations in the hardware it is necessary to
7874  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
7875  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
7876  **/
7877 static void igb_set_uta(struct igb_adapter *adapter, bool set)
7878 {
7879         struct e1000_hw *hw = &adapter->hw;
7880         u32 uta = set ? ~0 : 0;
7881         int i;
7882
7883         /* we only need to do this if VMDq is enabled */
7884         if (!adapter->vfs_allocated_count)
7885                 return;
7886
7887         for (i = hw->mac.uta_reg_count; i--;)
7888                 array_wr32(E1000_UTA, i, uta);
7889 }
7890
7891 /**
7892  *  igb_intr_msi - Interrupt Handler
7893  *  @irq: interrupt number
7894  *  @data: pointer to a network interface device structure
7895  **/
7896 static irqreturn_t igb_intr_msi(int irq, void *data)
7897 {
7898         struct igb_adapter *adapter = data;
7899         struct igb_q_vector *q_vector = adapter->q_vector[0];
7900         struct e1000_hw *hw = &adapter->hw;
7901         /* read ICR disables interrupts using IAM */
7902         u32 icr = rd32(E1000_ICR);
7903
7904         igb_write_itr(q_vector);
7905
7906         if (icr & E1000_ICR_DRSTA)
7907                 schedule_work(&adapter->reset_task);
7908
7909         if (icr & E1000_ICR_DOUTSYNC) {
7910                 /* HW is reporting DMA is out of sync */
7911                 adapter->stats.doosync++;
7912         }
7913
7914         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7915                 hw->mac.get_link_status = 1;
7916                 if (!test_bit(__IGB_DOWN, &adapter->state))
7917                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7918         }
7919
7920         if (icr & E1000_ICR_TS)
7921                 igb_tsync_interrupt(adapter);
7922
7923         napi_schedule(&q_vector->napi);
7924
7925         return IRQ_HANDLED;
7926 }
7927
7928 /**
7929  *  igb_intr - Legacy Interrupt Handler
7930  *  @irq: interrupt number
7931  *  @data: pointer to a network interface device structure
7932  **/
7933 static irqreturn_t igb_intr(int irq, void *data)
7934 {
7935         struct igb_adapter *adapter = data;
7936         struct igb_q_vector *q_vector = adapter->q_vector[0];
7937         struct e1000_hw *hw = &adapter->hw;
7938         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
7939          * need for the IMC write
7940          */
7941         u32 icr = rd32(E1000_ICR);
7942
7943         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
7944          * not set, then the adapter didn't send an interrupt
7945          */
7946         if (!(icr & E1000_ICR_INT_ASSERTED))
7947                 return IRQ_NONE;
7948
7949         igb_write_itr(q_vector);
7950
7951         if (icr & E1000_ICR_DRSTA)
7952                 schedule_work(&adapter->reset_task);
7953
7954         if (icr & E1000_ICR_DOUTSYNC) {
7955                 /* HW is reporting DMA is out of sync */
7956                 adapter->stats.doosync++;
7957         }
7958
7959         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7960                 hw->mac.get_link_status = 1;
7961                 /* guard against interrupt when we're going down */
7962                 if (!test_bit(__IGB_DOWN, &adapter->state))
7963                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7964         }
7965
7966         if (icr & E1000_ICR_TS)
7967                 igb_tsync_interrupt(adapter);
7968
7969         napi_schedule(&q_vector->napi);
7970
7971         return IRQ_HANDLED;
7972 }
7973
7974 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
7975 {
7976         struct igb_adapter *adapter = q_vector->adapter;
7977         struct e1000_hw *hw = &adapter->hw;
7978
7979         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
7980             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
7981                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
7982                         igb_set_itr(q_vector);
7983                 else
7984                         igb_update_ring_itr(q_vector);
7985         }
7986
7987         if (!test_bit(__IGB_DOWN, &adapter->state)) {
7988                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7989                         wr32(E1000_EIMS, q_vector->eims_value);
7990                 else
7991                         igb_irq_enable(adapter);
7992         }
7993 }
7994
7995 /**
7996  *  igb_poll - NAPI Rx polling callback
7997  *  @napi: napi polling structure
7998  *  @budget: count of how many packets we should handle
7999  **/
8000 static int igb_poll(struct napi_struct *napi, int budget)
8001 {
8002         struct igb_q_vector *q_vector = container_of(napi,
8003                                                      struct igb_q_vector,
8004                                                      napi);
8005         bool clean_complete = true;
8006         int work_done = 0;
8007
8008 #ifdef CONFIG_IGB_DCA
8009         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
8010                 igb_update_dca(q_vector);
8011 #endif
8012         if (q_vector->tx.ring)
8013                 clean_complete = igb_clean_tx_irq(q_vector, budget);
8014
8015         if (q_vector->rx.ring) {
8016                 int cleaned = igb_clean_rx_irq(q_vector, budget);
8017
8018                 work_done += cleaned;
8019                 if (cleaned >= budget)
8020                         clean_complete = false;
8021         }
8022
8023         /* If all work not completed, return budget and keep polling */
8024         if (!clean_complete)
8025                 return budget;
8026
8027         /* Exit the polling mode, but don't re-enable interrupts if stack might
8028          * poll us due to busy-polling
8029          */
8030         if (likely(napi_complete_done(napi, work_done)))
8031                 igb_ring_irq_enable(q_vector);
8032
8033         return work_done;
8034 }
8035
8036 /**
8037  *  igb_clean_tx_irq - Reclaim resources after transmit completes
8038  *  @q_vector: pointer to q_vector containing needed info
8039  *  @napi_budget: Used to determine if we are in netpoll
8040  *
8041  *  returns true if ring is completely cleaned
8042  **/
8043 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
8044 {
8045         struct igb_adapter *adapter = q_vector->adapter;
8046         struct igb_ring *tx_ring = q_vector->tx.ring;
8047         struct igb_tx_buffer *tx_buffer;
8048         union e1000_adv_tx_desc *tx_desc;
8049         unsigned int total_bytes = 0, total_packets = 0;
8050         unsigned int budget = q_vector->tx.work_limit;
8051         unsigned int i = tx_ring->next_to_clean;
8052
8053         if (test_bit(__IGB_DOWN, &adapter->state))
8054                 return true;
8055
8056         tx_buffer = &tx_ring->tx_buffer_info[i];
8057         tx_desc = IGB_TX_DESC(tx_ring, i);
8058         i -= tx_ring->count;
8059
8060         do {
8061                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
8062
8063                 /* if next_to_watch is not set then there is no work pending */
8064                 if (!eop_desc)
8065                         break;
8066
8067                 /* prevent any other reads prior to eop_desc */
8068                 smp_rmb();
8069
8070                 /* if DD is not set pending work has not been completed */
8071                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
8072                         break;
8073
8074                 /* clear next_to_watch to prevent false hangs */
8075                 tx_buffer->next_to_watch = NULL;
8076
8077                 /* update the statistics for this packet */
8078                 total_bytes += tx_buffer->bytecount;
8079                 total_packets += tx_buffer->gso_segs;
8080
8081                 /* free the skb */
8082                 if (tx_buffer->type == IGB_TYPE_SKB)
8083                         napi_consume_skb(tx_buffer->skb, napi_budget);
8084                 else
8085                         xdp_return_frame(tx_buffer->xdpf);
8086
8087                 /* unmap skb header data */
8088                 dma_unmap_single(tx_ring->dev,
8089                                  dma_unmap_addr(tx_buffer, dma),
8090                                  dma_unmap_len(tx_buffer, len),
8091                                  DMA_TO_DEVICE);
8092
8093                 /* clear tx_buffer data */
8094                 dma_unmap_len_set(tx_buffer, len, 0);
8095
8096                 /* clear last DMA location and unmap remaining buffers */
8097                 while (tx_desc != eop_desc) {
8098                         tx_buffer++;
8099                         tx_desc++;
8100                         i++;
8101                         if (unlikely(!i)) {
8102                                 i -= tx_ring->count;
8103                                 tx_buffer = tx_ring->tx_buffer_info;
8104                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
8105                         }
8106
8107                         /* unmap any remaining paged data */
8108                         if (dma_unmap_len(tx_buffer, len)) {
8109                                 dma_unmap_page(tx_ring->dev,
8110                                                dma_unmap_addr(tx_buffer, dma),
8111                                                dma_unmap_len(tx_buffer, len),
8112                                                DMA_TO_DEVICE);
8113                                 dma_unmap_len_set(tx_buffer, len, 0);
8114                         }
8115                 }
8116
8117                 /* move us one more past the eop_desc for start of next pkt */
8118                 tx_buffer++;
8119                 tx_desc++;
8120                 i++;
8121                 if (unlikely(!i)) {
8122                         i -= tx_ring->count;
8123                         tx_buffer = tx_ring->tx_buffer_info;
8124                         tx_desc = IGB_TX_DESC(tx_ring, 0);
8125                 }
8126
8127                 /* issue prefetch for next Tx descriptor */
8128                 prefetch(tx_desc);
8129
8130                 /* update budget accounting */
8131                 budget--;
8132         } while (likely(budget));
8133
8134         netdev_tx_completed_queue(txring_txq(tx_ring),
8135                                   total_packets, total_bytes);
8136         i += tx_ring->count;
8137         tx_ring->next_to_clean = i;
8138         u64_stats_update_begin(&tx_ring->tx_syncp);
8139         tx_ring->tx_stats.bytes += total_bytes;
8140         tx_ring->tx_stats.packets += total_packets;
8141         u64_stats_update_end(&tx_ring->tx_syncp);
8142         q_vector->tx.total_bytes += total_bytes;
8143         q_vector->tx.total_packets += total_packets;
8144
8145         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
8146                 struct e1000_hw *hw = &adapter->hw;
8147
8148                 /* Detect a transmit hang in hardware, this serializes the
8149                  * check with the clearing of time_stamp and movement of i
8150                  */
8151                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
8152                 if (tx_buffer->next_to_watch &&
8153                     time_after(jiffies, tx_buffer->time_stamp +
8154                                (adapter->tx_timeout_factor * HZ)) &&
8155                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
8156
8157                         /* detected Tx unit hang */
8158                         dev_err(tx_ring->dev,
8159                                 "Detected Tx Unit Hang\n"
8160                                 "  Tx Queue             <%d>\n"
8161                                 "  TDH                  <%x>\n"
8162                                 "  TDT                  <%x>\n"
8163                                 "  next_to_use          <%x>\n"
8164                                 "  next_to_clean        <%x>\n"
8165                                 "buffer_info[next_to_clean]\n"
8166                                 "  time_stamp           <%lx>\n"
8167                                 "  next_to_watch        <%p>\n"
8168                                 "  jiffies              <%lx>\n"
8169                                 "  desc.status          <%x>\n",
8170                                 tx_ring->queue_index,
8171                                 rd32(E1000_TDH(tx_ring->reg_idx)),
8172                                 readl(tx_ring->tail),
8173                                 tx_ring->next_to_use,
8174                                 tx_ring->next_to_clean,
8175                                 tx_buffer->time_stamp,
8176                                 tx_buffer->next_to_watch,
8177                                 jiffies,
8178                                 tx_buffer->next_to_watch->wb.status);
8179                         netif_stop_subqueue(tx_ring->netdev,
8180                                             tx_ring->queue_index);
8181
8182                         /* we are about to reset, no point in enabling stuff */
8183                         return true;
8184                 }
8185         }
8186
8187 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
8188         if (unlikely(total_packets &&
8189             netif_carrier_ok(tx_ring->netdev) &&
8190             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
8191                 /* Make sure that anybody stopping the queue after this
8192                  * sees the new next_to_clean.
8193                  */
8194                 smp_mb();
8195                 if (__netif_subqueue_stopped(tx_ring->netdev,
8196                                              tx_ring->queue_index) &&
8197                     !(test_bit(__IGB_DOWN, &adapter->state))) {
8198                         netif_wake_subqueue(tx_ring->netdev,
8199                                             tx_ring->queue_index);
8200
8201                         u64_stats_update_begin(&tx_ring->tx_syncp);
8202                         tx_ring->tx_stats.restart_queue++;
8203                         u64_stats_update_end(&tx_ring->tx_syncp);
8204                 }
8205         }
8206
8207         return !!budget;
8208 }
8209
8210 /**
8211  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
8212  *  @rx_ring: rx descriptor ring to store buffers on
8213  *  @old_buff: donor buffer to have page reused
8214  *
8215  *  Synchronizes page for reuse by the adapter
8216  **/
8217 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
8218                               struct igb_rx_buffer *old_buff)
8219 {
8220         struct igb_rx_buffer *new_buff;
8221         u16 nta = rx_ring->next_to_alloc;
8222
8223         new_buff = &rx_ring->rx_buffer_info[nta];
8224
8225         /* update, and store next to alloc */
8226         nta++;
8227         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
8228
8229         /* Transfer page from old buffer to new buffer.
8230          * Move each member individually to avoid possible store
8231          * forwarding stalls.
8232          */
8233         new_buff->dma           = old_buff->dma;
8234         new_buff->page          = old_buff->page;
8235         new_buff->page_offset   = old_buff->page_offset;
8236         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
8237 }
8238
8239 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
8240                                   int rx_buf_pgcnt)
8241 {
8242         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
8243         struct page *page = rx_buffer->page;
8244
8245         /* avoid re-using remote and pfmemalloc pages */
8246         if (!dev_page_is_reusable(page))
8247                 return false;
8248
8249 #if (PAGE_SIZE < 8192)
8250         /* if we are only owner of page we can reuse it */
8251         if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
8252                 return false;
8253 #else
8254 #define IGB_LAST_OFFSET \
8255         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
8256
8257         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
8258                 return false;
8259 #endif
8260
8261         /* If we have drained the page fragment pool we need to update
8262          * the pagecnt_bias and page count so that we fully restock the
8263          * number of references the driver holds.
8264          */
8265         if (unlikely(pagecnt_bias == 1)) {
8266                 page_ref_add(page, USHRT_MAX - 1);
8267                 rx_buffer->pagecnt_bias = USHRT_MAX;
8268         }
8269
8270         return true;
8271 }
8272
8273 /**
8274  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8275  *  @rx_ring: rx descriptor ring to transact packets on
8276  *  @rx_buffer: buffer containing page to add
8277  *  @skb: sk_buff to place the data into
8278  *  @size: size of buffer to be added
8279  *
8280  *  This function will add the data contained in rx_buffer->page to the skb.
8281  **/
8282 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8283                             struct igb_rx_buffer *rx_buffer,
8284                             struct sk_buff *skb,
8285                             unsigned int size)
8286 {
8287 #if (PAGE_SIZE < 8192)
8288         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8289 #else
8290         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8291                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8292                                 SKB_DATA_ALIGN(size);
8293 #endif
8294         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8295                         rx_buffer->page_offset, size, truesize);
8296 #if (PAGE_SIZE < 8192)
8297         rx_buffer->page_offset ^= truesize;
8298 #else
8299         rx_buffer->page_offset += truesize;
8300 #endif
8301 }
8302
8303 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8304                                          struct igb_rx_buffer *rx_buffer,
8305                                          struct xdp_buff *xdp,
8306                                          ktime_t timestamp)
8307 {
8308 #if (PAGE_SIZE < 8192)
8309         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8310 #else
8311         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
8312                                                xdp->data_hard_start);
8313 #endif
8314         unsigned int size = xdp->data_end - xdp->data;
8315         unsigned int headlen;
8316         struct sk_buff *skb;
8317
8318         /* prefetch first cache line of first page */
8319         net_prefetch(xdp->data);
8320
8321         /* allocate a skb to store the frags */
8322         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8323         if (unlikely(!skb))
8324                 return NULL;
8325
8326         if (timestamp)
8327                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8328
8329         /* Determine available headroom for copy */
8330         headlen = size;
8331         if (headlen > IGB_RX_HDR_LEN)
8332                 headlen = eth_get_headlen(skb->dev, xdp->data, IGB_RX_HDR_LEN);
8333
8334         /* align pull length to size of long to optimize memcpy performance */
8335         memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen, sizeof(long)));
8336
8337         /* update all of the pointers */
8338         size -= headlen;
8339         if (size) {
8340                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8341                                 (xdp->data + headlen) - page_address(rx_buffer->page),
8342                                 size, truesize);
8343 #if (PAGE_SIZE < 8192)
8344                 rx_buffer->page_offset ^= truesize;
8345 #else
8346                 rx_buffer->page_offset += truesize;
8347 #endif
8348         } else {
8349                 rx_buffer->pagecnt_bias++;
8350         }
8351
8352         return skb;
8353 }
8354
8355 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8356                                      struct igb_rx_buffer *rx_buffer,
8357                                      struct xdp_buff *xdp,
8358                                      ktime_t timestamp)
8359 {
8360 #if (PAGE_SIZE < 8192)
8361         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8362 #else
8363         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8364                                 SKB_DATA_ALIGN(xdp->data_end -
8365                                                xdp->data_hard_start);
8366 #endif
8367         unsigned int metasize = xdp->data - xdp->data_meta;
8368         struct sk_buff *skb;
8369
8370         /* prefetch first cache line of first page */
8371         net_prefetch(xdp->data_meta);
8372
8373         /* build an skb around the page buffer */
8374         skb = build_skb(xdp->data_hard_start, truesize);
8375         if (unlikely(!skb))
8376                 return NULL;
8377
8378         /* update pointers within the skb to store the data */
8379         skb_reserve(skb, xdp->data - xdp->data_hard_start);
8380         __skb_put(skb, xdp->data_end - xdp->data);
8381
8382         if (metasize)
8383                 skb_metadata_set(skb, metasize);
8384
8385         if (timestamp)
8386                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8387
8388         /* update buffer offset */
8389 #if (PAGE_SIZE < 8192)
8390         rx_buffer->page_offset ^= truesize;
8391 #else
8392         rx_buffer->page_offset += truesize;
8393 #endif
8394
8395         return skb;
8396 }
8397
8398 static struct sk_buff *igb_run_xdp(struct igb_adapter *adapter,
8399                                    struct igb_ring *rx_ring,
8400                                    struct xdp_buff *xdp)
8401 {
8402         int err, result = IGB_XDP_PASS;
8403         struct bpf_prog *xdp_prog;
8404         u32 act;
8405
8406         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
8407
8408         if (!xdp_prog)
8409                 goto xdp_out;
8410
8411         prefetchw(xdp->data_hard_start); /* xdp_frame write */
8412
8413         act = bpf_prog_run_xdp(xdp_prog, xdp);
8414         switch (act) {
8415         case XDP_PASS:
8416                 break;
8417         case XDP_TX:
8418                 result = igb_xdp_xmit_back(adapter, xdp);
8419                 if (result == IGB_XDP_CONSUMED)
8420                         goto out_failure;
8421                 break;
8422         case XDP_REDIRECT:
8423                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
8424                 if (err)
8425                         goto out_failure;
8426                 result = IGB_XDP_REDIR;
8427                 break;
8428         default:
8429                 bpf_warn_invalid_xdp_action(act);
8430                 fallthrough;
8431         case XDP_ABORTED:
8432 out_failure:
8433                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
8434                 fallthrough;
8435         case XDP_DROP:
8436                 result = IGB_XDP_CONSUMED;
8437                 break;
8438         }
8439 xdp_out:
8440         return ERR_PTR(-result);
8441 }
8442
8443 static unsigned int igb_rx_frame_truesize(struct igb_ring *rx_ring,
8444                                           unsigned int size)
8445 {
8446         unsigned int truesize;
8447
8448 #if (PAGE_SIZE < 8192)
8449         truesize = igb_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
8450 #else
8451         truesize = ring_uses_build_skb(rx_ring) ?
8452                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) +
8453                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
8454                 SKB_DATA_ALIGN(size);
8455 #endif
8456         return truesize;
8457 }
8458
8459 static void igb_rx_buffer_flip(struct igb_ring *rx_ring,
8460                                struct igb_rx_buffer *rx_buffer,
8461                                unsigned int size)
8462 {
8463         unsigned int truesize = igb_rx_frame_truesize(rx_ring, size);
8464 #if (PAGE_SIZE < 8192)
8465         rx_buffer->page_offset ^= truesize;
8466 #else
8467         rx_buffer->page_offset += truesize;
8468 #endif
8469 }
8470
8471 static inline void igb_rx_checksum(struct igb_ring *ring,
8472                                    union e1000_adv_rx_desc *rx_desc,
8473                                    struct sk_buff *skb)
8474 {
8475         skb_checksum_none_assert(skb);
8476
8477         /* Ignore Checksum bit is set */
8478         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8479                 return;
8480
8481         /* Rx checksum disabled via ethtool */
8482         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8483                 return;
8484
8485         /* TCP/UDP checksum error bit is set */
8486         if (igb_test_staterr(rx_desc,
8487                              E1000_RXDEXT_STATERR_TCPE |
8488                              E1000_RXDEXT_STATERR_IPE)) {
8489                 /* work around errata with sctp packets where the TCPE aka
8490                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8491                  * packets, (aka let the stack check the crc32c)
8492                  */
8493                 if (!((skb->len == 60) &&
8494                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8495                         u64_stats_update_begin(&ring->rx_syncp);
8496                         ring->rx_stats.csum_err++;
8497                         u64_stats_update_end(&ring->rx_syncp);
8498                 }
8499                 /* let the stack verify checksum errors */
8500                 return;
8501         }
8502         /* It must be a TCP or UDP packet with a valid checksum */
8503         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8504                                       E1000_RXD_STAT_UDPCS))
8505                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8506
8507         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8508                 le32_to_cpu(rx_desc->wb.upper.status_error));
8509 }
8510
8511 static inline void igb_rx_hash(struct igb_ring *ring,
8512                                union e1000_adv_rx_desc *rx_desc,
8513                                struct sk_buff *skb)
8514 {
8515         if (ring->netdev->features & NETIF_F_RXHASH)
8516                 skb_set_hash(skb,
8517                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8518                              PKT_HASH_TYPE_L3);
8519 }
8520
8521 /**
8522  *  igb_is_non_eop - process handling of non-EOP buffers
8523  *  @rx_ring: Rx ring being processed
8524  *  @rx_desc: Rx descriptor for current buffer
8525  *
8526  *  This function updates next to clean.  If the buffer is an EOP buffer
8527  *  this function exits returning false, otherwise it will place the
8528  *  sk_buff in the next buffer to be chained and return true indicating
8529  *  that this is in fact a non-EOP buffer.
8530  **/
8531 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8532                            union e1000_adv_rx_desc *rx_desc)
8533 {
8534         u32 ntc = rx_ring->next_to_clean + 1;
8535
8536         /* fetch, update, and store next to clean */
8537         ntc = (ntc < rx_ring->count) ? ntc : 0;
8538         rx_ring->next_to_clean = ntc;
8539
8540         prefetch(IGB_RX_DESC(rx_ring, ntc));
8541
8542         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8543                 return false;
8544
8545         return true;
8546 }
8547
8548 /**
8549  *  igb_cleanup_headers - Correct corrupted or empty headers
8550  *  @rx_ring: rx descriptor ring packet is being transacted on
8551  *  @rx_desc: pointer to the EOP Rx descriptor
8552  *  @skb: pointer to current skb being fixed
8553  *
8554  *  Address the case where we are pulling data in on pages only
8555  *  and as such no data is present in the skb header.
8556  *
8557  *  In addition if skb is not at least 60 bytes we need to pad it so that
8558  *  it is large enough to qualify as a valid Ethernet frame.
8559  *
8560  *  Returns true if an error was encountered and skb was freed.
8561  **/
8562 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8563                                 union e1000_adv_rx_desc *rx_desc,
8564                                 struct sk_buff *skb)
8565 {
8566         /* XDP packets use error pointer so abort at this point */
8567         if (IS_ERR(skb))
8568                 return true;
8569
8570         if (unlikely((igb_test_staterr(rx_desc,
8571                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8572                 struct net_device *netdev = rx_ring->netdev;
8573                 if (!(netdev->features & NETIF_F_RXALL)) {
8574                         dev_kfree_skb_any(skb);
8575                         return true;
8576                 }
8577         }
8578
8579         /* if eth_skb_pad returns an error the skb was freed */
8580         if (eth_skb_pad(skb))
8581                 return true;
8582
8583         return false;
8584 }
8585
8586 /**
8587  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8588  *  @rx_ring: rx descriptor ring packet is being transacted on
8589  *  @rx_desc: pointer to the EOP Rx descriptor
8590  *  @skb: pointer to current skb being populated
8591  *
8592  *  This function checks the ring, descriptor, and packet information in
8593  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8594  *  other fields within the skb.
8595  **/
8596 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8597                                    union e1000_adv_rx_desc *rx_desc,
8598                                    struct sk_buff *skb)
8599 {
8600         struct net_device *dev = rx_ring->netdev;
8601
8602         igb_rx_hash(rx_ring, rx_desc, skb);
8603
8604         igb_rx_checksum(rx_ring, rx_desc, skb);
8605
8606         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8607             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8608                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8609
8610         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8611             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8612                 u16 vid;
8613
8614                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8615                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8616                         vid = be16_to_cpu((__force __be16)rx_desc->wb.upper.vlan);
8617                 else
8618                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8619
8620                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8621         }
8622
8623         skb_record_rx_queue(skb, rx_ring->queue_index);
8624
8625         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8626 }
8627
8628 static unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8629 {
8630         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8631 }
8632
8633 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8634                                                const unsigned int size, int *rx_buf_pgcnt)
8635 {
8636         struct igb_rx_buffer *rx_buffer;
8637
8638         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8639         *rx_buf_pgcnt =
8640 #if (PAGE_SIZE < 8192)
8641                 page_count(rx_buffer->page);
8642 #else
8643                 0;
8644 #endif
8645         prefetchw(rx_buffer->page);
8646
8647         /* we are reusing so sync this buffer for CPU use */
8648         dma_sync_single_range_for_cpu(rx_ring->dev,
8649                                       rx_buffer->dma,
8650                                       rx_buffer->page_offset,
8651                                       size,
8652                                       DMA_FROM_DEVICE);
8653
8654         rx_buffer->pagecnt_bias--;
8655
8656         return rx_buffer;
8657 }
8658
8659 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8660                               struct igb_rx_buffer *rx_buffer, int rx_buf_pgcnt)
8661 {
8662         if (igb_can_reuse_rx_page(rx_buffer, rx_buf_pgcnt)) {
8663                 /* hand second half of page back to the ring */
8664                 igb_reuse_rx_page(rx_ring, rx_buffer);
8665         } else {
8666                 /* We are not reusing the buffer so unmap it and free
8667                  * any references we are holding to it
8668                  */
8669                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8670                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8671                                      IGB_RX_DMA_ATTR);
8672                 __page_frag_cache_drain(rx_buffer->page,
8673                                         rx_buffer->pagecnt_bias);
8674         }
8675
8676         /* clear contents of rx_buffer */
8677         rx_buffer->page = NULL;
8678 }
8679
8680 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8681 {
8682         struct igb_adapter *adapter = q_vector->adapter;
8683         struct igb_ring *rx_ring = q_vector->rx.ring;
8684         struct sk_buff *skb = rx_ring->skb;
8685         unsigned int total_bytes = 0, total_packets = 0;
8686         u16 cleaned_count = igb_desc_unused(rx_ring);
8687         unsigned int xdp_xmit = 0;
8688         struct xdp_buff xdp;
8689         u32 frame_sz = 0;
8690         int rx_buf_pgcnt;
8691
8692         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
8693 #if (PAGE_SIZE < 8192)
8694         frame_sz = igb_rx_frame_truesize(rx_ring, 0);
8695 #endif
8696         xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
8697
8698         while (likely(total_packets < budget)) {
8699                 union e1000_adv_rx_desc *rx_desc;
8700                 struct igb_rx_buffer *rx_buffer;
8701                 ktime_t timestamp = 0;
8702                 int pkt_offset = 0;
8703                 unsigned int size;
8704                 void *pktbuf;
8705
8706                 /* return some buffers to hardware, one at a time is too slow */
8707                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8708                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8709                         cleaned_count = 0;
8710                 }
8711
8712                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8713                 size = le16_to_cpu(rx_desc->wb.upper.length);
8714                 if (!size)
8715                         break;
8716
8717                 /* This memory barrier is needed to keep us from reading
8718                  * any other fields out of the rx_desc until we know the
8719                  * descriptor has been written back
8720                  */
8721                 dma_rmb();
8722
8723                 rx_buffer = igb_get_rx_buffer(rx_ring, size, &rx_buf_pgcnt);
8724                 pktbuf = page_address(rx_buffer->page) + rx_buffer->page_offset;
8725
8726                 /* pull rx packet timestamp if available and valid */
8727                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8728                         int ts_hdr_len;
8729
8730                         ts_hdr_len = igb_ptp_rx_pktstamp(rx_ring->q_vector,
8731                                                          pktbuf, &timestamp);
8732
8733                         pkt_offset += ts_hdr_len;
8734                         size -= ts_hdr_len;
8735                 }
8736
8737                 /* retrieve a buffer from the ring */
8738                 if (!skb) {
8739                         unsigned char *hard_start = pktbuf - igb_rx_offset(rx_ring);
8740                         unsigned int offset = pkt_offset + igb_rx_offset(rx_ring);
8741
8742                         xdp_prepare_buff(&xdp, hard_start, offset, size, true);
8743 #if (PAGE_SIZE > 4096)
8744                         /* At larger PAGE_SIZE, frame_sz depend on len size */
8745                         xdp.frame_sz = igb_rx_frame_truesize(rx_ring, size);
8746 #endif
8747                         skb = igb_run_xdp(adapter, rx_ring, &xdp);
8748                 }
8749
8750                 if (IS_ERR(skb)) {
8751                         unsigned int xdp_res = -PTR_ERR(skb);
8752
8753                         if (xdp_res & (IGB_XDP_TX | IGB_XDP_REDIR)) {
8754                                 xdp_xmit |= xdp_res;
8755                                 igb_rx_buffer_flip(rx_ring, rx_buffer, size);
8756                         } else {
8757                                 rx_buffer->pagecnt_bias++;
8758                         }
8759                         total_packets++;
8760                         total_bytes += size;
8761                 } else if (skb)
8762                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8763                 else if (ring_uses_build_skb(rx_ring))
8764                         skb = igb_build_skb(rx_ring, rx_buffer, &xdp,
8765                                             timestamp);
8766                 else
8767                         skb = igb_construct_skb(rx_ring, rx_buffer,
8768                                                 &xdp, timestamp);
8769
8770                 /* exit if we failed to retrieve a buffer */
8771                 if (!skb) {
8772                         rx_ring->rx_stats.alloc_failed++;
8773                         rx_buffer->pagecnt_bias++;
8774                         break;
8775                 }
8776
8777                 igb_put_rx_buffer(rx_ring, rx_buffer, rx_buf_pgcnt);
8778                 cleaned_count++;
8779
8780                 /* fetch next buffer in frame if non-eop */
8781                 if (igb_is_non_eop(rx_ring, rx_desc))
8782                         continue;
8783
8784                 /* verify the packet layout is correct */
8785                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8786                         skb = NULL;
8787                         continue;
8788                 }
8789
8790                 /* probably a little skewed due to removing CRC */
8791                 total_bytes += skb->len;
8792
8793                 /* populate checksum, timestamp, VLAN, and protocol */
8794                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8795
8796                 napi_gro_receive(&q_vector->napi, skb);
8797
8798                 /* reset skb pointer */
8799                 skb = NULL;
8800
8801                 /* update budget accounting */
8802                 total_packets++;
8803         }
8804
8805         /* place incomplete frames back on ring for completion */
8806         rx_ring->skb = skb;
8807
8808         if (xdp_xmit & IGB_XDP_REDIR)
8809                 xdp_do_flush();
8810
8811         if (xdp_xmit & IGB_XDP_TX) {
8812                 struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);
8813
8814                 igb_xdp_ring_update_tail(tx_ring);
8815         }
8816
8817         u64_stats_update_begin(&rx_ring->rx_syncp);
8818         rx_ring->rx_stats.packets += total_packets;
8819         rx_ring->rx_stats.bytes += total_bytes;
8820         u64_stats_update_end(&rx_ring->rx_syncp);
8821         q_vector->rx.total_packets += total_packets;
8822         q_vector->rx.total_bytes += total_bytes;
8823
8824         if (cleaned_count)
8825                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8826
8827         return total_packets;
8828 }
8829
8830 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8831                                   struct igb_rx_buffer *bi)
8832 {
8833         struct page *page = bi->page;
8834         dma_addr_t dma;
8835
8836         /* since we are recycling buffers we should seldom need to alloc */
8837         if (likely(page))
8838                 return true;
8839
8840         /* alloc new page for storage */
8841         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
8842         if (unlikely(!page)) {
8843                 rx_ring->rx_stats.alloc_failed++;
8844                 return false;
8845         }
8846
8847         /* map page for use */
8848         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
8849                                  igb_rx_pg_size(rx_ring),
8850                                  DMA_FROM_DEVICE,
8851                                  IGB_RX_DMA_ATTR);
8852
8853         /* if mapping failed free memory back to system since
8854          * there isn't much point in holding memory we can't use
8855          */
8856         if (dma_mapping_error(rx_ring->dev, dma)) {
8857                 __free_pages(page, igb_rx_pg_order(rx_ring));
8858
8859                 rx_ring->rx_stats.alloc_failed++;
8860                 return false;
8861         }
8862
8863         bi->dma = dma;
8864         bi->page = page;
8865         bi->page_offset = igb_rx_offset(rx_ring);
8866         page_ref_add(page, USHRT_MAX - 1);
8867         bi->pagecnt_bias = USHRT_MAX;
8868
8869         return true;
8870 }
8871
8872 /**
8873  *  igb_alloc_rx_buffers - Replace used receive buffers
8874  *  @rx_ring: rx descriptor ring to allocate new receive buffers
8875  *  @cleaned_count: count of buffers to allocate
8876  **/
8877 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8878 {
8879         union e1000_adv_rx_desc *rx_desc;
8880         struct igb_rx_buffer *bi;
8881         u16 i = rx_ring->next_to_use;
8882         u16 bufsz;
8883
8884         /* nothing to do */
8885         if (!cleaned_count)
8886                 return;
8887
8888         rx_desc = IGB_RX_DESC(rx_ring, i);
8889         bi = &rx_ring->rx_buffer_info[i];
8890         i -= rx_ring->count;
8891
8892         bufsz = igb_rx_bufsz(rx_ring);
8893
8894         do {
8895                 if (!igb_alloc_mapped_page(rx_ring, bi))
8896                         break;
8897
8898                 /* sync the buffer for use by the device */
8899                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
8900                                                  bi->page_offset, bufsz,
8901                                                  DMA_FROM_DEVICE);
8902
8903                 /* Refresh the desc even if buffer_addrs didn't change
8904                  * because each write-back erases this info.
8905                  */
8906                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8907
8908                 rx_desc++;
8909                 bi++;
8910                 i++;
8911                 if (unlikely(!i)) {
8912                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8913                         bi = rx_ring->rx_buffer_info;
8914                         i -= rx_ring->count;
8915                 }
8916
8917                 /* clear the length for the next_to_use descriptor */
8918                 rx_desc->wb.upper.length = 0;
8919
8920                 cleaned_count--;
8921         } while (cleaned_count);
8922
8923         i += rx_ring->count;
8924
8925         if (rx_ring->next_to_use != i) {
8926                 /* record the next descriptor to use */
8927                 rx_ring->next_to_use = i;
8928
8929                 /* update next to alloc since we have filled the ring */
8930                 rx_ring->next_to_alloc = i;
8931
8932                 /* Force memory writes to complete before letting h/w
8933                  * know there are new descriptors to fetch.  (Only
8934                  * applicable for weak-ordered memory model archs,
8935                  * such as IA-64).
8936                  */
8937                 dma_wmb();
8938                 writel(i, rx_ring->tail);
8939         }
8940 }
8941
8942 /**
8943  * igb_mii_ioctl -
8944  * @netdev: pointer to netdev struct
8945  * @ifr: interface structure
8946  * @cmd: ioctl command to execute
8947  **/
8948 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8949 {
8950         struct igb_adapter *adapter = netdev_priv(netdev);
8951         struct mii_ioctl_data *data = if_mii(ifr);
8952
8953         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8954                 return -EOPNOTSUPP;
8955
8956         switch (cmd) {
8957         case SIOCGMIIPHY:
8958                 data->phy_id = adapter->hw.phy.addr;
8959                 break;
8960         case SIOCGMIIREG:
8961                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8962                                      &data->val_out))
8963                         return -EIO;
8964                 break;
8965         case SIOCSMIIREG:
8966         default:
8967                 return -EOPNOTSUPP;
8968         }
8969         return 0;
8970 }
8971
8972 /**
8973  * igb_ioctl -
8974  * @netdev: pointer to netdev struct
8975  * @ifr: interface structure
8976  * @cmd: ioctl command to execute
8977  **/
8978 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8979 {
8980         switch (cmd) {
8981         case SIOCGMIIPHY:
8982         case SIOCGMIIREG:
8983         case SIOCSMIIREG:
8984                 return igb_mii_ioctl(netdev, ifr, cmd);
8985         case SIOCGHWTSTAMP:
8986                 return igb_ptp_get_ts_config(netdev, ifr);
8987         case SIOCSHWTSTAMP:
8988                 return igb_ptp_set_ts_config(netdev, ifr);
8989         default:
8990                 return -EOPNOTSUPP;
8991         }
8992 }
8993
8994 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8995 {
8996         struct igb_adapter *adapter = hw->back;
8997
8998         pci_read_config_word(adapter->pdev, reg, value);
8999 }
9000
9001 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9002 {
9003         struct igb_adapter *adapter = hw->back;
9004
9005         pci_write_config_word(adapter->pdev, reg, *value);
9006 }
9007
9008 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9009 {
9010         struct igb_adapter *adapter = hw->back;
9011
9012         if (pcie_capability_read_word(adapter->pdev, reg, value))
9013                 return -E1000_ERR_CONFIG;
9014
9015         return 0;
9016 }
9017
9018 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9019 {
9020         struct igb_adapter *adapter = hw->back;
9021
9022         if (pcie_capability_write_word(adapter->pdev, reg, *value))
9023                 return -E1000_ERR_CONFIG;
9024
9025         return 0;
9026 }
9027
9028 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
9029 {
9030         struct igb_adapter *adapter = netdev_priv(netdev);
9031         struct e1000_hw *hw = &adapter->hw;
9032         u32 ctrl, rctl;
9033         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
9034
9035         if (enable) {
9036                 /* enable VLAN tag insert/strip */
9037                 ctrl = rd32(E1000_CTRL);
9038                 ctrl |= E1000_CTRL_VME;
9039                 wr32(E1000_CTRL, ctrl);
9040
9041                 /* Disable CFI check */
9042                 rctl = rd32(E1000_RCTL);
9043                 rctl &= ~E1000_RCTL_CFIEN;
9044                 wr32(E1000_RCTL, rctl);
9045         } else {
9046                 /* disable VLAN tag insert/strip */
9047                 ctrl = rd32(E1000_CTRL);
9048                 ctrl &= ~E1000_CTRL_VME;
9049                 wr32(E1000_CTRL, ctrl);
9050         }
9051
9052         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
9053 }
9054
9055 static int igb_vlan_rx_add_vid(struct net_device *netdev,
9056                                __be16 proto, u16 vid)
9057 {
9058         struct igb_adapter *adapter = netdev_priv(netdev);
9059         struct e1000_hw *hw = &adapter->hw;
9060         int pf_id = adapter->vfs_allocated_count;
9061
9062         /* add the filter since PF can receive vlans w/o entry in vlvf */
9063         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9064                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
9065
9066         set_bit(vid, adapter->active_vlans);
9067
9068         return 0;
9069 }
9070
9071 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
9072                                 __be16 proto, u16 vid)
9073 {
9074         struct igb_adapter *adapter = netdev_priv(netdev);
9075         int pf_id = adapter->vfs_allocated_count;
9076         struct e1000_hw *hw = &adapter->hw;
9077
9078         /* remove VID from filter table */
9079         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9080                 igb_vfta_set(hw, vid, pf_id, false, true);
9081
9082         clear_bit(vid, adapter->active_vlans);
9083
9084         return 0;
9085 }
9086
9087 static void igb_restore_vlan(struct igb_adapter *adapter)
9088 {
9089         u16 vid = 1;
9090
9091         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
9092         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
9093
9094         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
9095                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
9096 }
9097
9098 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
9099 {
9100         struct pci_dev *pdev = adapter->pdev;
9101         struct e1000_mac_info *mac = &adapter->hw.mac;
9102
9103         mac->autoneg = 0;
9104
9105         /* Make sure dplx is at most 1 bit and lsb of speed is not set
9106          * for the switch() below to work
9107          */
9108         if ((spd & 1) || (dplx & ~1))
9109                 goto err_inval;
9110
9111         /* Fiber NIC's only allow 1000 gbps Full duplex
9112          * and 100Mbps Full duplex for 100baseFx sfp
9113          */
9114         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
9115                 switch (spd + dplx) {
9116                 case SPEED_10 + DUPLEX_HALF:
9117                 case SPEED_10 + DUPLEX_FULL:
9118                 case SPEED_100 + DUPLEX_HALF:
9119                         goto err_inval;
9120                 default:
9121                         break;
9122                 }
9123         }
9124
9125         switch (spd + dplx) {
9126         case SPEED_10 + DUPLEX_HALF:
9127                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
9128                 break;
9129         case SPEED_10 + DUPLEX_FULL:
9130                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
9131                 break;
9132         case SPEED_100 + DUPLEX_HALF:
9133                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
9134                 break;
9135         case SPEED_100 + DUPLEX_FULL:
9136                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
9137                 break;
9138         case SPEED_1000 + DUPLEX_FULL:
9139                 mac->autoneg = 1;
9140                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
9141                 break;
9142         case SPEED_1000 + DUPLEX_HALF: /* not supported */
9143         default:
9144                 goto err_inval;
9145         }
9146
9147         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
9148         adapter->hw.phy.mdix = AUTO_ALL_MODES;
9149
9150         return 0;
9151
9152 err_inval:
9153         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
9154         return -EINVAL;
9155 }
9156
9157 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
9158                           bool runtime)
9159 {
9160         struct net_device *netdev = pci_get_drvdata(pdev);
9161         struct igb_adapter *adapter = netdev_priv(netdev);
9162         struct e1000_hw *hw = &adapter->hw;
9163         u32 ctrl, rctl, status;
9164         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
9165         bool wake;
9166
9167         rtnl_lock();
9168         netif_device_detach(netdev);
9169
9170         if (netif_running(netdev))
9171                 __igb_close(netdev, true);
9172
9173         igb_ptp_suspend(adapter);
9174
9175         igb_clear_interrupt_scheme(adapter);
9176         rtnl_unlock();
9177
9178         status = rd32(E1000_STATUS);
9179         if (status & E1000_STATUS_LU)
9180                 wufc &= ~E1000_WUFC_LNKC;
9181
9182         if (wufc) {
9183                 igb_setup_rctl(adapter);
9184                 igb_set_rx_mode(netdev);
9185
9186                 /* turn on all-multi mode if wake on multicast is enabled */
9187                 if (wufc & E1000_WUFC_MC) {
9188                         rctl = rd32(E1000_RCTL);
9189                         rctl |= E1000_RCTL_MPE;
9190                         wr32(E1000_RCTL, rctl);
9191                 }
9192
9193                 ctrl = rd32(E1000_CTRL);
9194                 ctrl |= E1000_CTRL_ADVD3WUC;
9195                 wr32(E1000_CTRL, ctrl);
9196
9197                 /* Allow time for pending master requests to run */
9198                 igb_disable_pcie_master(hw);
9199
9200                 wr32(E1000_WUC, E1000_WUC_PME_EN);
9201                 wr32(E1000_WUFC, wufc);
9202         } else {
9203                 wr32(E1000_WUC, 0);
9204                 wr32(E1000_WUFC, 0);
9205         }
9206
9207         wake = wufc || adapter->en_mng_pt;
9208         if (!wake)
9209                 igb_power_down_link(adapter);
9210         else
9211                 igb_power_up_link(adapter);
9212
9213         if (enable_wake)
9214                 *enable_wake = wake;
9215
9216         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
9217          * would have already happened in close and is redundant.
9218          */
9219         igb_release_hw_control(adapter);
9220
9221         pci_disable_device(pdev);
9222
9223         return 0;
9224 }
9225
9226 static void igb_deliver_wake_packet(struct net_device *netdev)
9227 {
9228         struct igb_adapter *adapter = netdev_priv(netdev);
9229         struct e1000_hw *hw = &adapter->hw;
9230         struct sk_buff *skb;
9231         u32 wupl;
9232
9233         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
9234
9235         /* WUPM stores only the first 128 bytes of the wake packet.
9236          * Read the packet only if we have the whole thing.
9237          */
9238         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
9239                 return;
9240
9241         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
9242         if (!skb)
9243                 return;
9244
9245         skb_put(skb, wupl);
9246
9247         /* Ensure reads are 32-bit aligned */
9248         wupl = roundup(wupl, 4);
9249
9250         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
9251
9252         skb->protocol = eth_type_trans(skb, netdev);
9253         netif_rx(skb);
9254 }
9255
9256 static int __maybe_unused igb_suspend(struct device *dev)
9257 {
9258         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
9259 }
9260
9261 static int __maybe_unused __igb_resume(struct device *dev, bool rpm)
9262 {
9263         struct pci_dev *pdev = to_pci_dev(dev);
9264         struct net_device *netdev = pci_get_drvdata(pdev);
9265         struct igb_adapter *adapter = netdev_priv(netdev);
9266         struct e1000_hw *hw = &adapter->hw;
9267         u32 err, val;
9268
9269         pci_set_power_state(pdev, PCI_D0);
9270         pci_restore_state(pdev);
9271         pci_save_state(pdev);
9272
9273         if (!pci_device_is_present(pdev))
9274                 return -ENODEV;
9275         err = pci_enable_device_mem(pdev);
9276         if (err) {
9277                 dev_err(&pdev->dev,
9278                         "igb: Cannot enable PCI device from suspend\n");
9279                 return err;
9280         }
9281         pci_set_master(pdev);
9282
9283         pci_enable_wake(pdev, PCI_D3hot, 0);
9284         pci_enable_wake(pdev, PCI_D3cold, 0);
9285
9286         if (igb_init_interrupt_scheme(adapter, true)) {
9287                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9288                 return -ENOMEM;
9289         }
9290
9291         igb_reset(adapter);
9292
9293         /* let the f/w know that the h/w is now under the control of the
9294          * driver.
9295          */
9296         igb_get_hw_control(adapter);
9297
9298         val = rd32(E1000_WUS);
9299         if (val & WAKE_PKT_WUS)
9300                 igb_deliver_wake_packet(netdev);
9301
9302         wr32(E1000_WUS, ~0);
9303
9304         if (!rpm)
9305                 rtnl_lock();
9306         if (!err && netif_running(netdev))
9307                 err = __igb_open(netdev, true);
9308
9309         if (!err)
9310                 netif_device_attach(netdev);
9311         if (!rpm)
9312                 rtnl_unlock();
9313
9314         return err;
9315 }
9316
9317 static int __maybe_unused igb_resume(struct device *dev)
9318 {
9319         return __igb_resume(dev, false);
9320 }
9321
9322 static int __maybe_unused igb_runtime_idle(struct device *dev)
9323 {
9324         struct net_device *netdev = dev_get_drvdata(dev);
9325         struct igb_adapter *adapter = netdev_priv(netdev);
9326
9327         if (!igb_has_link(adapter))
9328                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9329
9330         return -EBUSY;
9331 }
9332
9333 static int __maybe_unused igb_runtime_suspend(struct device *dev)
9334 {
9335         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
9336 }
9337
9338 static int __maybe_unused igb_runtime_resume(struct device *dev)
9339 {
9340         return __igb_resume(dev, true);
9341 }
9342
9343 static void igb_shutdown(struct pci_dev *pdev)
9344 {
9345         bool wake;
9346
9347         __igb_shutdown(pdev, &wake, 0);
9348
9349         if (system_state == SYSTEM_POWER_OFF) {
9350                 pci_wake_from_d3(pdev, wake);
9351                 pci_set_power_state(pdev, PCI_D3hot);
9352         }
9353 }
9354
9355 #ifdef CONFIG_PCI_IOV
9356 static int igb_sriov_reinit(struct pci_dev *dev)
9357 {
9358         struct net_device *netdev = pci_get_drvdata(dev);
9359         struct igb_adapter *adapter = netdev_priv(netdev);
9360         struct pci_dev *pdev = adapter->pdev;
9361
9362         rtnl_lock();
9363
9364         if (netif_running(netdev))
9365                 igb_close(netdev);
9366         else
9367                 igb_reset(adapter);
9368
9369         igb_clear_interrupt_scheme(adapter);
9370
9371         igb_init_queue_configuration(adapter);
9372
9373         if (igb_init_interrupt_scheme(adapter, true)) {
9374                 rtnl_unlock();
9375                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9376                 return -ENOMEM;
9377         }
9378
9379         if (netif_running(netdev))
9380                 igb_open(netdev);
9381
9382         rtnl_unlock();
9383
9384         return 0;
9385 }
9386
9387 static int igb_pci_disable_sriov(struct pci_dev *dev)
9388 {
9389         int err = igb_disable_sriov(dev);
9390
9391         if (!err)
9392                 err = igb_sriov_reinit(dev);
9393
9394         return err;
9395 }
9396
9397 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
9398 {
9399         int err = igb_enable_sriov(dev, num_vfs);
9400
9401         if (err)
9402                 goto out;
9403
9404         err = igb_sriov_reinit(dev);
9405         if (!err)
9406                 return num_vfs;
9407
9408 out:
9409         return err;
9410 }
9411
9412 #endif
9413 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9414 {
9415 #ifdef CONFIG_PCI_IOV
9416         if (num_vfs == 0)
9417                 return igb_pci_disable_sriov(dev);
9418         else
9419                 return igb_pci_enable_sriov(dev, num_vfs);
9420 #endif
9421         return 0;
9422 }
9423
9424 /**
9425  *  igb_io_error_detected - called when PCI error is detected
9426  *  @pdev: Pointer to PCI device
9427  *  @state: The current pci connection state
9428  *
9429  *  This function is called after a PCI bus error affecting
9430  *  this device has been detected.
9431  **/
9432 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9433                                               pci_channel_state_t state)
9434 {
9435         struct net_device *netdev = pci_get_drvdata(pdev);
9436         struct igb_adapter *adapter = netdev_priv(netdev);
9437
9438         netif_device_detach(netdev);
9439
9440         if (state == pci_channel_io_perm_failure)
9441                 return PCI_ERS_RESULT_DISCONNECT;
9442
9443         if (netif_running(netdev))
9444                 igb_down(adapter);
9445         pci_disable_device(pdev);
9446
9447         /* Request a slot slot reset. */
9448         return PCI_ERS_RESULT_NEED_RESET;
9449 }
9450
9451 /**
9452  *  igb_io_slot_reset - called after the pci bus has been reset.
9453  *  @pdev: Pointer to PCI device
9454  *
9455  *  Restart the card from scratch, as if from a cold-boot. Implementation
9456  *  resembles the first-half of the __igb_resume routine.
9457  **/
9458 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9459 {
9460         struct net_device *netdev = pci_get_drvdata(pdev);
9461         struct igb_adapter *adapter = netdev_priv(netdev);
9462         struct e1000_hw *hw = &adapter->hw;
9463         pci_ers_result_t result;
9464
9465         if (pci_enable_device_mem(pdev)) {
9466                 dev_err(&pdev->dev,
9467                         "Cannot re-enable PCI device after reset.\n");
9468                 result = PCI_ERS_RESULT_DISCONNECT;
9469         } else {
9470                 pci_set_master(pdev);
9471                 pci_restore_state(pdev);
9472                 pci_save_state(pdev);
9473
9474                 pci_enable_wake(pdev, PCI_D3hot, 0);
9475                 pci_enable_wake(pdev, PCI_D3cold, 0);
9476
9477                 /* In case of PCI error, adapter lose its HW address
9478                  * so we should re-assign it here.
9479                  */
9480                 hw->hw_addr = adapter->io_addr;
9481
9482                 igb_reset(adapter);
9483                 wr32(E1000_WUS, ~0);
9484                 result = PCI_ERS_RESULT_RECOVERED;
9485         }
9486
9487         return result;
9488 }
9489
9490 /**
9491  *  igb_io_resume - called when traffic can start flowing again.
9492  *  @pdev: Pointer to PCI device
9493  *
9494  *  This callback is called when the error recovery driver tells us that
9495  *  its OK to resume normal operation. Implementation resembles the
9496  *  second-half of the __igb_resume routine.
9497  */
9498 static void igb_io_resume(struct pci_dev *pdev)
9499 {
9500         struct net_device *netdev = pci_get_drvdata(pdev);
9501         struct igb_adapter *adapter = netdev_priv(netdev);
9502
9503         if (netif_running(netdev)) {
9504                 if (igb_up(adapter)) {
9505                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9506                         return;
9507                 }
9508         }
9509
9510         netif_device_attach(netdev);
9511
9512         /* let the f/w know that the h/w is now under the control of the
9513          * driver.
9514          */
9515         igb_get_hw_control(adapter);
9516 }
9517
9518 /**
9519  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9520  *  @adapter: Pointer to adapter structure
9521  *  @index: Index of the RAR entry which need to be synced with MAC table
9522  **/
9523 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9524 {
9525         struct e1000_hw *hw = &adapter->hw;
9526         u32 rar_low, rar_high;
9527         u8 *addr = adapter->mac_table[index].addr;
9528
9529         /* HW expects these to be in network order when they are plugged
9530          * into the registers which are little endian.  In order to guarantee
9531          * that ordering we need to do an leXX_to_cpup here in order to be
9532          * ready for the byteswap that occurs with writel
9533          */
9534         rar_low = le32_to_cpup((__le32 *)(addr));
9535         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9536
9537         /* Indicate to hardware the Address is Valid. */
9538         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9539                 if (is_valid_ether_addr(addr))
9540                         rar_high |= E1000_RAH_AV;
9541
9542                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9543                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9544
9545                 switch (hw->mac.type) {
9546                 case e1000_82575:
9547                 case e1000_i210:
9548                         if (adapter->mac_table[index].state &
9549                             IGB_MAC_STATE_QUEUE_STEERING)
9550                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9551
9552                         rar_high |= E1000_RAH_POOL_1 *
9553                                     adapter->mac_table[index].queue;
9554                         break;
9555                 default:
9556                         rar_high |= E1000_RAH_POOL_1 <<
9557                                     adapter->mac_table[index].queue;
9558                         break;
9559                 }
9560         }
9561
9562         wr32(E1000_RAL(index), rar_low);
9563         wrfl();
9564         wr32(E1000_RAH(index), rar_high);
9565         wrfl();
9566 }
9567
9568 static int igb_set_vf_mac(struct igb_adapter *adapter,
9569                           int vf, unsigned char *mac_addr)
9570 {
9571         struct e1000_hw *hw = &adapter->hw;
9572         /* VF MAC addresses start at end of receive addresses and moves
9573          * towards the first, as a result a collision should not be possible
9574          */
9575         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9576         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9577
9578         ether_addr_copy(vf_mac_addr, mac_addr);
9579         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9580         adapter->mac_table[rar_entry].queue = vf;
9581         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9582         igb_rar_set_index(adapter, rar_entry);
9583
9584         return 0;
9585 }
9586
9587 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9588 {
9589         struct igb_adapter *adapter = netdev_priv(netdev);
9590
9591         if (vf >= adapter->vfs_allocated_count)
9592                 return -EINVAL;
9593
9594         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9595          * flag and allows to overwrite the MAC via VF netdev.  This
9596          * is necessary to allow libvirt a way to restore the original
9597          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9598          * down a VM.
9599          */
9600         if (is_zero_ether_addr(mac)) {
9601                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9602                 dev_info(&adapter->pdev->dev,
9603                          "remove administratively set MAC on VF %d\n",
9604                          vf);
9605         } else if (is_valid_ether_addr(mac)) {
9606                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9607                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9608                          mac, vf);
9609                 dev_info(&adapter->pdev->dev,
9610                          "Reload the VF driver to make this change effective.");
9611                 /* Generate additional warning if PF is down */
9612                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9613                         dev_warn(&adapter->pdev->dev,
9614                                  "The VF MAC address has been set, but the PF device is not up.\n");
9615                         dev_warn(&adapter->pdev->dev,
9616                                  "Bring the PF device up before attempting to use the VF device.\n");
9617                 }
9618         } else {
9619                 return -EINVAL;
9620         }
9621         return igb_set_vf_mac(adapter, vf, mac);
9622 }
9623
9624 static int igb_link_mbps(int internal_link_speed)
9625 {
9626         switch (internal_link_speed) {
9627         case SPEED_100:
9628                 return 100;
9629         case SPEED_1000:
9630                 return 1000;
9631         default:
9632                 return 0;
9633         }
9634 }
9635
9636 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9637                                   int link_speed)
9638 {
9639         int rf_dec, rf_int;
9640         u32 bcnrc_val;
9641
9642         if (tx_rate != 0) {
9643                 /* Calculate the rate factor values to set */
9644                 rf_int = link_speed / tx_rate;
9645                 rf_dec = (link_speed - (rf_int * tx_rate));
9646                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9647                          tx_rate;
9648
9649                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9650                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9651                               E1000_RTTBCNRC_RF_INT_MASK);
9652                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9653         } else {
9654                 bcnrc_val = 0;
9655         }
9656
9657         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9658         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9659          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9660          */
9661         wr32(E1000_RTTBCNRM, 0x14);
9662         wr32(E1000_RTTBCNRC, bcnrc_val);
9663 }
9664
9665 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9666 {
9667         int actual_link_speed, i;
9668         bool reset_rate = false;
9669
9670         /* VF TX rate limit was not set or not supported */
9671         if ((adapter->vf_rate_link_speed == 0) ||
9672             (adapter->hw.mac.type != e1000_82576))
9673                 return;
9674
9675         actual_link_speed = igb_link_mbps(adapter->link_speed);
9676         if (actual_link_speed != adapter->vf_rate_link_speed) {
9677                 reset_rate = true;
9678                 adapter->vf_rate_link_speed = 0;
9679                 dev_info(&adapter->pdev->dev,
9680                          "Link speed has been changed. VF Transmit rate is disabled\n");
9681         }
9682
9683         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9684                 if (reset_rate)
9685                         adapter->vf_data[i].tx_rate = 0;
9686
9687                 igb_set_vf_rate_limit(&adapter->hw, i,
9688                                       adapter->vf_data[i].tx_rate,
9689                                       actual_link_speed);
9690         }
9691 }
9692
9693 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9694                              int min_tx_rate, int max_tx_rate)
9695 {
9696         struct igb_adapter *adapter = netdev_priv(netdev);
9697         struct e1000_hw *hw = &adapter->hw;
9698         int actual_link_speed;
9699
9700         if (hw->mac.type != e1000_82576)
9701                 return -EOPNOTSUPP;
9702
9703         if (min_tx_rate)
9704                 return -EINVAL;
9705
9706         actual_link_speed = igb_link_mbps(adapter->link_speed);
9707         if ((vf >= adapter->vfs_allocated_count) ||
9708             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9709             (max_tx_rate < 0) ||
9710             (max_tx_rate > actual_link_speed))
9711                 return -EINVAL;
9712
9713         adapter->vf_rate_link_speed = actual_link_speed;
9714         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9715         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9716
9717         return 0;
9718 }
9719
9720 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9721                                    bool setting)
9722 {
9723         struct igb_adapter *adapter = netdev_priv(netdev);
9724         struct e1000_hw *hw = &adapter->hw;
9725         u32 reg_val, reg_offset;
9726
9727         if (!adapter->vfs_allocated_count)
9728                 return -EOPNOTSUPP;
9729
9730         if (vf >= adapter->vfs_allocated_count)
9731                 return -EINVAL;
9732
9733         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9734         reg_val = rd32(reg_offset);
9735         if (setting)
9736                 reg_val |= (BIT(vf) |
9737                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9738         else
9739                 reg_val &= ~(BIT(vf) |
9740                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9741         wr32(reg_offset, reg_val);
9742
9743         adapter->vf_data[vf].spoofchk_enabled = setting;
9744         return 0;
9745 }
9746
9747 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9748 {
9749         struct igb_adapter *adapter = netdev_priv(netdev);
9750
9751         if (vf >= adapter->vfs_allocated_count)
9752                 return -EINVAL;
9753         if (adapter->vf_data[vf].trusted == setting)
9754                 return 0;
9755
9756         adapter->vf_data[vf].trusted = setting;
9757
9758         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9759                  vf, setting ? "" : "not ");
9760         return 0;
9761 }
9762
9763 static int igb_ndo_get_vf_config(struct net_device *netdev,
9764                                  int vf, struct ifla_vf_info *ivi)
9765 {
9766         struct igb_adapter *adapter = netdev_priv(netdev);
9767         if (vf >= adapter->vfs_allocated_count)
9768                 return -EINVAL;
9769         ivi->vf = vf;
9770         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9771         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9772         ivi->min_tx_rate = 0;
9773         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9774         ivi->qos = adapter->vf_data[vf].pf_qos;
9775         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9776         ivi->trusted = adapter->vf_data[vf].trusted;
9777         return 0;
9778 }
9779
9780 static void igb_vmm_control(struct igb_adapter *adapter)
9781 {
9782         struct e1000_hw *hw = &adapter->hw;
9783         u32 reg;
9784
9785         switch (hw->mac.type) {
9786         case e1000_82575:
9787         case e1000_i210:
9788         case e1000_i211:
9789         case e1000_i354:
9790         default:
9791                 /* replication is not supported for 82575 */
9792                 return;
9793         case e1000_82576:
9794                 /* notify HW that the MAC is adding vlan tags */
9795                 reg = rd32(E1000_DTXCTL);
9796                 reg |= E1000_DTXCTL_VLAN_ADDED;
9797                 wr32(E1000_DTXCTL, reg);
9798                 fallthrough;
9799         case e1000_82580:
9800                 /* enable replication vlan tag stripping */
9801                 reg = rd32(E1000_RPLOLR);
9802                 reg |= E1000_RPLOLR_STRVLAN;
9803                 wr32(E1000_RPLOLR, reg);
9804                 fallthrough;
9805         case e1000_i350:
9806                 /* none of the above registers are supported by i350 */
9807                 break;
9808         }
9809
9810         if (adapter->vfs_allocated_count) {
9811                 igb_vmdq_set_loopback_pf(hw, true);
9812                 igb_vmdq_set_replication_pf(hw, true);
9813                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9814                                               adapter->vfs_allocated_count);
9815         } else {
9816                 igb_vmdq_set_loopback_pf(hw, false);
9817                 igb_vmdq_set_replication_pf(hw, false);
9818         }
9819 }
9820
9821 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9822 {
9823         struct e1000_hw *hw = &adapter->hw;
9824         u32 dmac_thr;
9825         u16 hwm;
9826         u32 reg;
9827
9828         if (hw->mac.type > e1000_82580) {
9829                 if (adapter->flags & IGB_FLAG_DMAC) {
9830                         /* force threshold to 0. */
9831                         wr32(E1000_DMCTXTH, 0);
9832
9833                         /* DMA Coalescing high water mark needs to be greater
9834                          * than the Rx threshold. Set hwm to PBA - max frame
9835                          * size in 16B units, capping it at PBA - 6KB.
9836                          */
9837                         hwm = 64 * (pba - 6);
9838                         reg = rd32(E1000_FCRTC);
9839                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9840                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9841                                 & E1000_FCRTC_RTH_COAL_MASK);
9842                         wr32(E1000_FCRTC, reg);
9843
9844                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9845                          * frame size, capping it at PBA - 10KB.
9846                          */
9847                         dmac_thr = pba - 10;
9848                         reg = rd32(E1000_DMACR);
9849                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9850                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9851                                 & E1000_DMACR_DMACTHR_MASK);
9852
9853                         /* transition to L0x or L1 if available..*/
9854                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9855
9856                         /* watchdog timer= +-1000 usec in 32usec intervals */
9857                         reg |= (1000 >> 5);
9858
9859                         /* Disable BMC-to-OS Watchdog Enable */
9860                         if (hw->mac.type != e1000_i354)
9861                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9862                         wr32(E1000_DMACR, reg);
9863
9864                         /* no lower threshold to disable
9865                          * coalescing(smart fifb)-UTRESH=0
9866                          */
9867                         wr32(E1000_DMCRTRH, 0);
9868
9869                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9870
9871                         wr32(E1000_DMCTLX, reg);
9872
9873                         /* free space in tx packet buffer to wake from
9874                          * DMA coal
9875                          */
9876                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9877                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9878                 }
9879
9880                 if (hw->mac.type >= e1000_i210 ||
9881                     (adapter->flags & IGB_FLAG_DMAC)) {
9882                         reg = rd32(E1000_PCIEMISC);
9883                         reg |= E1000_PCIEMISC_LX_DECISION;
9884                         wr32(E1000_PCIEMISC, reg);
9885                 } /* endif adapter->dmac is not disabled */
9886         } else if (hw->mac.type == e1000_82580) {
9887                 u32 reg = rd32(E1000_PCIEMISC);
9888
9889                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
9890                 wr32(E1000_DMACR, 0);
9891         }
9892 }
9893
9894 /**
9895  *  igb_read_i2c_byte - Reads 8 bit word over I2C
9896  *  @hw: pointer to hardware structure
9897  *  @byte_offset: byte offset to read
9898  *  @dev_addr: device address
9899  *  @data: value read
9900  *
9901  *  Performs byte read operation over I2C interface at
9902  *  a specified device address.
9903  **/
9904 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9905                       u8 dev_addr, u8 *data)
9906 {
9907         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9908         struct i2c_client *this_client = adapter->i2c_client;
9909         s32 status;
9910         u16 swfw_mask = 0;
9911
9912         if (!this_client)
9913                 return E1000_ERR_I2C;
9914
9915         swfw_mask = E1000_SWFW_PHY0_SM;
9916
9917         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9918                 return E1000_ERR_SWFW_SYNC;
9919
9920         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9921         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9922
9923         if (status < 0)
9924                 return E1000_ERR_I2C;
9925         else {
9926                 *data = status;
9927                 return 0;
9928         }
9929 }
9930
9931 /**
9932  *  igb_write_i2c_byte - Writes 8 bit word over I2C
9933  *  @hw: pointer to hardware structure
9934  *  @byte_offset: byte offset to write
9935  *  @dev_addr: device address
9936  *  @data: value to write
9937  *
9938  *  Performs byte write operation over I2C interface at
9939  *  a specified device address.
9940  **/
9941 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9942                        u8 dev_addr, u8 data)
9943 {
9944         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9945         struct i2c_client *this_client = adapter->i2c_client;
9946         s32 status;
9947         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9948
9949         if (!this_client)
9950                 return E1000_ERR_I2C;
9951
9952         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9953                 return E1000_ERR_SWFW_SYNC;
9954         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9955         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9956
9957         if (status)
9958                 return E1000_ERR_I2C;
9959         else
9960                 return 0;
9961
9962 }
9963
9964 int igb_reinit_queues(struct igb_adapter *adapter)
9965 {
9966         struct net_device *netdev = adapter->netdev;
9967         struct pci_dev *pdev = adapter->pdev;
9968         int err = 0;
9969
9970         if (netif_running(netdev))
9971                 igb_close(netdev);
9972
9973         igb_reset_interrupt_capability(adapter);
9974
9975         if (igb_init_interrupt_scheme(adapter, true)) {
9976                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9977                 return -ENOMEM;
9978         }
9979
9980         if (netif_running(netdev))
9981                 err = igb_open(netdev);
9982
9983         return err;
9984 }
9985
9986 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
9987 {
9988         struct igb_nfc_filter *rule;
9989
9990         spin_lock(&adapter->nfc_lock);
9991
9992         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9993                 igb_erase_filter(adapter, rule);
9994
9995         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
9996                 igb_erase_filter(adapter, rule);
9997
9998         spin_unlock(&adapter->nfc_lock);
9999 }
10000
10001 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
10002 {
10003         struct igb_nfc_filter *rule;
10004
10005         spin_lock(&adapter->nfc_lock);
10006
10007         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10008                 igb_add_filter(adapter, rule);
10009
10010         spin_unlock(&adapter->nfc_lock);
10011 }
10012 /* igb_main.c */