1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/init.h>
33 #include <linux/bitops.h>
34 #include <linux/vmalloc.h>
35 #include <linux/pagemap.h>
36 #include <linux/netdevice.h>
37 #include <linux/ipv6.h>
38 #include <linux/slab.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/net_tstamp.h>
42 #include <linux/mii.h>
43 #include <linux/ethtool.h>
45 #include <linux/if_vlan.h>
46 #include <linux/pci.h>
47 #include <linux/pci-aspm.h>
48 #include <linux/delay.h>
49 #include <linux/interrupt.h>
51 #include <linux/tcp.h>
52 #include <linux/sctp.h>
53 #include <linux/if_ether.h>
54 #include <linux/aer.h>
55 #include <linux/prefetch.h>
56 #include <linux/pm_runtime.h>
58 #include <linux/dca.h>
60 #include <linux/i2c.h>
66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
67 __stringify(BUILD) "-k"
68 char igb_driver_name[] = "igb";
69 char igb_driver_version[] = DRV_VERSION;
70 static const char igb_driver_string[] =
71 "Intel(R) Gigabit Ethernet Network Driver";
72 static const char igb_copyright[] =
73 "Copyright (c) 2007-2013 Intel Corporation.";
75 static const struct e1000_info *igb_info_tbl[] = {
76 [board_82575] = &e1000_82575_info,
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
113 /* required last entry */
117 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
119 void igb_reset(struct igb_adapter *);
120 static int igb_setup_all_tx_resources(struct igb_adapter *);
121 static int igb_setup_all_rx_resources(struct igb_adapter *);
122 static void igb_free_all_tx_resources(struct igb_adapter *);
123 static void igb_free_all_rx_resources(struct igb_adapter *);
124 static void igb_setup_mrqc(struct igb_adapter *);
125 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
126 static void igb_remove(struct pci_dev *pdev);
127 static int igb_sw_init(struct igb_adapter *);
128 static int igb_open(struct net_device *);
129 static int igb_close(struct net_device *);
130 static void igb_configure(struct igb_adapter *);
131 static void igb_configure_tx(struct igb_adapter *);
132 static void igb_configure_rx(struct igb_adapter *);
133 static void igb_clean_all_tx_rings(struct igb_adapter *);
134 static void igb_clean_all_rx_rings(struct igb_adapter *);
135 static void igb_clean_tx_ring(struct igb_ring *);
136 static void igb_clean_rx_ring(struct igb_ring *);
137 static void igb_set_rx_mode(struct net_device *);
138 static void igb_update_phy_info(unsigned long);
139 static void igb_watchdog(unsigned long);
140 static void igb_watchdog_task(struct work_struct *);
141 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
142 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
143 struct rtnl_link_stats64 *stats);
144 static int igb_change_mtu(struct net_device *, int);
145 static int igb_set_mac(struct net_device *, void *);
146 static void igb_set_uta(struct igb_adapter *adapter);
147 static irqreturn_t igb_intr(int irq, void *);
148 static irqreturn_t igb_intr_msi(int irq, void *);
149 static irqreturn_t igb_msix_other(int irq, void *);
150 static irqreturn_t igb_msix_ring(int irq, void *);
151 #ifdef CONFIG_IGB_DCA
152 static void igb_update_dca(struct igb_q_vector *);
153 static void igb_setup_dca(struct igb_adapter *);
154 #endif /* CONFIG_IGB_DCA */
155 static int igb_poll(struct napi_struct *, int);
156 static bool igb_clean_tx_irq(struct igb_q_vector *);
157 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
158 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
159 static void igb_tx_timeout(struct net_device *);
160 static void igb_reset_task(struct work_struct *);
161 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
162 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
163 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
164 static void igb_restore_vlan(struct igb_adapter *);
165 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
166 static void igb_ping_all_vfs(struct igb_adapter *);
167 static void igb_msg_task(struct igb_adapter *);
168 static void igb_vmm_control(struct igb_adapter *);
169 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
170 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
171 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
172 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
173 int vf, u16 vlan, u8 qos);
174 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
175 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
177 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
178 struct ifla_vf_info *ivi);
179 static void igb_check_vf_rate_limit(struct igb_adapter *);
181 #ifdef CONFIG_PCI_IOV
182 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
186 #ifdef CONFIG_PM_SLEEP
187 static int igb_suspend(struct device *);
189 static int igb_resume(struct device *);
190 #ifdef CONFIG_PM_RUNTIME
191 static int igb_runtime_suspend(struct device *dev);
192 static int igb_runtime_resume(struct device *dev);
193 static int igb_runtime_idle(struct device *dev);
195 static const struct dev_pm_ops igb_pm_ops = {
196 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
197 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
201 static void igb_shutdown(struct pci_dev *);
202 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
203 #ifdef CONFIG_IGB_DCA
204 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
205 static struct notifier_block dca_notifier = {
206 .notifier_call = igb_notify_dca,
211 #ifdef CONFIG_NET_POLL_CONTROLLER
212 /* for netdump / net console */
213 static void igb_netpoll(struct net_device *);
215 #ifdef CONFIG_PCI_IOV
216 static unsigned int max_vfs = 0;
217 module_param(max_vfs, uint, 0);
218 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
219 "per physical function");
220 #endif /* CONFIG_PCI_IOV */
222 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
223 pci_channel_state_t);
224 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
225 static void igb_io_resume(struct pci_dev *);
227 static const struct pci_error_handlers igb_err_handler = {
228 .error_detected = igb_io_error_detected,
229 .slot_reset = igb_io_slot_reset,
230 .resume = igb_io_resume,
233 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
235 static struct pci_driver igb_driver = {
236 .name = igb_driver_name,
237 .id_table = igb_pci_tbl,
239 .remove = igb_remove,
241 .driver.pm = &igb_pm_ops,
243 .shutdown = igb_shutdown,
244 .sriov_configure = igb_pci_sriov_configure,
245 .err_handler = &igb_err_handler
248 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
249 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
250 MODULE_LICENSE("GPL");
251 MODULE_VERSION(DRV_VERSION);
253 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
254 static int debug = -1;
255 module_param(debug, int, 0);
256 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
258 struct igb_reg_info {
263 static const struct igb_reg_info igb_reg_info_tbl[] = {
265 /* General Registers */
266 {E1000_CTRL, "CTRL"},
267 {E1000_STATUS, "STATUS"},
268 {E1000_CTRL_EXT, "CTRL_EXT"},
270 /* Interrupt Registers */
274 {E1000_RCTL, "RCTL"},
275 {E1000_RDLEN(0), "RDLEN"},
276 {E1000_RDH(0), "RDH"},
277 {E1000_RDT(0), "RDT"},
278 {E1000_RXDCTL(0), "RXDCTL"},
279 {E1000_RDBAL(0), "RDBAL"},
280 {E1000_RDBAH(0), "RDBAH"},
283 {E1000_TCTL, "TCTL"},
284 {E1000_TDBAL(0), "TDBAL"},
285 {E1000_TDBAH(0), "TDBAH"},
286 {E1000_TDLEN(0), "TDLEN"},
287 {E1000_TDH(0), "TDH"},
288 {E1000_TDT(0), "TDT"},
289 {E1000_TXDCTL(0), "TXDCTL"},
290 {E1000_TDFH, "TDFH"},
291 {E1000_TDFT, "TDFT"},
292 {E1000_TDFHS, "TDFHS"},
293 {E1000_TDFPC, "TDFPC"},
295 /* List Terminator */
299 /* igb_regdump - register printout routine */
300 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
306 switch (reginfo->ofs) {
308 for (n = 0; n < 4; n++)
309 regs[n] = rd32(E1000_RDLEN(n));
312 for (n = 0; n < 4; n++)
313 regs[n] = rd32(E1000_RDH(n));
316 for (n = 0; n < 4; n++)
317 regs[n] = rd32(E1000_RDT(n));
319 case E1000_RXDCTL(0):
320 for (n = 0; n < 4; n++)
321 regs[n] = rd32(E1000_RXDCTL(n));
324 for (n = 0; n < 4; n++)
325 regs[n] = rd32(E1000_RDBAL(n));
328 for (n = 0; n < 4; n++)
329 regs[n] = rd32(E1000_RDBAH(n));
332 for (n = 0; n < 4; n++)
333 regs[n] = rd32(E1000_RDBAL(n));
336 for (n = 0; n < 4; n++)
337 regs[n] = rd32(E1000_TDBAH(n));
340 for (n = 0; n < 4; n++)
341 regs[n] = rd32(E1000_TDLEN(n));
344 for (n = 0; n < 4; n++)
345 regs[n] = rd32(E1000_TDH(n));
348 for (n = 0; n < 4; n++)
349 regs[n] = rd32(E1000_TDT(n));
351 case E1000_TXDCTL(0):
352 for (n = 0; n < 4; n++)
353 regs[n] = rd32(E1000_TXDCTL(n));
356 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
360 snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
361 pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
365 /* igb_dump - Print registers, Tx-rings and Rx-rings */
366 static void igb_dump(struct igb_adapter *adapter)
368 struct net_device *netdev = adapter->netdev;
369 struct e1000_hw *hw = &adapter->hw;
370 struct igb_reg_info *reginfo;
371 struct igb_ring *tx_ring;
372 union e1000_adv_tx_desc *tx_desc;
373 struct my_u0 { u64 a; u64 b; } *u0;
374 struct igb_ring *rx_ring;
375 union e1000_adv_rx_desc *rx_desc;
379 if (!netif_msg_hw(adapter))
382 /* Print netdevice Info */
384 dev_info(&adapter->pdev->dev, "Net device Info\n");
385 pr_info("Device Name state trans_start "
387 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
388 netdev->state, netdev->trans_start, netdev->last_rx);
391 /* Print Registers */
392 dev_info(&adapter->pdev->dev, "Register Dump\n");
393 pr_info(" Register Name Value\n");
394 for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
395 reginfo->name; reginfo++) {
396 igb_regdump(hw, reginfo);
399 /* Print TX Ring Summary */
400 if (!netdev || !netif_running(netdev))
403 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
404 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
405 for (n = 0; n < adapter->num_tx_queues; n++) {
406 struct igb_tx_buffer *buffer_info;
407 tx_ring = adapter->tx_ring[n];
408 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
409 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
410 n, tx_ring->next_to_use, tx_ring->next_to_clean,
411 (u64)dma_unmap_addr(buffer_info, dma),
412 dma_unmap_len(buffer_info, len),
413 buffer_info->next_to_watch,
414 (u64)buffer_info->time_stamp);
418 if (!netif_msg_tx_done(adapter))
419 goto rx_ring_summary;
421 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
423 /* Transmit Descriptor Formats
425 * Advanced Transmit Descriptor
426 * +--------------------------------------------------------------+
427 * 0 | Buffer Address [63:0] |
428 * +--------------------------------------------------------------+
429 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
430 * +--------------------------------------------------------------+
431 * 63 46 45 40 39 38 36 35 32 31 24 15 0
434 for (n = 0; n < adapter->num_tx_queues; n++) {
435 tx_ring = adapter->tx_ring[n];
436 pr_info("------------------------------------\n");
437 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
438 pr_info("------------------------------------\n");
439 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] "
440 "[bi->dma ] leng ntw timestamp "
443 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
444 const char *next_desc;
445 struct igb_tx_buffer *buffer_info;
446 tx_desc = IGB_TX_DESC(tx_ring, i);
447 buffer_info = &tx_ring->tx_buffer_info[i];
448 u0 = (struct my_u0 *)tx_desc;
449 if (i == tx_ring->next_to_use &&
450 i == tx_ring->next_to_clean)
451 next_desc = " NTC/U";
452 else if (i == tx_ring->next_to_use)
454 else if (i == tx_ring->next_to_clean)
459 pr_info("T [0x%03X] %016llX %016llX %016llX"
460 " %04X %p %016llX %p%s\n", i,
463 (u64)dma_unmap_addr(buffer_info, dma),
464 dma_unmap_len(buffer_info, len),
465 buffer_info->next_to_watch,
466 (u64)buffer_info->time_stamp,
467 buffer_info->skb, next_desc);
469 if (netif_msg_pktdata(adapter) && buffer_info->skb)
470 print_hex_dump(KERN_INFO, "",
472 16, 1, buffer_info->skb->data,
473 dma_unmap_len(buffer_info, len),
478 /* Print RX Rings Summary */
480 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
481 pr_info("Queue [NTU] [NTC]\n");
482 for (n = 0; n < adapter->num_rx_queues; n++) {
483 rx_ring = adapter->rx_ring[n];
484 pr_info(" %5d %5X %5X\n",
485 n, rx_ring->next_to_use, rx_ring->next_to_clean);
489 if (!netif_msg_rx_status(adapter))
492 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
494 /* Advanced Receive Descriptor (Read) Format
496 * +-----------------------------------------------------+
497 * 0 | Packet Buffer Address [63:1] |A0/NSE|
498 * +----------------------------------------------+------+
499 * 8 | Header Buffer Address [63:1] | DD |
500 * +-----------------------------------------------------+
503 * Advanced Receive Descriptor (Write-Back) Format
505 * 63 48 47 32 31 30 21 20 17 16 4 3 0
506 * +------------------------------------------------------+
507 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
508 * | Checksum Ident | | | | Type | Type |
509 * +------------------------------------------------------+
510 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
511 * +------------------------------------------------------+
512 * 63 48 47 32 31 20 19 0
515 for (n = 0; n < adapter->num_rx_queues; n++) {
516 rx_ring = adapter->rx_ring[n];
517 pr_info("------------------------------------\n");
518 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
519 pr_info("------------------------------------\n");
520 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] "
521 "[bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
522 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] -----"
523 "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
525 for (i = 0; i < rx_ring->count; i++) {
526 const char *next_desc;
527 struct igb_rx_buffer *buffer_info;
528 buffer_info = &rx_ring->rx_buffer_info[i];
529 rx_desc = IGB_RX_DESC(rx_ring, i);
530 u0 = (struct my_u0 *)rx_desc;
531 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
533 if (i == rx_ring->next_to_use)
535 else if (i == rx_ring->next_to_clean)
540 if (staterr & E1000_RXD_STAT_DD) {
541 /* Descriptor Done */
542 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
548 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
552 (u64)buffer_info->dma,
555 if (netif_msg_pktdata(adapter) &&
556 buffer_info->dma && buffer_info->page) {
557 print_hex_dump(KERN_INFO, "",
560 page_address(buffer_info->page) +
561 buffer_info->page_offset,
573 * igb_get_i2c_data - Reads the I2C SDA data bit
574 * @hw: pointer to hardware structure
575 * @i2cctl: Current value of I2CCTL register
577 * Returns the I2C data bit value
579 static int igb_get_i2c_data(void *data)
581 struct igb_adapter *adapter = (struct igb_adapter *)data;
582 struct e1000_hw *hw = &adapter->hw;
583 s32 i2cctl = rd32(E1000_I2CPARAMS);
585 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
589 * igb_set_i2c_data - Sets the I2C data bit
590 * @data: pointer to hardware structure
591 * @state: I2C data value (0 or 1) to set
593 * Sets the I2C data bit
595 static void igb_set_i2c_data(void *data, int state)
597 struct igb_adapter *adapter = (struct igb_adapter *)data;
598 struct e1000_hw *hw = &adapter->hw;
599 s32 i2cctl = rd32(E1000_I2CPARAMS);
602 i2cctl |= E1000_I2C_DATA_OUT;
604 i2cctl &= ~E1000_I2C_DATA_OUT;
606 i2cctl &= ~E1000_I2C_DATA_OE_N;
607 i2cctl |= E1000_I2C_CLK_OE_N;
608 wr32(E1000_I2CPARAMS, i2cctl);
614 * igb_set_i2c_clk - Sets the I2C SCL clock
615 * @data: pointer to hardware structure
616 * @state: state to set clock
618 * Sets the I2C clock line to state
620 static void igb_set_i2c_clk(void *data, int state)
622 struct igb_adapter *adapter = (struct igb_adapter *)data;
623 struct e1000_hw *hw = &adapter->hw;
624 s32 i2cctl = rd32(E1000_I2CPARAMS);
627 i2cctl |= E1000_I2C_CLK_OUT;
628 i2cctl &= ~E1000_I2C_CLK_OE_N;
630 i2cctl &= ~E1000_I2C_CLK_OUT;
631 i2cctl &= ~E1000_I2C_CLK_OE_N;
633 wr32(E1000_I2CPARAMS, i2cctl);
638 * igb_get_i2c_clk - Gets the I2C SCL clock state
639 * @data: pointer to hardware structure
641 * Gets the I2C clock state
643 static int igb_get_i2c_clk(void *data)
645 struct igb_adapter *adapter = (struct igb_adapter *)data;
646 struct e1000_hw *hw = &adapter->hw;
647 s32 i2cctl = rd32(E1000_I2CPARAMS);
649 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
652 static const struct i2c_algo_bit_data igb_i2c_algo = {
653 .setsda = igb_set_i2c_data,
654 .setscl = igb_set_i2c_clk,
655 .getsda = igb_get_i2c_data,
656 .getscl = igb_get_i2c_clk,
662 * igb_get_hw_dev - return device
663 * @hw: pointer to hardware structure
665 * used by hardware layer to print debugging information
667 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
669 struct igb_adapter *adapter = hw->back;
670 return adapter->netdev;
674 * igb_init_module - Driver Registration Routine
676 * igb_init_module is the first routine called when the driver is
677 * loaded. All it does is register with the PCI subsystem.
679 static int __init igb_init_module(void)
682 pr_info("%s - version %s\n",
683 igb_driver_string, igb_driver_version);
685 pr_info("%s\n", igb_copyright);
687 #ifdef CONFIG_IGB_DCA
688 dca_register_notify(&dca_notifier);
690 ret = pci_register_driver(&igb_driver);
694 module_init(igb_init_module);
697 * igb_exit_module - Driver Exit Cleanup Routine
699 * igb_exit_module is called just before the driver is removed
702 static void __exit igb_exit_module(void)
704 #ifdef CONFIG_IGB_DCA
705 dca_unregister_notify(&dca_notifier);
707 pci_unregister_driver(&igb_driver);
710 module_exit(igb_exit_module);
712 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
714 * igb_cache_ring_register - Descriptor ring to register mapping
715 * @adapter: board private structure to initialize
717 * Once we know the feature-set enabled for the device, we'll cache
718 * the register offset the descriptor ring is assigned to.
720 static void igb_cache_ring_register(struct igb_adapter *adapter)
723 u32 rbase_offset = adapter->vfs_allocated_count;
725 switch (adapter->hw.mac.type) {
727 /* The queues are allocated for virtualization such that VF 0
728 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
729 * In order to avoid collision we start at the first free queue
730 * and continue consuming queues in the same sequence
732 if (adapter->vfs_allocated_count) {
733 for (; i < adapter->rss_queues; i++)
734 adapter->rx_ring[i]->reg_idx = rbase_offset +
744 for (; i < adapter->num_rx_queues; i++)
745 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
746 for (; j < adapter->num_tx_queues; j++)
747 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
753 * igb_write_ivar - configure ivar for given MSI-X vector
754 * @hw: pointer to the HW structure
755 * @msix_vector: vector number we are allocating to a given ring
756 * @index: row index of IVAR register to write within IVAR table
757 * @offset: column offset of in IVAR, should be multiple of 8
759 * This function is intended to handle the writing of the IVAR register
760 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
761 * each containing an cause allocation for an Rx and Tx ring, and a
762 * variable number of rows depending on the number of queues supported.
764 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
765 int index, int offset)
767 u32 ivar = array_rd32(E1000_IVAR0, index);
769 /* clear any bits that are currently set */
770 ivar &= ~((u32)0xFF << offset);
772 /* write vector and valid bit */
773 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
775 array_wr32(E1000_IVAR0, index, ivar);
778 #define IGB_N0_QUEUE -1
779 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
781 struct igb_adapter *adapter = q_vector->adapter;
782 struct e1000_hw *hw = &adapter->hw;
783 int rx_queue = IGB_N0_QUEUE;
784 int tx_queue = IGB_N0_QUEUE;
787 if (q_vector->rx.ring)
788 rx_queue = q_vector->rx.ring->reg_idx;
789 if (q_vector->tx.ring)
790 tx_queue = q_vector->tx.ring->reg_idx;
792 switch (hw->mac.type) {
794 /* The 82575 assigns vectors using a bitmask, which matches the
795 * bitmask for the EICR/EIMS/EIMC registers. To assign one
796 * or more queues to a vector, we write the appropriate bits
797 * into the MSIXBM register for that vector.
799 if (rx_queue > IGB_N0_QUEUE)
800 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
801 if (tx_queue > IGB_N0_QUEUE)
802 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
803 if (!adapter->msix_entries && msix_vector == 0)
804 msixbm |= E1000_EIMS_OTHER;
805 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
806 q_vector->eims_value = msixbm;
809 /* 82576 uses a table that essentially consists of 2 columns
810 * with 8 rows. The ordering is column-major so we use the
811 * lower 3 bits as the row index, and the 4th bit as the
814 if (rx_queue > IGB_N0_QUEUE)
815 igb_write_ivar(hw, msix_vector,
817 (rx_queue & 0x8) << 1);
818 if (tx_queue > IGB_N0_QUEUE)
819 igb_write_ivar(hw, msix_vector,
821 ((tx_queue & 0x8) << 1) + 8);
822 q_vector->eims_value = 1 << msix_vector;
829 /* On 82580 and newer adapters the scheme is similar to 82576
830 * however instead of ordering column-major we have things
831 * ordered row-major. So we traverse the table by using
832 * bit 0 as the column offset, and the remaining bits as the
835 if (rx_queue > IGB_N0_QUEUE)
836 igb_write_ivar(hw, msix_vector,
838 (rx_queue & 0x1) << 4);
839 if (tx_queue > IGB_N0_QUEUE)
840 igb_write_ivar(hw, msix_vector,
842 ((tx_queue & 0x1) << 4) + 8);
843 q_vector->eims_value = 1 << msix_vector;
850 /* add q_vector eims value to global eims_enable_mask */
851 adapter->eims_enable_mask |= q_vector->eims_value;
853 /* configure q_vector to set itr on first interrupt */
854 q_vector->set_itr = 1;
858 * igb_configure_msix - Configure MSI-X hardware
859 * @adapter: board private structure to initialize
861 * igb_configure_msix sets up the hardware to properly
862 * generate MSI-X interrupts.
864 static void igb_configure_msix(struct igb_adapter *adapter)
868 struct e1000_hw *hw = &adapter->hw;
870 adapter->eims_enable_mask = 0;
872 /* set vector for other causes, i.e. link changes */
873 switch (hw->mac.type) {
875 tmp = rd32(E1000_CTRL_EXT);
876 /* enable MSI-X PBA support*/
877 tmp |= E1000_CTRL_EXT_PBA_CLR;
879 /* Auto-Mask interrupts upon ICR read. */
880 tmp |= E1000_CTRL_EXT_EIAME;
881 tmp |= E1000_CTRL_EXT_IRCA;
883 wr32(E1000_CTRL_EXT, tmp);
885 /* enable msix_other interrupt */
886 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
887 adapter->eims_other = E1000_EIMS_OTHER;
897 /* Turn on MSI-X capability first, or our settings
898 * won't stick. And it will take days to debug.
900 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
901 E1000_GPIE_PBA | E1000_GPIE_EIAME |
904 /* enable msix_other interrupt */
905 adapter->eims_other = 1 << vector;
906 tmp = (vector++ | E1000_IVAR_VALID) << 8;
908 wr32(E1000_IVAR_MISC, tmp);
911 /* do nothing, since nothing else supports MSI-X */
913 } /* switch (hw->mac.type) */
915 adapter->eims_enable_mask |= adapter->eims_other;
917 for (i = 0; i < adapter->num_q_vectors; i++)
918 igb_assign_vector(adapter->q_vector[i], vector++);
924 * igb_request_msix - Initialize MSI-X interrupts
925 * @adapter: board private structure to initialize
927 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
930 static int igb_request_msix(struct igb_adapter *adapter)
932 struct net_device *netdev = adapter->netdev;
933 struct e1000_hw *hw = &adapter->hw;
934 int i, err = 0, vector = 0, free_vector = 0;
936 err = request_irq(adapter->msix_entries[vector].vector,
937 igb_msix_other, 0, netdev->name, adapter);
941 for (i = 0; i < adapter->num_q_vectors; i++) {
942 struct igb_q_vector *q_vector = adapter->q_vector[i];
946 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
948 if (q_vector->rx.ring && q_vector->tx.ring)
949 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
950 q_vector->rx.ring->queue_index);
951 else if (q_vector->tx.ring)
952 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
953 q_vector->tx.ring->queue_index);
954 else if (q_vector->rx.ring)
955 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
956 q_vector->rx.ring->queue_index);
958 sprintf(q_vector->name, "%s-unused", netdev->name);
960 err = request_irq(adapter->msix_entries[vector].vector,
961 igb_msix_ring, 0, q_vector->name,
967 igb_configure_msix(adapter);
971 /* free already assigned IRQs */
972 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
975 for (i = 0; i < vector; i++) {
976 free_irq(adapter->msix_entries[free_vector++].vector,
977 adapter->q_vector[i]);
983 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
985 if (adapter->msix_entries) {
986 pci_disable_msix(adapter->pdev);
987 kfree(adapter->msix_entries);
988 adapter->msix_entries = NULL;
989 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
990 pci_disable_msi(adapter->pdev);
995 * igb_free_q_vector - Free memory allocated for specific interrupt vector
996 * @adapter: board private structure to initialize
997 * @v_idx: Index of vector to be freed
999 * This function frees the memory allocated to the q_vector. In addition if
1000 * NAPI is enabled it will delete any references to the NAPI struct prior
1001 * to freeing the q_vector.
1003 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1005 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1007 if (q_vector->tx.ring)
1008 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1010 if (q_vector->rx.ring)
1011 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1013 adapter->q_vector[v_idx] = NULL;
1014 netif_napi_del(&q_vector->napi);
1016 /* ixgbe_get_stats64() might access the rings on this vector,
1017 * we must wait a grace period before freeing it.
1019 kfree_rcu(q_vector, rcu);
1023 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1024 * @adapter: board private structure to initialize
1026 * This function frees the memory allocated to the q_vectors. In addition if
1027 * NAPI is enabled it will delete any references to the NAPI struct prior
1028 * to freeing the q_vector.
1030 static void igb_free_q_vectors(struct igb_adapter *adapter)
1032 int v_idx = adapter->num_q_vectors;
1034 adapter->num_tx_queues = 0;
1035 adapter->num_rx_queues = 0;
1036 adapter->num_q_vectors = 0;
1039 igb_free_q_vector(adapter, v_idx);
1043 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1044 * @adapter: board private structure to initialize
1046 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1047 * MSI-X interrupts allocated.
1049 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1051 igb_free_q_vectors(adapter);
1052 igb_reset_interrupt_capability(adapter);
1056 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1057 * @adapter: board private structure to initialize
1058 * @msix: boolean value of MSIX capability
1060 * Attempt to configure interrupts using the best available
1061 * capabilities of the hardware and kernel.
1063 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1071 /* Number of supported queues. */
1072 adapter->num_rx_queues = adapter->rss_queues;
1073 if (adapter->vfs_allocated_count)
1074 adapter->num_tx_queues = 1;
1076 adapter->num_tx_queues = adapter->rss_queues;
1078 /* start with one vector for every Rx queue */
1079 numvecs = adapter->num_rx_queues;
1081 /* if Tx handler is separate add 1 for every Tx queue */
1082 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1083 numvecs += adapter->num_tx_queues;
1085 /* store the number of vectors reserved for queues */
1086 adapter->num_q_vectors = numvecs;
1088 /* add 1 vector for link status interrupts */
1090 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1093 if (!adapter->msix_entries)
1096 for (i = 0; i < numvecs; i++)
1097 adapter->msix_entries[i].entry = i;
1099 err = pci_enable_msix(adapter->pdev,
1100 adapter->msix_entries,
1105 igb_reset_interrupt_capability(adapter);
1107 /* If we can't do MSI-X, try MSI */
1109 #ifdef CONFIG_PCI_IOV
1110 /* disable SR-IOV for non MSI-X configurations */
1111 if (adapter->vf_data) {
1112 struct e1000_hw *hw = &adapter->hw;
1113 /* disable iov and allow time for transactions to clear */
1114 pci_disable_sriov(adapter->pdev);
1117 kfree(adapter->vf_data);
1118 adapter->vf_data = NULL;
1119 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1122 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1125 adapter->vfs_allocated_count = 0;
1126 adapter->rss_queues = 1;
1127 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1128 adapter->num_rx_queues = 1;
1129 adapter->num_tx_queues = 1;
1130 adapter->num_q_vectors = 1;
1131 if (!pci_enable_msi(adapter->pdev))
1132 adapter->flags |= IGB_FLAG_HAS_MSI;
1135 static void igb_add_ring(struct igb_ring *ring,
1136 struct igb_ring_container *head)
1143 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1144 * @adapter: board private structure to initialize
1145 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1146 * @v_idx: index of vector in adapter struct
1147 * @txr_count: total number of Tx rings to allocate
1148 * @txr_idx: index of first Tx ring to allocate
1149 * @rxr_count: total number of Rx rings to allocate
1150 * @rxr_idx: index of first Rx ring to allocate
1152 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1154 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1155 int v_count, int v_idx,
1156 int txr_count, int txr_idx,
1157 int rxr_count, int rxr_idx)
1159 struct igb_q_vector *q_vector;
1160 struct igb_ring *ring;
1161 int ring_count, size;
1163 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1164 if (txr_count > 1 || rxr_count > 1)
1167 ring_count = txr_count + rxr_count;
1168 size = sizeof(struct igb_q_vector) +
1169 (sizeof(struct igb_ring) * ring_count);
1171 /* allocate q_vector and rings */
1172 q_vector = kzalloc(size, GFP_KERNEL);
1176 /* initialize NAPI */
1177 netif_napi_add(adapter->netdev, &q_vector->napi,
1180 /* tie q_vector and adapter together */
1181 adapter->q_vector[v_idx] = q_vector;
1182 q_vector->adapter = adapter;
1184 /* initialize work limits */
1185 q_vector->tx.work_limit = adapter->tx_work_limit;
1187 /* initialize ITR configuration */
1188 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1189 q_vector->itr_val = IGB_START_ITR;
1191 /* initialize pointer to rings */
1192 ring = q_vector->ring;
1196 /* rx or rx/tx vector */
1197 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1198 q_vector->itr_val = adapter->rx_itr_setting;
1200 /* tx only vector */
1201 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1202 q_vector->itr_val = adapter->tx_itr_setting;
1206 /* assign generic ring traits */
1207 ring->dev = &adapter->pdev->dev;
1208 ring->netdev = adapter->netdev;
1210 /* configure backlink on ring */
1211 ring->q_vector = q_vector;
1213 /* update q_vector Tx values */
1214 igb_add_ring(ring, &q_vector->tx);
1216 /* For 82575, context index must be unique per ring. */
1217 if (adapter->hw.mac.type == e1000_82575)
1218 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1220 /* apply Tx specific ring traits */
1221 ring->count = adapter->tx_ring_count;
1222 ring->queue_index = txr_idx;
1224 /* assign ring to adapter */
1225 adapter->tx_ring[txr_idx] = ring;
1227 /* push pointer to next ring */
1232 /* assign generic ring traits */
1233 ring->dev = &adapter->pdev->dev;
1234 ring->netdev = adapter->netdev;
1236 /* configure backlink on ring */
1237 ring->q_vector = q_vector;
1239 /* update q_vector Rx values */
1240 igb_add_ring(ring, &q_vector->rx);
1242 /* set flag indicating ring supports SCTP checksum offload */
1243 if (adapter->hw.mac.type >= e1000_82576)
1244 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1247 * On i350, i354, i210, and i211, loopback VLAN packets
1248 * have the tag byte-swapped.
1250 if (adapter->hw.mac.type >= e1000_i350)
1251 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1253 /* apply Rx specific ring traits */
1254 ring->count = adapter->rx_ring_count;
1255 ring->queue_index = rxr_idx;
1257 /* assign ring to adapter */
1258 adapter->rx_ring[rxr_idx] = ring;
1266 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1267 * @adapter: board private structure to initialize
1269 * We allocate one q_vector per queue interrupt. If allocation fails we
1272 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1274 int q_vectors = adapter->num_q_vectors;
1275 int rxr_remaining = adapter->num_rx_queues;
1276 int txr_remaining = adapter->num_tx_queues;
1277 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1280 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1281 for (; rxr_remaining; v_idx++) {
1282 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1288 /* update counts and index */
1294 for (; v_idx < q_vectors; v_idx++) {
1295 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1296 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1297 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1298 tqpv, txr_idx, rqpv, rxr_idx);
1303 /* update counts and index */
1304 rxr_remaining -= rqpv;
1305 txr_remaining -= tqpv;
1313 adapter->num_tx_queues = 0;
1314 adapter->num_rx_queues = 0;
1315 adapter->num_q_vectors = 0;
1318 igb_free_q_vector(adapter, v_idx);
1324 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1325 * @adapter: board private structure to initialize
1326 * @msix: boolean value of MSIX capability
1328 * This function initializes the interrupts and allocates all of the queues.
1330 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1332 struct pci_dev *pdev = adapter->pdev;
1335 igb_set_interrupt_capability(adapter, msix);
1337 err = igb_alloc_q_vectors(adapter);
1339 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1340 goto err_alloc_q_vectors;
1343 igb_cache_ring_register(adapter);
1347 err_alloc_q_vectors:
1348 igb_reset_interrupt_capability(adapter);
1353 * igb_request_irq - initialize interrupts
1354 * @adapter: board private structure to initialize
1356 * Attempts to configure interrupts using the best available
1357 * capabilities of the hardware and kernel.
1359 static int igb_request_irq(struct igb_adapter *adapter)
1361 struct net_device *netdev = adapter->netdev;
1362 struct pci_dev *pdev = adapter->pdev;
1365 if (adapter->msix_entries) {
1366 err = igb_request_msix(adapter);
1369 /* fall back to MSI */
1370 igb_free_all_tx_resources(adapter);
1371 igb_free_all_rx_resources(adapter);
1373 igb_clear_interrupt_scheme(adapter);
1374 err = igb_init_interrupt_scheme(adapter, false);
1378 igb_setup_all_tx_resources(adapter);
1379 igb_setup_all_rx_resources(adapter);
1380 igb_configure(adapter);
1383 igb_assign_vector(adapter->q_vector[0], 0);
1385 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1386 err = request_irq(pdev->irq, igb_intr_msi, 0,
1387 netdev->name, adapter);
1391 /* fall back to legacy interrupts */
1392 igb_reset_interrupt_capability(adapter);
1393 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1396 err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1397 netdev->name, adapter);
1400 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1407 static void igb_free_irq(struct igb_adapter *adapter)
1409 if (adapter->msix_entries) {
1412 free_irq(adapter->msix_entries[vector++].vector, adapter);
1414 for (i = 0; i < adapter->num_q_vectors; i++)
1415 free_irq(adapter->msix_entries[vector++].vector,
1416 adapter->q_vector[i]);
1418 free_irq(adapter->pdev->irq, adapter);
1423 * igb_irq_disable - Mask off interrupt generation on the NIC
1424 * @adapter: board private structure
1426 static void igb_irq_disable(struct igb_adapter *adapter)
1428 struct e1000_hw *hw = &adapter->hw;
1430 /* we need to be careful when disabling interrupts. The VFs are also
1431 * mapped into these registers and so clearing the bits can cause
1432 * issues on the VF drivers so we only need to clear what we set
1434 if (adapter->msix_entries) {
1435 u32 regval = rd32(E1000_EIAM);
1436 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1437 wr32(E1000_EIMC, adapter->eims_enable_mask);
1438 regval = rd32(E1000_EIAC);
1439 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1443 wr32(E1000_IMC, ~0);
1445 if (adapter->msix_entries) {
1447 for (i = 0; i < adapter->num_q_vectors; i++)
1448 synchronize_irq(adapter->msix_entries[i].vector);
1450 synchronize_irq(adapter->pdev->irq);
1455 * igb_irq_enable - Enable default interrupt generation settings
1456 * @adapter: board private structure
1458 static void igb_irq_enable(struct igb_adapter *adapter)
1460 struct e1000_hw *hw = &adapter->hw;
1462 if (adapter->msix_entries) {
1463 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1464 u32 regval = rd32(E1000_EIAC);
1465 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1466 regval = rd32(E1000_EIAM);
1467 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1468 wr32(E1000_EIMS, adapter->eims_enable_mask);
1469 if (adapter->vfs_allocated_count) {
1470 wr32(E1000_MBVFIMR, 0xFF);
1471 ims |= E1000_IMS_VMMB;
1473 wr32(E1000_IMS, ims);
1475 wr32(E1000_IMS, IMS_ENABLE_MASK |
1477 wr32(E1000_IAM, IMS_ENABLE_MASK |
1482 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1484 struct e1000_hw *hw = &adapter->hw;
1485 u16 vid = adapter->hw.mng_cookie.vlan_id;
1486 u16 old_vid = adapter->mng_vlan_id;
1488 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1489 /* add VID to filter table */
1490 igb_vfta_set(hw, vid, true);
1491 adapter->mng_vlan_id = vid;
1493 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1496 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1498 !test_bit(old_vid, adapter->active_vlans)) {
1499 /* remove VID from filter table */
1500 igb_vfta_set(hw, old_vid, false);
1505 * igb_release_hw_control - release control of the h/w to f/w
1506 * @adapter: address of board private structure
1508 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1509 * For ASF and Pass Through versions of f/w this means that the
1510 * driver is no longer loaded.
1512 static void igb_release_hw_control(struct igb_adapter *adapter)
1514 struct e1000_hw *hw = &adapter->hw;
1517 /* Let firmware take over control of h/w */
1518 ctrl_ext = rd32(E1000_CTRL_EXT);
1519 wr32(E1000_CTRL_EXT,
1520 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1524 * igb_get_hw_control - get control of the h/w from f/w
1525 * @adapter: address of board private structure
1527 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1528 * For ASF and Pass Through versions of f/w this means that
1529 * the driver is loaded.
1531 static void igb_get_hw_control(struct igb_adapter *adapter)
1533 struct e1000_hw *hw = &adapter->hw;
1536 /* Let firmware know the driver has taken over */
1537 ctrl_ext = rd32(E1000_CTRL_EXT);
1538 wr32(E1000_CTRL_EXT,
1539 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1543 * igb_configure - configure the hardware for RX and TX
1544 * @adapter: private board structure
1546 static void igb_configure(struct igb_adapter *adapter)
1548 struct net_device *netdev = adapter->netdev;
1551 igb_get_hw_control(adapter);
1552 igb_set_rx_mode(netdev);
1554 igb_restore_vlan(adapter);
1556 igb_setup_tctl(adapter);
1557 igb_setup_mrqc(adapter);
1558 igb_setup_rctl(adapter);
1560 igb_configure_tx(adapter);
1561 igb_configure_rx(adapter);
1563 igb_rx_fifo_flush_82575(&adapter->hw);
1565 /* call igb_desc_unused which always leaves
1566 * at least 1 descriptor unused to make sure
1567 * next_to_use != next_to_clean
1569 for (i = 0; i < adapter->num_rx_queues; i++) {
1570 struct igb_ring *ring = adapter->rx_ring[i];
1571 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1576 * igb_power_up_link - Power up the phy/serdes link
1577 * @adapter: address of board private structure
1579 void igb_power_up_link(struct igb_adapter *adapter)
1581 igb_reset_phy(&adapter->hw);
1583 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1584 igb_power_up_phy_copper(&adapter->hw);
1586 igb_power_up_serdes_link_82575(&adapter->hw);
1588 igb_setup_link(&adapter->hw);
1592 * igb_power_down_link - Power down the phy/serdes link
1593 * @adapter: address of board private structure
1595 static void igb_power_down_link(struct igb_adapter *adapter)
1597 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1598 igb_power_down_phy_copper_82575(&adapter->hw);
1600 igb_shutdown_serdes_link_82575(&adapter->hw);
1604 * igb_up - Open the interface and prepare it to handle traffic
1605 * @adapter: board private structure
1607 int igb_up(struct igb_adapter *adapter)
1609 struct e1000_hw *hw = &adapter->hw;
1612 /* hardware has been reset, we need to reload some things */
1613 igb_configure(adapter);
1615 clear_bit(__IGB_DOWN, &adapter->state);
1617 for (i = 0; i < adapter->num_q_vectors; i++)
1618 napi_enable(&(adapter->q_vector[i]->napi));
1620 if (adapter->msix_entries)
1621 igb_configure_msix(adapter);
1623 igb_assign_vector(adapter->q_vector[0], 0);
1625 /* Clear any pending interrupts. */
1627 igb_irq_enable(adapter);
1629 /* notify VFs that reset has been completed */
1630 if (adapter->vfs_allocated_count) {
1631 u32 reg_data = rd32(E1000_CTRL_EXT);
1632 reg_data |= E1000_CTRL_EXT_PFRSTD;
1633 wr32(E1000_CTRL_EXT, reg_data);
1636 netif_tx_start_all_queues(adapter->netdev);
1638 /* start the watchdog. */
1639 hw->mac.get_link_status = 1;
1640 schedule_work(&adapter->watchdog_task);
1645 void igb_down(struct igb_adapter *adapter)
1647 struct net_device *netdev = adapter->netdev;
1648 struct e1000_hw *hw = &adapter->hw;
1652 /* signal that we're down so the interrupt handler does not
1653 * reschedule our watchdog timer
1655 set_bit(__IGB_DOWN, &adapter->state);
1657 /* disable receives in the hardware */
1658 rctl = rd32(E1000_RCTL);
1659 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1660 /* flush and sleep below */
1662 netif_tx_stop_all_queues(netdev);
1664 /* disable transmits in the hardware */
1665 tctl = rd32(E1000_TCTL);
1666 tctl &= ~E1000_TCTL_EN;
1667 wr32(E1000_TCTL, tctl);
1668 /* flush both disables and wait for them to finish */
1672 for (i = 0; i < adapter->num_q_vectors; i++)
1673 napi_disable(&(adapter->q_vector[i]->napi));
1675 igb_irq_disable(adapter);
1677 del_timer_sync(&adapter->watchdog_timer);
1678 del_timer_sync(&adapter->phy_info_timer);
1680 netif_carrier_off(netdev);
1682 /* record the stats before reset*/
1683 spin_lock(&adapter->stats64_lock);
1684 igb_update_stats(adapter, &adapter->stats64);
1685 spin_unlock(&adapter->stats64_lock);
1687 adapter->link_speed = 0;
1688 adapter->link_duplex = 0;
1690 if (!pci_channel_offline(adapter->pdev))
1692 igb_clean_all_tx_rings(adapter);
1693 igb_clean_all_rx_rings(adapter);
1694 #ifdef CONFIG_IGB_DCA
1696 /* since we reset the hardware DCA settings were cleared */
1697 igb_setup_dca(adapter);
1701 void igb_reinit_locked(struct igb_adapter *adapter)
1703 WARN_ON(in_interrupt());
1704 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1708 clear_bit(__IGB_RESETTING, &adapter->state);
1711 void igb_reset(struct igb_adapter *adapter)
1713 struct pci_dev *pdev = adapter->pdev;
1714 struct e1000_hw *hw = &adapter->hw;
1715 struct e1000_mac_info *mac = &hw->mac;
1716 struct e1000_fc_info *fc = &hw->fc;
1717 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1719 /* Repartition Pba for greater than 9k mtu
1720 * To take effect CTRL.RST is required.
1722 switch (mac->type) {
1726 pba = rd32(E1000_RXPBS);
1727 pba = igb_rxpbs_adjust_82580(pba);
1730 pba = rd32(E1000_RXPBS);
1731 pba &= E1000_RXPBS_SIZE_MASK_82576;
1737 pba = E1000_PBA_34K;
1741 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1742 (mac->type < e1000_82576)) {
1743 /* adjust PBA for jumbo frames */
1744 wr32(E1000_PBA, pba);
1746 /* To maintain wire speed transmits, the Tx FIFO should be
1747 * large enough to accommodate two full transmit packets,
1748 * rounded up to the next 1KB and expressed in KB. Likewise,
1749 * the Rx FIFO should be large enough to accommodate at least
1750 * one full receive packet and is similarly rounded up and
1753 pba = rd32(E1000_PBA);
1754 /* upper 16 bits has Tx packet buffer allocation size in KB */
1755 tx_space = pba >> 16;
1756 /* lower 16 bits has Rx packet buffer allocation size in KB */
1758 /* the Tx fifo also stores 16 bytes of information about the Tx
1759 * but don't include ethernet FCS because hardware appends it
1761 min_tx_space = (adapter->max_frame_size +
1762 sizeof(union e1000_adv_tx_desc) -
1764 min_tx_space = ALIGN(min_tx_space, 1024);
1765 min_tx_space >>= 10;
1766 /* software strips receive CRC, so leave room for it */
1767 min_rx_space = adapter->max_frame_size;
1768 min_rx_space = ALIGN(min_rx_space, 1024);
1769 min_rx_space >>= 10;
1771 /* If current Tx allocation is less than the min Tx FIFO size,
1772 * and the min Tx FIFO size is less than the current Rx FIFO
1773 * allocation, take space away from current Rx allocation
1775 if (tx_space < min_tx_space &&
1776 ((min_tx_space - tx_space) < pba)) {
1777 pba = pba - (min_tx_space - tx_space);
1779 /* if short on Rx space, Rx wins and must trump Tx
1782 if (pba < min_rx_space)
1785 wr32(E1000_PBA, pba);
1788 /* flow control settings */
1789 /* The high water mark must be low enough to fit one full frame
1790 * (or the size used for early receive) above it in the Rx FIFO.
1791 * Set it to the lower of:
1792 * - 90% of the Rx FIFO size, or
1793 * - the full Rx FIFO size minus one full frame
1795 hwm = min(((pba << 10) * 9 / 10),
1796 ((pba << 10) - 2 * adapter->max_frame_size));
1798 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1799 fc->low_water = fc->high_water - 16;
1800 fc->pause_time = 0xFFFF;
1802 fc->current_mode = fc->requested_mode;
1804 /* disable receive for all VFs and wait one second */
1805 if (adapter->vfs_allocated_count) {
1807 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1808 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1810 /* ping all the active vfs to let them know we are going down */
1811 igb_ping_all_vfs(adapter);
1813 /* disable transmits and receives */
1814 wr32(E1000_VFRE, 0);
1815 wr32(E1000_VFTE, 0);
1818 /* Allow time for pending master requests to run */
1819 hw->mac.ops.reset_hw(hw);
1822 if (hw->mac.ops.init_hw(hw))
1823 dev_err(&pdev->dev, "Hardware Error\n");
1825 /* Flow control settings reset on hardware reset, so guarantee flow
1826 * control is off when forcing speed.
1828 if (!hw->mac.autoneg)
1829 igb_force_mac_fc(hw);
1831 igb_init_dmac(adapter, pba);
1832 #ifdef CONFIG_IGB_HWMON
1833 /* Re-initialize the thermal sensor on i350 devices. */
1834 if (!test_bit(__IGB_DOWN, &adapter->state)) {
1835 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1836 /* If present, re-initialize the external thermal sensor
1840 mac->ops.init_thermal_sensor_thresh(hw);
1844 if (!netif_running(adapter->netdev))
1845 igb_power_down_link(adapter);
1847 igb_update_mng_vlan(adapter);
1849 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1850 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1852 /* Re-enable PTP, where applicable. */
1853 igb_ptp_reset(adapter);
1855 igb_get_phy_info(hw);
1858 static netdev_features_t igb_fix_features(struct net_device *netdev,
1859 netdev_features_t features)
1861 /* Since there is no support for separate Rx/Tx vlan accel
1862 * enable/disable make sure Tx flag is always in same state as Rx.
1864 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1865 features |= NETIF_F_HW_VLAN_CTAG_TX;
1867 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
1872 static int igb_set_features(struct net_device *netdev,
1873 netdev_features_t features)
1875 netdev_features_t changed = netdev->features ^ features;
1876 struct igb_adapter *adapter = netdev_priv(netdev);
1878 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1879 igb_vlan_mode(netdev, features);
1881 if (!(changed & NETIF_F_RXALL))
1884 netdev->features = features;
1886 if (netif_running(netdev))
1887 igb_reinit_locked(adapter);
1894 static const struct net_device_ops igb_netdev_ops = {
1895 .ndo_open = igb_open,
1896 .ndo_stop = igb_close,
1897 .ndo_start_xmit = igb_xmit_frame,
1898 .ndo_get_stats64 = igb_get_stats64,
1899 .ndo_set_rx_mode = igb_set_rx_mode,
1900 .ndo_set_mac_address = igb_set_mac,
1901 .ndo_change_mtu = igb_change_mtu,
1902 .ndo_do_ioctl = igb_ioctl,
1903 .ndo_tx_timeout = igb_tx_timeout,
1904 .ndo_validate_addr = eth_validate_addr,
1905 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
1906 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
1907 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
1908 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
1909 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
1910 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
1911 .ndo_get_vf_config = igb_ndo_get_vf_config,
1912 #ifdef CONFIG_NET_POLL_CONTROLLER
1913 .ndo_poll_controller = igb_netpoll,
1915 .ndo_fix_features = igb_fix_features,
1916 .ndo_set_features = igb_set_features,
1920 * igb_set_fw_version - Configure version string for ethtool
1921 * @adapter: adapter struct
1923 void igb_set_fw_version(struct igb_adapter *adapter)
1925 struct e1000_hw *hw = &adapter->hw;
1926 struct e1000_fw_version fw;
1928 igb_get_fw_version(hw, &fw);
1930 switch (hw->mac.type) {
1932 snprintf(adapter->fw_version, sizeof(adapter->fw_version),
1934 fw.invm_major, fw.invm_minor, fw.invm_img_type);
1938 /* if option is rom valid, display its version too */
1940 snprintf(adapter->fw_version,
1941 sizeof(adapter->fw_version),
1942 "%d.%d, 0x%08x, %d.%d.%d",
1943 fw.eep_major, fw.eep_minor, fw.etrack_id,
1944 fw.or_major, fw.or_build, fw.or_patch);
1947 snprintf(adapter->fw_version,
1948 sizeof(adapter->fw_version),
1950 fw.eep_major, fw.eep_minor, fw.etrack_id);
1958 * igb_init_i2c - Init I2C interface
1959 * @adapter: pointer to adapter structure
1961 static s32 igb_init_i2c(struct igb_adapter *adapter)
1963 s32 status = E1000_SUCCESS;
1965 /* I2C interface supported on i350 devices */
1966 if (adapter->hw.mac.type != e1000_i350)
1967 return E1000_SUCCESS;
1969 /* Initialize the i2c bus which is controlled by the registers.
1970 * This bus will use the i2c_algo_bit structue that implements
1971 * the protocol through toggling of the 4 bits in the register.
1973 adapter->i2c_adap.owner = THIS_MODULE;
1974 adapter->i2c_algo = igb_i2c_algo;
1975 adapter->i2c_algo.data = adapter;
1976 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1977 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1978 strlcpy(adapter->i2c_adap.name, "igb BB",
1979 sizeof(adapter->i2c_adap.name));
1980 status = i2c_bit_add_bus(&adapter->i2c_adap);
1985 * igb_probe - Device Initialization Routine
1986 * @pdev: PCI device information struct
1987 * @ent: entry in igb_pci_tbl
1989 * Returns 0 on success, negative on failure
1991 * igb_probe initializes an adapter identified by a pci_dev structure.
1992 * The OS initialization, configuring of the adapter private structure,
1993 * and a hardware reset occur.
1995 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1997 struct net_device *netdev;
1998 struct igb_adapter *adapter;
1999 struct e1000_hw *hw;
2000 u16 eeprom_data = 0;
2002 static int global_quad_port_a; /* global quad port a indication */
2003 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2004 unsigned long mmio_start, mmio_len;
2005 int err, pci_using_dac;
2006 u8 part_str[E1000_PBANUM_LENGTH];
2008 /* Catch broken hardware that put the wrong VF device ID in
2009 * the PCIe SR-IOV capability.
2011 if (pdev->is_virtfn) {
2012 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2013 pci_name(pdev), pdev->vendor, pdev->device);
2017 err = pci_enable_device_mem(pdev);
2022 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
2024 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
2028 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
2030 err = dma_set_coherent_mask(&pdev->dev,
2034 "No usable DMA configuration, aborting\n");
2040 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2046 pci_enable_pcie_error_reporting(pdev);
2048 pci_set_master(pdev);
2049 pci_save_state(pdev);
2052 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2055 goto err_alloc_etherdev;
2057 SET_NETDEV_DEV(netdev, &pdev->dev);
2059 pci_set_drvdata(pdev, netdev);
2060 adapter = netdev_priv(netdev);
2061 adapter->netdev = netdev;
2062 adapter->pdev = pdev;
2065 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2067 mmio_start = pci_resource_start(pdev, 0);
2068 mmio_len = pci_resource_len(pdev, 0);
2071 hw->hw_addr = ioremap(mmio_start, mmio_len);
2075 netdev->netdev_ops = &igb_netdev_ops;
2076 igb_set_ethtool_ops(netdev);
2077 netdev->watchdog_timeo = 5 * HZ;
2079 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2081 netdev->mem_start = mmio_start;
2082 netdev->mem_end = mmio_start + mmio_len;
2084 /* PCI config space info */
2085 hw->vendor_id = pdev->vendor;
2086 hw->device_id = pdev->device;
2087 hw->revision_id = pdev->revision;
2088 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2089 hw->subsystem_device_id = pdev->subsystem_device;
2091 /* Copy the default MAC, PHY and NVM function pointers */
2092 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2093 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2094 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2095 /* Initialize skew-specific constants */
2096 err = ei->get_invariants(hw);
2100 /* setup the private structure */
2101 err = igb_sw_init(adapter);
2105 igb_get_bus_info_pcie(hw);
2107 hw->phy.autoneg_wait_to_complete = false;
2109 /* Copper options */
2110 if (hw->phy.media_type == e1000_media_type_copper) {
2111 hw->phy.mdix = AUTO_ALL_MODES;
2112 hw->phy.disable_polarity_correction = false;
2113 hw->phy.ms_type = e1000_ms_hw_default;
2116 if (igb_check_reset_block(hw))
2117 dev_info(&pdev->dev,
2118 "PHY reset is blocked due to SOL/IDER session.\n");
2120 /* features is initialized to 0 in allocation, it might have bits
2121 * set by igb_sw_init so we should use an or instead of an
2124 netdev->features |= NETIF_F_SG |
2131 NETIF_F_HW_VLAN_CTAG_RX |
2132 NETIF_F_HW_VLAN_CTAG_TX;
2134 /* copy netdev features into list of user selectable features */
2135 netdev->hw_features |= netdev->features;
2136 netdev->hw_features |= NETIF_F_RXALL;
2138 /* set this bit last since it cannot be part of hw_features */
2139 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2141 netdev->vlan_features |= NETIF_F_TSO |
2147 netdev->priv_flags |= IFF_SUPP_NOFCS;
2149 if (pci_using_dac) {
2150 netdev->features |= NETIF_F_HIGHDMA;
2151 netdev->vlan_features |= NETIF_F_HIGHDMA;
2154 if (hw->mac.type >= e1000_82576) {
2155 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2156 netdev->features |= NETIF_F_SCTP_CSUM;
2159 netdev->priv_flags |= IFF_UNICAST_FLT;
2161 adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2163 /* before reading the NVM, reset the controller to put the device in a
2164 * known good starting state
2166 hw->mac.ops.reset_hw(hw);
2168 /* make sure the NVM is good , i211 parts have special NVM that
2169 * doesn't contain a checksum
2171 if (hw->mac.type != e1000_i211) {
2172 if (hw->nvm.ops.validate(hw) < 0) {
2173 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2179 /* copy the MAC address out of the NVM */
2180 if (hw->mac.ops.read_mac_addr(hw))
2181 dev_err(&pdev->dev, "NVM Read Error\n");
2183 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2185 if (!is_valid_ether_addr(netdev->dev_addr)) {
2186 dev_err(&pdev->dev, "Invalid MAC Address\n");
2191 /* get firmware version for ethtool -i */
2192 igb_set_fw_version(adapter);
2194 setup_timer(&adapter->watchdog_timer, igb_watchdog,
2195 (unsigned long) adapter);
2196 setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2197 (unsigned long) adapter);
2199 INIT_WORK(&adapter->reset_task, igb_reset_task);
2200 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2202 /* Initialize link properties that are user-changeable */
2203 adapter->fc_autoneg = true;
2204 hw->mac.autoneg = true;
2205 hw->phy.autoneg_advertised = 0x2f;
2207 hw->fc.requested_mode = e1000_fc_default;
2208 hw->fc.current_mode = e1000_fc_default;
2210 igb_validate_mdi_setting(hw);
2212 /* By default, support wake on port A */
2213 if (hw->bus.func == 0)
2214 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2216 /* Check the NVM for wake support on non-port A ports */
2217 if (hw->mac.type >= e1000_82580)
2218 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2219 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2221 else if (hw->bus.func == 1)
2222 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2224 if (eeprom_data & IGB_EEPROM_APME)
2225 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2227 /* now that we have the eeprom settings, apply the special cases where
2228 * the eeprom may be wrong or the board simply won't support wake on
2229 * lan on a particular port
2231 switch (pdev->device) {
2232 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2233 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2235 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2236 case E1000_DEV_ID_82576_FIBER:
2237 case E1000_DEV_ID_82576_SERDES:
2238 /* Wake events only supported on port A for dual fiber
2239 * regardless of eeprom setting
2241 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2242 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2244 case E1000_DEV_ID_82576_QUAD_COPPER:
2245 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2246 /* if quad port adapter, disable WoL on all but port A */
2247 if (global_quad_port_a != 0)
2248 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2250 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2251 /* Reset for multiple quad port adapters */
2252 if (++global_quad_port_a == 4)
2253 global_quad_port_a = 0;
2256 /* If the device can't wake, don't set software support */
2257 if (!device_can_wakeup(&adapter->pdev->dev))
2258 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2261 /* initialize the wol settings based on the eeprom settings */
2262 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2263 adapter->wol |= E1000_WUFC_MAG;
2265 /* Some vendors want WoL disabled by default, but still supported */
2266 if ((hw->mac.type == e1000_i350) &&
2267 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2268 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2272 device_set_wakeup_enable(&adapter->pdev->dev,
2273 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2275 /* reset the hardware with the new settings */
2278 /* Init the I2C interface */
2279 err = igb_init_i2c(adapter);
2281 dev_err(&pdev->dev, "failed to init i2c interface\n");
2285 /* let the f/w know that the h/w is now under the control of the
2287 igb_get_hw_control(adapter);
2289 strcpy(netdev->name, "eth%d");
2290 err = register_netdev(netdev);
2294 /* carrier off reporting is important to ethtool even BEFORE open */
2295 netif_carrier_off(netdev);
2297 #ifdef CONFIG_IGB_DCA
2298 if (dca_add_requester(&pdev->dev) == 0) {
2299 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2300 dev_info(&pdev->dev, "DCA enabled\n");
2301 igb_setup_dca(adapter);
2305 #ifdef CONFIG_IGB_HWMON
2306 /* Initialize the thermal sensor on i350 devices. */
2307 if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2310 /* Read the NVM to determine if this i350 device supports an
2311 * external thermal sensor.
2313 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2314 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2315 adapter->ets = true;
2317 adapter->ets = false;
2318 if (igb_sysfs_init(adapter))
2320 "failed to allocate sysfs resources\n");
2322 adapter->ets = false;
2325 /* do hw tstamp init after resetting */
2326 igb_ptp_init(adapter);
2328 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2329 /* print bus type/speed/width info, not applicable to i354 */
2330 if (hw->mac.type != e1000_i354) {
2331 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2333 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2334 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2336 ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2338 (hw->bus.width == e1000_bus_width_pcie_x2) ?
2340 (hw->bus.width == e1000_bus_width_pcie_x1) ?
2341 "Width x1" : "unknown"), netdev->dev_addr);
2344 ret_val = igb_read_part_string(hw, part_str, E1000_PBANUM_LENGTH);
2346 strcpy(part_str, "Unknown");
2347 dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2348 dev_info(&pdev->dev,
2349 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2350 adapter->msix_entries ? "MSI-X" :
2351 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2352 adapter->num_rx_queues, adapter->num_tx_queues);
2353 switch (hw->mac.type) {
2357 igb_set_eee_i350(hw);
2360 if (hw->phy.media_type == e1000_media_type_copper) {
2361 if ((rd32(E1000_CTRL_EXT) &
2362 E1000_CTRL_EXT_LINK_MODE_SGMII))
2363 igb_set_eee_i354(hw);
2370 pm_runtime_put_noidle(&pdev->dev);
2374 igb_release_hw_control(adapter);
2375 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2377 if (!igb_check_reset_block(hw))
2380 if (hw->flash_address)
2381 iounmap(hw->flash_address);
2383 igb_clear_interrupt_scheme(adapter);
2384 iounmap(hw->hw_addr);
2386 free_netdev(netdev);
2388 pci_release_selected_regions(pdev,
2389 pci_select_bars(pdev, IORESOURCE_MEM));
2392 pci_disable_device(pdev);
2396 #ifdef CONFIG_PCI_IOV
2397 static int igb_disable_sriov(struct pci_dev *pdev)
2399 struct net_device *netdev = pci_get_drvdata(pdev);
2400 struct igb_adapter *adapter = netdev_priv(netdev);
2401 struct e1000_hw *hw = &adapter->hw;
2403 /* reclaim resources allocated to VFs */
2404 if (adapter->vf_data) {
2405 /* disable iov and allow time for transactions to clear */
2406 if (pci_vfs_assigned(pdev)) {
2407 dev_warn(&pdev->dev,
2408 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2411 pci_disable_sriov(pdev);
2415 kfree(adapter->vf_data);
2416 adapter->vf_data = NULL;
2417 adapter->vfs_allocated_count = 0;
2418 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2421 dev_info(&pdev->dev, "IOV Disabled\n");
2423 /* Re-enable DMA Coalescing flag since IOV is turned off */
2424 adapter->flags |= IGB_FLAG_DMAC;
2430 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2432 struct net_device *netdev = pci_get_drvdata(pdev);
2433 struct igb_adapter *adapter = netdev_priv(netdev);
2434 int old_vfs = pci_num_vf(pdev);
2440 else if (old_vfs && old_vfs == num_vfs)
2442 else if (old_vfs && old_vfs != num_vfs)
2443 err = igb_disable_sriov(pdev);
2453 adapter->vfs_allocated_count = num_vfs;
2455 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2456 sizeof(struct vf_data_storage), GFP_KERNEL);
2458 /* if allocation failed then we do not support SR-IOV */
2459 if (!adapter->vf_data) {
2460 adapter->vfs_allocated_count = 0;
2462 "Unable to allocate memory for VF Data Storage\n");
2467 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2471 dev_info(&pdev->dev, "%d VFs allocated\n",
2472 adapter->vfs_allocated_count);
2473 for (i = 0; i < adapter->vfs_allocated_count; i++)
2474 igb_vf_configure(adapter, i);
2476 /* DMA Coalescing is not supported in IOV mode. */
2477 adapter->flags &= ~IGB_FLAG_DMAC;
2481 kfree(adapter->vf_data);
2482 adapter->vf_data = NULL;
2483 adapter->vfs_allocated_count = 0;
2490 * igb_remove_i2c - Cleanup I2C interface
2491 * @adapter: pointer to adapter structure
2493 static void igb_remove_i2c(struct igb_adapter *adapter)
2495 /* free the adapter bus structure */
2496 i2c_del_adapter(&adapter->i2c_adap);
2500 * igb_remove - Device Removal Routine
2501 * @pdev: PCI device information struct
2503 * igb_remove is called by the PCI subsystem to alert the driver
2504 * that it should release a PCI device. The could be caused by a
2505 * Hot-Plug event, or because the driver is going to be removed from
2508 static void igb_remove(struct pci_dev *pdev)
2510 struct net_device *netdev = pci_get_drvdata(pdev);
2511 struct igb_adapter *adapter = netdev_priv(netdev);
2512 struct e1000_hw *hw = &adapter->hw;
2514 pm_runtime_get_noresume(&pdev->dev);
2515 #ifdef CONFIG_IGB_HWMON
2516 igb_sysfs_exit(adapter);
2518 igb_remove_i2c(adapter);
2519 igb_ptp_stop(adapter);
2520 /* The watchdog timer may be rescheduled, so explicitly
2521 * disable watchdog from being rescheduled.
2523 set_bit(__IGB_DOWN, &adapter->state);
2524 del_timer_sync(&adapter->watchdog_timer);
2525 del_timer_sync(&adapter->phy_info_timer);
2527 cancel_work_sync(&adapter->reset_task);
2528 cancel_work_sync(&adapter->watchdog_task);
2530 #ifdef CONFIG_IGB_DCA
2531 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2532 dev_info(&pdev->dev, "DCA disabled\n");
2533 dca_remove_requester(&pdev->dev);
2534 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2535 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2539 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2540 * would have already happened in close and is redundant.
2542 igb_release_hw_control(adapter);
2544 unregister_netdev(netdev);
2546 igb_clear_interrupt_scheme(adapter);
2548 #ifdef CONFIG_PCI_IOV
2549 igb_disable_sriov(pdev);
2552 iounmap(hw->hw_addr);
2553 if (hw->flash_address)
2554 iounmap(hw->flash_address);
2555 pci_release_selected_regions(pdev,
2556 pci_select_bars(pdev, IORESOURCE_MEM));
2558 kfree(adapter->shadow_vfta);
2559 free_netdev(netdev);
2561 pci_disable_pcie_error_reporting(pdev);
2563 pci_disable_device(pdev);
2567 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2568 * @adapter: board private structure to initialize
2570 * This function initializes the vf specific data storage and then attempts to
2571 * allocate the VFs. The reason for ordering it this way is because it is much
2572 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2573 * the memory for the VFs.
2575 static void igb_probe_vfs(struct igb_adapter *adapter)
2577 #ifdef CONFIG_PCI_IOV
2578 struct pci_dev *pdev = adapter->pdev;
2579 struct e1000_hw *hw = &adapter->hw;
2581 /* Virtualization features not supported on i210 family. */
2582 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2585 pci_sriov_set_totalvfs(pdev, 7);
2586 igb_enable_sriov(pdev, max_vfs);
2588 #endif /* CONFIG_PCI_IOV */
2591 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2593 struct e1000_hw *hw = &adapter->hw;
2596 /* Determine the maximum number of RSS queues supported. */
2597 switch (hw->mac.type) {
2599 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2603 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2606 /* I350 cannot do RSS and SR-IOV at the same time */
2607 if (!!adapter->vfs_allocated_count) {
2613 if (!!adapter->vfs_allocated_count) {
2621 max_rss_queues = IGB_MAX_RX_QUEUES;
2625 adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2627 /* Determine if we need to pair queues. */
2628 switch (hw->mac.type) {
2631 /* Device supports enough interrupts without queue pairing. */
2634 /* If VFs are going to be allocated with RSS queues then we
2635 * should pair the queues in order to conserve interrupts due
2636 * to limited supply.
2638 if ((adapter->rss_queues > 1) &&
2639 (adapter->vfs_allocated_count > 6))
2640 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2647 /* If rss_queues > half of max_rss_queues, pair the queues in
2648 * order to conserve interrupts due to limited supply.
2650 if (adapter->rss_queues > (max_rss_queues / 2))
2651 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2657 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2658 * @adapter: board private structure to initialize
2660 * igb_sw_init initializes the Adapter private data structure.
2661 * Fields are initialized based on PCI device information and
2662 * OS network device settings (MTU size).
2664 static int igb_sw_init(struct igb_adapter *adapter)
2666 struct e1000_hw *hw = &adapter->hw;
2667 struct net_device *netdev = adapter->netdev;
2668 struct pci_dev *pdev = adapter->pdev;
2670 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2672 /* set default ring sizes */
2673 adapter->tx_ring_count = IGB_DEFAULT_TXD;
2674 adapter->rx_ring_count = IGB_DEFAULT_RXD;
2676 /* set default ITR values */
2677 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2678 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2680 /* set default work limits */
2681 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2683 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2685 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2687 spin_lock_init(&adapter->stats64_lock);
2688 #ifdef CONFIG_PCI_IOV
2689 switch (hw->mac.type) {
2693 dev_warn(&pdev->dev,
2694 "Maximum of 7 VFs per PF, using max\n");
2695 max_vfs = adapter->vfs_allocated_count = 7;
2697 adapter->vfs_allocated_count = max_vfs;
2698 if (adapter->vfs_allocated_count)
2699 dev_warn(&pdev->dev,
2700 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2705 #endif /* CONFIG_PCI_IOV */
2707 igb_init_queue_configuration(adapter);
2709 /* Setup and initialize a copy of the hw vlan table array */
2710 adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2713 /* This call may decrease the number of queues */
2714 if (igb_init_interrupt_scheme(adapter, true)) {
2715 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2719 igb_probe_vfs(adapter);
2721 /* Explicitly disable IRQ since the NIC can be in any state. */
2722 igb_irq_disable(adapter);
2724 if (hw->mac.type >= e1000_i350)
2725 adapter->flags &= ~IGB_FLAG_DMAC;
2727 set_bit(__IGB_DOWN, &adapter->state);
2732 * igb_open - Called when a network interface is made active
2733 * @netdev: network interface device structure
2735 * Returns 0 on success, negative value on failure
2737 * The open entry point is called when a network interface is made
2738 * active by the system (IFF_UP). At this point all resources needed
2739 * for transmit and receive operations are allocated, the interrupt
2740 * handler is registered with the OS, the watchdog timer is started,
2741 * and the stack is notified that the interface is ready.
2743 static int __igb_open(struct net_device *netdev, bool resuming)
2745 struct igb_adapter *adapter = netdev_priv(netdev);
2746 struct e1000_hw *hw = &adapter->hw;
2747 struct pci_dev *pdev = adapter->pdev;
2751 /* disallow open during test */
2752 if (test_bit(__IGB_TESTING, &adapter->state)) {
2758 pm_runtime_get_sync(&pdev->dev);
2760 netif_carrier_off(netdev);
2762 /* allocate transmit descriptors */
2763 err = igb_setup_all_tx_resources(adapter);
2767 /* allocate receive descriptors */
2768 err = igb_setup_all_rx_resources(adapter);
2772 igb_power_up_link(adapter);
2774 /* before we allocate an interrupt, we must be ready to handle it.
2775 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2776 * as soon as we call pci_request_irq, so we have to setup our
2777 * clean_rx handler before we do so.
2779 igb_configure(adapter);
2781 err = igb_request_irq(adapter);
2785 /* Notify the stack of the actual queue counts. */
2786 err = netif_set_real_num_tx_queues(adapter->netdev,
2787 adapter->num_tx_queues);
2789 goto err_set_queues;
2791 err = netif_set_real_num_rx_queues(adapter->netdev,
2792 adapter->num_rx_queues);
2794 goto err_set_queues;
2796 /* From here on the code is the same as igb_up() */
2797 clear_bit(__IGB_DOWN, &adapter->state);
2799 for (i = 0; i < adapter->num_q_vectors; i++)
2800 napi_enable(&(adapter->q_vector[i]->napi));
2802 /* Clear any pending interrupts. */
2805 igb_irq_enable(adapter);
2807 /* notify VFs that reset has been completed */
2808 if (adapter->vfs_allocated_count) {
2809 u32 reg_data = rd32(E1000_CTRL_EXT);
2810 reg_data |= E1000_CTRL_EXT_PFRSTD;
2811 wr32(E1000_CTRL_EXT, reg_data);
2814 netif_tx_start_all_queues(netdev);
2817 pm_runtime_put(&pdev->dev);
2819 /* start the watchdog. */
2820 hw->mac.get_link_status = 1;
2821 schedule_work(&adapter->watchdog_task);
2826 igb_free_irq(adapter);
2828 igb_release_hw_control(adapter);
2829 igb_power_down_link(adapter);
2830 igb_free_all_rx_resources(adapter);
2832 igb_free_all_tx_resources(adapter);
2836 pm_runtime_put(&pdev->dev);
2841 static int igb_open(struct net_device *netdev)
2843 return __igb_open(netdev, false);
2847 * igb_close - Disables a network interface
2848 * @netdev: network interface device structure
2850 * Returns 0, this is not allowed to fail
2852 * The close entry point is called when an interface is de-activated
2853 * by the OS. The hardware is still under the driver's control, but
2854 * needs to be disabled. A global MAC reset is issued to stop the
2855 * hardware, and all transmit and receive resources are freed.
2857 static int __igb_close(struct net_device *netdev, bool suspending)
2859 struct igb_adapter *adapter = netdev_priv(netdev);
2860 struct pci_dev *pdev = adapter->pdev;
2862 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2865 pm_runtime_get_sync(&pdev->dev);
2868 igb_free_irq(adapter);
2870 igb_free_all_tx_resources(adapter);
2871 igb_free_all_rx_resources(adapter);
2874 pm_runtime_put_sync(&pdev->dev);
2878 static int igb_close(struct net_device *netdev)
2880 return __igb_close(netdev, false);
2884 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
2885 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2887 * Return 0 on success, negative on failure
2889 int igb_setup_tx_resources(struct igb_ring *tx_ring)
2891 struct device *dev = tx_ring->dev;
2894 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2896 tx_ring->tx_buffer_info = vzalloc(size);
2897 if (!tx_ring->tx_buffer_info)
2900 /* round up to nearest 4K */
2901 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2902 tx_ring->size = ALIGN(tx_ring->size, 4096);
2904 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
2905 &tx_ring->dma, GFP_KERNEL);
2909 tx_ring->next_to_use = 0;
2910 tx_ring->next_to_clean = 0;
2915 vfree(tx_ring->tx_buffer_info);
2916 tx_ring->tx_buffer_info = NULL;
2917 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2922 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2923 * (Descriptors) for all queues
2924 * @adapter: board private structure
2926 * Return 0 on success, negative on failure
2928 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2930 struct pci_dev *pdev = adapter->pdev;
2933 for (i = 0; i < adapter->num_tx_queues; i++) {
2934 err = igb_setup_tx_resources(adapter->tx_ring[i]);
2937 "Allocation for Tx Queue %u failed\n", i);
2938 for (i--; i >= 0; i--)
2939 igb_free_tx_resources(adapter->tx_ring[i]);
2948 * igb_setup_tctl - configure the transmit control registers
2949 * @adapter: Board private structure
2951 void igb_setup_tctl(struct igb_adapter *adapter)
2953 struct e1000_hw *hw = &adapter->hw;
2956 /* disable queue 0 which is enabled by default on 82575 and 82576 */
2957 wr32(E1000_TXDCTL(0), 0);
2959 /* Program the Transmit Control Register */
2960 tctl = rd32(E1000_TCTL);
2961 tctl &= ~E1000_TCTL_CT;
2962 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2963 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2965 igb_config_collision_dist(hw);
2967 /* Enable transmits */
2968 tctl |= E1000_TCTL_EN;
2970 wr32(E1000_TCTL, tctl);
2974 * igb_configure_tx_ring - Configure transmit ring after Reset
2975 * @adapter: board private structure
2976 * @ring: tx ring to configure
2978 * Configure a transmit ring after a reset.
2980 void igb_configure_tx_ring(struct igb_adapter *adapter,
2981 struct igb_ring *ring)
2983 struct e1000_hw *hw = &adapter->hw;
2985 u64 tdba = ring->dma;
2986 int reg_idx = ring->reg_idx;
2988 /* disable the queue */
2989 wr32(E1000_TXDCTL(reg_idx), 0);
2993 wr32(E1000_TDLEN(reg_idx),
2994 ring->count * sizeof(union e1000_adv_tx_desc));
2995 wr32(E1000_TDBAL(reg_idx),
2996 tdba & 0x00000000ffffffffULL);
2997 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2999 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3000 wr32(E1000_TDH(reg_idx), 0);
3001 writel(0, ring->tail);
3003 txdctl |= IGB_TX_PTHRESH;
3004 txdctl |= IGB_TX_HTHRESH << 8;
3005 txdctl |= IGB_TX_WTHRESH << 16;
3007 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3008 wr32(E1000_TXDCTL(reg_idx), txdctl);
3012 * igb_configure_tx - Configure transmit Unit after Reset
3013 * @adapter: board private structure
3015 * Configure the Tx unit of the MAC after a reset.
3017 static void igb_configure_tx(struct igb_adapter *adapter)
3021 for (i = 0; i < adapter->num_tx_queues; i++)
3022 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3026 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3027 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3029 * Returns 0 on success, negative on failure
3031 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3033 struct device *dev = rx_ring->dev;
3036 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3038 rx_ring->rx_buffer_info = vzalloc(size);
3039 if (!rx_ring->rx_buffer_info)
3042 /* Round up to nearest 4K */
3043 rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3044 rx_ring->size = ALIGN(rx_ring->size, 4096);
3046 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3047 &rx_ring->dma, GFP_KERNEL);
3051 rx_ring->next_to_alloc = 0;
3052 rx_ring->next_to_clean = 0;
3053 rx_ring->next_to_use = 0;
3058 vfree(rx_ring->rx_buffer_info);
3059 rx_ring->rx_buffer_info = NULL;
3060 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3065 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3066 * (Descriptors) for all queues
3067 * @adapter: board private structure
3069 * Return 0 on success, negative on failure
3071 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3073 struct pci_dev *pdev = adapter->pdev;
3076 for (i = 0; i < adapter->num_rx_queues; i++) {
3077 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3080 "Allocation for Rx Queue %u failed\n", i);
3081 for (i--; i >= 0; i--)
3082 igb_free_rx_resources(adapter->rx_ring[i]);
3091 * igb_setup_mrqc - configure the multiple receive queue control registers
3092 * @adapter: Board private structure
3094 static void igb_setup_mrqc(struct igb_adapter *adapter)
3096 struct e1000_hw *hw = &adapter->hw;
3098 u32 j, num_rx_queues, shift = 0;
3099 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3100 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3101 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3104 /* Fill out hash function seeds */
3105 for (j = 0; j < 10; j++)
3106 wr32(E1000_RSSRK(j), rsskey[j]);
3108 num_rx_queues = adapter->rss_queues;
3110 switch (hw->mac.type) {
3115 /* 82576 supports 2 RSS queues for SR-IOV */
3116 if (adapter->vfs_allocated_count) {
3125 /* Populate the indirection table 4 entries at a time. To do this
3126 * we are generating the results for n and n+2 and then interleaving
3127 * those with the results with n+1 and n+3.
3129 for (j = 0; j < 32; j++) {
3130 /* first pass generates n and n+2 */
3131 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3132 u32 reta = (base & 0x07800780) >> (7 - shift);
3134 /* second pass generates n+1 and n+3 */
3135 base += 0x00010001 * num_rx_queues;
3136 reta |= (base & 0x07800780) << (1 + shift);
3138 wr32(E1000_RETA(j), reta);
3141 /* Disable raw packet checksumming so that RSS hash is placed in
3142 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3143 * offloads as they are enabled by default
3145 rxcsum = rd32(E1000_RXCSUM);
3146 rxcsum |= E1000_RXCSUM_PCSD;
3148 if (adapter->hw.mac.type >= e1000_82576)
3149 /* Enable Receive Checksum Offload for SCTP */
3150 rxcsum |= E1000_RXCSUM_CRCOFL;
3152 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3153 wr32(E1000_RXCSUM, rxcsum);
3155 /* Generate RSS hash based on packet types, TCP/UDP
3156 * port numbers and/or IPv4/v6 src and dst addresses
3158 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3159 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3160 E1000_MRQC_RSS_FIELD_IPV6 |
3161 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3162 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3164 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3165 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3166 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3167 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3169 /* If VMDq is enabled then we set the appropriate mode for that, else
3170 * we default to RSS so that an RSS hash is calculated per packet even
3171 * if we are only using one queue
3173 if (adapter->vfs_allocated_count) {
3174 if (hw->mac.type > e1000_82575) {
3175 /* Set the default pool for the PF's first queue */
3176 u32 vtctl = rd32(E1000_VT_CTL);
3177 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3178 E1000_VT_CTL_DISABLE_DEF_POOL);
3179 vtctl |= adapter->vfs_allocated_count <<
3180 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3181 wr32(E1000_VT_CTL, vtctl);
3183 if (adapter->rss_queues > 1)
3184 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3186 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3188 if (hw->mac.type != e1000_i211)
3189 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3191 igb_vmm_control(adapter);
3193 wr32(E1000_MRQC, mrqc);
3197 * igb_setup_rctl - configure the receive control registers
3198 * @adapter: Board private structure
3200 void igb_setup_rctl(struct igb_adapter *adapter)
3202 struct e1000_hw *hw = &adapter->hw;
3205 rctl = rd32(E1000_RCTL);
3207 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3208 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3210 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3211 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3213 /* enable stripping of CRC. It's unlikely this will break BMC
3214 * redirection as it did with e1000. Newer features require
3215 * that the HW strips the CRC.
3217 rctl |= E1000_RCTL_SECRC;
3219 /* disable store bad packets and clear size bits. */
3220 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3222 /* enable LPE to prevent packets larger than max_frame_size */
3223 rctl |= E1000_RCTL_LPE;
3225 /* disable queue 0 to prevent tail write w/o re-config */
3226 wr32(E1000_RXDCTL(0), 0);
3228 /* Attention!!! For SR-IOV PF driver operations you must enable
3229 * queue drop for all VF and PF queues to prevent head of line blocking
3230 * if an un-trusted VF does not provide descriptors to hardware.
3232 if (adapter->vfs_allocated_count) {
3233 /* set all queue drop enable bits */
3234 wr32(E1000_QDE, ALL_QUEUES);
3237 /* This is useful for sniffing bad packets. */
3238 if (adapter->netdev->features & NETIF_F_RXALL) {
3239 /* UPE and MPE will be handled by normal PROMISC logic
3240 * in e1000e_set_rx_mode
3242 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3243 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3244 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3246 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3247 E1000_RCTL_DPF | /* Allow filtered pause */
3248 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3249 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3250 * and that breaks VLANs.
3254 wr32(E1000_RCTL, rctl);
3257 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3260 struct e1000_hw *hw = &adapter->hw;
3263 /* if it isn't the PF check to see if VFs are enabled and
3264 * increase the size to support vlan tags
3266 if (vfn < adapter->vfs_allocated_count &&
3267 adapter->vf_data[vfn].vlans_enabled)
3268 size += VLAN_TAG_SIZE;
3270 vmolr = rd32(E1000_VMOLR(vfn));
3271 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3272 vmolr |= size | E1000_VMOLR_LPE;
3273 wr32(E1000_VMOLR(vfn), vmolr);
3279 * igb_rlpml_set - set maximum receive packet size
3280 * @adapter: board private structure
3282 * Configure maximum receivable packet size.
3284 static void igb_rlpml_set(struct igb_adapter *adapter)
3286 u32 max_frame_size = adapter->max_frame_size;
3287 struct e1000_hw *hw = &adapter->hw;
3288 u16 pf_id = adapter->vfs_allocated_count;
3291 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3292 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3293 * to our max jumbo frame size, in case we need to enable
3294 * jumbo frames on one of the rings later.
3295 * This will not pass over-length frames into the default
3296 * queue because it's gated by the VMOLR.RLPML.
3298 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3301 wr32(E1000_RLPML, max_frame_size);
3304 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3307 struct e1000_hw *hw = &adapter->hw;
3310 /* This register exists only on 82576 and newer so if we are older then
3311 * we should exit and do nothing
3313 if (hw->mac.type < e1000_82576)
3316 vmolr = rd32(E1000_VMOLR(vfn));
3317 vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3319 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3321 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3323 /* clear all bits that might not be set */
3324 vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3326 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3327 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3328 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3331 if (vfn <= adapter->vfs_allocated_count)
3332 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3334 wr32(E1000_VMOLR(vfn), vmolr);
3338 * igb_configure_rx_ring - Configure a receive ring after Reset
3339 * @adapter: board private structure
3340 * @ring: receive ring to be configured
3342 * Configure the Rx unit of the MAC after a reset.
3344 void igb_configure_rx_ring(struct igb_adapter *adapter,
3345 struct igb_ring *ring)
3347 struct e1000_hw *hw = &adapter->hw;
3348 u64 rdba = ring->dma;
3349 int reg_idx = ring->reg_idx;
3350 u32 srrctl = 0, rxdctl = 0;
3352 /* disable the queue */
3353 wr32(E1000_RXDCTL(reg_idx), 0);
3355 /* Set DMA base address registers */
3356 wr32(E1000_RDBAL(reg_idx),
3357 rdba & 0x00000000ffffffffULL);
3358 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3359 wr32(E1000_RDLEN(reg_idx),
3360 ring->count * sizeof(union e1000_adv_rx_desc));
3362 /* initialize head and tail */
3363 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3364 wr32(E1000_RDH(reg_idx), 0);
3365 writel(0, ring->tail);
3367 /* set descriptor configuration */
3368 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3369 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3370 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3371 if (hw->mac.type >= e1000_82580)
3372 srrctl |= E1000_SRRCTL_TIMESTAMP;
3373 /* Only set Drop Enable if we are supporting multiple queues */
3374 if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3375 srrctl |= E1000_SRRCTL_DROP_EN;
3377 wr32(E1000_SRRCTL(reg_idx), srrctl);
3379 /* set filtering for VMDQ pools */
3380 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3382 rxdctl |= IGB_RX_PTHRESH;
3383 rxdctl |= IGB_RX_HTHRESH << 8;
3384 rxdctl |= IGB_RX_WTHRESH << 16;
3386 /* enable receive descriptor fetching */
3387 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3388 wr32(E1000_RXDCTL(reg_idx), rxdctl);
3392 * igb_configure_rx - Configure receive Unit after Reset
3393 * @adapter: board private structure
3395 * Configure the Rx unit of the MAC after a reset.
3397 static void igb_configure_rx(struct igb_adapter *adapter)
3401 /* set UTA to appropriate mode */
3402 igb_set_uta(adapter);
3404 /* set the correct pool for the PF default MAC address in entry 0 */
3405 igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3406 adapter->vfs_allocated_count);
3408 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3409 * the Base and Length of the Rx Descriptor Ring
3411 for (i = 0; i < adapter->num_rx_queues; i++)
3412 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3416 * igb_free_tx_resources - Free Tx Resources per Queue
3417 * @tx_ring: Tx descriptor ring for a specific queue
3419 * Free all transmit software resources
3421 void igb_free_tx_resources(struct igb_ring *tx_ring)
3423 igb_clean_tx_ring(tx_ring);
3425 vfree(tx_ring->tx_buffer_info);
3426 tx_ring->tx_buffer_info = NULL;
3428 /* if not set, then don't free */
3432 dma_free_coherent(tx_ring->dev, tx_ring->size,
3433 tx_ring->desc, tx_ring->dma);
3435 tx_ring->desc = NULL;
3439 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3440 * @adapter: board private structure
3442 * Free all transmit software resources
3444 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3448 for (i = 0; i < adapter->num_tx_queues; i++)
3449 igb_free_tx_resources(adapter->tx_ring[i]);
3452 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3453 struct igb_tx_buffer *tx_buffer)
3455 if (tx_buffer->skb) {
3456 dev_kfree_skb_any(tx_buffer->skb);
3457 if (dma_unmap_len(tx_buffer, len))
3458 dma_unmap_single(ring->dev,
3459 dma_unmap_addr(tx_buffer, dma),
3460 dma_unmap_len(tx_buffer, len),
3462 } else if (dma_unmap_len(tx_buffer, len)) {
3463 dma_unmap_page(ring->dev,
3464 dma_unmap_addr(tx_buffer, dma),
3465 dma_unmap_len(tx_buffer, len),
3468 tx_buffer->next_to_watch = NULL;
3469 tx_buffer->skb = NULL;
3470 dma_unmap_len_set(tx_buffer, len, 0);
3471 /* buffer_info must be completely set up in the transmit path */
3475 * igb_clean_tx_ring - Free Tx Buffers
3476 * @tx_ring: ring to be cleaned
3478 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3480 struct igb_tx_buffer *buffer_info;
3484 if (!tx_ring->tx_buffer_info)
3486 /* Free all the Tx ring sk_buffs */
3488 for (i = 0; i < tx_ring->count; i++) {
3489 buffer_info = &tx_ring->tx_buffer_info[i];
3490 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3493 netdev_tx_reset_queue(txring_txq(tx_ring));
3495 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3496 memset(tx_ring->tx_buffer_info, 0, size);
3498 /* Zero out the descriptor ring */
3499 memset(tx_ring->desc, 0, tx_ring->size);
3501 tx_ring->next_to_use = 0;
3502 tx_ring->next_to_clean = 0;
3506 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3507 * @adapter: board private structure
3509 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3513 for (i = 0; i < adapter->num_tx_queues; i++)
3514 igb_clean_tx_ring(adapter->tx_ring[i]);
3518 * igb_free_rx_resources - Free Rx Resources
3519 * @rx_ring: ring to clean the resources from
3521 * Free all receive software resources
3523 void igb_free_rx_resources(struct igb_ring *rx_ring)
3525 igb_clean_rx_ring(rx_ring);
3527 vfree(rx_ring->rx_buffer_info);
3528 rx_ring->rx_buffer_info = NULL;
3530 /* if not set, then don't free */
3534 dma_free_coherent(rx_ring->dev, rx_ring->size,
3535 rx_ring->desc, rx_ring->dma);
3537 rx_ring->desc = NULL;
3541 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3542 * @adapter: board private structure
3544 * Free all receive software resources
3546 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3550 for (i = 0; i < adapter->num_rx_queues; i++)
3551 igb_free_rx_resources(adapter->rx_ring[i]);
3555 * igb_clean_rx_ring - Free Rx Buffers per Queue
3556 * @rx_ring: ring to free buffers from
3558 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3564 dev_kfree_skb(rx_ring->skb);
3565 rx_ring->skb = NULL;
3567 if (!rx_ring->rx_buffer_info)
3570 /* Free all the Rx ring sk_buffs */
3571 for (i = 0; i < rx_ring->count; i++) {
3572 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3574 if (!buffer_info->page)
3577 dma_unmap_page(rx_ring->dev,
3581 __free_page(buffer_info->page);
3583 buffer_info->page = NULL;
3586 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3587 memset(rx_ring->rx_buffer_info, 0, size);
3589 /* Zero out the descriptor ring */
3590 memset(rx_ring->desc, 0, rx_ring->size);
3592 rx_ring->next_to_alloc = 0;
3593 rx_ring->next_to_clean = 0;
3594 rx_ring->next_to_use = 0;
3598 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3599 * @adapter: board private structure
3601 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3605 for (i = 0; i < adapter->num_rx_queues; i++)
3606 igb_clean_rx_ring(adapter->rx_ring[i]);
3610 * igb_set_mac - Change the Ethernet Address of the NIC
3611 * @netdev: network interface device structure
3612 * @p: pointer to an address structure
3614 * Returns 0 on success, negative on failure
3616 static int igb_set_mac(struct net_device *netdev, void *p)
3618 struct igb_adapter *adapter = netdev_priv(netdev);
3619 struct e1000_hw *hw = &adapter->hw;
3620 struct sockaddr *addr = p;
3622 if (!is_valid_ether_addr(addr->sa_data))
3623 return -EADDRNOTAVAIL;
3625 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3626 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3628 /* set the correct pool for the new PF MAC address in entry 0 */
3629 igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3630 adapter->vfs_allocated_count);
3636 * igb_write_mc_addr_list - write multicast addresses to MTA
3637 * @netdev: network interface device structure
3639 * Writes multicast address list to the MTA hash table.
3640 * Returns: -ENOMEM on failure
3641 * 0 on no addresses written
3642 * X on writing X addresses to MTA
3644 static int igb_write_mc_addr_list(struct net_device *netdev)
3646 struct igb_adapter *adapter = netdev_priv(netdev);
3647 struct e1000_hw *hw = &adapter->hw;
3648 struct netdev_hw_addr *ha;
3652 if (netdev_mc_empty(netdev)) {
3653 /* nothing to program, so clear mc list */
3654 igb_update_mc_addr_list(hw, NULL, 0);
3655 igb_restore_vf_multicasts(adapter);
3659 mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3663 /* The shared function expects a packed array of only addresses. */
3665 netdev_for_each_mc_addr(ha, netdev)
3666 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3668 igb_update_mc_addr_list(hw, mta_list, i);
3671 return netdev_mc_count(netdev);
3675 * igb_write_uc_addr_list - write unicast addresses to RAR table
3676 * @netdev: network interface device structure
3678 * Writes unicast address list to the RAR table.
3679 * Returns: -ENOMEM on failure/insufficient address space
3680 * 0 on no addresses written
3681 * X on writing X addresses to the RAR table
3683 static int igb_write_uc_addr_list(struct net_device *netdev)
3685 struct igb_adapter *adapter = netdev_priv(netdev);
3686 struct e1000_hw *hw = &adapter->hw;
3687 unsigned int vfn = adapter->vfs_allocated_count;
3688 unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3691 /* return ENOMEM indicating insufficient memory for addresses */
3692 if (netdev_uc_count(netdev) > rar_entries)
3695 if (!netdev_uc_empty(netdev) && rar_entries) {
3696 struct netdev_hw_addr *ha;
3698 netdev_for_each_uc_addr(ha, netdev) {
3701 igb_rar_set_qsel(adapter, ha->addr,
3707 /* write the addresses in reverse order to avoid write combining */
3708 for (; rar_entries > 0 ; rar_entries--) {
3709 wr32(E1000_RAH(rar_entries), 0);
3710 wr32(E1000_RAL(rar_entries), 0);
3718 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3719 * @netdev: network interface device structure
3721 * The set_rx_mode entry point is called whenever the unicast or multicast
3722 * address lists or the network interface flags are updated. This routine is
3723 * responsible for configuring the hardware for proper unicast, multicast,
3724 * promiscuous mode, and all-multi behavior.
3726 static void igb_set_rx_mode(struct net_device *netdev)
3728 struct igb_adapter *adapter = netdev_priv(netdev);
3729 struct e1000_hw *hw = &adapter->hw;
3730 unsigned int vfn = adapter->vfs_allocated_count;
3731 u32 rctl, vmolr = 0;
3734 /* Check for Promiscuous and All Multicast modes */
3735 rctl = rd32(E1000_RCTL);
3737 /* clear the effected bits */
3738 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3740 if (netdev->flags & IFF_PROMISC) {
3741 u32 mrqc = rd32(E1000_MRQC);
3742 /* retain VLAN HW filtering if in VT mode */
3743 if (mrqc & E1000_MRQC_ENABLE_VMDQ)
3744 rctl |= E1000_RCTL_VFE;
3745 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3746 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3748 if (netdev->flags & IFF_ALLMULTI) {
3749 rctl |= E1000_RCTL_MPE;
3750 vmolr |= E1000_VMOLR_MPME;
3752 /* Write addresses to the MTA, if the attempt fails
3753 * then we should just turn on promiscuous mode so
3754 * that we can at least receive multicast traffic
3756 count = igb_write_mc_addr_list(netdev);
3758 rctl |= E1000_RCTL_MPE;
3759 vmolr |= E1000_VMOLR_MPME;
3761 vmolr |= E1000_VMOLR_ROMPE;
3764 /* Write addresses to available RAR registers, if there is not
3765 * sufficient space to store all the addresses then enable
3766 * unicast promiscuous mode
3768 count = igb_write_uc_addr_list(netdev);
3770 rctl |= E1000_RCTL_UPE;
3771 vmolr |= E1000_VMOLR_ROPE;
3773 rctl |= E1000_RCTL_VFE;
3775 wr32(E1000_RCTL, rctl);
3777 /* In order to support SR-IOV and eventually VMDq it is necessary to set
3778 * the VMOLR to enable the appropriate modes. Without this workaround
3779 * we will have issues with VLAN tag stripping not being done for frames
3780 * that are only arriving because we are the default pool
3782 if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3785 vmolr |= rd32(E1000_VMOLR(vfn)) &
3786 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3787 wr32(E1000_VMOLR(vfn), vmolr);
3788 igb_restore_vf_multicasts(adapter);
3791 static void igb_check_wvbr(struct igb_adapter *adapter)
3793 struct e1000_hw *hw = &adapter->hw;
3796 switch (hw->mac.type) {
3799 if (!(wvbr = rd32(E1000_WVBR)))
3806 adapter->wvbr |= wvbr;
3809 #define IGB_STAGGERED_QUEUE_OFFSET 8
3811 static void igb_spoof_check(struct igb_adapter *adapter)
3818 for(j = 0; j < adapter->vfs_allocated_count; j++) {
3819 if (adapter->wvbr & (1 << j) ||
3820 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3821 dev_warn(&adapter->pdev->dev,
3822 "Spoof event(s) detected on VF %d\n", j);
3825 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3830 /* Need to wait a few seconds after link up to get diagnostic information from
3833 static void igb_update_phy_info(unsigned long data)
3835 struct igb_adapter *adapter = (struct igb_adapter *) data;
3836 igb_get_phy_info(&adapter->hw);
3840 * igb_has_link - check shared code for link and determine up/down
3841 * @adapter: pointer to driver private info
3843 bool igb_has_link(struct igb_adapter *adapter)
3845 struct e1000_hw *hw = &adapter->hw;
3846 bool link_active = false;
3849 /* get_link_status is set on LSC (link status) interrupt or
3850 * rx sequence error interrupt. get_link_status will stay
3851 * false until the e1000_check_for_link establishes link
3852 * for copper adapters ONLY
3854 switch (hw->phy.media_type) {
3855 case e1000_media_type_copper:
3856 if (hw->mac.get_link_status) {
3857 ret_val = hw->mac.ops.check_for_link(hw);
3858 link_active = !hw->mac.get_link_status;
3863 case e1000_media_type_internal_serdes:
3864 ret_val = hw->mac.ops.check_for_link(hw);
3865 link_active = hw->mac.serdes_has_link;
3868 case e1000_media_type_unknown:
3875 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3878 u32 ctrl_ext, thstat;
3880 /* check for thermal sensor event on i350 copper only */
3881 if (hw->mac.type == e1000_i350) {
3882 thstat = rd32(E1000_THSTAT);
3883 ctrl_ext = rd32(E1000_CTRL_EXT);
3885 if ((hw->phy.media_type == e1000_media_type_copper) &&
3886 !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
3887 ret = !!(thstat & event);
3894 * igb_watchdog - Timer Call-back
3895 * @data: pointer to adapter cast into an unsigned long
3897 static void igb_watchdog(unsigned long data)
3899 struct igb_adapter *adapter = (struct igb_adapter *)data;
3900 /* Do the rest outside of interrupt context */
3901 schedule_work(&adapter->watchdog_task);
3904 static void igb_watchdog_task(struct work_struct *work)
3906 struct igb_adapter *adapter = container_of(work,
3909 struct e1000_hw *hw = &adapter->hw;
3910 struct e1000_phy_info *phy = &hw->phy;
3911 struct net_device *netdev = adapter->netdev;
3915 link = igb_has_link(adapter);
3917 /* Cancel scheduled suspend requests. */
3918 pm_runtime_resume(netdev->dev.parent);
3920 if (!netif_carrier_ok(netdev)) {
3922 hw->mac.ops.get_speed_and_duplex(hw,
3923 &adapter->link_speed,
3924 &adapter->link_duplex);
3926 ctrl = rd32(E1000_CTRL);
3927 /* Links status message must follow this format */
3928 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
3929 "Duplex, Flow Control: %s\n",
3931 adapter->link_speed,
3932 adapter->link_duplex == FULL_DUPLEX ?
3934 (ctrl & E1000_CTRL_TFCE) &&
3935 (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
3936 (ctrl & E1000_CTRL_RFCE) ? "RX" :
3937 (ctrl & E1000_CTRL_TFCE) ? "TX" : "None");
3939 /* check if SmartSpeed worked */
3940 igb_check_downshift(hw);
3941 if (phy->speed_downgraded)
3942 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
3944 /* check for thermal sensor event */
3945 if (igb_thermal_sensor_event(hw,
3946 E1000_THSTAT_LINK_THROTTLE)) {
3947 netdev_info(netdev, "The network adapter link "
3948 "speed was downshifted because it "
3952 /* adjust timeout factor according to speed/duplex */
3953 adapter->tx_timeout_factor = 1;
3954 switch (adapter->link_speed) {
3956 adapter->tx_timeout_factor = 14;
3959 /* maybe add some timeout factor ? */
3963 netif_carrier_on(netdev);
3965 igb_ping_all_vfs(adapter);
3966 igb_check_vf_rate_limit(adapter);
3968 /* link state has changed, schedule phy info update */
3969 if (!test_bit(__IGB_DOWN, &adapter->state))
3970 mod_timer(&adapter->phy_info_timer,
3971 round_jiffies(jiffies + 2 * HZ));
3974 if (netif_carrier_ok(netdev)) {
3975 adapter->link_speed = 0;
3976 adapter->link_duplex = 0;
3978 /* check for thermal sensor event */
3979 if (igb_thermal_sensor_event(hw,
3980 E1000_THSTAT_PWR_DOWN)) {
3981 netdev_err(netdev, "The network adapter was "
3982 "stopped because it overheated\n");
3985 /* Links status message must follow this format */
3986 printk(KERN_INFO "igb: %s NIC Link is Down\n",
3988 netif_carrier_off(netdev);
3990 igb_ping_all_vfs(adapter);
3992 /* link state has changed, schedule phy info update */
3993 if (!test_bit(__IGB_DOWN, &adapter->state))
3994 mod_timer(&adapter->phy_info_timer,
3995 round_jiffies(jiffies + 2 * HZ));
3997 pm_schedule_suspend(netdev->dev.parent,
4002 spin_lock(&adapter->stats64_lock);
4003 igb_update_stats(adapter, &adapter->stats64);
4004 spin_unlock(&adapter->stats64_lock);
4006 for (i = 0; i < adapter->num_tx_queues; i++) {
4007 struct igb_ring *tx_ring = adapter->tx_ring[i];
4008 if (!netif_carrier_ok(netdev)) {
4009 /* We've lost link, so the controller stops DMA,
4010 * but we've got queued Tx work that's never going
4011 * to get done, so reset controller to flush Tx.
4012 * (Do the reset outside of interrupt context).
4014 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4015 adapter->tx_timeout_count++;
4016 schedule_work(&adapter->reset_task);
4017 /* return immediately since reset is imminent */
4022 /* Force detection of hung controller every watchdog period */
4023 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4026 /* Cause software interrupt to ensure Rx ring is cleaned */
4027 if (adapter->msix_entries) {
4029 for (i = 0; i < adapter->num_q_vectors; i++)
4030 eics |= adapter->q_vector[i]->eims_value;
4031 wr32(E1000_EICS, eics);
4033 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4036 igb_spoof_check(adapter);
4037 igb_ptp_rx_hang(adapter);
4039 /* Reset the timer */
4040 if (!test_bit(__IGB_DOWN, &adapter->state))
4041 mod_timer(&adapter->watchdog_timer,
4042 round_jiffies(jiffies + 2 * HZ));
4045 enum latency_range {
4049 latency_invalid = 255
4053 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4054 * @q_vector: pointer to q_vector
4056 * Stores a new ITR value based on strictly on packet size. This
4057 * algorithm is less sophisticated than that used in igb_update_itr,
4058 * due to the difficulty of synchronizing statistics across multiple
4059 * receive rings. The divisors and thresholds used by this function
4060 * were determined based on theoretical maximum wire speed and testing
4061 * data, in order to minimize response time while increasing bulk
4063 * This functionality is controlled by the InterruptThrottleRate module
4064 * parameter (see igb_param.c)
4065 * NOTE: This function is called only when operating in a multiqueue
4066 * receive environment.
4068 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4070 int new_val = q_vector->itr_val;
4071 int avg_wire_size = 0;
4072 struct igb_adapter *adapter = q_vector->adapter;
4073 unsigned int packets;
4075 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4076 * ints/sec - ITR timer value of 120 ticks.
4078 if (adapter->link_speed != SPEED_1000) {
4079 new_val = IGB_4K_ITR;
4083 packets = q_vector->rx.total_packets;
4085 avg_wire_size = q_vector->rx.total_bytes / packets;
4087 packets = q_vector->tx.total_packets;
4089 avg_wire_size = max_t(u32, avg_wire_size,
4090 q_vector->tx.total_bytes / packets);
4092 /* if avg_wire_size isn't set no work was done */
4096 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4097 avg_wire_size += 24;
4099 /* Don't starve jumbo frames */
4100 avg_wire_size = min(avg_wire_size, 3000);
4102 /* Give a little boost to mid-size frames */
4103 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4104 new_val = avg_wire_size / 3;
4106 new_val = avg_wire_size / 2;
4108 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4109 if (new_val < IGB_20K_ITR &&
4110 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4111 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4112 new_val = IGB_20K_ITR;
4115 if (new_val != q_vector->itr_val) {
4116 q_vector->itr_val = new_val;
4117 q_vector->set_itr = 1;
4120 q_vector->rx.total_bytes = 0;
4121 q_vector->rx.total_packets = 0;
4122 q_vector->tx.total_bytes = 0;
4123 q_vector->tx.total_packets = 0;
4127 * igb_update_itr - update the dynamic ITR value based on statistics
4128 * @q_vector: pointer to q_vector
4129 * @ring_container: ring info to update the itr for
4131 * Stores a new ITR value based on packets and byte
4132 * counts during the last interrupt. The advantage of per interrupt
4133 * computation is faster updates and more accurate ITR for the current
4134 * traffic pattern. Constants in this function were computed
4135 * based on theoretical maximum wire speed and thresholds were set based
4136 * on testing data as well as attempting to minimize response time
4137 * while increasing bulk throughput.
4138 * this functionality is controlled by the InterruptThrottleRate module
4139 * parameter (see igb_param.c)
4140 * NOTE: These calculations are only valid when operating in a single-
4141 * queue environment.
4143 static void igb_update_itr(struct igb_q_vector *q_vector,
4144 struct igb_ring_container *ring_container)
4146 unsigned int packets = ring_container->total_packets;
4147 unsigned int bytes = ring_container->total_bytes;
4148 u8 itrval = ring_container->itr;
4150 /* no packets, exit with status unchanged */
4155 case lowest_latency:
4156 /* handle TSO and jumbo frames */
4157 if (bytes/packets > 8000)
4158 itrval = bulk_latency;
4159 else if ((packets < 5) && (bytes > 512))
4160 itrval = low_latency;
4162 case low_latency: /* 50 usec aka 20000 ints/s */
4163 if (bytes > 10000) {
4164 /* this if handles the TSO accounting */
4165 if (bytes/packets > 8000) {
4166 itrval = bulk_latency;
4167 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4168 itrval = bulk_latency;
4169 } else if ((packets > 35)) {
4170 itrval = lowest_latency;
4172 } else if (bytes/packets > 2000) {
4173 itrval = bulk_latency;
4174 } else if (packets <= 2 && bytes < 512) {
4175 itrval = lowest_latency;
4178 case bulk_latency: /* 250 usec aka 4000 ints/s */
4179 if (bytes > 25000) {
4181 itrval = low_latency;
4182 } else if (bytes < 1500) {
4183 itrval = low_latency;
4188 /* clear work counters since we have the values we need */
4189 ring_container->total_bytes = 0;
4190 ring_container->total_packets = 0;
4192 /* write updated itr to ring container */
4193 ring_container->itr = itrval;
4196 static void igb_set_itr(struct igb_q_vector *q_vector)
4198 struct igb_adapter *adapter = q_vector->adapter;
4199 u32 new_itr = q_vector->itr_val;
4202 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4203 if (adapter->link_speed != SPEED_1000) {
4205 new_itr = IGB_4K_ITR;
4209 igb_update_itr(q_vector, &q_vector->tx);
4210 igb_update_itr(q_vector, &q_vector->rx);
4212 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4214 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4215 if (current_itr == lowest_latency &&
4216 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4217 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4218 current_itr = low_latency;
4220 switch (current_itr) {
4221 /* counts and packets in update_itr are dependent on these numbers */
4222 case lowest_latency:
4223 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4226 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4229 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
4236 if (new_itr != q_vector->itr_val) {
4237 /* this attempts to bias the interrupt rate towards Bulk
4238 * by adding intermediate steps when interrupt rate is
4241 new_itr = new_itr > q_vector->itr_val ?
4242 max((new_itr * q_vector->itr_val) /
4243 (new_itr + (q_vector->itr_val >> 2)),
4245 /* Don't write the value here; it resets the adapter's
4246 * internal timer, and causes us to delay far longer than
4247 * we should between interrupts. Instead, we write the ITR
4248 * value at the beginning of the next interrupt so the timing
4249 * ends up being correct.
4251 q_vector->itr_val = new_itr;
4252 q_vector->set_itr = 1;
4256 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4257 u32 type_tucmd, u32 mss_l4len_idx)
4259 struct e1000_adv_tx_context_desc *context_desc;
4260 u16 i = tx_ring->next_to_use;
4262 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4265 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4267 /* set bits to identify this as an advanced context descriptor */
4268 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4270 /* For 82575, context index must be unique per ring. */
4271 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4272 mss_l4len_idx |= tx_ring->reg_idx << 4;
4274 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4275 context_desc->seqnum_seed = 0;
4276 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
4277 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
4280 static int igb_tso(struct igb_ring *tx_ring,
4281 struct igb_tx_buffer *first,
4284 struct sk_buff *skb = first->skb;
4285 u32 vlan_macip_lens, type_tucmd;
4286 u32 mss_l4len_idx, l4len;
4288 if (skb->ip_summed != CHECKSUM_PARTIAL)
4291 if (!skb_is_gso(skb))
4294 if (skb_header_cloned(skb)) {
4295 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4300 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4301 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4303 if (first->protocol == __constant_htons(ETH_P_IP)) {
4304 struct iphdr *iph = ip_hdr(skb);
4307 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4311 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4312 first->tx_flags |= IGB_TX_FLAGS_TSO |
4315 } else if (skb_is_gso_v6(skb)) {
4316 ipv6_hdr(skb)->payload_len = 0;
4317 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4318 &ipv6_hdr(skb)->daddr,
4320 first->tx_flags |= IGB_TX_FLAGS_TSO |
4324 /* compute header lengths */
4325 l4len = tcp_hdrlen(skb);
4326 *hdr_len = skb_transport_offset(skb) + l4len;
4328 /* update gso size and bytecount with header size */
4329 first->gso_segs = skb_shinfo(skb)->gso_segs;
4330 first->bytecount += (first->gso_segs - 1) * *hdr_len;
4333 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4334 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4336 /* VLAN MACLEN IPLEN */
4337 vlan_macip_lens = skb_network_header_len(skb);
4338 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4339 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4341 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4346 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4348 struct sk_buff *skb = first->skb;
4349 u32 vlan_macip_lens = 0;
4350 u32 mss_l4len_idx = 0;
4353 if (skb->ip_summed != CHECKSUM_PARTIAL) {
4354 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4358 switch (first->protocol) {
4359 case __constant_htons(ETH_P_IP):
4360 vlan_macip_lens |= skb_network_header_len(skb);
4361 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4362 l4_hdr = ip_hdr(skb)->protocol;
4364 case __constant_htons(ETH_P_IPV6):
4365 vlan_macip_lens |= skb_network_header_len(skb);
4366 l4_hdr = ipv6_hdr(skb)->nexthdr;
4369 if (unlikely(net_ratelimit())) {
4370 dev_warn(tx_ring->dev,
4371 "partial checksum but proto=%x!\n",
4379 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4380 mss_l4len_idx = tcp_hdrlen(skb) <<
4381 E1000_ADVTXD_L4LEN_SHIFT;
4384 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4385 mss_l4len_idx = sizeof(struct sctphdr) <<
4386 E1000_ADVTXD_L4LEN_SHIFT;
4389 mss_l4len_idx = sizeof(struct udphdr) <<
4390 E1000_ADVTXD_L4LEN_SHIFT;
4393 if (unlikely(net_ratelimit())) {
4394 dev_warn(tx_ring->dev,
4395 "partial checksum but l4 proto=%x!\n",
4401 /* update TX checksum flag */
4402 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4405 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4406 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4408 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4411 #define IGB_SET_FLAG(_input, _flag, _result) \
4412 ((_flag <= _result) ? \
4413 ((u32)(_input & _flag) * (_result / _flag)) : \
4414 ((u32)(_input & _flag) / (_flag / _result)))
4416 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4418 /* set type for advanced descriptor with frame checksum insertion */
4419 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4420 E1000_ADVTXD_DCMD_DEXT |
4421 E1000_ADVTXD_DCMD_IFCS;
4423 /* set HW vlan bit if vlan is present */
4424 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4425 (E1000_ADVTXD_DCMD_VLE));
4427 /* set segmentation bits for TSO */
4428 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4429 (E1000_ADVTXD_DCMD_TSE));
4431 /* set timestamp bit if present */
4432 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4433 (E1000_ADVTXD_MAC_TSTAMP));
4435 /* insert frame checksum */
4436 cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4441 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4442 union e1000_adv_tx_desc *tx_desc,
4443 u32 tx_flags, unsigned int paylen)
4445 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4447 /* 82575 requires a unique index per ring */
4448 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4449 olinfo_status |= tx_ring->reg_idx << 4;
4451 /* insert L4 checksum */
4452 olinfo_status |= IGB_SET_FLAG(tx_flags,
4454 (E1000_TXD_POPTS_TXSM << 8));
4456 /* insert IPv4 checksum */
4457 olinfo_status |= IGB_SET_FLAG(tx_flags,
4459 (E1000_TXD_POPTS_IXSM << 8));
4461 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4464 static void igb_tx_map(struct igb_ring *tx_ring,
4465 struct igb_tx_buffer *first,
4468 struct sk_buff *skb = first->skb;
4469 struct igb_tx_buffer *tx_buffer;
4470 union e1000_adv_tx_desc *tx_desc;
4471 struct skb_frag_struct *frag;
4473 unsigned int data_len, size;
4474 u32 tx_flags = first->tx_flags;
4475 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4476 u16 i = tx_ring->next_to_use;
4478 tx_desc = IGB_TX_DESC(tx_ring, i);
4480 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4482 size = skb_headlen(skb);
4483 data_len = skb->data_len;
4485 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4489 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4490 if (dma_mapping_error(tx_ring->dev, dma))
4493 /* record length, and DMA address */
4494 dma_unmap_len_set(tx_buffer, len, size);
4495 dma_unmap_addr_set(tx_buffer, dma, dma);
4497 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4499 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4500 tx_desc->read.cmd_type_len =
4501 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4505 if (i == tx_ring->count) {
4506 tx_desc = IGB_TX_DESC(tx_ring, 0);
4509 tx_desc->read.olinfo_status = 0;
4511 dma += IGB_MAX_DATA_PER_TXD;
4512 size -= IGB_MAX_DATA_PER_TXD;
4514 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4517 if (likely(!data_len))
4520 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4524 if (i == tx_ring->count) {
4525 tx_desc = IGB_TX_DESC(tx_ring, 0);
4528 tx_desc->read.olinfo_status = 0;
4530 size = skb_frag_size(frag);
4533 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4534 size, DMA_TO_DEVICE);
4536 tx_buffer = &tx_ring->tx_buffer_info[i];
4539 /* write last descriptor with RS and EOP bits */
4540 cmd_type |= size | IGB_TXD_DCMD;
4541 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4543 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4545 /* set the timestamp */
4546 first->time_stamp = jiffies;
4548 /* Force memory writes to complete before letting h/w know there
4549 * are new descriptors to fetch. (Only applicable for weak-ordered
4550 * memory model archs, such as IA-64).
4552 * We also need this memory barrier to make certain all of the
4553 * status bits have been updated before next_to_watch is written.
4557 /* set next_to_watch value indicating a packet is present */
4558 first->next_to_watch = tx_desc;
4561 if (i == tx_ring->count)
4564 tx_ring->next_to_use = i;
4566 writel(i, tx_ring->tail);
4568 /* we need this if more than one processor can write to our tail
4569 * at a time, it synchronizes IO on IA64/Altix systems
4576 dev_err(tx_ring->dev, "TX DMA map failed\n");
4578 /* clear dma mappings for failed tx_buffer_info map */
4580 tx_buffer = &tx_ring->tx_buffer_info[i];
4581 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4582 if (tx_buffer == first)
4589 tx_ring->next_to_use = i;
4592 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4594 struct net_device *netdev = tx_ring->netdev;
4596 netif_stop_subqueue(netdev, tx_ring->queue_index);
4598 /* Herbert's original patch had:
4599 * smp_mb__after_netif_stop_queue();
4600 * but since that doesn't exist yet, just open code it.
4604 /* We need to check again in a case another CPU has just
4605 * made room available.
4607 if (igb_desc_unused(tx_ring) < size)
4611 netif_wake_subqueue(netdev, tx_ring->queue_index);
4613 u64_stats_update_begin(&tx_ring->tx_syncp2);
4614 tx_ring->tx_stats.restart_queue2++;
4615 u64_stats_update_end(&tx_ring->tx_syncp2);
4620 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4622 if (igb_desc_unused(tx_ring) >= size)
4624 return __igb_maybe_stop_tx(tx_ring, size);
4627 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4628 struct igb_ring *tx_ring)
4630 struct igb_tx_buffer *first;
4633 u16 count = TXD_USE_COUNT(skb_headlen(skb));
4634 __be16 protocol = vlan_get_protocol(skb);
4637 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4638 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4639 * + 2 desc gap to keep tail from touching head,
4640 * + 1 desc for context descriptor,
4641 * otherwise try next time
4643 if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4645 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4646 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4648 count += skb_shinfo(skb)->nr_frags;
4651 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4652 /* this is a hard error */
4653 return NETDEV_TX_BUSY;
4656 /* record the location of the first descriptor for this packet */
4657 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4659 first->bytecount = skb->len;
4660 first->gso_segs = 1;
4662 skb_tx_timestamp(skb);
4664 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4665 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4667 if (!(adapter->ptp_tx_skb)) {
4668 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4669 tx_flags |= IGB_TX_FLAGS_TSTAMP;
4671 adapter->ptp_tx_skb = skb_get(skb);
4672 adapter->ptp_tx_start = jiffies;
4673 if (adapter->hw.mac.type == e1000_82576)
4674 schedule_work(&adapter->ptp_tx_work);
4678 if (vlan_tx_tag_present(skb)) {
4679 tx_flags |= IGB_TX_FLAGS_VLAN;
4680 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4683 /* record initial flags and protocol */
4684 first->tx_flags = tx_flags;
4685 first->protocol = protocol;
4687 tso = igb_tso(tx_ring, first, &hdr_len);
4691 igb_tx_csum(tx_ring, first);
4693 igb_tx_map(tx_ring, first, hdr_len);
4695 /* Make sure there is space in the ring for the next send. */
4696 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4698 return NETDEV_TX_OK;
4701 igb_unmap_and_free_tx_resource(tx_ring, first);
4703 return NETDEV_TX_OK;
4706 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4707 struct sk_buff *skb)
4709 unsigned int r_idx = skb->queue_mapping;
4711 if (r_idx >= adapter->num_tx_queues)
4712 r_idx = r_idx % adapter->num_tx_queues;
4714 return adapter->tx_ring[r_idx];
4717 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4718 struct net_device *netdev)
4720 struct igb_adapter *adapter = netdev_priv(netdev);
4722 if (test_bit(__IGB_DOWN, &adapter->state)) {
4723 dev_kfree_skb_any(skb);
4724 return NETDEV_TX_OK;
4727 if (skb->len <= 0) {
4728 dev_kfree_skb_any(skb);
4729 return NETDEV_TX_OK;
4732 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4733 * in order to meet this minimum size requirement.
4735 if (unlikely(skb->len < 17)) {
4736 if (skb_pad(skb, 17 - skb->len))
4737 return NETDEV_TX_OK;
4739 skb_set_tail_pointer(skb, 17);
4742 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4746 * igb_tx_timeout - Respond to a Tx Hang
4747 * @netdev: network interface device structure
4749 static void igb_tx_timeout(struct net_device *netdev)
4751 struct igb_adapter *adapter = netdev_priv(netdev);
4752 struct e1000_hw *hw = &adapter->hw;
4754 /* Do the reset outside of interrupt context */
4755 adapter->tx_timeout_count++;
4757 if (hw->mac.type >= e1000_82580)
4758 hw->dev_spec._82575.global_device_reset = true;
4760 schedule_work(&adapter->reset_task);
4762 (adapter->eims_enable_mask & ~adapter->eims_other));
4765 static void igb_reset_task(struct work_struct *work)
4767 struct igb_adapter *adapter;
4768 adapter = container_of(work, struct igb_adapter, reset_task);
4771 netdev_err(adapter->netdev, "Reset adapter\n");
4772 igb_reinit_locked(adapter);
4776 * igb_get_stats64 - Get System Network Statistics
4777 * @netdev: network interface device structure
4778 * @stats: rtnl_link_stats64 pointer
4780 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4781 struct rtnl_link_stats64 *stats)
4783 struct igb_adapter *adapter = netdev_priv(netdev);
4785 spin_lock(&adapter->stats64_lock);
4786 igb_update_stats(adapter, &adapter->stats64);
4787 memcpy(stats, &adapter->stats64, sizeof(*stats));
4788 spin_unlock(&adapter->stats64_lock);
4794 * igb_change_mtu - Change the Maximum Transfer Unit
4795 * @netdev: network interface device structure
4796 * @new_mtu: new value for maximum frame size
4798 * Returns 0 on success, negative on failure
4800 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4802 struct igb_adapter *adapter = netdev_priv(netdev);
4803 struct pci_dev *pdev = adapter->pdev;
4804 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4806 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
4807 dev_err(&pdev->dev, "Invalid MTU setting\n");
4811 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4812 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
4813 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
4817 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4820 /* igb_down has a dependency on max_frame_size */
4821 adapter->max_frame_size = max_frame;
4823 if (netif_running(netdev))
4826 dev_info(&pdev->dev, "changing MTU from %d to %d\n",
4827 netdev->mtu, new_mtu);
4828 netdev->mtu = new_mtu;
4830 if (netif_running(netdev))
4835 clear_bit(__IGB_RESETTING, &adapter->state);
4841 * igb_update_stats - Update the board statistics counters
4842 * @adapter: board private structure
4844 void igb_update_stats(struct igb_adapter *adapter,
4845 struct rtnl_link_stats64 *net_stats)
4847 struct e1000_hw *hw = &adapter->hw;
4848 struct pci_dev *pdev = adapter->pdev;
4854 u64 _bytes, _packets;
4856 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4858 /* Prevent stats update while adapter is being reset, or if the pci
4859 * connection is down.
4861 if (adapter->link_speed == 0)
4863 if (pci_channel_offline(pdev))
4868 for (i = 0; i < adapter->num_rx_queues; i++) {
4869 u32 rqdpc = rd32(E1000_RQDPC(i));
4870 struct igb_ring *ring = adapter->rx_ring[i];
4873 ring->rx_stats.drops += rqdpc;
4874 net_stats->rx_fifo_errors += rqdpc;
4878 start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4879 _bytes = ring->rx_stats.bytes;
4880 _packets = ring->rx_stats.packets;
4881 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4883 packets += _packets;
4886 net_stats->rx_bytes = bytes;
4887 net_stats->rx_packets = packets;
4891 for (i = 0; i < adapter->num_tx_queues; i++) {
4892 struct igb_ring *ring = adapter->tx_ring[i];
4894 start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4895 _bytes = ring->tx_stats.bytes;
4896 _packets = ring->tx_stats.packets;
4897 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4899 packets += _packets;
4901 net_stats->tx_bytes = bytes;
4902 net_stats->tx_packets = packets;
4904 /* read stats registers */
4905 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4906 adapter->stats.gprc += rd32(E1000_GPRC);
4907 adapter->stats.gorc += rd32(E1000_GORCL);
4908 rd32(E1000_GORCH); /* clear GORCL */
4909 adapter->stats.bprc += rd32(E1000_BPRC);
4910 adapter->stats.mprc += rd32(E1000_MPRC);
4911 adapter->stats.roc += rd32(E1000_ROC);
4913 adapter->stats.prc64 += rd32(E1000_PRC64);
4914 adapter->stats.prc127 += rd32(E1000_PRC127);
4915 adapter->stats.prc255 += rd32(E1000_PRC255);
4916 adapter->stats.prc511 += rd32(E1000_PRC511);
4917 adapter->stats.prc1023 += rd32(E1000_PRC1023);
4918 adapter->stats.prc1522 += rd32(E1000_PRC1522);
4919 adapter->stats.symerrs += rd32(E1000_SYMERRS);
4920 adapter->stats.sec += rd32(E1000_SEC);
4922 mpc = rd32(E1000_MPC);
4923 adapter->stats.mpc += mpc;
4924 net_stats->rx_fifo_errors += mpc;
4925 adapter->stats.scc += rd32(E1000_SCC);
4926 adapter->stats.ecol += rd32(E1000_ECOL);
4927 adapter->stats.mcc += rd32(E1000_MCC);
4928 adapter->stats.latecol += rd32(E1000_LATECOL);
4929 adapter->stats.dc += rd32(E1000_DC);
4930 adapter->stats.rlec += rd32(E1000_RLEC);
4931 adapter->stats.xonrxc += rd32(E1000_XONRXC);
4932 adapter->stats.xontxc += rd32(E1000_XONTXC);
4933 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4934 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4935 adapter->stats.fcruc += rd32(E1000_FCRUC);
4936 adapter->stats.gptc += rd32(E1000_GPTC);
4937 adapter->stats.gotc += rd32(E1000_GOTCL);
4938 rd32(E1000_GOTCH); /* clear GOTCL */
4939 adapter->stats.rnbc += rd32(E1000_RNBC);
4940 adapter->stats.ruc += rd32(E1000_RUC);
4941 adapter->stats.rfc += rd32(E1000_RFC);
4942 adapter->stats.rjc += rd32(E1000_RJC);
4943 adapter->stats.tor += rd32(E1000_TORH);
4944 adapter->stats.tot += rd32(E1000_TOTH);
4945 adapter->stats.tpr += rd32(E1000_TPR);
4947 adapter->stats.ptc64 += rd32(E1000_PTC64);
4948 adapter->stats.ptc127 += rd32(E1000_PTC127);
4949 adapter->stats.ptc255 += rd32(E1000_PTC255);
4950 adapter->stats.ptc511 += rd32(E1000_PTC511);
4951 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4952 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4954 adapter->stats.mptc += rd32(E1000_MPTC);
4955 adapter->stats.bptc += rd32(E1000_BPTC);
4957 adapter->stats.tpt += rd32(E1000_TPT);
4958 adapter->stats.colc += rd32(E1000_COLC);
4960 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
4961 /* read internal phy specific stats */
4962 reg = rd32(E1000_CTRL_EXT);
4963 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
4964 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4966 /* this stat has invalid values on i210/i211 */
4967 if ((hw->mac.type != e1000_i210) &&
4968 (hw->mac.type != e1000_i211))
4969 adapter->stats.tncrs += rd32(E1000_TNCRS);
4972 adapter->stats.tsctc += rd32(E1000_TSCTC);
4973 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
4975 adapter->stats.iac += rd32(E1000_IAC);
4976 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
4977 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
4978 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
4979 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
4980 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
4981 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
4982 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
4983 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
4985 /* Fill out the OS statistics structure */
4986 net_stats->multicast = adapter->stats.mprc;
4987 net_stats->collisions = adapter->stats.colc;
4991 /* RLEC on some newer hardware can be incorrect so build
4992 * our own version based on RUC and ROC
4994 net_stats->rx_errors = adapter->stats.rxerrc +
4995 adapter->stats.crcerrs + adapter->stats.algnerrc +
4996 adapter->stats.ruc + adapter->stats.roc +
4997 adapter->stats.cexterr;
4998 net_stats->rx_length_errors = adapter->stats.ruc +
5000 net_stats->rx_crc_errors = adapter->stats.crcerrs;
5001 net_stats->rx_frame_errors = adapter->stats.algnerrc;
5002 net_stats->rx_missed_errors = adapter->stats.mpc;
5005 net_stats->tx_errors = adapter->stats.ecol +
5006 adapter->stats.latecol;
5007 net_stats->tx_aborted_errors = adapter->stats.ecol;
5008 net_stats->tx_window_errors = adapter->stats.latecol;
5009 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5011 /* Tx Dropped needs to be maintained elsewhere */
5014 if (hw->phy.media_type == e1000_media_type_copper) {
5015 if ((adapter->link_speed == SPEED_1000) &&
5016 (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5017 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5018 adapter->phy_stats.idle_errors += phy_tmp;
5022 /* Management Stats */
5023 adapter->stats.mgptc += rd32(E1000_MGTPTC);
5024 adapter->stats.mgprc += rd32(E1000_MGTPRC);
5025 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5028 reg = rd32(E1000_MANC);
5029 if (reg & E1000_MANC_EN_BMC2OS) {
5030 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5031 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5032 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5033 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5037 static irqreturn_t igb_msix_other(int irq, void *data)
5039 struct igb_adapter *adapter = data;
5040 struct e1000_hw *hw = &adapter->hw;
5041 u32 icr = rd32(E1000_ICR);
5042 /* reading ICR causes bit 31 of EICR to be cleared */
5044 if (icr & E1000_ICR_DRSTA)
5045 schedule_work(&adapter->reset_task);
5047 if (icr & E1000_ICR_DOUTSYNC) {
5048 /* HW is reporting DMA is out of sync */
5049 adapter->stats.doosync++;
5050 /* The DMA Out of Sync is also indication of a spoof event
5051 * in IOV mode. Check the Wrong VM Behavior register to
5052 * see if it is really a spoof event.
5054 igb_check_wvbr(adapter);
5057 /* Check for a mailbox event */
5058 if (icr & E1000_ICR_VMMB)
5059 igb_msg_task(adapter);
5061 if (icr & E1000_ICR_LSC) {
5062 hw->mac.get_link_status = 1;
5063 /* guard against interrupt when we're going down */
5064 if (!test_bit(__IGB_DOWN, &adapter->state))
5065 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5068 if (icr & E1000_ICR_TS) {
5069 u32 tsicr = rd32(E1000_TSICR);
5071 if (tsicr & E1000_TSICR_TXTS) {
5072 /* acknowledge the interrupt */
5073 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5074 /* retrieve hardware timestamp */
5075 schedule_work(&adapter->ptp_tx_work);
5079 wr32(E1000_EIMS, adapter->eims_other);
5084 static void igb_write_itr(struct igb_q_vector *q_vector)
5086 struct igb_adapter *adapter = q_vector->adapter;
5087 u32 itr_val = q_vector->itr_val & 0x7FFC;
5089 if (!q_vector->set_itr)
5095 if (adapter->hw.mac.type == e1000_82575)
5096 itr_val |= itr_val << 16;
5098 itr_val |= E1000_EITR_CNT_IGNR;
5100 writel(itr_val, q_vector->itr_register);
5101 q_vector->set_itr = 0;
5104 static irqreturn_t igb_msix_ring(int irq, void *data)
5106 struct igb_q_vector *q_vector = data;
5108 /* Write the ITR value calculated from the previous interrupt. */
5109 igb_write_itr(q_vector);
5111 napi_schedule(&q_vector->napi);
5116 #ifdef CONFIG_IGB_DCA
5117 static void igb_update_tx_dca(struct igb_adapter *adapter,
5118 struct igb_ring *tx_ring,
5121 struct e1000_hw *hw = &adapter->hw;
5122 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5124 if (hw->mac.type != e1000_82575)
5125 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5127 /* We can enable relaxed ordering for reads, but not writes when
5128 * DCA is enabled. This is due to a known issue in some chipsets
5129 * which will cause the DCA tag to be cleared.
5131 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5132 E1000_DCA_TXCTRL_DATA_RRO_EN |
5133 E1000_DCA_TXCTRL_DESC_DCA_EN;
5135 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5138 static void igb_update_rx_dca(struct igb_adapter *adapter,
5139 struct igb_ring *rx_ring,
5142 struct e1000_hw *hw = &adapter->hw;
5143 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5145 if (hw->mac.type != e1000_82575)
5146 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5148 /* We can enable relaxed ordering for reads, but not writes when
5149 * DCA is enabled. This is due to a known issue in some chipsets
5150 * which will cause the DCA tag to be cleared.
5152 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5153 E1000_DCA_RXCTRL_DESC_DCA_EN;
5155 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5158 static void igb_update_dca(struct igb_q_vector *q_vector)
5160 struct igb_adapter *adapter = q_vector->adapter;
5161 int cpu = get_cpu();
5163 if (q_vector->cpu == cpu)
5166 if (q_vector->tx.ring)
5167 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5169 if (q_vector->rx.ring)
5170 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5172 q_vector->cpu = cpu;
5177 static void igb_setup_dca(struct igb_adapter *adapter)
5179 struct e1000_hw *hw = &adapter->hw;
5182 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5185 /* Always use CB2 mode, difference is masked in the CB driver. */
5186 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5188 for (i = 0; i < adapter->num_q_vectors; i++) {
5189 adapter->q_vector[i]->cpu = -1;
5190 igb_update_dca(adapter->q_vector[i]);
5194 static int __igb_notify_dca(struct device *dev, void *data)
5196 struct net_device *netdev = dev_get_drvdata(dev);
5197 struct igb_adapter *adapter = netdev_priv(netdev);
5198 struct pci_dev *pdev = adapter->pdev;
5199 struct e1000_hw *hw = &adapter->hw;
5200 unsigned long event = *(unsigned long *)data;
5203 case DCA_PROVIDER_ADD:
5204 /* if already enabled, don't do it again */
5205 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5207 if (dca_add_requester(dev) == 0) {
5208 adapter->flags |= IGB_FLAG_DCA_ENABLED;
5209 dev_info(&pdev->dev, "DCA enabled\n");
5210 igb_setup_dca(adapter);
5213 /* Fall Through since DCA is disabled. */
5214 case DCA_PROVIDER_REMOVE:
5215 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5216 /* without this a class_device is left
5217 * hanging around in the sysfs model
5219 dca_remove_requester(dev);
5220 dev_info(&pdev->dev, "DCA disabled\n");
5221 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5222 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5230 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5235 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5238 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5240 #endif /* CONFIG_IGB_DCA */
5242 #ifdef CONFIG_PCI_IOV
5243 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5245 unsigned char mac_addr[ETH_ALEN];
5247 eth_zero_addr(mac_addr);
5248 igb_set_vf_mac(adapter, vf, mac_addr);
5250 /* By default spoof check is enabled for all VFs */
5251 adapter->vf_data[vf].spoofchk_enabled = true;
5257 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5259 struct e1000_hw *hw = &adapter->hw;
5263 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5264 ping = E1000_PF_CONTROL_MSG;
5265 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5266 ping |= E1000_VT_MSGTYPE_CTS;
5267 igb_write_mbx(hw, &ping, 1, i);
5271 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5273 struct e1000_hw *hw = &adapter->hw;
5274 u32 vmolr = rd32(E1000_VMOLR(vf));
5275 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5277 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5278 IGB_VF_FLAG_MULTI_PROMISC);
5279 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5281 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5282 vmolr |= E1000_VMOLR_MPME;
5283 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5284 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5286 /* if we have hashes and we are clearing a multicast promisc
5287 * flag we need to write the hashes to the MTA as this step
5288 * was previously skipped
5290 if (vf_data->num_vf_mc_hashes > 30) {
5291 vmolr |= E1000_VMOLR_MPME;
5292 } else if (vf_data->num_vf_mc_hashes) {
5294 vmolr |= E1000_VMOLR_ROMPE;
5295 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5296 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5300 wr32(E1000_VMOLR(vf), vmolr);
5302 /* there are flags left unprocessed, likely not supported */
5303 if (*msgbuf & E1000_VT_MSGINFO_MASK)
5309 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5310 u32 *msgbuf, u32 vf)
5312 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5313 u16 *hash_list = (u16 *)&msgbuf[1];
5314 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5317 /* salt away the number of multicast addresses assigned
5318 * to this VF for later use to restore when the PF multi cast
5321 vf_data->num_vf_mc_hashes = n;
5323 /* only up to 30 hash values supported */
5327 /* store the hashes for later use */
5328 for (i = 0; i < n; i++)
5329 vf_data->vf_mc_hashes[i] = hash_list[i];
5331 /* Flush and reset the mta with the new values */
5332 igb_set_rx_mode(adapter->netdev);
5337 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5339 struct e1000_hw *hw = &adapter->hw;
5340 struct vf_data_storage *vf_data;
5343 for (i = 0; i < adapter->vfs_allocated_count; i++) {
5344 u32 vmolr = rd32(E1000_VMOLR(i));
5345 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5347 vf_data = &adapter->vf_data[i];
5349 if ((vf_data->num_vf_mc_hashes > 30) ||
5350 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5351 vmolr |= E1000_VMOLR_MPME;
5352 } else if (vf_data->num_vf_mc_hashes) {
5353 vmolr |= E1000_VMOLR_ROMPE;
5354 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5355 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5357 wr32(E1000_VMOLR(i), vmolr);
5361 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5363 struct e1000_hw *hw = &adapter->hw;
5364 u32 pool_mask, reg, vid;
5367 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5369 /* Find the vlan filter for this id */
5370 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5371 reg = rd32(E1000_VLVF(i));
5373 /* remove the vf from the pool */
5376 /* if pool is empty then remove entry from vfta */
5377 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5378 (reg & E1000_VLVF_VLANID_ENABLE)) {
5380 vid = reg & E1000_VLVF_VLANID_MASK;
5381 igb_vfta_set(hw, vid, false);
5384 wr32(E1000_VLVF(i), reg);
5387 adapter->vf_data[vf].vlans_enabled = 0;
5390 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5392 struct e1000_hw *hw = &adapter->hw;
5395 /* The vlvf table only exists on 82576 hardware and newer */
5396 if (hw->mac.type < e1000_82576)
5399 /* we only need to do this if VMDq is enabled */
5400 if (!adapter->vfs_allocated_count)
5403 /* Find the vlan filter for this id */
5404 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5405 reg = rd32(E1000_VLVF(i));
5406 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5407 vid == (reg & E1000_VLVF_VLANID_MASK))
5412 if (i == E1000_VLVF_ARRAY_SIZE) {
5413 /* Did not find a matching VLAN ID entry that was
5414 * enabled. Search for a free filter entry, i.e.
5415 * one without the enable bit set
5417 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5418 reg = rd32(E1000_VLVF(i));
5419 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5423 if (i < E1000_VLVF_ARRAY_SIZE) {
5424 /* Found an enabled/available entry */
5425 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5427 /* if !enabled we need to set this up in vfta */
5428 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5429 /* add VID to filter table */
5430 igb_vfta_set(hw, vid, true);
5431 reg |= E1000_VLVF_VLANID_ENABLE;
5433 reg &= ~E1000_VLVF_VLANID_MASK;
5435 wr32(E1000_VLVF(i), reg);
5437 /* do not modify RLPML for PF devices */
5438 if (vf >= adapter->vfs_allocated_count)
5441 if (!adapter->vf_data[vf].vlans_enabled) {
5443 reg = rd32(E1000_VMOLR(vf));
5444 size = reg & E1000_VMOLR_RLPML_MASK;
5446 reg &= ~E1000_VMOLR_RLPML_MASK;
5448 wr32(E1000_VMOLR(vf), reg);
5451 adapter->vf_data[vf].vlans_enabled++;
5454 if (i < E1000_VLVF_ARRAY_SIZE) {
5455 /* remove vf from the pool */
5456 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5457 /* if pool is empty then remove entry from vfta */
5458 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5460 igb_vfta_set(hw, vid, false);
5462 wr32(E1000_VLVF(i), reg);
5464 /* do not modify RLPML for PF devices */
5465 if (vf >= adapter->vfs_allocated_count)
5468 adapter->vf_data[vf].vlans_enabled--;
5469 if (!adapter->vf_data[vf].vlans_enabled) {
5471 reg = rd32(E1000_VMOLR(vf));
5472 size = reg & E1000_VMOLR_RLPML_MASK;
5474 reg &= ~E1000_VMOLR_RLPML_MASK;
5476 wr32(E1000_VMOLR(vf), reg);
5483 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5485 struct e1000_hw *hw = &adapter->hw;
5488 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5490 wr32(E1000_VMVIR(vf), 0);
5493 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5494 int vf, u16 vlan, u8 qos)
5497 struct igb_adapter *adapter = netdev_priv(netdev);
5499 if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5502 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5505 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5506 igb_set_vmolr(adapter, vf, !vlan);
5507 adapter->vf_data[vf].pf_vlan = vlan;
5508 adapter->vf_data[vf].pf_qos = qos;
5509 dev_info(&adapter->pdev->dev,
5510 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5511 if (test_bit(__IGB_DOWN, &adapter->state)) {
5512 dev_warn(&adapter->pdev->dev,
5513 "The VF VLAN has been set, but the PF device is not up.\n");
5514 dev_warn(&adapter->pdev->dev,
5515 "Bring the PF device up before attempting to use the VF device.\n");
5518 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5520 igb_set_vmvir(adapter, vlan, vf);
5521 igb_set_vmolr(adapter, vf, true);
5522 adapter->vf_data[vf].pf_vlan = 0;
5523 adapter->vf_data[vf].pf_qos = 0;
5529 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5531 struct e1000_hw *hw = &adapter->hw;
5535 /* Find the vlan filter for this id */
5536 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5537 reg = rd32(E1000_VLVF(i));
5538 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5539 vid == (reg & E1000_VLVF_VLANID_MASK))
5543 if (i >= E1000_VLVF_ARRAY_SIZE)
5549 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5551 struct e1000_hw *hw = &adapter->hw;
5552 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5553 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5556 /* If in promiscuous mode we need to make sure the PF also has
5557 * the VLAN filter set.
5559 if (add && (adapter->netdev->flags & IFF_PROMISC))
5560 err = igb_vlvf_set(adapter, vid, add,
5561 adapter->vfs_allocated_count);
5565 err = igb_vlvf_set(adapter, vid, add, vf);
5570 /* Go through all the checks to see if the VLAN filter should
5571 * be wiped completely.
5573 if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5576 int regndx = igb_find_vlvf_entry(adapter, vid);
5579 /* See if any other pools are set for this VLAN filter
5580 * entry other than the PF.
5582 vlvf = bits = rd32(E1000_VLVF(regndx));
5583 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5584 adapter->vfs_allocated_count);
5585 /* If the filter was removed then ensure PF pool bit
5586 * is cleared if the PF only added itself to the pool
5587 * because the PF is in promiscuous mode.
5589 if ((vlvf & VLAN_VID_MASK) == vid &&
5590 !test_bit(vid, adapter->active_vlans) &&
5592 igb_vlvf_set(adapter, vid, add,
5593 adapter->vfs_allocated_count);
5600 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5602 /* clear flags - except flag that indicates PF has set the MAC */
5603 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5604 adapter->vf_data[vf].last_nack = jiffies;
5606 /* reset offloads to defaults */
5607 igb_set_vmolr(adapter, vf, true);
5609 /* reset vlans for device */
5610 igb_clear_vf_vfta(adapter, vf);
5611 if (adapter->vf_data[vf].pf_vlan)
5612 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5613 adapter->vf_data[vf].pf_vlan,
5614 adapter->vf_data[vf].pf_qos);
5616 igb_clear_vf_vfta(adapter, vf);
5618 /* reset multicast table array for vf */
5619 adapter->vf_data[vf].num_vf_mc_hashes = 0;
5621 /* Flush and reset the mta with the new values */
5622 igb_set_rx_mode(adapter->netdev);
5625 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5627 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5629 /* clear mac address as we were hotplug removed/added */
5630 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5631 eth_zero_addr(vf_mac);
5633 /* process remaining reset events */
5634 igb_vf_reset(adapter, vf);
5637 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5639 struct e1000_hw *hw = &adapter->hw;
5640 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5641 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5643 u8 *addr = (u8 *)(&msgbuf[1]);
5645 /* process all the same items cleared in a function level reset */
5646 igb_vf_reset(adapter, vf);
5648 /* set vf mac address */
5649 igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5651 /* enable transmit and receive for vf */
5652 reg = rd32(E1000_VFTE);
5653 wr32(E1000_VFTE, reg | (1 << vf));
5654 reg = rd32(E1000_VFRE);
5655 wr32(E1000_VFRE, reg | (1 << vf));
5657 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5659 /* reply to reset with ack and vf mac address */
5660 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5661 memcpy(addr, vf_mac, 6);
5662 igb_write_mbx(hw, msgbuf, 3, vf);
5665 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5667 /* The VF MAC Address is stored in a packed array of bytes
5668 * starting at the second 32 bit word of the msg array
5670 unsigned char *addr = (char *)&msg[1];
5673 if (is_valid_ether_addr(addr))
5674 err = igb_set_vf_mac(adapter, vf, addr);
5679 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5681 struct e1000_hw *hw = &adapter->hw;
5682 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5683 u32 msg = E1000_VT_MSGTYPE_NACK;
5685 /* if device isn't clear to send it shouldn't be reading either */
5686 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5687 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5688 igb_write_mbx(hw, &msg, 1, vf);
5689 vf_data->last_nack = jiffies;
5693 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5695 struct pci_dev *pdev = adapter->pdev;
5696 u32 msgbuf[E1000_VFMAILBOX_SIZE];
5697 struct e1000_hw *hw = &adapter->hw;
5698 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5701 retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5704 /* if receive failed revoke VF CTS stats and restart init */
5705 dev_err(&pdev->dev, "Error receiving message from VF\n");
5706 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5707 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5712 /* this is a message we already processed, do nothing */
5713 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5716 /* until the vf completes a reset it should not be
5717 * allowed to start any configuration.
5719 if (msgbuf[0] == E1000_VF_RESET) {
5720 igb_vf_reset_msg(adapter, vf);
5724 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5725 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5731 switch ((msgbuf[0] & 0xFFFF)) {
5732 case E1000_VF_SET_MAC_ADDR:
5734 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5735 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5737 dev_warn(&pdev->dev,
5738 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5741 case E1000_VF_SET_PROMISC:
5742 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5744 case E1000_VF_SET_MULTICAST:
5745 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5747 case E1000_VF_SET_LPE:
5748 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5750 case E1000_VF_SET_VLAN:
5752 if (vf_data->pf_vlan)
5753 dev_warn(&pdev->dev,
5754 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
5757 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5760 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
5765 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5767 /* notify the VF of the results of what it sent us */
5769 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5771 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5773 igb_write_mbx(hw, msgbuf, 1, vf);
5776 static void igb_msg_task(struct igb_adapter *adapter)
5778 struct e1000_hw *hw = &adapter->hw;
5781 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5782 /* process any reset requests */
5783 if (!igb_check_for_rst(hw, vf))
5784 igb_vf_reset_event(adapter, vf);
5786 /* process any messages pending */
5787 if (!igb_check_for_msg(hw, vf))
5788 igb_rcv_msg_from_vf(adapter, vf);
5790 /* process any acks */
5791 if (!igb_check_for_ack(hw, vf))
5792 igb_rcv_ack_from_vf(adapter, vf);
5797 * igb_set_uta - Set unicast filter table address
5798 * @adapter: board private structure
5800 * The unicast table address is a register array of 32-bit registers.
5801 * The table is meant to be used in a way similar to how the MTA is used
5802 * however due to certain limitations in the hardware it is necessary to
5803 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5804 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
5806 static void igb_set_uta(struct igb_adapter *adapter)
5808 struct e1000_hw *hw = &adapter->hw;
5811 /* The UTA table only exists on 82576 hardware and newer */
5812 if (hw->mac.type < e1000_82576)
5815 /* we only need to do this if VMDq is enabled */
5816 if (!adapter->vfs_allocated_count)
5819 for (i = 0; i < hw->mac.uta_reg_count; i++)
5820 array_wr32(E1000_UTA, i, ~0);
5824 * igb_intr_msi - Interrupt Handler
5825 * @irq: interrupt number
5826 * @data: pointer to a network interface device structure
5828 static irqreturn_t igb_intr_msi(int irq, void *data)
5830 struct igb_adapter *adapter = data;
5831 struct igb_q_vector *q_vector = adapter->q_vector[0];
5832 struct e1000_hw *hw = &adapter->hw;
5833 /* read ICR disables interrupts using IAM */
5834 u32 icr = rd32(E1000_ICR);
5836 igb_write_itr(q_vector);
5838 if (icr & E1000_ICR_DRSTA)
5839 schedule_work(&adapter->reset_task);
5841 if (icr & E1000_ICR_DOUTSYNC) {
5842 /* HW is reporting DMA is out of sync */
5843 adapter->stats.doosync++;
5846 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5847 hw->mac.get_link_status = 1;
5848 if (!test_bit(__IGB_DOWN, &adapter->state))
5849 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5852 if (icr & E1000_ICR_TS) {
5853 u32 tsicr = rd32(E1000_TSICR);
5855 if (tsicr & E1000_TSICR_TXTS) {
5856 /* acknowledge the interrupt */
5857 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5858 /* retrieve hardware timestamp */
5859 schedule_work(&adapter->ptp_tx_work);
5863 napi_schedule(&q_vector->napi);
5869 * igb_intr - Legacy Interrupt Handler
5870 * @irq: interrupt number
5871 * @data: pointer to a network interface device structure
5873 static irqreturn_t igb_intr(int irq, void *data)
5875 struct igb_adapter *adapter = data;
5876 struct igb_q_vector *q_vector = adapter->q_vector[0];
5877 struct e1000_hw *hw = &adapter->hw;
5878 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
5879 * need for the IMC write
5881 u32 icr = rd32(E1000_ICR);
5883 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5884 * not set, then the adapter didn't send an interrupt
5886 if (!(icr & E1000_ICR_INT_ASSERTED))
5889 igb_write_itr(q_vector);
5891 if (icr & E1000_ICR_DRSTA)
5892 schedule_work(&adapter->reset_task);
5894 if (icr & E1000_ICR_DOUTSYNC) {
5895 /* HW is reporting DMA is out of sync */
5896 adapter->stats.doosync++;
5899 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5900 hw->mac.get_link_status = 1;
5901 /* guard against interrupt when we're going down */
5902 if (!test_bit(__IGB_DOWN, &adapter->state))
5903 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5906 if (icr & E1000_ICR_TS) {
5907 u32 tsicr = rd32(E1000_TSICR);
5909 if (tsicr & E1000_TSICR_TXTS) {
5910 /* acknowledge the interrupt */
5911 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5912 /* retrieve hardware timestamp */
5913 schedule_work(&adapter->ptp_tx_work);
5917 napi_schedule(&q_vector->napi);
5922 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
5924 struct igb_adapter *adapter = q_vector->adapter;
5925 struct e1000_hw *hw = &adapter->hw;
5927 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
5928 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
5929 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
5930 igb_set_itr(q_vector);
5932 igb_update_ring_itr(q_vector);
5935 if (!test_bit(__IGB_DOWN, &adapter->state)) {
5936 if (adapter->msix_entries)
5937 wr32(E1000_EIMS, q_vector->eims_value);
5939 igb_irq_enable(adapter);
5944 * igb_poll - NAPI Rx polling callback
5945 * @napi: napi polling structure
5946 * @budget: count of how many packets we should handle
5948 static int igb_poll(struct napi_struct *napi, int budget)
5950 struct igb_q_vector *q_vector = container_of(napi,
5951 struct igb_q_vector,
5953 bool clean_complete = true;
5955 #ifdef CONFIG_IGB_DCA
5956 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
5957 igb_update_dca(q_vector);
5959 if (q_vector->tx.ring)
5960 clean_complete = igb_clean_tx_irq(q_vector);
5962 if (q_vector->rx.ring)
5963 clean_complete &= igb_clean_rx_irq(q_vector, budget);
5965 /* If all work not completed, return budget and keep polling */
5966 if (!clean_complete)
5969 /* If not enough Rx work done, exit the polling mode */
5970 napi_complete(napi);
5971 igb_ring_irq_enable(q_vector);
5977 * igb_clean_tx_irq - Reclaim resources after transmit completes
5978 * @q_vector: pointer to q_vector containing needed info
5980 * returns true if ring is completely cleaned
5982 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5984 struct igb_adapter *adapter = q_vector->adapter;
5985 struct igb_ring *tx_ring = q_vector->tx.ring;
5986 struct igb_tx_buffer *tx_buffer;
5987 union e1000_adv_tx_desc *tx_desc;
5988 unsigned int total_bytes = 0, total_packets = 0;
5989 unsigned int budget = q_vector->tx.work_limit;
5990 unsigned int i = tx_ring->next_to_clean;
5992 if (test_bit(__IGB_DOWN, &adapter->state))
5995 tx_buffer = &tx_ring->tx_buffer_info[i];
5996 tx_desc = IGB_TX_DESC(tx_ring, i);
5997 i -= tx_ring->count;
6000 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6002 /* if next_to_watch is not set then there is no work pending */
6006 /* prevent any other reads prior to eop_desc */
6007 read_barrier_depends();
6009 /* if DD is not set pending work has not been completed */
6010 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6013 /* clear next_to_watch to prevent false hangs */
6014 tx_buffer->next_to_watch = NULL;
6016 /* update the statistics for this packet */
6017 total_bytes += tx_buffer->bytecount;
6018 total_packets += tx_buffer->gso_segs;
6021 dev_kfree_skb_any(tx_buffer->skb);
6023 /* unmap skb header data */
6024 dma_unmap_single(tx_ring->dev,
6025 dma_unmap_addr(tx_buffer, dma),
6026 dma_unmap_len(tx_buffer, len),
6029 /* clear tx_buffer data */
6030 tx_buffer->skb = NULL;
6031 dma_unmap_len_set(tx_buffer, len, 0);
6033 /* clear last DMA location and unmap remaining buffers */
6034 while (tx_desc != eop_desc) {
6039 i -= tx_ring->count;
6040 tx_buffer = tx_ring->tx_buffer_info;
6041 tx_desc = IGB_TX_DESC(tx_ring, 0);
6044 /* unmap any remaining paged data */
6045 if (dma_unmap_len(tx_buffer, len)) {
6046 dma_unmap_page(tx_ring->dev,
6047 dma_unmap_addr(tx_buffer, dma),
6048 dma_unmap_len(tx_buffer, len),
6050 dma_unmap_len_set(tx_buffer, len, 0);
6054 /* move us one more past the eop_desc for start of next pkt */
6059 i -= tx_ring->count;
6060 tx_buffer = tx_ring->tx_buffer_info;
6061 tx_desc = IGB_TX_DESC(tx_ring, 0);
6064 /* issue prefetch for next Tx descriptor */
6067 /* update budget accounting */
6069 } while (likely(budget));
6071 netdev_tx_completed_queue(txring_txq(tx_ring),
6072 total_packets, total_bytes);
6073 i += tx_ring->count;
6074 tx_ring->next_to_clean = i;
6075 u64_stats_update_begin(&tx_ring->tx_syncp);
6076 tx_ring->tx_stats.bytes += total_bytes;
6077 tx_ring->tx_stats.packets += total_packets;
6078 u64_stats_update_end(&tx_ring->tx_syncp);
6079 q_vector->tx.total_bytes += total_bytes;
6080 q_vector->tx.total_packets += total_packets;
6082 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6083 struct e1000_hw *hw = &adapter->hw;
6085 /* Detect a transmit hang in hardware, this serializes the
6086 * check with the clearing of time_stamp and movement of i
6088 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6089 if (tx_buffer->next_to_watch &&
6090 time_after(jiffies, tx_buffer->time_stamp +
6091 (adapter->tx_timeout_factor * HZ)) &&
6092 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6094 /* detected Tx unit hang */
6095 dev_err(tx_ring->dev,
6096 "Detected Tx Unit Hang\n"
6100 " next_to_use <%x>\n"
6101 " next_to_clean <%x>\n"
6102 "buffer_info[next_to_clean]\n"
6103 " time_stamp <%lx>\n"
6104 " next_to_watch <%p>\n"
6106 " desc.status <%x>\n",
6107 tx_ring->queue_index,
6108 rd32(E1000_TDH(tx_ring->reg_idx)),
6109 readl(tx_ring->tail),
6110 tx_ring->next_to_use,
6111 tx_ring->next_to_clean,
6112 tx_buffer->time_stamp,
6113 tx_buffer->next_to_watch,
6115 tx_buffer->next_to_watch->wb.status);
6116 netif_stop_subqueue(tx_ring->netdev,
6117 tx_ring->queue_index);
6119 /* we are about to reset, no point in enabling stuff */
6124 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6125 if (unlikely(total_packets &&
6126 netif_carrier_ok(tx_ring->netdev) &&
6127 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6128 /* Make sure that anybody stopping the queue after this
6129 * sees the new next_to_clean.
6132 if (__netif_subqueue_stopped(tx_ring->netdev,
6133 tx_ring->queue_index) &&
6134 !(test_bit(__IGB_DOWN, &adapter->state))) {
6135 netif_wake_subqueue(tx_ring->netdev,
6136 tx_ring->queue_index);
6138 u64_stats_update_begin(&tx_ring->tx_syncp);
6139 tx_ring->tx_stats.restart_queue++;
6140 u64_stats_update_end(&tx_ring->tx_syncp);
6148 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6149 * @rx_ring: rx descriptor ring to store buffers on
6150 * @old_buff: donor buffer to have page reused
6152 * Synchronizes page for reuse by the adapter
6154 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6155 struct igb_rx_buffer *old_buff)
6157 struct igb_rx_buffer *new_buff;
6158 u16 nta = rx_ring->next_to_alloc;
6160 new_buff = &rx_ring->rx_buffer_info[nta];
6162 /* update, and store next to alloc */
6164 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6166 /* transfer page from old buffer to new buffer */
6167 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6169 /* sync the buffer for use by the device */
6170 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6171 old_buff->page_offset,
6176 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6178 unsigned int truesize)
6180 /* avoid re-using remote pages */
6181 if (unlikely(page_to_nid(page) != numa_node_id()))
6184 #if (PAGE_SIZE < 8192)
6185 /* if we are only owner of page we can reuse it */
6186 if (unlikely(page_count(page) != 1))
6189 /* flip page offset to other buffer */
6190 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6192 /* since we are the only owner of the page and we need to
6193 * increment it, just set the value to 2 in order to avoid
6194 * an unnecessary locked operation
6196 atomic_set(&page->_count, 2);
6198 /* move offset up to the next cache line */
6199 rx_buffer->page_offset += truesize;
6201 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6204 /* bump ref count on page before it is given to the stack */
6212 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6213 * @rx_ring: rx descriptor ring to transact packets on
6214 * @rx_buffer: buffer containing page to add
6215 * @rx_desc: descriptor containing length of buffer written by hardware
6216 * @skb: sk_buff to place the data into
6218 * This function will add the data contained in rx_buffer->page to the skb.
6219 * This is done either through a direct copy if the data in the buffer is
6220 * less than the skb header size, otherwise it will just attach the page as
6221 * a frag to the skb.
6223 * The function will then update the page offset if necessary and return
6224 * true if the buffer can be reused by the adapter.
6226 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6227 struct igb_rx_buffer *rx_buffer,
6228 union e1000_adv_rx_desc *rx_desc,
6229 struct sk_buff *skb)
6231 struct page *page = rx_buffer->page;
6232 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6233 #if (PAGE_SIZE < 8192)
6234 unsigned int truesize = IGB_RX_BUFSZ;
6236 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6239 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6240 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6242 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6243 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6244 va += IGB_TS_HDR_LEN;
6245 size -= IGB_TS_HDR_LEN;
6248 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6250 /* we can reuse buffer as-is, just make sure it is local */
6251 if (likely(page_to_nid(page) == numa_node_id()))
6254 /* this page cannot be reused so discard it */
6259 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6260 rx_buffer->page_offset, size, truesize);
6262 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6265 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6266 union e1000_adv_rx_desc *rx_desc,
6267 struct sk_buff *skb)
6269 struct igb_rx_buffer *rx_buffer;
6272 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6274 page = rx_buffer->page;
6278 void *page_addr = page_address(page) +
6279 rx_buffer->page_offset;
6281 /* prefetch first cache line of first page */
6282 prefetch(page_addr);
6283 #if L1_CACHE_BYTES < 128
6284 prefetch(page_addr + L1_CACHE_BYTES);
6287 /* allocate a skb to store the frags */
6288 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6290 if (unlikely(!skb)) {
6291 rx_ring->rx_stats.alloc_failed++;
6295 /* we will be copying header into skb->data in
6296 * pskb_may_pull so it is in our interest to prefetch
6297 * it now to avoid a possible cache miss
6299 prefetchw(skb->data);
6302 /* we are reusing so sync this buffer for CPU use */
6303 dma_sync_single_range_for_cpu(rx_ring->dev,
6305 rx_buffer->page_offset,
6309 /* pull page into skb */
6310 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6311 /* hand second half of page back to the ring */
6312 igb_reuse_rx_page(rx_ring, rx_buffer);
6314 /* we are not reusing the buffer so unmap it */
6315 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6316 PAGE_SIZE, DMA_FROM_DEVICE);
6319 /* clear contents of rx_buffer */
6320 rx_buffer->page = NULL;
6325 static inline void igb_rx_checksum(struct igb_ring *ring,
6326 union e1000_adv_rx_desc *rx_desc,
6327 struct sk_buff *skb)
6329 skb_checksum_none_assert(skb);
6331 /* Ignore Checksum bit is set */
6332 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6335 /* Rx checksum disabled via ethtool */
6336 if (!(ring->netdev->features & NETIF_F_RXCSUM))
6339 /* TCP/UDP checksum error bit is set */
6340 if (igb_test_staterr(rx_desc,
6341 E1000_RXDEXT_STATERR_TCPE |
6342 E1000_RXDEXT_STATERR_IPE)) {
6343 /* work around errata with sctp packets where the TCPE aka
6344 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6345 * packets, (aka let the stack check the crc32c)
6347 if (!((skb->len == 60) &&
6348 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6349 u64_stats_update_begin(&ring->rx_syncp);
6350 ring->rx_stats.csum_err++;
6351 u64_stats_update_end(&ring->rx_syncp);
6353 /* let the stack verify checksum errors */
6356 /* It must be a TCP or UDP packet with a valid checksum */
6357 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6358 E1000_RXD_STAT_UDPCS))
6359 skb->ip_summed = CHECKSUM_UNNECESSARY;
6361 dev_dbg(ring->dev, "cksum success: bits %08X\n",
6362 le32_to_cpu(rx_desc->wb.upper.status_error));
6365 static inline void igb_rx_hash(struct igb_ring *ring,
6366 union e1000_adv_rx_desc *rx_desc,
6367 struct sk_buff *skb)
6369 if (ring->netdev->features & NETIF_F_RXHASH)
6370 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6374 * igb_is_non_eop - process handling of non-EOP buffers
6375 * @rx_ring: Rx ring being processed
6376 * @rx_desc: Rx descriptor for current buffer
6377 * @skb: current socket buffer containing buffer in progress
6379 * This function updates next to clean. If the buffer is an EOP buffer
6380 * this function exits returning false, otherwise it will place the
6381 * sk_buff in the next buffer to be chained and return true indicating
6382 * that this is in fact a non-EOP buffer.
6384 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6385 union e1000_adv_rx_desc *rx_desc)
6387 u32 ntc = rx_ring->next_to_clean + 1;
6389 /* fetch, update, and store next to clean */
6390 ntc = (ntc < rx_ring->count) ? ntc : 0;
6391 rx_ring->next_to_clean = ntc;
6393 prefetch(IGB_RX_DESC(rx_ring, ntc));
6395 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6402 * igb_get_headlen - determine size of header for LRO/GRO
6403 * @data: pointer to the start of the headers
6404 * @max_len: total length of section to find headers in
6406 * This function is meant to determine the length of headers that will
6407 * be recognized by hardware for LRO, and GRO offloads. The main
6408 * motivation of doing this is to only perform one pull for IPv4 TCP
6409 * packets so that we can do basic things like calculating the gso_size
6410 * based on the average data per packet.
6412 static unsigned int igb_get_headlen(unsigned char *data,
6413 unsigned int max_len)
6416 unsigned char *network;
6419 struct vlan_hdr *vlan;
6422 struct ipv6hdr *ipv6;
6425 u8 nexthdr = 0; /* default to not TCP */
6428 /* this should never happen, but better safe than sorry */
6429 if (max_len < ETH_HLEN)
6432 /* initialize network frame pointer */
6435 /* set first protocol and move network header forward */
6436 protocol = hdr.eth->h_proto;
6437 hdr.network += ETH_HLEN;
6439 /* handle any vlan tag if present */
6440 if (protocol == __constant_htons(ETH_P_8021Q)) {
6441 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6444 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6445 hdr.network += VLAN_HLEN;
6448 /* handle L3 protocols */
6449 if (protocol == __constant_htons(ETH_P_IP)) {
6450 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6453 /* access ihl as a u8 to avoid unaligned access on ia64 */
6454 hlen = (hdr.network[0] & 0x0F) << 2;
6456 /* verify hlen meets minimum size requirements */
6457 if (hlen < sizeof(struct iphdr))
6458 return hdr.network - data;
6460 /* record next protocol if header is present */
6461 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6462 nexthdr = hdr.ipv4->protocol;
6463 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6464 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6467 /* record next protocol */
6468 nexthdr = hdr.ipv6->nexthdr;
6469 hlen = sizeof(struct ipv6hdr);
6471 return hdr.network - data;
6474 /* relocate pointer to start of L4 header */
6475 hdr.network += hlen;
6477 /* finally sort out TCP */
6478 if (nexthdr == IPPROTO_TCP) {
6479 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6482 /* access doff as a u8 to avoid unaligned access on ia64 */
6483 hlen = (hdr.network[12] & 0xF0) >> 2;
6485 /* verify hlen meets minimum size requirements */
6486 if (hlen < sizeof(struct tcphdr))
6487 return hdr.network - data;
6489 hdr.network += hlen;
6490 } else if (nexthdr == IPPROTO_UDP) {
6491 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6494 hdr.network += sizeof(struct udphdr);
6497 /* If everything has gone correctly hdr.network should be the
6498 * data section of the packet and will be the end of the header.
6499 * If not then it probably represents the end of the last recognized
6502 if ((hdr.network - data) < max_len)
6503 return hdr.network - data;
6509 * igb_pull_tail - igb specific version of skb_pull_tail
6510 * @rx_ring: rx descriptor ring packet is being transacted on
6511 * @rx_desc: pointer to the EOP Rx descriptor
6512 * @skb: pointer to current skb being adjusted
6514 * This function is an igb specific version of __pskb_pull_tail. The
6515 * main difference between this version and the original function is that
6516 * this function can make several assumptions about the state of things
6517 * that allow for significant optimizations versus the standard function.
6518 * As a result we can do things like drop a frag and maintain an accurate
6519 * truesize for the skb.
6521 static void igb_pull_tail(struct igb_ring *rx_ring,
6522 union e1000_adv_rx_desc *rx_desc,
6523 struct sk_buff *skb)
6525 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6527 unsigned int pull_len;
6529 /* it is valid to use page_address instead of kmap since we are
6530 * working with pages allocated out of the lomem pool per
6531 * alloc_page(GFP_ATOMIC)
6533 va = skb_frag_address(frag);
6535 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6536 /* retrieve timestamp from buffer */
6537 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6539 /* update pointers to remove timestamp header */
6540 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6541 frag->page_offset += IGB_TS_HDR_LEN;
6542 skb->data_len -= IGB_TS_HDR_LEN;
6543 skb->len -= IGB_TS_HDR_LEN;
6545 /* move va to start of packet data */
6546 va += IGB_TS_HDR_LEN;
6549 /* we need the header to contain the greater of either ETH_HLEN or
6550 * 60 bytes if the skb->len is less than 60 for skb_pad.
6552 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6554 /* align pull length to size of long to optimize memcpy performance */
6555 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6557 /* update all of the pointers */
6558 skb_frag_size_sub(frag, pull_len);
6559 frag->page_offset += pull_len;
6560 skb->data_len -= pull_len;
6561 skb->tail += pull_len;
6565 * igb_cleanup_headers - Correct corrupted or empty headers
6566 * @rx_ring: rx descriptor ring packet is being transacted on
6567 * @rx_desc: pointer to the EOP Rx descriptor
6568 * @skb: pointer to current skb being fixed
6570 * Address the case where we are pulling data in on pages only
6571 * and as such no data is present in the skb header.
6573 * In addition if skb is not at least 60 bytes we need to pad it so that
6574 * it is large enough to qualify as a valid Ethernet frame.
6576 * Returns true if an error was encountered and skb was freed.
6578 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6579 union e1000_adv_rx_desc *rx_desc,
6580 struct sk_buff *skb)
6582 if (unlikely((igb_test_staterr(rx_desc,
6583 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6584 struct net_device *netdev = rx_ring->netdev;
6585 if (!(netdev->features & NETIF_F_RXALL)) {
6586 dev_kfree_skb_any(skb);
6591 /* place header in linear portion of buffer */
6592 if (skb_is_nonlinear(skb))
6593 igb_pull_tail(rx_ring, rx_desc, skb);
6595 /* if skb_pad returns an error the skb was freed */
6596 if (unlikely(skb->len < 60)) {
6597 int pad_len = 60 - skb->len;
6599 if (skb_pad(skb, pad_len))
6601 __skb_put(skb, pad_len);
6608 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6609 * @rx_ring: rx descriptor ring packet is being transacted on
6610 * @rx_desc: pointer to the EOP Rx descriptor
6611 * @skb: pointer to current skb being populated
6613 * This function checks the ring, descriptor, and packet information in
6614 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6615 * other fields within the skb.
6617 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6618 union e1000_adv_rx_desc *rx_desc,
6619 struct sk_buff *skb)
6621 struct net_device *dev = rx_ring->netdev;
6623 igb_rx_hash(rx_ring, rx_desc, skb);
6625 igb_rx_checksum(rx_ring, rx_desc, skb);
6627 igb_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
6629 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6630 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6632 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6633 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6634 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6636 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6638 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6641 skb_record_rx_queue(skb, rx_ring->queue_index);
6643 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6646 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6648 struct igb_ring *rx_ring = q_vector->rx.ring;
6649 struct sk_buff *skb = rx_ring->skb;
6650 unsigned int total_bytes = 0, total_packets = 0;
6651 u16 cleaned_count = igb_desc_unused(rx_ring);
6654 union e1000_adv_rx_desc *rx_desc;
6656 /* return some buffers to hardware, one at a time is too slow */
6657 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6658 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6662 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6664 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6667 /* This memory barrier is needed to keep us from reading
6668 * any other fields out of the rx_desc until we know the
6669 * RXD_STAT_DD bit is set
6673 /* retrieve a buffer from the ring */
6674 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6676 /* exit if we failed to retrieve a buffer */
6682 /* fetch next buffer in frame if non-eop */
6683 if (igb_is_non_eop(rx_ring, rx_desc))
6686 /* verify the packet layout is correct */
6687 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6692 /* probably a little skewed due to removing CRC */
6693 total_bytes += skb->len;
6695 /* populate checksum, timestamp, VLAN, and protocol */
6696 igb_process_skb_fields(rx_ring, rx_desc, skb);
6698 napi_gro_receive(&q_vector->napi, skb);
6700 /* reset skb pointer */
6703 /* update budget accounting */
6705 } while (likely(total_packets < budget));
6707 /* place incomplete frames back on ring for completion */
6710 u64_stats_update_begin(&rx_ring->rx_syncp);
6711 rx_ring->rx_stats.packets += total_packets;
6712 rx_ring->rx_stats.bytes += total_bytes;
6713 u64_stats_update_end(&rx_ring->rx_syncp);
6714 q_vector->rx.total_packets += total_packets;
6715 q_vector->rx.total_bytes += total_bytes;
6718 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6720 return (total_packets < budget);
6723 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6724 struct igb_rx_buffer *bi)
6726 struct page *page = bi->page;
6729 /* since we are recycling buffers we should seldom need to alloc */
6733 /* alloc new page for storage */
6734 page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6735 if (unlikely(!page)) {
6736 rx_ring->rx_stats.alloc_failed++;
6740 /* map page for use */
6741 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6743 /* if mapping failed free memory back to system since
6744 * there isn't much point in holding memory we can't use
6746 if (dma_mapping_error(rx_ring->dev, dma)) {
6749 rx_ring->rx_stats.alloc_failed++;
6755 bi->page_offset = 0;
6761 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
6762 * @adapter: address of board private structure
6764 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
6766 union e1000_adv_rx_desc *rx_desc;
6767 struct igb_rx_buffer *bi;
6768 u16 i = rx_ring->next_to_use;
6774 rx_desc = IGB_RX_DESC(rx_ring, i);
6775 bi = &rx_ring->rx_buffer_info[i];
6776 i -= rx_ring->count;
6779 if (!igb_alloc_mapped_page(rx_ring, bi))
6782 /* Refresh the desc even if buffer_addrs didn't change
6783 * because each write-back erases this info.
6785 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
6791 rx_desc = IGB_RX_DESC(rx_ring, 0);
6792 bi = rx_ring->rx_buffer_info;
6793 i -= rx_ring->count;
6796 /* clear the hdr_addr for the next_to_use descriptor */
6797 rx_desc->read.hdr_addr = 0;
6800 } while (cleaned_count);
6802 i += rx_ring->count;
6804 if (rx_ring->next_to_use != i) {
6805 /* record the next descriptor to use */
6806 rx_ring->next_to_use = i;
6808 /* update next to alloc since we have filled the ring */
6809 rx_ring->next_to_alloc = i;
6811 /* Force memory writes to complete before letting h/w
6812 * know there are new descriptors to fetch. (Only
6813 * applicable for weak-ordered memory model archs,
6817 writel(i, rx_ring->tail);
6827 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6829 struct igb_adapter *adapter = netdev_priv(netdev);
6830 struct mii_ioctl_data *data = if_mii(ifr);
6832 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6837 data->phy_id = adapter->hw.phy.addr;
6840 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6857 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6863 return igb_mii_ioctl(netdev, ifr, cmd);
6865 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6871 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6873 struct igb_adapter *adapter = hw->back;
6875 if (pcie_capability_read_word(adapter->pdev, reg, value))
6876 return -E1000_ERR_CONFIG;
6881 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6883 struct igb_adapter *adapter = hw->back;
6885 if (pcie_capability_write_word(adapter->pdev, reg, *value))
6886 return -E1000_ERR_CONFIG;
6891 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
6893 struct igb_adapter *adapter = netdev_priv(netdev);
6894 struct e1000_hw *hw = &adapter->hw;
6896 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
6899 /* enable VLAN tag insert/strip */
6900 ctrl = rd32(E1000_CTRL);
6901 ctrl |= E1000_CTRL_VME;
6902 wr32(E1000_CTRL, ctrl);
6904 /* Disable CFI check */
6905 rctl = rd32(E1000_RCTL);
6906 rctl &= ~E1000_RCTL_CFIEN;
6907 wr32(E1000_RCTL, rctl);
6909 /* disable VLAN tag insert/strip */
6910 ctrl = rd32(E1000_CTRL);
6911 ctrl &= ~E1000_CTRL_VME;
6912 wr32(E1000_CTRL, ctrl);
6915 igb_rlpml_set(adapter);
6918 static int igb_vlan_rx_add_vid(struct net_device *netdev,
6919 __be16 proto, u16 vid)
6921 struct igb_adapter *adapter = netdev_priv(netdev);
6922 struct e1000_hw *hw = &adapter->hw;
6923 int pf_id = adapter->vfs_allocated_count;
6925 /* attempt to add filter to vlvf array */
6926 igb_vlvf_set(adapter, vid, true, pf_id);
6928 /* add the filter since PF can receive vlans w/o entry in vlvf */
6929 igb_vfta_set(hw, vid, true);
6931 set_bit(vid, adapter->active_vlans);
6936 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
6937 __be16 proto, u16 vid)
6939 struct igb_adapter *adapter = netdev_priv(netdev);
6940 struct e1000_hw *hw = &adapter->hw;
6941 int pf_id = adapter->vfs_allocated_count;
6944 /* remove vlan from VLVF table array */
6945 err = igb_vlvf_set(adapter, vid, false, pf_id);
6947 /* if vid was not present in VLVF just remove it from table */
6949 igb_vfta_set(hw, vid, false);
6951 clear_bit(vid, adapter->active_vlans);
6956 static void igb_restore_vlan(struct igb_adapter *adapter)
6960 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
6962 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
6963 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
6966 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
6968 struct pci_dev *pdev = adapter->pdev;
6969 struct e1000_mac_info *mac = &adapter->hw.mac;
6973 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6974 * for the switch() below to work
6976 if ((spd & 1) || (dplx & ~1))
6979 /* Fiber NIC's only allow 1000 gbps Full duplex
6980 * and 100Mbps Full duplex for 100baseFx sfp
6982 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
6983 switch (spd + dplx) {
6984 case SPEED_10 + DUPLEX_HALF:
6985 case SPEED_10 + DUPLEX_FULL:
6986 case SPEED_100 + DUPLEX_HALF:
6993 switch (spd + dplx) {
6994 case SPEED_10 + DUPLEX_HALF:
6995 mac->forced_speed_duplex = ADVERTISE_10_HALF;
6997 case SPEED_10 + DUPLEX_FULL:
6998 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7000 case SPEED_100 + DUPLEX_HALF:
7001 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7003 case SPEED_100 + DUPLEX_FULL:
7004 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7006 case SPEED_1000 + DUPLEX_FULL:
7008 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7010 case SPEED_1000 + DUPLEX_HALF: /* not supported */
7015 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7016 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7021 dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7025 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7028 struct net_device *netdev = pci_get_drvdata(pdev);
7029 struct igb_adapter *adapter = netdev_priv(netdev);
7030 struct e1000_hw *hw = &adapter->hw;
7031 u32 ctrl, rctl, status;
7032 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7037 netif_device_detach(netdev);
7039 if (netif_running(netdev))
7040 __igb_close(netdev, true);
7042 igb_clear_interrupt_scheme(adapter);
7045 retval = pci_save_state(pdev);
7050 status = rd32(E1000_STATUS);
7051 if (status & E1000_STATUS_LU)
7052 wufc &= ~E1000_WUFC_LNKC;
7055 igb_setup_rctl(adapter);
7056 igb_set_rx_mode(netdev);
7058 /* turn on all-multi mode if wake on multicast is enabled */
7059 if (wufc & E1000_WUFC_MC) {
7060 rctl = rd32(E1000_RCTL);
7061 rctl |= E1000_RCTL_MPE;
7062 wr32(E1000_RCTL, rctl);
7065 ctrl = rd32(E1000_CTRL);
7066 /* advertise wake from D3Cold */
7067 #define E1000_CTRL_ADVD3WUC 0x00100000
7068 /* phy power management enable */
7069 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7070 ctrl |= E1000_CTRL_ADVD3WUC;
7071 wr32(E1000_CTRL, ctrl);
7073 /* Allow time for pending master requests to run */
7074 igb_disable_pcie_master(hw);
7076 wr32(E1000_WUC, E1000_WUC_PME_EN);
7077 wr32(E1000_WUFC, wufc);
7080 wr32(E1000_WUFC, 0);
7083 *enable_wake = wufc || adapter->en_mng_pt;
7085 igb_power_down_link(adapter);
7087 igb_power_up_link(adapter);
7089 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7090 * would have already happened in close and is redundant.
7092 igb_release_hw_control(adapter);
7094 pci_disable_device(pdev);
7100 #ifdef CONFIG_PM_SLEEP
7101 static int igb_suspend(struct device *dev)
7105 struct pci_dev *pdev = to_pci_dev(dev);
7107 retval = __igb_shutdown(pdev, &wake, 0);
7112 pci_prepare_to_sleep(pdev);
7114 pci_wake_from_d3(pdev, false);
7115 pci_set_power_state(pdev, PCI_D3hot);
7120 #endif /* CONFIG_PM_SLEEP */
7122 static int igb_resume(struct device *dev)
7124 struct pci_dev *pdev = to_pci_dev(dev);
7125 struct net_device *netdev = pci_get_drvdata(pdev);
7126 struct igb_adapter *adapter = netdev_priv(netdev);
7127 struct e1000_hw *hw = &adapter->hw;
7130 pci_set_power_state(pdev, PCI_D0);
7131 pci_restore_state(pdev);
7132 pci_save_state(pdev);
7134 err = pci_enable_device_mem(pdev);
7137 "igb: Cannot enable PCI device from suspend\n");
7140 pci_set_master(pdev);
7142 pci_enable_wake(pdev, PCI_D3hot, 0);
7143 pci_enable_wake(pdev, PCI_D3cold, 0);
7145 if (igb_init_interrupt_scheme(adapter, true)) {
7146 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7152 /* let the f/w know that the h/w is now under the control of the
7155 igb_get_hw_control(adapter);
7157 wr32(E1000_WUS, ~0);
7159 if (netdev->flags & IFF_UP) {
7161 err = __igb_open(netdev, true);
7167 netif_device_attach(netdev);
7171 #ifdef CONFIG_PM_RUNTIME
7172 static int igb_runtime_idle(struct device *dev)
7174 struct pci_dev *pdev = to_pci_dev(dev);
7175 struct net_device *netdev = pci_get_drvdata(pdev);
7176 struct igb_adapter *adapter = netdev_priv(netdev);
7178 if (!igb_has_link(adapter))
7179 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7184 static int igb_runtime_suspend(struct device *dev)
7186 struct pci_dev *pdev = to_pci_dev(dev);
7190 retval = __igb_shutdown(pdev, &wake, 1);
7195 pci_prepare_to_sleep(pdev);
7197 pci_wake_from_d3(pdev, false);
7198 pci_set_power_state(pdev, PCI_D3hot);
7204 static int igb_runtime_resume(struct device *dev)
7206 return igb_resume(dev);
7208 #endif /* CONFIG_PM_RUNTIME */
7211 static void igb_shutdown(struct pci_dev *pdev)
7215 __igb_shutdown(pdev, &wake, 0);
7217 if (system_state == SYSTEM_POWER_OFF) {
7218 pci_wake_from_d3(pdev, wake);
7219 pci_set_power_state(pdev, PCI_D3hot);
7223 #ifdef CONFIG_PCI_IOV
7224 static int igb_sriov_reinit(struct pci_dev *dev)
7226 struct net_device *netdev = pci_get_drvdata(dev);
7227 struct igb_adapter *adapter = netdev_priv(netdev);
7228 struct pci_dev *pdev = adapter->pdev;
7232 if (netif_running(netdev))
7237 igb_clear_interrupt_scheme(adapter);
7239 igb_init_queue_configuration(adapter);
7241 if (igb_init_interrupt_scheme(adapter, true)) {
7242 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7246 if (netif_running(netdev))
7254 static int igb_pci_disable_sriov(struct pci_dev *dev)
7256 int err = igb_disable_sriov(dev);
7259 err = igb_sriov_reinit(dev);
7264 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7266 int err = igb_enable_sriov(dev, num_vfs);
7271 err = igb_sriov_reinit(dev);
7280 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7282 #ifdef CONFIG_PCI_IOV
7284 return igb_pci_disable_sriov(dev);
7286 return igb_pci_enable_sriov(dev, num_vfs);
7291 #ifdef CONFIG_NET_POLL_CONTROLLER
7292 /* Polling 'interrupt' - used by things like netconsole to send skbs
7293 * without having to re-enable interrupts. It's not called while
7294 * the interrupt routine is executing.
7296 static void igb_netpoll(struct net_device *netdev)
7298 struct igb_adapter *adapter = netdev_priv(netdev);
7299 struct e1000_hw *hw = &adapter->hw;
7300 struct igb_q_vector *q_vector;
7303 for (i = 0; i < adapter->num_q_vectors; i++) {
7304 q_vector = adapter->q_vector[i];
7305 if (adapter->msix_entries)
7306 wr32(E1000_EIMC, q_vector->eims_value);
7308 igb_irq_disable(adapter);
7309 napi_schedule(&q_vector->napi);
7312 #endif /* CONFIG_NET_POLL_CONTROLLER */
7315 * igb_io_error_detected - called when PCI error is detected
7316 * @pdev: Pointer to PCI device
7317 * @state: The current pci connection state
7319 * This function is called after a PCI bus error affecting
7320 * this device has been detected.
7322 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7323 pci_channel_state_t state)
7325 struct net_device *netdev = pci_get_drvdata(pdev);
7326 struct igb_adapter *adapter = netdev_priv(netdev);
7328 netif_device_detach(netdev);
7330 if (state == pci_channel_io_perm_failure)
7331 return PCI_ERS_RESULT_DISCONNECT;
7333 if (netif_running(netdev))
7335 pci_disable_device(pdev);
7337 /* Request a slot slot reset. */
7338 return PCI_ERS_RESULT_NEED_RESET;
7342 * igb_io_slot_reset - called after the pci bus has been reset.
7343 * @pdev: Pointer to PCI device
7345 * Restart the card from scratch, as if from a cold-boot. Implementation
7346 * resembles the first-half of the igb_resume routine.
7348 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7350 struct net_device *netdev = pci_get_drvdata(pdev);
7351 struct igb_adapter *adapter = netdev_priv(netdev);
7352 struct e1000_hw *hw = &adapter->hw;
7353 pci_ers_result_t result;
7356 if (pci_enable_device_mem(pdev)) {
7358 "Cannot re-enable PCI device after reset.\n");
7359 result = PCI_ERS_RESULT_DISCONNECT;
7361 pci_set_master(pdev);
7362 pci_restore_state(pdev);
7363 pci_save_state(pdev);
7365 pci_enable_wake(pdev, PCI_D3hot, 0);
7366 pci_enable_wake(pdev, PCI_D3cold, 0);
7369 wr32(E1000_WUS, ~0);
7370 result = PCI_ERS_RESULT_RECOVERED;
7373 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7376 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7378 /* non-fatal, continue */
7385 * igb_io_resume - called when traffic can start flowing again.
7386 * @pdev: Pointer to PCI device
7388 * This callback is called when the error recovery driver tells us that
7389 * its OK to resume normal operation. Implementation resembles the
7390 * second-half of the igb_resume routine.
7392 static void igb_io_resume(struct pci_dev *pdev)
7394 struct net_device *netdev = pci_get_drvdata(pdev);
7395 struct igb_adapter *adapter = netdev_priv(netdev);
7397 if (netif_running(netdev)) {
7398 if (igb_up(adapter)) {
7399 dev_err(&pdev->dev, "igb_up failed after reset\n");
7404 netif_device_attach(netdev);
7406 /* let the f/w know that the h/w is now under the control of the
7409 igb_get_hw_control(adapter);
7412 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7415 u32 rar_low, rar_high;
7416 struct e1000_hw *hw = &adapter->hw;
7418 /* HW expects these in little endian so we reverse the byte order
7419 * from network order (big endian) to little endian
7421 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7422 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7423 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7425 /* Indicate to hardware the Address is Valid. */
7426 rar_high |= E1000_RAH_AV;
7428 if (hw->mac.type == e1000_82575)
7429 rar_high |= E1000_RAH_POOL_1 * qsel;
7431 rar_high |= E1000_RAH_POOL_1 << qsel;
7433 wr32(E1000_RAL(index), rar_low);
7435 wr32(E1000_RAH(index), rar_high);
7439 static int igb_set_vf_mac(struct igb_adapter *adapter,
7440 int vf, unsigned char *mac_addr)
7442 struct e1000_hw *hw = &adapter->hw;
7443 /* VF MAC addresses start at end of receive addresses and moves
7444 * towards the first, as a result a collision should not be possible
7446 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7448 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7450 igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7455 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7457 struct igb_adapter *adapter = netdev_priv(netdev);
7458 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7460 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7461 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7462 dev_info(&adapter->pdev->dev,
7463 "Reload the VF driver to make this change effective.");
7464 if (test_bit(__IGB_DOWN, &adapter->state)) {
7465 dev_warn(&adapter->pdev->dev,
7466 "The VF MAC address has been set, but the PF device is not up.\n");
7467 dev_warn(&adapter->pdev->dev,
7468 "Bring the PF device up before attempting to use the VF device.\n");
7470 return igb_set_vf_mac(adapter, vf, mac);
7473 static int igb_link_mbps(int internal_link_speed)
7475 switch (internal_link_speed) {
7485 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7492 /* Calculate the rate factor values to set */
7493 rf_int = link_speed / tx_rate;
7494 rf_dec = (link_speed - (rf_int * tx_rate));
7495 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7498 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7499 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7500 E1000_RTTBCNRC_RF_INT_MASK);
7501 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7506 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7507 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7508 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7510 wr32(E1000_RTTBCNRM, 0x14);
7511 wr32(E1000_RTTBCNRC, bcnrc_val);
7514 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7516 int actual_link_speed, i;
7517 bool reset_rate = false;
7519 /* VF TX rate limit was not set or not supported */
7520 if ((adapter->vf_rate_link_speed == 0) ||
7521 (adapter->hw.mac.type != e1000_82576))
7524 actual_link_speed = igb_link_mbps(adapter->link_speed);
7525 if (actual_link_speed != adapter->vf_rate_link_speed) {
7527 adapter->vf_rate_link_speed = 0;
7528 dev_info(&adapter->pdev->dev,
7529 "Link speed has been changed. VF Transmit rate is disabled\n");
7532 for (i = 0; i < adapter->vfs_allocated_count; i++) {
7534 adapter->vf_data[i].tx_rate = 0;
7536 igb_set_vf_rate_limit(&adapter->hw, i,
7537 adapter->vf_data[i].tx_rate,
7542 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7544 struct igb_adapter *adapter = netdev_priv(netdev);
7545 struct e1000_hw *hw = &adapter->hw;
7546 int actual_link_speed;
7548 if (hw->mac.type != e1000_82576)
7551 actual_link_speed = igb_link_mbps(adapter->link_speed);
7552 if ((vf >= adapter->vfs_allocated_count) ||
7553 (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7554 (tx_rate < 0) || (tx_rate > actual_link_speed))
7557 adapter->vf_rate_link_speed = actual_link_speed;
7558 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7559 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7564 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7567 struct igb_adapter *adapter = netdev_priv(netdev);
7568 struct e1000_hw *hw = &adapter->hw;
7569 u32 reg_val, reg_offset;
7571 if (!adapter->vfs_allocated_count)
7574 if (vf >= adapter->vfs_allocated_count)
7577 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7578 reg_val = rd32(reg_offset);
7580 reg_val |= ((1 << vf) |
7581 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7583 reg_val &= ~((1 << vf) |
7584 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7585 wr32(reg_offset, reg_val);
7587 adapter->vf_data[vf].spoofchk_enabled = setting;
7588 return E1000_SUCCESS;
7591 static int igb_ndo_get_vf_config(struct net_device *netdev,
7592 int vf, struct ifla_vf_info *ivi)
7594 struct igb_adapter *adapter = netdev_priv(netdev);
7595 if (vf >= adapter->vfs_allocated_count)
7598 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7599 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7600 ivi->vlan = adapter->vf_data[vf].pf_vlan;
7601 ivi->qos = adapter->vf_data[vf].pf_qos;
7602 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7606 static void igb_vmm_control(struct igb_adapter *adapter)
7608 struct e1000_hw *hw = &adapter->hw;
7611 switch (hw->mac.type) {
7617 /* replication is not supported for 82575 */
7620 /* notify HW that the MAC is adding vlan tags */
7621 reg = rd32(E1000_DTXCTL);
7622 reg |= E1000_DTXCTL_VLAN_ADDED;
7623 wr32(E1000_DTXCTL, reg);
7625 /* enable replication vlan tag stripping */
7626 reg = rd32(E1000_RPLOLR);
7627 reg |= E1000_RPLOLR_STRVLAN;
7628 wr32(E1000_RPLOLR, reg);
7630 /* none of the above registers are supported by i350 */
7634 if (adapter->vfs_allocated_count) {
7635 igb_vmdq_set_loopback_pf(hw, true);
7636 igb_vmdq_set_replication_pf(hw, true);
7637 igb_vmdq_set_anti_spoofing_pf(hw, true,
7638 adapter->vfs_allocated_count);
7640 igb_vmdq_set_loopback_pf(hw, false);
7641 igb_vmdq_set_replication_pf(hw, false);
7645 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7647 struct e1000_hw *hw = &adapter->hw;
7651 if (hw->mac.type > e1000_82580) {
7652 if (adapter->flags & IGB_FLAG_DMAC) {
7655 /* force threshold to 0. */
7656 wr32(E1000_DMCTXTH, 0);
7658 /* DMA Coalescing high water mark needs to be greater
7659 * than the Rx threshold. Set hwm to PBA - max frame
7660 * size in 16B units, capping it at PBA - 6KB.
7662 hwm = 64 * pba - adapter->max_frame_size / 16;
7663 if (hwm < 64 * (pba - 6))
7664 hwm = 64 * (pba - 6);
7665 reg = rd32(E1000_FCRTC);
7666 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7667 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7668 & E1000_FCRTC_RTH_COAL_MASK);
7669 wr32(E1000_FCRTC, reg);
7671 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7672 * frame size, capping it at PBA - 10KB.
7674 dmac_thr = pba - adapter->max_frame_size / 512;
7675 if (dmac_thr < pba - 10)
7676 dmac_thr = pba - 10;
7677 reg = rd32(E1000_DMACR);
7678 reg &= ~E1000_DMACR_DMACTHR_MASK;
7679 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7680 & E1000_DMACR_DMACTHR_MASK);
7682 /* transition to L0x or L1 if available..*/
7683 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7685 /* watchdog timer= +-1000 usec in 32usec intervals */
7688 /* Disable BMC-to-OS Watchdog Enable */
7689 if (hw->mac.type != e1000_i354)
7690 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7692 wr32(E1000_DMACR, reg);
7694 /* no lower threshold to disable
7695 * coalescing(smart fifb)-UTRESH=0
7697 wr32(E1000_DMCRTRH, 0);
7699 reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7701 wr32(E1000_DMCTLX, reg);
7703 /* free space in tx packet buffer to wake from
7706 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7707 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7709 /* make low power state decision controlled
7712 reg = rd32(E1000_PCIEMISC);
7713 reg &= ~E1000_PCIEMISC_LX_DECISION;
7714 wr32(E1000_PCIEMISC, reg);
7715 } /* endif adapter->dmac is not disabled */
7716 } else if (hw->mac.type == e1000_82580) {
7717 u32 reg = rd32(E1000_PCIEMISC);
7718 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7719 wr32(E1000_DMACR, 0);
7724 * igb_read_i2c_byte - Reads 8 bit word over I2C
7725 * @hw: pointer to hardware structure
7726 * @byte_offset: byte offset to read
7727 * @dev_addr: device address
7730 * Performs byte read operation over I2C interface at
7731 * a specified device address.
7733 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7734 u8 dev_addr, u8 *data)
7736 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7737 struct i2c_client *this_client = adapter->i2c_client;
7742 return E1000_ERR_I2C;
7744 swfw_mask = E1000_SWFW_PHY0_SM;
7746 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
7748 return E1000_ERR_SWFW_SYNC;
7750 status = i2c_smbus_read_byte_data(this_client, byte_offset);
7751 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7754 return E1000_ERR_I2C;
7757 return E1000_SUCCESS;
7762 * igb_write_i2c_byte - Writes 8 bit word over I2C
7763 * @hw: pointer to hardware structure
7764 * @byte_offset: byte offset to write
7765 * @dev_addr: device address
7766 * @data: value to write
7768 * Performs byte write operation over I2C interface at
7769 * a specified device address.
7771 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7772 u8 dev_addr, u8 data)
7774 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7775 struct i2c_client *this_client = adapter->i2c_client;
7777 u16 swfw_mask = E1000_SWFW_PHY0_SM;
7780 return E1000_ERR_I2C;
7782 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
7783 return E1000_ERR_SWFW_SYNC;
7784 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
7785 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7788 return E1000_ERR_I2C;
7790 return E1000_SUCCESS;