drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/prefetch.h>
  32 #include <linux/bpf.h>
  33 #include <linux/bpf_trace.h>
  34 #include <linux/pm_runtime.h>
  35 #include <linux/etherdevice.h>
  36 #ifdef CONFIG_IGB_DCA
  37 #include <linux/dca.h>
  38 #endif
  39 #include <linux/i2c.h>
  40 #include "igb.h"
  41
  42 enum queue_mode {
  43         QUEUE_MODE_STRICT_PRIORITY,
  44         QUEUE_MODE_STREAM_RESERVATION,
  45 };
  46
  47 enum tx_queue_prio {
  48         TX_QUEUE_PRIO_HIGH,
  49         TX_QUEUE_PRIO_LOW,
  50 };
  51
  52 char igb_driver_name[] = "igb";
  53 static const char igb_driver_string[] =
  54                                 "Intel(R) Gigabit Ethernet Network Driver";
  55 static const char igb_copyright[] =
  56                                 "Copyright (c) 2007-2014 Intel Corporation.";
  57
  58 static const struct e1000_info *igb_info_tbl[] = {
  59         [board_82575] = &e1000_82575_info,
  60 };
  61
  62 static const struct pci_device_id igb_pci_tbl[] = {
  63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  68         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  98         /* required last entry */
  99         {0, }
 100 };
 101
 102 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 103
 104 static int igb_setup_all_tx_resources(struct igb_adapter *);
 105 static int igb_setup_all_rx_resources(struct igb_adapter *);
 106 static void igb_free_all_tx_resources(struct igb_adapter *);
 107 static void igb_free_all_rx_resources(struct igb_adapter *);
 108 static void igb_setup_mrqc(struct igb_adapter *);
 109 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 110 static void igb_remove(struct pci_dev *pdev);
 111 static void igb_init_queue_configuration(struct igb_adapter *adapter);
 112 static int igb_sw_init(struct igb_adapter *);
 113 int igb_open(struct net_device *);
 114 int igb_close(struct net_device *);
 115 static void igb_configure(struct igb_adapter *);
 116 static void igb_configure_tx(struct igb_adapter *);
 117 static void igb_configure_rx(struct igb_adapter *);
 118 static void igb_clean_all_tx_rings(struct igb_adapter *);
 119 static void igb_clean_all_rx_rings(struct igb_adapter *);
 120 static void igb_clean_tx_ring(struct igb_ring *);
 121 static void igb_clean_rx_ring(struct igb_ring *);
 122 static void igb_set_rx_mode(struct net_device *);
 123 static void igb_update_phy_info(struct timer_list *);
 124 static void igb_watchdog(struct timer_list *);
 125 static void igb_watchdog_task(struct work_struct *);
 126 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 127 static void igb_get_stats64(struct net_device *dev,
 128                             struct rtnl_link_stats64 *stats);
 129 static int igb_change_mtu(struct net_device *, int);
 130 static int igb_set_mac(struct net_device *, void *);
 131 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 132 static irqreturn_t igb_intr(int irq, void *);
 133 static irqreturn_t igb_intr_msi(int irq, void *);
 134 static irqreturn_t igb_msix_other(int irq, void *);
 135 static irqreturn_t igb_msix_ring(int irq, void *);
 136 #ifdef CONFIG_IGB_DCA
 137 static void igb_update_dca(struct igb_q_vector *);
 138 static void igb_setup_dca(struct igb_adapter *);
 139 #endif /* CONFIG_IGB_DCA */
 140 static int igb_poll(struct napi_struct *, int);
 141 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 142 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 143 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 144 static void igb_tx_timeout(struct net_device *, unsigned int txqueue);
 145 static void igb_reset_task(struct work_struct *);
 146 static void igb_vlan_mode(struct net_device *netdev,
 147                           netdev_features_t features);
 148 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 149 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 150 static void igb_restore_vlan(struct igb_adapter *);
 151 static void igb_rar_set_index(struct igb_adapter *, u32);
 152 static void igb_ping_all_vfs(struct igb_adapter *);
 153 static void igb_msg_task(struct igb_adapter *);
 154 static void igb_vmm_control(struct igb_adapter *);
 155 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 156 static void igb_flush_mac_table(struct igb_adapter *);
 157 static int igb_available_rars(struct igb_adapter *, u8);
 158 static void igb_set_default_mac_filter(struct igb_adapter *);
 159 static int igb_uc_sync(struct net_device *, const unsigned char *);
 160 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 161 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 162 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 163 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 164                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 165 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 166 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 167                                    bool setting);
 168 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 169                                 bool setting);
 170 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 171                                  struct ifla_vf_info *ivi);
 172 static void igb_check_vf_rate_limit(struct igb_adapter *);
 173 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 174 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 175
 176 #ifdef CONFIG_PCI_IOV
 177 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 178 static int igb_disable_sriov(struct pci_dev *dev, bool reinit);
 179 #endif
 180
 181 static int igb_suspend(struct device *);
 182 static int igb_resume(struct device *);
 183 static int igb_runtime_suspend(struct device *dev);
 184 static int igb_runtime_resume(struct device *dev);
 185 static int igb_runtime_idle(struct device *dev);
 186 #ifdef CONFIG_PM
 187 static const struct dev_pm_ops igb_pm_ops = {
 188         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 189         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 190                         igb_runtime_idle)
 191 };
 192 #endif
 193 static void igb_shutdown(struct pci_dev *);
 194 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 195 #ifdef CONFIG_IGB_DCA
 196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 197 static struct notifier_block dca_notifier = {
 198         .notifier_call  = igb_notify_dca,
 199         .next           = NULL,
 200         .priority       = 0
 201 };
 202 #endif
 203 #ifdef CONFIG_PCI_IOV
 204 static unsigned int max_vfs;
 205 module_param(max_vfs, uint, 0);
 206 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 207 #endif /* CONFIG_PCI_IOV */
 208
 209 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 210                      pci_channel_state_t);
 211 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 212 static void igb_io_resume(struct pci_dev *);
 213
 214 static const struct pci_error_handlers igb_err_handler = {
 215         .error_detected = igb_io_error_detected,
 216         .slot_reset = igb_io_slot_reset,
 217         .resume = igb_io_resume,
 218 };
 219
 220 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 221
 222 static struct pci_driver igb_driver = {
 223         .name     = igb_driver_name,
 224         .id_table = igb_pci_tbl,
 225         .probe    = igb_probe,
 226         .remove   = igb_remove,
 227 #ifdef CONFIG_PM
 228         .driver.pm = &igb_pm_ops,
 229 #endif
 230         .shutdown = igb_shutdown,
 231         .sriov_configure = igb_pci_sriov_configure,
 232         .err_handler = &igb_err_handler
 233 };
 234
 235 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 236 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 237 MODULE_LICENSE("GPL v2");
 238
 239 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 240 static int debug = -1;
 241 module_param(debug, int, 0);
 242 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 243
 244 struct igb_reg_info {
 245         u32 ofs;
 246         char *name;
 247 };
 248
 249 static const struct igb_reg_info igb_reg_info_tbl[] = {
 250
 251         /* General Registers */
 252         {E1000_CTRL, "CTRL"},
 253         {E1000_STATUS, "STATUS"},
 254         {E1000_CTRL_EXT, "CTRL_EXT"},
 255
 256         /* Interrupt Registers */
 257         {E1000_ICR, "ICR"},
 258
 259         /* RX Registers */
 260         {E1000_RCTL, "RCTL"},
 261         {E1000_RDLEN(0), "RDLEN"},
 262         {E1000_RDH(0), "RDH"},
 263         {E1000_RDT(0), "RDT"},
 264         {E1000_RXDCTL(0), "RXDCTL"},
 265         {E1000_RDBAL(0), "RDBAL"},
 266         {E1000_RDBAH(0), "RDBAH"},
 267
 268         /* TX Registers */
 269         {E1000_TCTL, "TCTL"},
 270         {E1000_TDBAL(0), "TDBAL"},
 271         {E1000_TDBAH(0), "TDBAH"},
 272         {E1000_TDLEN(0), "TDLEN"},
 273         {E1000_TDH(0), "TDH"},
 274         {E1000_TDT(0), "TDT"},
 275         {E1000_TXDCTL(0), "TXDCTL"},
 276         {E1000_TDFH, "TDFH"},
 277         {E1000_TDFT, "TDFT"},
 278         {E1000_TDFHS, "TDFHS"},
 279         {E1000_TDFPC, "TDFPC"},
 280
 281         /* List Terminator */
 282         {}
 283 };
 284
 285 /* igb_regdump - register printout routine */
 286 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 287 {
 288         int n = 0;
 289         char rname[16];
 290         u32 regs[8];
 291
 292         switch (reginfo->ofs) {
 293         case E1000_RDLEN(0):
 294                 for (n = 0; n < 4; n++)
 295                         regs[n] = rd32(E1000_RDLEN(n));
 296                 break;
 297         case E1000_RDH(0):
 298                 for (n = 0; n < 4; n++)
 299                         regs[n] = rd32(E1000_RDH(n));
 300                 break;
 301         case E1000_RDT(0):
 302                 for (n = 0; n < 4; n++)
 303                         regs[n] = rd32(E1000_RDT(n));
 304                 break;
 305         case E1000_RXDCTL(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RXDCTL(n));
 308                 break;
 309         case E1000_RDBAL(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDBAL(n));
 312                 break;
 313         case E1000_RDBAH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDBAH(n));
 316                 break;
 317         case E1000_TDBAL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_TDBAL(n));
 320                 break;
 321         case E1000_TDBAH(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_TDBAH(n));
 324                 break;
 325         case E1000_TDLEN(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_TDLEN(n));
 328                 break;
 329         case E1000_TDH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_TDH(n));
 332                 break;
 333         case E1000_TDT(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDT(n));
 336                 break;
 337         case E1000_TXDCTL(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TXDCTL(n));
 340                 break;
 341         default:
 342                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 343                 return;
 344         }
 345
 346         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 347         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 348                 regs[2], regs[3]);
 349 }
 350
 351 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 352 static void igb_dump(struct igb_adapter *adapter)
 353 {
 354         struct net_device *netdev = adapter->netdev;
 355         struct e1000_hw *hw = &adapter->hw;
 356         struct igb_reg_info *reginfo;
 357         struct igb_ring *tx_ring;
 358         union e1000_adv_tx_desc *tx_desc;
 359         struct my_u0 { __le64 a; __le64 b; } *u0;
 360         struct igb_ring *rx_ring;
 361         union e1000_adv_rx_desc *rx_desc;
 362         u32 staterr;
 363         u16 i, n;
 364
 365         if (!netif_msg_hw(adapter))
 366                 return;
 367
 368         /* Print netdevice Info */
 369         if (netdev) {
 370                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 371                 pr_info("Device Name     state            trans_start\n");
 372                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 373                         netdev->state, dev_trans_start(netdev));
 374         }
 375
 376         /* Print Registers */
 377         dev_info(&adapter->pdev->dev, "Register Dump\n");
 378         pr_info(" Register Name   Value\n");
 379         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 380              reginfo->name; reginfo++) {
 381                 igb_regdump(hw, reginfo);
 382         }
 383
 384         /* Print TX Ring Summary */
 385         if (!netdev || !netif_running(netdev))
 386                 goto exit;
 387
 388         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 389         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 390         for (n = 0; n < adapter->num_tx_queues; n++) {
 391                 struct igb_tx_buffer *buffer_info;
 392                 tx_ring = adapter->tx_ring[n];
 393                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 394                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 395                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 396                         (u64)dma_unmap_addr(buffer_info, dma),
 397                         dma_unmap_len(buffer_info, len),
 398                         buffer_info->next_to_watch,
 399                         (u64)buffer_info->time_stamp);
 400         }
 401
 402         /* Print TX Rings */
 403         if (!netif_msg_tx_done(adapter))
 404                 goto rx_ring_summary;
 405
 406         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 407
 408         /* Transmit Descriptor Formats
 409          *
 410          * Advanced Transmit Descriptor
 411          *   +--------------------------------------------------------------+
 412          * 0 |         Buffer Address [63:0]                                |
 413          *   +--------------------------------------------------------------+
 414          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 415          *   +--------------------------------------------------------------+
 416          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 417          */
 418
 419         for (n = 0; n < adapter->num_tx_queues; n++) {
 420                 tx_ring = adapter->tx_ring[n];
 421                 pr_info("------------------------------------\n");
 422                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 423                 pr_info("------------------------------------\n");
 424                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 425
 426                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 427                         const char *next_desc;
 428                         struct igb_tx_buffer *buffer_info;
 429                         tx_desc = IGB_TX_DESC(tx_ring, i);
 430                         buffer_info = &tx_ring->tx_buffer_info[i];
 431                         u0 = (struct my_u0 *)tx_desc;
 432                         if (i == tx_ring->next_to_use &&
 433                             i == tx_ring->next_to_clean)
 434                                 next_desc = " NTC/U";
 435                         else if (i == tx_ring->next_to_use)
 436                                 next_desc = " NTU";
 437                         else if (i == tx_ring->next_to_clean)
 438                                 next_desc = " NTC";
 439                         else
 440                                 next_desc = "";
 441
 442                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 443                                 i, le64_to_cpu(u0->a),
 444                                 le64_to_cpu(u0->b),
 445                                 (u64)dma_unmap_addr(buffer_info, dma),
 446                                 dma_unmap_len(buffer_info, len),
 447                                 buffer_info->next_to_watch,
 448                                 (u64)buffer_info->time_stamp,
 449                                 buffer_info->skb, next_desc);
 450
 451                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 452                                 print_hex_dump(KERN_INFO, "",
 453                                         DUMP_PREFIX_ADDRESS,
 454                                         16, 1, buffer_info->skb->data,
 455                                         dma_unmap_len(buffer_info, len),
 456                                         true);
 457                 }
 458         }
 459
 460         /* Print RX Rings Summary */
 461 rx_ring_summary:
 462         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 463         pr_info("Queue [NTU] [NTC]\n");
 464         for (n = 0; n < adapter->num_rx_queues; n++) {
 465                 rx_ring = adapter->rx_ring[n];
 466                 pr_info(" %5d %5X %5X\n",
 467                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 468         }
 469
 470         /* Print RX Rings */
 471         if (!netif_msg_rx_status(adapter))
 472                 goto exit;
 473
 474         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 475
 476         /* Advanced Receive Descriptor (Read) Format
 477          *    63                                           1        0
 478          *    +-----------------------------------------------------+
 479          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 480          *    +----------------------------------------------+------+
 481          *  8 |       Header Buffer Address [63:1]           |  DD  |
 482          *    +-----------------------------------------------------+
 483          *
 484          *
 485          * Advanced Receive Descriptor (Write-Back) Format
 486          *
 487          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 488          *   +------------------------------------------------------+
 489          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 490          *   | Checksum   Ident  |   |           |    | Type | Type |
 491          *   +------------------------------------------------------+
 492          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 493          *   +------------------------------------------------------+
 494          *   63       48 47    32 31            20 19               0
 495          */
 496
 497         for (n = 0; n < adapter->num_rx_queues; n++) {
 498                 rx_ring = adapter->rx_ring[n];
 499                 pr_info("------------------------------------\n");
 500                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 501                 pr_info("------------------------------------\n");
 502                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 503                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 504
 505                 for (i = 0; i < rx_ring->count; i++) {
 506                         const char *next_desc;
 507                         struct igb_rx_buffer *buffer_info;
 508                         buffer_info = &rx_ring->rx_buffer_info[i];
 509                         rx_desc = IGB_RX_DESC(rx_ring, i);
 510                         u0 = (struct my_u0 *)rx_desc;
 511                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 512
 513                         if (i == rx_ring->next_to_use)
 514                                 next_desc = " NTU";
 515                         else if (i == rx_ring->next_to_clean)
 516                                 next_desc = " NTC";
 517                         else
 518                                 next_desc = "";
 519
 520                         if (staterr & E1000_RXD_STAT_DD) {
 521                                 /* Descriptor Done */
 522                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 523                                         "RWB", i,
 524                                         le64_to_cpu(u0->a),
 525                                         le64_to_cpu(u0->b),
 526                                         next_desc);
 527                         } else {
 528                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 529                                         "R  ", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         (u64)buffer_info->dma,
 533                                         next_desc);
 534
 535                                 if (netif_msg_pktdata(adapter) &&
 536                                     buffer_info->dma && buffer_info->page) {
 537                                         print_hex_dump(KERN_INFO, "",
 538                                           DUMP_PREFIX_ADDRESS,
 539                                           16, 1,
 540                                           page_address(buffer_info->page) +
 541                                                       buffer_info->page_offset,
 542                                           igb_rx_bufsz(rx_ring), true);
 543                                 }
 544                         }
 545                 }
 546         }
 547
 548 exit:
 549         return;
 550 }
 551
 552 /**
 553  *  igb_get_i2c_data - Reads the I2C SDA data bit
 554  *  @data: opaque pointer to adapter struct
 555  *
 556  *  Returns the I2C data bit value
 557  **/
 558 static int igb_get_i2c_data(void *data)
 559 {
 560         struct igb_adapter *adapter = (struct igb_adapter *)data;
 561         struct e1000_hw *hw = &adapter->hw;
 562         s32 i2cctl = rd32(E1000_I2CPARAMS);
 563
 564         return !!(i2cctl & E1000_I2C_DATA_IN);
 565 }
 566
 567 /**
 568  *  igb_set_i2c_data - Sets the I2C data bit
 569  *  @data: pointer to hardware structure
 570  *  @state: I2C data value (0 or 1) to set
 571  *
 572  *  Sets the I2C data bit
 573  **/
 574 static void igb_set_i2c_data(void *data, int state)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         if (state) {
 581                 i2cctl |= E1000_I2C_DATA_OUT | E1000_I2C_DATA_OE_N;
 582         } else {
 583                 i2cctl &= ~E1000_I2C_DATA_OE_N;
 584                 i2cctl &= ~E1000_I2C_DATA_OUT;
 585         }
 586
 587         wr32(E1000_I2CPARAMS, i2cctl);
 588         wrfl();
 589 }
 590
 591 /**
 592  *  igb_set_i2c_clk - Sets the I2C SCL clock
 593  *  @data: pointer to hardware structure
 594  *  @state: state to set clock
 595  *
 596  *  Sets the I2C clock line to state
 597  **/
 598 static void igb_set_i2c_clk(void *data, int state)
 599 {
 600         struct igb_adapter *adapter = (struct igb_adapter *)data;
 601         struct e1000_hw *hw = &adapter->hw;
 602         s32 i2cctl = rd32(E1000_I2CPARAMS);
 603
 604         if (state) {
 605                 i2cctl |= E1000_I2C_CLK_OUT | E1000_I2C_CLK_OE_N;
 606         } else {
 607                 i2cctl &= ~E1000_I2C_CLK_OUT;
 608                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 609         }
 610         wr32(E1000_I2CPARAMS, i2cctl);
 611         wrfl();
 612 }
 613
 614 /**
 615  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 616  *  @data: pointer to hardware structure
 617  *
 618  *  Gets the I2C clock state
 619  **/
 620 static int igb_get_i2c_clk(void *data)
 621 {
 622         struct igb_adapter *adapter = (struct igb_adapter *)data;
 623         struct e1000_hw *hw = &adapter->hw;
 624         s32 i2cctl = rd32(E1000_I2CPARAMS);
 625
 626         return !!(i2cctl & E1000_I2C_CLK_IN);
 627 }
 628
 629 static const struct i2c_algo_bit_data igb_i2c_algo = {
 630         .setsda         = igb_set_i2c_data,
 631         .setscl         = igb_set_i2c_clk,
 632         .getsda         = igb_get_i2c_data,
 633         .getscl         = igb_get_i2c_clk,
 634         .udelay         = 5,
 635         .timeout        = 20,
 636 };
 637
 638 /**
 639  *  igb_get_hw_dev - return device
 640  *  @hw: pointer to hardware structure
 641  *
 642  *  used by hardware layer to print debugging information
 643  **/
 644 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 645 {
 646         struct igb_adapter *adapter = hw->back;
 647         return adapter->netdev;
 648 }
 649
 650 /**
 651  *  igb_init_module - Driver Registration Routine
 652  *
 653  *  igb_init_module is the first routine called when the driver is
 654  *  loaded. All it does is register with the PCI subsystem.
 655  **/
 656 static int __init igb_init_module(void)
 657 {
 658         int ret;
 659
 660         pr_info("%s\n", igb_driver_string);
 661         pr_info("%s\n", igb_copyright);
 662
 663 #ifdef CONFIG_IGB_DCA
 664         dca_register_notify(&dca_notifier);
 665 #endif
 666         ret = pci_register_driver(&igb_driver);
 667         return ret;
 668 }
 669
 670 module_init(igb_init_module);
 671
 672 /**
 673  *  igb_exit_module - Driver Exit Cleanup Routine
 674  *
 675  *  igb_exit_module is called just before the driver is removed
 676  *  from memory.
 677  **/
 678 static void __exit igb_exit_module(void)
 679 {
 680 #ifdef CONFIG_IGB_DCA
 681         dca_unregister_notify(&dca_notifier);
 682 #endif
 683         pci_unregister_driver(&igb_driver);
 684 }
 685
 686 module_exit(igb_exit_module);
 687
 688 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 689 /**
 690  *  igb_cache_ring_register - Descriptor ring to register mapping
 691  *  @adapter: board private structure to initialize
 692  *
 693  *  Once we know the feature-set enabled for the device, we'll cache
 694  *  the register offset the descriptor ring is assigned to.
 695  **/
 696 static void igb_cache_ring_register(struct igb_adapter *adapter)
 697 {
 698         int i = 0, j = 0;
 699         u32 rbase_offset = adapter->vfs_allocated_count;
 700
 701         switch (adapter->hw.mac.type) {
 702         case e1000_82576:
 703                 /* The queues are allocated for virtualization such that VF 0
 704                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 705                  * In order to avoid collision we start at the first free queue
 706                  * and continue consuming queues in the same sequence
 707                  */
 708                 if (adapter->vfs_allocated_count) {
 709                         for (; i < adapter->rss_queues; i++)
 710                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 711                                                                Q_IDX_82576(i);
 712                 }
 713                 fallthrough;
 714         case e1000_82575:
 715         case e1000_82580:
 716         case e1000_i350:
 717         case e1000_i354:
 718         case e1000_i210:
 719         case e1000_i211:
 720         default:
 721                 for (; i < adapter->num_rx_queues; i++)
 722                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 723                 for (; j < adapter->num_tx_queues; j++)
 724                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 725                 break;
 726         }
 727 }
 728
 729 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 730 {
 731         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 732         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 733         u32 value = 0;
 734
 735         if (E1000_REMOVED(hw_addr))
 736                 return ~value;
 737
 738         value = readl(&hw_addr[reg]);
 739
 740         /* reads should not return all F's */
 741         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 742                 struct net_device *netdev = igb->netdev;
 743                 hw->hw_addr = NULL;
 744                 netdev_err(netdev, "PCIe link lost\n");
 745                 WARN(pci_device_is_present(igb->pdev),
 746                      "igb: Failed to read reg 0x%x!\n", reg);
 747         }
 748
 749         return value;
 750 }
 751
 752 /**
 753  *  igb_write_ivar - configure ivar for given MSI-X vector
 754  *  @hw: pointer to the HW structure
 755  *  @msix_vector: vector number we are allocating to a given ring
 756  *  @index: row index of IVAR register to write within IVAR table
 757  *  @offset: column offset of in IVAR, should be multiple of 8
 758  *
 759  *  This function is intended to handle the writing of the IVAR register
 760  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 761  *  each containing an cause allocation for an Rx and Tx ring, and a
 762  *  variable number of rows depending on the number of queues supported.
 763  **/
 764 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 765                            int index, int offset)
 766 {
 767         u32 ivar = array_rd32(E1000_IVAR0, index);
 768
 769         /* clear any bits that are currently set */
 770         ivar &= ~((u32)0xFF << offset);
 771
 772         /* write vector and valid bit */
 773         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 774
 775         array_wr32(E1000_IVAR0, index, ivar);
 776 }
 777
 778 #define IGB_N0_QUEUE -1
 779 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 780 {
 781         struct igb_adapter *adapter = q_vector->adapter;
 782         struct e1000_hw *hw = &adapter->hw;
 783         int rx_queue = IGB_N0_QUEUE;
 784         int tx_queue = IGB_N0_QUEUE;
 785         u32 msixbm = 0;
 786
 787         if (q_vector->rx.ring)
 788                 rx_queue = q_vector->rx.ring->reg_idx;
 789         if (q_vector->tx.ring)
 790                 tx_queue = q_vector->tx.ring->reg_idx;
 791
 792         switch (hw->mac.type) {
 793         case e1000_82575:
 794                 /* The 82575 assigns vectors using a bitmask, which matches the
 795                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 796                  * or more queues to a vector, we write the appropriate bits
 797                  * into the MSIXBM register for that vector.
 798                  */
 799                 if (rx_queue > IGB_N0_QUEUE)
 800                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 801                 if (tx_queue > IGB_N0_QUEUE)
 802                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 803                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 804                         msixbm |= E1000_EIMS_OTHER;
 805                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 806                 q_vector->eims_value = msixbm;
 807                 break;
 808         case e1000_82576:
 809                 /* 82576 uses a table that essentially consists of 2 columns
 810                  * with 8 rows.  The ordering is column-major so we use the
 811                  * lower 3 bits as the row index, and the 4th bit as the
 812                  * column offset.
 813                  */
 814                 if (rx_queue > IGB_N0_QUEUE)
 815                         igb_write_ivar(hw, msix_vector,
 816                                        rx_queue & 0x7,
 817                                        (rx_queue & 0x8) << 1);
 818                 if (tx_queue > IGB_N0_QUEUE)
 819                         igb_write_ivar(hw, msix_vector,
 820                                        tx_queue & 0x7,
 821                                        ((tx_queue & 0x8) << 1) + 8);
 822                 q_vector->eims_value = BIT(msix_vector);
 823                 break;
 824         case e1000_82580:
 825         case e1000_i350:
 826         case e1000_i354:
 827         case e1000_i210:
 828         case e1000_i211:
 829                 /* On 82580 and newer adapters the scheme is similar to 82576
 830                  * however instead of ordering column-major we have things
 831                  * ordered row-major.  So we traverse the table by using
 832                  * bit 0 as the column offset, and the remaining bits as the
 833                  * row index.
 834                  */
 835                 if (rx_queue > IGB_N0_QUEUE)
 836                         igb_write_ivar(hw, msix_vector,
 837                                        rx_queue >> 1,
 838                                        (rx_queue & 0x1) << 4);
 839                 if (tx_queue > IGB_N0_QUEUE)
 840                         igb_write_ivar(hw, msix_vector,
 841                                        tx_queue >> 1,
 842                                        ((tx_queue & 0x1) << 4) + 8);
 843                 q_vector->eims_value = BIT(msix_vector);
 844                 break;
 845         default:
 846                 BUG();
 847                 break;
 848         }
 849
 850         /* add q_vector eims value to global eims_enable_mask */
 851         adapter->eims_enable_mask |= q_vector->eims_value;
 852
 853         /* configure q_vector to set itr on first interrupt */
 854         q_vector->set_itr = 1;
 855 }
 856
 857 /**
 858  *  igb_configure_msix - Configure MSI-X hardware
 859  *  @adapter: board private structure to initialize
 860  *
 861  *  igb_configure_msix sets up the hardware to properly
 862  *  generate MSI-X interrupts.
 863  **/
 864 static void igb_configure_msix(struct igb_adapter *adapter)
 865 {
 866         u32 tmp;
 867         int i, vector = 0;
 868         struct e1000_hw *hw = &adapter->hw;
 869
 870         adapter->eims_enable_mask = 0;
 871
 872         /* set vector for other causes, i.e. link changes */
 873         switch (hw->mac.type) {
 874         case e1000_82575:
 875                 tmp = rd32(E1000_CTRL_EXT);
 876                 /* enable MSI-X PBA support*/
 877                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 878
 879                 /* Auto-Mask interrupts upon ICR read. */
 880                 tmp |= E1000_CTRL_EXT_EIAME;
 881                 tmp |= E1000_CTRL_EXT_IRCA;
 882
 883                 wr32(E1000_CTRL_EXT, tmp);
 884
 885                 /* enable msix_other interrupt */
 886                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 887                 adapter->eims_other = E1000_EIMS_OTHER;
 888
 889                 break;
 890
 891         case e1000_82576:
 892         case e1000_82580:
 893         case e1000_i350:
 894         case e1000_i354:
 895         case e1000_i210:
 896         case e1000_i211:
 897                 /* Turn on MSI-X capability first, or our settings
 898                  * won't stick.  And it will take days to debug.
 899                  */
 900                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 901                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 902                      E1000_GPIE_NSICR);
 903
 904                 /* enable msix_other interrupt */
 905                 adapter->eims_other = BIT(vector);
 906                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 907
 908                 wr32(E1000_IVAR_MISC, tmp);
 909                 break;
 910         default:
 911                 /* do nothing, since nothing else supports MSI-X */
 912                 break;
 913         } /* switch (hw->mac.type) */
 914
 915         adapter->eims_enable_mask |= adapter->eims_other;
 916
 917         for (i = 0; i < adapter->num_q_vectors; i++)
 918                 igb_assign_vector(adapter->q_vector[i], vector++);
 919
 920         wrfl();
 921 }
 922
 923 /**
 924  *  igb_request_msix - Initialize MSI-X interrupts
 925  *  @adapter: board private structure to initialize
 926  *
 927  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 928  *  kernel.
 929  **/
 930 static int igb_request_msix(struct igb_adapter *adapter)
 931 {
 932         unsigned int num_q_vectors = adapter->num_q_vectors;
 933         struct net_device *netdev = adapter->netdev;
 934         int i, err = 0, vector = 0, free_vector = 0;
 935
 936         err = request_irq(adapter->msix_entries[vector].vector,
 937                           igb_msix_other, 0, netdev->name, adapter);
 938         if (err)
 939                 goto err_out;
 940
 941         if (num_q_vectors > MAX_Q_VECTORS) {
 942                 num_q_vectors = MAX_Q_VECTORS;
 943                 dev_warn(&adapter->pdev->dev,
 944                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 945                          adapter->num_q_vectors, MAX_Q_VECTORS);
 946         }
 947         for (i = 0; i < num_q_vectors; i++) {
 948                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 949
 950                 vector++;
 951
 952                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 953
 954                 if (q_vector->rx.ring && q_vector->tx.ring)
 955                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 956                                 q_vector->rx.ring->queue_index);
 957                 else if (q_vector->tx.ring)
 958                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 959                                 q_vector->tx.ring->queue_index);
 960                 else if (q_vector->rx.ring)
 961                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 962                                 q_vector->rx.ring->queue_index);
 963                 else
 964                         sprintf(q_vector->name, "%s-unused", netdev->name);
 965
 966                 err = request_irq(adapter->msix_entries[vector].vector,
 967                                   igb_msix_ring, 0, q_vector->name,
 968                                   q_vector);
 969                 if (err)
 970                         goto err_free;
 971         }
 972
 973         igb_configure_msix(adapter);
 974         return 0;
 975
 976 err_free:
 977         /* free already assigned IRQs */
 978         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 979
 980         vector--;
 981         for (i = 0; i < vector; i++) {
 982                 free_irq(adapter->msix_entries[free_vector++].vector,
 983                          adapter->q_vector[i]);
 984         }
 985 err_out:
 986         return err;
 987 }
 988
 989 /**
 990  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 991  *  @adapter: board private structure to initialize
 992  *  @v_idx: Index of vector to be freed
 993  *
 994  *  This function frees the memory allocated to the q_vector.
 995  **/
 996 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 997 {
 998         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 999
1000         adapter->q_vector[v_idx] = NULL;
1001
1002         /* igb_get_stats64() might access the rings on this vector,
1003          * we must wait a grace period before freeing it.
1004          */
1005         if (q_vector)
1006                 kfree_rcu(q_vector, rcu);
1007 }
1008
1009 /**
1010  *  igb_reset_q_vector - Reset config for interrupt vector
1011  *  @adapter: board private structure to initialize
1012  *  @v_idx: Index of vector to be reset
1013  *
1014  *  If NAPI is enabled it will delete any references to the
1015  *  NAPI struct. This is preparation for igb_free_q_vector.
1016  **/
1017 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1018 {
1019         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1020
1021         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1022          * allocated. So, q_vector is NULL so we should stop here.
1023          */
1024         if (!q_vector)
1025                 return;
1026
1027         if (q_vector->tx.ring)
1028                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1029
1030         if (q_vector->rx.ring)
1031                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1032
1033         netif_napi_del(&q_vector->napi);
1034
1035 }
1036
1037 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1038 {
1039         int v_idx = adapter->num_q_vectors;
1040
1041         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1042                 pci_disable_msix(adapter->pdev);
1043         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1044                 pci_disable_msi(adapter->pdev);
1045
1046         while (v_idx--)
1047                 igb_reset_q_vector(adapter, v_idx);
1048 }
1049
1050 /**
1051  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1052  *  @adapter: board private structure to initialize
1053  *
1054  *  This function frees the memory allocated to the q_vectors.  In addition if
1055  *  NAPI is enabled it will delete any references to the NAPI struct prior
1056  *  to freeing the q_vector.
1057  **/
1058 static void igb_free_q_vectors(struct igb_adapter *adapter)
1059 {
1060         int v_idx = adapter->num_q_vectors;
1061
1062         adapter->num_tx_queues = 0;
1063         adapter->num_rx_queues = 0;
1064         adapter->num_q_vectors = 0;
1065
1066         while (v_idx--) {
1067                 igb_reset_q_vector(adapter, v_idx);
1068                 igb_free_q_vector(adapter, v_idx);
1069         }
1070 }
1071
1072 /**
1073  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1074  *  @adapter: board private structure to initialize
1075  *
1076  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1077  *  MSI-X interrupts allocated.
1078  */
1079 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1080 {
1081         igb_free_q_vectors(adapter);
1082         igb_reset_interrupt_capability(adapter);
1083 }
1084
1085 /**
1086  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1087  *  @adapter: board private structure to initialize
1088  *  @msix: boolean value of MSIX capability
1089  *
1090  *  Attempt to configure interrupts using the best available
1091  *  capabilities of the hardware and kernel.
1092  **/
1093 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1094 {
1095         int err;
1096         int numvecs, i;
1097
1098         if (!msix)
1099                 goto msi_only;
1100         adapter->flags |= IGB_FLAG_HAS_MSIX;
1101
1102         /* Number of supported queues. */
1103         adapter->num_rx_queues = adapter->rss_queues;
1104         if (adapter->vfs_allocated_count)
1105                 adapter->num_tx_queues = 1;
1106         else
1107                 adapter->num_tx_queues = adapter->rss_queues;
1108
1109         /* start with one vector for every Rx queue */
1110         numvecs = adapter->num_rx_queues;
1111
1112         /* if Tx handler is separate add 1 for every Tx queue */
1113         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1114                 numvecs += adapter->num_tx_queues;
1115
1116         /* store the number of vectors reserved for queues */
1117         adapter->num_q_vectors = numvecs;
1118
1119         /* add 1 vector for link status interrupts */
1120         numvecs++;
1121         for (i = 0; i < numvecs; i++)
1122                 adapter->msix_entries[i].entry = i;
1123
1124         err = pci_enable_msix_range(adapter->pdev,
1125                                     adapter->msix_entries,
1126                                     numvecs,
1127                                     numvecs);
1128         if (err > 0)
1129                 return;
1130
1131         igb_reset_interrupt_capability(adapter);
1132
1133         /* If we can't do MSI-X, try MSI */
1134 msi_only:
1135         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1136 #ifdef CONFIG_PCI_IOV
1137         /* disable SR-IOV for non MSI-X configurations */
1138         if (adapter->vf_data) {
1139                 struct e1000_hw *hw = &adapter->hw;
1140                 /* disable iov and allow time for transactions to clear */
1141                 pci_disable_sriov(adapter->pdev);
1142                 msleep(500);
1143
1144                 kfree(adapter->vf_mac_list);
1145                 adapter->vf_mac_list = NULL;
1146                 kfree(adapter->vf_data);
1147                 adapter->vf_data = NULL;
1148                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1149                 wrfl();
1150                 msleep(100);
1151                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1152         }
1153 #endif
1154         adapter->vfs_allocated_count = 0;
1155         adapter->rss_queues = 1;
1156         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1157         adapter->num_rx_queues = 1;
1158         adapter->num_tx_queues = 1;
1159         adapter->num_q_vectors = 1;
1160         if (!pci_enable_msi(adapter->pdev))
1161                 adapter->flags |= IGB_FLAG_HAS_MSI;
1162 }
1163
1164 static void igb_add_ring(struct igb_ring *ring,
1165                          struct igb_ring_container *head)
1166 {
1167         head->ring = ring;
1168         head->count++;
1169 }
1170
1171 /**
1172  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1173  *  @adapter: board private structure to initialize
1174  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1175  *  @v_idx: index of vector in adapter struct
1176  *  @txr_count: total number of Tx rings to allocate
1177  *  @txr_idx: index of first Tx ring to allocate
1178  *  @rxr_count: total number of Rx rings to allocate
1179  *  @rxr_idx: index of first Rx ring to allocate
1180  *
1181  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1182  **/
1183 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1184                               int v_count, int v_idx,
1185                               int txr_count, int txr_idx,
1186                               int rxr_count, int rxr_idx)
1187 {
1188         struct igb_q_vector *q_vector;
1189         struct igb_ring *ring;
1190         int ring_count;
1191         size_t size;
1192
1193         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1194         if (txr_count > 1 || rxr_count > 1)
1195                 return -ENOMEM;
1196
1197         ring_count = txr_count + rxr_count;
1198         size = kmalloc_size_roundup(struct_size(q_vector, ring, ring_count));
1199
1200         /* allocate q_vector and rings */
1201         q_vector = adapter->q_vector[v_idx];
1202         if (!q_vector) {
1203                 q_vector = kzalloc(size, GFP_KERNEL);
1204         } else if (size > ksize(q_vector)) {
1205                 struct igb_q_vector *new_q_vector;
1206
1207                 new_q_vector = kzalloc(size, GFP_KERNEL);
1208                 if (new_q_vector)
1209                         kfree_rcu(q_vector, rcu);
1210                 q_vector = new_q_vector;
1211         } else {
1212                 memset(q_vector, 0, size);
1213         }
1214         if (!q_vector)
1215                 return -ENOMEM;
1216
1217         /* initialize NAPI */
1218         netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll);
1219
1220         /* tie q_vector and adapter together */
1221         adapter->q_vector[v_idx] = q_vector;
1222         q_vector->adapter = adapter;
1223
1224         /* initialize work limits */
1225         q_vector->tx.work_limit = adapter->tx_work_limit;
1226
1227         /* initialize ITR configuration */
1228         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1229         q_vector->itr_val = IGB_START_ITR;
1230
1231         /* initialize pointer to rings */
1232         ring = q_vector->ring;
1233
1234         /* intialize ITR */
1235         if (rxr_count) {
1236                 /* rx or rx/tx vector */
1237                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1238                         q_vector->itr_val = adapter->rx_itr_setting;
1239         } else {
1240                 /* tx only vector */
1241                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1242                         q_vector->itr_val = adapter->tx_itr_setting;
1243         }
1244
1245         if (txr_count) {
1246                 /* assign generic ring traits */
1247                 ring->dev = &adapter->pdev->dev;
1248                 ring->netdev = adapter->netdev;
1249
1250                 /* configure backlink on ring */
1251                 ring->q_vector = q_vector;
1252
1253                 /* update q_vector Tx values */
1254                 igb_add_ring(ring, &q_vector->tx);
1255
1256                 /* For 82575, context index must be unique per ring. */
1257                 if (adapter->hw.mac.type == e1000_82575)
1258                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1259
1260                 /* apply Tx specific ring traits */
1261                 ring->count = adapter->tx_ring_count;
1262                 ring->queue_index = txr_idx;
1263
1264                 ring->cbs_enable = false;
1265                 ring->idleslope = 0;
1266                 ring->sendslope = 0;
1267                 ring->hicredit = 0;
1268                 ring->locredit = 0;
1269
1270                 u64_stats_init(&ring->tx_syncp);
1271                 u64_stats_init(&ring->tx_syncp2);
1272
1273                 /* assign ring to adapter */
1274                 adapter->tx_ring[txr_idx] = ring;
1275
1276                 /* push pointer to next ring */
1277                 ring++;
1278         }
1279
1280         if (rxr_count) {
1281                 /* assign generic ring traits */
1282                 ring->dev = &adapter->pdev->dev;
1283                 ring->netdev = adapter->netdev;
1284
1285                 /* configure backlink on ring */
1286                 ring->q_vector = q_vector;
1287
1288                 /* update q_vector Rx values */
1289                 igb_add_ring(ring, &q_vector->rx);
1290
1291                 /* set flag indicating ring supports SCTP checksum offload */
1292                 if (adapter->hw.mac.type >= e1000_82576)
1293                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1294
1295                 /* On i350, i354, i210, and i211, loopback VLAN packets
1296                  * have the tag byte-swapped.
1297                  */
1298                 if (adapter->hw.mac.type >= e1000_i350)
1299                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1300
1301                 /* apply Rx specific ring traits */
1302                 ring->count = adapter->rx_ring_count;
1303                 ring->queue_index = rxr_idx;
1304
1305                 u64_stats_init(&ring->rx_syncp);
1306
1307                 /* assign ring to adapter */
1308                 adapter->rx_ring[rxr_idx] = ring;
1309         }
1310
1311         return 0;
1312 }
1313
1314
1315 /**
1316  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1317  *  @adapter: board private structure to initialize
1318  *
1319  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1320  *  return -ENOMEM.
1321  **/
1322 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1323 {
1324         int q_vectors = adapter->num_q_vectors;
1325         int rxr_remaining = adapter->num_rx_queues;
1326         int txr_remaining = adapter->num_tx_queues;
1327         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1328         int err;
1329
1330         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1331                 for (; rxr_remaining; v_idx++) {
1332                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1333                                                  0, 0, 1, rxr_idx);
1334
1335                         if (err)
1336                                 goto err_out;
1337
1338                         /* update counts and index */
1339                         rxr_remaining--;
1340                         rxr_idx++;
1341                 }
1342         }
1343
1344         for (; v_idx < q_vectors; v_idx++) {
1345                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1346                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1347
1348                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1349                                          tqpv, txr_idx, rqpv, rxr_idx);
1350
1351                 if (err)
1352                         goto err_out;
1353
1354                 /* update counts and index */
1355                 rxr_remaining -= rqpv;
1356                 txr_remaining -= tqpv;
1357                 rxr_idx++;
1358                 txr_idx++;
1359         }
1360
1361         return 0;
1362
1363 err_out:
1364         adapter->num_tx_queues = 0;
1365         adapter->num_rx_queues = 0;
1366         adapter->num_q_vectors = 0;
1367
1368         while (v_idx--)
1369                 igb_free_q_vector(adapter, v_idx);
1370
1371         return -ENOMEM;
1372 }
1373
1374 /**
1375  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1376  *  @adapter: board private structure to initialize
1377  *  @msix: boolean value of MSIX capability
1378  *
1379  *  This function initializes the interrupts and allocates all of the queues.
1380  **/
1381 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1382 {
1383         struct pci_dev *pdev = adapter->pdev;
1384         int err;
1385
1386         igb_set_interrupt_capability(adapter, msix);
1387
1388         err = igb_alloc_q_vectors(adapter);
1389         if (err) {
1390                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1391                 goto err_alloc_q_vectors;
1392         }
1393
1394         igb_cache_ring_register(adapter);
1395
1396         return 0;
1397
1398 err_alloc_q_vectors:
1399         igb_reset_interrupt_capability(adapter);
1400         return err;
1401 }
1402
1403 /**
1404  *  igb_request_irq - initialize interrupts
1405  *  @adapter: board private structure to initialize
1406  *
1407  *  Attempts to configure interrupts using the best available
1408  *  capabilities of the hardware and kernel.
1409  **/
1410 static int igb_request_irq(struct igb_adapter *adapter)
1411 {
1412         struct net_device *netdev = adapter->netdev;
1413         struct pci_dev *pdev = adapter->pdev;
1414         int err = 0;
1415
1416         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1417                 err = igb_request_msix(adapter);
1418                 if (!err)
1419                         goto request_done;
1420                 /* fall back to MSI */
1421                 igb_free_all_tx_resources(adapter);
1422                 igb_free_all_rx_resources(adapter);
1423
1424                 igb_clear_interrupt_scheme(adapter);
1425                 err = igb_init_interrupt_scheme(adapter, false);
1426                 if (err)
1427                         goto request_done;
1428
1429                 igb_setup_all_tx_resources(adapter);
1430                 igb_setup_all_rx_resources(adapter);
1431                 igb_configure(adapter);
1432         }
1433
1434         igb_assign_vector(adapter->q_vector[0], 0);
1435
1436         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1437                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1438                                   netdev->name, adapter);
1439                 if (!err)
1440                         goto request_done;
1441
1442                 /* fall back to legacy interrupts */
1443                 igb_reset_interrupt_capability(adapter);
1444                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1445         }
1446
1447         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1448                           netdev->name, adapter);
1449
1450         if (err)
1451                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1452                         err);
1453
1454 request_done:
1455         return err;
1456 }
1457
1458 static void igb_free_irq(struct igb_adapter *adapter)
1459 {
1460         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1461                 int vector = 0, i;
1462
1463                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1464
1465                 for (i = 0; i < adapter->num_q_vectors; i++)
1466                         free_irq(adapter->msix_entries[vector++].vector,
1467                                  adapter->q_vector[i]);
1468         } else {
1469                 free_irq(adapter->pdev->irq, adapter);
1470         }
1471 }
1472
1473 /**
1474  *  igb_irq_disable - Mask off interrupt generation on the NIC
1475  *  @adapter: board private structure
1476  **/
1477 static void igb_irq_disable(struct igb_adapter *adapter)
1478 {
1479         struct e1000_hw *hw = &adapter->hw;
1480
1481         /* we need to be careful when disabling interrupts.  The VFs are also
1482          * mapped into these registers and so clearing the bits can cause
1483          * issues on the VF drivers so we only need to clear what we set
1484          */
1485         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1486                 u32 regval = rd32(E1000_EIAM);
1487
1488                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1489                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1490                 regval = rd32(E1000_EIAC);
1491                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1492         }
1493
1494         wr32(E1000_IAM, 0);
1495         wr32(E1000_IMC, ~0);
1496         wrfl();
1497         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1498                 int i;
1499
1500                 for (i = 0; i < adapter->num_q_vectors; i++)
1501                         synchronize_irq(adapter->msix_entries[i].vector);
1502         } else {
1503                 synchronize_irq(adapter->pdev->irq);
1504         }
1505 }
1506
1507 /**
1508  *  igb_irq_enable - Enable default interrupt generation settings
1509  *  @adapter: board private structure
1510  **/
1511 static void igb_irq_enable(struct igb_adapter *adapter)
1512 {
1513         struct e1000_hw *hw = &adapter->hw;
1514
1515         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1516                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1517                 u32 regval = rd32(E1000_EIAC);
1518
1519                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1520                 regval = rd32(E1000_EIAM);
1521                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1522                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1523                 if (adapter->vfs_allocated_count) {
1524                         wr32(E1000_MBVFIMR, 0xFF);
1525                         ims |= E1000_IMS_VMMB;
1526                 }
1527                 wr32(E1000_IMS, ims);
1528         } else {
1529                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1530                                 E1000_IMS_DRSTA);
1531                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1532                                 E1000_IMS_DRSTA);
1533         }
1534 }
1535
1536 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1537 {
1538         struct e1000_hw *hw = &adapter->hw;
1539         u16 pf_id = adapter->vfs_allocated_count;
1540         u16 vid = adapter->hw.mng_cookie.vlan_id;
1541         u16 old_vid = adapter->mng_vlan_id;
1542
1543         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1544                 /* add VID to filter table */
1545                 igb_vfta_set(hw, vid, pf_id, true, true);
1546                 adapter->mng_vlan_id = vid;
1547         } else {
1548                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1549         }
1550
1551         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1552             (vid != old_vid) &&
1553             !test_bit(old_vid, adapter->active_vlans)) {
1554                 /* remove VID from filter table */
1555                 igb_vfta_set(hw, vid, pf_id, false, true);
1556         }
1557 }
1558
1559 /**
1560  *  igb_release_hw_control - release control of the h/w to f/w
1561  *  @adapter: address of board private structure
1562  *
1563  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1564  *  For ASF and Pass Through versions of f/w this means that the
1565  *  driver is no longer loaded.
1566  **/
1567 static void igb_release_hw_control(struct igb_adapter *adapter)
1568 {
1569         struct e1000_hw *hw = &adapter->hw;
1570         u32 ctrl_ext;
1571
1572         /* Let firmware take over control of h/w */
1573         ctrl_ext = rd32(E1000_CTRL_EXT);
1574         wr32(E1000_CTRL_EXT,
1575                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1576 }
1577
1578 /**
1579  *  igb_get_hw_control - get control of the h/w from f/w
1580  *  @adapter: address of board private structure
1581  *
1582  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1583  *  For ASF and Pass Through versions of f/w this means that
1584  *  the driver is loaded.
1585  **/
1586 static void igb_get_hw_control(struct igb_adapter *adapter)
1587 {
1588         struct e1000_hw *hw = &adapter->hw;
1589         u32 ctrl_ext;
1590
1591         /* Let firmware know the driver has taken over */
1592         ctrl_ext = rd32(E1000_CTRL_EXT);
1593         wr32(E1000_CTRL_EXT,
1594                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1595 }
1596
1597 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1598 {
1599         struct net_device *netdev = adapter->netdev;
1600         struct e1000_hw *hw = &adapter->hw;
1601
1602         WARN_ON(hw->mac.type != e1000_i210);
1603
1604         if (enable)
1605                 adapter->flags |= IGB_FLAG_FQTSS;
1606         else
1607                 adapter->flags &= ~IGB_FLAG_FQTSS;
1608
1609         if (netif_running(netdev))
1610                 schedule_work(&adapter->reset_task);
1611 }
1612
1613 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1614 {
1615         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1616 }
1617
1618 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1619                                    enum tx_queue_prio prio)
1620 {
1621         u32 val;
1622
1623         WARN_ON(hw->mac.type != e1000_i210);
1624         WARN_ON(queue < 0 || queue > 4);
1625
1626         val = rd32(E1000_I210_TXDCTL(queue));
1627
1628         if (prio == TX_QUEUE_PRIO_HIGH)
1629                 val |= E1000_TXDCTL_PRIORITY;
1630         else
1631                 val &= ~E1000_TXDCTL_PRIORITY;
1632
1633         wr32(E1000_I210_TXDCTL(queue), val);
1634 }
1635
1636 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1637 {
1638         u32 val;
1639
1640         WARN_ON(hw->mac.type != e1000_i210);
1641         WARN_ON(queue < 0 || queue > 1);
1642
1643         val = rd32(E1000_I210_TQAVCC(queue));
1644
1645         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1646                 val |= E1000_TQAVCC_QUEUEMODE;
1647         else
1648                 val &= ~E1000_TQAVCC_QUEUEMODE;
1649
1650         wr32(E1000_I210_TQAVCC(queue), val);
1651 }
1652
1653 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1654 {
1655         int i;
1656
1657         for (i = 0; i < adapter->num_tx_queues; i++) {
1658                 if (adapter->tx_ring[i]->cbs_enable)
1659                         return true;
1660         }
1661
1662         return false;
1663 }
1664
1665 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1666 {
1667         int i;
1668
1669         for (i = 0; i < adapter->num_tx_queues; i++) {
1670                 if (adapter->tx_ring[i]->launchtime_enable)
1671                         return true;
1672         }
1673
1674         return false;
1675 }
1676
1677 /**
1678  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1679  *  @adapter: pointer to adapter struct
1680  *  @queue: queue number
1681  *
1682  *  Configure CBS and Launchtime for a given hardware queue.
1683  *  Parameters are retrieved from the correct Tx ring, so
1684  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1685  *  for setting those correctly prior to this function being called.
1686  **/
1687 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1688 {
1689         struct net_device *netdev = adapter->netdev;
1690         struct e1000_hw *hw = &adapter->hw;
1691         struct igb_ring *ring;
1692         u32 tqavcc, tqavctrl;
1693         u16 value;
1694
1695         WARN_ON(hw->mac.type != e1000_i210);
1696         WARN_ON(queue < 0 || queue > 1);
1697         ring = adapter->tx_ring[queue];
1698
1699         /* If any of the Qav features is enabled, configure queues as SR and
1700          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1701          * as SP.
1702          */
1703         if (ring->cbs_enable || ring->launchtime_enable) {
1704                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1705                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1706         } else {
1707                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1708                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1709         }
1710
1711         /* If CBS is enabled, set DataTranARB and config its parameters. */
1712         if (ring->cbs_enable || queue == 0) {
1713                 /* i210 does not allow the queue 0 to be in the Strict
1714                  * Priority mode while the Qav mode is enabled, so,
1715                  * instead of disabling strict priority mode, we give
1716                  * queue 0 the maximum of credits possible.
1717                  *
1718                  * See section 8.12.19 of the i210 datasheet, "Note:
1719                  * Queue0 QueueMode must be set to 1b when
1720                  * TransmitMode is set to Qav."
1721                  */
1722                 if (queue == 0 && !ring->cbs_enable) {
1723                         /* max "linkspeed" idleslope in kbps */
1724                         ring->idleslope = 1000000;
1725                         ring->hicredit = ETH_FRAME_LEN;
1726                 }
1727
1728                 /* Always set data transfer arbitration to credit-based
1729                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1730                  * the queues.
1731                  */
1732                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1733                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1734                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1735
1736                 /* According to i210 datasheet section 7.2.7.7, we should set
1737                  * the 'idleSlope' field from TQAVCC register following the
1738                  * equation:
1739                  *
1740                  * For 100 Mbps link speed:
1741                  *
1742                  *     value = BW * 0x7735 * 0.2                          (E1)
1743                  *
1744                  * For 1000Mbps link speed:
1745                  *
1746                  *     value = BW * 0x7735 * 2                            (E2)
1747                  *
1748                  * E1 and E2 can be merged into one equation as shown below.
1749                  * Note that 'link-speed' is in Mbps.
1750                  *
1751                  *     value = BW * 0x7735 * 2 * link-speed
1752                  *                           --------------               (E3)
1753                  *                                1000
1754                  *
1755                  * 'BW' is the percentage bandwidth out of full link speed
1756                  * which can be found with the following equation. Note that
1757                  * idleSlope here is the parameter from this function which
1758                  * is in kbps.
1759                  *
1760                  *     BW =     idleSlope
1761                  *          -----------------                             (E4)
1762                  *          link-speed * 1000
1763                  *
1764                  * That said, we can come up with a generic equation to
1765                  * calculate the value we should set it TQAVCC register by
1766                  * replacing 'BW' in E3 by E4. The resulting equation is:
1767                  *
1768                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1769                  *         -----------------            --------------    (E5)
1770                  *         link-speed * 1000                 1000
1771                  *
1772                  * 'link-speed' is present in both sides of the fraction so
1773                  * it is canceled out. The final equation is the following:
1774                  *
1775                  *     value = idleSlope * 61034
1776                  *             -----------------                          (E6)
1777                  *                  1000000
1778                  *
1779                  * NOTE: For i210, given the above, we can see that idleslope
1780                  *       is represented in 16.38431 kbps units by the value at
1781                  *       the TQAVCC register (1Gbps / 61034), which reduces
1782                  *       the granularity for idleslope increments.
1783                  *       For instance, if you want to configure a 2576kbps
1784                  *       idleslope, the value to be written on the register
1785                  *       would have to be 157.23. If rounded down, you end
1786                  *       up with less bandwidth available than originally
1787                  *       required (~2572 kbps). If rounded up, you end up
1788                  *       with a higher bandwidth (~2589 kbps). Below the
1789                  *       approach we take is to always round up the
1790                  *       calculated value, so the resulting bandwidth might
1791                  *       be slightly higher for some configurations.
1792                  */
1793                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1794
1795                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1796                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1797                 tqavcc |= value;
1798                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1799
1800                 wr32(E1000_I210_TQAVHC(queue),
1801                      0x80000000 + ring->hicredit * 0x7735);
1802         } else {
1803
1804                 /* Set idleSlope to zero. */
1805                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1806                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1807                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1808
1809                 /* Set hiCredit to zero. */
1810                 wr32(E1000_I210_TQAVHC(queue), 0);
1811
1812                 /* If CBS is not enabled for any queues anymore, then return to
1813                  * the default state of Data Transmission Arbitration on
1814                  * TQAVCTRL.
1815                  */
1816                 if (!is_any_cbs_enabled(adapter)) {
1817                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1818                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1819                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1820                 }
1821         }
1822
1823         /* If LaunchTime is enabled, set DataTranTIM. */
1824         if (ring->launchtime_enable) {
1825                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1826                  * for any of the SR queues, and configure fetchtime delta.
1827                  * XXX NOTE:
1828                  *     - LaunchTime will be enabled for all SR queues.
1829                  *     - A fixed offset can be added relative to the launch
1830                  *       time of all packets if configured at reg LAUNCH_OS0.
1831                  *       We are keeping it as 0 for now (default value).
1832                  */
1833                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1834                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1835                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1836                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1837         } else {
1838                 /* If Launchtime is not enabled for any SR queues anymore,
1839                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1840                  * effectively disabling Launchtime.
1841                  */
1842                 if (!is_any_txtime_enabled(adapter)) {
1843                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1844                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1845                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1846                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1847                 }
1848         }
1849
1850         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1851          * CBS are not configurable by software so we don't do any 'controller
1852          * configuration' in respect to these parameters.
1853          */
1854
1855         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1856                    ring->cbs_enable ? "enabled" : "disabled",
1857                    ring->launchtime_enable ? "enabled" : "disabled",
1858                    queue,
1859                    ring->idleslope, ring->sendslope,
1860                    ring->hicredit, ring->locredit);
1861 }
1862
1863 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1864                                   bool enable)
1865 {
1866         struct igb_ring *ring;
1867
1868         if (queue < 0 || queue > adapter->num_tx_queues)
1869                 return -EINVAL;
1870
1871         ring = adapter->tx_ring[queue];
1872         ring->launchtime_enable = enable;
1873
1874         return 0;
1875 }
1876
1877 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1878                                bool enable, int idleslope, int sendslope,
1879                                int hicredit, int locredit)
1880 {
1881         struct igb_ring *ring;
1882
1883         if (queue < 0 || queue > adapter->num_tx_queues)
1884                 return -EINVAL;
1885
1886         ring = adapter->tx_ring[queue];
1887
1888         ring->cbs_enable = enable;
1889         ring->idleslope = idleslope;
1890         ring->sendslope = sendslope;
1891         ring->hicredit = hicredit;
1892         ring->locredit = locredit;
1893
1894         return 0;
1895 }
1896
1897 /**
1898  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1899  *  @adapter: pointer to adapter struct
1900  *
1901  *  Configure TQAVCTRL register switching the controller's Tx mode
1902  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1903  *  a call to igb_config_tx_modes() per queue so any previously saved
1904  *  Tx parameters are applied.
1905  **/
1906 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1907 {
1908         struct net_device *netdev = adapter->netdev;
1909         struct e1000_hw *hw = &adapter->hw;
1910         u32 val;
1911
1912         /* Only i210 controller supports changing the transmission mode. */
1913         if (hw->mac.type != e1000_i210)
1914                 return;
1915
1916         if (is_fqtss_enabled(adapter)) {
1917                 int i, max_queue;
1918
1919                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1920                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1921                  * so SP queues wait for SR ones.
1922                  */
1923                 val = rd32(E1000_I210_TQAVCTRL);
1924                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1925                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1926                 wr32(E1000_I210_TQAVCTRL, val);
1927
1928                 /* Configure Tx and Rx packet buffers sizes as described in
1929                  * i210 datasheet section 7.2.7.7.
1930                  */
1931                 val = rd32(E1000_TXPBS);
1932                 val &= ~I210_TXPBSIZE_MASK;
1933                 val |= I210_TXPBSIZE_PB0_6KB | I210_TXPBSIZE_PB1_6KB |
1934                         I210_TXPBSIZE_PB2_6KB | I210_TXPBSIZE_PB3_6KB;
1935                 wr32(E1000_TXPBS, val);
1936
1937                 val = rd32(E1000_RXPBS);
1938                 val &= ~I210_RXPBSIZE_MASK;
1939                 val |= I210_RXPBSIZE_PB_30KB;
1940                 wr32(E1000_RXPBS, val);
1941
1942                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1943                  * register should not exceed the buffer size programmed in
1944                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1945                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1946                  * 4kB / 64.
1947                  *
1948                  * However, when we do so, no frame from queue 2 and 3 are
1949                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1950                  * or _equal_ to the buffer size programmed in TXPBS. For this
1951                  * reason, we set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1952                  */
1953                 val = (4096 - 1) / 64;
1954                 wr32(E1000_I210_DTXMXPKTSZ, val);
1955
1956                 /* Since FQTSS mode is enabled, apply any CBS configuration
1957                  * previously set. If no previous CBS configuration has been
1958                  * done, then the initial configuration is applied, which means
1959                  * CBS is disabled.
1960                  */
1961                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1962                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1963
1964                 for (i = 0; i < max_queue; i++) {
1965                         igb_config_tx_modes(adapter, i);
1966                 }
1967         } else {
1968                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1969                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1970                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1971
1972                 val = rd32(E1000_I210_TQAVCTRL);
1973                 /* According to Section 8.12.21, the other flags we've set when
1974                  * enabling FQTSS are not relevant when disabling FQTSS so we
1975                  * don't set they here.
1976                  */
1977                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1978                 wr32(E1000_I210_TQAVCTRL, val);
1979         }
1980
1981         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1982                    "enabled" : "disabled");
1983 }
1984
1985 /**
1986  *  igb_configure - configure the hardware for RX and TX
1987  *  @adapter: private board structure
1988  **/
1989 static void igb_configure(struct igb_adapter *adapter)
1990 {
1991         struct net_device *netdev = adapter->netdev;
1992         int i;
1993
1994         igb_get_hw_control(adapter);
1995         igb_set_rx_mode(netdev);
1996         igb_setup_tx_mode(adapter);
1997
1998         igb_restore_vlan(adapter);
1999
2000         igb_setup_tctl(adapter);
2001         igb_setup_mrqc(adapter);
2002         igb_setup_rctl(adapter);
2003
2004         igb_nfc_filter_restore(adapter);
2005         igb_configure_tx(adapter);
2006         igb_configure_rx(adapter);
2007
2008         igb_rx_fifo_flush_82575(&adapter->hw);
2009
2010         /* call igb_desc_unused which always leaves
2011          * at least 1 descriptor unused to make sure
2012          * next_to_use != next_to_clean
2013          */
2014         for (i = 0; i < adapter->num_rx_queues; i++) {
2015                 struct igb_ring *ring = adapter->rx_ring[i];
2016                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2017         }
2018 }
2019
2020 /**
2021  *  igb_power_up_link - Power up the phy/serdes link
2022  *  @adapter: address of board private structure
2023  **/
2024 void igb_power_up_link(struct igb_adapter *adapter)
2025 {
2026         igb_reset_phy(&adapter->hw);
2027
2028         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2029                 igb_power_up_phy_copper(&adapter->hw);
2030         else
2031                 igb_power_up_serdes_link_82575(&adapter->hw);
2032
2033         igb_setup_link(&adapter->hw);
2034 }
2035
2036 /**
2037  *  igb_power_down_link - Power down the phy/serdes link
2038  *  @adapter: address of board private structure
2039  */
2040 static void igb_power_down_link(struct igb_adapter *adapter)
2041 {
2042         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2043                 igb_power_down_phy_copper_82575(&adapter->hw);
2044         else
2045                 igb_shutdown_serdes_link_82575(&adapter->hw);
2046 }
2047
2048 /**
2049  * igb_check_swap_media -  Detect and switch function for Media Auto Sense
2050  * @adapter: address of the board private structure
2051  **/
2052 static void igb_check_swap_media(struct igb_adapter *adapter)
2053 {
2054         struct e1000_hw *hw = &adapter->hw;
2055         u32 ctrl_ext, connsw;
2056         bool swap_now = false;
2057
2058         ctrl_ext = rd32(E1000_CTRL_EXT);
2059         connsw = rd32(E1000_CONNSW);
2060
2061         /* need to live swap if current media is copper and we have fiber/serdes
2062          * to go to.
2063          */
2064
2065         if ((hw->phy.media_type == e1000_media_type_copper) &&
2066             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2067                 swap_now = true;
2068         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2069                    !(connsw & E1000_CONNSW_SERDESD)) {
2070                 /* copper signal takes time to appear */
2071                 if (adapter->copper_tries < 4) {
2072                         adapter->copper_tries++;
2073                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2074                         wr32(E1000_CONNSW, connsw);
2075                         return;
2076                 } else {
2077                         adapter->copper_tries = 0;
2078                         if ((connsw & E1000_CONNSW_PHYSD) &&
2079                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2080                                 swap_now = true;
2081                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2082                                 wr32(E1000_CONNSW, connsw);
2083                         }
2084                 }
2085         }
2086
2087         if (!swap_now)
2088                 return;
2089
2090         switch (hw->phy.media_type) {
2091         case e1000_media_type_copper:
2092                 netdev_info(adapter->netdev,
2093                         "MAS: changing media to fiber/serdes\n");
2094                 ctrl_ext |=
2095                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2096                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2097                 adapter->copper_tries = 0;
2098                 break;
2099         case e1000_media_type_internal_serdes:
2100         case e1000_media_type_fiber:
2101                 netdev_info(adapter->netdev,
2102                         "MAS: changing media to copper\n");
2103                 ctrl_ext &=
2104                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2105                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2106                 break;
2107         default:
2108                 /* shouldn't get here during regular operation */
2109                 netdev_err(adapter->netdev,
2110                         "AMS: Invalid media type found, returning\n");
2111                 break;
2112         }
2113         wr32(E1000_CTRL_EXT, ctrl_ext);
2114 }
2115
2116 /**
2117  *  igb_up - Open the interface and prepare it to handle traffic
2118  *  @adapter: board private structure
2119  **/
2120 int igb_up(struct igb_adapter *adapter)
2121 {
2122         struct e1000_hw *hw = &adapter->hw;
2123         int i;
2124
2125         /* hardware has been reset, we need to reload some things */
2126         igb_configure(adapter);
2127
2128         clear_bit(__IGB_DOWN, &adapter->state);
2129
2130         for (i = 0; i < adapter->num_q_vectors; i++)
2131                 napi_enable(&(adapter->q_vector[i]->napi));
2132
2133         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2134                 igb_configure_msix(adapter);
2135         else
2136                 igb_assign_vector(adapter->q_vector[0], 0);
2137
2138         /* Clear any pending interrupts. */
2139         rd32(E1000_TSICR);
2140         rd32(E1000_ICR);
2141         igb_irq_enable(adapter);
2142
2143         /* notify VFs that reset has been completed */
2144         if (adapter->vfs_allocated_count) {
2145                 u32 reg_data = rd32(E1000_CTRL_EXT);
2146
2147                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2148                 wr32(E1000_CTRL_EXT, reg_data);
2149         }
2150
2151         netif_tx_start_all_queues(adapter->netdev);
2152
2153         /* start the watchdog. */
2154         hw->mac.get_link_status = 1;
2155         schedule_work(&adapter->watchdog_task);
2156
2157         if ((adapter->flags & IGB_FLAG_EEE) &&
2158             (!hw->dev_spec._82575.eee_disable))
2159                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2160
2161         return 0;
2162 }
2163
2164 void igb_down(struct igb_adapter *adapter)
2165 {
2166         struct net_device *netdev = adapter->netdev;
2167         struct e1000_hw *hw = &adapter->hw;
2168         u32 tctl, rctl;
2169         int i;
2170
2171         /* signal that we're down so the interrupt handler does not
2172          * reschedule our watchdog timer
2173          */
2174         set_bit(__IGB_DOWN, &adapter->state);
2175
2176         /* disable receives in the hardware */
2177         rctl = rd32(E1000_RCTL);
2178         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2179         /* flush and sleep below */
2180
2181         igb_nfc_filter_exit(adapter);
2182
2183         netif_carrier_off(netdev);
2184         netif_tx_stop_all_queues(netdev);
2185
2186         /* disable transmits in the hardware */
2187         tctl = rd32(E1000_TCTL);
2188         tctl &= ~E1000_TCTL_EN;
2189         wr32(E1000_TCTL, tctl);
2190         /* flush both disables and wait for them to finish */
2191         wrfl();
2192         usleep_range(10000, 11000);
2193
2194         igb_irq_disable(adapter);
2195
2196         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2197
2198         for (i = 0; i < adapter->num_q_vectors; i++) {
2199                 if (adapter->q_vector[i]) {
2200                         napi_synchronize(&adapter->q_vector[i]->napi);
2201                         napi_disable(&adapter->q_vector[i]->napi);
2202                 }
2203         }
2204
2205         del_timer_sync(&adapter->watchdog_timer);
2206         del_timer_sync(&adapter->phy_info_timer);
2207
2208         /* record the stats before reset*/
2209         spin_lock(&adapter->stats64_lock);
2210         igb_update_stats(adapter);
2211         spin_unlock(&adapter->stats64_lock);
2212
2213         adapter->link_speed = 0;
2214         adapter->link_duplex = 0;
2215
2216         if (!pci_channel_offline(adapter->pdev))
2217                 igb_reset(adapter);
2218
2219         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2220         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2221
2222         igb_clean_all_tx_rings(adapter);
2223         igb_clean_all_rx_rings(adapter);
2224 #ifdef CONFIG_IGB_DCA
2225
2226         /* since we reset the hardware DCA settings were cleared */
2227         igb_setup_dca(adapter);
2228 #endif
2229 }
2230
2231 void igb_reinit_locked(struct igb_adapter *adapter)
2232 {
2233         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2234                 usleep_range(1000, 2000);
2235         igb_down(adapter);
2236         igb_up(adapter);
2237         clear_bit(__IGB_RESETTING, &adapter->state);
2238 }
2239
2240 /** igb_enable_mas - Media Autosense re-enable after swap
2241  *
2242  * @adapter: adapter struct
2243  **/
2244 static void igb_enable_mas(struct igb_adapter *adapter)
2245 {
2246         struct e1000_hw *hw = &adapter->hw;
2247         u32 connsw = rd32(E1000_CONNSW);
2248
2249         /* configure for SerDes media detect */
2250         if ((hw->phy.media_type == e1000_media_type_copper) &&
2251             (!(connsw & E1000_CONNSW_SERDESD))) {
2252                 connsw |= E1000_CONNSW_ENRGSRC;
2253                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2254                 wr32(E1000_CONNSW, connsw);
2255                 wrfl();
2256         }
2257 }
2258
2259 #ifdef CONFIG_IGB_HWMON
2260 /**
2261  *  igb_set_i2c_bb - Init I2C interface
2262  *  @hw: pointer to hardware structure
2263  **/
2264 static void igb_set_i2c_bb(struct e1000_hw *hw)
2265 {
2266         u32 ctrl_ext;
2267         s32 i2cctl;
2268
2269         ctrl_ext = rd32(E1000_CTRL_EXT);
2270         ctrl_ext |= E1000_CTRL_I2C_ENA;
2271         wr32(E1000_CTRL_EXT, ctrl_ext);
2272         wrfl();
2273
2274         i2cctl = rd32(E1000_I2CPARAMS);
2275         i2cctl |= E1000_I2CBB_EN
2276                 | E1000_I2C_CLK_OE_N
2277                 | E1000_I2C_DATA_OE_N;
2278         wr32(E1000_I2CPARAMS, i2cctl);
2279         wrfl();
2280 }
2281 #endif
2282
2283 void igb_reset(struct igb_adapter *adapter)
2284 {
2285         struct pci_dev *pdev = adapter->pdev;
2286         struct e1000_hw *hw = &adapter->hw;
2287         struct e1000_mac_info *mac = &hw->mac;
2288         struct e1000_fc_info *fc = &hw->fc;
2289         u32 pba, hwm;
2290
2291         /* Repartition Pba for greater than 9k mtu
2292          * To take effect CTRL.RST is required.
2293          */
2294         switch (mac->type) {
2295         case e1000_i350:
2296         case e1000_i354:
2297         case e1000_82580:
2298                 pba = rd32(E1000_RXPBS);
2299                 pba = igb_rxpbs_adjust_82580(pba);
2300                 break;
2301         case e1000_82576:
2302                 pba = rd32(E1000_RXPBS);
2303                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2304                 break;
2305         case e1000_82575:
2306         case e1000_i210:
2307         case e1000_i211:
2308         default:
2309                 pba = E1000_PBA_34K;
2310                 break;
2311         }
2312
2313         if (mac->type == e1000_82575) {
2314                 u32 min_rx_space, min_tx_space, needed_tx_space;
2315
2316                 /* write Rx PBA so that hardware can report correct Tx PBA */
2317                 wr32(E1000_PBA, pba);
2318
2319                 /* To maintain wire speed transmits, the Tx FIFO should be
2320                  * large enough to accommodate two full transmit packets,
2321                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2322                  * the Rx FIFO should be large enough to accommodate at least
2323                  * one full receive packet and is similarly rounded up and
2324                  * expressed in KB.
2325                  */
2326                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2327
2328                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2329                  * but don't include Ethernet FCS because hardware appends it.
2330                  * We only need to round down to the nearest 512 byte block
2331                  * count since the value we care about is 2 frames, not 1.
2332                  */
2333                 min_tx_space = adapter->max_frame_size;
2334                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2335                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2336
2337                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2338                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2339
2340                 /* If current Tx allocation is less than the min Tx FIFO size,
2341                  * and the min Tx FIFO size is less than the current Rx FIFO
2342                  * allocation, take space away from current Rx allocation.
2343                  */
2344                 if (needed_tx_space < pba) {
2345                         pba -= needed_tx_space;
2346
2347                         /* if short on Rx space, Rx wins and must trump Tx
2348                          * adjustment
2349                          */
2350                         if (pba < min_rx_space)
2351                                 pba = min_rx_space;
2352                 }
2353
2354                 /* adjust PBA for jumbo frames */
2355                 wr32(E1000_PBA, pba);
2356         }
2357
2358         /* flow control settings
2359          * The high water mark must be low enough to fit one full frame
2360          * after transmitting the pause frame.  As such we must have enough
2361          * space to allow for us to complete our current transmit and then
2362          * receive the frame that is in progress from the link partner.
2363          * Set it to:
2364          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2365          */
2366         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2367
2368         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2369         fc->low_water = fc->high_water - 16;
2370         fc->pause_time = 0xFFFF;
2371         fc->send_xon = 1;
2372         fc->current_mode = fc->requested_mode;
2373
2374         /* disable receive for all VFs and wait one second */
2375         if (adapter->vfs_allocated_count) {
2376                 int i;
2377
2378                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2379                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2380
2381                 /* ping all the active vfs to let them know we are going down */
2382                 igb_ping_all_vfs(adapter);
2383
2384                 /* disable transmits and receives */
2385                 wr32(E1000_VFRE, 0);
2386                 wr32(E1000_VFTE, 0);
2387         }
2388
2389         /* Allow time for pending master requests to run */
2390         hw->mac.ops.reset_hw(hw);
2391         wr32(E1000_WUC, 0);
2392
2393         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2394                 /* need to resetup here after media swap */
2395                 adapter->ei.get_invariants(hw);
2396                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2397         }
2398         if ((mac->type == e1000_82575 || mac->type == e1000_i350) &&
2399             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2400                 igb_enable_mas(adapter);
2401         }
2402         if (hw->mac.ops.init_hw(hw))
2403                 dev_err(&pdev->dev, "Hardware Error\n");
2404
2405         /* RAR registers were cleared during init_hw, clear mac table */
2406         igb_flush_mac_table(adapter);
2407         __dev_uc_unsync(adapter->netdev, NULL);
2408
2409         /* Recover default RAR entry */
2410         igb_set_default_mac_filter(adapter);
2411
2412         /* Flow control settings reset on hardware reset, so guarantee flow
2413          * control is off when forcing speed.
2414          */
2415         if (!hw->mac.autoneg)
2416                 igb_force_mac_fc(hw);
2417
2418         igb_init_dmac(adapter, pba);
2419 #ifdef CONFIG_IGB_HWMON
2420         /* Re-initialize the thermal sensor on i350 devices. */
2421         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2422                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2423                         /* If present, re-initialize the external thermal sensor
2424                          * interface.
2425                          */
2426                         if (adapter->ets)
2427                                 igb_set_i2c_bb(hw);
2428                         mac->ops.init_thermal_sensor_thresh(hw);
2429                 }
2430         }
2431 #endif
2432         /* Re-establish EEE setting */
2433         if (hw->phy.media_type == e1000_media_type_copper) {
2434                 switch (mac->type) {
2435                 case e1000_i350:
2436                 case e1000_i210:
2437                 case e1000_i211:
2438                         igb_set_eee_i350(hw, true, true);
2439                         break;
2440                 case e1000_i354:
2441                         igb_set_eee_i354(hw, true, true);
2442                         break;
2443                 default:
2444                         break;
2445                 }
2446         }
2447         if (!netif_running(adapter->netdev))
2448                 igb_power_down_link(adapter);
2449
2450         igb_update_mng_vlan(adapter);
2451
2452         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2453         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2454
2455         /* Re-enable PTP, where applicable. */
2456         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2457                 igb_ptp_reset(adapter);
2458
2459         igb_get_phy_info(hw);
2460 }
2461
2462 static netdev_features_t igb_fix_features(struct net_device *netdev,
2463         netdev_features_t features)
2464 {
2465         /* Since there is no support for separate Rx/Tx vlan accel
2466          * enable/disable make sure Tx flag is always in same state as Rx.
2467          */
2468         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2469                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2470         else
2471                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2472
2473         return features;
2474 }
2475
2476 static int igb_set_features(struct net_device *netdev,
2477         netdev_features_t features)
2478 {
2479         netdev_features_t changed = netdev->features ^ features;
2480         struct igb_adapter *adapter = netdev_priv(netdev);
2481
2482         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2483                 igb_vlan_mode(netdev, features);
2484
2485         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2486                 return 0;
2487
2488         if (!(features & NETIF_F_NTUPLE)) {
2489                 struct hlist_node *node2;
2490                 struct igb_nfc_filter *rule;
2491
2492                 spin_lock(&adapter->nfc_lock);
2493                 hlist_for_each_entry_safe(rule, node2,
2494                                           &adapter->nfc_filter_list, nfc_node) {
2495                         igb_erase_filter(adapter, rule);
2496                         hlist_del(&rule->nfc_node);
2497                         kfree(rule);
2498                 }
2499                 spin_unlock(&adapter->nfc_lock);
2500                 adapter->nfc_filter_count = 0;
2501         }
2502
2503         netdev->features = features;
2504
2505         if (netif_running(netdev))
2506                 igb_reinit_locked(adapter);
2507         else
2508                 igb_reset(adapter);
2509
2510         return 1;
2511 }
2512
2513 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2514                            struct net_device *dev,
2515                            const unsigned char *addr, u16 vid,
2516                            u16 flags,
2517                            struct netlink_ext_ack *extack)
2518 {
2519         /* guarantee we can provide a unique filter for the unicast address */
2520         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2521                 struct igb_adapter *adapter = netdev_priv(dev);
2522                 int vfn = adapter->vfs_allocated_count;
2523
2524                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2525                         return -ENOMEM;
2526         }
2527
2528         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2529 }
2530
2531 #define IGB_MAX_MAC_HDR_LEN     127
2532 #define IGB_MAX_NETWORK_HDR_LEN 511
2533
2534 static netdev_features_t
2535 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2536                    netdev_features_t features)
2537 {
2538         unsigned int network_hdr_len, mac_hdr_len;
2539
2540         /* Make certain the headers can be described by a context descriptor */
2541         mac_hdr_len = skb_network_header(skb) - skb->data;
2542         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2543                 return features & ~(NETIF_F_HW_CSUM |
2544                                     NETIF_F_SCTP_CRC |
2545                                     NETIF_F_GSO_UDP_L4 |
2546                                     NETIF_F_HW_VLAN_CTAG_TX |
2547                                     NETIF_F_TSO |
2548                                     NETIF_F_TSO6);
2549
2550         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2551         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2552                 return features & ~(NETIF_F_HW_CSUM |
2553                                     NETIF_F_SCTP_CRC |
2554                                     NETIF_F_GSO_UDP_L4 |
2555                                     NETIF_F_TSO |
2556                                     NETIF_F_TSO6);
2557
2558         /* We can only support IPV4 TSO in tunnels if we can mangle the
2559          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2560          */
2561         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2562                 features &= ~NETIF_F_TSO;
2563
2564         return features;
2565 }
2566
2567 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2568 {
2569         if (!is_fqtss_enabled(adapter)) {
2570                 enable_fqtss(adapter, true);
2571                 return;
2572         }
2573
2574         igb_config_tx_modes(adapter, queue);
2575
2576         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2577                 enable_fqtss(adapter, false);
2578 }
2579
2580 static int igb_offload_cbs(struct igb_adapter *adapter,
2581                            struct tc_cbs_qopt_offload *qopt)
2582 {
2583         struct e1000_hw *hw = &adapter->hw;
2584         int err;
2585
2586         /* CBS offloading is only supported by i210 controller. */
2587         if (hw->mac.type != e1000_i210)
2588                 return -EOPNOTSUPP;
2589
2590         /* CBS offloading is only supported by queue 0 and queue 1. */
2591         if (qopt->queue < 0 || qopt->queue > 1)
2592                 return -EINVAL;
2593
2594         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2595                                   qopt->idleslope, qopt->sendslope,
2596                                   qopt->hicredit, qopt->locredit);
2597         if (err)
2598                 return err;
2599
2600         igb_offload_apply(adapter, qopt->queue);
2601
2602         return 0;
2603 }
2604
2605 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2606 #define VLAN_PRIO_FULL_MASK (0x07)
2607
2608 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2609                                 struct flow_cls_offload *f,
2610                                 int traffic_class,
2611                                 struct igb_nfc_filter *input)
2612 {
2613         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2614         struct flow_dissector *dissector = rule->match.dissector;
2615         struct netlink_ext_ack *extack = f->common.extack;
2616
2617         if (dissector->used_keys &
2618             ~(BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |
2619               BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |
2620               BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2621               BIT_ULL(FLOW_DISSECTOR_KEY_VLAN))) {
2622                 NL_SET_ERR_MSG_MOD(extack,
2623                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2624                 return -EOPNOTSUPP;
2625         }
2626
2627         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2628                 struct flow_match_eth_addrs match;
2629
2630                 flow_rule_match_eth_addrs(rule, &match);
2631                 if (!is_zero_ether_addr(match.mask->dst)) {
2632                         if (!is_broadcast_ether_addr(match.mask->dst)) {
2633                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2634                                 return -EINVAL;
2635                         }
2636
2637                         input->filter.match_flags |=
2638                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2639                         ether_addr_copy(input->filter.dst_addr, match.key->dst);
2640                 }
2641
2642                 if (!is_zero_ether_addr(match.mask->src)) {
2643                         if (!is_broadcast_ether_addr(match.mask->src)) {
2644                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2645                                 return -EINVAL;
2646                         }
2647
2648                         input->filter.match_flags |=
2649                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2650                         ether_addr_copy(input->filter.src_addr, match.key->src);
2651                 }
2652         }
2653
2654         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2655                 struct flow_match_basic match;
2656
2657                 flow_rule_match_basic(rule, &match);
2658                 if (match.mask->n_proto) {
2659                         if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
2660                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2661                                 return -EINVAL;
2662                         }
2663
2664                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2665                         input->filter.etype = match.key->n_proto;
2666                 }
2667         }
2668
2669         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
2670                 struct flow_match_vlan match;
2671
2672                 flow_rule_match_vlan(rule, &match);
2673                 if (match.mask->vlan_priority) {
2674                         if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2675                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2676                                 return -EINVAL;
2677                         }
2678
2679                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2680                         input->filter.vlan_tci =
2681                                 (__force __be16)match.key->vlan_priority;
2682                 }
2683         }
2684
2685         input->action = traffic_class;
2686         input->cookie = f->cookie;
2687
2688         return 0;
2689 }
2690
2691 static int igb_configure_clsflower(struct igb_adapter *adapter,
2692                                    struct flow_cls_offload *cls_flower)
2693 {
2694         struct netlink_ext_ack *extack = cls_flower->common.extack;
2695         struct igb_nfc_filter *filter, *f;
2696         int err, tc;
2697
2698         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2699         if (tc < 0) {
2700                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2701                 return -EINVAL;
2702         }
2703
2704         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2705         if (!filter)
2706                 return -ENOMEM;
2707
2708         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2709         if (err < 0)
2710                 goto err_parse;
2711
2712         spin_lock(&adapter->nfc_lock);
2713
2714         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2715                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2716                         err = -EEXIST;
2717                         NL_SET_ERR_MSG_MOD(extack,
2718                                            "This filter is already set in ethtool");
2719                         goto err_locked;
2720                 }
2721         }
2722
2723         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2724                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2725                         err = -EEXIST;
2726                         NL_SET_ERR_MSG_MOD(extack,
2727                                            "This filter is already set in cls_flower");
2728                         goto err_locked;
2729                 }
2730         }
2731
2732         err = igb_add_filter(adapter, filter);
2733         if (err < 0) {
2734                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2735                 goto err_locked;
2736         }
2737
2738         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2739
2740         spin_unlock(&adapter->nfc_lock);
2741
2742         return 0;
2743
2744 err_locked:
2745         spin_unlock(&adapter->nfc_lock);
2746
2747 err_parse:
2748         kfree(filter);
2749
2750         return err;
2751 }
2752
2753 static int igb_delete_clsflower(struct igb_adapter *adapter,
2754                                 struct flow_cls_offload *cls_flower)
2755 {
2756         struct igb_nfc_filter *filter;
2757         int err;
2758
2759         spin_lock(&adapter->nfc_lock);
2760
2761         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2762                 if (filter->cookie == cls_flower->cookie)
2763                         break;
2764
2765         if (!filter) {
2766                 err = -ENOENT;
2767                 goto out;
2768         }
2769
2770         err = igb_erase_filter(adapter, filter);
2771         if (err < 0)
2772                 goto out;
2773
2774         hlist_del(&filter->nfc_node);
2775         kfree(filter);
2776
2777 out:
2778         spin_unlock(&adapter->nfc_lock);
2779
2780         return err;
2781 }
2782
2783 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2784                                    struct flow_cls_offload *cls_flower)
2785 {
2786         switch (cls_flower->command) {
2787         case FLOW_CLS_REPLACE:
2788                 return igb_configure_clsflower(adapter, cls_flower);
2789         case FLOW_CLS_DESTROY:
2790                 return igb_delete_clsflower(adapter, cls_flower);
2791         case FLOW_CLS_STATS:
2792                 return -EOPNOTSUPP;
2793         default:
2794                 return -EOPNOTSUPP;
2795         }
2796 }
2797
2798 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2799                                  void *cb_priv)
2800 {
2801         struct igb_adapter *adapter = cb_priv;
2802
2803         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2804                 return -EOPNOTSUPP;
2805
2806         switch (type) {
2807         case TC_SETUP_CLSFLOWER:
2808                 return igb_setup_tc_cls_flower(adapter, type_data);
2809
2810         default:
2811                 return -EOPNOTSUPP;
2812         }
2813 }
2814
2815 static int igb_offload_txtime(struct igb_adapter *adapter,
2816                               struct tc_etf_qopt_offload *qopt)
2817 {
2818         struct e1000_hw *hw = &adapter->hw;
2819         int err;
2820
2821         /* Launchtime offloading is only supported by i210 controller. */
2822         if (hw->mac.type != e1000_i210)
2823                 return -EOPNOTSUPP;
2824
2825         /* Launchtime offloading is only supported by queues 0 and 1. */
2826         if (qopt->queue < 0 || qopt->queue > 1)
2827                 return -EINVAL;
2828
2829         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2830         if (err)
2831                 return err;
2832
2833         igb_offload_apply(adapter, qopt->queue);
2834
2835         return 0;
2836 }
2837
2838 static int igb_tc_query_caps(struct igb_adapter *adapter,
2839                              struct tc_query_caps_base *base)
2840 {
2841         switch (base->type) {
2842         case TC_SETUP_QDISC_TAPRIO: {
2843                 struct tc_taprio_caps *caps = base->caps;
2844
2845                 caps->broken_mqprio = true;
2846
2847                 return 0;
2848         }
2849         default:
2850                 return -EOPNOTSUPP;
2851         }
2852 }
2853
2854 static LIST_HEAD(igb_block_cb_list);
2855
2856 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2857                         void *type_data)
2858 {
2859         struct igb_adapter *adapter = netdev_priv(dev);
2860
2861         switch (type) {
2862         case TC_QUERY_CAPS:
2863                 return igb_tc_query_caps(adapter, type_data);
2864         case TC_SETUP_QDISC_CBS:
2865                 return igb_offload_cbs(adapter, type_data);
2866         case TC_SETUP_BLOCK:
2867                 return flow_block_cb_setup_simple(type_data,
2868                                                   &igb_block_cb_list,
2869                                                   igb_setup_tc_block_cb,
2870                                                   adapter, adapter, true);
2871
2872         case TC_SETUP_QDISC_ETF:
2873                 return igb_offload_txtime(adapter, type_data);
2874
2875         default:
2876                 return -EOPNOTSUPP;
2877         }
2878 }
2879
2880 static int igb_xdp_setup(struct net_device *dev, struct netdev_bpf *bpf)
2881 {
2882         int i, frame_size = dev->mtu + IGB_ETH_PKT_HDR_PAD;
2883         struct igb_adapter *adapter = netdev_priv(dev);
2884         struct bpf_prog *prog = bpf->prog, *old_prog;
2885         bool running = netif_running(dev);
2886         bool need_reset;
2887
2888         /* verify igb ring attributes are sufficient for XDP */
2889         for (i = 0; i < adapter->num_rx_queues; i++) {
2890                 struct igb_ring *ring = adapter->rx_ring[i];
2891
2892                 if (frame_size > igb_rx_bufsz(ring)) {
2893                         NL_SET_ERR_MSG_MOD(bpf->extack,
2894                                            "The RX buffer size is too small for the frame size");
2895                         netdev_warn(dev, "XDP RX buffer size %d is too small for the frame size %d\n",
2896                                     igb_rx_bufsz(ring), frame_size);
2897                         return -EINVAL;
2898                 }
2899         }
2900
2901         old_prog = xchg(&adapter->xdp_prog, prog);
2902         need_reset = (!!prog != !!old_prog);
2903
2904         /* device is up and bpf is added/removed, must setup the RX queues */
2905         if (need_reset && running) {
2906                 igb_close(dev);
2907         } else {
2908                 for (i = 0; i < adapter->num_rx_queues; i++)
2909                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
2910                             adapter->xdp_prog);
2911         }
2912
2913         if (old_prog)
2914                 bpf_prog_put(old_prog);
2915
2916         /* bpf is just replaced, RXQ and MTU are already setup */
2917         if (!need_reset) {
2918                 return 0;
2919         } else {
2920                 if (prog)
2921                         xdp_features_set_redirect_target(dev, true);
2922                 else
2923                         xdp_features_clear_redirect_target(dev);
2924         }
2925
2926         if (running)
2927                 igb_open(dev);
2928
2929         return 0;
2930 }
2931
2932 static int igb_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2933 {
2934         switch (xdp->command) {
2935         case XDP_SETUP_PROG:
2936                 return igb_xdp_setup(dev, xdp);
2937         default:
2938                 return -EINVAL;
2939         }
2940 }
2941
2942 static void igb_xdp_ring_update_tail(struct igb_ring *ring)
2943 {
2944         /* Force memory writes to complete before letting h/w know there
2945          * are new descriptors to fetch.
2946          */
2947         wmb();
2948         writel(ring->next_to_use, ring->tail);
2949 }
2950
2951 static struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)
2952 {
2953         unsigned int r_idx = smp_processor_id();
2954
2955         if (r_idx >= adapter->num_tx_queues)
2956                 r_idx = r_idx % adapter->num_tx_queues;
2957
2958         return adapter->tx_ring[r_idx];
2959 }
2960
2961 static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)
2962 {
2963         struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
2964         int cpu = smp_processor_id();
2965         struct igb_ring *tx_ring;
2966         struct netdev_queue *nq;
2967         u32 ret;
2968
2969         if (unlikely(!xdpf))
2970                 return IGB_XDP_CONSUMED;
2971
2972         /* During program transitions its possible adapter->xdp_prog is assigned
2973          * but ring has not been configured yet. In this case simply abort xmit.
2974          */
2975         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2976         if (unlikely(!tx_ring))
2977                 return IGB_XDP_CONSUMED;
2978
2979         nq = txring_txq(tx_ring);
2980         __netif_tx_lock(nq, cpu);
2981         /* Avoid transmit queue timeout since we share it with the slow path */
2982         txq_trans_cond_update(nq);
2983         ret = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2984         __netif_tx_unlock(nq);
2985
2986         return ret;
2987 }
2988
2989 static int igb_xdp_xmit(struct net_device *dev, int n,
2990                         struct xdp_frame **frames, u32 flags)
2991 {
2992         struct igb_adapter *adapter = netdev_priv(dev);
2993         int cpu = smp_processor_id();
2994         struct igb_ring *tx_ring;
2995         struct netdev_queue *nq;
2996         int nxmit = 0;
2997         int i;
2998
2999         if (unlikely(test_bit(__IGB_DOWN, &adapter->state)))
3000                 return -ENETDOWN;
3001
3002         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
3003                 return -EINVAL;
3004
3005         /* During program transitions its possible adapter->xdp_prog is assigned
3006          * but ring has not been configured yet. In this case simply abort xmit.
3007          */
3008         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
3009         if (unlikely(!tx_ring))
3010                 return -ENXIO;
3011
3012         nq = txring_txq(tx_ring);
3013         __netif_tx_lock(nq, cpu);
3014
3015         /* Avoid transmit queue timeout since we share it with the slow path */
3016         txq_trans_cond_update(nq);
3017
3018         for (i = 0; i < n; i++) {
3019                 struct xdp_frame *xdpf = frames[i];
3020                 int err;
3021
3022                 err = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
3023                 if (err != IGB_XDP_TX)
3024                         break;
3025                 nxmit++;
3026         }
3027
3028         __netif_tx_unlock(nq);
3029
3030         if (unlikely(flags & XDP_XMIT_FLUSH))
3031                 igb_xdp_ring_update_tail(tx_ring);
3032
3033         return nxmit;
3034 }
3035
3036 static const struct net_device_ops igb_netdev_ops = {
3037         .ndo_open               = igb_open,
3038         .ndo_stop               = igb_close,
3039         .ndo_start_xmit         = igb_xmit_frame,
3040         .ndo_get_stats64        = igb_get_stats64,
3041         .ndo_set_rx_mode        = igb_set_rx_mode,
3042         .ndo_set_mac_address    = igb_set_mac,
3043         .ndo_change_mtu         = igb_change_mtu,
3044         .ndo_eth_ioctl          = igb_ioctl,
3045         .ndo_tx_timeout         = igb_tx_timeout,
3046         .ndo_validate_addr      = eth_validate_addr,
3047         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
3048         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
3049         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
3050         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
3051         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
3052         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
3053         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
3054         .ndo_get_vf_config      = igb_ndo_get_vf_config,
3055         .ndo_fix_features       = igb_fix_features,
3056         .ndo_set_features       = igb_set_features,
3057         .ndo_fdb_add            = igb_ndo_fdb_add,
3058         .ndo_features_check     = igb_features_check,
3059         .ndo_setup_tc           = igb_setup_tc,
3060         .ndo_bpf                = igb_xdp,
3061         .ndo_xdp_xmit           = igb_xdp_xmit,
3062 };
3063
3064 /**
3065  * igb_set_fw_version - Configure version string for ethtool
3066  * @adapter: adapter struct
3067  **/
3068 void igb_set_fw_version(struct igb_adapter *adapter)
3069 {
3070         struct e1000_hw *hw = &adapter->hw;
3071         struct e1000_fw_version fw;
3072
3073         igb_get_fw_version(hw, &fw);
3074
3075         switch (hw->mac.type) {
3076         case e1000_i210:
3077         case e1000_i211:
3078                 if (!(igb_get_flash_presence_i210(hw))) {
3079                         snprintf(adapter->fw_version,
3080                                  sizeof(adapter->fw_version),
3081                                  "%2d.%2d-%d",
3082                                  fw.invm_major, fw.invm_minor,
3083                                  fw.invm_img_type);
3084                         break;
3085                 }
3086                 fallthrough;
3087         default:
3088                 /* if option is rom valid, display its version too */
3089                 if (fw.or_valid) {
3090                         snprintf(adapter->fw_version,
3091                                  sizeof(adapter->fw_version),
3092                                  "%d.%d, 0x%08x, %d.%d.%d",
3093                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
3094                                  fw.or_major, fw.or_build, fw.or_patch);
3095                 /* no option rom */
3096                 } else if (fw.etrack_id != 0X0000) {
3097                         snprintf(adapter->fw_version,
3098                             sizeof(adapter->fw_version),
3099                             "%d.%d, 0x%08x",
3100                             fw.eep_major, fw.eep_minor, fw.etrack_id);
3101                 } else {
3102                 snprintf(adapter->fw_version,
3103                     sizeof(adapter->fw_version),
3104                     "%d.%d.%d",
3105                     fw.eep_major, fw.eep_minor, fw.eep_build);
3106                 }
3107                 break;
3108         }
3109 }
3110
3111 /**
3112  * igb_init_mas - init Media Autosense feature if enabled in the NVM
3113  *
3114  * @adapter: adapter struct
3115  **/
3116 static void igb_init_mas(struct igb_adapter *adapter)
3117 {
3118         struct e1000_hw *hw = &adapter->hw;
3119         u16 eeprom_data;
3120
3121         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
3122         switch (hw->bus.func) {
3123         case E1000_FUNC_0:
3124                 if (eeprom_data & IGB_MAS_ENABLE_0) {
3125                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3126                         netdev_info(adapter->netdev,
3127                                 "MAS: Enabling Media Autosense for port %d\n",
3128                                 hw->bus.func);
3129                 }
3130                 break;
3131         case E1000_FUNC_1:
3132                 if (eeprom_data & IGB_MAS_ENABLE_1) {
3133                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3134                         netdev_info(adapter->netdev,
3135                                 "MAS: Enabling Media Autosense for port %d\n",
3136                                 hw->bus.func);
3137                 }
3138                 break;
3139         case E1000_FUNC_2:
3140                 if (eeprom_data & IGB_MAS_ENABLE_2) {
3141                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3142                         netdev_info(adapter->netdev,
3143                                 "MAS: Enabling Media Autosense for port %d\n",
3144                                 hw->bus.func);
3145                 }
3146                 break;
3147         case E1000_FUNC_3:
3148                 if (eeprom_data & IGB_MAS_ENABLE_3) {
3149                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3150                         netdev_info(adapter->netdev,
3151                                 "MAS: Enabling Media Autosense for port %d\n",
3152                                 hw->bus.func);
3153                 }
3154                 break;
3155         default:
3156                 /* Shouldn't get here */
3157                 netdev_err(adapter->netdev,
3158                         "MAS: Invalid port configuration, returning\n");
3159                 break;
3160         }
3161 }
3162
3163 /**
3164  *  igb_init_i2c - Init I2C interface
3165  *  @adapter: pointer to adapter structure
3166  **/
3167 static s32 igb_init_i2c(struct igb_adapter *adapter)
3168 {
3169         s32 status = 0;
3170
3171         /* I2C interface supported on i350 devices */
3172         if (adapter->hw.mac.type != e1000_i350)
3173                 return 0;
3174
3175         /* Initialize the i2c bus which is controlled by the registers.
3176          * This bus will use the i2c_algo_bit structure that implements
3177          * the protocol through toggling of the 4 bits in the register.
3178          */
3179         adapter->i2c_adap.owner = THIS_MODULE;
3180         adapter->i2c_algo = igb_i2c_algo;
3181         adapter->i2c_algo.data = adapter;
3182         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3183         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3184         strscpy(adapter->i2c_adap.name, "igb BB",
3185                 sizeof(adapter->i2c_adap.name));
3186         status = i2c_bit_add_bus(&adapter->i2c_adap);
3187         return status;
3188 }
3189
3190 /**
3191  *  igb_probe - Device Initialization Routine
3192  *  @pdev: PCI device information struct
3193  *  @ent: entry in igb_pci_tbl
3194  *
3195  *  Returns 0 on success, negative on failure
3196  *
3197  *  igb_probe initializes an adapter identified by a pci_dev structure.
3198  *  The OS initialization, configuring of the adapter private structure,
3199  *  and a hardware reset occur.
3200  **/
3201 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3202 {
3203         struct net_device *netdev;
3204         struct igb_adapter *adapter;
3205         struct e1000_hw *hw;
3206         u16 eeprom_data = 0;
3207         s32 ret_val;
3208         static int global_quad_port_a; /* global quad port a indication */
3209         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3210         u8 part_str[E1000_PBANUM_LENGTH];
3211         int err;
3212
3213         /* Catch broken hardware that put the wrong VF device ID in
3214          * the PCIe SR-IOV capability.
3215          */
3216         if (pdev->is_virtfn) {
3217                 WARN(1, KERN_ERR "%s (%x:%x) should not be a VF!\n",
3218                         pci_name(pdev), pdev->vendor, pdev->device);
3219                 return -EINVAL;
3220         }
3221
3222         err = pci_enable_device_mem(pdev);
3223         if (err)
3224                 return err;
3225
3226         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3227         if (err) {
3228                 dev_err(&pdev->dev,
3229                         "No usable DMA configuration, aborting\n");
3230                 goto err_dma;
3231         }
3232
3233         err = pci_request_mem_regions(pdev, igb_driver_name);
3234         if (err)
3235                 goto err_pci_reg;
3236
3237         pci_set_master(pdev);
3238         pci_save_state(pdev);
3239
3240         err = -ENOMEM;
3241         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3242                                    IGB_MAX_TX_QUEUES);
3243         if (!netdev)
3244                 goto err_alloc_etherdev;
3245
3246         SET_NETDEV_DEV(netdev, &pdev->dev);
3247
3248         pci_set_drvdata(pdev, netdev);
3249         adapter = netdev_priv(netdev);
3250         adapter->netdev = netdev;
3251         adapter->pdev = pdev;
3252         hw = &adapter->hw;
3253         hw->back = adapter;
3254         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3255
3256         err = -EIO;
3257         adapter->io_addr = pci_iomap(pdev, 0, 0);
3258         if (!adapter->io_addr)
3259                 goto err_ioremap;
3260         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3261         hw->hw_addr = adapter->io_addr;
3262
3263         netdev->netdev_ops = &igb_netdev_ops;
3264         igb_set_ethtool_ops(netdev);
3265         netdev->watchdog_timeo = 5 * HZ;
3266
3267         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3268
3269         netdev->mem_start = pci_resource_start(pdev, 0);
3270         netdev->mem_end = pci_resource_end(pdev, 0);
3271
3272         /* PCI config space info */
3273         hw->vendor_id = pdev->vendor;
3274         hw->device_id = pdev->device;
3275         hw->revision_id = pdev->revision;
3276         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3277         hw->subsystem_device_id = pdev->subsystem_device;
3278
3279         /* Copy the default MAC, PHY and NVM function pointers */
3280         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3281         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3282         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3283         /* Initialize skew-specific constants */
3284         err = ei->get_invariants(hw);
3285         if (err)
3286                 goto err_sw_init;
3287
3288         /* setup the private structure */
3289         err = igb_sw_init(adapter);
3290         if (err)
3291                 goto err_sw_init;
3292
3293         igb_get_bus_info_pcie(hw);
3294
3295         hw->phy.autoneg_wait_to_complete = false;
3296
3297         /* Copper options */
3298         if (hw->phy.media_type == e1000_media_type_copper) {
3299                 hw->phy.mdix = AUTO_ALL_MODES;
3300                 hw->phy.disable_polarity_correction = false;
3301                 hw->phy.ms_type = e1000_ms_hw_default;
3302         }
3303
3304         if (igb_check_reset_block(hw))
3305                 dev_info(&pdev->dev,
3306                         "PHY reset is blocked due to SOL/IDER session.\n");
3307
3308         /* features is initialized to 0 in allocation, it might have bits
3309          * set by igb_sw_init so we should use an or instead of an
3310          * assignment.
3311          */
3312         netdev->features |= NETIF_F_SG |
3313                             NETIF_F_TSO |
3314                             NETIF_F_TSO6 |
3315                             NETIF_F_RXHASH |
3316                             NETIF_F_RXCSUM |
3317                             NETIF_F_HW_CSUM;
3318
3319         if (hw->mac.type >= e1000_82576)
3320                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
3321
3322         if (hw->mac.type >= e1000_i350)
3323                 netdev->features |= NETIF_F_HW_TC;
3324
3325 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3326                                   NETIF_F_GSO_GRE_CSUM | \
3327                                   NETIF_F_GSO_IPXIP4 | \
3328                                   NETIF_F_GSO_IPXIP6 | \
3329                                   NETIF_F_GSO_UDP_TUNNEL | \
3330                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3331
3332         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3333         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3334
3335         /* copy netdev features into list of user selectable features */
3336         netdev->hw_features |= netdev->features |
3337                                NETIF_F_HW_VLAN_CTAG_RX |
3338                                NETIF_F_HW_VLAN_CTAG_TX |
3339                                NETIF_F_RXALL;
3340
3341         if (hw->mac.type >= e1000_i350)
3342                 netdev->hw_features |= NETIF_F_NTUPLE;
3343
3344         netdev->features |= NETIF_F_HIGHDMA;
3345
3346         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3347         netdev->mpls_features |= NETIF_F_HW_CSUM;
3348         netdev->hw_enc_features |= netdev->vlan_features;
3349
3350         /* set this bit last since it cannot be part of vlan_features */
3351         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3352                             NETIF_F_HW_VLAN_CTAG_RX |
3353                             NETIF_F_HW_VLAN_CTAG_TX;
3354
3355         netdev->priv_flags |= IFF_SUPP_NOFCS;
3356
3357         netdev->priv_flags |= IFF_UNICAST_FLT;
3358         netdev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT;
3359
3360         /* MTU range: 68 - 9216 */
3361         netdev->min_mtu = ETH_MIN_MTU;
3362         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3363
3364         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3365
3366         /* before reading the NVM, reset the controller to put the device in a
3367          * known good starting state
3368          */
3369         hw->mac.ops.reset_hw(hw);
3370
3371         /* make sure the NVM is good , i211/i210 parts can have special NVM
3372          * that doesn't contain a checksum
3373          */
3374         switch (hw->mac.type) {
3375         case e1000_i210:
3376         case e1000_i211:
3377                 if (igb_get_flash_presence_i210(hw)) {
3378                         if (hw->nvm.ops.validate(hw) < 0) {
3379                                 dev_err(&pdev->dev,
3380                                         "The NVM Checksum Is Not Valid\n");
3381                                 err = -EIO;
3382                                 goto err_eeprom;
3383                         }
3384                 }
3385                 break;
3386         default:
3387                 if (hw->nvm.ops.validate(hw) < 0) {
3388                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3389                         err = -EIO;
3390                         goto err_eeprom;
3391                 }
3392                 break;
3393         }
3394
3395         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3396                 /* copy the MAC address out of the NVM */
3397                 if (hw->mac.ops.read_mac_addr(hw))
3398                         dev_err(&pdev->dev, "NVM Read Error\n");
3399         }
3400
3401         eth_hw_addr_set(netdev, hw->mac.addr);
3402
3403         if (!is_valid_ether_addr(netdev->dev_addr)) {
3404                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3405                 err = -EIO;
3406                 goto err_eeprom;
3407         }
3408
3409         igb_set_default_mac_filter(adapter);
3410
3411         /* get firmware version for ethtool -i */
3412         igb_set_fw_version(adapter);
3413
3414         /* configure RXPBSIZE and TXPBSIZE */
3415         if (hw->mac.type == e1000_i210) {
3416                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3417                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3418         }
3419
3420         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3421         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3422
3423         INIT_WORK(&adapter->reset_task, igb_reset_task);
3424         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3425
3426         /* Initialize link properties that are user-changeable */
3427         adapter->fc_autoneg = true;
3428         hw->mac.autoneg = true;
3429         hw->phy.autoneg_advertised = 0x2f;
3430
3431         hw->fc.requested_mode = e1000_fc_default;
3432         hw->fc.current_mode = e1000_fc_default;
3433
3434         igb_validate_mdi_setting(hw);
3435
3436         /* By default, support wake on port A */
3437         if (hw->bus.func == 0)
3438                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3439
3440         /* Check the NVM for wake support on non-port A ports */
3441         if (hw->mac.type >= e1000_82580)
3442                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3443                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3444                                  &eeprom_data);
3445         else if (hw->bus.func == 1)
3446                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3447
3448         if (eeprom_data & IGB_EEPROM_APME)
3449                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3450
3451         /* now that we have the eeprom settings, apply the special cases where
3452          * the eeprom may be wrong or the board simply won't support wake on
3453          * lan on a particular port
3454          */
3455         switch (pdev->device) {
3456         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3457                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3458                 break;
3459         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3460         case E1000_DEV_ID_82576_FIBER:
3461         case E1000_DEV_ID_82576_SERDES:
3462                 /* Wake events only supported on port A for dual fiber
3463                  * regardless of eeprom setting
3464                  */
3465                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3466                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3467                 break;
3468         case E1000_DEV_ID_82576_QUAD_COPPER:
3469         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3470                 /* if quad port adapter, disable WoL on all but port A */
3471                 if (global_quad_port_a != 0)
3472                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3473                 else
3474                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3475                 /* Reset for multiple quad port adapters */
3476                 if (++global_quad_port_a == 4)
3477                         global_quad_port_a = 0;
3478                 break;
3479         default:
3480                 /* If the device can't wake, don't set software support */
3481                 if (!device_can_wakeup(&adapter->pdev->dev))
3482                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3483         }
3484
3485         /* initialize the wol settings based on the eeprom settings */
3486         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3487                 adapter->wol |= E1000_WUFC_MAG;
3488
3489         /* Some vendors want WoL disabled by default, but still supported */
3490         if ((hw->mac.type == e1000_i350) &&
3491             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3492                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3493                 adapter->wol = 0;
3494         }
3495
3496         /* Some vendors want the ability to Use the EEPROM setting as
3497          * enable/disable only, and not for capability
3498          */
3499         if (((hw->mac.type == e1000_i350) ||
3500              (hw->mac.type == e1000_i354)) &&
3501             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3502                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3503                 adapter->wol = 0;
3504         }
3505         if (hw->mac.type == e1000_i350) {
3506                 if (((pdev->subsystem_device == 0x5001) ||
3507                      (pdev->subsystem_device == 0x5002)) &&
3508                                 (hw->bus.func == 0)) {
3509                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3510                         adapter->wol = 0;
3511                 }
3512                 if (pdev->subsystem_device == 0x1F52)
3513                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3514         }
3515
3516         device_set_wakeup_enable(&adapter->pdev->dev,
3517                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3518
3519         /* reset the hardware with the new settings */
3520         igb_reset(adapter);
3521
3522         /* Init the I2C interface */
3523         err = igb_init_i2c(adapter);
3524         if (err) {
3525                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3526                 goto err_eeprom;
3527         }
3528
3529         /* let the f/w know that the h/w is now under the control of the
3530          * driver.
3531          */
3532         igb_get_hw_control(adapter);
3533
3534         strcpy(netdev->name, "eth%d");
3535         err = register_netdev(netdev);
3536         if (err)
3537                 goto err_register;
3538
3539         /* carrier off reporting is important to ethtool even BEFORE open */
3540         netif_carrier_off(netdev);
3541
3542 #ifdef CONFIG_IGB_DCA
3543         if (dca_add_requester(&pdev->dev) == 0) {
3544                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3545                 dev_info(&pdev->dev, "DCA enabled\n");
3546                 igb_setup_dca(adapter);
3547         }
3548
3549 #endif
3550 #ifdef CONFIG_IGB_HWMON
3551         /* Initialize the thermal sensor on i350 devices. */
3552         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3553                 u16 ets_word;
3554
3555                 /* Read the NVM to determine if this i350 device supports an
3556                  * external thermal sensor.
3557                  */
3558                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3559                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3560                         adapter->ets = true;
3561                 else
3562                         adapter->ets = false;
3563                 /* Only enable I2C bit banging if an external thermal
3564                  * sensor is supported.
3565                  */
3566                 if (adapter->ets)
3567                         igb_set_i2c_bb(hw);
3568                 hw->mac.ops.init_thermal_sensor_thresh(hw);
3569                 if (igb_sysfs_init(adapter))
3570                         dev_err(&pdev->dev,
3571                                 "failed to allocate sysfs resources\n");
3572         } else {
3573                 adapter->ets = false;
3574         }
3575 #endif
3576         /* Check if Media Autosense is enabled */
3577         adapter->ei = *ei;
3578         if (hw->dev_spec._82575.mas_capable)
3579                 igb_init_mas(adapter);
3580
3581         /* do hw tstamp init after resetting */
3582         igb_ptp_init(adapter);
3583
3584         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3585         /* print bus type/speed/width info, not applicable to i354 */
3586         if (hw->mac.type != e1000_i354) {
3587                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3588                          netdev->name,
3589                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3590                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3591                            "unknown"),
3592                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3593                           "Width x4" :
3594                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3595                           "Width x2" :
3596                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3597                           "Width x1" : "unknown"), netdev->dev_addr);
3598         }
3599
3600         if ((hw->mac.type == e1000_82576 &&
3601              rd32(E1000_EECD) & E1000_EECD_PRES) ||
3602             (hw->mac.type >= e1000_i210 ||
3603              igb_get_flash_presence_i210(hw))) {
3604                 ret_val = igb_read_part_string(hw, part_str,
3605                                                E1000_PBANUM_LENGTH);
3606         } else {
3607                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3608         }
3609
3610         if (ret_val)
3611                 strcpy(part_str, "Unknown");
3612         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3613         dev_info(&pdev->dev,
3614                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3615                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3616                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3617                 adapter->num_rx_queues, adapter->num_tx_queues);
3618         if (hw->phy.media_type == e1000_media_type_copper) {
3619                 switch (hw->mac.type) {
3620                 case e1000_i350:
3621                 case e1000_i210:
3622                 case e1000_i211:
3623                         /* Enable EEE for internal copper PHY devices */
3624                         err = igb_set_eee_i350(hw, true, true);
3625                         if ((!err) &&
3626                             (!hw->dev_spec._82575.eee_disable)) {
3627                                 adapter->eee_advert =
3628                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3629                                 adapter->flags |= IGB_FLAG_EEE;
3630                         }
3631                         break;
3632                 case e1000_i354:
3633                         if ((rd32(E1000_CTRL_EXT) &
3634                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3635                                 err = igb_set_eee_i354(hw, true, true);
3636                                 if ((!err) &&
3637                                         (!hw->dev_spec._82575.eee_disable)) {
3638                                         adapter->eee_advert =
3639                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3640                                         adapter->flags |= IGB_FLAG_EEE;
3641                                 }
3642                         }
3643                         break;
3644                 default:
3645                         break;
3646                 }
3647         }
3648
3649         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
3650
3651         pm_runtime_put_noidle(&pdev->dev);
3652         return 0;
3653
3654 err_register:
3655         igb_release_hw_control(adapter);
3656         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3657 err_eeprom:
3658         if (!igb_check_reset_block(hw))
3659                 igb_reset_phy(hw);
3660
3661         if (hw->flash_address)
3662                 iounmap(hw->flash_address);
3663 err_sw_init:
3664         kfree(adapter->mac_table);
3665         kfree(adapter->shadow_vfta);
3666         igb_clear_interrupt_scheme(adapter);
3667 #ifdef CONFIG_PCI_IOV
3668         igb_disable_sriov(pdev, false);
3669 #endif
3670         pci_iounmap(pdev, adapter->io_addr);
3671 err_ioremap:
3672         free_netdev(netdev);
3673 err_alloc_etherdev:
3674         pci_release_mem_regions(pdev);
3675 err_pci_reg:
3676 err_dma:
3677         pci_disable_device(pdev);
3678         return err;
3679 }
3680
3681 #ifdef CONFIG_PCI_IOV
3682 static int igb_sriov_reinit(struct pci_dev *dev)
3683 {
3684         struct net_device *netdev = pci_get_drvdata(dev);
3685         struct igb_adapter *adapter = netdev_priv(netdev);
3686         struct pci_dev *pdev = adapter->pdev;
3687
3688         rtnl_lock();
3689
3690         if (netif_running(netdev))
3691                 igb_close(netdev);
3692         else
3693                 igb_reset(adapter);
3694
3695         igb_clear_interrupt_scheme(adapter);
3696
3697         igb_init_queue_configuration(adapter);
3698
3699         if (igb_init_interrupt_scheme(adapter, true)) {
3700                 rtnl_unlock();
3701                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3702                 return -ENOMEM;
3703         }
3704
3705         if (netif_running(netdev))
3706                 igb_open(netdev);
3707
3708         rtnl_unlock();
3709
3710         return 0;
3711 }
3712
3713 static int igb_disable_sriov(struct pci_dev *pdev, bool reinit)
3714 {
3715         struct net_device *netdev = pci_get_drvdata(pdev);
3716         struct igb_adapter *adapter = netdev_priv(netdev);
3717         struct e1000_hw *hw = &adapter->hw;
3718         unsigned long flags;
3719
3720         /* reclaim resources allocated to VFs */
3721         if (adapter->vf_data) {
3722                 /* disable iov and allow time for transactions to clear */
3723                 if (pci_vfs_assigned(pdev)) {
3724                         dev_warn(&pdev->dev,
3725                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3726                         return -EPERM;
3727                 } else {
3728                         pci_disable_sriov(pdev);
3729                         msleep(500);
3730                 }
3731                 spin_lock_irqsave(&adapter->vfs_lock, flags);
3732                 kfree(adapter->vf_mac_list);
3733                 adapter->vf_mac_list = NULL;
3734                 kfree(adapter->vf_data);
3735                 adapter->vf_data = NULL;
3736                 adapter->vfs_allocated_count = 0;
3737                 spin_unlock_irqrestore(&adapter->vfs_lock, flags);
3738                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3739                 wrfl();
3740                 msleep(100);
3741                 dev_info(&pdev->dev, "IOV Disabled\n");
3742
3743                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3744                 adapter->flags |= IGB_FLAG_DMAC;
3745         }
3746
3747         return reinit ? igb_sriov_reinit(pdev) : 0;
3748 }
3749
3750 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs, bool reinit)
3751 {
3752         struct net_device *netdev = pci_get_drvdata(pdev);
3753         struct igb_adapter *adapter = netdev_priv(netdev);
3754         int old_vfs = pci_num_vf(pdev);
3755         struct vf_mac_filter *mac_list;
3756         int err = 0;
3757         int num_vf_mac_filters, i;
3758
3759         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3760                 err = -EPERM;
3761                 goto out;
3762         }
3763         if (!num_vfs)
3764                 goto out;
3765
3766         if (old_vfs) {
3767                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3768                          old_vfs, max_vfs);
3769                 adapter->vfs_allocated_count = old_vfs;
3770         } else
3771                 adapter->vfs_allocated_count = num_vfs;
3772
3773         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3774                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3775
3776         /* if allocation failed then we do not support SR-IOV */
3777         if (!adapter->vf_data) {
3778                 adapter->vfs_allocated_count = 0;
3779                 err = -ENOMEM;
3780                 goto out;
3781         }
3782
3783         /* Due to the limited number of RAR entries calculate potential
3784          * number of MAC filters available for the VFs. Reserve entries
3785          * for PF default MAC, PF MAC filters and at least one RAR entry
3786          * for each VF for VF MAC.
3787          */
3788         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3789                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3790                               adapter->vfs_allocated_count);
3791
3792         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3793                                        sizeof(struct vf_mac_filter),
3794                                        GFP_KERNEL);
3795
3796         mac_list = adapter->vf_mac_list;
3797         INIT_LIST_HEAD(&adapter->vf_macs.l);
3798
3799         if (adapter->vf_mac_list) {
3800                 /* Initialize list of VF MAC filters */
3801                 for (i = 0; i < num_vf_mac_filters; i++) {
3802                         mac_list->vf = -1;
3803                         mac_list->free = true;
3804                         list_add(&mac_list->l, &adapter->vf_macs.l);
3805                         mac_list++;
3806                 }
3807         } else {
3808                 /* If we could not allocate memory for the VF MAC filters
3809                  * we can continue without this feature but warn user.
3810                  */
3811                 dev_err(&pdev->dev,
3812                         "Unable to allocate memory for VF MAC filter list\n");
3813         }
3814
3815         dev_info(&pdev->dev, "%d VFs allocated\n",
3816                  adapter->vfs_allocated_count);
3817         for (i = 0; i < adapter->vfs_allocated_count; i++)
3818                 igb_vf_configure(adapter, i);
3819
3820         /* DMA Coalescing is not supported in IOV mode. */
3821         adapter->flags &= ~IGB_FLAG_DMAC;
3822
3823         if (reinit) {
3824                 err = igb_sriov_reinit(pdev);
3825                 if (err)
3826                         goto err_out;
3827         }
3828
3829         /* only call pci_enable_sriov() if no VFs are allocated already */
3830         if (!old_vfs)
3831                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3832
3833         goto out;
3834
3835 err_out:
3836         kfree(adapter->vf_mac_list);
3837         adapter->vf_mac_list = NULL;
3838         kfree(adapter->vf_data);
3839         adapter->vf_data = NULL;
3840         adapter->vfs_allocated_count = 0;
3841 out:
3842         return err;
3843 }
3844
3845 #endif
3846 /**
3847  *  igb_remove_i2c - Cleanup  I2C interface
3848  *  @adapter: pointer to adapter structure
3849  **/
3850 static void igb_remove_i2c(struct igb_adapter *adapter)
3851 {
3852         /* free the adapter bus structure */
3853         i2c_del_adapter(&adapter->i2c_adap);
3854 }
3855
3856 /**
3857  *  igb_remove - Device Removal Routine
3858  *  @pdev: PCI device information struct
3859  *
3860  *  igb_remove is called by the PCI subsystem to alert the driver
3861  *  that it should release a PCI device.  The could be caused by a
3862  *  Hot-Plug event, or because the driver is going to be removed from
3863  *  memory.
3864  **/
3865 static void igb_remove(struct pci_dev *pdev)
3866 {
3867         struct net_device *netdev = pci_get_drvdata(pdev);
3868         struct igb_adapter *adapter = netdev_priv(netdev);
3869         struct e1000_hw *hw = &adapter->hw;
3870
3871         pm_runtime_get_noresume(&pdev->dev);
3872 #ifdef CONFIG_IGB_HWMON
3873         igb_sysfs_exit(adapter);
3874 #endif
3875         igb_remove_i2c(adapter);
3876         igb_ptp_stop(adapter);
3877         /* The watchdog timer may be rescheduled, so explicitly
3878          * disable watchdog from being rescheduled.
3879          */
3880         set_bit(__IGB_DOWN, &adapter->state);
3881         del_timer_sync(&adapter->watchdog_timer);
3882         del_timer_sync(&adapter->phy_info_timer);
3883
3884         cancel_work_sync(&adapter->reset_task);
3885         cancel_work_sync(&adapter->watchdog_task);
3886
3887 #ifdef CONFIG_IGB_DCA
3888         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3889                 dev_info(&pdev->dev, "DCA disabled\n");
3890                 dca_remove_requester(&pdev->dev);
3891                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3892                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3893         }
3894 #endif
3895
3896         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3897          * would have already happened in close and is redundant.
3898          */
3899         igb_release_hw_control(adapter);
3900
3901 #ifdef CONFIG_PCI_IOV
3902         igb_disable_sriov(pdev, false);
3903 #endif
3904
3905         unregister_netdev(netdev);
3906
3907         igb_clear_interrupt_scheme(adapter);
3908
3909         pci_iounmap(pdev, adapter->io_addr);
3910         if (hw->flash_address)
3911                 iounmap(hw->flash_address);
3912         pci_release_mem_regions(pdev);
3913
3914         kfree(adapter->mac_table);
3915         kfree(adapter->shadow_vfta);
3916         free_netdev(netdev);
3917
3918         pci_disable_device(pdev);
3919 }
3920
3921 /**
3922  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3923  *  @adapter: board private structure to initialize
3924  *
3925  *  This function initializes the vf specific data storage and then attempts to
3926  *  allocate the VFs.  The reason for ordering it this way is because it is much
3927  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3928  *  the memory for the VFs.
3929  **/
3930 static void igb_probe_vfs(struct igb_adapter *adapter)
3931 {
3932 #ifdef CONFIG_PCI_IOV
3933         struct pci_dev *pdev = adapter->pdev;
3934         struct e1000_hw *hw = &adapter->hw;
3935
3936         /* Virtualization features not supported on i210 family. */
3937         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3938                 return;
3939
3940         /* Of the below we really only want the effect of getting
3941          * IGB_FLAG_HAS_MSIX set (if available), without which
3942          * igb_enable_sriov() has no effect.
3943          */
3944         igb_set_interrupt_capability(adapter, true);
3945         igb_reset_interrupt_capability(adapter);
3946
3947         pci_sriov_set_totalvfs(pdev, 7);
3948         igb_enable_sriov(pdev, max_vfs, false);
3949
3950 #endif /* CONFIG_PCI_IOV */
3951 }
3952
3953 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3954 {
3955         struct e1000_hw *hw = &adapter->hw;
3956         unsigned int max_rss_queues;
3957
3958         /* Determine the maximum number of RSS queues supported. */
3959         switch (hw->mac.type) {
3960         case e1000_i211:
3961                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3962                 break;
3963         case e1000_82575:
3964         case e1000_i210:
3965                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3966                 break;
3967         case e1000_i350:
3968                 /* I350 cannot do RSS and SR-IOV at the same time */
3969                 if (!!adapter->vfs_allocated_count) {
3970                         max_rss_queues = 1;
3971                         break;
3972                 }
3973                 fallthrough;
3974         case e1000_82576:
3975                 if (!!adapter->vfs_allocated_count) {
3976                         max_rss_queues = 2;
3977                         break;
3978                 }
3979                 fallthrough;
3980         case e1000_82580:
3981         case e1000_i354:
3982         default:
3983                 max_rss_queues = IGB_MAX_RX_QUEUES;
3984                 break;
3985         }
3986
3987         return max_rss_queues;
3988 }
3989
3990 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3991 {
3992         u32 max_rss_queues;
3993
3994         max_rss_queues = igb_get_max_rss_queues(adapter);
3995         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3996
3997         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3998 }
3999
4000 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
4001                               const u32 max_rss_queues)
4002 {
4003         struct e1000_hw *hw = &adapter->hw;
4004
4005         /* Determine if we need to pair queues. */
4006         switch (hw->mac.type) {
4007         case e1000_82575:
4008         case e1000_i211:
4009                 /* Device supports enough interrupts without queue pairing. */
4010                 break;
4011         case e1000_82576:
4012         case e1000_82580:
4013         case e1000_i350:
4014         case e1000_i354:
4015         case e1000_i210:
4016         default:
4017                 /* If rss_queues > half of max_rss_queues, pair the queues in
4018                  * order to conserve interrupts due to limited supply.
4019                  */
4020                 if (adapter->rss_queues > (max_rss_queues / 2))
4021                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
4022                 else
4023                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
4024                 break;
4025         }
4026 }
4027
4028 /**
4029  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
4030  *  @adapter: board private structure to initialize
4031  *
4032  *  igb_sw_init initializes the Adapter private data structure.
4033  *  Fields are initialized based on PCI device information and
4034  *  OS network device settings (MTU size).
4035  **/
4036 static int igb_sw_init(struct igb_adapter *adapter)
4037 {
4038         struct e1000_hw *hw = &adapter->hw;
4039         struct net_device *netdev = adapter->netdev;
4040         struct pci_dev *pdev = adapter->pdev;
4041
4042         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
4043
4044         /* set default ring sizes */
4045         adapter->tx_ring_count = IGB_DEFAULT_TXD;
4046         adapter->rx_ring_count = IGB_DEFAULT_RXD;
4047
4048         /* set default ITR values */
4049         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
4050         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
4051
4052         /* set default work limits */
4053         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
4054
4055         adapter->max_frame_size = netdev->mtu + IGB_ETH_PKT_HDR_PAD;
4056         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4057
4058         spin_lock_init(&adapter->nfc_lock);
4059         spin_lock_init(&adapter->stats64_lock);
4060
4061         /* init spinlock to avoid concurrency of VF resources */
4062         spin_lock_init(&adapter->vfs_lock);
4063 #ifdef CONFIG_PCI_IOV
4064         switch (hw->mac.type) {
4065         case e1000_82576:
4066         case e1000_i350:
4067                 if (max_vfs > 7) {
4068                         dev_warn(&pdev->dev,
4069                                  "Maximum of 7 VFs per PF, using max\n");
4070                         max_vfs = adapter->vfs_allocated_count = 7;
4071                 } else
4072                         adapter->vfs_allocated_count = max_vfs;
4073                 if (adapter->vfs_allocated_count)
4074                         dev_warn(&pdev->dev,
4075                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
4076                 break;
4077         default:
4078                 break;
4079         }
4080 #endif /* CONFIG_PCI_IOV */
4081
4082         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
4083         adapter->flags |= IGB_FLAG_HAS_MSIX;
4084
4085         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
4086                                      sizeof(struct igb_mac_addr),
4087                                      GFP_KERNEL);
4088         if (!adapter->mac_table)
4089                 return -ENOMEM;
4090
4091         igb_probe_vfs(adapter);
4092
4093         igb_init_queue_configuration(adapter);
4094
4095         /* Setup and initialize a copy of the hw vlan table array */
4096         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
4097                                        GFP_KERNEL);
4098         if (!adapter->shadow_vfta)
4099                 return -ENOMEM;
4100
4101         /* This call may decrease the number of queues */
4102         if (igb_init_interrupt_scheme(adapter, true)) {
4103                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4104                 return -ENOMEM;
4105         }
4106
4107         /* Explicitly disable IRQ since the NIC can be in any state. */
4108         igb_irq_disable(adapter);
4109
4110         if (hw->mac.type >= e1000_i350)
4111                 adapter->flags &= ~IGB_FLAG_DMAC;
4112
4113         set_bit(__IGB_DOWN, &adapter->state);
4114         return 0;
4115 }
4116
4117 /**
4118  *  __igb_open - Called when a network interface is made active
4119  *  @netdev: network interface device structure
4120  *  @resuming: indicates whether we are in a resume call
4121  *
4122  *  Returns 0 on success, negative value on failure
4123  *
4124  *  The open entry point is called when a network interface is made
4125  *  active by the system (IFF_UP).  At this point all resources needed
4126  *  for transmit and receive operations are allocated, the interrupt
4127  *  handler is registered with the OS, the watchdog timer is started,
4128  *  and the stack is notified that the interface is ready.
4129  **/
4130 static int __igb_open(struct net_device *netdev, bool resuming)
4131 {
4132         struct igb_adapter *adapter = netdev_priv(netdev);
4133         struct e1000_hw *hw = &adapter->hw;
4134         struct pci_dev *pdev = adapter->pdev;
4135         int err;
4136         int i;
4137
4138         /* disallow open during test */
4139         if (test_bit(__IGB_TESTING, &adapter->state)) {
4140                 WARN_ON(resuming);
4141                 return -EBUSY;
4142         }
4143
4144         if (!resuming)
4145                 pm_runtime_get_sync(&pdev->dev);
4146
4147         netif_carrier_off(netdev);
4148
4149         /* allocate transmit descriptors */
4150         err = igb_setup_all_tx_resources(adapter);
4151         if (err)
4152                 goto err_setup_tx;
4153
4154         /* allocate receive descriptors */
4155         err = igb_setup_all_rx_resources(adapter);
4156         if (err)
4157                 goto err_setup_rx;
4158
4159         igb_power_up_link(adapter);
4160
4161         /* before we allocate an interrupt, we must be ready to handle it.
4162          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4163          * as soon as we call pci_request_irq, so we have to setup our
4164          * clean_rx handler before we do so.
4165          */
4166         igb_configure(adapter);
4167
4168         err = igb_request_irq(adapter);
4169         if (err)
4170                 goto err_req_irq;
4171
4172         /* Notify the stack of the actual queue counts. */
4173         err = netif_set_real_num_tx_queues(adapter->netdev,
4174                                            adapter->num_tx_queues);
4175         if (err)
4176                 goto err_set_queues;
4177
4178         err = netif_set_real_num_rx_queues(adapter->netdev,
4179                                            adapter->num_rx_queues);
4180         if (err)
4181                 goto err_set_queues;
4182
4183         /* From here on the code is the same as igb_up() */
4184         clear_bit(__IGB_DOWN, &adapter->state);
4185
4186         for (i = 0; i < adapter->num_q_vectors; i++)
4187                 napi_enable(&(adapter->q_vector[i]->napi));
4188
4189         /* Clear any pending interrupts. */
4190         rd32(E1000_TSICR);
4191         rd32(E1000_ICR);
4192
4193         igb_irq_enable(adapter);
4194
4195         /* notify VFs that reset has been completed */
4196         if (adapter->vfs_allocated_count) {
4197                 u32 reg_data = rd32(E1000_CTRL_EXT);
4198
4199                 reg_data |= E1000_CTRL_EXT_PFRSTD;
4200                 wr32(E1000_CTRL_EXT, reg_data);
4201         }
4202
4203         netif_tx_start_all_queues(netdev);
4204
4205         if (!resuming)
4206                 pm_runtime_put(&pdev->dev);
4207
4208         /* start the watchdog. */
4209         hw->mac.get_link_status = 1;
4210         schedule_work(&adapter->watchdog_task);
4211
4212         return 0;
4213
4214 err_set_queues:
4215         igb_free_irq(adapter);
4216 err_req_irq:
4217         igb_release_hw_control(adapter);
4218         igb_power_down_link(adapter);
4219         igb_free_all_rx_resources(adapter);
4220 err_setup_rx:
4221         igb_free_all_tx_resources(adapter);
4222 err_setup_tx:
4223         igb_reset(adapter);
4224         if (!resuming)
4225                 pm_runtime_put(&pdev->dev);
4226
4227         return err;
4228 }
4229
4230 int igb_open(struct net_device *netdev)
4231 {
4232         return __igb_open(netdev, false);
4233 }
4234
4235 /**
4236  *  __igb_close - Disables a network interface
4237  *  @netdev: network interface device structure
4238  *  @suspending: indicates we are in a suspend call
4239  *
4240  *  Returns 0, this is not allowed to fail
4241  *
4242  *  The close entry point is called when an interface is de-activated
4243  *  by the OS.  The hardware is still under the driver's control, but
4244  *  needs to be disabled.  A global MAC reset is issued to stop the
4245  *  hardware, and all transmit and receive resources are freed.
4246  **/
4247 static int __igb_close(struct net_device *netdev, bool suspending)
4248 {
4249         struct igb_adapter *adapter = netdev_priv(netdev);
4250         struct pci_dev *pdev = adapter->pdev;
4251
4252         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4253
4254         if (!suspending)
4255                 pm_runtime_get_sync(&pdev->dev);
4256
4257         igb_down(adapter);
4258         igb_free_irq(adapter);
4259
4260         igb_free_all_tx_resources(adapter);
4261         igb_free_all_rx_resources(adapter);
4262
4263         if (!suspending)
4264                 pm_runtime_put_sync(&pdev->dev);
4265         return 0;
4266 }
4267
4268 int igb_close(struct net_device *netdev)
4269 {
4270         if (netif_device_present(netdev) || netdev->dismantle)
4271                 return __igb_close(netdev, false);
4272         return 0;
4273 }
4274
4275 /**
4276  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4277  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4278  *
4279  *  Return 0 on success, negative on failure
4280  **/
4281 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4282 {
4283         struct device *dev = tx_ring->dev;
4284         int size;
4285
4286         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4287
4288         tx_ring->tx_buffer_info = vmalloc(size);
4289         if (!tx_ring->tx_buffer_info)
4290                 goto err;
4291
4292         /* round up to nearest 4K */
4293         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4294         tx_ring->size = ALIGN(tx_ring->size, 4096);
4295
4296         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4297                                            &tx_ring->dma, GFP_KERNEL);
4298         if (!tx_ring->desc)
4299                 goto err;
4300
4301         tx_ring->next_to_use = 0;
4302         tx_ring->next_to_clean = 0;
4303
4304         return 0;
4305
4306 err:
4307         vfree(tx_ring->tx_buffer_info);
4308         tx_ring->tx_buffer_info = NULL;
4309         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4310         return -ENOMEM;
4311 }
4312
4313 /**
4314  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4315  *                               (Descriptors) for all queues
4316  *  @adapter: board private structure
4317  *
4318  *  Return 0 on success, negative on failure
4319  **/
4320 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4321 {
4322         struct pci_dev *pdev = adapter->pdev;
4323         int i, err = 0;
4324
4325         for (i = 0; i < adapter->num_tx_queues; i++) {
4326                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4327                 if (err) {
4328                         dev_err(&pdev->dev,
4329                                 "Allocation for Tx Queue %u failed\n", i);
4330                         for (i--; i >= 0; i--)
4331                                 igb_free_tx_resources(adapter->tx_ring[i]);
4332                         break;
4333                 }
4334         }
4335
4336         return err;
4337 }
4338
4339 /**
4340  *  igb_setup_tctl - configure the transmit control registers
4341  *  @adapter: Board private structure
4342  **/
4343 void igb_setup_tctl(struct igb_adapter *adapter)
4344 {
4345         struct e1000_hw *hw = &adapter->hw;
4346         u32 tctl;
4347
4348         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4349         wr32(E1000_TXDCTL(0), 0);
4350
4351         /* Program the Transmit Control Register */
4352         tctl = rd32(E1000_TCTL);
4353         tctl &= ~E1000_TCTL_CT;
4354         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4355                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4356
4357         igb_config_collision_dist(hw);
4358
4359         /* Enable transmits */
4360         tctl |= E1000_TCTL_EN;
4361
4362         wr32(E1000_TCTL, tctl);
4363 }
4364
4365 /**
4366  *  igb_configure_tx_ring - Configure transmit ring after Reset
4367  *  @adapter: board private structure
4368  *  @ring: tx ring to configure
4369  *
4370  *  Configure a transmit ring after a reset.
4371  **/
4372 void igb_configure_tx_ring(struct igb_adapter *adapter,
4373                            struct igb_ring *ring)
4374 {
4375         struct e1000_hw *hw = &adapter->hw;
4376         u32 txdctl = 0;
4377         u64 tdba = ring->dma;
4378         int reg_idx = ring->reg_idx;
4379
4380         wr32(E1000_TDLEN(reg_idx),
4381              ring->count * sizeof(union e1000_adv_tx_desc));
4382         wr32(E1000_TDBAL(reg_idx),
4383              tdba & 0x00000000ffffffffULL);
4384         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4385
4386         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4387         wr32(E1000_TDH(reg_idx), 0);
4388         writel(0, ring->tail);
4389
4390         txdctl |= IGB_TX_PTHRESH;
4391         txdctl |= IGB_TX_HTHRESH << 8;
4392         txdctl |= IGB_TX_WTHRESH << 16;
4393
4394         /* reinitialize tx_buffer_info */
4395         memset(ring->tx_buffer_info, 0,
4396                sizeof(struct igb_tx_buffer) * ring->count);
4397
4398         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4399         wr32(E1000_TXDCTL(reg_idx), txdctl);
4400 }
4401
4402 /**
4403  *  igb_configure_tx - Configure transmit Unit after Reset
4404  *  @adapter: board private structure
4405  *
4406  *  Configure the Tx unit of the MAC after a reset.
4407  **/
4408 static void igb_configure_tx(struct igb_adapter *adapter)
4409 {
4410         struct e1000_hw *hw = &adapter->hw;
4411         int i;
4412
4413         /* disable the queues */
4414         for (i = 0; i < adapter->num_tx_queues; i++)
4415                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4416
4417         wrfl();
4418         usleep_range(10000, 20000);
4419
4420         for (i = 0; i < adapter->num_tx_queues; i++)
4421                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4422 }
4423
4424 /**
4425  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4426  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4427  *
4428  *  Returns 0 on success, negative on failure
4429  **/
4430 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4431 {
4432         struct igb_adapter *adapter = netdev_priv(rx_ring->netdev);
4433         struct device *dev = rx_ring->dev;
4434         int size, res;
4435
4436         /* XDP RX-queue info */
4437         if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
4438                 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4439         res = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
4440                                rx_ring->queue_index, 0);
4441         if (res < 0) {
4442                 dev_err(dev, "Failed to register xdp_rxq index %u\n",
4443                         rx_ring->queue_index);
4444                 return res;
4445         }
4446
4447         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4448
4449         rx_ring->rx_buffer_info = vmalloc(size);
4450         if (!rx_ring->rx_buffer_info)
4451                 goto err;
4452
4453         /* Round up to nearest 4K */
4454         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4455         rx_ring->size = ALIGN(rx_ring->size, 4096);
4456
4457         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4458                                            &rx_ring->dma, GFP_KERNEL);
4459         if (!rx_ring->desc)
4460                 goto err;
4461
4462         rx_ring->next_to_alloc = 0;
4463         rx_ring->next_to_clean = 0;
4464         rx_ring->next_to_use = 0;
4465
4466         rx_ring->xdp_prog = adapter->xdp_prog;
4467
4468         return 0;
4469
4470 err:
4471         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4472         vfree(rx_ring->rx_buffer_info);
4473         rx_ring->rx_buffer_info = NULL;
4474         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4475         return -ENOMEM;
4476 }
4477
4478 /**
4479  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4480  *                               (Descriptors) for all queues
4481  *  @adapter: board private structure
4482  *
4483  *  Return 0 on success, negative on failure
4484  **/
4485 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4486 {
4487         struct pci_dev *pdev = adapter->pdev;
4488         int i, err = 0;
4489
4490         for (i = 0; i < adapter->num_rx_queues; i++) {
4491                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4492                 if (err) {
4493                         dev_err(&pdev->dev,
4494                                 "Allocation for Rx Queue %u failed\n", i);
4495                         for (i--; i >= 0; i--)
4496                                 igb_free_rx_resources(adapter->rx_ring[i]);
4497                         break;
4498                 }
4499         }
4500
4501         return err;
4502 }
4503
4504 /**
4505  *  igb_setup_mrqc - configure the multiple receive queue control registers
4506  *  @adapter: Board private structure
4507  **/
4508 static void igb_setup_mrqc(struct igb_adapter *adapter)
4509 {
4510         struct e1000_hw *hw = &adapter->hw;
4511         u32 mrqc, rxcsum;
4512         u32 j, num_rx_queues;
4513         u32 rss_key[10];
4514
4515         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4516         for (j = 0; j < 10; j++)
4517                 wr32(E1000_RSSRK(j), rss_key[j]);
4518
4519         num_rx_queues = adapter->rss_queues;
4520
4521         switch (hw->mac.type) {
4522         case e1000_82576:
4523                 /* 82576 supports 2 RSS queues for SR-IOV */
4524                 if (adapter->vfs_allocated_count)
4525                         num_rx_queues = 2;
4526                 break;
4527         default:
4528                 break;
4529         }
4530
4531         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4532                 for (j = 0; j < IGB_RETA_SIZE; j++)
4533                         adapter->rss_indir_tbl[j] =
4534                         (j * num_rx_queues) / IGB_RETA_SIZE;
4535                 adapter->rss_indir_tbl_init = num_rx_queues;
4536         }
4537         igb_write_rss_indir_tbl(adapter);
4538
4539         /* Disable raw packet checksumming so that RSS hash is placed in
4540          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4541          * offloads as they are enabled by default
4542          */
4543         rxcsum = rd32(E1000_RXCSUM);
4544         rxcsum |= E1000_RXCSUM_PCSD;
4545
4546         if (adapter->hw.mac.type >= e1000_82576)
4547                 /* Enable Receive Checksum Offload for SCTP */
4548                 rxcsum |= E1000_RXCSUM_CRCOFL;
4549
4550         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4551         wr32(E1000_RXCSUM, rxcsum);
4552
4553         /* Generate RSS hash based on packet types, TCP/UDP
4554          * port numbers and/or IPv4/v6 src and dst addresses
4555          */
4556         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4557                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4558                E1000_MRQC_RSS_FIELD_IPV6 |
4559                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4560                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4561
4562         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4563                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4564         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4565                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4566
4567         /* If VMDq is enabled then we set the appropriate mode for that, else
4568          * we default to RSS so that an RSS hash is calculated per packet even
4569          * if we are only using one queue
4570          */
4571         if (adapter->vfs_allocated_count) {
4572                 if (hw->mac.type > e1000_82575) {
4573                         /* Set the default pool for the PF's first queue */
4574                         u32 vtctl = rd32(E1000_VT_CTL);
4575
4576                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4577                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4578                         vtctl |= adapter->vfs_allocated_count <<
4579                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4580                         wr32(E1000_VT_CTL, vtctl);
4581                 }
4582                 if (adapter->rss_queues > 1)
4583                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4584                 else
4585                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4586         } else {
4587                 mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4588         }
4589         igb_vmm_control(adapter);
4590
4591         wr32(E1000_MRQC, mrqc);
4592 }
4593
4594 /**
4595  *  igb_setup_rctl - configure the receive control registers
4596  *  @adapter: Board private structure
4597  **/
4598 void igb_setup_rctl(struct igb_adapter *adapter)
4599 {
4600         struct e1000_hw *hw = &adapter->hw;
4601         u32 rctl;
4602
4603         rctl = rd32(E1000_RCTL);
4604
4605         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4606         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4607
4608         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4609                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4610
4611         /* enable stripping of CRC. It's unlikely this will break BMC
4612          * redirection as it did with e1000. Newer features require
4613          * that the HW strips the CRC.
4614          */
4615         rctl |= E1000_RCTL_SECRC;
4616
4617         /* disable store bad packets and clear size bits. */
4618         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4619
4620         /* enable LPE to allow for reception of jumbo frames */
4621         rctl |= E1000_RCTL_LPE;
4622
4623         /* disable queue 0 to prevent tail write w/o re-config */
4624         wr32(E1000_RXDCTL(0), 0);
4625
4626         /* Attention!!!  For SR-IOV PF driver operations you must enable
4627          * queue drop for all VF and PF queues to prevent head of line blocking
4628          * if an un-trusted VF does not provide descriptors to hardware.
4629          */
4630         if (adapter->vfs_allocated_count) {
4631                 /* set all queue drop enable bits */
4632                 wr32(E1000_QDE, ALL_QUEUES);
4633         }
4634
4635         /* This is useful for sniffing bad packets. */
4636         if (adapter->netdev->features & NETIF_F_RXALL) {
4637                 /* UPE and MPE will be handled by normal PROMISC logic
4638                  * in e1000e_set_rx_mode
4639                  */
4640                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4641                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4642                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4643
4644                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4645                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4646                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4647                  * and that breaks VLANs.
4648                  */
4649         }
4650
4651         wr32(E1000_RCTL, rctl);
4652 }
4653
4654 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4655                                    int vfn)
4656 {
4657         struct e1000_hw *hw = &adapter->hw;
4658         u32 vmolr;
4659
4660         if (size > MAX_JUMBO_FRAME_SIZE)
4661                 size = MAX_JUMBO_FRAME_SIZE;
4662
4663         vmolr = rd32(E1000_VMOLR(vfn));
4664         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4665         vmolr |= size | E1000_VMOLR_LPE;
4666         wr32(E1000_VMOLR(vfn), vmolr);
4667
4668         return 0;
4669 }
4670
4671 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4672                                          int vfn, bool enable)
4673 {
4674         struct e1000_hw *hw = &adapter->hw;
4675         u32 val, reg;
4676
4677         if (hw->mac.type < e1000_82576)
4678                 return;
4679
4680         if (hw->mac.type == e1000_i350)
4681                 reg = E1000_DVMOLR(vfn);
4682         else
4683                 reg = E1000_VMOLR(vfn);
4684
4685         val = rd32(reg);
4686         if (enable)
4687                 val |= E1000_VMOLR_STRVLAN;
4688         else
4689                 val &= ~(E1000_VMOLR_STRVLAN);
4690         wr32(reg, val);
4691 }
4692
4693 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4694                                  int vfn, bool aupe)
4695 {
4696         struct e1000_hw *hw = &adapter->hw;
4697         u32 vmolr;
4698
4699         /* This register exists only on 82576 and newer so if we are older then
4700          * we should exit and do nothing
4701          */
4702         if (hw->mac.type < e1000_82576)
4703                 return;
4704
4705         vmolr = rd32(E1000_VMOLR(vfn));
4706         if (aupe)
4707                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4708         else
4709                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4710
4711         /* clear all bits that might not be set */
4712         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4713
4714         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4715                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4716         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4717          * multicast packets
4718          */
4719         if (vfn <= adapter->vfs_allocated_count)
4720                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4721
4722         wr32(E1000_VMOLR(vfn), vmolr);
4723 }
4724
4725 /**
4726  *  igb_setup_srrctl - configure the split and replication receive control
4727  *                     registers
4728  *  @adapter: Board private structure
4729  *  @ring: receive ring to be configured
4730  **/
4731 void igb_setup_srrctl(struct igb_adapter *adapter, struct igb_ring *ring)
4732 {
4733         struct e1000_hw *hw = &adapter->hw;
4734         int reg_idx = ring->reg_idx;
4735         u32 srrctl = 0;
4736
4737         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4738         if (ring_uses_large_buffer(ring))
4739                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4740         else
4741                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4742         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4743         if (hw->mac.type >= e1000_82580)
4744                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4745         /* Only set Drop Enable if VFs allocated, or we are supporting multiple
4746          * queues and rx flow control is disabled
4747          */
4748         if (adapter->vfs_allocated_count ||
4749             (!(hw->fc.current_mode & e1000_fc_rx_pause) &&
4750              adapter->num_rx_queues > 1))
4751                 srrctl |= E1000_SRRCTL_DROP_EN;
4752
4753         wr32(E1000_SRRCTL(reg_idx), srrctl);
4754 }
4755
4756 /**
4757  *  igb_configure_rx_ring - Configure a receive ring after Reset
4758  *  @adapter: board private structure
4759  *  @ring: receive ring to be configured
4760  *
4761  *  Configure the Rx unit of the MAC after a reset.
4762  **/
4763 void igb_configure_rx_ring(struct igb_adapter *adapter,
4764                            struct igb_ring *ring)
4765 {
4766         struct e1000_hw *hw = &adapter->hw;
4767         union e1000_adv_rx_desc *rx_desc;
4768         u64 rdba = ring->dma;
4769         int reg_idx = ring->reg_idx;
4770         u32 rxdctl = 0;
4771
4772         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4773         WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4774                                            MEM_TYPE_PAGE_SHARED, NULL));
4775
4776         /* disable the queue */
4777         wr32(E1000_RXDCTL(reg_idx), 0);
4778
4779         /* Set DMA base address registers */
4780         wr32(E1000_RDBAL(reg_idx),
4781              rdba & 0x00000000ffffffffULL);
4782         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4783         wr32(E1000_RDLEN(reg_idx),
4784              ring->count * sizeof(union e1000_adv_rx_desc));
4785
4786         /* initialize head and tail */
4787         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4788         wr32(E1000_RDH(reg_idx), 0);
4789         writel(0, ring->tail);
4790
4791         /* set descriptor configuration */
4792         igb_setup_srrctl(adapter, ring);
4793
4794         /* set filtering for VMDQ pools */
4795         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4796
4797         rxdctl |= IGB_RX_PTHRESH;
4798         rxdctl |= IGB_RX_HTHRESH << 8;
4799         rxdctl |= IGB_RX_WTHRESH << 16;
4800
4801         /* initialize rx_buffer_info */
4802         memset(ring->rx_buffer_info, 0,
4803                sizeof(struct igb_rx_buffer) * ring->count);
4804
4805         /* initialize Rx descriptor 0 */
4806         rx_desc = IGB_RX_DESC(ring, 0);
4807         rx_desc->wb.upper.length = 0;
4808
4809         /* enable receive descriptor fetching */
4810         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4811         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4812 }
4813
4814 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4815                                   struct igb_ring *rx_ring)
4816 {
4817 #if (PAGE_SIZE < 8192)
4818         struct e1000_hw *hw = &adapter->hw;
4819 #endif
4820
4821         /* set build_skb and buffer size flags */
4822         clear_ring_build_skb_enabled(rx_ring);
4823         clear_ring_uses_large_buffer(rx_ring);
4824
4825         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4826                 return;
4827
4828         set_ring_build_skb_enabled(rx_ring);
4829
4830 #if (PAGE_SIZE < 8192)
4831         if (adapter->max_frame_size > IGB_MAX_FRAME_BUILD_SKB ||
4832             rd32(E1000_RCTL) & E1000_RCTL_SBP)
4833                 set_ring_uses_large_buffer(rx_ring);
4834 #endif
4835 }
4836
4837 /**
4838  *  igb_configure_rx - Configure receive Unit after Reset
4839  *  @adapter: board private structure
4840  *
4841  *  Configure the Rx unit of the MAC after a reset.
4842  **/
4843 static void igb_configure_rx(struct igb_adapter *adapter)
4844 {
4845         int i;
4846
4847         /* set the correct pool for the PF default MAC address in entry 0 */
4848         igb_set_default_mac_filter(adapter);
4849
4850         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4851          * the Base and Length of the Rx Descriptor Ring
4852          */
4853         for (i = 0; i < adapter->num_rx_queues; i++) {
4854                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4855
4856                 igb_set_rx_buffer_len(adapter, rx_ring);
4857                 igb_configure_rx_ring(adapter, rx_ring);
4858         }
4859 }
4860
4861 /**
4862  *  igb_free_tx_resources - Free Tx Resources per Queue
4863  *  @tx_ring: Tx descriptor ring for a specific queue
4864  *
4865  *  Free all transmit software resources
4866  **/
4867 void igb_free_tx_resources(struct igb_ring *tx_ring)
4868 {
4869         igb_clean_tx_ring(tx_ring);
4870
4871         vfree(tx_ring->tx_buffer_info);
4872         tx_ring->tx_buffer_info = NULL;
4873
4874         /* if not set, then don't free */
4875         if (!tx_ring->desc)
4876                 return;
4877
4878         dma_free_coherent(tx_ring->dev, tx_ring->size,
4879                           tx_ring->desc, tx_ring->dma);
4880
4881         tx_ring->desc = NULL;
4882 }
4883
4884 /**
4885  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4886  *  @adapter: board private structure
4887  *
4888  *  Free all transmit software resources
4889  **/
4890 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4891 {
4892         int i;
4893
4894         for (i = 0; i < adapter->num_tx_queues; i++)
4895                 if (adapter->tx_ring[i])
4896                         igb_free_tx_resources(adapter->tx_ring[i]);
4897 }
4898
4899 /**
4900  *  igb_clean_tx_ring - Free Tx Buffers
4901  *  @tx_ring: ring to be cleaned
4902  **/
4903 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4904 {
4905         u16 i = tx_ring->next_to_clean;
4906         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4907
4908         while (i != tx_ring->next_to_use) {
4909                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4910
4911                 /* Free all the Tx ring sk_buffs or xdp frames */
4912                 if (tx_buffer->type == IGB_TYPE_SKB)
4913                         dev_kfree_skb_any(tx_buffer->skb);
4914                 else
4915                         xdp_return_frame(tx_buffer->xdpf);
4916
4917                 /* unmap skb header data */
4918                 dma_unmap_single(tx_ring->dev,
4919                                  dma_unmap_addr(tx_buffer, dma),
4920                                  dma_unmap_len(tx_buffer, len),
4921                                  DMA_TO_DEVICE);
4922
4923                 /* check for eop_desc to determine the end of the packet */
4924                 eop_desc = tx_buffer->next_to_watch;
4925                 tx_desc = IGB_TX_DESC(tx_ring, i);
4926
4927                 /* unmap remaining buffers */
4928                 while (tx_desc != eop_desc) {
4929                         tx_buffer++;
4930                         tx_desc++;
4931                         i++;
4932                         if (unlikely(i == tx_ring->count)) {
4933                                 i = 0;
4934                                 tx_buffer = tx_ring->tx_buffer_info;
4935                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4936                         }
4937
4938                         /* unmap any remaining paged data */
4939                         if (dma_unmap_len(tx_buffer, len))
4940                                 dma_unmap_page(tx_ring->dev,
4941                                                dma_unmap_addr(tx_buffer, dma),
4942                                                dma_unmap_len(tx_buffer, len),
4943                                                DMA_TO_DEVICE);
4944                 }
4945
4946                 tx_buffer->next_to_watch = NULL;
4947
4948                 /* move us one more past the eop_desc for start of next pkt */
4949                 tx_buffer++;
4950                 i++;
4951                 if (unlikely(i == tx_ring->count)) {
4952                         i = 0;
4953                         tx_buffer = tx_ring->tx_buffer_info;
4954                 }
4955         }
4956
4957         /* reset BQL for queue */
4958         netdev_tx_reset_queue(txring_txq(tx_ring));
4959
4960         /* reset next_to_use and next_to_clean */
4961         tx_ring->next_to_use = 0;
4962         tx_ring->next_to_clean = 0;
4963 }
4964
4965 /**
4966  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4967  *  @adapter: board private structure
4968  **/
4969 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4970 {
4971         int i;
4972
4973         for (i = 0; i < adapter->num_tx_queues; i++)
4974                 if (adapter->tx_ring[i])
4975                         igb_clean_tx_ring(adapter->tx_ring[i]);
4976 }
4977
4978 /**
4979  *  igb_free_rx_resources - Free Rx Resources
4980  *  @rx_ring: ring to clean the resources from
4981  *
4982  *  Free all receive software resources
4983  **/
4984 void igb_free_rx_resources(struct igb_ring *rx_ring)
4985 {
4986         igb_clean_rx_ring(rx_ring);
4987
4988         rx_ring->xdp_prog = NULL;
4989         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4990         vfree(rx_ring->rx_buffer_info);
4991         rx_ring->rx_buffer_info = NULL;
4992
4993         /* if not set, then don't free */
4994         if (!rx_ring->desc)
4995                 return;
4996
4997         dma_free_coherent(rx_ring->dev, rx_ring->size,
4998                           rx_ring->desc, rx_ring->dma);
4999
5000         rx_ring->desc = NULL;
5001 }
5002
5003 /**
5004  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
5005  *  @adapter: board private structure
5006  *
5007  *  Free all receive software resources
5008  **/
5009 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
5010 {
5011         int i;
5012
5013         for (i = 0; i < adapter->num_rx_queues; i++)
5014                 if (adapter->rx_ring[i])
5015                         igb_free_rx_resources(adapter->rx_ring[i]);
5016 }
5017
5018 /**
5019  *  igb_clean_rx_ring - Free Rx Buffers per Queue
5020  *  @rx_ring: ring to free buffers from
5021  **/
5022 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
5023 {
5024         u16 i = rx_ring->next_to_clean;
5025
5026         dev_kfree_skb(rx_ring->skb);
5027         rx_ring->skb = NULL;
5028
5029         /* Free all the Rx ring sk_buffs */
5030         while (i != rx_ring->next_to_alloc) {
5031                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
5032
5033                 /* Invalidate cache lines that may have been written to by
5034                  * device so that we avoid corrupting memory.
5035                  */
5036                 dma_sync_single_range_for_cpu(rx_ring->dev,
5037                                               buffer_info->dma,
5038                                               buffer_info->page_offset,
5039                                               igb_rx_bufsz(rx_ring),
5040                                               DMA_FROM_DEVICE);
5041
5042                 /* free resources associated with mapping */
5043                 dma_unmap_page_attrs(rx_ring->dev,
5044                                      buffer_info->dma,
5045                                      igb_rx_pg_size(rx_ring),
5046                                      DMA_FROM_DEVICE,
5047                                      IGB_RX_DMA_ATTR);
5048                 __page_frag_cache_drain(buffer_info->page,
5049                                         buffer_info->pagecnt_bias);
5050
5051                 i++;
5052                 if (i == rx_ring->count)
5053                         i = 0;
5054         }
5055
5056         rx_ring->next_to_alloc = 0;
5057         rx_ring->next_to_clean = 0;
5058         rx_ring->next_to_use = 0;
5059 }
5060
5061 /**
5062  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
5063  *  @adapter: board private structure
5064  **/
5065 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
5066 {
5067         int i;
5068
5069         for (i = 0; i < adapter->num_rx_queues; i++)
5070                 if (adapter->rx_ring[i])
5071                         igb_clean_rx_ring(adapter->rx_ring[i]);
5072 }
5073
5074 /**
5075  *  igb_set_mac - Change the Ethernet Address of the NIC
5076  *  @netdev: network interface device structure
5077  *  @p: pointer to an address structure
5078  *
5079  *  Returns 0 on success, negative on failure
5080  **/
5081 static int igb_set_mac(struct net_device *netdev, void *p)
5082 {
5083         struct igb_adapter *adapter = netdev_priv(netdev);
5084         struct e1000_hw *hw = &adapter->hw;
5085         struct sockaddr *addr = p;
5086
5087         if (!is_valid_ether_addr(addr->sa_data))
5088                 return -EADDRNOTAVAIL;
5089
5090         eth_hw_addr_set(netdev, addr->sa_data);
5091         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
5092
5093         /* set the correct pool for the new PF MAC address in entry 0 */
5094         igb_set_default_mac_filter(adapter);
5095
5096         return 0;
5097 }
5098
5099 /**
5100  *  igb_write_mc_addr_list - write multicast addresses to MTA
5101  *  @netdev: network interface device structure
5102  *
5103  *  Writes multicast address list to the MTA hash table.
5104  *  Returns: -ENOMEM on failure
5105  *           0 on no addresses written
5106  *           X on writing X addresses to MTA
5107  **/
5108 static int igb_write_mc_addr_list(struct net_device *netdev)
5109 {
5110         struct igb_adapter *adapter = netdev_priv(netdev);
5111         struct e1000_hw *hw = &adapter->hw;
5112         struct netdev_hw_addr *ha;
5113         u8  *mta_list;
5114         int i;
5115
5116         if (netdev_mc_empty(netdev)) {
5117                 /* nothing to program, so clear mc list */
5118                 igb_update_mc_addr_list(hw, NULL, 0);
5119                 igb_restore_vf_multicasts(adapter);
5120                 return 0;
5121         }
5122
5123         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
5124         if (!mta_list)
5125                 return -ENOMEM;
5126
5127         /* The shared function expects a packed array of only addresses. */
5128         i = 0;
5129         netdev_for_each_mc_addr(ha, netdev)
5130                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
5131
5132         igb_update_mc_addr_list(hw, mta_list, i);
5133         kfree(mta_list);
5134
5135         return netdev_mc_count(netdev);
5136 }
5137
5138 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
5139 {
5140         struct e1000_hw *hw = &adapter->hw;
5141         u32 i, pf_id;
5142
5143         switch (hw->mac.type) {
5144         case e1000_i210:
5145         case e1000_i211:
5146         case e1000_i350:
5147                 /* VLAN filtering needed for VLAN prio filter */
5148                 if (adapter->netdev->features & NETIF_F_NTUPLE)
5149                         break;
5150                 fallthrough;
5151         case e1000_82576:
5152         case e1000_82580:
5153         case e1000_i354:
5154                 /* VLAN filtering needed for pool filtering */
5155                 if (adapter->vfs_allocated_count)
5156                         break;
5157                 fallthrough;
5158         default:
5159                 return 1;
5160         }
5161
5162         /* We are already in VLAN promisc, nothing to do */
5163         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
5164                 return 0;
5165
5166         if (!adapter->vfs_allocated_count)
5167                 goto set_vfta;
5168
5169         /* Add PF to all active pools */
5170         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5171
5172         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5173                 u32 vlvf = rd32(E1000_VLVF(i));
5174
5175                 vlvf |= BIT(pf_id);
5176                 wr32(E1000_VLVF(i), vlvf);
5177         }
5178
5179 set_vfta:
5180         /* Set all bits in the VLAN filter table array */
5181         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
5182                 hw->mac.ops.write_vfta(hw, i, ~0U);
5183
5184         /* Set flag so we don't redo unnecessary work */
5185         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
5186
5187         return 0;
5188 }
5189
5190 #define VFTA_BLOCK_SIZE 8
5191 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
5192 {
5193         struct e1000_hw *hw = &adapter->hw;
5194         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
5195         u32 vid_start = vfta_offset * 32;
5196         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
5197         u32 i, vid, word, bits, pf_id;
5198
5199         /* guarantee that we don't scrub out management VLAN */
5200         vid = adapter->mng_vlan_id;
5201         if (vid >= vid_start && vid < vid_end)
5202                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5203
5204         if (!adapter->vfs_allocated_count)
5205                 goto set_vfta;
5206
5207         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5208
5209         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5210                 u32 vlvf = rd32(E1000_VLVF(i));
5211
5212                 /* pull VLAN ID from VLVF */
5213                 vid = vlvf & VLAN_VID_MASK;
5214
5215                 /* only concern ourselves with a certain range */
5216                 if (vid < vid_start || vid >= vid_end)
5217                         continue;
5218
5219                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
5220                         /* record VLAN ID in VFTA */
5221                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5222
5223                         /* if PF is part of this then continue */
5224                         if (test_bit(vid, adapter->active_vlans))
5225                                 continue;
5226                 }
5227
5228                 /* remove PF from the pool */
5229                 bits = ~BIT(pf_id);
5230                 bits &= rd32(E1000_VLVF(i));
5231                 wr32(E1000_VLVF(i), bits);
5232         }
5233
5234 set_vfta:
5235         /* extract values from active_vlans and write back to VFTA */
5236         for (i = VFTA_BLOCK_SIZE; i--;) {
5237                 vid = (vfta_offset + i) * 32;
5238                 word = vid / BITS_PER_LONG;
5239                 bits = vid % BITS_PER_LONG;
5240
5241                 vfta[i] |= adapter->active_vlans[word] >> bits;
5242
5243                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
5244         }
5245 }
5246
5247 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
5248 {
5249         u32 i;
5250
5251         /* We are not in VLAN promisc, nothing to do */
5252         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
5253                 return;
5254
5255         /* Set flag so we don't redo unnecessary work */
5256         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
5257
5258         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
5259                 igb_scrub_vfta(adapter, i);
5260 }
5261
5262 /**
5263  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
5264  *  @netdev: network interface device structure
5265  *
5266  *  The set_rx_mode entry point is called whenever the unicast or multicast
5267  *  address lists or the network interface flags are updated.  This routine is
5268  *  responsible for configuring the hardware for proper unicast, multicast,
5269  *  promiscuous mode, and all-multi behavior.
5270  **/
5271 static void igb_set_rx_mode(struct net_device *netdev)
5272 {
5273         struct igb_adapter *adapter = netdev_priv(netdev);
5274         struct e1000_hw *hw = &adapter->hw;
5275         unsigned int vfn = adapter->vfs_allocated_count;
5276         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5277         int count;
5278
5279         /* Check for Promiscuous and All Multicast modes */
5280         if (netdev->flags & IFF_PROMISC) {
5281                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5282                 vmolr |= E1000_VMOLR_MPME;
5283
5284                 /* enable use of UTA filter to force packets to default pool */
5285                 if (hw->mac.type == e1000_82576)
5286                         vmolr |= E1000_VMOLR_ROPE;
5287         } else {
5288                 if (netdev->flags & IFF_ALLMULTI) {
5289                         rctl |= E1000_RCTL_MPE;
5290                         vmolr |= E1000_VMOLR_MPME;
5291                 } else {
5292                         /* Write addresses to the MTA, if the attempt fails
5293                          * then we should just turn on promiscuous mode so
5294                          * that we can at least receive multicast traffic
5295                          */
5296                         count = igb_write_mc_addr_list(netdev);
5297                         if (count < 0) {
5298                                 rctl |= E1000_RCTL_MPE;
5299                                 vmolr |= E1000_VMOLR_MPME;
5300                         } else if (count) {
5301                                 vmolr |= E1000_VMOLR_ROMPE;
5302                         }
5303                 }
5304         }
5305
5306         /* Write addresses to available RAR registers, if there is not
5307          * sufficient space to store all the addresses then enable
5308          * unicast promiscuous mode
5309          */
5310         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5311                 rctl |= E1000_RCTL_UPE;
5312                 vmolr |= E1000_VMOLR_ROPE;
5313         }
5314
5315         /* enable VLAN filtering by default */
5316         rctl |= E1000_RCTL_VFE;
5317
5318         /* disable VLAN filtering for modes that require it */
5319         if ((netdev->flags & IFF_PROMISC) ||
5320             (netdev->features & NETIF_F_RXALL)) {
5321                 /* if we fail to set all rules then just clear VFE */
5322                 if (igb_vlan_promisc_enable(adapter))
5323                         rctl &= ~E1000_RCTL_VFE;
5324         } else {
5325                 igb_vlan_promisc_disable(adapter);
5326         }
5327
5328         /* update state of unicast, multicast, and VLAN filtering modes */
5329         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5330                                      E1000_RCTL_VFE);
5331         wr32(E1000_RCTL, rctl);
5332
5333 #if (PAGE_SIZE < 8192)
5334         if (!adapter->vfs_allocated_count) {
5335                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5336                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5337         }
5338 #endif
5339         wr32(E1000_RLPML, rlpml);
5340
5341         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5342          * the VMOLR to enable the appropriate modes.  Without this workaround
5343          * we will have issues with VLAN tag stripping not being done for frames
5344          * that are only arriving because we are the default pool
5345          */
5346         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5347                 return;
5348
5349         /* set UTA to appropriate mode */
5350         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5351
5352         vmolr |= rd32(E1000_VMOLR(vfn)) &
5353                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5354
5355         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5356         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5357 #if (PAGE_SIZE < 8192)
5358         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5359                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5360         else
5361 #endif
5362                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5363         vmolr |= E1000_VMOLR_LPE;
5364
5365         wr32(E1000_VMOLR(vfn), vmolr);
5366
5367         igb_restore_vf_multicasts(adapter);
5368 }
5369
5370 static void igb_check_wvbr(struct igb_adapter *adapter)
5371 {
5372         struct e1000_hw *hw = &adapter->hw;
5373         u32 wvbr = 0;
5374
5375         switch (hw->mac.type) {
5376         case e1000_82576:
5377         case e1000_i350:
5378                 wvbr = rd32(E1000_WVBR);
5379                 if (!wvbr)
5380                         return;
5381                 break;
5382         default:
5383                 break;
5384         }
5385
5386         adapter->wvbr |= wvbr;
5387 }
5388
5389 #define IGB_STAGGERED_QUEUE_OFFSET 8
5390
5391 static void igb_spoof_check(struct igb_adapter *adapter)
5392 {
5393         int j;
5394
5395         if (!adapter->wvbr)
5396                 return;
5397
5398         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5399                 if (adapter->wvbr & BIT(j) ||
5400                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5401                         dev_warn(&adapter->pdev->dev,
5402                                 "Spoof event(s) detected on VF %d\n", j);
5403                         adapter->wvbr &=
5404                                 ~(BIT(j) |
5405                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5406                 }
5407         }
5408 }
5409
5410 /* Need to wait a few seconds after link up to get diagnostic information from
5411  * the phy
5412  */
5413 static void igb_update_phy_info(struct timer_list *t)
5414 {
5415         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5416         igb_get_phy_info(&adapter->hw);
5417 }
5418
5419 /**
5420  *  igb_has_link - check shared code for link and determine up/down
5421  *  @adapter: pointer to driver private info
5422  **/
5423 bool igb_has_link(struct igb_adapter *adapter)
5424 {
5425         struct e1000_hw *hw = &adapter->hw;
5426         bool link_active = false;
5427
5428         /* get_link_status is set on LSC (link status) interrupt or
5429          * rx sequence error interrupt.  get_link_status will stay
5430          * false until the e1000_check_for_link establishes link
5431          * for copper adapters ONLY
5432          */
5433         switch (hw->phy.media_type) {
5434         case e1000_media_type_copper:
5435                 if (!hw->mac.get_link_status)
5436                         return true;
5437                 fallthrough;
5438         case e1000_media_type_internal_serdes:
5439                 hw->mac.ops.check_for_link(hw);
5440                 link_active = !hw->mac.get_link_status;
5441                 break;
5442         default:
5443         case e1000_media_type_unknown:
5444                 break;
5445         }
5446
5447         if (((hw->mac.type == e1000_i210) ||
5448              (hw->mac.type == e1000_i211)) &&
5449              (hw->phy.id == I210_I_PHY_ID)) {
5450                 if (!netif_carrier_ok(adapter->netdev)) {
5451                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5452                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5453                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5454                         adapter->link_check_timeout = jiffies;
5455                 }
5456         }
5457
5458         return link_active;
5459 }
5460
5461 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5462 {
5463         bool ret = false;
5464         u32 ctrl_ext, thstat;
5465
5466         /* check for thermal sensor event on i350 copper only */
5467         if (hw->mac.type == e1000_i350) {
5468                 thstat = rd32(E1000_THSTAT);
5469                 ctrl_ext = rd32(E1000_CTRL_EXT);
5470
5471                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5472                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5473                         ret = !!(thstat & event);
5474         }
5475
5476         return ret;
5477 }
5478
5479 /**
5480  *  igb_check_lvmmc - check for malformed packets received
5481  *  and indicated in LVMMC register
5482  *  @adapter: pointer to adapter
5483  **/
5484 static void igb_check_lvmmc(struct igb_adapter *adapter)
5485 {
5486         struct e1000_hw *hw = &adapter->hw;
5487         u32 lvmmc;
5488
5489         lvmmc = rd32(E1000_LVMMC);
5490         if (lvmmc) {
5491                 if (unlikely(net_ratelimit())) {
5492                         netdev_warn(adapter->netdev,
5493                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5494                                     lvmmc);
5495                 }
5496         }
5497 }
5498
5499 /**
5500  *  igb_watchdog - Timer Call-back
5501  *  @t: pointer to timer_list containing our private info pointer
5502  **/
5503 static void igb_watchdog(struct timer_list *t)
5504 {
5505         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5506         /* Do the rest outside of interrupt context */
5507         schedule_work(&adapter->watchdog_task);
5508 }
5509
5510 static void igb_watchdog_task(struct work_struct *work)
5511 {
5512         struct igb_adapter *adapter = container_of(work,
5513                                                    struct igb_adapter,
5514                                                    watchdog_task);
5515         struct e1000_hw *hw = &adapter->hw;
5516         struct e1000_phy_info *phy = &hw->phy;
5517         struct net_device *netdev = adapter->netdev;
5518         u32 link;
5519         int i;
5520         u32 connsw;
5521         u16 phy_data, retry_count = 20;
5522
5523         link = igb_has_link(adapter);
5524
5525         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5526                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5527                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5528                 else
5529                         link = false;
5530         }
5531
5532         /* Force link down if we have fiber to swap to */
5533         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5534                 if (hw->phy.media_type == e1000_media_type_copper) {
5535                         connsw = rd32(E1000_CONNSW);
5536                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5537                                 link = 0;
5538                 }
5539         }
5540         if (link) {
5541                 /* Perform a reset if the media type changed. */
5542                 if (hw->dev_spec._82575.media_changed) {
5543                         hw->dev_spec._82575.media_changed = false;
5544                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5545                         igb_reset(adapter);
5546                 }
5547                 /* Cancel scheduled suspend requests. */
5548                 pm_runtime_resume(netdev->dev.parent);
5549
5550                 if (!netif_carrier_ok(netdev)) {
5551                         u32 ctrl;
5552
5553                         hw->mac.ops.get_speed_and_duplex(hw,
5554                                                          &adapter->link_speed,
5555                                                          &adapter->link_duplex);
5556
5557                         ctrl = rd32(E1000_CTRL);
5558                         /* Links status message must follow this format */
5559                         netdev_info(netdev,
5560                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5561                                netdev->name,
5562                                adapter->link_speed,
5563                                adapter->link_duplex == FULL_DUPLEX ?
5564                                "Full" : "Half",
5565                                (ctrl & E1000_CTRL_TFCE) &&
5566                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5567                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5568                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5569
5570                         /* disable EEE if enabled */
5571                         if ((adapter->flags & IGB_FLAG_EEE) &&
5572                                 (adapter->link_duplex == HALF_DUPLEX)) {
5573                                 dev_info(&adapter->pdev->dev,
5574                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5575                                 adapter->hw.dev_spec._82575.eee_disable = true;
5576                                 adapter->flags &= ~IGB_FLAG_EEE;
5577                         }
5578
5579                         /* check if SmartSpeed worked */
5580                         igb_check_downshift(hw);
5581                         if (phy->speed_downgraded)
5582                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5583
5584                         /* check for thermal sensor event */
5585                         if (igb_thermal_sensor_event(hw,
5586                             E1000_THSTAT_LINK_THROTTLE))
5587                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5588
5589                         /* adjust timeout factor according to speed/duplex */
5590                         adapter->tx_timeout_factor = 1;
5591                         switch (adapter->link_speed) {
5592                         case SPEED_10:
5593                                 adapter->tx_timeout_factor = 14;
5594                                 break;
5595                         case SPEED_100:
5596                                 /* maybe add some timeout factor ? */
5597                                 break;
5598                         }
5599
5600                         if (adapter->link_speed != SPEED_1000 ||
5601                             !hw->phy.ops.read_reg)
5602                                 goto no_wait;
5603
5604                         /* wait for Remote receiver status OK */
5605 retry_read_status:
5606                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5607                                               &phy_data)) {
5608                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5609                                     retry_count) {
5610                                         msleep(100);
5611                                         retry_count--;
5612                                         goto retry_read_status;
5613                                 } else if (!retry_count) {
5614                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5615                                 }
5616                         } else {
5617                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5618                         }
5619 no_wait:
5620                         netif_carrier_on(netdev);
5621
5622                         igb_ping_all_vfs(adapter);
5623                         igb_check_vf_rate_limit(adapter);
5624
5625                         /* link state has changed, schedule phy info update */
5626                         if (!test_bit(__IGB_DOWN, &adapter->state))
5627                                 mod_timer(&adapter->phy_info_timer,
5628                                           round_jiffies(jiffies + 2 * HZ));
5629                 }
5630         } else {
5631                 if (netif_carrier_ok(netdev)) {
5632                         adapter->link_speed = 0;
5633                         adapter->link_duplex = 0;
5634
5635                         /* check for thermal sensor event */
5636                         if (igb_thermal_sensor_event(hw,
5637                             E1000_THSTAT_PWR_DOWN)) {
5638                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5639                         }
5640
5641                         /* Links status message must follow this format */
5642                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5643                                netdev->name);
5644                         netif_carrier_off(netdev);
5645
5646                         igb_ping_all_vfs(adapter);
5647
5648                         /* link state has changed, schedule phy info update */
5649                         if (!test_bit(__IGB_DOWN, &adapter->state))
5650                                 mod_timer(&adapter->phy_info_timer,
5651                                           round_jiffies(jiffies + 2 * HZ));
5652
5653                         /* link is down, time to check for alternate media */
5654                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5655                                 igb_check_swap_media(adapter);
5656                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5657                                         schedule_work(&adapter->reset_task);
5658                                         /* return immediately */
5659                                         return;
5660                                 }
5661                         }
5662                         pm_schedule_suspend(netdev->dev.parent,
5663                                             MSEC_PER_SEC * 5);
5664
5665                 /* also check for alternate media here */
5666                 } else if (!netif_carrier_ok(netdev) &&
5667                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5668                         igb_check_swap_media(adapter);
5669                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5670                                 schedule_work(&adapter->reset_task);
5671                                 /* return immediately */
5672                                 return;
5673                         }
5674                 }
5675         }
5676
5677         spin_lock(&adapter->stats64_lock);
5678         igb_update_stats(adapter);
5679         spin_unlock(&adapter->stats64_lock);
5680
5681         for (i = 0; i < adapter->num_tx_queues; i++) {
5682                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5683                 if (!netif_carrier_ok(netdev)) {
5684                         /* We've lost link, so the controller stops DMA,
5685                          * but we've got queued Tx work that's never going
5686                          * to get done, so reset controller to flush Tx.
5687                          * (Do the reset outside of interrupt context).
5688                          */
5689                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5690                                 adapter->tx_timeout_count++;
5691                                 schedule_work(&adapter->reset_task);
5692                                 /* return immediately since reset is imminent */
5693                                 return;
5694                         }
5695                 }
5696
5697                 /* Force detection of hung controller every watchdog period */
5698                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5699         }
5700
5701         /* Cause software interrupt to ensure Rx ring is cleaned */
5702         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5703                 u32 eics = 0;
5704
5705                 for (i = 0; i < adapter->num_q_vectors; i++)
5706                         eics |= adapter->q_vector[i]->eims_value;
5707                 wr32(E1000_EICS, eics);
5708         } else {
5709                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5710         }
5711
5712         igb_spoof_check(adapter);
5713         igb_ptp_rx_hang(adapter);
5714         igb_ptp_tx_hang(adapter);
5715
5716         /* Check LVMMC register on i350/i354 only */
5717         if ((adapter->hw.mac.type == e1000_i350) ||
5718             (adapter->hw.mac.type == e1000_i354))
5719                 igb_check_lvmmc(adapter);
5720
5721         /* Reset the timer */
5722         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5723                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5724                         mod_timer(&adapter->watchdog_timer,
5725                                   round_jiffies(jiffies +  HZ));
5726                 else
5727                         mod_timer(&adapter->watchdog_timer,
5728                                   round_jiffies(jiffies + 2 * HZ));
5729         }
5730 }
5731
5732 enum latency_range {
5733         lowest_latency = 0,
5734         low_latency = 1,
5735         bulk_latency = 2,
5736         latency_invalid = 255
5737 };
5738
5739 /**
5740  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5741  *  @q_vector: pointer to q_vector
5742  *
5743  *  Stores a new ITR value based on strictly on packet size.  This
5744  *  algorithm is less sophisticated than that used in igb_update_itr,
5745  *  due to the difficulty of synchronizing statistics across multiple
5746  *  receive rings.  The divisors and thresholds used by this function
5747  *  were determined based on theoretical maximum wire speed and testing
5748  *  data, in order to minimize response time while increasing bulk
5749  *  throughput.
5750  *  This functionality is controlled by ethtool's coalescing settings.
5751  *  NOTE:  This function is called only when operating in a multiqueue
5752  *         receive environment.
5753  **/
5754 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5755 {
5756         int new_val = q_vector->itr_val;
5757         int avg_wire_size = 0;
5758         struct igb_adapter *adapter = q_vector->adapter;
5759         unsigned int packets;
5760
5761         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5762          * ints/sec - ITR timer value of 120 ticks.
5763          */
5764         if (adapter->link_speed != SPEED_1000) {
5765                 new_val = IGB_4K_ITR;
5766                 goto set_itr_val;
5767         }
5768
5769         packets = q_vector->rx.total_packets;
5770         if (packets)
5771                 avg_wire_size = q_vector->rx.total_bytes / packets;
5772
5773         packets = q_vector->tx.total_packets;
5774         if (packets)
5775                 avg_wire_size = max_t(u32, avg_wire_size,
5776                                       q_vector->tx.total_bytes / packets);
5777
5778         /* if avg_wire_size isn't set no work was done */
5779         if (!avg_wire_size)
5780                 goto clear_counts;
5781
5782         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5783         avg_wire_size += 24;
5784
5785         /* Don't starve jumbo frames */
5786         avg_wire_size = min(avg_wire_size, 3000);
5787
5788         /* Give a little boost to mid-size frames */
5789         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5790                 new_val = avg_wire_size / 3;
5791         else
5792                 new_val = avg_wire_size / 2;
5793
5794         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5795         if (new_val < IGB_20K_ITR &&
5796             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5797              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5798                 new_val = IGB_20K_ITR;
5799
5800 set_itr_val:
5801         if (new_val != q_vector->itr_val) {
5802                 q_vector->itr_val = new_val;
5803                 q_vector->set_itr = 1;
5804         }
5805 clear_counts:
5806         q_vector->rx.total_bytes = 0;
5807         q_vector->rx.total_packets = 0;
5808         q_vector->tx.total_bytes = 0;
5809         q_vector->tx.total_packets = 0;
5810 }
5811
5812 /**
5813  *  igb_update_itr - update the dynamic ITR value based on statistics
5814  *  @q_vector: pointer to q_vector
5815  *  @ring_container: ring info to update the itr for
5816  *
5817  *  Stores a new ITR value based on packets and byte
5818  *  counts during the last interrupt.  The advantage of per interrupt
5819  *  computation is faster updates and more accurate ITR for the current
5820  *  traffic pattern.  Constants in this function were computed
5821  *  based on theoretical maximum wire speed and thresholds were set based
5822  *  on testing data as well as attempting to minimize response time
5823  *  while increasing bulk throughput.
5824  *  This functionality is controlled by ethtool's coalescing settings.
5825  *  NOTE:  These calculations are only valid when operating in a single-
5826  *         queue environment.
5827  **/
5828 static void igb_update_itr(struct igb_q_vector *q_vector,
5829                            struct igb_ring_container *ring_container)
5830 {
5831         unsigned int packets = ring_container->total_packets;
5832         unsigned int bytes = ring_container->total_bytes;
5833         u8 itrval = ring_container->itr;
5834
5835         /* no packets, exit with status unchanged */
5836         if (packets == 0)
5837                 return;
5838
5839         switch (itrval) {
5840         case lowest_latency:
5841                 /* handle TSO and jumbo frames */
5842                 if (bytes/packets > 8000)
5843                         itrval = bulk_latency;
5844                 else if ((packets < 5) && (bytes > 512))
5845                         itrval = low_latency;
5846                 break;
5847         case low_latency:  /* 50 usec aka 20000 ints/s */
5848                 if (bytes > 10000) {
5849                         /* this if handles the TSO accounting */
5850                         if (bytes/packets > 8000)
5851                                 itrval = bulk_latency;
5852                         else if ((packets < 10) || ((bytes/packets) > 1200))
5853                                 itrval = bulk_latency;
5854                         else if ((packets > 35))
5855                                 itrval = lowest_latency;
5856                 } else if (bytes/packets > 2000) {
5857                         itrval = bulk_latency;
5858                 } else if (packets <= 2 && bytes < 512) {
5859                         itrval = lowest_latency;
5860                 }
5861                 break;
5862         case bulk_latency: /* 250 usec aka 4000 ints/s */
5863                 if (bytes > 25000) {
5864                         if (packets > 35)
5865                                 itrval = low_latency;
5866                 } else if (bytes < 1500) {
5867                         itrval = low_latency;
5868                 }
5869                 break;
5870         }
5871
5872         /* clear work counters since we have the values we need */
5873         ring_container->total_bytes = 0;
5874         ring_container->total_packets = 0;
5875
5876         /* write updated itr to ring container */
5877         ring_container->itr = itrval;
5878 }
5879
5880 static void igb_set_itr(struct igb_q_vector *q_vector)
5881 {
5882         struct igb_adapter *adapter = q_vector->adapter;
5883         u32 new_itr = q_vector->itr_val;
5884         u8 current_itr = 0;
5885
5886         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5887         if (adapter->link_speed != SPEED_1000) {
5888                 current_itr = 0;
5889                 new_itr = IGB_4K_ITR;
5890                 goto set_itr_now;
5891         }
5892
5893         igb_update_itr(q_vector, &q_vector->tx);
5894         igb_update_itr(q_vector, &q_vector->rx);
5895
5896         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5897
5898         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5899         if (current_itr == lowest_latency &&
5900             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5901              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5902                 current_itr = low_latency;
5903
5904         switch (current_itr) {
5905         /* counts and packets in update_itr are dependent on these numbers */
5906         case lowest_latency:
5907                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5908                 break;
5909         case low_latency:
5910                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5911                 break;
5912         case bulk_latency:
5913                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5914                 break;
5915         default:
5916                 break;
5917         }
5918
5919 set_itr_now:
5920         if (new_itr != q_vector->itr_val) {
5921                 /* this attempts to bias the interrupt rate towards Bulk
5922                  * by adding intermediate steps when interrupt rate is
5923                  * increasing
5924                  */
5925                 new_itr = new_itr > q_vector->itr_val ?
5926                           max((new_itr * q_vector->itr_val) /
5927                           (new_itr + (q_vector->itr_val >> 2)),
5928                           new_itr) : new_itr;
5929                 /* Don't write the value here; it resets the adapter's
5930                  * internal timer, and causes us to delay far longer than
5931                  * we should between interrupts.  Instead, we write the ITR
5932                  * value at the beginning of the next interrupt so the timing
5933                  * ends up being correct.
5934                  */
5935                 q_vector->itr_val = new_itr;
5936                 q_vector->set_itr = 1;
5937         }
5938 }
5939
5940 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5941                             struct igb_tx_buffer *first,
5942                             u32 vlan_macip_lens, u32 type_tucmd,
5943                             u32 mss_l4len_idx)
5944 {
5945         struct e1000_adv_tx_context_desc *context_desc;
5946         u16 i = tx_ring->next_to_use;
5947         struct timespec64 ts;
5948
5949         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5950
5951         i++;
5952         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5953
5954         /* set bits to identify this as an advanced context descriptor */
5955         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5956
5957         /* For 82575, context index must be unique per ring. */
5958         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5959                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5960
5961         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5962         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5963         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5964
5965         /* We assume there is always a valid tx time available. Invalid times
5966          * should have been handled by the upper layers.
5967          */
5968         if (tx_ring->launchtime_enable) {
5969                 ts = ktime_to_timespec64(first->skb->tstamp);
5970                 skb_txtime_consumed(first->skb);
5971                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5972         } else {
5973                 context_desc->seqnum_seed = 0;
5974         }
5975 }
5976
5977 static int igb_tso(struct igb_ring *tx_ring,
5978                    struct igb_tx_buffer *first,
5979                    u8 *hdr_len)
5980 {
5981         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5982         struct sk_buff *skb = first->skb;
5983         union {
5984                 struct iphdr *v4;
5985                 struct ipv6hdr *v6;
5986                 unsigned char *hdr;
5987         } ip;
5988         union {
5989                 struct tcphdr *tcp;
5990                 struct udphdr *udp;
5991                 unsigned char *hdr;
5992         } l4;
5993         u32 paylen, l4_offset;
5994         int err;
5995
5996         if (skb->ip_summed != CHECKSUM_PARTIAL)
5997                 return 0;
5998
5999         if (!skb_is_gso(skb))
6000                 return 0;
6001
6002         err = skb_cow_head(skb, 0);
6003         if (err < 0)
6004                 return err;
6005
6006         ip.hdr = skb_network_header(skb);
6007         l4.hdr = skb_checksum_start(skb);
6008
6009         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6010         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
6011                       E1000_ADVTXD_TUCMD_L4T_UDP : E1000_ADVTXD_TUCMD_L4T_TCP;
6012
6013         /* initialize outer IP header fields */
6014         if (ip.v4->version == 4) {
6015                 unsigned char *csum_start = skb_checksum_start(skb);
6016                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
6017
6018                 /* IP header will have to cancel out any data that
6019                  * is not a part of the outer IP header
6020                  */
6021                 ip.v4->check = csum_fold(csum_partial(trans_start,
6022                                                       csum_start - trans_start,
6023                                                       0));
6024                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
6025
6026                 ip.v4->tot_len = 0;
6027                 first->tx_flags |= IGB_TX_FLAGS_TSO |
6028                                    IGB_TX_FLAGS_CSUM |
6029                                    IGB_TX_FLAGS_IPV4;
6030         } else {
6031                 ip.v6->payload_len = 0;
6032                 first->tx_flags |= IGB_TX_FLAGS_TSO |
6033                                    IGB_TX_FLAGS_CSUM;
6034         }
6035
6036         /* determine offset of inner transport header */
6037         l4_offset = l4.hdr - skb->data;
6038
6039         /* remove payload length from inner checksum */
6040         paylen = skb->len - l4_offset;
6041         if (type_tucmd & E1000_ADVTXD_TUCMD_L4T_TCP) {
6042                 /* compute length of segmentation header */
6043                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
6044                 csum_replace_by_diff(&l4.tcp->check,
6045                         (__force __wsum)htonl(paylen));
6046         } else {
6047                 /* compute length of segmentation header */
6048                 *hdr_len = sizeof(*l4.udp) + l4_offset;
6049                 csum_replace_by_diff(&l4.udp->check,
6050                                      (__force __wsum)htonl(paylen));
6051         }
6052
6053         /* update gso size and bytecount with header size */
6054         first->gso_segs = skb_shinfo(skb)->gso_segs;
6055         first->bytecount += (first->gso_segs - 1) * *hdr_len;
6056
6057         /* MSS L4LEN IDX */
6058         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
6059         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
6060
6061         /* VLAN MACLEN IPLEN */
6062         vlan_macip_lens = l4.hdr - ip.hdr;
6063         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
6064         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6065
6066         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
6067                         type_tucmd, mss_l4len_idx);
6068
6069         return 1;
6070 }
6071
6072 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
6073 {
6074         struct sk_buff *skb = first->skb;
6075         u32 vlan_macip_lens = 0;
6076         u32 type_tucmd = 0;
6077
6078         if (skb->ip_summed != CHECKSUM_PARTIAL) {
6079 csum_failed:
6080                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
6081                     !tx_ring->launchtime_enable)
6082                         return;
6083                 goto no_csum;
6084         }
6085
6086         switch (skb->csum_offset) {
6087         case offsetof(struct tcphdr, check):
6088                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
6089                 fallthrough;
6090         case offsetof(struct udphdr, check):
6091                 break;
6092         case offsetof(struct sctphdr, checksum):
6093                 /* validate that this is actually an SCTP request */
6094                 if (skb_csum_is_sctp(skb)) {
6095                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
6096                         break;
6097                 }
6098                 fallthrough;
6099         default:
6100                 skb_checksum_help(skb);
6101                 goto csum_failed;
6102         }
6103
6104         /* update TX checksum flag */
6105         first->tx_flags |= IGB_TX_FLAGS_CSUM;
6106         vlan_macip_lens = skb_checksum_start_offset(skb) -
6107                           skb_network_offset(skb);
6108 no_csum:
6109         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
6110         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6111
6112         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
6113 }
6114
6115 #define IGB_SET_FLAG(_input, _flag, _result) \
6116         ((_flag <= _result) ? \
6117          ((u32)(_input & _flag) * (_result / _flag)) : \
6118          ((u32)(_input & _flag) / (_flag / _result)))
6119
6120 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6121 {
6122         /* set type for advanced descriptor with frame checksum insertion */
6123         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
6124                        E1000_ADVTXD_DCMD_DEXT |
6125                        E1000_ADVTXD_DCMD_IFCS;
6126
6127         /* set HW vlan bit if vlan is present */
6128         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
6129                                  (E1000_ADVTXD_DCMD_VLE));
6130
6131         /* set segmentation bits for TSO */
6132         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
6133                                  (E1000_ADVTXD_DCMD_TSE));
6134
6135         /* set timestamp bit if present */
6136         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
6137                                  (E1000_ADVTXD_MAC_TSTAMP));
6138
6139         /* insert frame checksum */
6140         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
6141
6142         return cmd_type;
6143 }
6144
6145 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
6146                                  union e1000_adv_tx_desc *tx_desc,
6147                                  u32 tx_flags, unsigned int paylen)
6148 {
6149         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
6150
6151         /* 82575 requires a unique index per ring */
6152         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6153                 olinfo_status |= tx_ring->reg_idx << 4;
6154
6155         /* insert L4 checksum */
6156         olinfo_status |= IGB_SET_FLAG(tx_flags,
6157                                       IGB_TX_FLAGS_CSUM,
6158                                       (E1000_TXD_POPTS_TXSM << 8));
6159
6160         /* insert IPv4 checksum */
6161         olinfo_status |= IGB_SET_FLAG(tx_flags,
6162                                       IGB_TX_FLAGS_IPV4,
6163                                       (E1000_TXD_POPTS_IXSM << 8));
6164
6165         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6166 }
6167
6168 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6169 {
6170         struct net_device *netdev = tx_ring->netdev;
6171
6172         netif_stop_subqueue(netdev, tx_ring->queue_index);
6173
6174         /* Herbert's original patch had:
6175          *  smp_mb__after_netif_stop_queue();
6176          * but since that doesn't exist yet, just open code it.
6177          */
6178         smp_mb();
6179
6180         /* We need to check again in a case another CPU has just
6181          * made room available.
6182          */
6183         if (igb_desc_unused(tx_ring) < size)
6184                 return -EBUSY;
6185
6186         /* A reprieve! */
6187         netif_wake_subqueue(netdev, tx_ring->queue_index);
6188
6189         u64_stats_update_begin(&tx_ring->tx_syncp2);
6190         tx_ring->tx_stats.restart_queue2++;
6191         u64_stats_update_end(&tx_ring->tx_syncp2);
6192
6193         return 0;
6194 }
6195
6196 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6197 {
6198         if (igb_desc_unused(tx_ring) >= size)
6199                 return 0;
6200         return __igb_maybe_stop_tx(tx_ring, size);
6201 }
6202
6203 static int igb_tx_map(struct igb_ring *tx_ring,
6204                       struct igb_tx_buffer *first,
6205                       const u8 hdr_len)
6206 {
6207         struct sk_buff *skb = first->skb;
6208         struct igb_tx_buffer *tx_buffer;
6209         union e1000_adv_tx_desc *tx_desc;
6210         skb_frag_t *frag;
6211         dma_addr_t dma;
6212         unsigned int data_len, size;
6213         u32 tx_flags = first->tx_flags;
6214         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
6215         u16 i = tx_ring->next_to_use;
6216
6217         tx_desc = IGB_TX_DESC(tx_ring, i);
6218
6219         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
6220
6221         size = skb_headlen(skb);
6222         data_len = skb->data_len;
6223
6224         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6225
6226         tx_buffer = first;
6227
6228         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6229                 if (dma_mapping_error(tx_ring->dev, dma))
6230                         goto dma_error;
6231
6232                 /* record length, and DMA address */
6233                 dma_unmap_len_set(tx_buffer, len, size);
6234                 dma_unmap_addr_set(tx_buffer, dma, dma);
6235
6236                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6237
6238                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
6239                         tx_desc->read.cmd_type_len =
6240                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
6241
6242                         i++;
6243                         tx_desc++;
6244                         if (i == tx_ring->count) {
6245                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6246                                 i = 0;
6247                         }
6248                         tx_desc->read.olinfo_status = 0;
6249
6250                         dma += IGB_MAX_DATA_PER_TXD;
6251                         size -= IGB_MAX_DATA_PER_TXD;
6252
6253                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6254                 }
6255
6256                 if (likely(!data_len))
6257                         break;
6258
6259                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6260
6261                 i++;
6262                 tx_desc++;
6263                 if (i == tx_ring->count) {
6264                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6265                         i = 0;
6266                 }
6267                 tx_desc->read.olinfo_status = 0;
6268
6269                 size = skb_frag_size(frag);
6270                 data_len -= size;
6271
6272                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6273                                        size, DMA_TO_DEVICE);
6274
6275                 tx_buffer = &tx_ring->tx_buffer_info[i];
6276         }
6277
6278         /* write last descriptor with RS and EOP bits */
6279         cmd_type |= size | IGB_TXD_DCMD;
6280         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6281
6282         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6283
6284         /* set the timestamp */
6285         first->time_stamp = jiffies;
6286
6287         skb_tx_timestamp(skb);
6288
6289         /* Force memory writes to complete before letting h/w know there
6290          * are new descriptors to fetch.  (Only applicable for weak-ordered
6291          * memory model archs, such as IA-64).
6292          *
6293          * We also need this memory barrier to make certain all of the
6294          * status bits have been updated before next_to_watch is written.
6295          */
6296         dma_wmb();
6297
6298         /* set next_to_watch value indicating a packet is present */
6299         first->next_to_watch = tx_desc;
6300
6301         i++;
6302         if (i == tx_ring->count)
6303                 i = 0;
6304
6305         tx_ring->next_to_use = i;
6306
6307         /* Make sure there is space in the ring for the next send. */
6308         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6309
6310         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
6311                 writel(i, tx_ring->tail);
6312         }
6313         return 0;
6314
6315 dma_error:
6316         dev_err(tx_ring->dev, "TX DMA map failed\n");
6317         tx_buffer = &tx_ring->tx_buffer_info[i];
6318
6319         /* clear dma mappings for failed tx_buffer_info map */
6320         while (tx_buffer != first) {
6321                 if (dma_unmap_len(tx_buffer, len))
6322                         dma_unmap_page(tx_ring->dev,
6323                                        dma_unmap_addr(tx_buffer, dma),
6324                                        dma_unmap_len(tx_buffer, len),
6325                                        DMA_TO_DEVICE);
6326                 dma_unmap_len_set(tx_buffer, len, 0);
6327
6328                 if (i-- == 0)
6329                         i += tx_ring->count;
6330                 tx_buffer = &tx_ring->tx_buffer_info[i];
6331         }
6332
6333         if (dma_unmap_len(tx_buffer, len))
6334                 dma_unmap_single(tx_ring->dev,
6335                                  dma_unmap_addr(tx_buffer, dma),
6336                                  dma_unmap_len(tx_buffer, len),
6337                                  DMA_TO_DEVICE);
6338         dma_unmap_len_set(tx_buffer, len, 0);
6339
6340         dev_kfree_skb_any(tx_buffer->skb);
6341         tx_buffer->skb = NULL;
6342
6343         tx_ring->next_to_use = i;
6344
6345         return -1;
6346 }
6347
6348 int igb_xmit_xdp_ring(struct igb_adapter *adapter,
6349                       struct igb_ring *tx_ring,
6350                       struct xdp_frame *xdpf)
6351 {
6352         struct skb_shared_info *sinfo = xdp_get_shared_info_from_frame(xdpf);
6353         u8 nr_frags = unlikely(xdp_frame_has_frags(xdpf)) ? sinfo->nr_frags : 0;
6354         u16 count, i, index = tx_ring->next_to_use;
6355         struct igb_tx_buffer *tx_head = &tx_ring->tx_buffer_info[index];
6356         struct igb_tx_buffer *tx_buffer = tx_head;
6357         union e1000_adv_tx_desc *tx_desc = IGB_TX_DESC(tx_ring, index);
6358         u32 len = xdpf->len, cmd_type, olinfo_status;
6359         void *data = xdpf->data;
6360
6361         count = TXD_USE_COUNT(len);
6362         for (i = 0; i < nr_frags; i++)
6363                 count += TXD_USE_COUNT(skb_frag_size(&sinfo->frags[i]));
6364
6365         if (igb_maybe_stop_tx(tx_ring, count + 3))
6366                 return IGB_XDP_CONSUMED;
6367
6368         i = 0;
6369         /* record the location of the first descriptor for this packet */
6370         tx_head->bytecount = xdp_get_frame_len(xdpf);
6371         tx_head->type = IGB_TYPE_XDP;
6372         tx_head->gso_segs = 1;
6373         tx_head->xdpf = xdpf;
6374
6375         olinfo_status = tx_head->bytecount << E1000_ADVTXD_PAYLEN_SHIFT;
6376         /* 82575 requires a unique index per ring */
6377         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6378                 olinfo_status |= tx_ring->reg_idx << 4;
6379         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6380
6381         for (;;) {
6382                 dma_addr_t dma;
6383
6384                 dma = dma_map_single(tx_ring->dev, data, len, DMA_TO_DEVICE);
6385                 if (dma_mapping_error(tx_ring->dev, dma))
6386                         goto unmap;
6387
6388                 /* record length, and DMA address */
6389                 dma_unmap_len_set(tx_buffer, len, len);
6390                 dma_unmap_addr_set(tx_buffer, dma, dma);
6391
6392                 /* put descriptor type bits */
6393                 cmd_type = E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_DEXT |
6394                            E1000_ADVTXD_DCMD_IFCS | len;
6395
6396                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6397                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6398
6399                 tx_buffer->protocol = 0;
6400
6401                 if (++index == tx_ring->count)
6402                         index = 0;
6403
6404                 if (i == nr_frags)
6405                         break;
6406
6407                 tx_buffer = &tx_ring->tx_buffer_info[index];
6408                 tx_desc = IGB_TX_DESC(tx_ring, index);
6409                 tx_desc->read.olinfo_status = 0;
6410
6411                 data = skb_frag_address(&sinfo->frags[i]);
6412                 len = skb_frag_size(&sinfo->frags[i]);
6413                 i++;
6414         }
6415         tx_desc->read.cmd_type_len |= cpu_to_le32(IGB_TXD_DCMD);
6416
6417         netdev_tx_sent_queue(txring_txq(tx_ring), tx_head->bytecount);
6418         /* set the timestamp */
6419         tx_head->time_stamp = jiffies;
6420
6421         /* Avoid any potential race with xdp_xmit and cleanup */
6422         smp_wmb();
6423
6424         /* set next_to_watch value indicating a packet is present */
6425         tx_head->next_to_watch = tx_desc;
6426         tx_ring->next_to_use = index;
6427
6428         /* Make sure there is space in the ring for the next send. */
6429         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6430
6431         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
6432                 writel(index, tx_ring->tail);
6433
6434         return IGB_XDP_TX;
6435
6436 unmap:
6437         for (;;) {
6438                 tx_buffer = &tx_ring->tx_buffer_info[index];
6439                 if (dma_unmap_len(tx_buffer, len))
6440                         dma_unmap_page(tx_ring->dev,
6441                                        dma_unmap_addr(tx_buffer, dma),
6442                                        dma_unmap_len(tx_buffer, len),
6443                                        DMA_TO_DEVICE);
6444                 dma_unmap_len_set(tx_buffer, len, 0);
6445                 if (tx_buffer == tx_head)
6446                         break;
6447
6448                 if (!index)
6449                         index += tx_ring->count;
6450                 index--;
6451         }
6452
6453         return IGB_XDP_CONSUMED;
6454 }
6455
6456 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6457                                 struct igb_ring *tx_ring)
6458 {
6459         struct igb_tx_buffer *first;
6460         int tso;
6461         u32 tx_flags = 0;
6462         unsigned short f;
6463         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6464         __be16 protocol = vlan_get_protocol(skb);
6465         u8 hdr_len = 0;
6466
6467         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6468          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6469          *       + 2 desc gap to keep tail from touching head,
6470          *       + 1 desc for context descriptor,
6471          * otherwise try next time
6472          */
6473         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6474                 count += TXD_USE_COUNT(skb_frag_size(
6475                                                 &skb_shinfo(skb)->frags[f]));
6476
6477         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6478                 /* this is a hard error */
6479                 return NETDEV_TX_BUSY;
6480         }
6481
6482         /* record the location of the first descriptor for this packet */
6483         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6484         first->type = IGB_TYPE_SKB;
6485         first->skb = skb;
6486         first->bytecount = skb->len;
6487         first->gso_segs = 1;
6488
6489         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6490                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6491
6492                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6493                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6494                                            &adapter->state)) {
6495                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6496                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6497
6498                         adapter->ptp_tx_skb = skb_get(skb);
6499                         adapter->ptp_tx_start = jiffies;
6500                         if (adapter->hw.mac.type == e1000_82576)
6501                                 schedule_work(&adapter->ptp_tx_work);
6502                 } else {
6503                         adapter->tx_hwtstamp_skipped++;
6504                 }
6505         }
6506
6507         if (skb_vlan_tag_present(skb)) {
6508                 tx_flags |= IGB_TX_FLAGS_VLAN;
6509                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6510         }
6511
6512         /* record initial flags and protocol */
6513         first->tx_flags = tx_flags;
6514         first->protocol = protocol;
6515
6516         tso = igb_tso(tx_ring, first, &hdr_len);
6517         if (tso < 0)
6518                 goto out_drop;
6519         else if (!tso)
6520                 igb_tx_csum(tx_ring, first);
6521
6522         if (igb_tx_map(tx_ring, first, hdr_len))
6523                 goto cleanup_tx_tstamp;
6524
6525         return NETDEV_TX_OK;
6526
6527 out_drop:
6528         dev_kfree_skb_any(first->skb);
6529         first->skb = NULL;
6530 cleanup_tx_tstamp:
6531         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6532                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6533
6534                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6535                 adapter->ptp_tx_skb = NULL;
6536                 if (adapter->hw.mac.type == e1000_82576)
6537                         cancel_work_sync(&adapter->ptp_tx_work);
6538                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6539         }
6540
6541         return NETDEV_TX_OK;
6542 }
6543
6544 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6545                                                     struct sk_buff *skb)
6546 {
6547         unsigned int r_idx = skb->queue_mapping;
6548
6549         if (r_idx >= adapter->num_tx_queues)
6550                 r_idx = r_idx % adapter->num_tx_queues;
6551
6552         return adapter->tx_ring[r_idx];
6553 }
6554
6555 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6556                                   struct net_device *netdev)
6557 {
6558         struct igb_adapter *adapter = netdev_priv(netdev);
6559
6560         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6561          * in order to meet this minimum size requirement.
6562          */
6563         if (skb_put_padto(skb, 17))
6564                 return NETDEV_TX_OK;
6565
6566         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6567 }
6568
6569 /**
6570  *  igb_tx_timeout - Respond to a Tx Hang
6571  *  @netdev: network interface device structure
6572  *  @txqueue: number of the Tx queue that hung (unused)
6573  **/
6574 static void igb_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6575 {
6576         struct igb_adapter *adapter = netdev_priv(netdev);
6577         struct e1000_hw *hw = &adapter->hw;
6578
6579         /* Do the reset outside of interrupt context */
6580         adapter->tx_timeout_count++;
6581
6582         if (hw->mac.type >= e1000_82580)
6583                 hw->dev_spec._82575.global_device_reset = true;
6584
6585         schedule_work(&adapter->reset_task);
6586         wr32(E1000_EICS,
6587              (adapter->eims_enable_mask & ~adapter->eims_other));
6588 }
6589
6590 static void igb_reset_task(struct work_struct *work)
6591 {
6592         struct igb_adapter *adapter;
6593         adapter = container_of(work, struct igb_adapter, reset_task);
6594
6595         rtnl_lock();
6596         /* If we're already down or resetting, just bail */
6597         if (test_bit(__IGB_DOWN, &adapter->state) ||
6598             test_bit(__IGB_RESETTING, &adapter->state)) {
6599                 rtnl_unlock();
6600                 return;
6601         }
6602
6603         igb_dump(adapter);
6604         netdev_err(adapter->netdev, "Reset adapter\n");
6605         igb_reinit_locked(adapter);
6606         rtnl_unlock();
6607 }
6608
6609 /**
6610  *  igb_get_stats64 - Get System Network Statistics
6611  *  @netdev: network interface device structure
6612  *  @stats: rtnl_link_stats64 pointer
6613  **/
6614 static void igb_get_stats64(struct net_device *netdev,
6615                             struct rtnl_link_stats64 *stats)
6616 {
6617         struct igb_adapter *adapter = netdev_priv(netdev);
6618
6619         spin_lock(&adapter->stats64_lock);
6620         igb_update_stats(adapter);
6621         memcpy(stats, &adapter->stats64, sizeof(*stats));
6622         spin_unlock(&adapter->stats64_lock);
6623 }
6624
6625 /**
6626  *  igb_change_mtu - Change the Maximum Transfer Unit
6627  *  @netdev: network interface device structure
6628  *  @new_mtu: new value for maximum frame size
6629  *
6630  *  Returns 0 on success, negative on failure
6631  **/
6632 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6633 {
6634         struct igb_adapter *adapter = netdev_priv(netdev);
6635         int max_frame = new_mtu + IGB_ETH_PKT_HDR_PAD;
6636
6637         if (adapter->xdp_prog) {
6638                 int i;
6639
6640                 for (i = 0; i < adapter->num_rx_queues; i++) {
6641                         struct igb_ring *ring = adapter->rx_ring[i];
6642
6643                         if (max_frame > igb_rx_bufsz(ring)) {
6644                                 netdev_warn(adapter->netdev,
6645                                             "Requested MTU size is not supported with XDP. Max frame size is %d\n",
6646                                             max_frame);
6647                                 return -EINVAL;
6648                         }
6649                 }
6650         }
6651
6652         /* adjust max frame to be at least the size of a standard frame */
6653         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6654                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6655
6656         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6657                 usleep_range(1000, 2000);
6658
6659         /* igb_down has a dependency on max_frame_size */
6660         adapter->max_frame_size = max_frame;
6661
6662         if (netif_running(netdev))
6663                 igb_down(adapter);
6664
6665         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6666                    netdev->mtu, new_mtu);
6667         netdev->mtu = new_mtu;
6668
6669         if (netif_running(netdev))
6670                 igb_up(adapter);
6671         else
6672                 igb_reset(adapter);
6673
6674         clear_bit(__IGB_RESETTING, &adapter->state);
6675
6676         return 0;
6677 }
6678
6679 /**
6680  *  igb_update_stats - Update the board statistics counters
6681  *  @adapter: board private structure
6682  **/
6683 void igb_update_stats(struct igb_adapter *adapter)
6684 {
6685         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6686         struct e1000_hw *hw = &adapter->hw;
6687         struct pci_dev *pdev = adapter->pdev;
6688         u32 reg, mpc;
6689         int i;
6690         u64 bytes, packets;
6691         unsigned int start;
6692         u64 _bytes, _packets;
6693
6694         /* Prevent stats update while adapter is being reset, or if the pci
6695          * connection is down.
6696          */
6697         if (adapter->link_speed == 0)
6698                 return;
6699         if (pci_channel_offline(pdev))
6700                 return;
6701
6702         bytes = 0;
6703         packets = 0;
6704
6705         rcu_read_lock();
6706         for (i = 0; i < adapter->num_rx_queues; i++) {
6707                 struct igb_ring *ring = adapter->rx_ring[i];
6708                 u32 rqdpc = rd32(E1000_RQDPC(i));
6709                 if (hw->mac.type >= e1000_i210)
6710                         wr32(E1000_RQDPC(i), 0);
6711
6712                 if (rqdpc) {
6713                         ring->rx_stats.drops += rqdpc;
6714                         net_stats->rx_fifo_errors += rqdpc;
6715                 }
6716
6717                 do {
6718                         start = u64_stats_fetch_begin(&ring->rx_syncp);
6719                         _bytes = ring->rx_stats.bytes;
6720                         _packets = ring->rx_stats.packets;
6721                 } while (u64_stats_fetch_retry(&ring->rx_syncp, start));
6722                 bytes += _bytes;
6723                 packets += _packets;
6724         }
6725
6726         net_stats->rx_bytes = bytes;
6727         net_stats->rx_packets = packets;
6728
6729         bytes = 0;
6730         packets = 0;
6731         for (i = 0; i < adapter->num_tx_queues; i++) {
6732                 struct igb_ring *ring = adapter->tx_ring[i];
6733                 do {
6734                         start = u64_stats_fetch_begin(&ring->tx_syncp);
6735                         _bytes = ring->tx_stats.bytes;
6736                         _packets = ring->tx_stats.packets;
6737                 } while (u64_stats_fetch_retry(&ring->tx_syncp, start));
6738                 bytes += _bytes;
6739                 packets += _packets;
6740         }
6741         net_stats->tx_bytes = bytes;
6742         net_stats->tx_packets = packets;
6743         rcu_read_unlock();
6744
6745         /* read stats registers */
6746         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6747         adapter->stats.gprc += rd32(E1000_GPRC);
6748         adapter->stats.gorc += rd32(E1000_GORCL);
6749         rd32(E1000_GORCH); /* clear GORCL */
6750         adapter->stats.bprc += rd32(E1000_BPRC);
6751         adapter->stats.mprc += rd32(E1000_MPRC);
6752         adapter->stats.roc += rd32(E1000_ROC);
6753
6754         adapter->stats.prc64 += rd32(E1000_PRC64);
6755         adapter->stats.prc127 += rd32(E1000_PRC127);
6756         adapter->stats.prc255 += rd32(E1000_PRC255);
6757         adapter->stats.prc511 += rd32(E1000_PRC511);
6758         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6759         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6760         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6761         adapter->stats.sec += rd32(E1000_SEC);
6762
6763         mpc = rd32(E1000_MPC);
6764         adapter->stats.mpc += mpc;
6765         net_stats->rx_fifo_errors += mpc;
6766         adapter->stats.scc += rd32(E1000_SCC);
6767         adapter->stats.ecol += rd32(E1000_ECOL);
6768         adapter->stats.mcc += rd32(E1000_MCC);
6769         adapter->stats.latecol += rd32(E1000_LATECOL);
6770         adapter->stats.dc += rd32(E1000_DC);
6771         adapter->stats.rlec += rd32(E1000_RLEC);
6772         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6773         adapter->stats.xontxc += rd32(E1000_XONTXC);
6774         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6775         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6776         adapter->stats.fcruc += rd32(E1000_FCRUC);
6777         adapter->stats.gptc += rd32(E1000_GPTC);
6778         adapter->stats.gotc += rd32(E1000_GOTCL);
6779         rd32(E1000_GOTCH); /* clear GOTCL */
6780         adapter->stats.rnbc += rd32(E1000_RNBC);
6781         adapter->stats.ruc += rd32(E1000_RUC);
6782         adapter->stats.rfc += rd32(E1000_RFC);
6783         adapter->stats.rjc += rd32(E1000_RJC);
6784         adapter->stats.tor += rd32(E1000_TORH);
6785         adapter->stats.tot += rd32(E1000_TOTH);
6786         adapter->stats.tpr += rd32(E1000_TPR);
6787
6788         adapter->stats.ptc64 += rd32(E1000_PTC64);
6789         adapter->stats.ptc127 += rd32(E1000_PTC127);
6790         adapter->stats.ptc255 += rd32(E1000_PTC255);
6791         adapter->stats.ptc511 += rd32(E1000_PTC511);
6792         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6793         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6794
6795         adapter->stats.mptc += rd32(E1000_MPTC);
6796         adapter->stats.bptc += rd32(E1000_BPTC);
6797
6798         adapter->stats.tpt += rd32(E1000_TPT);
6799         adapter->stats.colc += rd32(E1000_COLC);
6800
6801         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6802         /* read internal phy specific stats */
6803         reg = rd32(E1000_CTRL_EXT);
6804         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6805                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6806
6807                 /* this stat has invalid values on i210/i211 */
6808                 if ((hw->mac.type != e1000_i210) &&
6809                     (hw->mac.type != e1000_i211))
6810                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6811         }
6812
6813         adapter->stats.tsctc += rd32(E1000_TSCTC);
6814         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6815
6816         adapter->stats.iac += rd32(E1000_IAC);
6817         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6818         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6819         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6820         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6821         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6822         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6823         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6824         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6825
6826         /* Fill out the OS statistics structure */
6827         net_stats->multicast = adapter->stats.mprc;
6828         net_stats->collisions = adapter->stats.colc;
6829
6830         /* Rx Errors */
6831
6832         /* RLEC on some newer hardware can be incorrect so build
6833          * our own version based on RUC and ROC
6834          */
6835         net_stats->rx_errors = adapter->stats.rxerrc +
6836                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6837                 adapter->stats.ruc + adapter->stats.roc +
6838                 adapter->stats.cexterr;
6839         net_stats->rx_length_errors = adapter->stats.ruc +
6840                                       adapter->stats.roc;
6841         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6842         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6843         net_stats->rx_missed_errors = adapter->stats.mpc;
6844
6845         /* Tx Errors */
6846         net_stats->tx_errors = adapter->stats.ecol +
6847                                adapter->stats.latecol;
6848         net_stats->tx_aborted_errors = adapter->stats.ecol;
6849         net_stats->tx_window_errors = adapter->stats.latecol;
6850         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6851
6852         /* Tx Dropped needs to be maintained elsewhere */
6853
6854         /* Management Stats */
6855         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6856         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6857         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6858
6859         /* OS2BMC Stats */
6860         reg = rd32(E1000_MANC);
6861         if (reg & E1000_MANC_EN_BMC2OS) {
6862                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6863                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6864                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6865                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6866         }
6867 }
6868
6869 static void igb_perout(struct igb_adapter *adapter, int tsintr_tt)
6870 {
6871         int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_PEROUT, tsintr_tt);
6872         struct e1000_hw *hw = &adapter->hw;
6873         struct timespec64 ts;
6874         u32 tsauxc;
6875
6876         if (pin < 0 || pin >= IGB_N_SDP)
6877                 return;
6878
6879         spin_lock(&adapter->tmreg_lock);
6880
6881         if (hw->mac.type == e1000_82580 ||
6882             hw->mac.type == e1000_i354 ||
6883             hw->mac.type == e1000_i350) {
6884                 s64 ns = timespec64_to_ns(&adapter->perout[tsintr_tt].period);
6885                 u32 systiml, systimh, level_mask, level, rem;
6886                 u64 systim, now;
6887
6888                 /* read systim registers in sequence */
6889                 rd32(E1000_SYSTIMR);
6890                 systiml = rd32(E1000_SYSTIML);
6891                 systimh = rd32(E1000_SYSTIMH);
6892                 systim = (((u64)(systimh & 0xFF)) << 32) | ((u64)systiml);
6893                 now = timecounter_cyc2time(&adapter->tc, systim);
6894
6895                 if (pin < 2) {
6896                         level_mask = (tsintr_tt == 1) ? 0x80000 : 0x40000;
6897                         level = (rd32(E1000_CTRL) & level_mask) ? 1 : 0;
6898                 } else {
6899                         level_mask = (tsintr_tt == 1) ? 0x80 : 0x40;
6900                         level = (rd32(E1000_CTRL_EXT) & level_mask) ? 1 : 0;
6901                 }
6902
6903                 div_u64_rem(now, ns, &rem);
6904                 systim = systim + (ns - rem);
6905
6906                 /* synchronize pin level with rising/falling edges */
6907                 div_u64_rem(now, ns << 1, &rem);
6908                 if (rem < ns) {
6909                         /* first half of period */
6910                         if (level == 0) {
6911                                 /* output is already low, skip this period */
6912                                 systim += ns;
6913                                 pr_notice("igb: periodic output on %s missed falling edge\n",
6914                                           adapter->sdp_config[pin].name);
6915                         }
6916                 } else {
6917                         /* second half of period */
6918                         if (level == 1) {
6919                                 /* output is already high, skip this period */
6920                                 systim += ns;
6921                                 pr_notice("igb: periodic output on %s missed rising edge\n",
6922                                           adapter->sdp_config[pin].name);
6923                         }
6924                 }
6925
6926                 /* for this chip family tv_sec is the upper part of the binary value,
6927                  * so not seconds
6928                  */
6929                 ts.tv_nsec = (u32)systim;
6930                 ts.tv_sec  = ((u32)(systim >> 32)) & 0xFF;
6931         } else {
6932                 ts = timespec64_add(adapter->perout[tsintr_tt].start,
6933                                     adapter->perout[tsintr_tt].period);
6934         }
6935
6936         /* u32 conversion of tv_sec is safe until y2106 */
6937         wr32((tsintr_tt == 1) ? E1000_TRGTTIML1 : E1000_TRGTTIML0, ts.tv_nsec);
6938         wr32((tsintr_tt == 1) ? E1000_TRGTTIMH1 : E1000_TRGTTIMH0, (u32)ts.tv_sec);
6939         tsauxc = rd32(E1000_TSAUXC);
6940         tsauxc |= TSAUXC_EN_TT0;
6941         wr32(E1000_TSAUXC, tsauxc);
6942         adapter->perout[tsintr_tt].start = ts;
6943
6944         spin_unlock(&adapter->tmreg_lock);
6945 }
6946
6947 static void igb_extts(struct igb_adapter *adapter, int tsintr_tt)
6948 {
6949         int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_EXTTS, tsintr_tt);
6950         int auxstmpl = (tsintr_tt == 1) ? E1000_AUXSTMPL1 : E1000_AUXSTMPL0;
6951         int auxstmph = (tsintr_tt == 1) ? E1000_AUXSTMPH1 : E1000_AUXSTMPH0;
6952         struct e1000_hw *hw = &adapter->hw;
6953         struct ptp_clock_event event;
6954         struct timespec64 ts;
6955         unsigned long flags;
6956
6957         if (pin < 0 || pin >= IGB_N_SDP)
6958                 return;
6959
6960         if (hw->mac.type == e1000_82580 ||
6961             hw->mac.type == e1000_i354 ||
6962             hw->mac.type == e1000_i350) {
6963                 u64 ns = rd32(auxstmpl);
6964
6965                 ns += ((u64)(rd32(auxstmph) & 0xFF)) << 32;
6966                 spin_lock_irqsave(&adapter->tmreg_lock, flags);
6967                 ns = timecounter_cyc2time(&adapter->tc, ns);
6968                 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
6969                 ts = ns_to_timespec64(ns);
6970         } else {
6971                 ts.tv_nsec = rd32(auxstmpl);
6972                 ts.tv_sec  = rd32(auxstmph);
6973         }
6974
6975         event.type = PTP_CLOCK_EXTTS;
6976         event.index = tsintr_tt;
6977         event.timestamp = ts.tv_sec * 1000000000ULL + ts.tv_nsec;
6978         ptp_clock_event(adapter->ptp_clock, &event);
6979 }
6980
6981 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6982 {
6983         struct e1000_hw *hw = &adapter->hw;
6984         u32 ack = 0, tsicr = rd32(E1000_TSICR);
6985         struct ptp_clock_event event;
6986
6987         if (tsicr & TSINTR_SYS_WRAP) {
6988                 event.type = PTP_CLOCK_PPS;
6989                 if (adapter->ptp_caps.pps)
6990                         ptp_clock_event(adapter->ptp_clock, &event);
6991                 ack |= TSINTR_SYS_WRAP;
6992         }
6993
6994         if (tsicr & E1000_TSICR_TXTS) {
6995                 /* retrieve hardware timestamp */
6996                 schedule_work(&adapter->ptp_tx_work);
6997                 ack |= E1000_TSICR_TXTS;
6998         }
6999
7000         if (tsicr & TSINTR_TT0) {
7001                 igb_perout(adapter, 0);
7002                 ack |= TSINTR_TT0;
7003         }
7004
7005         if (tsicr & TSINTR_TT1) {
7006                 igb_perout(adapter, 1);
7007                 ack |= TSINTR_TT1;
7008         }
7009
7010         if (tsicr & TSINTR_AUTT0) {
7011                 igb_extts(adapter, 0);
7012                 ack |= TSINTR_AUTT0;
7013         }
7014
7015         if (tsicr & TSINTR_AUTT1) {
7016                 igb_extts(adapter, 1);
7017                 ack |= TSINTR_AUTT1;
7018         }
7019
7020         /* acknowledge the interrupts */
7021         wr32(E1000_TSICR, ack);
7022 }
7023
7024 static irqreturn_t igb_msix_other(int irq, void *data)
7025 {
7026         struct igb_adapter *adapter = data;
7027         struct e1000_hw *hw = &adapter->hw;
7028         u32 icr = rd32(E1000_ICR);
7029         /* reading ICR causes bit 31 of EICR to be cleared */
7030
7031         if (icr & E1000_ICR_DRSTA)
7032                 schedule_work(&adapter->reset_task);
7033
7034         if (icr & E1000_ICR_DOUTSYNC) {
7035                 /* HW is reporting DMA is out of sync */
7036                 adapter->stats.doosync++;
7037                 /* The DMA Out of Sync is also indication of a spoof event
7038                  * in IOV mode. Check the Wrong VM Behavior register to
7039                  * see if it is really a spoof event.
7040                  */
7041                 igb_check_wvbr(adapter);
7042         }
7043
7044         /* Check for a mailbox event */
7045         if (icr & E1000_ICR_VMMB)
7046                 igb_msg_task(adapter);
7047
7048         if (icr & E1000_ICR_LSC) {
7049                 hw->mac.get_link_status = 1;
7050                 /* guard against interrupt when we're going down */
7051                 if (!test_bit(__IGB_DOWN, &adapter->state))
7052                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7053         }
7054
7055         if (icr & E1000_ICR_TS)
7056                 igb_tsync_interrupt(adapter);
7057
7058         wr32(E1000_EIMS, adapter->eims_other);
7059
7060         return IRQ_HANDLED;
7061 }
7062
7063 static void igb_write_itr(struct igb_q_vector *q_vector)
7064 {
7065         struct igb_adapter *adapter = q_vector->adapter;
7066         u32 itr_val = q_vector->itr_val & 0x7FFC;
7067
7068         if (!q_vector->set_itr)
7069                 return;
7070
7071         if (!itr_val)
7072                 itr_val = 0x4;
7073
7074         if (adapter->hw.mac.type == e1000_82575)
7075                 itr_val |= itr_val << 16;
7076         else
7077                 itr_val |= E1000_EITR_CNT_IGNR;
7078
7079         writel(itr_val, q_vector->itr_register);
7080         q_vector->set_itr = 0;
7081 }
7082
7083 static irqreturn_t igb_msix_ring(int irq, void *data)
7084 {
7085         struct igb_q_vector *q_vector = data;
7086
7087         /* Write the ITR value calculated from the previous interrupt. */
7088         igb_write_itr(q_vector);
7089
7090         napi_schedule(&q_vector->napi);
7091
7092         return IRQ_HANDLED;
7093 }
7094
7095 #ifdef CONFIG_IGB_DCA
7096 static void igb_update_tx_dca(struct igb_adapter *adapter,
7097                               struct igb_ring *tx_ring,
7098                               int cpu)
7099 {
7100         struct e1000_hw *hw = &adapter->hw;
7101         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
7102
7103         if (hw->mac.type != e1000_82575)
7104                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
7105
7106         /* We can enable relaxed ordering for reads, but not writes when
7107          * DCA is enabled.  This is due to a known issue in some chipsets
7108          * which will cause the DCA tag to be cleared.
7109          */
7110         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
7111                   E1000_DCA_TXCTRL_DATA_RRO_EN |
7112                   E1000_DCA_TXCTRL_DESC_DCA_EN;
7113
7114         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
7115 }
7116
7117 static void igb_update_rx_dca(struct igb_adapter *adapter,
7118                               struct igb_ring *rx_ring,
7119                               int cpu)
7120 {
7121         struct e1000_hw *hw = &adapter->hw;
7122         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
7123
7124         if (hw->mac.type != e1000_82575)
7125                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
7126
7127         /* We can enable relaxed ordering for reads, but not writes when
7128          * DCA is enabled.  This is due to a known issue in some chipsets
7129          * which will cause the DCA tag to be cleared.
7130          */
7131         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
7132                   E1000_DCA_RXCTRL_DESC_DCA_EN;
7133
7134         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
7135 }
7136
7137 static void igb_update_dca(struct igb_q_vector *q_vector)
7138 {
7139         struct igb_adapter *adapter = q_vector->adapter;
7140         int cpu = get_cpu();
7141
7142         if (q_vector->cpu == cpu)
7143                 goto out_no_update;
7144
7145         if (q_vector->tx.ring)
7146                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
7147
7148         if (q_vector->rx.ring)
7149                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
7150
7151         q_vector->cpu = cpu;
7152 out_no_update:
7153         put_cpu();
7154 }
7155
7156 static void igb_setup_dca(struct igb_adapter *adapter)
7157 {
7158         struct e1000_hw *hw = &adapter->hw;
7159         int i;
7160
7161         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
7162                 return;
7163
7164         /* Always use CB2 mode, difference is masked in the CB driver. */
7165         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
7166
7167         for (i = 0; i < adapter->num_q_vectors; i++) {
7168                 adapter->q_vector[i]->cpu = -1;
7169                 igb_update_dca(adapter->q_vector[i]);
7170         }
7171 }
7172
7173 static int __igb_notify_dca(struct device *dev, void *data)
7174 {
7175         struct net_device *netdev = dev_get_drvdata(dev);
7176         struct igb_adapter *adapter = netdev_priv(netdev);
7177         struct pci_dev *pdev = adapter->pdev;
7178         struct e1000_hw *hw = &adapter->hw;
7179         unsigned long event = *(unsigned long *)data;
7180
7181         switch (event) {
7182         case DCA_PROVIDER_ADD:
7183                 /* if already enabled, don't do it again */
7184                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
7185                         break;
7186                 if (dca_add_requester(dev) == 0) {
7187                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
7188                         dev_info(&pdev->dev, "DCA enabled\n");
7189                         igb_setup_dca(adapter);
7190                         break;
7191                 }
7192                 fallthrough; /* since DCA is disabled. */
7193         case DCA_PROVIDER_REMOVE:
7194                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
7195                         /* without this a class_device is left
7196                          * hanging around in the sysfs model
7197                          */
7198                         dca_remove_requester(dev);
7199                         dev_info(&pdev->dev, "DCA disabled\n");
7200                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
7201                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
7202                 }
7203                 break;
7204         }
7205
7206         return 0;
7207 }
7208
7209 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
7210                           void *p)
7211 {
7212         int ret_val;
7213
7214         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
7215                                          __igb_notify_dca);
7216
7217         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7218 }
7219 #endif /* CONFIG_IGB_DCA */
7220
7221 #ifdef CONFIG_PCI_IOV
7222 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
7223 {
7224         unsigned char mac_addr[ETH_ALEN];
7225
7226         eth_zero_addr(mac_addr);
7227         igb_set_vf_mac(adapter, vf, mac_addr);
7228
7229         /* By default spoof check is enabled for all VFs */
7230         adapter->vf_data[vf].spoofchk_enabled = true;
7231
7232         /* By default VFs are not trusted */
7233         adapter->vf_data[vf].trusted = false;
7234
7235         return 0;
7236 }
7237
7238 #endif
7239 static void igb_ping_all_vfs(struct igb_adapter *adapter)
7240 {
7241         struct e1000_hw *hw = &adapter->hw;
7242         u32 ping;
7243         int i;
7244
7245         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
7246                 ping = E1000_PF_CONTROL_MSG;
7247                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
7248                         ping |= E1000_VT_MSGTYPE_CTS;
7249                 igb_write_mbx(hw, &ping, 1, i);
7250         }
7251 }
7252
7253 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7254 {
7255         struct e1000_hw *hw = &adapter->hw;
7256         u32 vmolr = rd32(E1000_VMOLR(vf));
7257         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7258
7259         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
7260                             IGB_VF_FLAG_MULTI_PROMISC);
7261         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7262
7263         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
7264                 vmolr |= E1000_VMOLR_MPME;
7265                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
7266                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
7267         } else {
7268                 /* if we have hashes and we are clearing a multicast promisc
7269                  * flag we need to write the hashes to the MTA as this step
7270                  * was previously skipped
7271                  */
7272                 if (vf_data->num_vf_mc_hashes > 30) {
7273                         vmolr |= E1000_VMOLR_MPME;
7274                 } else if (vf_data->num_vf_mc_hashes) {
7275                         int j;
7276
7277                         vmolr |= E1000_VMOLR_ROMPE;
7278                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7279                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7280                 }
7281         }
7282
7283         wr32(E1000_VMOLR(vf), vmolr);
7284
7285         /* there are flags left unprocessed, likely not supported */
7286         if (*msgbuf & E1000_VT_MSGINFO_MASK)
7287                 return -EINVAL;
7288
7289         return 0;
7290 }
7291
7292 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
7293                                   u32 *msgbuf, u32 vf)
7294 {
7295         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7296         u16 *hash_list = (u16 *)&msgbuf[1];
7297         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7298         int i;
7299
7300         /* salt away the number of multicast addresses assigned
7301          * to this VF for later use to restore when the PF multi cast
7302          * list changes
7303          */
7304         vf_data->num_vf_mc_hashes = n;
7305
7306         /* only up to 30 hash values supported */
7307         if (n > 30)
7308                 n = 30;
7309
7310         /* store the hashes for later use */
7311         for (i = 0; i < n; i++)
7312                 vf_data->vf_mc_hashes[i] = hash_list[i];
7313
7314         /* Flush and reset the mta with the new values */
7315         igb_set_rx_mode(adapter->netdev);
7316
7317         return 0;
7318 }
7319
7320 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
7321 {
7322         struct e1000_hw *hw = &adapter->hw;
7323         struct vf_data_storage *vf_data;
7324         int i, j;
7325
7326         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7327                 u32 vmolr = rd32(E1000_VMOLR(i));
7328
7329                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7330
7331                 vf_data = &adapter->vf_data[i];
7332
7333                 if ((vf_data->num_vf_mc_hashes > 30) ||
7334                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
7335                         vmolr |= E1000_VMOLR_MPME;
7336                 } else if (vf_data->num_vf_mc_hashes) {
7337                         vmolr |= E1000_VMOLR_ROMPE;
7338                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7339                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7340                 }
7341                 wr32(E1000_VMOLR(i), vmolr);
7342         }
7343 }
7344
7345 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
7346 {
7347         struct e1000_hw *hw = &adapter->hw;
7348         u32 pool_mask, vlvf_mask, i;
7349
7350         /* create mask for VF and other pools */
7351         pool_mask = E1000_VLVF_POOLSEL_MASK;
7352         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
7353
7354         /* drop PF from pool bits */
7355         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
7356                              adapter->vfs_allocated_count);
7357
7358         /* Find the vlan filter for this id */
7359         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
7360                 u32 vlvf = rd32(E1000_VLVF(i));
7361                 u32 vfta_mask, vid, vfta;
7362
7363                 /* remove the vf from the pool */
7364                 if (!(vlvf & vlvf_mask))
7365                         continue;
7366
7367                 /* clear out bit from VLVF */
7368                 vlvf ^= vlvf_mask;
7369
7370                 /* if other pools are present, just remove ourselves */
7371                 if (vlvf & pool_mask)
7372                         goto update_vlvfb;
7373
7374                 /* if PF is present, leave VFTA */
7375                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
7376                         goto update_vlvf;
7377
7378                 vid = vlvf & E1000_VLVF_VLANID_MASK;
7379                 vfta_mask = BIT(vid % 32);
7380
7381                 /* clear bit from VFTA */
7382                 vfta = adapter->shadow_vfta[vid / 32];
7383                 if (vfta & vfta_mask)
7384                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
7385 update_vlvf:
7386                 /* clear pool selection enable */
7387                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7388                         vlvf &= E1000_VLVF_POOLSEL_MASK;
7389                 else
7390                         vlvf = 0;
7391 update_vlvfb:
7392                 /* clear pool bits */
7393                 wr32(E1000_VLVF(i), vlvf);
7394         }
7395 }
7396
7397 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
7398 {
7399         u32 vlvf;
7400         int idx;
7401
7402         /* short cut the special case */
7403         if (vlan == 0)
7404                 return 0;
7405
7406         /* Search for the VLAN id in the VLVF entries */
7407         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
7408                 vlvf = rd32(E1000_VLVF(idx));
7409                 if ((vlvf & VLAN_VID_MASK) == vlan)
7410                         break;
7411         }
7412
7413         return idx;
7414 }
7415
7416 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
7417 {
7418         struct e1000_hw *hw = &adapter->hw;
7419         u32 bits, pf_id;
7420         int idx;
7421
7422         idx = igb_find_vlvf_entry(hw, vid);
7423         if (!idx)
7424                 return;
7425
7426         /* See if any other pools are set for this VLAN filter
7427          * entry other than the PF.
7428          */
7429         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
7430         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
7431         bits &= rd32(E1000_VLVF(idx));
7432
7433         /* Disable the filter so this falls into the default pool. */
7434         if (!bits) {
7435                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7436                         wr32(E1000_VLVF(idx), BIT(pf_id));
7437                 else
7438                         wr32(E1000_VLVF(idx), 0);
7439         }
7440 }
7441
7442 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
7443                            bool add, u32 vf)
7444 {
7445         int pf_id = adapter->vfs_allocated_count;
7446         struct e1000_hw *hw = &adapter->hw;
7447         int err;
7448
7449         /* If VLAN overlaps with one the PF is currently monitoring make
7450          * sure that we are able to allocate a VLVF entry.  This may be
7451          * redundant but it guarantees PF will maintain visibility to
7452          * the VLAN.
7453          */
7454         if (add && test_bit(vid, adapter->active_vlans)) {
7455                 err = igb_vfta_set(hw, vid, pf_id, true, false);
7456                 if (err)
7457                         return err;
7458         }
7459
7460         err = igb_vfta_set(hw, vid, vf, add, false);
7461
7462         if (add && !err)
7463                 return err;
7464
7465         /* If we failed to add the VF VLAN or we are removing the VF VLAN
7466          * we may need to drop the PF pool bit in order to allow us to free
7467          * up the VLVF resources.
7468          */
7469         if (test_bit(vid, adapter->active_vlans) ||
7470             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
7471                 igb_update_pf_vlvf(adapter, vid);
7472
7473         return err;
7474 }
7475
7476 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7477 {
7478         struct e1000_hw *hw = &adapter->hw;
7479
7480         if (vid)
7481                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7482         else
7483                 wr32(E1000_VMVIR(vf), 0);
7484 }
7485
7486 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7487                                 u16 vlan, u8 qos)
7488 {
7489         int err;
7490
7491         err = igb_set_vf_vlan(adapter, vlan, true, vf);
7492         if (err)
7493                 return err;
7494
7495         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7496         igb_set_vmolr(adapter, vf, !vlan);
7497
7498         /* revoke access to previous VLAN */
7499         if (vlan != adapter->vf_data[vf].pf_vlan)
7500                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7501                                 false, vf);
7502
7503         adapter->vf_data[vf].pf_vlan = vlan;
7504         adapter->vf_data[vf].pf_qos = qos;
7505         igb_set_vf_vlan_strip(adapter, vf, true);
7506         dev_info(&adapter->pdev->dev,
7507                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7508         if (test_bit(__IGB_DOWN, &adapter->state)) {
7509                 dev_warn(&adapter->pdev->dev,
7510                          "The VF VLAN has been set, but the PF device is not up.\n");
7511                 dev_warn(&adapter->pdev->dev,
7512                          "Bring the PF device up before attempting to use the VF device.\n");
7513         }
7514
7515         return err;
7516 }
7517
7518 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7519 {
7520         /* Restore tagless access via VLAN 0 */
7521         igb_set_vf_vlan(adapter, 0, true, vf);
7522
7523         igb_set_vmvir(adapter, 0, vf);
7524         igb_set_vmolr(adapter, vf, true);
7525
7526         /* Remove any PF assigned VLAN */
7527         if (adapter->vf_data[vf].pf_vlan)
7528                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7529                                 false, vf);
7530
7531         adapter->vf_data[vf].pf_vlan = 0;
7532         adapter->vf_data[vf].pf_qos = 0;
7533         igb_set_vf_vlan_strip(adapter, vf, false);
7534
7535         return 0;
7536 }
7537
7538 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7539                                u16 vlan, u8 qos, __be16 vlan_proto)
7540 {
7541         struct igb_adapter *adapter = netdev_priv(netdev);
7542
7543         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7544                 return -EINVAL;
7545
7546         if (vlan_proto != htons(ETH_P_8021Q))
7547                 return -EPROTONOSUPPORT;
7548
7549         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7550                                igb_disable_port_vlan(adapter, vf);
7551 }
7552
7553 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7554 {
7555         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7556         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7557         int ret;
7558
7559         if (adapter->vf_data[vf].pf_vlan)
7560                 return -1;
7561
7562         /* VLAN 0 is a special case, don't allow it to be removed */
7563         if (!vid && !add)
7564                 return 0;
7565
7566         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7567         if (!ret)
7568                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7569         return ret;
7570 }
7571
7572 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7573 {
7574         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7575
7576         /* clear flags - except flag that indicates PF has set the MAC */
7577         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7578         vf_data->last_nack = jiffies;
7579
7580         /* reset vlans for device */
7581         igb_clear_vf_vfta(adapter, vf);
7582         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7583         igb_set_vmvir(adapter, vf_data->pf_vlan |
7584                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7585         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7586         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7587
7588         /* reset multicast table array for vf */
7589         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7590
7591         /* Flush and reset the mta with the new values */
7592         igb_set_rx_mode(adapter->netdev);
7593 }
7594
7595 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7596 {
7597         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7598
7599         /* clear mac address as we were hotplug removed/added */
7600         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7601                 eth_zero_addr(vf_mac);
7602
7603         /* process remaining reset events */
7604         igb_vf_reset(adapter, vf);
7605 }
7606
7607 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7608 {
7609         struct e1000_hw *hw = &adapter->hw;
7610         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7611         u32 reg, msgbuf[3] = {};
7612         u8 *addr = (u8 *)(&msgbuf[1]);
7613
7614         /* process all the same items cleared in a function level reset */
7615         igb_vf_reset(adapter, vf);
7616
7617         /* set vf mac address */
7618         igb_set_vf_mac(adapter, vf, vf_mac);
7619
7620         /* enable transmit and receive for vf */
7621         reg = rd32(E1000_VFTE);
7622         wr32(E1000_VFTE, reg | BIT(vf));
7623         reg = rd32(E1000_VFRE);
7624         wr32(E1000_VFRE, reg | BIT(vf));
7625
7626         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7627
7628         /* reply to reset with ack and vf mac address */
7629         if (!is_zero_ether_addr(vf_mac)) {
7630                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7631                 memcpy(addr, vf_mac, ETH_ALEN);
7632         } else {
7633                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7634         }
7635         igb_write_mbx(hw, msgbuf, 3, vf);
7636 }
7637
7638 static void igb_flush_mac_table(struct igb_adapter *adapter)
7639 {
7640         struct e1000_hw *hw = &adapter->hw;
7641         int i;
7642
7643         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7644                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7645                 eth_zero_addr(adapter->mac_table[i].addr);
7646                 adapter->mac_table[i].queue = 0;
7647                 igb_rar_set_index(adapter, i);
7648         }
7649 }
7650
7651 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7652 {
7653         struct e1000_hw *hw = &adapter->hw;
7654         /* do not count rar entries reserved for VFs MAC addresses */
7655         int rar_entries = hw->mac.rar_entry_count -
7656                           adapter->vfs_allocated_count;
7657         int i, count = 0;
7658
7659         for (i = 0; i < rar_entries; i++) {
7660                 /* do not count default entries */
7661                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7662                         continue;
7663
7664                 /* do not count "in use" entries for different queues */
7665                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7666                     (adapter->mac_table[i].queue != queue))
7667                         continue;
7668
7669                 count++;
7670         }
7671
7672         return count;
7673 }
7674
7675 /* Set default MAC address for the PF in the first RAR entry */
7676 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7677 {
7678         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7679
7680         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7681         mac_table->queue = adapter->vfs_allocated_count;
7682         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7683
7684         igb_rar_set_index(adapter, 0);
7685 }
7686
7687 /* If the filter to be added and an already existing filter express
7688  * the same address and address type, it should be possible to only
7689  * override the other configurations, for example the queue to steer
7690  * traffic.
7691  */
7692 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7693                                       const u8 *addr, const u8 flags)
7694 {
7695         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7696                 return true;
7697
7698         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7699             (flags & IGB_MAC_STATE_SRC_ADDR))
7700                 return false;
7701
7702         if (!ether_addr_equal(addr, entry->addr))
7703                 return false;
7704
7705         return true;
7706 }
7707
7708 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7709  * 'flags' is used to indicate what kind of match is made, match is by
7710  * default for the destination address, if matching by source address
7711  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7712  */
7713 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7714                                     const u8 *addr, const u8 queue,
7715                                     const u8 flags)
7716 {
7717         struct e1000_hw *hw = &adapter->hw;
7718         int rar_entries = hw->mac.rar_entry_count -
7719                           adapter->vfs_allocated_count;
7720         int i;
7721
7722         if (is_zero_ether_addr(addr))
7723                 return -EINVAL;
7724
7725         /* Search for the first empty entry in the MAC table.
7726          * Do not touch entries at the end of the table reserved for the VF MAC
7727          * addresses.
7728          */
7729         for (i = 0; i < rar_entries; i++) {
7730                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7731                                                addr, flags))
7732                         continue;
7733
7734                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7735                 adapter->mac_table[i].queue = queue;
7736                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7737
7738                 igb_rar_set_index(adapter, i);
7739                 return i;
7740         }
7741
7742         return -ENOSPC;
7743 }
7744
7745 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7746                               const u8 queue)
7747 {
7748         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7749 }
7750
7751 /* Remove a MAC filter for 'addr' directing matching traffic to
7752  * 'queue', 'flags' is used to indicate what kind of match need to be
7753  * removed, match is by default for the destination address, if
7754  * matching by source address is to be removed the flag
7755  * IGB_MAC_STATE_SRC_ADDR can be used.
7756  */
7757 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7758                                     const u8 *addr, const u8 queue,
7759                                     const u8 flags)
7760 {
7761         struct e1000_hw *hw = &adapter->hw;
7762         int rar_entries = hw->mac.rar_entry_count -
7763                           adapter->vfs_allocated_count;
7764         int i;
7765
7766         if (is_zero_ether_addr(addr))
7767                 return -EINVAL;
7768
7769         /* Search for matching entry in the MAC table based on given address
7770          * and queue. Do not touch entries at the end of the table reserved
7771          * for the VF MAC addresses.
7772          */
7773         for (i = 0; i < rar_entries; i++) {
7774                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7775                         continue;
7776                 if ((adapter->mac_table[i].state & flags) != flags)
7777                         continue;
7778                 if (adapter->mac_table[i].queue != queue)
7779                         continue;
7780                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7781                         continue;
7782
7783                 /* When a filter for the default address is "deleted",
7784                  * we return it to its initial configuration
7785                  */
7786                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7787                         adapter->mac_table[i].state =
7788                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7789                         adapter->mac_table[i].queue =
7790                                 adapter->vfs_allocated_count;
7791                 } else {
7792                         adapter->mac_table[i].state = 0;
7793                         adapter->mac_table[i].queue = 0;
7794                         eth_zero_addr(adapter->mac_table[i].addr);
7795                 }
7796
7797                 igb_rar_set_index(adapter, i);
7798                 return 0;
7799         }
7800
7801         return -ENOENT;
7802 }
7803
7804 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7805                               const u8 queue)
7806 {
7807         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7808 }
7809
7810 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7811                                 const u8 *addr, u8 queue, u8 flags)
7812 {
7813         struct e1000_hw *hw = &adapter->hw;
7814
7815         /* In theory, this should be supported on 82575 as well, but
7816          * that part wasn't easily accessible during development.
7817          */
7818         if (hw->mac.type != e1000_i210)
7819                 return -EOPNOTSUPP;
7820
7821         return igb_add_mac_filter_flags(adapter, addr, queue,
7822                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7823 }
7824
7825 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7826                                 const u8 *addr, u8 queue, u8 flags)
7827 {
7828         return igb_del_mac_filter_flags(adapter, addr, queue,
7829                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7830 }
7831
7832 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7833 {
7834         struct igb_adapter *adapter = netdev_priv(netdev);
7835         int ret;
7836
7837         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7838
7839         return min_t(int, ret, 0);
7840 }
7841
7842 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7843 {
7844         struct igb_adapter *adapter = netdev_priv(netdev);
7845
7846         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7847
7848         return 0;
7849 }
7850
7851 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7852                                  const u32 info, const u8 *addr)
7853 {
7854         struct pci_dev *pdev = adapter->pdev;
7855         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7856         struct list_head *pos;
7857         struct vf_mac_filter *entry = NULL;
7858         int ret = 0;
7859
7860         if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7861             !vf_data->trusted) {
7862                 dev_warn(&pdev->dev,
7863                          "VF %d requested MAC filter but is administratively denied\n",
7864                           vf);
7865                 return -EINVAL;
7866         }
7867         if (!is_valid_ether_addr(addr)) {
7868                 dev_warn(&pdev->dev,
7869                          "VF %d attempted to set invalid MAC filter\n",
7870                           vf);
7871                 return -EINVAL;
7872         }
7873
7874         switch (info) {
7875         case E1000_VF_MAC_FILTER_CLR:
7876                 /* remove all unicast MAC filters related to the current VF */
7877                 list_for_each(pos, &adapter->vf_macs.l) {
7878                         entry = list_entry(pos, struct vf_mac_filter, l);
7879                         if (entry->vf == vf) {
7880                                 entry->vf = -1;
7881                                 entry->free = true;
7882                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7883                         }
7884                 }
7885                 break;
7886         case E1000_VF_MAC_FILTER_ADD:
7887                 /* try to find empty slot in the list */
7888                 list_for_each(pos, &adapter->vf_macs.l) {
7889                         entry = list_entry(pos, struct vf_mac_filter, l);
7890                         if (entry->free)
7891                                 break;
7892                 }
7893
7894                 if (entry && entry->free) {
7895                         entry->free = false;
7896                         entry->vf = vf;
7897                         ether_addr_copy(entry->vf_mac, addr);
7898
7899                         ret = igb_add_mac_filter(adapter, addr, vf);
7900                         ret = min_t(int, ret, 0);
7901                 } else {
7902                         ret = -ENOSPC;
7903                 }
7904
7905                 if (ret == -ENOSPC)
7906                         dev_warn(&pdev->dev,
7907                                  "VF %d has requested MAC filter but there is no space for it\n",
7908                                  vf);
7909                 break;
7910         default:
7911                 ret = -EINVAL;
7912                 break;
7913         }
7914
7915         return ret;
7916 }
7917
7918 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7919 {
7920         struct pci_dev *pdev = adapter->pdev;
7921         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7922         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7923
7924         /* The VF MAC Address is stored in a packed array of bytes
7925          * starting at the second 32 bit word of the msg array
7926          */
7927         unsigned char *addr = (unsigned char *)&msg[1];
7928         int ret = 0;
7929
7930         if (!info) {
7931                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7932                     !vf_data->trusted) {
7933                         dev_warn(&pdev->dev,
7934                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7935                                  vf);
7936                         return -EINVAL;
7937                 }
7938
7939                 if (!is_valid_ether_addr(addr)) {
7940                         dev_warn(&pdev->dev,
7941                                  "VF %d attempted to set invalid MAC\n",
7942                                  vf);
7943                         return -EINVAL;
7944                 }
7945
7946                 ret = igb_set_vf_mac(adapter, vf, addr);
7947         } else {
7948                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7949         }
7950
7951         return ret;
7952 }
7953
7954 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7955 {
7956         struct e1000_hw *hw = &adapter->hw;
7957         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7958         u32 msg = E1000_VT_MSGTYPE_NACK;
7959
7960         /* if device isn't clear to send it shouldn't be reading either */
7961         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7962             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7963                 igb_write_mbx(hw, &msg, 1, vf);
7964                 vf_data->last_nack = jiffies;
7965         }
7966 }
7967
7968 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7969 {
7970         struct pci_dev *pdev = adapter->pdev;
7971         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7972         struct e1000_hw *hw = &adapter->hw;
7973         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7974         s32 retval;
7975
7976         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7977
7978         if (retval) {
7979                 /* if receive failed revoke VF CTS stats and restart init */
7980                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7981                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7982                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7983                         goto unlock;
7984                 goto out;
7985         }
7986
7987         /* this is a message we already processed, do nothing */
7988         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7989                 goto unlock;
7990
7991         /* until the vf completes a reset it should not be
7992          * allowed to start any configuration.
7993          */
7994         if (msgbuf[0] == E1000_VF_RESET) {
7995                 /* unlocks mailbox */
7996                 igb_vf_reset_msg(adapter, vf);
7997                 return;
7998         }
7999
8000         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
8001                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
8002                         goto unlock;
8003                 retval = -1;
8004                 goto out;
8005         }
8006
8007         switch ((msgbuf[0] & 0xFFFF)) {
8008         case E1000_VF_SET_MAC_ADDR:
8009                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
8010                 break;
8011         case E1000_VF_SET_PROMISC:
8012                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
8013                 break;
8014         case E1000_VF_SET_MULTICAST:
8015                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
8016                 break;
8017         case E1000_VF_SET_LPE:
8018                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
8019                 break;
8020         case E1000_VF_SET_VLAN:
8021                 retval = -1;
8022                 if (vf_data->pf_vlan)
8023                         dev_warn(&pdev->dev,
8024                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
8025                                  vf);
8026                 else
8027                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
8028                 break;
8029         default:
8030                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
8031                 retval = -1;
8032                 break;
8033         }
8034
8035         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
8036 out:
8037         /* notify the VF of the results of what it sent us */
8038         if (retval)
8039                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
8040         else
8041                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
8042
8043         /* unlocks mailbox */
8044         igb_write_mbx(hw, msgbuf, 1, vf);
8045         return;
8046
8047 unlock:
8048         igb_unlock_mbx(hw, vf);
8049 }
8050
8051 static void igb_msg_task(struct igb_adapter *adapter)
8052 {
8053         struct e1000_hw *hw = &adapter->hw;
8054         unsigned long flags;
8055         u32 vf;
8056
8057         spin_lock_irqsave(&adapter->vfs_lock, flags);
8058         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
8059                 /* process any reset requests */
8060                 if (!igb_check_for_rst(hw, vf))
8061                         igb_vf_reset_event(adapter, vf);
8062
8063                 /* process any messages pending */
8064                 if (!igb_check_for_msg(hw, vf))
8065                         igb_rcv_msg_from_vf(adapter, vf);
8066
8067                 /* process any acks */
8068                 if (!igb_check_for_ack(hw, vf))
8069                         igb_rcv_ack_from_vf(adapter, vf);
8070         }
8071         spin_unlock_irqrestore(&adapter->vfs_lock, flags);
8072 }
8073
8074 /**
8075  *  igb_set_uta - Set unicast filter table address
8076  *  @adapter: board private structure
8077  *  @set: boolean indicating if we are setting or clearing bits
8078  *
8079  *  The unicast table address is a register array of 32-bit registers.
8080  *  The table is meant to be used in a way similar to how the MTA is used
8081  *  however due to certain limitations in the hardware it is necessary to
8082  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
8083  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
8084  **/
8085 static void igb_set_uta(struct igb_adapter *adapter, bool set)
8086 {
8087         struct e1000_hw *hw = &adapter->hw;
8088         u32 uta = set ? ~0 : 0;
8089         int i;
8090
8091         /* we only need to do this if VMDq is enabled */
8092         if (!adapter->vfs_allocated_count)
8093                 return;
8094
8095         for (i = hw->mac.uta_reg_count; i--;)
8096                 array_wr32(E1000_UTA, i, uta);
8097 }
8098
8099 /**
8100  *  igb_intr_msi - Interrupt Handler
8101  *  @irq: interrupt number
8102  *  @data: pointer to a network interface device structure
8103  **/
8104 static irqreturn_t igb_intr_msi(int irq, void *data)
8105 {
8106         struct igb_adapter *adapter = data;
8107         struct igb_q_vector *q_vector = adapter->q_vector[0];
8108         struct e1000_hw *hw = &adapter->hw;
8109         /* read ICR disables interrupts using IAM */
8110         u32 icr = rd32(E1000_ICR);
8111
8112         igb_write_itr(q_vector);
8113
8114         if (icr & E1000_ICR_DRSTA)
8115                 schedule_work(&adapter->reset_task);
8116
8117         if (icr & E1000_ICR_DOUTSYNC) {
8118                 /* HW is reporting DMA is out of sync */
8119                 adapter->stats.doosync++;
8120         }
8121
8122         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
8123                 hw->mac.get_link_status = 1;
8124                 if (!test_bit(__IGB_DOWN, &adapter->state))
8125                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
8126         }
8127
8128         if (icr & E1000_ICR_TS)
8129                 igb_tsync_interrupt(adapter);
8130
8131         napi_schedule(&q_vector->napi);
8132
8133         return IRQ_HANDLED;
8134 }
8135
8136 /**
8137  *  igb_intr - Legacy Interrupt Handler
8138  *  @irq: interrupt number
8139  *  @data: pointer to a network interface device structure
8140  **/
8141 static irqreturn_t igb_intr(int irq, void *data)
8142 {
8143         struct igb_adapter *adapter = data;
8144         struct igb_q_vector *q_vector = adapter->q_vector[0];
8145         struct e1000_hw *hw = &adapter->hw;
8146         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
8147          * need for the IMC write
8148          */
8149         u32 icr = rd32(E1000_ICR);
8150
8151         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
8152          * not set, then the adapter didn't send an interrupt
8153          */
8154         if (!(icr & E1000_ICR_INT_ASSERTED))
8155                 return IRQ_NONE;
8156
8157         igb_write_itr(q_vector);
8158
8159         if (icr & E1000_ICR_DRSTA)
8160                 schedule_work(&adapter->reset_task);
8161
8162         if (icr & E1000_ICR_DOUTSYNC) {
8163                 /* HW is reporting DMA is out of sync */
8164                 adapter->stats.doosync++;
8165         }
8166
8167         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
8168                 hw->mac.get_link_status = 1;
8169                 /* guard against interrupt when we're going down */
8170                 if (!test_bit(__IGB_DOWN, &adapter->state))
8171                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
8172         }
8173
8174         if (icr & E1000_ICR_TS)
8175                 igb_tsync_interrupt(adapter);
8176
8177         napi_schedule(&q_vector->napi);
8178
8179         return IRQ_HANDLED;
8180 }
8181
8182 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
8183 {
8184         struct igb_adapter *adapter = q_vector->adapter;
8185         struct e1000_hw *hw = &adapter->hw;
8186
8187         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
8188             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
8189                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
8190                         igb_set_itr(q_vector);
8191                 else
8192                         igb_update_ring_itr(q_vector);
8193         }
8194
8195         if (!test_bit(__IGB_DOWN, &adapter->state)) {
8196                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
8197                         wr32(E1000_EIMS, q_vector->eims_value);
8198                 else
8199                         igb_irq_enable(adapter);
8200         }
8201 }
8202
8203 /**
8204  *  igb_poll - NAPI Rx polling callback
8205  *  @napi: napi polling structure
8206  *  @budget: count of how many packets we should handle
8207  **/
8208 static int igb_poll(struct napi_struct *napi, int budget)
8209 {
8210         struct igb_q_vector *q_vector = container_of(napi,
8211                                                      struct igb_q_vector,
8212                                                      napi);
8213         bool clean_complete = true;
8214         int work_done = 0;
8215
8216 #ifdef CONFIG_IGB_DCA
8217         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
8218                 igb_update_dca(q_vector);
8219 #endif
8220         if (q_vector->tx.ring)
8221                 clean_complete = igb_clean_tx_irq(q_vector, budget);
8222
8223         if (q_vector->rx.ring) {
8224                 int cleaned = igb_clean_rx_irq(q_vector, budget);
8225
8226                 work_done += cleaned;
8227                 if (cleaned >= budget)
8228                         clean_complete = false;
8229         }
8230
8231         /* If all work not completed, return budget and keep polling */
8232         if (!clean_complete)
8233                 return budget;
8234
8235         /* Exit the polling mode, but don't re-enable interrupts if stack might
8236          * poll us due to busy-polling
8237          */
8238         if (likely(napi_complete_done(napi, work_done)))
8239                 igb_ring_irq_enable(q_vector);
8240
8241         return work_done;
8242 }
8243
8244 /**
8245  *  igb_clean_tx_irq - Reclaim resources after transmit completes
8246  *  @q_vector: pointer to q_vector containing needed info
8247  *  @napi_budget: Used to determine if we are in netpoll
8248  *
8249  *  returns true if ring is completely cleaned
8250  **/
8251 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
8252 {
8253         struct igb_adapter *adapter = q_vector->adapter;
8254         struct igb_ring *tx_ring = q_vector->tx.ring;
8255         struct igb_tx_buffer *tx_buffer;
8256         union e1000_adv_tx_desc *tx_desc;
8257         unsigned int total_bytes = 0, total_packets = 0;
8258         unsigned int budget = q_vector->tx.work_limit;
8259         unsigned int i = tx_ring->next_to_clean;
8260
8261         if (test_bit(__IGB_DOWN, &adapter->state))
8262                 return true;
8263
8264         tx_buffer = &tx_ring->tx_buffer_info[i];
8265         tx_desc = IGB_TX_DESC(tx_ring, i);
8266         i -= tx_ring->count;
8267
8268         do {
8269                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
8270
8271                 /* if next_to_watch is not set then there is no work pending */
8272                 if (!eop_desc)
8273                         break;
8274
8275                 /* prevent any other reads prior to eop_desc */
8276                 smp_rmb();
8277
8278                 /* if DD is not set pending work has not been completed */
8279                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
8280                         break;
8281
8282                 /* clear next_to_watch to prevent false hangs */
8283                 tx_buffer->next_to_watch = NULL;
8284
8285                 /* update the statistics for this packet */
8286                 total_bytes += tx_buffer->bytecount;
8287                 total_packets += tx_buffer->gso_segs;
8288
8289                 /* free the skb */
8290                 if (tx_buffer->type == IGB_TYPE_SKB)
8291                         napi_consume_skb(tx_buffer->skb, napi_budget);
8292                 else
8293                         xdp_return_frame(tx_buffer->xdpf);
8294
8295                 /* unmap skb header data */
8296                 dma_unmap_single(tx_ring->dev,
8297                                  dma_unmap_addr(tx_buffer, dma),
8298                                  dma_unmap_len(tx_buffer, len),
8299                                  DMA_TO_DEVICE);
8300
8301                 /* clear tx_buffer data */
8302                 dma_unmap_len_set(tx_buffer, len, 0);
8303
8304                 /* clear last DMA location and unmap remaining buffers */
8305                 while (tx_desc != eop_desc) {
8306                         tx_buffer++;
8307                         tx_desc++;
8308                         i++;
8309                         if (unlikely(!i)) {
8310                                 i -= tx_ring->count;
8311                                 tx_buffer = tx_ring->tx_buffer_info;
8312                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
8313                         }
8314
8315                         /* unmap any remaining paged data */
8316                         if (dma_unmap_len(tx_buffer, len)) {
8317                                 dma_unmap_page(tx_ring->dev,
8318                                                dma_unmap_addr(tx_buffer, dma),
8319                                                dma_unmap_len(tx_buffer, len),
8320                                                DMA_TO_DEVICE);
8321                                 dma_unmap_len_set(tx_buffer, len, 0);
8322                         }
8323                 }
8324
8325                 /* move us one more past the eop_desc for start of next pkt */
8326                 tx_buffer++;
8327                 tx_desc++;
8328                 i++;
8329                 if (unlikely(!i)) {
8330                         i -= tx_ring->count;
8331                         tx_buffer = tx_ring->tx_buffer_info;
8332                         tx_desc = IGB_TX_DESC(tx_ring, 0);
8333                 }
8334
8335                 /* issue prefetch for next Tx descriptor */
8336                 prefetch(tx_desc);
8337
8338                 /* update budget accounting */
8339                 budget--;
8340         } while (likely(budget));
8341
8342         netdev_tx_completed_queue(txring_txq(tx_ring),
8343                                   total_packets, total_bytes);
8344         i += tx_ring->count;
8345         tx_ring->next_to_clean = i;
8346         u64_stats_update_begin(&tx_ring->tx_syncp);
8347         tx_ring->tx_stats.bytes += total_bytes;
8348         tx_ring->tx_stats.packets += total_packets;
8349         u64_stats_update_end(&tx_ring->tx_syncp);
8350         q_vector->tx.total_bytes += total_bytes;
8351         q_vector->tx.total_packets += total_packets;
8352
8353         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
8354                 struct e1000_hw *hw = &adapter->hw;
8355
8356                 /* Detect a transmit hang in hardware, this serializes the
8357                  * check with the clearing of time_stamp and movement of i
8358                  */
8359                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
8360                 if (tx_buffer->next_to_watch &&
8361                     time_after(jiffies, tx_buffer->time_stamp +
8362                                (adapter->tx_timeout_factor * HZ)) &&
8363                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
8364
8365                         /* detected Tx unit hang */
8366                         dev_err(tx_ring->dev,
8367                                 "Detected Tx Unit Hang\n"
8368                                 "  Tx Queue             <%d>\n"
8369                                 "  TDH                  <%x>\n"
8370                                 "  TDT                  <%x>\n"
8371                                 "  next_to_use          <%x>\n"
8372                                 "  next_to_clean        <%x>\n"
8373                                 "buffer_info[next_to_clean]\n"
8374                                 "  time_stamp           <%lx>\n"
8375                                 "  next_to_watch        <%p>\n"
8376                                 "  jiffies              <%lx>\n"
8377                                 "  desc.status          <%x>\n",
8378                                 tx_ring->queue_index,
8379                                 rd32(E1000_TDH(tx_ring->reg_idx)),
8380                                 readl(tx_ring->tail),
8381                                 tx_ring->next_to_use,
8382                                 tx_ring->next_to_clean,
8383                                 tx_buffer->time_stamp,
8384                                 tx_buffer->next_to_watch,
8385                                 jiffies,
8386                                 tx_buffer->next_to_watch->wb.status);
8387                         netif_stop_subqueue(tx_ring->netdev,
8388                                             tx_ring->queue_index);
8389
8390                         /* we are about to reset, no point in enabling stuff */
8391                         return true;
8392                 }
8393         }
8394
8395 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
8396         if (unlikely(total_packets &&
8397             netif_carrier_ok(tx_ring->netdev) &&
8398             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
8399                 /* Make sure that anybody stopping the queue after this
8400                  * sees the new next_to_clean.
8401                  */
8402                 smp_mb();
8403                 if (__netif_subqueue_stopped(tx_ring->netdev,
8404                                              tx_ring->queue_index) &&
8405                     !(test_bit(__IGB_DOWN, &adapter->state))) {
8406                         netif_wake_subqueue(tx_ring->netdev,
8407                                             tx_ring->queue_index);
8408
8409                         u64_stats_update_begin(&tx_ring->tx_syncp);
8410                         tx_ring->tx_stats.restart_queue++;
8411                         u64_stats_update_end(&tx_ring->tx_syncp);
8412                 }
8413         }
8414
8415         return !!budget;
8416 }
8417
8418 /**
8419  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
8420  *  @rx_ring: rx descriptor ring to store buffers on
8421  *  @old_buff: donor buffer to have page reused
8422  *
8423  *  Synchronizes page for reuse by the adapter
8424  **/
8425 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
8426                               struct igb_rx_buffer *old_buff)
8427 {
8428         struct igb_rx_buffer *new_buff;
8429         u16 nta = rx_ring->next_to_alloc;
8430
8431         new_buff = &rx_ring->rx_buffer_info[nta];
8432
8433         /* update, and store next to alloc */
8434         nta++;
8435         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
8436
8437         /* Transfer page from old buffer to new buffer.
8438          * Move each member individually to avoid possible store
8439          * forwarding stalls.
8440          */
8441         new_buff->dma           = old_buff->dma;
8442         new_buff->page          = old_buff->page;
8443         new_buff->page_offset   = old_buff->page_offset;
8444         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
8445 }
8446
8447 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
8448                                   int rx_buf_pgcnt)
8449 {
8450         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
8451         struct page *page = rx_buffer->page;
8452
8453         /* avoid re-using remote and pfmemalloc pages */
8454         if (!dev_page_is_reusable(page))
8455                 return false;
8456
8457 #if (PAGE_SIZE < 8192)
8458         /* if we are only owner of page we can reuse it */
8459         if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
8460                 return false;
8461 #else
8462 #define IGB_LAST_OFFSET \
8463         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
8464
8465         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
8466                 return false;
8467 #endif
8468
8469         /* If we have drained the page fragment pool we need to update
8470          * the pagecnt_bias and page count so that we fully restock the
8471          * number of references the driver holds.
8472          */
8473         if (unlikely(pagecnt_bias == 1)) {
8474                 page_ref_add(page, USHRT_MAX - 1);
8475                 rx_buffer->pagecnt_bias = USHRT_MAX;
8476         }
8477
8478         return true;
8479 }
8480
8481 /**
8482  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8483  *  @rx_ring: rx descriptor ring to transact packets on
8484  *  @rx_buffer: buffer containing page to add
8485  *  @skb: sk_buff to place the data into
8486  *  @size: size of buffer to be added
8487  *
8488  *  This function will add the data contained in rx_buffer->page to the skb.
8489  **/
8490 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8491                             struct igb_rx_buffer *rx_buffer,
8492                             struct sk_buff *skb,
8493                             unsigned int size)
8494 {
8495 #if (PAGE_SIZE < 8192)
8496         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8497 #else
8498         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8499                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8500                                 SKB_DATA_ALIGN(size);
8501 #endif
8502         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8503                         rx_buffer->page_offset, size, truesize);
8504 #if (PAGE_SIZE < 8192)
8505         rx_buffer->page_offset ^= truesize;
8506 #else
8507         rx_buffer->page_offset += truesize;
8508 #endif
8509 }
8510
8511 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8512                                          struct igb_rx_buffer *rx_buffer,
8513                                          struct xdp_buff *xdp,
8514                                          ktime_t timestamp)
8515 {
8516 #if (PAGE_SIZE < 8192)
8517         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8518 #else
8519         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
8520                                                xdp->data_hard_start);
8521 #endif
8522         unsigned int size = xdp->data_end - xdp->data;
8523         unsigned int headlen;
8524         struct sk_buff *skb;
8525
8526         /* prefetch first cache line of first page */
8527         net_prefetch(xdp->data);
8528
8529         /* allocate a skb to store the frags */
8530         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8531         if (unlikely(!skb))
8532                 return NULL;
8533
8534         if (timestamp)
8535                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8536
8537         /* Determine available headroom for copy */
8538         headlen = size;
8539         if (headlen > IGB_RX_HDR_LEN)
8540                 headlen = eth_get_headlen(skb->dev, xdp->data, IGB_RX_HDR_LEN);
8541
8542         /* align pull length to size of long to optimize memcpy performance */
8543         memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen, sizeof(long)));
8544
8545         /* update all of the pointers */
8546         size -= headlen;
8547         if (size) {
8548                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8549                                 (xdp->data + headlen) - page_address(rx_buffer->page),
8550                                 size, truesize);
8551 #if (PAGE_SIZE < 8192)
8552                 rx_buffer->page_offset ^= truesize;
8553 #else
8554                 rx_buffer->page_offset += truesize;
8555 #endif
8556         } else {
8557                 rx_buffer->pagecnt_bias++;
8558         }
8559
8560         return skb;
8561 }
8562
8563 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8564                                      struct igb_rx_buffer *rx_buffer,
8565                                      struct xdp_buff *xdp,
8566                                      ktime_t timestamp)
8567 {
8568 #if (PAGE_SIZE < 8192)
8569         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8570 #else
8571         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8572                                 SKB_DATA_ALIGN(xdp->data_end -
8573                                                xdp->data_hard_start);
8574 #endif
8575         unsigned int metasize = xdp->data - xdp->data_meta;
8576         struct sk_buff *skb;
8577
8578         /* prefetch first cache line of first page */
8579         net_prefetch(xdp->data_meta);
8580
8581         /* build an skb around the page buffer */
8582         skb = napi_build_skb(xdp->data_hard_start, truesize);
8583         if (unlikely(!skb))
8584                 return NULL;
8585
8586         /* update pointers within the skb to store the data */
8587         skb_reserve(skb, xdp->data - xdp->data_hard_start);
8588         __skb_put(skb, xdp->data_end - xdp->data);
8589
8590         if (metasize)
8591                 skb_metadata_set(skb, metasize);
8592
8593         if (timestamp)
8594                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8595
8596         /* update buffer offset */
8597 #if (PAGE_SIZE < 8192)
8598         rx_buffer->page_offset ^= truesize;
8599 #else
8600         rx_buffer->page_offset += truesize;
8601 #endif
8602
8603         return skb;
8604 }
8605
8606 static struct sk_buff *igb_run_xdp(struct igb_adapter *adapter,
8607                                    struct igb_ring *rx_ring,
8608                                    struct xdp_buff *xdp)
8609 {
8610         int err, result = IGB_XDP_PASS;
8611         struct bpf_prog *xdp_prog;
8612         u32 act;
8613
8614         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
8615
8616         if (!xdp_prog)
8617                 goto xdp_out;
8618
8619         prefetchw(xdp->data_hard_start); /* xdp_frame write */
8620
8621         act = bpf_prog_run_xdp(xdp_prog, xdp);
8622         switch (act) {
8623         case XDP_PASS:
8624                 break;
8625         case XDP_TX:
8626                 result = igb_xdp_xmit_back(adapter, xdp);
8627                 if (result == IGB_XDP_CONSUMED)
8628                         goto out_failure;
8629                 break;
8630         case XDP_REDIRECT:
8631                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
8632                 if (err)
8633                         goto out_failure;
8634                 result = IGB_XDP_REDIR;
8635                 break;
8636         default:
8637                 bpf_warn_invalid_xdp_action(adapter->netdev, xdp_prog, act);
8638                 fallthrough;
8639         case XDP_ABORTED:
8640 out_failure:
8641                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
8642                 fallthrough;
8643         case XDP_DROP:
8644                 result = IGB_XDP_CONSUMED;
8645                 break;
8646         }
8647 xdp_out:
8648         return ERR_PTR(-result);
8649 }
8650
8651 static unsigned int igb_rx_frame_truesize(struct igb_ring *rx_ring,
8652                                           unsigned int size)
8653 {
8654         unsigned int truesize;
8655
8656 #if (PAGE_SIZE < 8192)
8657         truesize = igb_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
8658 #else
8659         truesize = ring_uses_build_skb(rx_ring) ?
8660                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) +
8661                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
8662                 SKB_DATA_ALIGN(size);
8663 #endif
8664         return truesize;
8665 }
8666
8667 static void igb_rx_buffer_flip(struct igb_ring *rx_ring,
8668                                struct igb_rx_buffer *rx_buffer,
8669                                unsigned int size)
8670 {
8671         unsigned int truesize = igb_rx_frame_truesize(rx_ring, size);
8672 #if (PAGE_SIZE < 8192)
8673         rx_buffer->page_offset ^= truesize;
8674 #else
8675         rx_buffer->page_offset += truesize;
8676 #endif
8677 }
8678
8679 static inline void igb_rx_checksum(struct igb_ring *ring,
8680                                    union e1000_adv_rx_desc *rx_desc,
8681                                    struct sk_buff *skb)
8682 {
8683         skb_checksum_none_assert(skb);
8684
8685         /* Ignore Checksum bit is set */
8686         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8687                 return;
8688
8689         /* Rx checksum disabled via ethtool */
8690         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8691                 return;
8692
8693         /* TCP/UDP checksum error bit is set */
8694         if (igb_test_staterr(rx_desc,
8695                              E1000_RXDEXT_STATERR_TCPE |
8696                              E1000_RXDEXT_STATERR_IPE)) {
8697                 /* work around errata with sctp packets where the TCPE aka
8698                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8699                  * packets, (aka let the stack check the crc32c)
8700                  */
8701                 if (!((skb->len == 60) &&
8702                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8703                         u64_stats_update_begin(&ring->rx_syncp);
8704                         ring->rx_stats.csum_err++;
8705                         u64_stats_update_end(&ring->rx_syncp);
8706                 }
8707                 /* let the stack verify checksum errors */
8708                 return;
8709         }
8710         /* It must be a TCP or UDP packet with a valid checksum */
8711         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8712                                       E1000_RXD_STAT_UDPCS))
8713                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8714
8715         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8716                 le32_to_cpu(rx_desc->wb.upper.status_error));
8717 }
8718
8719 static inline void igb_rx_hash(struct igb_ring *ring,
8720                                union e1000_adv_rx_desc *rx_desc,
8721                                struct sk_buff *skb)
8722 {
8723         if (ring->netdev->features & NETIF_F_RXHASH)
8724                 skb_set_hash(skb,
8725                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8726                              PKT_HASH_TYPE_L3);
8727 }
8728
8729 /**
8730  *  igb_is_non_eop - process handling of non-EOP buffers
8731  *  @rx_ring: Rx ring being processed
8732  *  @rx_desc: Rx descriptor for current buffer
8733  *
8734  *  This function updates next to clean.  If the buffer is an EOP buffer
8735  *  this function exits returning false, otherwise it will place the
8736  *  sk_buff in the next buffer to be chained and return true indicating
8737  *  that this is in fact a non-EOP buffer.
8738  **/
8739 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8740                            union e1000_adv_rx_desc *rx_desc)
8741 {
8742         u32 ntc = rx_ring->next_to_clean + 1;
8743
8744         /* fetch, update, and store next to clean */
8745         ntc = (ntc < rx_ring->count) ? ntc : 0;
8746         rx_ring->next_to_clean = ntc;
8747
8748         prefetch(IGB_RX_DESC(rx_ring, ntc));
8749
8750         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8751                 return false;
8752
8753         return true;
8754 }
8755
8756 /**
8757  *  igb_cleanup_headers - Correct corrupted or empty headers
8758  *  @rx_ring: rx descriptor ring packet is being transacted on
8759  *  @rx_desc: pointer to the EOP Rx descriptor
8760  *  @skb: pointer to current skb being fixed
8761  *
8762  *  Address the case where we are pulling data in on pages only
8763  *  and as such no data is present in the skb header.
8764  *
8765  *  In addition if skb is not at least 60 bytes we need to pad it so that
8766  *  it is large enough to qualify as a valid Ethernet frame.
8767  *
8768  *  Returns true if an error was encountered and skb was freed.
8769  **/
8770 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8771                                 union e1000_adv_rx_desc *rx_desc,
8772                                 struct sk_buff *skb)
8773 {
8774         /* XDP packets use error pointer so abort at this point */
8775         if (IS_ERR(skb))
8776                 return true;
8777
8778         if (unlikely((igb_test_staterr(rx_desc,
8779                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8780                 struct net_device *netdev = rx_ring->netdev;
8781                 if (!(netdev->features & NETIF_F_RXALL)) {
8782                         dev_kfree_skb_any(skb);
8783                         return true;
8784                 }
8785         }
8786
8787         /* if eth_skb_pad returns an error the skb was freed */
8788         if (eth_skb_pad(skb))
8789                 return true;
8790
8791         return false;
8792 }
8793
8794 /**
8795  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8796  *  @rx_ring: rx descriptor ring packet is being transacted on
8797  *  @rx_desc: pointer to the EOP Rx descriptor
8798  *  @skb: pointer to current skb being populated
8799  *
8800  *  This function checks the ring, descriptor, and packet information in
8801  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8802  *  other fields within the skb.
8803  **/
8804 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8805                                    union e1000_adv_rx_desc *rx_desc,
8806                                    struct sk_buff *skb)
8807 {
8808         struct net_device *dev = rx_ring->netdev;
8809
8810         igb_rx_hash(rx_ring, rx_desc, skb);
8811
8812         igb_rx_checksum(rx_ring, rx_desc, skb);
8813
8814         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8815             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8816                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8817
8818         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8819             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8820                 u16 vid;
8821
8822                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8823                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8824                         vid = be16_to_cpu((__force __be16)rx_desc->wb.upper.vlan);
8825                 else
8826                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8827
8828                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8829         }
8830
8831         skb_record_rx_queue(skb, rx_ring->queue_index);
8832
8833         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8834 }
8835
8836 static unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8837 {
8838         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8839 }
8840
8841 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8842                                                const unsigned int size, int *rx_buf_pgcnt)
8843 {
8844         struct igb_rx_buffer *rx_buffer;
8845
8846         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8847         *rx_buf_pgcnt =
8848 #if (PAGE_SIZE < 8192)
8849                 page_count(rx_buffer->page);
8850 #else
8851                 0;
8852 #endif
8853         prefetchw(rx_buffer->page);
8854
8855         /* we are reusing so sync this buffer for CPU use */
8856         dma_sync_single_range_for_cpu(rx_ring->dev,
8857                                       rx_buffer->dma,
8858                                       rx_buffer->page_offset,
8859                                       size,
8860                                       DMA_FROM_DEVICE);
8861
8862         rx_buffer->pagecnt_bias--;
8863
8864         return rx_buffer;
8865 }
8866
8867 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8868                               struct igb_rx_buffer *rx_buffer, int rx_buf_pgcnt)
8869 {
8870         if (igb_can_reuse_rx_page(rx_buffer, rx_buf_pgcnt)) {
8871                 /* hand second half of page back to the ring */
8872                 igb_reuse_rx_page(rx_ring, rx_buffer);
8873         } else {
8874                 /* We are not reusing the buffer so unmap it and free
8875                  * any references we are holding to it
8876                  */
8877                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8878                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8879                                      IGB_RX_DMA_ATTR);
8880                 __page_frag_cache_drain(rx_buffer->page,
8881                                         rx_buffer->pagecnt_bias);
8882         }
8883
8884         /* clear contents of rx_buffer */
8885         rx_buffer->page = NULL;
8886 }
8887
8888 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8889 {
8890         struct igb_adapter *adapter = q_vector->adapter;
8891         struct igb_ring *rx_ring = q_vector->rx.ring;
8892         struct sk_buff *skb = rx_ring->skb;
8893         unsigned int total_bytes = 0, total_packets = 0;
8894         u16 cleaned_count = igb_desc_unused(rx_ring);
8895         unsigned int xdp_xmit = 0;
8896         struct xdp_buff xdp;
8897         u32 frame_sz = 0;
8898         int rx_buf_pgcnt;
8899
8900         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
8901 #if (PAGE_SIZE < 8192)
8902         frame_sz = igb_rx_frame_truesize(rx_ring, 0);
8903 #endif
8904         xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
8905
8906         while (likely(total_packets < budget)) {
8907                 union e1000_adv_rx_desc *rx_desc;
8908                 struct igb_rx_buffer *rx_buffer;
8909                 ktime_t timestamp = 0;
8910                 int pkt_offset = 0;
8911                 unsigned int size;
8912                 void *pktbuf;
8913
8914                 /* return some buffers to hardware, one at a time is too slow */
8915                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8916                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8917                         cleaned_count = 0;
8918                 }
8919
8920                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8921                 size = le16_to_cpu(rx_desc->wb.upper.length);
8922                 if (!size)
8923                         break;
8924
8925                 /* This memory barrier is needed to keep us from reading
8926                  * any other fields out of the rx_desc until we know the
8927                  * descriptor has been written back
8928                  */
8929                 dma_rmb();
8930
8931                 rx_buffer = igb_get_rx_buffer(rx_ring, size, &rx_buf_pgcnt);
8932                 pktbuf = page_address(rx_buffer->page) + rx_buffer->page_offset;
8933
8934                 /* pull rx packet timestamp if available and valid */
8935                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8936                         int ts_hdr_len;
8937
8938                         ts_hdr_len = igb_ptp_rx_pktstamp(rx_ring->q_vector,
8939                                                          pktbuf, &timestamp);
8940
8941                         pkt_offset += ts_hdr_len;
8942                         size -= ts_hdr_len;
8943                 }
8944
8945                 /* retrieve a buffer from the ring */
8946                 if (!skb) {
8947                         unsigned char *hard_start = pktbuf - igb_rx_offset(rx_ring);
8948                         unsigned int offset = pkt_offset + igb_rx_offset(rx_ring);
8949
8950                         xdp_prepare_buff(&xdp, hard_start, offset, size, true);
8951                         xdp_buff_clear_frags_flag(&xdp);
8952 #if (PAGE_SIZE > 4096)
8953                         /* At larger PAGE_SIZE, frame_sz depend on len size */
8954                         xdp.frame_sz = igb_rx_frame_truesize(rx_ring, size);
8955 #endif
8956                         skb = igb_run_xdp(adapter, rx_ring, &xdp);
8957                 }
8958
8959                 if (IS_ERR(skb)) {
8960                         unsigned int xdp_res = -PTR_ERR(skb);
8961
8962                         if (xdp_res & (IGB_XDP_TX | IGB_XDP_REDIR)) {
8963                                 xdp_xmit |= xdp_res;
8964                                 igb_rx_buffer_flip(rx_ring, rx_buffer, size);
8965                         } else {
8966                                 rx_buffer->pagecnt_bias++;
8967                         }
8968                         total_packets++;
8969                         total_bytes += size;
8970                 } else if (skb)
8971                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8972                 else if (ring_uses_build_skb(rx_ring))
8973                         skb = igb_build_skb(rx_ring, rx_buffer, &xdp,
8974                                             timestamp);
8975                 else
8976                         skb = igb_construct_skb(rx_ring, rx_buffer,
8977                                                 &xdp, timestamp);
8978
8979                 /* exit if we failed to retrieve a buffer */
8980                 if (!skb) {
8981                         rx_ring->rx_stats.alloc_failed++;
8982                         rx_buffer->pagecnt_bias++;
8983                         break;
8984                 }
8985
8986                 igb_put_rx_buffer(rx_ring, rx_buffer, rx_buf_pgcnt);
8987                 cleaned_count++;
8988
8989                 /* fetch next buffer in frame if non-eop */
8990                 if (igb_is_non_eop(rx_ring, rx_desc))
8991                         continue;
8992
8993                 /* verify the packet layout is correct */
8994                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8995                         skb = NULL;
8996                         continue;
8997                 }
8998
8999                 /* probably a little skewed due to removing CRC */
9000                 total_bytes += skb->len;
9001
9002                 /* populate checksum, timestamp, VLAN, and protocol */
9003                 igb_process_skb_fields(rx_ring, rx_desc, skb);
9004
9005                 napi_gro_receive(&q_vector->napi, skb);
9006
9007                 /* reset skb pointer */
9008                 skb = NULL;
9009
9010                 /* update budget accounting */
9011                 total_packets++;
9012         }
9013
9014         /* place incomplete frames back on ring for completion */
9015         rx_ring->skb = skb;
9016
9017         if (xdp_xmit & IGB_XDP_REDIR)
9018                 xdp_do_flush();
9019
9020         if (xdp_xmit & IGB_XDP_TX) {
9021                 struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);
9022
9023                 igb_xdp_ring_update_tail(tx_ring);
9024         }
9025
9026         u64_stats_update_begin(&rx_ring->rx_syncp);
9027         rx_ring->rx_stats.packets += total_packets;
9028         rx_ring->rx_stats.bytes += total_bytes;
9029         u64_stats_update_end(&rx_ring->rx_syncp);
9030         q_vector->rx.total_packets += total_packets;
9031         q_vector->rx.total_bytes += total_bytes;
9032
9033         if (cleaned_count)
9034                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
9035
9036         return total_packets;
9037 }
9038
9039 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
9040                                   struct igb_rx_buffer *bi)
9041 {
9042         struct page *page = bi->page;
9043         dma_addr_t dma;
9044
9045         /* since we are recycling buffers we should seldom need to alloc */
9046         if (likely(page))
9047                 return true;
9048
9049         /* alloc new page for storage */
9050         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
9051         if (unlikely(!page)) {
9052                 rx_ring->rx_stats.alloc_failed++;
9053                 return false;
9054         }
9055
9056         /* map page for use */
9057         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
9058                                  igb_rx_pg_size(rx_ring),
9059                                  DMA_FROM_DEVICE,
9060                                  IGB_RX_DMA_ATTR);
9061
9062         /* if mapping failed free memory back to system since
9063          * there isn't much point in holding memory we can't use
9064          */
9065         if (dma_mapping_error(rx_ring->dev, dma)) {
9066                 __free_pages(page, igb_rx_pg_order(rx_ring));
9067
9068                 rx_ring->rx_stats.alloc_failed++;
9069                 return false;
9070         }
9071
9072         bi->dma = dma;
9073         bi->page = page;
9074         bi->page_offset = igb_rx_offset(rx_ring);
9075         page_ref_add(page, USHRT_MAX - 1);
9076         bi->pagecnt_bias = USHRT_MAX;
9077
9078         return true;
9079 }
9080
9081 /**
9082  *  igb_alloc_rx_buffers - Replace used receive buffers
9083  *  @rx_ring: rx descriptor ring to allocate new receive buffers
9084  *  @cleaned_count: count of buffers to allocate
9085  **/
9086 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
9087 {
9088         union e1000_adv_rx_desc *rx_desc;
9089         struct igb_rx_buffer *bi;
9090         u16 i = rx_ring->next_to_use;
9091         u16 bufsz;
9092
9093         /* nothing to do */
9094         if (!cleaned_count)
9095                 return;
9096
9097         rx_desc = IGB_RX_DESC(rx_ring, i);
9098         bi = &rx_ring->rx_buffer_info[i];
9099         i -= rx_ring->count;
9100
9101         bufsz = igb_rx_bufsz(rx_ring);
9102
9103         do {
9104                 if (!igb_alloc_mapped_page(rx_ring, bi))
9105                         break;
9106
9107                 /* sync the buffer for use by the device */
9108                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
9109                                                  bi->page_offset, bufsz,
9110                                                  DMA_FROM_DEVICE);
9111
9112                 /* Refresh the desc even if buffer_addrs didn't change
9113                  * because each write-back erases this info.
9114                  */
9115                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
9116
9117                 rx_desc++;
9118                 bi++;
9119                 i++;
9120                 if (unlikely(!i)) {
9121                         rx_desc = IGB_RX_DESC(rx_ring, 0);
9122                         bi = rx_ring->rx_buffer_info;
9123                         i -= rx_ring->count;
9124                 }
9125
9126                 /* clear the length for the next_to_use descriptor */
9127                 rx_desc->wb.upper.length = 0;
9128
9129                 cleaned_count--;
9130         } while (cleaned_count);
9131
9132         i += rx_ring->count;
9133
9134         if (rx_ring->next_to_use != i) {
9135                 /* record the next descriptor to use */
9136                 rx_ring->next_to_use = i;
9137
9138                 /* update next to alloc since we have filled the ring */
9139                 rx_ring->next_to_alloc = i;
9140
9141                 /* Force memory writes to complete before letting h/w
9142                  * know there are new descriptors to fetch.  (Only
9143                  * applicable for weak-ordered memory model archs,
9144                  * such as IA-64).
9145                  */
9146                 dma_wmb();
9147                 writel(i, rx_ring->tail);
9148         }
9149 }
9150
9151 /**
9152  * igb_mii_ioctl -
9153  * @netdev: pointer to netdev struct
9154  * @ifr: interface structure
9155  * @cmd: ioctl command to execute
9156  **/
9157 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9158 {
9159         struct igb_adapter *adapter = netdev_priv(netdev);
9160         struct mii_ioctl_data *data = if_mii(ifr);
9161
9162         if (adapter->hw.phy.media_type != e1000_media_type_copper)
9163                 return -EOPNOTSUPP;
9164
9165         switch (cmd) {
9166         case SIOCGMIIPHY:
9167                 data->phy_id = adapter->hw.phy.addr;
9168                 break;
9169         case SIOCGMIIREG:
9170                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
9171                                      &data->val_out))
9172                         return -EIO;
9173                 break;
9174         case SIOCSMIIREG:
9175         default:
9176                 return -EOPNOTSUPP;
9177         }
9178         return 0;
9179 }
9180
9181 /**
9182  * igb_ioctl -
9183  * @netdev: pointer to netdev struct
9184  * @ifr: interface structure
9185  * @cmd: ioctl command to execute
9186  **/
9187 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9188 {
9189         switch (cmd) {
9190         case SIOCGMIIPHY:
9191         case SIOCGMIIREG:
9192         case SIOCSMIIREG:
9193                 return igb_mii_ioctl(netdev, ifr, cmd);
9194         case SIOCGHWTSTAMP:
9195                 return igb_ptp_get_ts_config(netdev, ifr);
9196         case SIOCSHWTSTAMP:
9197                 return igb_ptp_set_ts_config(netdev, ifr);
9198         default:
9199                 return -EOPNOTSUPP;
9200         }
9201 }
9202
9203 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9204 {
9205         struct igb_adapter *adapter = hw->back;
9206
9207         pci_read_config_word(adapter->pdev, reg, value);
9208 }
9209
9210 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9211 {
9212         struct igb_adapter *adapter = hw->back;
9213
9214         pci_write_config_word(adapter->pdev, reg, *value);
9215 }
9216
9217 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9218 {
9219         struct igb_adapter *adapter = hw->back;
9220
9221         if (pcie_capability_read_word(adapter->pdev, reg, value))
9222                 return -E1000_ERR_CONFIG;
9223
9224         return 0;
9225 }
9226
9227 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9228 {
9229         struct igb_adapter *adapter = hw->back;
9230
9231         if (pcie_capability_write_word(adapter->pdev, reg, *value))
9232                 return -E1000_ERR_CONFIG;
9233
9234         return 0;
9235 }
9236
9237 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
9238 {
9239         struct igb_adapter *adapter = netdev_priv(netdev);
9240         struct e1000_hw *hw = &adapter->hw;
9241         u32 ctrl, rctl;
9242         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
9243
9244         if (enable) {
9245                 /* enable VLAN tag insert/strip */
9246                 ctrl = rd32(E1000_CTRL);
9247                 ctrl |= E1000_CTRL_VME;
9248                 wr32(E1000_CTRL, ctrl);
9249
9250                 /* Disable CFI check */
9251                 rctl = rd32(E1000_RCTL);
9252                 rctl &= ~E1000_RCTL_CFIEN;
9253                 wr32(E1000_RCTL, rctl);
9254         } else {
9255                 /* disable VLAN tag insert/strip */
9256                 ctrl = rd32(E1000_CTRL);
9257                 ctrl &= ~E1000_CTRL_VME;
9258                 wr32(E1000_CTRL, ctrl);
9259         }
9260
9261         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
9262 }
9263
9264 static int igb_vlan_rx_add_vid(struct net_device *netdev,
9265                                __be16 proto, u16 vid)
9266 {
9267         struct igb_adapter *adapter = netdev_priv(netdev);
9268         struct e1000_hw *hw = &adapter->hw;
9269         int pf_id = adapter->vfs_allocated_count;
9270
9271         /* add the filter since PF can receive vlans w/o entry in vlvf */
9272         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9273                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
9274
9275         set_bit(vid, adapter->active_vlans);
9276
9277         return 0;
9278 }
9279
9280 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
9281                                 __be16 proto, u16 vid)
9282 {
9283         struct igb_adapter *adapter = netdev_priv(netdev);
9284         int pf_id = adapter->vfs_allocated_count;
9285         struct e1000_hw *hw = &adapter->hw;
9286
9287         /* remove VID from filter table */
9288         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9289                 igb_vfta_set(hw, vid, pf_id, false, true);
9290
9291         clear_bit(vid, adapter->active_vlans);
9292
9293         return 0;
9294 }
9295
9296 static void igb_restore_vlan(struct igb_adapter *adapter)
9297 {
9298         u16 vid = 1;
9299
9300         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
9301         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
9302
9303         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
9304                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
9305 }
9306
9307 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
9308 {
9309         struct pci_dev *pdev = adapter->pdev;
9310         struct e1000_mac_info *mac = &adapter->hw.mac;
9311
9312         mac->autoneg = 0;
9313
9314         /* Make sure dplx is at most 1 bit and lsb of speed is not set
9315          * for the switch() below to work
9316          */
9317         if ((spd & 1) || (dplx & ~1))
9318                 goto err_inval;
9319
9320         /* Fiber NIC's only allow 1000 gbps Full duplex
9321          * and 100Mbps Full duplex for 100baseFx sfp
9322          */
9323         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
9324                 switch (spd + dplx) {
9325                 case SPEED_10 + DUPLEX_HALF:
9326                 case SPEED_10 + DUPLEX_FULL:
9327                 case SPEED_100 + DUPLEX_HALF:
9328                         goto err_inval;
9329                 default:
9330                         break;
9331                 }
9332         }
9333
9334         switch (spd + dplx) {
9335         case SPEED_10 + DUPLEX_HALF:
9336                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
9337                 break;
9338         case SPEED_10 + DUPLEX_FULL:
9339                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
9340                 break;
9341         case SPEED_100 + DUPLEX_HALF:
9342                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
9343                 break;
9344         case SPEED_100 + DUPLEX_FULL:
9345                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
9346                 break;
9347         case SPEED_1000 + DUPLEX_FULL:
9348                 mac->autoneg = 1;
9349                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
9350                 break;
9351         case SPEED_1000 + DUPLEX_HALF: /* not supported */
9352         default:
9353                 goto err_inval;
9354         }
9355
9356         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
9357         adapter->hw.phy.mdix = AUTO_ALL_MODES;
9358
9359         return 0;
9360
9361 err_inval:
9362         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
9363         return -EINVAL;
9364 }
9365
9366 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
9367                           bool runtime)
9368 {
9369         struct net_device *netdev = pci_get_drvdata(pdev);
9370         struct igb_adapter *adapter = netdev_priv(netdev);
9371         struct e1000_hw *hw = &adapter->hw;
9372         u32 ctrl, rctl, status;
9373         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
9374         bool wake;
9375
9376         rtnl_lock();
9377         netif_device_detach(netdev);
9378
9379         if (netif_running(netdev))
9380                 __igb_close(netdev, true);
9381
9382         igb_ptp_suspend(adapter);
9383
9384         igb_clear_interrupt_scheme(adapter);
9385         rtnl_unlock();
9386
9387         status = rd32(E1000_STATUS);
9388         if (status & E1000_STATUS_LU)
9389                 wufc &= ~E1000_WUFC_LNKC;
9390
9391         if (wufc) {
9392                 igb_setup_rctl(adapter);
9393                 igb_set_rx_mode(netdev);
9394
9395                 /* turn on all-multi mode if wake on multicast is enabled */
9396                 if (wufc & E1000_WUFC_MC) {
9397                         rctl = rd32(E1000_RCTL);
9398                         rctl |= E1000_RCTL_MPE;
9399                         wr32(E1000_RCTL, rctl);
9400                 }
9401
9402                 ctrl = rd32(E1000_CTRL);
9403                 ctrl |= E1000_CTRL_ADVD3WUC;
9404                 wr32(E1000_CTRL, ctrl);
9405
9406                 /* Allow time for pending master requests to run */
9407                 igb_disable_pcie_master(hw);
9408
9409                 wr32(E1000_WUC, E1000_WUC_PME_EN);
9410                 wr32(E1000_WUFC, wufc);
9411         } else {
9412                 wr32(E1000_WUC, 0);
9413                 wr32(E1000_WUFC, 0);
9414         }
9415
9416         wake = wufc || adapter->en_mng_pt;
9417         if (!wake)
9418                 igb_power_down_link(adapter);
9419         else
9420                 igb_power_up_link(adapter);
9421
9422         if (enable_wake)
9423                 *enable_wake = wake;
9424
9425         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
9426          * would have already happened in close and is redundant.
9427          */
9428         igb_release_hw_control(adapter);
9429
9430         pci_disable_device(pdev);
9431
9432         return 0;
9433 }
9434
9435 static void igb_deliver_wake_packet(struct net_device *netdev)
9436 {
9437         struct igb_adapter *adapter = netdev_priv(netdev);
9438         struct e1000_hw *hw = &adapter->hw;
9439         struct sk_buff *skb;
9440         u32 wupl;
9441
9442         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
9443
9444         /* WUPM stores only the first 128 bytes of the wake packet.
9445          * Read the packet only if we have the whole thing.
9446          */
9447         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
9448                 return;
9449
9450         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
9451         if (!skb)
9452                 return;
9453
9454         skb_put(skb, wupl);
9455
9456         /* Ensure reads are 32-bit aligned */
9457         wupl = roundup(wupl, 4);
9458
9459         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
9460
9461         skb->protocol = eth_type_trans(skb, netdev);
9462         netif_rx(skb);
9463 }
9464
9465 static int __maybe_unused igb_suspend(struct device *dev)
9466 {
9467         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
9468 }
9469
9470 static int __maybe_unused __igb_resume(struct device *dev, bool rpm)
9471 {
9472         struct pci_dev *pdev = to_pci_dev(dev);
9473         struct net_device *netdev = pci_get_drvdata(pdev);
9474         struct igb_adapter *adapter = netdev_priv(netdev);
9475         struct e1000_hw *hw = &adapter->hw;
9476         u32 err, val;
9477
9478         pci_set_power_state(pdev, PCI_D0);
9479         pci_restore_state(pdev);
9480         pci_save_state(pdev);
9481
9482         if (!pci_device_is_present(pdev))
9483                 return -ENODEV;
9484         err = pci_enable_device_mem(pdev);
9485         if (err) {
9486                 dev_err(&pdev->dev,
9487                         "igb: Cannot enable PCI device from suspend\n");
9488                 return err;
9489         }
9490         pci_set_master(pdev);
9491
9492         pci_enable_wake(pdev, PCI_D3hot, 0);
9493         pci_enable_wake(pdev, PCI_D3cold, 0);
9494
9495         if (igb_init_interrupt_scheme(adapter, true)) {
9496                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9497                 return -ENOMEM;
9498         }
9499
9500         igb_reset(adapter);
9501
9502         /* let the f/w know that the h/w is now under the control of the
9503          * driver.
9504          */
9505         igb_get_hw_control(adapter);
9506
9507         val = rd32(E1000_WUS);
9508         if (val & WAKE_PKT_WUS)
9509                 igb_deliver_wake_packet(netdev);
9510
9511         wr32(E1000_WUS, ~0);
9512
9513         if (!rpm)
9514                 rtnl_lock();
9515         if (!err && netif_running(netdev))
9516                 err = __igb_open(netdev, true);
9517
9518         if (!err)
9519                 netif_device_attach(netdev);
9520         if (!rpm)
9521                 rtnl_unlock();
9522
9523         return err;
9524 }
9525
9526 static int __maybe_unused igb_resume(struct device *dev)
9527 {
9528         return __igb_resume(dev, false);
9529 }
9530
9531 static int __maybe_unused igb_runtime_idle(struct device *dev)
9532 {
9533         struct net_device *netdev = dev_get_drvdata(dev);
9534         struct igb_adapter *adapter = netdev_priv(netdev);
9535
9536         if (!igb_has_link(adapter))
9537                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9538
9539         return -EBUSY;
9540 }
9541
9542 static int __maybe_unused igb_runtime_suspend(struct device *dev)
9543 {
9544         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
9545 }
9546
9547 static int __maybe_unused igb_runtime_resume(struct device *dev)
9548 {
9549         return __igb_resume(dev, true);
9550 }
9551
9552 static void igb_shutdown(struct pci_dev *pdev)
9553 {
9554         bool wake;
9555
9556         __igb_shutdown(pdev, &wake, 0);
9557
9558         if (system_state == SYSTEM_POWER_OFF) {
9559                 pci_wake_from_d3(pdev, wake);
9560                 pci_set_power_state(pdev, PCI_D3hot);
9561         }
9562 }
9563
9564 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9565 {
9566 #ifdef CONFIG_PCI_IOV
9567         int err;
9568
9569         if (num_vfs == 0) {
9570                 return igb_disable_sriov(dev, true);
9571         } else {
9572                 err = igb_enable_sriov(dev, num_vfs, true);
9573                 return err ? err : num_vfs;
9574         }
9575 #endif
9576         return 0;
9577 }
9578
9579 /**
9580  *  igb_io_error_detected - called when PCI error is detected
9581  *  @pdev: Pointer to PCI device
9582  *  @state: The current pci connection state
9583  *
9584  *  This function is called after a PCI bus error affecting
9585  *  this device has been detected.
9586  **/
9587 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9588                                               pci_channel_state_t state)
9589 {
9590         struct net_device *netdev = pci_get_drvdata(pdev);
9591         struct igb_adapter *adapter = netdev_priv(netdev);
9592
9593         if (state == pci_channel_io_normal) {
9594                 dev_warn(&pdev->dev, "Non-correctable non-fatal error reported.\n");
9595                 return PCI_ERS_RESULT_CAN_RECOVER;
9596         }
9597
9598         netif_device_detach(netdev);
9599
9600         if (state == pci_channel_io_perm_failure)
9601                 return PCI_ERS_RESULT_DISCONNECT;
9602
9603         if (netif_running(netdev))
9604                 igb_down(adapter);
9605         pci_disable_device(pdev);
9606
9607         /* Request a slot reset. */
9608         return PCI_ERS_RESULT_NEED_RESET;
9609 }
9610
9611 /**
9612  *  igb_io_slot_reset - called after the pci bus has been reset.
9613  *  @pdev: Pointer to PCI device
9614  *
9615  *  Restart the card from scratch, as if from a cold-boot. Implementation
9616  *  resembles the first-half of the __igb_resume routine.
9617  **/
9618 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9619 {
9620         struct net_device *netdev = pci_get_drvdata(pdev);
9621         struct igb_adapter *adapter = netdev_priv(netdev);
9622         struct e1000_hw *hw = &adapter->hw;
9623         pci_ers_result_t result;
9624
9625         if (pci_enable_device_mem(pdev)) {
9626                 dev_err(&pdev->dev,
9627                         "Cannot re-enable PCI device after reset.\n");
9628                 result = PCI_ERS_RESULT_DISCONNECT;
9629         } else {
9630                 pci_set_master(pdev);
9631                 pci_restore_state(pdev);
9632                 pci_save_state(pdev);
9633
9634                 pci_enable_wake(pdev, PCI_D3hot, 0);
9635                 pci_enable_wake(pdev, PCI_D3cold, 0);
9636
9637                 /* In case of PCI error, adapter lose its HW address
9638                  * so we should re-assign it here.
9639                  */
9640                 hw->hw_addr = adapter->io_addr;
9641
9642                 igb_reset(adapter);
9643                 wr32(E1000_WUS, ~0);
9644                 result = PCI_ERS_RESULT_RECOVERED;
9645         }
9646
9647         return result;
9648 }
9649
9650 /**
9651  *  igb_io_resume - called when traffic can start flowing again.
9652  *  @pdev: Pointer to PCI device
9653  *
9654  *  This callback is called when the error recovery driver tells us that
9655  *  its OK to resume normal operation. Implementation resembles the
9656  *  second-half of the __igb_resume routine.
9657  */
9658 static void igb_io_resume(struct pci_dev *pdev)
9659 {
9660         struct net_device *netdev = pci_get_drvdata(pdev);
9661         struct igb_adapter *adapter = netdev_priv(netdev);
9662
9663         if (netif_running(netdev)) {
9664                 if (igb_up(adapter)) {
9665                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9666                         return;
9667                 }
9668         }
9669
9670         netif_device_attach(netdev);
9671
9672         /* let the f/w know that the h/w is now under the control of the
9673          * driver.
9674          */
9675         igb_get_hw_control(adapter);
9676 }
9677
9678 /**
9679  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9680  *  @adapter: Pointer to adapter structure
9681  *  @index: Index of the RAR entry which need to be synced with MAC table
9682  **/
9683 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9684 {
9685         struct e1000_hw *hw = &adapter->hw;
9686         u32 rar_low, rar_high;
9687         u8 *addr = adapter->mac_table[index].addr;
9688
9689         /* HW expects these to be in network order when they are plugged
9690          * into the registers which are little endian.  In order to guarantee
9691          * that ordering we need to do an leXX_to_cpup here in order to be
9692          * ready for the byteswap that occurs with writel
9693          */
9694         rar_low = le32_to_cpup((__le32 *)(addr));
9695         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9696
9697         /* Indicate to hardware the Address is Valid. */
9698         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9699                 if (is_valid_ether_addr(addr))
9700                         rar_high |= E1000_RAH_AV;
9701
9702                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9703                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9704
9705                 switch (hw->mac.type) {
9706                 case e1000_82575:
9707                 case e1000_i210:
9708                         if (adapter->mac_table[index].state &
9709                             IGB_MAC_STATE_QUEUE_STEERING)
9710                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9711
9712                         rar_high |= E1000_RAH_POOL_1 *
9713                                     adapter->mac_table[index].queue;
9714                         break;
9715                 default:
9716                         rar_high |= E1000_RAH_POOL_1 <<
9717                                     adapter->mac_table[index].queue;
9718                         break;
9719                 }
9720         }
9721
9722         wr32(E1000_RAL(index), rar_low);
9723         wrfl();
9724         wr32(E1000_RAH(index), rar_high);
9725         wrfl();
9726 }
9727
9728 static int igb_set_vf_mac(struct igb_adapter *adapter,
9729                           int vf, unsigned char *mac_addr)
9730 {
9731         struct e1000_hw *hw = &adapter->hw;
9732         /* VF MAC addresses start at end of receive addresses and moves
9733          * towards the first, as a result a collision should not be possible
9734          */
9735         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9736         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9737
9738         ether_addr_copy(vf_mac_addr, mac_addr);
9739         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9740         adapter->mac_table[rar_entry].queue = vf;
9741         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9742         igb_rar_set_index(adapter, rar_entry);
9743
9744         return 0;
9745 }
9746
9747 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9748 {
9749         struct igb_adapter *adapter = netdev_priv(netdev);
9750
9751         if (vf >= adapter->vfs_allocated_count)
9752                 return -EINVAL;
9753
9754         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9755          * flag and allows to overwrite the MAC via VF netdev.  This
9756          * is necessary to allow libvirt a way to restore the original
9757          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9758          * down a VM.
9759          */
9760         if (is_zero_ether_addr(mac)) {
9761                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9762                 dev_info(&adapter->pdev->dev,
9763                          "remove administratively set MAC on VF %d\n",
9764                          vf);
9765         } else if (is_valid_ether_addr(mac)) {
9766                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9767                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9768                          mac, vf);
9769                 dev_info(&adapter->pdev->dev,
9770                          "Reload the VF driver to make this change effective.");
9771                 /* Generate additional warning if PF is down */
9772                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9773                         dev_warn(&adapter->pdev->dev,
9774                                  "The VF MAC address has been set, but the PF device is not up.\n");
9775                         dev_warn(&adapter->pdev->dev,
9776                                  "Bring the PF device up before attempting to use the VF device.\n");
9777                 }
9778         } else {
9779                 return -EINVAL;
9780         }
9781         return igb_set_vf_mac(adapter, vf, mac);
9782 }
9783
9784 static int igb_link_mbps(int internal_link_speed)
9785 {
9786         switch (internal_link_speed) {
9787         case SPEED_100:
9788                 return 100;
9789         case SPEED_1000:
9790                 return 1000;
9791         default:
9792                 return 0;
9793         }
9794 }
9795
9796 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9797                                   int link_speed)
9798 {
9799         int rf_dec, rf_int;
9800         u32 bcnrc_val;
9801
9802         if (tx_rate != 0) {
9803                 /* Calculate the rate factor values to set */
9804                 rf_int = link_speed / tx_rate;
9805                 rf_dec = (link_speed - (rf_int * tx_rate));
9806                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9807                          tx_rate;
9808
9809                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9810                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9811                               E1000_RTTBCNRC_RF_INT_MASK);
9812                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9813         } else {
9814                 bcnrc_val = 0;
9815         }
9816
9817         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9818         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9819          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9820          */
9821         wr32(E1000_RTTBCNRM, 0x14);
9822         wr32(E1000_RTTBCNRC, bcnrc_val);
9823 }
9824
9825 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9826 {
9827         int actual_link_speed, i;
9828         bool reset_rate = false;
9829
9830         /* VF TX rate limit was not set or not supported */
9831         if ((adapter->vf_rate_link_speed == 0) ||
9832             (adapter->hw.mac.type != e1000_82576))
9833                 return;
9834
9835         actual_link_speed = igb_link_mbps(adapter->link_speed);
9836         if (actual_link_speed != adapter->vf_rate_link_speed) {
9837                 reset_rate = true;
9838                 adapter->vf_rate_link_speed = 0;
9839                 dev_info(&adapter->pdev->dev,
9840                          "Link speed has been changed. VF Transmit rate is disabled\n");
9841         }
9842
9843         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9844                 if (reset_rate)
9845                         adapter->vf_data[i].tx_rate = 0;
9846
9847                 igb_set_vf_rate_limit(&adapter->hw, i,
9848                                       adapter->vf_data[i].tx_rate,
9849                                       actual_link_speed);
9850         }
9851 }
9852
9853 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9854                              int min_tx_rate, int max_tx_rate)
9855 {
9856         struct igb_adapter *adapter = netdev_priv(netdev);
9857         struct e1000_hw *hw = &adapter->hw;
9858         int actual_link_speed;
9859
9860         if (hw->mac.type != e1000_82576)
9861                 return -EOPNOTSUPP;
9862
9863         if (min_tx_rate)
9864                 return -EINVAL;
9865
9866         actual_link_speed = igb_link_mbps(adapter->link_speed);
9867         if ((vf >= adapter->vfs_allocated_count) ||
9868             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9869             (max_tx_rate < 0) ||
9870             (max_tx_rate > actual_link_speed))
9871                 return -EINVAL;
9872
9873         adapter->vf_rate_link_speed = actual_link_speed;
9874         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9875         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9876
9877         return 0;
9878 }
9879
9880 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9881                                    bool setting)
9882 {
9883         struct igb_adapter *adapter = netdev_priv(netdev);
9884         struct e1000_hw *hw = &adapter->hw;
9885         u32 reg_val, reg_offset;
9886
9887         if (!adapter->vfs_allocated_count)
9888                 return -EOPNOTSUPP;
9889
9890         if (vf >= adapter->vfs_allocated_count)
9891                 return -EINVAL;
9892
9893         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9894         reg_val = rd32(reg_offset);
9895         if (setting)
9896                 reg_val |= (BIT(vf) |
9897                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9898         else
9899                 reg_val &= ~(BIT(vf) |
9900                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9901         wr32(reg_offset, reg_val);
9902
9903         adapter->vf_data[vf].spoofchk_enabled = setting;
9904         return 0;
9905 }
9906
9907 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9908 {
9909         struct igb_adapter *adapter = netdev_priv(netdev);
9910
9911         if (vf >= adapter->vfs_allocated_count)
9912                 return -EINVAL;
9913         if (adapter->vf_data[vf].trusted == setting)
9914                 return 0;
9915
9916         adapter->vf_data[vf].trusted = setting;
9917
9918         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9919                  vf, setting ? "" : "not ");
9920         return 0;
9921 }
9922
9923 static int igb_ndo_get_vf_config(struct net_device *netdev,
9924                                  int vf, struct ifla_vf_info *ivi)
9925 {
9926         struct igb_adapter *adapter = netdev_priv(netdev);
9927         if (vf >= adapter->vfs_allocated_count)
9928                 return -EINVAL;
9929         ivi->vf = vf;
9930         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9931         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9932         ivi->min_tx_rate = 0;
9933         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9934         ivi->qos = adapter->vf_data[vf].pf_qos;
9935         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9936         ivi->trusted = adapter->vf_data[vf].trusted;
9937         return 0;
9938 }
9939
9940 static void igb_vmm_control(struct igb_adapter *adapter)
9941 {
9942         struct e1000_hw *hw = &adapter->hw;
9943         u32 reg;
9944
9945         switch (hw->mac.type) {
9946         case e1000_82575:
9947         case e1000_i210:
9948         case e1000_i211:
9949         case e1000_i354:
9950         default:
9951                 /* replication is not supported for 82575 */
9952                 return;
9953         case e1000_82576:
9954                 /* notify HW that the MAC is adding vlan tags */
9955                 reg = rd32(E1000_DTXCTL);
9956                 reg |= E1000_DTXCTL_VLAN_ADDED;
9957                 wr32(E1000_DTXCTL, reg);
9958                 fallthrough;
9959         case e1000_82580:
9960                 /* enable replication vlan tag stripping */
9961                 reg = rd32(E1000_RPLOLR);
9962                 reg |= E1000_RPLOLR_STRVLAN;
9963                 wr32(E1000_RPLOLR, reg);
9964                 fallthrough;
9965         case e1000_i350:
9966                 /* none of the above registers are supported by i350 */
9967                 break;
9968         }
9969
9970         if (adapter->vfs_allocated_count) {
9971                 igb_vmdq_set_loopback_pf(hw, true);
9972                 igb_vmdq_set_replication_pf(hw, true);
9973                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9974                                               adapter->vfs_allocated_count);
9975         } else {
9976                 igb_vmdq_set_loopback_pf(hw, false);
9977                 igb_vmdq_set_replication_pf(hw, false);
9978         }
9979 }
9980
9981 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9982 {
9983         struct e1000_hw *hw = &adapter->hw;
9984         u32 dmac_thr;
9985         u16 hwm;
9986         u32 reg;
9987
9988         if (hw->mac.type > e1000_82580) {
9989                 if (adapter->flags & IGB_FLAG_DMAC) {
9990                         /* force threshold to 0. */
9991                         wr32(E1000_DMCTXTH, 0);
9992
9993                         /* DMA Coalescing high water mark needs to be greater
9994                          * than the Rx threshold. Set hwm to PBA - max frame
9995                          * size in 16B units, capping it at PBA - 6KB.
9996                          */
9997                         hwm = 64 * (pba - 6);
9998                         reg = rd32(E1000_FCRTC);
9999                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
10000                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
10001                                 & E1000_FCRTC_RTH_COAL_MASK);
10002                         wr32(E1000_FCRTC, reg);
10003
10004                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
10005                          * frame size, capping it at PBA - 10KB.
10006                          */
10007                         dmac_thr = pba - 10;
10008                         reg = rd32(E1000_DMACR);
10009                         reg &= ~E1000_DMACR_DMACTHR_MASK;
10010                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
10011                                 & E1000_DMACR_DMACTHR_MASK);
10012
10013                         /* transition to L0x or L1 if available..*/
10014                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
10015
10016                         /* watchdog timer= +-1000 usec in 32usec intervals */
10017                         reg |= (1000 >> 5);
10018
10019                         /* Disable BMC-to-OS Watchdog Enable */
10020                         if (hw->mac.type != e1000_i354)
10021                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
10022                         wr32(E1000_DMACR, reg);
10023
10024                         /* no lower threshold to disable
10025                          * coalescing(smart fifb)-UTRESH=0
10026                          */
10027                         wr32(E1000_DMCRTRH, 0);
10028
10029                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
10030
10031                         wr32(E1000_DMCTLX, reg);
10032
10033                         /* free space in tx packet buffer to wake from
10034                          * DMA coal
10035                          */
10036                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
10037                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
10038                 }
10039
10040                 if (hw->mac.type >= e1000_i210 ||
10041                     (adapter->flags & IGB_FLAG_DMAC)) {
10042                         reg = rd32(E1000_PCIEMISC);
10043                         reg |= E1000_PCIEMISC_LX_DECISION;
10044                         wr32(E1000_PCIEMISC, reg);
10045                 } /* endif adapter->dmac is not disabled */
10046         } else if (hw->mac.type == e1000_82580) {
10047                 u32 reg = rd32(E1000_PCIEMISC);
10048
10049                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
10050                 wr32(E1000_DMACR, 0);
10051         }
10052 }
10053
10054 /**
10055  *  igb_read_i2c_byte - Reads 8 bit word over I2C
10056  *  @hw: pointer to hardware structure
10057  *  @byte_offset: byte offset to read
10058  *  @dev_addr: device address
10059  *  @data: value read
10060  *
10061  *  Performs byte read operation over I2C interface at
10062  *  a specified device address.
10063  **/
10064 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
10065                       u8 dev_addr, u8 *data)
10066 {
10067         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
10068         struct i2c_client *this_client = adapter->i2c_client;
10069         s32 status;
10070         u16 swfw_mask = 0;
10071
10072         if (!this_client)
10073                 return E1000_ERR_I2C;
10074
10075         swfw_mask = E1000_SWFW_PHY0_SM;
10076
10077         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
10078                 return E1000_ERR_SWFW_SYNC;
10079
10080         status = i2c_smbus_read_byte_data(this_client, byte_offset);
10081         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
10082
10083         if (status < 0)
10084                 return E1000_ERR_I2C;
10085         else {
10086                 *data = status;
10087                 return 0;
10088         }
10089 }
10090
10091 /**
10092  *  igb_write_i2c_byte - Writes 8 bit word over I2C
10093  *  @hw: pointer to hardware structure
10094  *  @byte_offset: byte offset to write
10095  *  @dev_addr: device address
10096  *  @data: value to write
10097  *
10098  *  Performs byte write operation over I2C interface at
10099  *  a specified device address.
10100  **/
10101 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
10102                        u8 dev_addr, u8 data)
10103 {
10104         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
10105         struct i2c_client *this_client = adapter->i2c_client;
10106         s32 status;
10107         u16 swfw_mask = E1000_SWFW_PHY0_SM;
10108
10109         if (!this_client)
10110                 return E1000_ERR_I2C;
10111
10112         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
10113                 return E1000_ERR_SWFW_SYNC;
10114         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
10115         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
10116
10117         if (status)
10118                 return E1000_ERR_I2C;
10119         else
10120                 return 0;
10121
10122 }
10123
10124 int igb_reinit_queues(struct igb_adapter *adapter)
10125 {
10126         struct net_device *netdev = adapter->netdev;
10127         struct pci_dev *pdev = adapter->pdev;
10128         int err = 0;
10129
10130         if (netif_running(netdev))
10131                 igb_close(netdev);
10132
10133         igb_reset_interrupt_capability(adapter);
10134
10135         if (igb_init_interrupt_scheme(adapter, true)) {
10136                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
10137                 return -ENOMEM;
10138         }
10139
10140         if (netif_running(netdev))
10141                 err = igb_open(netdev);
10142
10143         return err;
10144 }
10145
10146 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
10147 {
10148         struct igb_nfc_filter *rule;
10149
10150         spin_lock(&adapter->nfc_lock);
10151
10152         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10153                 igb_erase_filter(adapter, rule);
10154
10155         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
10156                 igb_erase_filter(adapter, rule);
10157
10158         spin_unlock(&adapter->nfc_lock);
10159 }
10160
10161 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
10162 {
10163         struct igb_nfc_filter *rule;
10164
10165         spin_lock(&adapter->nfc_lock);
10166
10167         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10168                 igb_add_filter(adapter, rule);
10169
10170         spin_unlock(&adapter->nfc_lock);
10171 }
10172 /* igb_main.c */