drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/aer.h>
  32 #include <linux/prefetch.h>
  33 #include <linux/bpf.h>
  34 #include <linux/bpf_trace.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/etherdevice.h>
  37 #ifdef CONFIG_IGB_DCA
  38 #include <linux/dca.h>
  39 #endif
  40 #include <linux/i2c.h>
  41 #include "igb.h"
  42
  43 enum queue_mode {
  44         QUEUE_MODE_STRICT_PRIORITY,
  45         QUEUE_MODE_STREAM_RESERVATION,
  46 };
  47
  48 enum tx_queue_prio {
  49         TX_QUEUE_PRIO_HIGH,
  50         TX_QUEUE_PRIO_LOW,
  51 };
  52
  53 char igb_driver_name[] = "igb";
  54 static const char igb_driver_string[] =
  55                                 "Intel(R) Gigabit Ethernet Network Driver";
  56 static const char igb_copyright[] =
  57                                 "Copyright (c) 2007-2014 Intel Corporation.";
  58
  59 static const struct e1000_info *igb_info_tbl[] = {
  60         [board_82575] = &e1000_82575_info,
  61 };
  62
  63 static const struct pci_device_id igb_pci_tbl[] = {
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  68         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  99         /* required last entry */
 100         {0, }
 101 };
 102
 103 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 104
 105 static int igb_setup_all_tx_resources(struct igb_adapter *);
 106 static int igb_setup_all_rx_resources(struct igb_adapter *);
 107 static void igb_free_all_tx_resources(struct igb_adapter *);
 108 static void igb_free_all_rx_resources(struct igb_adapter *);
 109 static void igb_setup_mrqc(struct igb_adapter *);
 110 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 111 static void igb_remove(struct pci_dev *pdev);
 112 static int igb_sw_init(struct igb_adapter *);
 113 int igb_open(struct net_device *);
 114 int igb_close(struct net_device *);
 115 static void igb_configure(struct igb_adapter *);
 116 static void igb_configure_tx(struct igb_adapter *);
 117 static void igb_configure_rx(struct igb_adapter *);
 118 static void igb_clean_all_tx_rings(struct igb_adapter *);
 119 static void igb_clean_all_rx_rings(struct igb_adapter *);
 120 static void igb_clean_tx_ring(struct igb_ring *);
 121 static void igb_clean_rx_ring(struct igb_ring *);
 122 static void igb_set_rx_mode(struct net_device *);
 123 static void igb_update_phy_info(struct timer_list *);
 124 static void igb_watchdog(struct timer_list *);
 125 static void igb_watchdog_task(struct work_struct *);
 126 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 127 static void igb_get_stats64(struct net_device *dev,
 128                             struct rtnl_link_stats64 *stats);
 129 static int igb_change_mtu(struct net_device *, int);
 130 static int igb_set_mac(struct net_device *, void *);
 131 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 132 static irqreturn_t igb_intr(int irq, void *);
 133 static irqreturn_t igb_intr_msi(int irq, void *);
 134 static irqreturn_t igb_msix_other(int irq, void *);
 135 static irqreturn_t igb_msix_ring(int irq, void *);
 136 #ifdef CONFIG_IGB_DCA
 137 static void igb_update_dca(struct igb_q_vector *);
 138 static void igb_setup_dca(struct igb_adapter *);
 139 #endif /* CONFIG_IGB_DCA */
 140 static int igb_poll(struct napi_struct *, int);
 141 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 142 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 143 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 144 static void igb_tx_timeout(struct net_device *, unsigned int txqueue);
 145 static void igb_reset_task(struct work_struct *);
 146 static void igb_vlan_mode(struct net_device *netdev,
 147                           netdev_features_t features);
 148 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 149 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 150 static void igb_restore_vlan(struct igb_adapter *);
 151 static void igb_rar_set_index(struct igb_adapter *, u32);
 152 static void igb_ping_all_vfs(struct igb_adapter *);
 153 static void igb_msg_task(struct igb_adapter *);
 154 static void igb_vmm_control(struct igb_adapter *);
 155 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 156 static void igb_flush_mac_table(struct igb_adapter *);
 157 static int igb_available_rars(struct igb_adapter *, u8);
 158 static void igb_set_default_mac_filter(struct igb_adapter *);
 159 static int igb_uc_sync(struct net_device *, const unsigned char *);
 160 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 161 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 162 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 163 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 164                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 165 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 166 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 167                                    bool setting);
 168 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 169                                 bool setting);
 170 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 171                                  struct ifla_vf_info *ivi);
 172 static void igb_check_vf_rate_limit(struct igb_adapter *);
 173 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 174 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 175
 176 #ifdef CONFIG_PCI_IOV
 177 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 178 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 179 static int igb_disable_sriov(struct pci_dev *dev);
 180 static int igb_pci_disable_sriov(struct pci_dev *dev);
 181 #endif
 182
 183 static int igb_suspend(struct device *);
 184 static int igb_resume(struct device *);
 185 static int igb_runtime_suspend(struct device *dev);
 186 static int igb_runtime_resume(struct device *dev);
 187 static int igb_runtime_idle(struct device *dev);
 188 static const struct dev_pm_ops igb_pm_ops = {
 189         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 190         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 191                         igb_runtime_idle)
 192 };
 193 static void igb_shutdown(struct pci_dev *);
 194 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 195 #ifdef CONFIG_IGB_DCA
 196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 197 static struct notifier_block dca_notifier = {
 198         .notifier_call  = igb_notify_dca,
 199         .next           = NULL,
 200         .priority       = 0
 201 };
 202 #endif
 203 #ifdef CONFIG_PCI_IOV
 204 static unsigned int max_vfs;
 205 module_param(max_vfs, uint, 0);
 206 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 207 #endif /* CONFIG_PCI_IOV */
 208
 209 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 210                      pci_channel_state_t);
 211 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 212 static void igb_io_resume(struct pci_dev *);
 213
 214 static const struct pci_error_handlers igb_err_handler = {
 215         .error_detected = igb_io_error_detected,
 216         .slot_reset = igb_io_slot_reset,
 217         .resume = igb_io_resume,
 218 };
 219
 220 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 221
 222 static struct pci_driver igb_driver = {
 223         .name     = igb_driver_name,
 224         .id_table = igb_pci_tbl,
 225         .probe    = igb_probe,
 226         .remove   = igb_remove,
 227 #ifdef CONFIG_PM
 228         .driver.pm = &igb_pm_ops,
 229 #endif
 230         .shutdown = igb_shutdown,
 231         .sriov_configure = igb_pci_sriov_configure,
 232         .err_handler = &igb_err_handler
 233 };
 234
 235 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 236 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 237 MODULE_LICENSE("GPL v2");
 238
 239 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 240 static int debug = -1;
 241 module_param(debug, int, 0);
 242 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 243
 244 struct igb_reg_info {
 245         u32 ofs;
 246         char *name;
 247 };
 248
 249 static const struct igb_reg_info igb_reg_info_tbl[] = {
 250
 251         /* General Registers */
 252         {E1000_CTRL, "CTRL"},
 253         {E1000_STATUS, "STATUS"},
 254         {E1000_CTRL_EXT, "CTRL_EXT"},
 255
 256         /* Interrupt Registers */
 257         {E1000_ICR, "ICR"},
 258
 259         /* RX Registers */
 260         {E1000_RCTL, "RCTL"},
 261         {E1000_RDLEN(0), "RDLEN"},
 262         {E1000_RDH(0), "RDH"},
 263         {E1000_RDT(0), "RDT"},
 264         {E1000_RXDCTL(0), "RXDCTL"},
 265         {E1000_RDBAL(0), "RDBAL"},
 266         {E1000_RDBAH(0), "RDBAH"},
 267
 268         /* TX Registers */
 269         {E1000_TCTL, "TCTL"},
 270         {E1000_TDBAL(0), "TDBAL"},
 271         {E1000_TDBAH(0), "TDBAH"},
 272         {E1000_TDLEN(0), "TDLEN"},
 273         {E1000_TDH(0), "TDH"},
 274         {E1000_TDT(0), "TDT"},
 275         {E1000_TXDCTL(0), "TXDCTL"},
 276         {E1000_TDFH, "TDFH"},
 277         {E1000_TDFT, "TDFT"},
 278         {E1000_TDFHS, "TDFHS"},
 279         {E1000_TDFPC, "TDFPC"},
 280
 281         /* List Terminator */
 282         {}
 283 };
 284
 285 /* igb_regdump - register printout routine */
 286 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 287 {
 288         int n = 0;
 289         char rname[16];
 290         u32 regs[8];
 291
 292         switch (reginfo->ofs) {
 293         case E1000_RDLEN(0):
 294                 for (n = 0; n < 4; n++)
 295                         regs[n] = rd32(E1000_RDLEN(n));
 296                 break;
 297         case E1000_RDH(0):
 298                 for (n = 0; n < 4; n++)
 299                         regs[n] = rd32(E1000_RDH(n));
 300                 break;
 301         case E1000_RDT(0):
 302                 for (n = 0; n < 4; n++)
 303                         regs[n] = rd32(E1000_RDT(n));
 304                 break;
 305         case E1000_RXDCTL(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RXDCTL(n));
 308                 break;
 309         case E1000_RDBAL(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDBAL(n));
 312                 break;
 313         case E1000_RDBAH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDBAH(n));
 316                 break;
 317         case E1000_TDBAL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_TDBAL(n));
 320                 break;
 321         case E1000_TDBAH(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_TDBAH(n));
 324                 break;
 325         case E1000_TDLEN(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_TDLEN(n));
 328                 break;
 329         case E1000_TDH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_TDH(n));
 332                 break;
 333         case E1000_TDT(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDT(n));
 336                 break;
 337         case E1000_TXDCTL(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TXDCTL(n));
 340                 break;
 341         default:
 342                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 343                 return;
 344         }
 345
 346         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 347         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 348                 regs[2], regs[3]);
 349 }
 350
 351 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 352 static void igb_dump(struct igb_adapter *adapter)
 353 {
 354         struct net_device *netdev = adapter->netdev;
 355         struct e1000_hw *hw = &adapter->hw;
 356         struct igb_reg_info *reginfo;
 357         struct igb_ring *tx_ring;
 358         union e1000_adv_tx_desc *tx_desc;
 359         struct my_u0 { __le64 a; __le64 b; } *u0;
 360         struct igb_ring *rx_ring;
 361         union e1000_adv_rx_desc *rx_desc;
 362         u32 staterr;
 363         u16 i, n;
 364
 365         if (!netif_msg_hw(adapter))
 366                 return;
 367
 368         /* Print netdevice Info */
 369         if (netdev) {
 370                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 371                 pr_info("Device Name     state            trans_start\n");
 372                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 373                         netdev->state, dev_trans_start(netdev));
 374         }
 375
 376         /* Print Registers */
 377         dev_info(&adapter->pdev->dev, "Register Dump\n");
 378         pr_info(" Register Name   Value\n");
 379         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 380              reginfo->name; reginfo++) {
 381                 igb_regdump(hw, reginfo);
 382         }
 383
 384         /* Print TX Ring Summary */
 385         if (!netdev || !netif_running(netdev))
 386                 goto exit;
 387
 388         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 389         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 390         for (n = 0; n < adapter->num_tx_queues; n++) {
 391                 struct igb_tx_buffer *buffer_info;
 392                 tx_ring = adapter->tx_ring[n];
 393                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 394                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 395                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 396                         (u64)dma_unmap_addr(buffer_info, dma),
 397                         dma_unmap_len(buffer_info, len),
 398                         buffer_info->next_to_watch,
 399                         (u64)buffer_info->time_stamp);
 400         }
 401
 402         /* Print TX Rings */
 403         if (!netif_msg_tx_done(adapter))
 404                 goto rx_ring_summary;
 405
 406         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 407
 408         /* Transmit Descriptor Formats
 409          *
 410          * Advanced Transmit Descriptor
 411          *   +--------------------------------------------------------------+
 412          * 0 |         Buffer Address [63:0]                                |
 413          *   +--------------------------------------------------------------+
 414          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 415          *   +--------------------------------------------------------------+
 416          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 417          */
 418
 419         for (n = 0; n < adapter->num_tx_queues; n++) {
 420                 tx_ring = adapter->tx_ring[n];
 421                 pr_info("------------------------------------\n");
 422                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 423                 pr_info("------------------------------------\n");
 424                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 425
 426                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 427                         const char *next_desc;
 428                         struct igb_tx_buffer *buffer_info;
 429                         tx_desc = IGB_TX_DESC(tx_ring, i);
 430                         buffer_info = &tx_ring->tx_buffer_info[i];
 431                         u0 = (struct my_u0 *)tx_desc;
 432                         if (i == tx_ring->next_to_use &&
 433                             i == tx_ring->next_to_clean)
 434                                 next_desc = " NTC/U";
 435                         else if (i == tx_ring->next_to_use)
 436                                 next_desc = " NTU";
 437                         else if (i == tx_ring->next_to_clean)
 438                                 next_desc = " NTC";
 439                         else
 440                                 next_desc = "";
 441
 442                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 443                                 i, le64_to_cpu(u0->a),
 444                                 le64_to_cpu(u0->b),
 445                                 (u64)dma_unmap_addr(buffer_info, dma),
 446                                 dma_unmap_len(buffer_info, len),
 447                                 buffer_info->next_to_watch,
 448                                 (u64)buffer_info->time_stamp,
 449                                 buffer_info->skb, next_desc);
 450
 451                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 452                                 print_hex_dump(KERN_INFO, "",
 453                                         DUMP_PREFIX_ADDRESS,
 454                                         16, 1, buffer_info->skb->data,
 455                                         dma_unmap_len(buffer_info, len),
 456                                         true);
 457                 }
 458         }
 459
 460         /* Print RX Rings Summary */
 461 rx_ring_summary:
 462         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 463         pr_info("Queue [NTU] [NTC]\n");
 464         for (n = 0; n < adapter->num_rx_queues; n++) {
 465                 rx_ring = adapter->rx_ring[n];
 466                 pr_info(" %5d %5X %5X\n",
 467                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 468         }
 469
 470         /* Print RX Rings */
 471         if (!netif_msg_rx_status(adapter))
 472                 goto exit;
 473
 474         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 475
 476         /* Advanced Receive Descriptor (Read) Format
 477          *    63                                           1        0
 478          *    +-----------------------------------------------------+
 479          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 480          *    +----------------------------------------------+------+
 481          *  8 |       Header Buffer Address [63:1]           |  DD  |
 482          *    +-----------------------------------------------------+
 483          *
 484          *
 485          * Advanced Receive Descriptor (Write-Back) Format
 486          *
 487          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 488          *   +------------------------------------------------------+
 489          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 490          *   | Checksum   Ident  |   |           |    | Type | Type |
 491          *   +------------------------------------------------------+
 492          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 493          *   +------------------------------------------------------+
 494          *   63       48 47    32 31            20 19               0
 495          */
 496
 497         for (n = 0; n < adapter->num_rx_queues; n++) {
 498                 rx_ring = adapter->rx_ring[n];
 499                 pr_info("------------------------------------\n");
 500                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 501                 pr_info("------------------------------------\n");
 502                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 503                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 504
 505                 for (i = 0; i < rx_ring->count; i++) {
 506                         const char *next_desc;
 507                         struct igb_rx_buffer *buffer_info;
 508                         buffer_info = &rx_ring->rx_buffer_info[i];
 509                         rx_desc = IGB_RX_DESC(rx_ring, i);
 510                         u0 = (struct my_u0 *)rx_desc;
 511                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 512
 513                         if (i == rx_ring->next_to_use)
 514                                 next_desc = " NTU";
 515                         else if (i == rx_ring->next_to_clean)
 516                                 next_desc = " NTC";
 517                         else
 518                                 next_desc = "";
 519
 520                         if (staterr & E1000_RXD_STAT_DD) {
 521                                 /* Descriptor Done */
 522                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 523                                         "RWB", i,
 524                                         le64_to_cpu(u0->a),
 525                                         le64_to_cpu(u0->b),
 526                                         next_desc);
 527                         } else {
 528                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 529                                         "R  ", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         (u64)buffer_info->dma,
 533                                         next_desc);
 534
 535                                 if (netif_msg_pktdata(adapter) &&
 536                                     buffer_info->dma && buffer_info->page) {
 537                                         print_hex_dump(KERN_INFO, "",
 538                                           DUMP_PREFIX_ADDRESS,
 539                                           16, 1,
 540                                           page_address(buffer_info->page) +
 541                                                       buffer_info->page_offset,
 542                                           igb_rx_bufsz(rx_ring), true);
 543                                 }
 544                         }
 545                 }
 546         }
 547
 548 exit:
 549         return;
 550 }
 551
 552 /**
 553  *  igb_get_i2c_data - Reads the I2C SDA data bit
 554  *  @data: opaque pointer to adapter struct
 555  *
 556  *  Returns the I2C data bit value
 557  **/
 558 static int igb_get_i2c_data(void *data)
 559 {
 560         struct igb_adapter *adapter = (struct igb_adapter *)data;
 561         struct e1000_hw *hw = &adapter->hw;
 562         s32 i2cctl = rd32(E1000_I2CPARAMS);
 563
 564         return !!(i2cctl & E1000_I2C_DATA_IN);
 565 }
 566
 567 /**
 568  *  igb_set_i2c_data - Sets the I2C data bit
 569  *  @data: pointer to hardware structure
 570  *  @state: I2C data value (0 or 1) to set
 571  *
 572  *  Sets the I2C data bit
 573  **/
 574 static void igb_set_i2c_data(void *data, int state)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         if (state)
 581                 i2cctl |= E1000_I2C_DATA_OUT;
 582         else
 583                 i2cctl &= ~E1000_I2C_DATA_OUT;
 584
 585         i2cctl &= ~E1000_I2C_DATA_OE_N;
 586         i2cctl |= E1000_I2C_CLK_OE_N;
 587         wr32(E1000_I2CPARAMS, i2cctl);
 588         wrfl();
 589
 590 }
 591
 592 /**
 593  *  igb_set_i2c_clk - Sets the I2C SCL clock
 594  *  @data: pointer to hardware structure
 595  *  @state: state to set clock
 596  *
 597  *  Sets the I2C clock line to state
 598  **/
 599 static void igb_set_i2c_clk(void *data, int state)
 600 {
 601         struct igb_adapter *adapter = (struct igb_adapter *)data;
 602         struct e1000_hw *hw = &adapter->hw;
 603         s32 i2cctl = rd32(E1000_I2CPARAMS);
 604
 605         if (state) {
 606                 i2cctl |= E1000_I2C_CLK_OUT;
 607                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 608         } else {
 609                 i2cctl &= ~E1000_I2C_CLK_OUT;
 610                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 611         }
 612         wr32(E1000_I2CPARAMS, i2cctl);
 613         wrfl();
 614 }
 615
 616 /**
 617  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 618  *  @data: pointer to hardware structure
 619  *
 620  *  Gets the I2C clock state
 621  **/
 622 static int igb_get_i2c_clk(void *data)
 623 {
 624         struct igb_adapter *adapter = (struct igb_adapter *)data;
 625         struct e1000_hw *hw = &adapter->hw;
 626         s32 i2cctl = rd32(E1000_I2CPARAMS);
 627
 628         return !!(i2cctl & E1000_I2C_CLK_IN);
 629 }
 630
 631 static const struct i2c_algo_bit_data igb_i2c_algo = {
 632         .setsda         = igb_set_i2c_data,
 633         .setscl         = igb_set_i2c_clk,
 634         .getsda         = igb_get_i2c_data,
 635         .getscl         = igb_get_i2c_clk,
 636         .udelay         = 5,
 637         .timeout        = 20,
 638 };
 639
 640 /**
 641  *  igb_get_hw_dev - return device
 642  *  @hw: pointer to hardware structure
 643  *
 644  *  used by hardware layer to print debugging information
 645  **/
 646 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 647 {
 648         struct igb_adapter *adapter = hw->back;
 649         return adapter->netdev;
 650 }
 651
 652 /**
 653  *  igb_init_module - Driver Registration Routine
 654  *
 655  *  igb_init_module is the first routine called when the driver is
 656  *  loaded. All it does is register with the PCI subsystem.
 657  **/
 658 static int __init igb_init_module(void)
 659 {
 660         int ret;
 661
 662         pr_info("%s\n", igb_driver_string);
 663         pr_info("%s\n", igb_copyright);
 664
 665 #ifdef CONFIG_IGB_DCA
 666         dca_register_notify(&dca_notifier);
 667 #endif
 668         ret = pci_register_driver(&igb_driver);
 669         return ret;
 670 }
 671
 672 module_init(igb_init_module);
 673
 674 /**
 675  *  igb_exit_module - Driver Exit Cleanup Routine
 676  *
 677  *  igb_exit_module is called just before the driver is removed
 678  *  from memory.
 679  **/
 680 static void __exit igb_exit_module(void)
 681 {
 682 #ifdef CONFIG_IGB_DCA
 683         dca_unregister_notify(&dca_notifier);
 684 #endif
 685         pci_unregister_driver(&igb_driver);
 686 }
 687
 688 module_exit(igb_exit_module);
 689
 690 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 691 /**
 692  *  igb_cache_ring_register - Descriptor ring to register mapping
 693  *  @adapter: board private structure to initialize
 694  *
 695  *  Once we know the feature-set enabled for the device, we'll cache
 696  *  the register offset the descriptor ring is assigned to.
 697  **/
 698 static void igb_cache_ring_register(struct igb_adapter *adapter)
 699 {
 700         int i = 0, j = 0;
 701         u32 rbase_offset = adapter->vfs_allocated_count;
 702
 703         switch (adapter->hw.mac.type) {
 704         case e1000_82576:
 705                 /* The queues are allocated for virtualization such that VF 0
 706                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 707                  * In order to avoid collision we start at the first free queue
 708                  * and continue consuming queues in the same sequence
 709                  */
 710                 if (adapter->vfs_allocated_count) {
 711                         for (; i < adapter->rss_queues; i++)
 712                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 713                                                                Q_IDX_82576(i);
 714                 }
 715                 fallthrough;
 716         case e1000_82575:
 717         case e1000_82580:
 718         case e1000_i350:
 719         case e1000_i354:
 720         case e1000_i210:
 721         case e1000_i211:
 722         default:
 723                 for (; i < adapter->num_rx_queues; i++)
 724                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 725                 for (; j < adapter->num_tx_queues; j++)
 726                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 727                 break;
 728         }
 729 }
 730
 731 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 732 {
 733         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 734         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 735         u32 value = 0;
 736
 737         if (E1000_REMOVED(hw_addr))
 738                 return ~value;
 739
 740         value = readl(&hw_addr[reg]);
 741
 742         /* reads should not return all F's */
 743         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 744                 struct net_device *netdev = igb->netdev;
 745                 hw->hw_addr = NULL;
 746                 netdev_err(netdev, "PCIe link lost\n");
 747                 WARN(pci_device_is_present(igb->pdev),
 748                      "igb: Failed to read reg 0x%x!\n", reg);
 749         }
 750
 751         return value;
 752 }
 753
 754 /**
 755  *  igb_write_ivar - configure ivar for given MSI-X vector
 756  *  @hw: pointer to the HW structure
 757  *  @msix_vector: vector number we are allocating to a given ring
 758  *  @index: row index of IVAR register to write within IVAR table
 759  *  @offset: column offset of in IVAR, should be multiple of 8
 760  *
 761  *  This function is intended to handle the writing of the IVAR register
 762  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 763  *  each containing an cause allocation for an Rx and Tx ring, and a
 764  *  variable number of rows depending on the number of queues supported.
 765  **/
 766 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 767                            int index, int offset)
 768 {
 769         u32 ivar = array_rd32(E1000_IVAR0, index);
 770
 771         /* clear any bits that are currently set */
 772         ivar &= ~((u32)0xFF << offset);
 773
 774         /* write vector and valid bit */
 775         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 776
 777         array_wr32(E1000_IVAR0, index, ivar);
 778 }
 779
 780 #define IGB_N0_QUEUE -1
 781 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 782 {
 783         struct igb_adapter *adapter = q_vector->adapter;
 784         struct e1000_hw *hw = &adapter->hw;
 785         int rx_queue = IGB_N0_QUEUE;
 786         int tx_queue = IGB_N0_QUEUE;
 787         u32 msixbm = 0;
 788
 789         if (q_vector->rx.ring)
 790                 rx_queue = q_vector->rx.ring->reg_idx;
 791         if (q_vector->tx.ring)
 792                 tx_queue = q_vector->tx.ring->reg_idx;
 793
 794         switch (hw->mac.type) {
 795         case e1000_82575:
 796                 /* The 82575 assigns vectors using a bitmask, which matches the
 797                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 798                  * or more queues to a vector, we write the appropriate bits
 799                  * into the MSIXBM register for that vector.
 800                  */
 801                 if (rx_queue > IGB_N0_QUEUE)
 802                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 803                 if (tx_queue > IGB_N0_QUEUE)
 804                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 805                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 806                         msixbm |= E1000_EIMS_OTHER;
 807                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 808                 q_vector->eims_value = msixbm;
 809                 break;
 810         case e1000_82576:
 811                 /* 82576 uses a table that essentially consists of 2 columns
 812                  * with 8 rows.  The ordering is column-major so we use the
 813                  * lower 3 bits as the row index, and the 4th bit as the
 814                  * column offset.
 815                  */
 816                 if (rx_queue > IGB_N0_QUEUE)
 817                         igb_write_ivar(hw, msix_vector,
 818                                        rx_queue & 0x7,
 819                                        (rx_queue & 0x8) << 1);
 820                 if (tx_queue > IGB_N0_QUEUE)
 821                         igb_write_ivar(hw, msix_vector,
 822                                        tx_queue & 0x7,
 823                                        ((tx_queue & 0x8) << 1) + 8);
 824                 q_vector->eims_value = BIT(msix_vector);
 825                 break;
 826         case e1000_82580:
 827         case e1000_i350:
 828         case e1000_i354:
 829         case e1000_i210:
 830         case e1000_i211:
 831                 /* On 82580 and newer adapters the scheme is similar to 82576
 832                  * however instead of ordering column-major we have things
 833                  * ordered row-major.  So we traverse the table by using
 834                  * bit 0 as the column offset, and the remaining bits as the
 835                  * row index.
 836                  */
 837                 if (rx_queue > IGB_N0_QUEUE)
 838                         igb_write_ivar(hw, msix_vector,
 839                                        rx_queue >> 1,
 840                                        (rx_queue & 0x1) << 4);
 841                 if (tx_queue > IGB_N0_QUEUE)
 842                         igb_write_ivar(hw, msix_vector,
 843                                        tx_queue >> 1,
 844                                        ((tx_queue & 0x1) << 4) + 8);
 845                 q_vector->eims_value = BIT(msix_vector);
 846                 break;
 847         default:
 848                 BUG();
 849                 break;
 850         }
 851
 852         /* add q_vector eims value to global eims_enable_mask */
 853         adapter->eims_enable_mask |= q_vector->eims_value;
 854
 855         /* configure q_vector to set itr on first interrupt */
 856         q_vector->set_itr = 1;
 857 }
 858
 859 /**
 860  *  igb_configure_msix - Configure MSI-X hardware
 861  *  @adapter: board private structure to initialize
 862  *
 863  *  igb_configure_msix sets up the hardware to properly
 864  *  generate MSI-X interrupts.
 865  **/
 866 static void igb_configure_msix(struct igb_adapter *adapter)
 867 {
 868         u32 tmp;
 869         int i, vector = 0;
 870         struct e1000_hw *hw = &adapter->hw;
 871
 872         adapter->eims_enable_mask = 0;
 873
 874         /* set vector for other causes, i.e. link changes */
 875         switch (hw->mac.type) {
 876         case e1000_82575:
 877                 tmp = rd32(E1000_CTRL_EXT);
 878                 /* enable MSI-X PBA support*/
 879                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 880
 881                 /* Auto-Mask interrupts upon ICR read. */
 882                 tmp |= E1000_CTRL_EXT_EIAME;
 883                 tmp |= E1000_CTRL_EXT_IRCA;
 884
 885                 wr32(E1000_CTRL_EXT, tmp);
 886
 887                 /* enable msix_other interrupt */
 888                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 889                 adapter->eims_other = E1000_EIMS_OTHER;
 890
 891                 break;
 892
 893         case e1000_82576:
 894         case e1000_82580:
 895         case e1000_i350:
 896         case e1000_i354:
 897         case e1000_i210:
 898         case e1000_i211:
 899                 /* Turn on MSI-X capability first, or our settings
 900                  * won't stick.  And it will take days to debug.
 901                  */
 902                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 903                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 904                      E1000_GPIE_NSICR);
 905
 906                 /* enable msix_other interrupt */
 907                 adapter->eims_other = BIT(vector);
 908                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 909
 910                 wr32(E1000_IVAR_MISC, tmp);
 911                 break;
 912         default:
 913                 /* do nothing, since nothing else supports MSI-X */
 914                 break;
 915         } /* switch (hw->mac.type) */
 916
 917         adapter->eims_enable_mask |= adapter->eims_other;
 918
 919         for (i = 0; i < adapter->num_q_vectors; i++)
 920                 igb_assign_vector(adapter->q_vector[i], vector++);
 921
 922         wrfl();
 923 }
 924
 925 /**
 926  *  igb_request_msix - Initialize MSI-X interrupts
 927  *  @adapter: board private structure to initialize
 928  *
 929  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 930  *  kernel.
 931  **/
 932 static int igb_request_msix(struct igb_adapter *adapter)
 933 {
 934         unsigned int num_q_vectors = adapter->num_q_vectors;
 935         struct net_device *netdev = adapter->netdev;
 936         int i, err = 0, vector = 0, free_vector = 0;
 937
 938         err = request_irq(adapter->msix_entries[vector].vector,
 939                           igb_msix_other, 0, netdev->name, adapter);
 940         if (err)
 941                 goto err_out;
 942
 943         if (num_q_vectors > MAX_Q_VECTORS) {
 944                 num_q_vectors = MAX_Q_VECTORS;
 945                 dev_warn(&adapter->pdev->dev,
 946                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 947                          adapter->num_q_vectors, MAX_Q_VECTORS);
 948         }
 949         for (i = 0; i < num_q_vectors; i++) {
 950                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 951
 952                 vector++;
 953
 954                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 955
 956                 if (q_vector->rx.ring && q_vector->tx.ring)
 957                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 958                                 q_vector->rx.ring->queue_index);
 959                 else if (q_vector->tx.ring)
 960                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 961                                 q_vector->tx.ring->queue_index);
 962                 else if (q_vector->rx.ring)
 963                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 964                                 q_vector->rx.ring->queue_index);
 965                 else
 966                         sprintf(q_vector->name, "%s-unused", netdev->name);
 967
 968                 err = request_irq(adapter->msix_entries[vector].vector,
 969                                   igb_msix_ring, 0, q_vector->name,
 970                                   q_vector);
 971                 if (err)
 972                         goto err_free;
 973         }
 974
 975         igb_configure_msix(adapter);
 976         return 0;
 977
 978 err_free:
 979         /* free already assigned IRQs */
 980         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 981
 982         vector--;
 983         for (i = 0; i < vector; i++) {
 984                 free_irq(adapter->msix_entries[free_vector++].vector,
 985                          adapter->q_vector[i]);
 986         }
 987 err_out:
 988         return err;
 989 }
 990
 991 /**
 992  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 993  *  @adapter: board private structure to initialize
 994  *  @v_idx: Index of vector to be freed
 995  *
 996  *  This function frees the memory allocated to the q_vector.
 997  **/
 998 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 999 {
1000         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1001
1002         adapter->q_vector[v_idx] = NULL;
1003
1004         /* igb_get_stats64() might access the rings on this vector,
1005          * we must wait a grace period before freeing it.
1006          */
1007         if (q_vector)
1008                 kfree_rcu(q_vector, rcu);
1009 }
1010
1011 /**
1012  *  igb_reset_q_vector - Reset config for interrupt vector
1013  *  @adapter: board private structure to initialize
1014  *  @v_idx: Index of vector to be reset
1015  *
1016  *  If NAPI is enabled it will delete any references to the
1017  *  NAPI struct. This is preparation for igb_free_q_vector.
1018  **/
1019 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1020 {
1021         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1022
1023         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1024          * allocated. So, q_vector is NULL so we should stop here.
1025          */
1026         if (!q_vector)
1027                 return;
1028
1029         if (q_vector->tx.ring)
1030                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1031
1032         if (q_vector->rx.ring)
1033                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1034
1035         netif_napi_del(&q_vector->napi);
1036
1037 }
1038
1039 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1040 {
1041         int v_idx = adapter->num_q_vectors;
1042
1043         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1044                 pci_disable_msix(adapter->pdev);
1045         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1046                 pci_disable_msi(adapter->pdev);
1047
1048         while (v_idx--)
1049                 igb_reset_q_vector(adapter, v_idx);
1050 }
1051
1052 /**
1053  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1054  *  @adapter: board private structure to initialize
1055  *
1056  *  This function frees the memory allocated to the q_vectors.  In addition if
1057  *  NAPI is enabled it will delete any references to the NAPI struct prior
1058  *  to freeing the q_vector.
1059  **/
1060 static void igb_free_q_vectors(struct igb_adapter *adapter)
1061 {
1062         int v_idx = adapter->num_q_vectors;
1063
1064         adapter->num_tx_queues = 0;
1065         adapter->num_rx_queues = 0;
1066         adapter->num_q_vectors = 0;
1067
1068         while (v_idx--) {
1069                 igb_reset_q_vector(adapter, v_idx);
1070                 igb_free_q_vector(adapter, v_idx);
1071         }
1072 }
1073
1074 /**
1075  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1076  *  @adapter: board private structure to initialize
1077  *
1078  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1079  *  MSI-X interrupts allocated.
1080  */
1081 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1082 {
1083         igb_free_q_vectors(adapter);
1084         igb_reset_interrupt_capability(adapter);
1085 }
1086
1087 /**
1088  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1089  *  @adapter: board private structure to initialize
1090  *  @msix: boolean value of MSIX capability
1091  *
1092  *  Attempt to configure interrupts using the best available
1093  *  capabilities of the hardware and kernel.
1094  **/
1095 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1096 {
1097         int err;
1098         int numvecs, i;
1099
1100         if (!msix)
1101                 goto msi_only;
1102         adapter->flags |= IGB_FLAG_HAS_MSIX;
1103
1104         /* Number of supported queues. */
1105         adapter->num_rx_queues = adapter->rss_queues;
1106         if (adapter->vfs_allocated_count)
1107                 adapter->num_tx_queues = 1;
1108         else
1109                 adapter->num_tx_queues = adapter->rss_queues;
1110
1111         /* start with one vector for every Rx queue */
1112         numvecs = adapter->num_rx_queues;
1113
1114         /* if Tx handler is separate add 1 for every Tx queue */
1115         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1116                 numvecs += adapter->num_tx_queues;
1117
1118         /* store the number of vectors reserved for queues */
1119         adapter->num_q_vectors = numvecs;
1120
1121         /* add 1 vector for link status interrupts */
1122         numvecs++;
1123         for (i = 0; i < numvecs; i++)
1124                 adapter->msix_entries[i].entry = i;
1125
1126         err = pci_enable_msix_range(adapter->pdev,
1127                                     adapter->msix_entries,
1128                                     numvecs,
1129                                     numvecs);
1130         if (err > 0)
1131                 return;
1132
1133         igb_reset_interrupt_capability(adapter);
1134
1135         /* If we can't do MSI-X, try MSI */
1136 msi_only:
1137         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1138 #ifdef CONFIG_PCI_IOV
1139         /* disable SR-IOV for non MSI-X configurations */
1140         if (adapter->vf_data) {
1141                 struct e1000_hw *hw = &adapter->hw;
1142                 /* disable iov and allow time for transactions to clear */
1143                 pci_disable_sriov(adapter->pdev);
1144                 msleep(500);
1145
1146                 kfree(adapter->vf_mac_list);
1147                 adapter->vf_mac_list = NULL;
1148                 kfree(adapter->vf_data);
1149                 adapter->vf_data = NULL;
1150                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1151                 wrfl();
1152                 msleep(100);
1153                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1154         }
1155 #endif
1156         adapter->vfs_allocated_count = 0;
1157         adapter->rss_queues = 1;
1158         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1159         adapter->num_rx_queues = 1;
1160         adapter->num_tx_queues = 1;
1161         adapter->num_q_vectors = 1;
1162         if (!pci_enable_msi(adapter->pdev))
1163                 adapter->flags |= IGB_FLAG_HAS_MSI;
1164 }
1165
1166 static void igb_add_ring(struct igb_ring *ring,
1167                          struct igb_ring_container *head)
1168 {
1169         head->ring = ring;
1170         head->count++;
1171 }
1172
1173 /**
1174  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1175  *  @adapter: board private structure to initialize
1176  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1177  *  @v_idx: index of vector in adapter struct
1178  *  @txr_count: total number of Tx rings to allocate
1179  *  @txr_idx: index of first Tx ring to allocate
1180  *  @rxr_count: total number of Rx rings to allocate
1181  *  @rxr_idx: index of first Rx ring to allocate
1182  *
1183  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1184  **/
1185 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1186                               int v_count, int v_idx,
1187                               int txr_count, int txr_idx,
1188                               int rxr_count, int rxr_idx)
1189 {
1190         struct igb_q_vector *q_vector;
1191         struct igb_ring *ring;
1192         int ring_count;
1193         size_t size;
1194
1195         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1196         if (txr_count > 1 || rxr_count > 1)
1197                 return -ENOMEM;
1198
1199         ring_count = txr_count + rxr_count;
1200         size = struct_size(q_vector, ring, ring_count);
1201
1202         /* allocate q_vector and rings */
1203         q_vector = adapter->q_vector[v_idx];
1204         if (!q_vector) {
1205                 q_vector = kzalloc(size, GFP_KERNEL);
1206         } else if (size > ksize(q_vector)) {
1207                 kfree_rcu(q_vector, rcu);
1208                 q_vector = kzalloc(size, GFP_KERNEL);
1209         } else {
1210                 memset(q_vector, 0, size);
1211         }
1212         if (!q_vector)
1213                 return -ENOMEM;
1214
1215         /* initialize NAPI */
1216         netif_napi_add(adapter->netdev, &q_vector->napi,
1217                        igb_poll, 64);
1218
1219         /* tie q_vector and adapter together */
1220         adapter->q_vector[v_idx] = q_vector;
1221         q_vector->adapter = adapter;
1222
1223         /* initialize work limits */
1224         q_vector->tx.work_limit = adapter->tx_work_limit;
1225
1226         /* initialize ITR configuration */
1227         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1228         q_vector->itr_val = IGB_START_ITR;
1229
1230         /* initialize pointer to rings */
1231         ring = q_vector->ring;
1232
1233         /* intialize ITR */
1234         if (rxr_count) {
1235                 /* rx or rx/tx vector */
1236                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1237                         q_vector->itr_val = adapter->rx_itr_setting;
1238         } else {
1239                 /* tx only vector */
1240                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1241                         q_vector->itr_val = adapter->tx_itr_setting;
1242         }
1243
1244         if (txr_count) {
1245                 /* assign generic ring traits */
1246                 ring->dev = &adapter->pdev->dev;
1247                 ring->netdev = adapter->netdev;
1248
1249                 /* configure backlink on ring */
1250                 ring->q_vector = q_vector;
1251
1252                 /* update q_vector Tx values */
1253                 igb_add_ring(ring, &q_vector->tx);
1254
1255                 /* For 82575, context index must be unique per ring. */
1256                 if (adapter->hw.mac.type == e1000_82575)
1257                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1258
1259                 /* apply Tx specific ring traits */
1260                 ring->count = adapter->tx_ring_count;
1261                 ring->queue_index = txr_idx;
1262
1263                 ring->cbs_enable = false;
1264                 ring->idleslope = 0;
1265                 ring->sendslope = 0;
1266                 ring->hicredit = 0;
1267                 ring->locredit = 0;
1268
1269                 u64_stats_init(&ring->tx_syncp);
1270                 u64_stats_init(&ring->tx_syncp2);
1271
1272                 /* assign ring to adapter */
1273                 adapter->tx_ring[txr_idx] = ring;
1274
1275                 /* push pointer to next ring */
1276                 ring++;
1277         }
1278
1279         if (rxr_count) {
1280                 /* assign generic ring traits */
1281                 ring->dev = &adapter->pdev->dev;
1282                 ring->netdev = adapter->netdev;
1283
1284                 /* configure backlink on ring */
1285                 ring->q_vector = q_vector;
1286
1287                 /* update q_vector Rx values */
1288                 igb_add_ring(ring, &q_vector->rx);
1289
1290                 /* set flag indicating ring supports SCTP checksum offload */
1291                 if (adapter->hw.mac.type >= e1000_82576)
1292                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1293
1294                 /* On i350, i354, i210, and i211, loopback VLAN packets
1295                  * have the tag byte-swapped.
1296                  */
1297                 if (adapter->hw.mac.type >= e1000_i350)
1298                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1299
1300                 /* apply Rx specific ring traits */
1301                 ring->count = adapter->rx_ring_count;
1302                 ring->queue_index = rxr_idx;
1303
1304                 u64_stats_init(&ring->rx_syncp);
1305
1306                 /* assign ring to adapter */
1307                 adapter->rx_ring[rxr_idx] = ring;
1308         }
1309
1310         return 0;
1311 }
1312
1313
1314 /**
1315  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1316  *  @adapter: board private structure to initialize
1317  *
1318  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1319  *  return -ENOMEM.
1320  **/
1321 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1322 {
1323         int q_vectors = adapter->num_q_vectors;
1324         int rxr_remaining = adapter->num_rx_queues;
1325         int txr_remaining = adapter->num_tx_queues;
1326         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1327         int err;
1328
1329         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1330                 for (; rxr_remaining; v_idx++) {
1331                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1332                                                  0, 0, 1, rxr_idx);
1333
1334                         if (err)
1335                                 goto err_out;
1336
1337                         /* update counts and index */
1338                         rxr_remaining--;
1339                         rxr_idx++;
1340                 }
1341         }
1342
1343         for (; v_idx < q_vectors; v_idx++) {
1344                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1345                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1346
1347                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1348                                          tqpv, txr_idx, rqpv, rxr_idx);
1349
1350                 if (err)
1351                         goto err_out;
1352
1353                 /* update counts and index */
1354                 rxr_remaining -= rqpv;
1355                 txr_remaining -= tqpv;
1356                 rxr_idx++;
1357                 txr_idx++;
1358         }
1359
1360         return 0;
1361
1362 err_out:
1363         adapter->num_tx_queues = 0;
1364         adapter->num_rx_queues = 0;
1365         adapter->num_q_vectors = 0;
1366
1367         while (v_idx--)
1368                 igb_free_q_vector(adapter, v_idx);
1369
1370         return -ENOMEM;
1371 }
1372
1373 /**
1374  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1375  *  @adapter: board private structure to initialize
1376  *  @msix: boolean value of MSIX capability
1377  *
1378  *  This function initializes the interrupts and allocates all of the queues.
1379  **/
1380 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1381 {
1382         struct pci_dev *pdev = adapter->pdev;
1383         int err;
1384
1385         igb_set_interrupt_capability(adapter, msix);
1386
1387         err = igb_alloc_q_vectors(adapter);
1388         if (err) {
1389                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1390                 goto err_alloc_q_vectors;
1391         }
1392
1393         igb_cache_ring_register(adapter);
1394
1395         return 0;
1396
1397 err_alloc_q_vectors:
1398         igb_reset_interrupt_capability(adapter);
1399         return err;
1400 }
1401
1402 /**
1403  *  igb_request_irq - initialize interrupts
1404  *  @adapter: board private structure to initialize
1405  *
1406  *  Attempts to configure interrupts using the best available
1407  *  capabilities of the hardware and kernel.
1408  **/
1409 static int igb_request_irq(struct igb_adapter *adapter)
1410 {
1411         struct net_device *netdev = adapter->netdev;
1412         struct pci_dev *pdev = adapter->pdev;
1413         int err = 0;
1414
1415         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1416                 err = igb_request_msix(adapter);
1417                 if (!err)
1418                         goto request_done;
1419                 /* fall back to MSI */
1420                 igb_free_all_tx_resources(adapter);
1421                 igb_free_all_rx_resources(adapter);
1422
1423                 igb_clear_interrupt_scheme(adapter);
1424                 err = igb_init_interrupt_scheme(adapter, false);
1425                 if (err)
1426                         goto request_done;
1427
1428                 igb_setup_all_tx_resources(adapter);
1429                 igb_setup_all_rx_resources(adapter);
1430                 igb_configure(adapter);
1431         }
1432
1433         igb_assign_vector(adapter->q_vector[0], 0);
1434
1435         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1436                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1437                                   netdev->name, adapter);
1438                 if (!err)
1439                         goto request_done;
1440
1441                 /* fall back to legacy interrupts */
1442                 igb_reset_interrupt_capability(adapter);
1443                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1444         }
1445
1446         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1447                           netdev->name, adapter);
1448
1449         if (err)
1450                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1451                         err);
1452
1453 request_done:
1454         return err;
1455 }
1456
1457 static void igb_free_irq(struct igb_adapter *adapter)
1458 {
1459         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1460                 int vector = 0, i;
1461
1462                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1463
1464                 for (i = 0; i < adapter->num_q_vectors; i++)
1465                         free_irq(adapter->msix_entries[vector++].vector,
1466                                  adapter->q_vector[i]);
1467         } else {
1468                 free_irq(adapter->pdev->irq, adapter);
1469         }
1470 }
1471
1472 /**
1473  *  igb_irq_disable - Mask off interrupt generation on the NIC
1474  *  @adapter: board private structure
1475  **/
1476 static void igb_irq_disable(struct igb_adapter *adapter)
1477 {
1478         struct e1000_hw *hw = &adapter->hw;
1479
1480         /* we need to be careful when disabling interrupts.  The VFs are also
1481          * mapped into these registers and so clearing the bits can cause
1482          * issues on the VF drivers so we only need to clear what we set
1483          */
1484         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1485                 u32 regval = rd32(E1000_EIAM);
1486
1487                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1488                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1489                 regval = rd32(E1000_EIAC);
1490                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1491         }
1492
1493         wr32(E1000_IAM, 0);
1494         wr32(E1000_IMC, ~0);
1495         wrfl();
1496         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1497                 int i;
1498
1499                 for (i = 0; i < adapter->num_q_vectors; i++)
1500                         synchronize_irq(adapter->msix_entries[i].vector);
1501         } else {
1502                 synchronize_irq(adapter->pdev->irq);
1503         }
1504 }
1505
1506 /**
1507  *  igb_irq_enable - Enable default interrupt generation settings
1508  *  @adapter: board private structure
1509  **/
1510 static void igb_irq_enable(struct igb_adapter *adapter)
1511 {
1512         struct e1000_hw *hw = &adapter->hw;
1513
1514         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1515                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1516                 u32 regval = rd32(E1000_EIAC);
1517
1518                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1519                 regval = rd32(E1000_EIAM);
1520                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1521                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1522                 if (adapter->vfs_allocated_count) {
1523                         wr32(E1000_MBVFIMR, 0xFF);
1524                         ims |= E1000_IMS_VMMB;
1525                 }
1526                 wr32(E1000_IMS, ims);
1527         } else {
1528                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1529                                 E1000_IMS_DRSTA);
1530                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1531                                 E1000_IMS_DRSTA);
1532         }
1533 }
1534
1535 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1536 {
1537         struct e1000_hw *hw = &adapter->hw;
1538         u16 pf_id = adapter->vfs_allocated_count;
1539         u16 vid = adapter->hw.mng_cookie.vlan_id;
1540         u16 old_vid = adapter->mng_vlan_id;
1541
1542         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1543                 /* add VID to filter table */
1544                 igb_vfta_set(hw, vid, pf_id, true, true);
1545                 adapter->mng_vlan_id = vid;
1546         } else {
1547                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1548         }
1549
1550         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1551             (vid != old_vid) &&
1552             !test_bit(old_vid, adapter->active_vlans)) {
1553                 /* remove VID from filter table */
1554                 igb_vfta_set(hw, vid, pf_id, false, true);
1555         }
1556 }
1557
1558 /**
1559  *  igb_release_hw_control - release control of the h/w to f/w
1560  *  @adapter: address of board private structure
1561  *
1562  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1563  *  For ASF and Pass Through versions of f/w this means that the
1564  *  driver is no longer loaded.
1565  **/
1566 static void igb_release_hw_control(struct igb_adapter *adapter)
1567 {
1568         struct e1000_hw *hw = &adapter->hw;
1569         u32 ctrl_ext;
1570
1571         /* Let firmware take over control of h/w */
1572         ctrl_ext = rd32(E1000_CTRL_EXT);
1573         wr32(E1000_CTRL_EXT,
1574                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1575 }
1576
1577 /**
1578  *  igb_get_hw_control - get control of the h/w from f/w
1579  *  @adapter: address of board private structure
1580  *
1581  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1582  *  For ASF and Pass Through versions of f/w this means that
1583  *  the driver is loaded.
1584  **/
1585 static void igb_get_hw_control(struct igb_adapter *adapter)
1586 {
1587         struct e1000_hw *hw = &adapter->hw;
1588         u32 ctrl_ext;
1589
1590         /* Let firmware know the driver has taken over */
1591         ctrl_ext = rd32(E1000_CTRL_EXT);
1592         wr32(E1000_CTRL_EXT,
1593                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1594 }
1595
1596 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1597 {
1598         struct net_device *netdev = adapter->netdev;
1599         struct e1000_hw *hw = &adapter->hw;
1600
1601         WARN_ON(hw->mac.type != e1000_i210);
1602
1603         if (enable)
1604                 adapter->flags |= IGB_FLAG_FQTSS;
1605         else
1606                 adapter->flags &= ~IGB_FLAG_FQTSS;
1607
1608         if (netif_running(netdev))
1609                 schedule_work(&adapter->reset_task);
1610 }
1611
1612 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1613 {
1614         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1615 }
1616
1617 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1618                                    enum tx_queue_prio prio)
1619 {
1620         u32 val;
1621
1622         WARN_ON(hw->mac.type != e1000_i210);
1623         WARN_ON(queue < 0 || queue > 4);
1624
1625         val = rd32(E1000_I210_TXDCTL(queue));
1626
1627         if (prio == TX_QUEUE_PRIO_HIGH)
1628                 val |= E1000_TXDCTL_PRIORITY;
1629         else
1630                 val &= ~E1000_TXDCTL_PRIORITY;
1631
1632         wr32(E1000_I210_TXDCTL(queue), val);
1633 }
1634
1635 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1636 {
1637         u32 val;
1638
1639         WARN_ON(hw->mac.type != e1000_i210);
1640         WARN_ON(queue < 0 || queue > 1);
1641
1642         val = rd32(E1000_I210_TQAVCC(queue));
1643
1644         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1645                 val |= E1000_TQAVCC_QUEUEMODE;
1646         else
1647                 val &= ~E1000_TQAVCC_QUEUEMODE;
1648
1649         wr32(E1000_I210_TQAVCC(queue), val);
1650 }
1651
1652 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1653 {
1654         int i;
1655
1656         for (i = 0; i < adapter->num_tx_queues; i++) {
1657                 if (adapter->tx_ring[i]->cbs_enable)
1658                         return true;
1659         }
1660
1661         return false;
1662 }
1663
1664 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1665 {
1666         int i;
1667
1668         for (i = 0; i < adapter->num_tx_queues; i++) {
1669                 if (adapter->tx_ring[i]->launchtime_enable)
1670                         return true;
1671         }
1672
1673         return false;
1674 }
1675
1676 /**
1677  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1678  *  @adapter: pointer to adapter struct
1679  *  @queue: queue number
1680  *
1681  *  Configure CBS and Launchtime for a given hardware queue.
1682  *  Parameters are retrieved from the correct Tx ring, so
1683  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1684  *  for setting those correctly prior to this function being called.
1685  **/
1686 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1687 {
1688         struct net_device *netdev = adapter->netdev;
1689         struct e1000_hw *hw = &adapter->hw;
1690         struct igb_ring *ring;
1691         u32 tqavcc, tqavctrl;
1692         u16 value;
1693
1694         WARN_ON(hw->mac.type != e1000_i210);
1695         WARN_ON(queue < 0 || queue > 1);
1696         ring = adapter->tx_ring[queue];
1697
1698         /* If any of the Qav features is enabled, configure queues as SR and
1699          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1700          * as SP.
1701          */
1702         if (ring->cbs_enable || ring->launchtime_enable) {
1703                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1704                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1705         } else {
1706                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1707                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1708         }
1709
1710         /* If CBS is enabled, set DataTranARB and config its parameters. */
1711         if (ring->cbs_enable || queue == 0) {
1712                 /* i210 does not allow the queue 0 to be in the Strict
1713                  * Priority mode while the Qav mode is enabled, so,
1714                  * instead of disabling strict priority mode, we give
1715                  * queue 0 the maximum of credits possible.
1716                  *
1717                  * See section 8.12.19 of the i210 datasheet, "Note:
1718                  * Queue0 QueueMode must be set to 1b when
1719                  * TransmitMode is set to Qav."
1720                  */
1721                 if (queue == 0 && !ring->cbs_enable) {
1722                         /* max "linkspeed" idleslope in kbps */
1723                         ring->idleslope = 1000000;
1724                         ring->hicredit = ETH_FRAME_LEN;
1725                 }
1726
1727                 /* Always set data transfer arbitration to credit-based
1728                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1729                  * the queues.
1730                  */
1731                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1732                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1733                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1734
1735                 /* According to i210 datasheet section 7.2.7.7, we should set
1736                  * the 'idleSlope' field from TQAVCC register following the
1737                  * equation:
1738                  *
1739                  * For 100 Mbps link speed:
1740                  *
1741                  *     value = BW * 0x7735 * 0.2                          (E1)
1742                  *
1743                  * For 1000Mbps link speed:
1744                  *
1745                  *     value = BW * 0x7735 * 2                            (E2)
1746                  *
1747                  * E1 and E2 can be merged into one equation as shown below.
1748                  * Note that 'link-speed' is in Mbps.
1749                  *
1750                  *     value = BW * 0x7735 * 2 * link-speed
1751                  *                           --------------               (E3)
1752                  *                                1000
1753                  *
1754                  * 'BW' is the percentage bandwidth out of full link speed
1755                  * which can be found with the following equation. Note that
1756                  * idleSlope here is the parameter from this function which
1757                  * is in kbps.
1758                  *
1759                  *     BW =     idleSlope
1760                  *          -----------------                             (E4)
1761                  *          link-speed * 1000
1762                  *
1763                  * That said, we can come up with a generic equation to
1764                  * calculate the value we should set it TQAVCC register by
1765                  * replacing 'BW' in E3 by E4. The resulting equation is:
1766                  *
1767                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1768                  *         -----------------            --------------    (E5)
1769                  *         link-speed * 1000                 1000
1770                  *
1771                  * 'link-speed' is present in both sides of the fraction so
1772                  * it is canceled out. The final equation is the following:
1773                  *
1774                  *     value = idleSlope * 61034
1775                  *             -----------------                          (E6)
1776                  *                  1000000
1777                  *
1778                  * NOTE: For i210, given the above, we can see that idleslope
1779                  *       is represented in 16.38431 kbps units by the value at
1780                  *       the TQAVCC register (1Gbps / 61034), which reduces
1781                  *       the granularity for idleslope increments.
1782                  *       For instance, if you want to configure a 2576kbps
1783                  *       idleslope, the value to be written on the register
1784                  *       would have to be 157.23. If rounded down, you end
1785                  *       up with less bandwidth available than originally
1786                  *       required (~2572 kbps). If rounded up, you end up
1787                  *       with a higher bandwidth (~2589 kbps). Below the
1788                  *       approach we take is to always round up the
1789                  *       calculated value, so the resulting bandwidth might
1790                  *       be slightly higher for some configurations.
1791                  */
1792                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1793
1794                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1795                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1796                 tqavcc |= value;
1797                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1798
1799                 wr32(E1000_I210_TQAVHC(queue),
1800                      0x80000000 + ring->hicredit * 0x7735);
1801         } else {
1802
1803                 /* Set idleSlope to zero. */
1804                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1805                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1806                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1807
1808                 /* Set hiCredit to zero. */
1809                 wr32(E1000_I210_TQAVHC(queue), 0);
1810
1811                 /* If CBS is not enabled for any queues anymore, then return to
1812                  * the default state of Data Transmission Arbitration on
1813                  * TQAVCTRL.
1814                  */
1815                 if (!is_any_cbs_enabled(adapter)) {
1816                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1817                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1818                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1819                 }
1820         }
1821
1822         /* If LaunchTime is enabled, set DataTranTIM. */
1823         if (ring->launchtime_enable) {
1824                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1825                  * for any of the SR queues, and configure fetchtime delta.
1826                  * XXX NOTE:
1827                  *     - LaunchTime will be enabled for all SR queues.
1828                  *     - A fixed offset can be added relative to the launch
1829                  *       time of all packets if configured at reg LAUNCH_OS0.
1830                  *       We are keeping it as 0 for now (default value).
1831                  */
1832                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1833                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1834                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1835                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1836         } else {
1837                 /* If Launchtime is not enabled for any SR queues anymore,
1838                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1839                  * effectively disabling Launchtime.
1840                  */
1841                 if (!is_any_txtime_enabled(adapter)) {
1842                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1843                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1844                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1845                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1846                 }
1847         }
1848
1849         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1850          * CBS are not configurable by software so we don't do any 'controller
1851          * configuration' in respect to these parameters.
1852          */
1853
1854         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1855                    ring->cbs_enable ? "enabled" : "disabled",
1856                    ring->launchtime_enable ? "enabled" : "disabled",
1857                    queue,
1858                    ring->idleslope, ring->sendslope,
1859                    ring->hicredit, ring->locredit);
1860 }
1861
1862 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1863                                   bool enable)
1864 {
1865         struct igb_ring *ring;
1866
1867         if (queue < 0 || queue > adapter->num_tx_queues)
1868                 return -EINVAL;
1869
1870         ring = adapter->tx_ring[queue];
1871         ring->launchtime_enable = enable;
1872
1873         return 0;
1874 }
1875
1876 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1877                                bool enable, int idleslope, int sendslope,
1878                                int hicredit, int locredit)
1879 {
1880         struct igb_ring *ring;
1881
1882         if (queue < 0 || queue > adapter->num_tx_queues)
1883                 return -EINVAL;
1884
1885         ring = adapter->tx_ring[queue];
1886
1887         ring->cbs_enable = enable;
1888         ring->idleslope = idleslope;
1889         ring->sendslope = sendslope;
1890         ring->hicredit = hicredit;
1891         ring->locredit = locredit;
1892
1893         return 0;
1894 }
1895
1896 /**
1897  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1898  *  @adapter: pointer to adapter struct
1899  *
1900  *  Configure TQAVCTRL register switching the controller's Tx mode
1901  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1902  *  a call to igb_config_tx_modes() per queue so any previously saved
1903  *  Tx parameters are applied.
1904  **/
1905 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1906 {
1907         struct net_device *netdev = adapter->netdev;
1908         struct e1000_hw *hw = &adapter->hw;
1909         u32 val;
1910
1911         /* Only i210 controller supports changing the transmission mode. */
1912         if (hw->mac.type != e1000_i210)
1913                 return;
1914
1915         if (is_fqtss_enabled(adapter)) {
1916                 int i, max_queue;
1917
1918                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1919                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1920                  * so SP queues wait for SR ones.
1921                  */
1922                 val = rd32(E1000_I210_TQAVCTRL);
1923                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1924                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1925                 wr32(E1000_I210_TQAVCTRL, val);
1926
1927                 /* Configure Tx and Rx packet buffers sizes as described in
1928                  * i210 datasheet section 7.2.7.7.
1929                  */
1930                 val = rd32(E1000_TXPBS);
1931                 val &= ~I210_TXPBSIZE_MASK;
1932                 val |= I210_TXPBSIZE_PB0_6KB | I210_TXPBSIZE_PB1_6KB |
1933                         I210_TXPBSIZE_PB2_6KB | I210_TXPBSIZE_PB3_6KB;
1934                 wr32(E1000_TXPBS, val);
1935
1936                 val = rd32(E1000_RXPBS);
1937                 val &= ~I210_RXPBSIZE_MASK;
1938                 val |= I210_RXPBSIZE_PB_30KB;
1939                 wr32(E1000_RXPBS, val);
1940
1941                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1942                  * register should not exceed the buffer size programmed in
1943                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1944                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1945                  * 4kB / 64.
1946                  *
1947                  * However, when we do so, no frame from queue 2 and 3 are
1948                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1949                  * or _equal_ to the buffer size programmed in TXPBS. For this
1950                  * reason, we set set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1951                  */
1952                 val = (4096 - 1) / 64;
1953                 wr32(E1000_I210_DTXMXPKTSZ, val);
1954
1955                 /* Since FQTSS mode is enabled, apply any CBS configuration
1956                  * previously set. If no previous CBS configuration has been
1957                  * done, then the initial configuration is applied, which means
1958                  * CBS is disabled.
1959                  */
1960                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1961                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1962
1963                 for (i = 0; i < max_queue; i++) {
1964                         igb_config_tx_modes(adapter, i);
1965                 }
1966         } else {
1967                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1968                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1969                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1970
1971                 val = rd32(E1000_I210_TQAVCTRL);
1972                 /* According to Section 8.12.21, the other flags we've set when
1973                  * enabling FQTSS are not relevant when disabling FQTSS so we
1974                  * don't set they here.
1975                  */
1976                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1977                 wr32(E1000_I210_TQAVCTRL, val);
1978         }
1979
1980         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1981                    "enabled" : "disabled");
1982 }
1983
1984 /**
1985  *  igb_configure - configure the hardware for RX and TX
1986  *  @adapter: private board structure
1987  **/
1988 static void igb_configure(struct igb_adapter *adapter)
1989 {
1990         struct net_device *netdev = adapter->netdev;
1991         int i;
1992
1993         igb_get_hw_control(adapter);
1994         igb_set_rx_mode(netdev);
1995         igb_setup_tx_mode(adapter);
1996
1997         igb_restore_vlan(adapter);
1998
1999         igb_setup_tctl(adapter);
2000         igb_setup_mrqc(adapter);
2001         igb_setup_rctl(adapter);
2002
2003         igb_nfc_filter_restore(adapter);
2004         igb_configure_tx(adapter);
2005         igb_configure_rx(adapter);
2006
2007         igb_rx_fifo_flush_82575(&adapter->hw);
2008
2009         /* call igb_desc_unused which always leaves
2010          * at least 1 descriptor unused to make sure
2011          * next_to_use != next_to_clean
2012          */
2013         for (i = 0; i < adapter->num_rx_queues; i++) {
2014                 struct igb_ring *ring = adapter->rx_ring[i];
2015                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2016         }
2017 }
2018
2019 /**
2020  *  igb_power_up_link - Power up the phy/serdes link
2021  *  @adapter: address of board private structure
2022  **/
2023 void igb_power_up_link(struct igb_adapter *adapter)
2024 {
2025         igb_reset_phy(&adapter->hw);
2026
2027         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2028                 igb_power_up_phy_copper(&adapter->hw);
2029         else
2030                 igb_power_up_serdes_link_82575(&adapter->hw);
2031
2032         igb_setup_link(&adapter->hw);
2033 }
2034
2035 /**
2036  *  igb_power_down_link - Power down the phy/serdes link
2037  *  @adapter: address of board private structure
2038  */
2039 static void igb_power_down_link(struct igb_adapter *adapter)
2040 {
2041         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2042                 igb_power_down_phy_copper_82575(&adapter->hw);
2043         else
2044                 igb_shutdown_serdes_link_82575(&adapter->hw);
2045 }
2046
2047 /**
2048  * igb_check_swap_media -  Detect and switch function for Media Auto Sense
2049  * @adapter: address of the board private structure
2050  **/
2051 static void igb_check_swap_media(struct igb_adapter *adapter)
2052 {
2053         struct e1000_hw *hw = &adapter->hw;
2054         u32 ctrl_ext, connsw;
2055         bool swap_now = false;
2056
2057         ctrl_ext = rd32(E1000_CTRL_EXT);
2058         connsw = rd32(E1000_CONNSW);
2059
2060         /* need to live swap if current media is copper and we have fiber/serdes
2061          * to go to.
2062          */
2063
2064         if ((hw->phy.media_type == e1000_media_type_copper) &&
2065             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2066                 swap_now = true;
2067         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2068                    !(connsw & E1000_CONNSW_SERDESD)) {
2069                 /* copper signal takes time to appear */
2070                 if (adapter->copper_tries < 4) {
2071                         adapter->copper_tries++;
2072                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2073                         wr32(E1000_CONNSW, connsw);
2074                         return;
2075                 } else {
2076                         adapter->copper_tries = 0;
2077                         if ((connsw & E1000_CONNSW_PHYSD) &&
2078                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2079                                 swap_now = true;
2080                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2081                                 wr32(E1000_CONNSW, connsw);
2082                         }
2083                 }
2084         }
2085
2086         if (!swap_now)
2087                 return;
2088
2089         switch (hw->phy.media_type) {
2090         case e1000_media_type_copper:
2091                 netdev_info(adapter->netdev,
2092                         "MAS: changing media to fiber/serdes\n");
2093                 ctrl_ext |=
2094                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2095                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2096                 adapter->copper_tries = 0;
2097                 break;
2098         case e1000_media_type_internal_serdes:
2099         case e1000_media_type_fiber:
2100                 netdev_info(adapter->netdev,
2101                         "MAS: changing media to copper\n");
2102                 ctrl_ext &=
2103                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2104                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2105                 break;
2106         default:
2107                 /* shouldn't get here during regular operation */
2108                 netdev_err(adapter->netdev,
2109                         "AMS: Invalid media type found, returning\n");
2110                 break;
2111         }
2112         wr32(E1000_CTRL_EXT, ctrl_ext);
2113 }
2114
2115 /**
2116  *  igb_up - Open the interface and prepare it to handle traffic
2117  *  @adapter: board private structure
2118  **/
2119 int igb_up(struct igb_adapter *adapter)
2120 {
2121         struct e1000_hw *hw = &adapter->hw;
2122         int i;
2123
2124         /* hardware has been reset, we need to reload some things */
2125         igb_configure(adapter);
2126
2127         clear_bit(__IGB_DOWN, &adapter->state);
2128
2129         for (i = 0; i < adapter->num_q_vectors; i++)
2130                 napi_enable(&(adapter->q_vector[i]->napi));
2131
2132         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2133                 igb_configure_msix(adapter);
2134         else
2135                 igb_assign_vector(adapter->q_vector[0], 0);
2136
2137         /* Clear any pending interrupts. */
2138         rd32(E1000_TSICR);
2139         rd32(E1000_ICR);
2140         igb_irq_enable(adapter);
2141
2142         /* notify VFs that reset has been completed */
2143         if (adapter->vfs_allocated_count) {
2144                 u32 reg_data = rd32(E1000_CTRL_EXT);
2145
2146                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2147                 wr32(E1000_CTRL_EXT, reg_data);
2148         }
2149
2150         netif_tx_start_all_queues(adapter->netdev);
2151
2152         /* start the watchdog. */
2153         hw->mac.get_link_status = 1;
2154         schedule_work(&adapter->watchdog_task);
2155
2156         if ((adapter->flags & IGB_FLAG_EEE) &&
2157             (!hw->dev_spec._82575.eee_disable))
2158                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2159
2160         return 0;
2161 }
2162
2163 void igb_down(struct igb_adapter *adapter)
2164 {
2165         struct net_device *netdev = adapter->netdev;
2166         struct e1000_hw *hw = &adapter->hw;
2167         u32 tctl, rctl;
2168         int i;
2169
2170         /* signal that we're down so the interrupt handler does not
2171          * reschedule our watchdog timer
2172          */
2173         set_bit(__IGB_DOWN, &adapter->state);
2174
2175         /* disable receives in the hardware */
2176         rctl = rd32(E1000_RCTL);
2177         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2178         /* flush and sleep below */
2179
2180         igb_nfc_filter_exit(adapter);
2181
2182         netif_carrier_off(netdev);
2183         netif_tx_stop_all_queues(netdev);
2184
2185         /* disable transmits in the hardware */
2186         tctl = rd32(E1000_TCTL);
2187         tctl &= ~E1000_TCTL_EN;
2188         wr32(E1000_TCTL, tctl);
2189         /* flush both disables and wait for them to finish */
2190         wrfl();
2191         usleep_range(10000, 11000);
2192
2193         igb_irq_disable(adapter);
2194
2195         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2196
2197         for (i = 0; i < adapter->num_q_vectors; i++) {
2198                 if (adapter->q_vector[i]) {
2199                         napi_synchronize(&adapter->q_vector[i]->napi);
2200                         napi_disable(&adapter->q_vector[i]->napi);
2201                 }
2202         }
2203
2204         del_timer_sync(&adapter->watchdog_timer);
2205         del_timer_sync(&adapter->phy_info_timer);
2206
2207         /* record the stats before reset*/
2208         spin_lock(&adapter->stats64_lock);
2209         igb_update_stats(adapter);
2210         spin_unlock(&adapter->stats64_lock);
2211
2212         adapter->link_speed = 0;
2213         adapter->link_duplex = 0;
2214
2215         if (!pci_channel_offline(adapter->pdev))
2216                 igb_reset(adapter);
2217
2218         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2219         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2220
2221         igb_clean_all_tx_rings(adapter);
2222         igb_clean_all_rx_rings(adapter);
2223 #ifdef CONFIG_IGB_DCA
2224
2225         /* since we reset the hardware DCA settings were cleared */
2226         igb_setup_dca(adapter);
2227 #endif
2228 }
2229
2230 void igb_reinit_locked(struct igb_adapter *adapter)
2231 {
2232         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2233                 usleep_range(1000, 2000);
2234         igb_down(adapter);
2235         igb_up(adapter);
2236         clear_bit(__IGB_RESETTING, &adapter->state);
2237 }
2238
2239 /** igb_enable_mas - Media Autosense re-enable after swap
2240  *
2241  * @adapter: adapter struct
2242  **/
2243 static void igb_enable_mas(struct igb_adapter *adapter)
2244 {
2245         struct e1000_hw *hw = &adapter->hw;
2246         u32 connsw = rd32(E1000_CONNSW);
2247
2248         /* configure for SerDes media detect */
2249         if ((hw->phy.media_type == e1000_media_type_copper) &&
2250             (!(connsw & E1000_CONNSW_SERDESD))) {
2251                 connsw |= E1000_CONNSW_ENRGSRC;
2252                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2253                 wr32(E1000_CONNSW, connsw);
2254                 wrfl();
2255         }
2256 }
2257
2258 void igb_reset(struct igb_adapter *adapter)
2259 {
2260         struct pci_dev *pdev = adapter->pdev;
2261         struct e1000_hw *hw = &adapter->hw;
2262         struct e1000_mac_info *mac = &hw->mac;
2263         struct e1000_fc_info *fc = &hw->fc;
2264         u32 pba, hwm;
2265
2266         /* Repartition Pba for greater than 9k mtu
2267          * To take effect CTRL.RST is required.
2268          */
2269         switch (mac->type) {
2270         case e1000_i350:
2271         case e1000_i354:
2272         case e1000_82580:
2273                 pba = rd32(E1000_RXPBS);
2274                 pba = igb_rxpbs_adjust_82580(pba);
2275                 break;
2276         case e1000_82576:
2277                 pba = rd32(E1000_RXPBS);
2278                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2279                 break;
2280         case e1000_82575:
2281         case e1000_i210:
2282         case e1000_i211:
2283         default:
2284                 pba = E1000_PBA_34K;
2285                 break;
2286         }
2287
2288         if (mac->type == e1000_82575) {
2289                 u32 min_rx_space, min_tx_space, needed_tx_space;
2290
2291                 /* write Rx PBA so that hardware can report correct Tx PBA */
2292                 wr32(E1000_PBA, pba);
2293
2294                 /* To maintain wire speed transmits, the Tx FIFO should be
2295                  * large enough to accommodate two full transmit packets,
2296                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2297                  * the Rx FIFO should be large enough to accommodate at least
2298                  * one full receive packet and is similarly rounded up and
2299                  * expressed in KB.
2300                  */
2301                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2302
2303                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2304                  * but don't include Ethernet FCS because hardware appends it.
2305                  * We only need to round down to the nearest 512 byte block
2306                  * count since the value we care about is 2 frames, not 1.
2307                  */
2308                 min_tx_space = adapter->max_frame_size;
2309                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2310                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2311
2312                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2313                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2314
2315                 /* If current Tx allocation is less than the min Tx FIFO size,
2316                  * and the min Tx FIFO size is less than the current Rx FIFO
2317                  * allocation, take space away from current Rx allocation.
2318                  */
2319                 if (needed_tx_space < pba) {
2320                         pba -= needed_tx_space;
2321
2322                         /* if short on Rx space, Rx wins and must trump Tx
2323                          * adjustment
2324                          */
2325                         if (pba < min_rx_space)
2326                                 pba = min_rx_space;
2327                 }
2328
2329                 /* adjust PBA for jumbo frames */
2330                 wr32(E1000_PBA, pba);
2331         }
2332
2333         /* flow control settings
2334          * The high water mark must be low enough to fit one full frame
2335          * after transmitting the pause frame.  As such we must have enough
2336          * space to allow for us to complete our current transmit and then
2337          * receive the frame that is in progress from the link partner.
2338          * Set it to:
2339          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2340          */
2341         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2342
2343         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2344         fc->low_water = fc->high_water - 16;
2345         fc->pause_time = 0xFFFF;
2346         fc->send_xon = 1;
2347         fc->current_mode = fc->requested_mode;
2348
2349         /* disable receive for all VFs and wait one second */
2350         if (adapter->vfs_allocated_count) {
2351                 int i;
2352
2353                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2354                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2355
2356                 /* ping all the active vfs to let them know we are going down */
2357                 igb_ping_all_vfs(adapter);
2358
2359                 /* disable transmits and receives */
2360                 wr32(E1000_VFRE, 0);
2361                 wr32(E1000_VFTE, 0);
2362         }
2363
2364         /* Allow time for pending master requests to run */
2365         hw->mac.ops.reset_hw(hw);
2366         wr32(E1000_WUC, 0);
2367
2368         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2369                 /* need to resetup here after media swap */
2370                 adapter->ei.get_invariants(hw);
2371                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2372         }
2373         if ((mac->type == e1000_82575 || mac->type == e1000_i350) &&
2374             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2375                 igb_enable_mas(adapter);
2376         }
2377         if (hw->mac.ops.init_hw(hw))
2378                 dev_err(&pdev->dev, "Hardware Error\n");
2379
2380         /* RAR registers were cleared during init_hw, clear mac table */
2381         igb_flush_mac_table(adapter);
2382         __dev_uc_unsync(adapter->netdev, NULL);
2383
2384         /* Recover default RAR entry */
2385         igb_set_default_mac_filter(adapter);
2386
2387         /* Flow control settings reset on hardware reset, so guarantee flow
2388          * control is off when forcing speed.
2389          */
2390         if (!hw->mac.autoneg)
2391                 igb_force_mac_fc(hw);
2392
2393         igb_init_dmac(adapter, pba);
2394 #ifdef CONFIG_IGB_HWMON
2395         /* Re-initialize the thermal sensor on i350 devices. */
2396         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2397                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2398                         /* If present, re-initialize the external thermal sensor
2399                          * interface.
2400                          */
2401                         if (adapter->ets)
2402                                 mac->ops.init_thermal_sensor_thresh(hw);
2403                 }
2404         }
2405 #endif
2406         /* Re-establish EEE setting */
2407         if (hw->phy.media_type == e1000_media_type_copper) {
2408                 switch (mac->type) {
2409                 case e1000_i350:
2410                 case e1000_i210:
2411                 case e1000_i211:
2412                         igb_set_eee_i350(hw, true, true);
2413                         break;
2414                 case e1000_i354:
2415                         igb_set_eee_i354(hw, true, true);
2416                         break;
2417                 default:
2418                         break;
2419                 }
2420         }
2421         if (!netif_running(adapter->netdev))
2422                 igb_power_down_link(adapter);
2423
2424         igb_update_mng_vlan(adapter);
2425
2426         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2427         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2428
2429         /* Re-enable PTP, where applicable. */
2430         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2431                 igb_ptp_reset(adapter);
2432
2433         igb_get_phy_info(hw);
2434 }
2435
2436 static netdev_features_t igb_fix_features(struct net_device *netdev,
2437         netdev_features_t features)
2438 {
2439         /* Since there is no support for separate Rx/Tx vlan accel
2440          * enable/disable make sure Tx flag is always in same state as Rx.
2441          */
2442         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2443                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2444         else
2445                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2446
2447         return features;
2448 }
2449
2450 static int igb_set_features(struct net_device *netdev,
2451         netdev_features_t features)
2452 {
2453         netdev_features_t changed = netdev->features ^ features;
2454         struct igb_adapter *adapter = netdev_priv(netdev);
2455
2456         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2457                 igb_vlan_mode(netdev, features);
2458
2459         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2460                 return 0;
2461
2462         if (!(features & NETIF_F_NTUPLE)) {
2463                 struct hlist_node *node2;
2464                 struct igb_nfc_filter *rule;
2465
2466                 spin_lock(&adapter->nfc_lock);
2467                 hlist_for_each_entry_safe(rule, node2,
2468                                           &adapter->nfc_filter_list, nfc_node) {
2469                         igb_erase_filter(adapter, rule);
2470                         hlist_del(&rule->nfc_node);
2471                         kfree(rule);
2472                 }
2473                 spin_unlock(&adapter->nfc_lock);
2474                 adapter->nfc_filter_count = 0;
2475         }
2476
2477         netdev->features = features;
2478
2479         if (netif_running(netdev))
2480                 igb_reinit_locked(adapter);
2481         else
2482                 igb_reset(adapter);
2483
2484         return 1;
2485 }
2486
2487 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2488                            struct net_device *dev,
2489                            const unsigned char *addr, u16 vid,
2490                            u16 flags,
2491                            struct netlink_ext_ack *extack)
2492 {
2493         /* guarantee we can provide a unique filter for the unicast address */
2494         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2495                 struct igb_adapter *adapter = netdev_priv(dev);
2496                 int vfn = adapter->vfs_allocated_count;
2497
2498                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2499                         return -ENOMEM;
2500         }
2501
2502         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2503 }
2504
2505 #define IGB_MAX_MAC_HDR_LEN     127
2506 #define IGB_MAX_NETWORK_HDR_LEN 511
2507
2508 static netdev_features_t
2509 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2510                    netdev_features_t features)
2511 {
2512         unsigned int network_hdr_len, mac_hdr_len;
2513
2514         /* Make certain the headers can be described by a context descriptor */
2515         mac_hdr_len = skb_network_header(skb) - skb->data;
2516         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2517                 return features & ~(NETIF_F_HW_CSUM |
2518                                     NETIF_F_SCTP_CRC |
2519                                     NETIF_F_GSO_UDP_L4 |
2520                                     NETIF_F_HW_VLAN_CTAG_TX |
2521                                     NETIF_F_TSO |
2522                                     NETIF_F_TSO6);
2523
2524         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2525         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2526                 return features & ~(NETIF_F_HW_CSUM |
2527                                     NETIF_F_SCTP_CRC |
2528                                     NETIF_F_GSO_UDP_L4 |
2529                                     NETIF_F_TSO |
2530                                     NETIF_F_TSO6);
2531
2532         /* We can only support IPV4 TSO in tunnels if we can mangle the
2533          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2534          */
2535         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2536                 features &= ~NETIF_F_TSO;
2537
2538         return features;
2539 }
2540
2541 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2542 {
2543         if (!is_fqtss_enabled(adapter)) {
2544                 enable_fqtss(adapter, true);
2545                 return;
2546         }
2547
2548         igb_config_tx_modes(adapter, queue);
2549
2550         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2551                 enable_fqtss(adapter, false);
2552 }
2553
2554 static int igb_offload_cbs(struct igb_adapter *adapter,
2555                            struct tc_cbs_qopt_offload *qopt)
2556 {
2557         struct e1000_hw *hw = &adapter->hw;
2558         int err;
2559
2560         /* CBS offloading is only supported by i210 controller. */
2561         if (hw->mac.type != e1000_i210)
2562                 return -EOPNOTSUPP;
2563
2564         /* CBS offloading is only supported by queue 0 and queue 1. */
2565         if (qopt->queue < 0 || qopt->queue > 1)
2566                 return -EINVAL;
2567
2568         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2569                                   qopt->idleslope, qopt->sendslope,
2570                                   qopt->hicredit, qopt->locredit);
2571         if (err)
2572                 return err;
2573
2574         igb_offload_apply(adapter, qopt->queue);
2575
2576         return 0;
2577 }
2578
2579 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2580 #define VLAN_PRIO_FULL_MASK (0x07)
2581
2582 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2583                                 struct flow_cls_offload *f,
2584                                 int traffic_class,
2585                                 struct igb_nfc_filter *input)
2586 {
2587         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2588         struct flow_dissector *dissector = rule->match.dissector;
2589         struct netlink_ext_ack *extack = f->common.extack;
2590
2591         if (dissector->used_keys &
2592             ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2593               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2594               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2595               BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2596                 NL_SET_ERR_MSG_MOD(extack,
2597                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2598                 return -EOPNOTSUPP;
2599         }
2600
2601         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2602                 struct flow_match_eth_addrs match;
2603
2604                 flow_rule_match_eth_addrs(rule, &match);
2605                 if (!is_zero_ether_addr(match.mask->dst)) {
2606                         if (!is_broadcast_ether_addr(match.mask->dst)) {
2607                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2608                                 return -EINVAL;
2609                         }
2610
2611                         input->filter.match_flags |=
2612                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2613                         ether_addr_copy(input->filter.dst_addr, match.key->dst);
2614                 }
2615
2616                 if (!is_zero_ether_addr(match.mask->src)) {
2617                         if (!is_broadcast_ether_addr(match.mask->src)) {
2618                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2619                                 return -EINVAL;
2620                         }
2621
2622                         input->filter.match_flags |=
2623                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2624                         ether_addr_copy(input->filter.src_addr, match.key->src);
2625                 }
2626         }
2627
2628         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2629                 struct flow_match_basic match;
2630
2631                 flow_rule_match_basic(rule, &match);
2632                 if (match.mask->n_proto) {
2633                         if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
2634                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2635                                 return -EINVAL;
2636                         }
2637
2638                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2639                         input->filter.etype = match.key->n_proto;
2640                 }
2641         }
2642
2643         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
2644                 struct flow_match_vlan match;
2645
2646                 flow_rule_match_vlan(rule, &match);
2647                 if (match.mask->vlan_priority) {
2648                         if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2649                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2650                                 return -EINVAL;
2651                         }
2652
2653                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2654                         input->filter.vlan_tci =
2655                                 (__force __be16)match.key->vlan_priority;
2656                 }
2657         }
2658
2659         input->action = traffic_class;
2660         input->cookie = f->cookie;
2661
2662         return 0;
2663 }
2664
2665 static int igb_configure_clsflower(struct igb_adapter *adapter,
2666                                    struct flow_cls_offload *cls_flower)
2667 {
2668         struct netlink_ext_ack *extack = cls_flower->common.extack;
2669         struct igb_nfc_filter *filter, *f;
2670         int err, tc;
2671
2672         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2673         if (tc < 0) {
2674                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2675                 return -EINVAL;
2676         }
2677
2678         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2679         if (!filter)
2680                 return -ENOMEM;
2681
2682         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2683         if (err < 0)
2684                 goto err_parse;
2685
2686         spin_lock(&adapter->nfc_lock);
2687
2688         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2689                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2690                         err = -EEXIST;
2691                         NL_SET_ERR_MSG_MOD(extack,
2692                                            "This filter is already set in ethtool");
2693                         goto err_locked;
2694                 }
2695         }
2696
2697         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2698                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2699                         err = -EEXIST;
2700                         NL_SET_ERR_MSG_MOD(extack,
2701                                            "This filter is already set in cls_flower");
2702                         goto err_locked;
2703                 }
2704         }
2705
2706         err = igb_add_filter(adapter, filter);
2707         if (err < 0) {
2708                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2709                 goto err_locked;
2710         }
2711
2712         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2713
2714         spin_unlock(&adapter->nfc_lock);
2715
2716         return 0;
2717
2718 err_locked:
2719         spin_unlock(&adapter->nfc_lock);
2720
2721 err_parse:
2722         kfree(filter);
2723
2724         return err;
2725 }
2726
2727 static int igb_delete_clsflower(struct igb_adapter *adapter,
2728                                 struct flow_cls_offload *cls_flower)
2729 {
2730         struct igb_nfc_filter *filter;
2731         int err;
2732
2733         spin_lock(&adapter->nfc_lock);
2734
2735         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2736                 if (filter->cookie == cls_flower->cookie)
2737                         break;
2738
2739         if (!filter) {
2740                 err = -ENOENT;
2741                 goto out;
2742         }
2743
2744         err = igb_erase_filter(adapter, filter);
2745         if (err < 0)
2746                 goto out;
2747
2748         hlist_del(&filter->nfc_node);
2749         kfree(filter);
2750
2751 out:
2752         spin_unlock(&adapter->nfc_lock);
2753
2754         return err;
2755 }
2756
2757 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2758                                    struct flow_cls_offload *cls_flower)
2759 {
2760         switch (cls_flower->command) {
2761         case FLOW_CLS_REPLACE:
2762                 return igb_configure_clsflower(adapter, cls_flower);
2763         case FLOW_CLS_DESTROY:
2764                 return igb_delete_clsflower(adapter, cls_flower);
2765         case FLOW_CLS_STATS:
2766                 return -EOPNOTSUPP;
2767         default:
2768                 return -EOPNOTSUPP;
2769         }
2770 }
2771
2772 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2773                                  void *cb_priv)
2774 {
2775         struct igb_adapter *adapter = cb_priv;
2776
2777         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2778                 return -EOPNOTSUPP;
2779
2780         switch (type) {
2781         case TC_SETUP_CLSFLOWER:
2782                 return igb_setup_tc_cls_flower(adapter, type_data);
2783
2784         default:
2785                 return -EOPNOTSUPP;
2786         }
2787 }
2788
2789 static int igb_offload_txtime(struct igb_adapter *adapter,
2790                               struct tc_etf_qopt_offload *qopt)
2791 {
2792         struct e1000_hw *hw = &adapter->hw;
2793         int err;
2794
2795         /* Launchtime offloading is only supported by i210 controller. */
2796         if (hw->mac.type != e1000_i210)
2797                 return -EOPNOTSUPP;
2798
2799         /* Launchtime offloading is only supported by queues 0 and 1. */
2800         if (qopt->queue < 0 || qopt->queue > 1)
2801                 return -EINVAL;
2802
2803         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2804         if (err)
2805                 return err;
2806
2807         igb_offload_apply(adapter, qopt->queue);
2808
2809         return 0;
2810 }
2811
2812 static LIST_HEAD(igb_block_cb_list);
2813
2814 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2815                         void *type_data)
2816 {
2817         struct igb_adapter *adapter = netdev_priv(dev);
2818
2819         switch (type) {
2820         case TC_SETUP_QDISC_CBS:
2821                 return igb_offload_cbs(adapter, type_data);
2822         case TC_SETUP_BLOCK:
2823                 return flow_block_cb_setup_simple(type_data,
2824                                                   &igb_block_cb_list,
2825                                                   igb_setup_tc_block_cb,
2826                                                   adapter, adapter, true);
2827
2828         case TC_SETUP_QDISC_ETF:
2829                 return igb_offload_txtime(adapter, type_data);
2830
2831         default:
2832                 return -EOPNOTSUPP;
2833         }
2834 }
2835
2836 static int igb_xdp_setup(struct net_device *dev, struct netdev_bpf *bpf)
2837 {
2838         int i, frame_size = dev->mtu + IGB_ETH_PKT_HDR_PAD;
2839         struct igb_adapter *adapter = netdev_priv(dev);
2840         struct bpf_prog *prog = bpf->prog, *old_prog;
2841         bool running = netif_running(dev);
2842         bool need_reset;
2843
2844         /* verify igb ring attributes are sufficient for XDP */
2845         for (i = 0; i < adapter->num_rx_queues; i++) {
2846                 struct igb_ring *ring = adapter->rx_ring[i];
2847
2848                 if (frame_size > igb_rx_bufsz(ring)) {
2849                         NL_SET_ERR_MSG_MOD(bpf->extack,
2850                                            "The RX buffer size is too small for the frame size");
2851                         netdev_warn(dev, "XDP RX buffer size %d is too small for the frame size %d\n",
2852                                     igb_rx_bufsz(ring), frame_size);
2853                         return -EINVAL;
2854                 }
2855         }
2856
2857         old_prog = xchg(&adapter->xdp_prog, prog);
2858         need_reset = (!!prog != !!old_prog);
2859
2860         /* device is up and bpf is added/removed, must setup the RX queues */
2861         if (need_reset && running) {
2862                 igb_close(dev);
2863         } else {
2864                 for (i = 0; i < adapter->num_rx_queues; i++)
2865                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
2866                             adapter->xdp_prog);
2867         }
2868
2869         if (old_prog)
2870                 bpf_prog_put(old_prog);
2871
2872         /* bpf is just replaced, RXQ and MTU are already setup */
2873         if (!need_reset)
2874                 return 0;
2875
2876         if (running)
2877                 igb_open(dev);
2878
2879         return 0;
2880 }
2881
2882 static int igb_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2883 {
2884         switch (xdp->command) {
2885         case XDP_SETUP_PROG:
2886                 return igb_xdp_setup(dev, xdp);
2887         default:
2888                 return -EINVAL;
2889         }
2890 }
2891
2892 static void igb_xdp_ring_update_tail(struct igb_ring *ring)
2893 {
2894         /* Force memory writes to complete before letting h/w know there
2895          * are new descriptors to fetch.
2896          */
2897         wmb();
2898         writel(ring->next_to_use, ring->tail);
2899 }
2900
2901 static struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)
2902 {
2903         unsigned int r_idx = smp_processor_id();
2904
2905         if (r_idx >= adapter->num_tx_queues)
2906                 r_idx = r_idx % adapter->num_tx_queues;
2907
2908         return adapter->tx_ring[r_idx];
2909 }
2910
2911 static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)
2912 {
2913         struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
2914         int cpu = smp_processor_id();
2915         struct igb_ring *tx_ring;
2916         struct netdev_queue *nq;
2917         u32 ret;
2918
2919         if (unlikely(!xdpf))
2920                 return IGB_XDP_CONSUMED;
2921
2922         /* During program transitions its possible adapter->xdp_prog is assigned
2923          * but ring has not been configured yet. In this case simply abort xmit.
2924          */
2925         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2926         if (unlikely(!tx_ring))
2927                 return IGB_XDP_CONSUMED;
2928
2929         nq = txring_txq(tx_ring);
2930         __netif_tx_lock(nq, cpu);
2931         /* Avoid transmit queue timeout since we share it with the slow path */
2932         nq->trans_start = jiffies;
2933         ret = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2934         __netif_tx_unlock(nq);
2935
2936         return ret;
2937 }
2938
2939 static int igb_xdp_xmit(struct net_device *dev, int n,
2940                         struct xdp_frame **frames, u32 flags)
2941 {
2942         struct igb_adapter *adapter = netdev_priv(dev);
2943         int cpu = smp_processor_id();
2944         struct igb_ring *tx_ring;
2945         struct netdev_queue *nq;
2946         int nxmit = 0;
2947         int i;
2948
2949         if (unlikely(test_bit(__IGB_DOWN, &adapter->state)))
2950                 return -ENETDOWN;
2951
2952         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
2953                 return -EINVAL;
2954
2955         /* During program transitions its possible adapter->xdp_prog is assigned
2956          * but ring has not been configured yet. In this case simply abort xmit.
2957          */
2958         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2959         if (unlikely(!tx_ring))
2960                 return -ENXIO;
2961
2962         nq = txring_txq(tx_ring);
2963         __netif_tx_lock(nq, cpu);
2964
2965         /* Avoid transmit queue timeout since we share it with the slow path */
2966         nq->trans_start = jiffies;
2967
2968         for (i = 0; i < n; i++) {
2969                 struct xdp_frame *xdpf = frames[i];
2970                 int err;
2971
2972                 err = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2973                 if (err != IGB_XDP_TX)
2974                         break;
2975                 nxmit++;
2976         }
2977
2978         __netif_tx_unlock(nq);
2979
2980         if (unlikely(flags & XDP_XMIT_FLUSH))
2981                 igb_xdp_ring_update_tail(tx_ring);
2982
2983         return nxmit;
2984 }
2985
2986 static const struct net_device_ops igb_netdev_ops = {
2987         .ndo_open               = igb_open,
2988         .ndo_stop               = igb_close,
2989         .ndo_start_xmit         = igb_xmit_frame,
2990         .ndo_get_stats64        = igb_get_stats64,
2991         .ndo_set_rx_mode        = igb_set_rx_mode,
2992         .ndo_set_mac_address    = igb_set_mac,
2993         .ndo_change_mtu         = igb_change_mtu,
2994         .ndo_do_ioctl           = igb_ioctl,
2995         .ndo_tx_timeout         = igb_tx_timeout,
2996         .ndo_validate_addr      = eth_validate_addr,
2997         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2998         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2999         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
3000         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
3001         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
3002         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
3003         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
3004         .ndo_get_vf_config      = igb_ndo_get_vf_config,
3005         .ndo_fix_features       = igb_fix_features,
3006         .ndo_set_features       = igb_set_features,
3007         .ndo_fdb_add            = igb_ndo_fdb_add,
3008         .ndo_features_check     = igb_features_check,
3009         .ndo_setup_tc           = igb_setup_tc,
3010         .ndo_bpf                = igb_xdp,
3011         .ndo_xdp_xmit           = igb_xdp_xmit,
3012 };
3013
3014 /**
3015  * igb_set_fw_version - Configure version string for ethtool
3016  * @adapter: adapter struct
3017  **/
3018 void igb_set_fw_version(struct igb_adapter *adapter)
3019 {
3020         struct e1000_hw *hw = &adapter->hw;
3021         struct e1000_fw_version fw;
3022
3023         igb_get_fw_version(hw, &fw);
3024
3025         switch (hw->mac.type) {
3026         case e1000_i210:
3027         case e1000_i211:
3028                 if (!(igb_get_flash_presence_i210(hw))) {
3029                         snprintf(adapter->fw_version,
3030                                  sizeof(adapter->fw_version),
3031                                  "%2d.%2d-%d",
3032                                  fw.invm_major, fw.invm_minor,
3033                                  fw.invm_img_type);
3034                         break;
3035                 }
3036                 fallthrough;
3037         default:
3038                 /* if option is rom valid, display its version too */
3039                 if (fw.or_valid) {
3040                         snprintf(adapter->fw_version,
3041                                  sizeof(adapter->fw_version),
3042                                  "%d.%d, 0x%08x, %d.%d.%d",
3043                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
3044                                  fw.or_major, fw.or_build, fw.or_patch);
3045                 /* no option rom */
3046                 } else if (fw.etrack_id != 0X0000) {
3047                         snprintf(adapter->fw_version,
3048                             sizeof(adapter->fw_version),
3049                             "%d.%d, 0x%08x",
3050                             fw.eep_major, fw.eep_minor, fw.etrack_id);
3051                 } else {
3052                 snprintf(adapter->fw_version,
3053                     sizeof(adapter->fw_version),
3054                     "%d.%d.%d",
3055                     fw.eep_major, fw.eep_minor, fw.eep_build);
3056                 }
3057                 break;
3058         }
3059 }
3060
3061 /**
3062  * igb_init_mas - init Media Autosense feature if enabled in the NVM
3063  *
3064  * @adapter: adapter struct
3065  **/
3066 static void igb_init_mas(struct igb_adapter *adapter)
3067 {
3068         struct e1000_hw *hw = &adapter->hw;
3069         u16 eeprom_data;
3070
3071         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
3072         switch (hw->bus.func) {
3073         case E1000_FUNC_0:
3074                 if (eeprom_data & IGB_MAS_ENABLE_0) {
3075                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3076                         netdev_info(adapter->netdev,
3077                                 "MAS: Enabling Media Autosense for port %d\n",
3078                                 hw->bus.func);
3079                 }
3080                 break;
3081         case E1000_FUNC_1:
3082                 if (eeprom_data & IGB_MAS_ENABLE_1) {
3083                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3084                         netdev_info(adapter->netdev,
3085                                 "MAS: Enabling Media Autosense for port %d\n",
3086                                 hw->bus.func);
3087                 }
3088                 break;
3089         case E1000_FUNC_2:
3090                 if (eeprom_data & IGB_MAS_ENABLE_2) {
3091                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3092                         netdev_info(adapter->netdev,
3093                                 "MAS: Enabling Media Autosense for port %d\n",
3094                                 hw->bus.func);
3095                 }
3096                 break;
3097         case E1000_FUNC_3:
3098                 if (eeprom_data & IGB_MAS_ENABLE_3) {
3099                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3100                         netdev_info(adapter->netdev,
3101                                 "MAS: Enabling Media Autosense for port %d\n",
3102                                 hw->bus.func);
3103                 }
3104                 break;
3105         default:
3106                 /* Shouldn't get here */
3107                 netdev_err(adapter->netdev,
3108                         "MAS: Invalid port configuration, returning\n");
3109                 break;
3110         }
3111 }
3112
3113 /**
3114  *  igb_init_i2c - Init I2C interface
3115  *  @adapter: pointer to adapter structure
3116  **/
3117 static s32 igb_init_i2c(struct igb_adapter *adapter)
3118 {
3119         s32 status = 0;
3120
3121         /* I2C interface supported on i350 devices */
3122         if (adapter->hw.mac.type != e1000_i350)
3123                 return 0;
3124
3125         /* Initialize the i2c bus which is controlled by the registers.
3126          * This bus will use the i2c_algo_bit structure that implements
3127          * the protocol through toggling of the 4 bits in the register.
3128          */
3129         adapter->i2c_adap.owner = THIS_MODULE;
3130         adapter->i2c_algo = igb_i2c_algo;
3131         adapter->i2c_algo.data = adapter;
3132         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3133         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3134         strlcpy(adapter->i2c_adap.name, "igb BB",
3135                 sizeof(adapter->i2c_adap.name));
3136         status = i2c_bit_add_bus(&adapter->i2c_adap);
3137         return status;
3138 }
3139
3140 /**
3141  *  igb_probe - Device Initialization Routine
3142  *  @pdev: PCI device information struct
3143  *  @ent: entry in igb_pci_tbl
3144  *
3145  *  Returns 0 on success, negative on failure
3146  *
3147  *  igb_probe initializes an adapter identified by a pci_dev structure.
3148  *  The OS initialization, configuring of the adapter private structure,
3149  *  and a hardware reset occur.
3150  **/
3151 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3152 {
3153         struct net_device *netdev;
3154         struct igb_adapter *adapter;
3155         struct e1000_hw *hw;
3156         u16 eeprom_data = 0;
3157         s32 ret_val;
3158         static int global_quad_port_a; /* global quad port a indication */
3159         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3160         int err, pci_using_dac;
3161         u8 part_str[E1000_PBANUM_LENGTH];
3162
3163         /* Catch broken hardware that put the wrong VF device ID in
3164          * the PCIe SR-IOV capability.
3165          */
3166         if (pdev->is_virtfn) {
3167                 WARN(1, KERN_ERR "%s (%x:%x) should not be a VF!\n",
3168                         pci_name(pdev), pdev->vendor, pdev->device);
3169                 return -EINVAL;
3170         }
3171
3172         err = pci_enable_device_mem(pdev);
3173         if (err)
3174                 return err;
3175
3176         pci_using_dac = 0;
3177         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3178         if (!err) {
3179                 pci_using_dac = 1;
3180         } else {
3181                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3182                 if (err) {
3183                         dev_err(&pdev->dev,
3184                                 "No usable DMA configuration, aborting\n");
3185                         goto err_dma;
3186                 }
3187         }
3188
3189         err = pci_request_mem_regions(pdev, igb_driver_name);
3190         if (err)
3191                 goto err_pci_reg;
3192
3193         pci_enable_pcie_error_reporting(pdev);
3194
3195         pci_set_master(pdev);
3196         pci_save_state(pdev);
3197
3198         err = -ENOMEM;
3199         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3200                                    IGB_MAX_TX_QUEUES);
3201         if (!netdev)
3202                 goto err_alloc_etherdev;
3203
3204         SET_NETDEV_DEV(netdev, &pdev->dev);
3205
3206         pci_set_drvdata(pdev, netdev);
3207         adapter = netdev_priv(netdev);
3208         adapter->netdev = netdev;
3209         adapter->pdev = pdev;
3210         hw = &adapter->hw;
3211         hw->back = adapter;
3212         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3213
3214         err = -EIO;
3215         adapter->io_addr = pci_iomap(pdev, 0, 0);
3216         if (!adapter->io_addr)
3217                 goto err_ioremap;
3218         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3219         hw->hw_addr = adapter->io_addr;
3220
3221         netdev->netdev_ops = &igb_netdev_ops;
3222         igb_set_ethtool_ops(netdev);
3223         netdev->watchdog_timeo = 5 * HZ;
3224
3225         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3226
3227         netdev->mem_start = pci_resource_start(pdev, 0);
3228         netdev->mem_end = pci_resource_end(pdev, 0);
3229
3230         /* PCI config space info */
3231         hw->vendor_id = pdev->vendor;
3232         hw->device_id = pdev->device;
3233         hw->revision_id = pdev->revision;
3234         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3235         hw->subsystem_device_id = pdev->subsystem_device;
3236
3237         /* Copy the default MAC, PHY and NVM function pointers */
3238         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3239         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3240         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3241         /* Initialize skew-specific constants */
3242         err = ei->get_invariants(hw);
3243         if (err)
3244                 goto err_sw_init;
3245
3246         /* setup the private structure */
3247         err = igb_sw_init(adapter);
3248         if (err)
3249                 goto err_sw_init;
3250
3251         igb_get_bus_info_pcie(hw);
3252
3253         hw->phy.autoneg_wait_to_complete = false;
3254
3255         /* Copper options */
3256         if (hw->phy.media_type == e1000_media_type_copper) {
3257                 hw->phy.mdix = AUTO_ALL_MODES;
3258                 hw->phy.disable_polarity_correction = false;
3259                 hw->phy.ms_type = e1000_ms_hw_default;
3260         }
3261
3262         if (igb_check_reset_block(hw))
3263                 dev_info(&pdev->dev,
3264                         "PHY reset is blocked due to SOL/IDER session.\n");
3265
3266         /* features is initialized to 0 in allocation, it might have bits
3267          * set by igb_sw_init so we should use an or instead of an
3268          * assignment.
3269          */
3270         netdev->features |= NETIF_F_SG |
3271                             NETIF_F_TSO |
3272                             NETIF_F_TSO6 |
3273                             NETIF_F_RXHASH |
3274                             NETIF_F_RXCSUM |
3275                             NETIF_F_HW_CSUM;
3276
3277         if (hw->mac.type >= e1000_82576)
3278                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
3279
3280         if (hw->mac.type >= e1000_i350)
3281                 netdev->features |= NETIF_F_HW_TC;
3282
3283 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3284                                   NETIF_F_GSO_GRE_CSUM | \
3285                                   NETIF_F_GSO_IPXIP4 | \
3286                                   NETIF_F_GSO_IPXIP6 | \
3287                                   NETIF_F_GSO_UDP_TUNNEL | \
3288                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3289
3290         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3291         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3292
3293         /* copy netdev features into list of user selectable features */
3294         netdev->hw_features |= netdev->features |
3295                                NETIF_F_HW_VLAN_CTAG_RX |
3296                                NETIF_F_HW_VLAN_CTAG_TX |
3297                                NETIF_F_RXALL;
3298
3299         if (hw->mac.type >= e1000_i350)
3300                 netdev->hw_features |= NETIF_F_NTUPLE;
3301
3302         if (pci_using_dac)
3303                 netdev->features |= NETIF_F_HIGHDMA;
3304
3305         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3306         netdev->mpls_features |= NETIF_F_HW_CSUM;
3307         netdev->hw_enc_features |= netdev->vlan_features;
3308
3309         /* set this bit last since it cannot be part of vlan_features */
3310         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3311                             NETIF_F_HW_VLAN_CTAG_RX |
3312                             NETIF_F_HW_VLAN_CTAG_TX;
3313
3314         netdev->priv_flags |= IFF_SUPP_NOFCS;
3315
3316         netdev->priv_flags |= IFF_UNICAST_FLT;
3317
3318         /* MTU range: 68 - 9216 */
3319         netdev->min_mtu = ETH_MIN_MTU;
3320         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3321
3322         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3323
3324         /* before reading the NVM, reset the controller to put the device in a
3325          * known good starting state
3326          */
3327         hw->mac.ops.reset_hw(hw);
3328
3329         /* make sure the NVM is good , i211/i210 parts can have special NVM
3330          * that doesn't contain a checksum
3331          */
3332         switch (hw->mac.type) {
3333         case e1000_i210:
3334         case e1000_i211:
3335                 if (igb_get_flash_presence_i210(hw)) {
3336                         if (hw->nvm.ops.validate(hw) < 0) {
3337                                 dev_err(&pdev->dev,
3338                                         "The NVM Checksum Is Not Valid\n");
3339                                 err = -EIO;
3340                                 goto err_eeprom;
3341                         }
3342                 }
3343                 break;
3344         default:
3345                 if (hw->nvm.ops.validate(hw) < 0) {
3346                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3347                         err = -EIO;
3348                         goto err_eeprom;
3349                 }
3350                 break;
3351         }
3352
3353         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3354                 /* copy the MAC address out of the NVM */
3355                 if (hw->mac.ops.read_mac_addr(hw))
3356                         dev_err(&pdev->dev, "NVM Read Error\n");
3357         }
3358
3359         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
3360
3361         if (!is_valid_ether_addr(netdev->dev_addr)) {
3362                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3363                 err = -EIO;
3364                 goto err_eeprom;
3365         }
3366
3367         igb_set_default_mac_filter(adapter);
3368
3369         /* get firmware version for ethtool -i */
3370         igb_set_fw_version(adapter);
3371
3372         /* configure RXPBSIZE and TXPBSIZE */
3373         if (hw->mac.type == e1000_i210) {
3374                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3375                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3376         }
3377
3378         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3379         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3380
3381         INIT_WORK(&adapter->reset_task, igb_reset_task);
3382         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3383
3384         /* Initialize link properties that are user-changeable */
3385         adapter->fc_autoneg = true;
3386         hw->mac.autoneg = true;
3387         hw->phy.autoneg_advertised = 0x2f;
3388
3389         hw->fc.requested_mode = e1000_fc_default;
3390         hw->fc.current_mode = e1000_fc_default;
3391
3392         igb_validate_mdi_setting(hw);
3393
3394         /* By default, support wake on port A */
3395         if (hw->bus.func == 0)
3396                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3397
3398         /* Check the NVM for wake support on non-port A ports */
3399         if (hw->mac.type >= e1000_82580)
3400                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3401                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3402                                  &eeprom_data);
3403         else if (hw->bus.func == 1)
3404                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3405
3406         if (eeprom_data & IGB_EEPROM_APME)
3407                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3408
3409         /* now that we have the eeprom settings, apply the special cases where
3410          * the eeprom may be wrong or the board simply won't support wake on
3411          * lan on a particular port
3412          */
3413         switch (pdev->device) {
3414         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3415                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3416                 break;
3417         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3418         case E1000_DEV_ID_82576_FIBER:
3419         case E1000_DEV_ID_82576_SERDES:
3420                 /* Wake events only supported on port A for dual fiber
3421                  * regardless of eeprom setting
3422                  */
3423                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3424                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3425                 break;
3426         case E1000_DEV_ID_82576_QUAD_COPPER:
3427         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3428                 /* if quad port adapter, disable WoL on all but port A */
3429                 if (global_quad_port_a != 0)
3430                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3431                 else
3432                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3433                 /* Reset for multiple quad port adapters */
3434                 if (++global_quad_port_a == 4)
3435                         global_quad_port_a = 0;
3436                 break;
3437         default:
3438                 /* If the device can't wake, don't set software support */
3439                 if (!device_can_wakeup(&adapter->pdev->dev))
3440                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3441         }
3442
3443         /* initialize the wol settings based on the eeprom settings */
3444         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3445                 adapter->wol |= E1000_WUFC_MAG;
3446
3447         /* Some vendors want WoL disabled by default, but still supported */
3448         if ((hw->mac.type == e1000_i350) &&
3449             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3450                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3451                 adapter->wol = 0;
3452         }
3453
3454         /* Some vendors want the ability to Use the EEPROM setting as
3455          * enable/disable only, and not for capability
3456          */
3457         if (((hw->mac.type == e1000_i350) ||
3458              (hw->mac.type == e1000_i354)) &&
3459             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3460                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3461                 adapter->wol = 0;
3462         }
3463         if (hw->mac.type == e1000_i350) {
3464                 if (((pdev->subsystem_device == 0x5001) ||
3465                      (pdev->subsystem_device == 0x5002)) &&
3466                                 (hw->bus.func == 0)) {
3467                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3468                         adapter->wol = 0;
3469                 }
3470                 if (pdev->subsystem_device == 0x1F52)
3471                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3472         }
3473
3474         device_set_wakeup_enable(&adapter->pdev->dev,
3475                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3476
3477         /* reset the hardware with the new settings */
3478         igb_reset(adapter);
3479
3480         /* Init the I2C interface */
3481         err = igb_init_i2c(adapter);
3482         if (err) {
3483                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3484                 goto err_eeprom;
3485         }
3486
3487         /* let the f/w know that the h/w is now under the control of the
3488          * driver.
3489          */
3490         igb_get_hw_control(adapter);
3491
3492         strcpy(netdev->name, "eth%d");
3493         err = register_netdev(netdev);
3494         if (err)
3495                 goto err_register;
3496
3497         /* carrier off reporting is important to ethtool even BEFORE open */
3498         netif_carrier_off(netdev);
3499
3500 #ifdef CONFIG_IGB_DCA
3501         if (dca_add_requester(&pdev->dev) == 0) {
3502                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3503                 dev_info(&pdev->dev, "DCA enabled\n");
3504                 igb_setup_dca(adapter);
3505         }
3506
3507 #endif
3508 #ifdef CONFIG_IGB_HWMON
3509         /* Initialize the thermal sensor on i350 devices. */
3510         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3511                 u16 ets_word;
3512
3513                 /* Read the NVM to determine if this i350 device supports an
3514                  * external thermal sensor.
3515                  */
3516                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3517                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3518                         adapter->ets = true;
3519                 else
3520                         adapter->ets = false;
3521                 if (igb_sysfs_init(adapter))
3522                         dev_err(&pdev->dev,
3523                                 "failed to allocate sysfs resources\n");
3524         } else {
3525                 adapter->ets = false;
3526         }
3527 #endif
3528         /* Check if Media Autosense is enabled */
3529         adapter->ei = *ei;
3530         if (hw->dev_spec._82575.mas_capable)
3531                 igb_init_mas(adapter);
3532
3533         /* do hw tstamp init after resetting */
3534         igb_ptp_init(adapter);
3535
3536         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3537         /* print bus type/speed/width info, not applicable to i354 */
3538         if (hw->mac.type != e1000_i354) {
3539                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3540                          netdev->name,
3541                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3542                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3543                            "unknown"),
3544                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3545                           "Width x4" :
3546                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3547                           "Width x2" :
3548                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3549                           "Width x1" : "unknown"), netdev->dev_addr);
3550         }
3551
3552         if ((hw->mac.type == e1000_82576 &&
3553              rd32(E1000_EECD) & E1000_EECD_PRES) ||
3554             (hw->mac.type >= e1000_i210 ||
3555              igb_get_flash_presence_i210(hw))) {
3556                 ret_val = igb_read_part_string(hw, part_str,
3557                                                E1000_PBANUM_LENGTH);
3558         } else {
3559                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3560         }
3561
3562         if (ret_val)
3563                 strcpy(part_str, "Unknown");
3564         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3565         dev_info(&pdev->dev,
3566                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3567                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3568                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3569                 adapter->num_rx_queues, adapter->num_tx_queues);
3570         if (hw->phy.media_type == e1000_media_type_copper) {
3571                 switch (hw->mac.type) {
3572                 case e1000_i350:
3573                 case e1000_i210:
3574                 case e1000_i211:
3575                         /* Enable EEE for internal copper PHY devices */
3576                         err = igb_set_eee_i350(hw, true, true);
3577                         if ((!err) &&
3578                             (!hw->dev_spec._82575.eee_disable)) {
3579                                 adapter->eee_advert =
3580                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3581                                 adapter->flags |= IGB_FLAG_EEE;
3582                         }
3583                         break;
3584                 case e1000_i354:
3585                         if ((rd32(E1000_CTRL_EXT) &
3586                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3587                                 err = igb_set_eee_i354(hw, true, true);
3588                                 if ((!err) &&
3589                                         (!hw->dev_spec._82575.eee_disable)) {
3590                                         adapter->eee_advert =
3591                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3592                                         adapter->flags |= IGB_FLAG_EEE;
3593                                 }
3594                         }
3595                         break;
3596                 default:
3597                         break;
3598                 }
3599         }
3600
3601         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
3602
3603         pm_runtime_put_noidle(&pdev->dev);
3604         return 0;
3605
3606 err_register:
3607         igb_release_hw_control(adapter);
3608         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3609 err_eeprom:
3610         if (!igb_check_reset_block(hw))
3611                 igb_reset_phy(hw);
3612
3613         if (hw->flash_address)
3614                 iounmap(hw->flash_address);
3615 err_sw_init:
3616         kfree(adapter->mac_table);
3617         kfree(adapter->shadow_vfta);
3618         igb_clear_interrupt_scheme(adapter);
3619 #ifdef CONFIG_PCI_IOV
3620         igb_disable_sriov(pdev);
3621 #endif
3622         pci_iounmap(pdev, adapter->io_addr);
3623 err_ioremap:
3624         free_netdev(netdev);
3625 err_alloc_etherdev:
3626         pci_disable_pcie_error_reporting(pdev);
3627         pci_release_mem_regions(pdev);
3628 err_pci_reg:
3629 err_dma:
3630         pci_disable_device(pdev);
3631         return err;
3632 }
3633
3634 #ifdef CONFIG_PCI_IOV
3635 static int igb_disable_sriov(struct pci_dev *pdev)
3636 {
3637         struct net_device *netdev = pci_get_drvdata(pdev);
3638         struct igb_adapter *adapter = netdev_priv(netdev);
3639         struct e1000_hw *hw = &adapter->hw;
3640
3641         /* reclaim resources allocated to VFs */
3642         if (adapter->vf_data) {
3643                 /* disable iov and allow time for transactions to clear */
3644                 if (pci_vfs_assigned(pdev)) {
3645                         dev_warn(&pdev->dev,
3646                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3647                         return -EPERM;
3648                 } else {
3649                         pci_disable_sriov(pdev);
3650                         msleep(500);
3651                 }
3652
3653                 kfree(adapter->vf_mac_list);
3654                 adapter->vf_mac_list = NULL;
3655                 kfree(adapter->vf_data);
3656                 adapter->vf_data = NULL;
3657                 adapter->vfs_allocated_count = 0;
3658                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3659                 wrfl();
3660                 msleep(100);
3661                 dev_info(&pdev->dev, "IOV Disabled\n");
3662
3663                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3664                 adapter->flags |= IGB_FLAG_DMAC;
3665         }
3666
3667         return 0;
3668 }
3669
3670 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3671 {
3672         struct net_device *netdev = pci_get_drvdata(pdev);
3673         struct igb_adapter *adapter = netdev_priv(netdev);
3674         int old_vfs = pci_num_vf(pdev);
3675         struct vf_mac_filter *mac_list;
3676         int err = 0;
3677         int num_vf_mac_filters, i;
3678
3679         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3680                 err = -EPERM;
3681                 goto out;
3682         }
3683         if (!num_vfs)
3684                 goto out;
3685
3686         if (old_vfs) {
3687                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3688                          old_vfs, max_vfs);
3689                 adapter->vfs_allocated_count = old_vfs;
3690         } else
3691                 adapter->vfs_allocated_count = num_vfs;
3692
3693         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3694                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3695
3696         /* if allocation failed then we do not support SR-IOV */
3697         if (!adapter->vf_data) {
3698                 adapter->vfs_allocated_count = 0;
3699                 err = -ENOMEM;
3700                 goto out;
3701         }
3702
3703         /* Due to the limited number of RAR entries calculate potential
3704          * number of MAC filters available for the VFs. Reserve entries
3705          * for PF default MAC, PF MAC filters and at least one RAR entry
3706          * for each VF for VF MAC.
3707          */
3708         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3709                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3710                               adapter->vfs_allocated_count);
3711
3712         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3713                                        sizeof(struct vf_mac_filter),
3714                                        GFP_KERNEL);
3715
3716         mac_list = adapter->vf_mac_list;
3717         INIT_LIST_HEAD(&adapter->vf_macs.l);
3718
3719         if (adapter->vf_mac_list) {
3720                 /* Initialize list of VF MAC filters */
3721                 for (i = 0; i < num_vf_mac_filters; i++) {
3722                         mac_list->vf = -1;
3723                         mac_list->free = true;
3724                         list_add(&mac_list->l, &adapter->vf_macs.l);
3725                         mac_list++;
3726                 }
3727         } else {
3728                 /* If we could not allocate memory for the VF MAC filters
3729                  * we can continue without this feature but warn user.
3730                  */
3731                 dev_err(&pdev->dev,
3732                         "Unable to allocate memory for VF MAC filter list\n");
3733         }
3734
3735         /* only call pci_enable_sriov() if no VFs are allocated already */
3736         if (!old_vfs) {
3737                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3738                 if (err)
3739                         goto err_out;
3740         }
3741         dev_info(&pdev->dev, "%d VFs allocated\n",
3742                  adapter->vfs_allocated_count);
3743         for (i = 0; i < adapter->vfs_allocated_count; i++)
3744                 igb_vf_configure(adapter, i);
3745
3746         /* DMA Coalescing is not supported in IOV mode. */
3747         adapter->flags &= ~IGB_FLAG_DMAC;
3748         goto out;
3749
3750 err_out:
3751         kfree(adapter->vf_mac_list);
3752         adapter->vf_mac_list = NULL;
3753         kfree(adapter->vf_data);
3754         adapter->vf_data = NULL;
3755         adapter->vfs_allocated_count = 0;
3756 out:
3757         return err;
3758 }
3759
3760 #endif
3761 /**
3762  *  igb_remove_i2c - Cleanup  I2C interface
3763  *  @adapter: pointer to adapter structure
3764  **/
3765 static void igb_remove_i2c(struct igb_adapter *adapter)
3766 {
3767         /* free the adapter bus structure */
3768         i2c_del_adapter(&adapter->i2c_adap);
3769 }
3770
3771 /**
3772  *  igb_remove - Device Removal Routine
3773  *  @pdev: PCI device information struct
3774  *
3775  *  igb_remove is called by the PCI subsystem to alert the driver
3776  *  that it should release a PCI device.  The could be caused by a
3777  *  Hot-Plug event, or because the driver is going to be removed from
3778  *  memory.
3779  **/
3780 static void igb_remove(struct pci_dev *pdev)
3781 {
3782         struct net_device *netdev = pci_get_drvdata(pdev);
3783         struct igb_adapter *adapter = netdev_priv(netdev);
3784         struct e1000_hw *hw = &adapter->hw;
3785
3786         pm_runtime_get_noresume(&pdev->dev);
3787 #ifdef CONFIG_IGB_HWMON
3788         igb_sysfs_exit(adapter);
3789 #endif
3790         igb_remove_i2c(adapter);
3791         igb_ptp_stop(adapter);
3792         /* The watchdog timer may be rescheduled, so explicitly
3793          * disable watchdog from being rescheduled.
3794          */
3795         set_bit(__IGB_DOWN, &adapter->state);
3796         del_timer_sync(&adapter->watchdog_timer);
3797         del_timer_sync(&adapter->phy_info_timer);
3798
3799         cancel_work_sync(&adapter->reset_task);
3800         cancel_work_sync(&adapter->watchdog_task);
3801
3802 #ifdef CONFIG_IGB_DCA
3803         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3804                 dev_info(&pdev->dev, "DCA disabled\n");
3805                 dca_remove_requester(&pdev->dev);
3806                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3807                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3808         }
3809 #endif
3810
3811         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3812          * would have already happened in close and is redundant.
3813          */
3814         igb_release_hw_control(adapter);
3815
3816 #ifdef CONFIG_PCI_IOV
3817         igb_disable_sriov(pdev);
3818 #endif
3819
3820         unregister_netdev(netdev);
3821
3822         igb_clear_interrupt_scheme(adapter);
3823
3824         pci_iounmap(pdev, adapter->io_addr);
3825         if (hw->flash_address)
3826                 iounmap(hw->flash_address);
3827         pci_release_mem_regions(pdev);
3828
3829         kfree(adapter->mac_table);
3830         kfree(adapter->shadow_vfta);
3831         free_netdev(netdev);
3832
3833         pci_disable_pcie_error_reporting(pdev);
3834
3835         pci_disable_device(pdev);
3836 }
3837
3838 /**
3839  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3840  *  @adapter: board private structure to initialize
3841  *
3842  *  This function initializes the vf specific data storage and then attempts to
3843  *  allocate the VFs.  The reason for ordering it this way is because it is much
3844  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3845  *  the memory for the VFs.
3846  **/
3847 static void igb_probe_vfs(struct igb_adapter *adapter)
3848 {
3849 #ifdef CONFIG_PCI_IOV
3850         struct pci_dev *pdev = adapter->pdev;
3851         struct e1000_hw *hw = &adapter->hw;
3852
3853         /* Virtualization features not supported on i210 family. */
3854         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3855                 return;
3856
3857         /* Of the below we really only want the effect of getting
3858          * IGB_FLAG_HAS_MSIX set (if available), without which
3859          * igb_enable_sriov() has no effect.
3860          */
3861         igb_set_interrupt_capability(adapter, true);
3862         igb_reset_interrupt_capability(adapter);
3863
3864         pci_sriov_set_totalvfs(pdev, 7);
3865         igb_enable_sriov(pdev, max_vfs);
3866
3867 #endif /* CONFIG_PCI_IOV */
3868 }
3869
3870 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3871 {
3872         struct e1000_hw *hw = &adapter->hw;
3873         unsigned int max_rss_queues;
3874
3875         /* Determine the maximum number of RSS queues supported. */
3876         switch (hw->mac.type) {
3877         case e1000_i211:
3878                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3879                 break;
3880         case e1000_82575:
3881         case e1000_i210:
3882                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3883                 break;
3884         case e1000_i350:
3885                 /* I350 cannot do RSS and SR-IOV at the same time */
3886                 if (!!adapter->vfs_allocated_count) {
3887                         max_rss_queues = 1;
3888                         break;
3889                 }
3890                 fallthrough;
3891         case e1000_82576:
3892                 if (!!adapter->vfs_allocated_count) {
3893                         max_rss_queues = 2;
3894                         break;
3895                 }
3896                 fallthrough;
3897         case e1000_82580:
3898         case e1000_i354:
3899         default:
3900                 max_rss_queues = IGB_MAX_RX_QUEUES;
3901                 break;
3902         }
3903
3904         return max_rss_queues;
3905 }
3906
3907 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3908 {
3909         u32 max_rss_queues;
3910
3911         max_rss_queues = igb_get_max_rss_queues(adapter);
3912         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3913
3914         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3915 }
3916
3917 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3918                               const u32 max_rss_queues)
3919 {
3920         struct e1000_hw *hw = &adapter->hw;
3921
3922         /* Determine if we need to pair queues. */
3923         switch (hw->mac.type) {
3924         case e1000_82575:
3925         case e1000_i211:
3926                 /* Device supports enough interrupts without queue pairing. */
3927                 break;
3928         case e1000_82576:
3929         case e1000_82580:
3930         case e1000_i350:
3931         case e1000_i354:
3932         case e1000_i210:
3933         default:
3934                 /* If rss_queues > half of max_rss_queues, pair the queues in
3935                  * order to conserve interrupts due to limited supply.
3936                  */
3937                 if (adapter->rss_queues > (max_rss_queues / 2))
3938                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3939                 else
3940                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3941                 break;
3942         }
3943 }
3944
3945 /**
3946  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3947  *  @adapter: board private structure to initialize
3948  *
3949  *  igb_sw_init initializes the Adapter private data structure.
3950  *  Fields are initialized based on PCI device information and
3951  *  OS network device settings (MTU size).
3952  **/
3953 static int igb_sw_init(struct igb_adapter *adapter)
3954 {
3955         struct e1000_hw *hw = &adapter->hw;
3956         struct net_device *netdev = adapter->netdev;
3957         struct pci_dev *pdev = adapter->pdev;
3958
3959         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3960
3961         /* set default ring sizes */
3962         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3963         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3964
3965         /* set default ITR values */
3966         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3967         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3968
3969         /* set default work limits */
3970         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3971
3972         adapter->max_frame_size = netdev->mtu + IGB_ETH_PKT_HDR_PAD;
3973         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3974
3975         spin_lock_init(&adapter->nfc_lock);
3976         spin_lock_init(&adapter->stats64_lock);
3977 #ifdef CONFIG_PCI_IOV
3978         switch (hw->mac.type) {
3979         case e1000_82576:
3980         case e1000_i350:
3981                 if (max_vfs > 7) {
3982                         dev_warn(&pdev->dev,
3983                                  "Maximum of 7 VFs per PF, using max\n");
3984                         max_vfs = adapter->vfs_allocated_count = 7;
3985                 } else
3986                         adapter->vfs_allocated_count = max_vfs;
3987                 if (adapter->vfs_allocated_count)
3988                         dev_warn(&pdev->dev,
3989                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3990                 break;
3991         default:
3992                 break;
3993         }
3994 #endif /* CONFIG_PCI_IOV */
3995
3996         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3997         adapter->flags |= IGB_FLAG_HAS_MSIX;
3998
3999         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
4000                                      sizeof(struct igb_mac_addr),
4001                                      GFP_KERNEL);
4002         if (!adapter->mac_table)
4003                 return -ENOMEM;
4004
4005         igb_probe_vfs(adapter);
4006
4007         igb_init_queue_configuration(adapter);
4008
4009         /* Setup and initialize a copy of the hw vlan table array */
4010         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
4011                                        GFP_KERNEL);
4012         if (!adapter->shadow_vfta)
4013                 return -ENOMEM;
4014
4015         /* This call may decrease the number of queues */
4016         if (igb_init_interrupt_scheme(adapter, true)) {
4017                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4018                 return -ENOMEM;
4019         }
4020
4021         /* Explicitly disable IRQ since the NIC can be in any state. */
4022         igb_irq_disable(adapter);
4023
4024         if (hw->mac.type >= e1000_i350)
4025                 adapter->flags &= ~IGB_FLAG_DMAC;
4026
4027         set_bit(__IGB_DOWN, &adapter->state);
4028         return 0;
4029 }
4030
4031 /**
4032  *  __igb_open - Called when a network interface is made active
4033  *  @netdev: network interface device structure
4034  *  @resuming: indicates whether we are in a resume call
4035  *
4036  *  Returns 0 on success, negative value on failure
4037  *
4038  *  The open entry point is called when a network interface is made
4039  *  active by the system (IFF_UP).  At this point all resources needed
4040  *  for transmit and receive operations are allocated, the interrupt
4041  *  handler is registered with the OS, the watchdog timer is started,
4042  *  and the stack is notified that the interface is ready.
4043  **/
4044 static int __igb_open(struct net_device *netdev, bool resuming)
4045 {
4046         struct igb_adapter *adapter = netdev_priv(netdev);
4047         struct e1000_hw *hw = &adapter->hw;
4048         struct pci_dev *pdev = adapter->pdev;
4049         int err;
4050         int i;
4051
4052         /* disallow open during test */
4053         if (test_bit(__IGB_TESTING, &adapter->state)) {
4054                 WARN_ON(resuming);
4055                 return -EBUSY;
4056         }
4057
4058         if (!resuming)
4059                 pm_runtime_get_sync(&pdev->dev);
4060
4061         netif_carrier_off(netdev);
4062
4063         /* allocate transmit descriptors */
4064         err = igb_setup_all_tx_resources(adapter);
4065         if (err)
4066                 goto err_setup_tx;
4067
4068         /* allocate receive descriptors */
4069         err = igb_setup_all_rx_resources(adapter);
4070         if (err)
4071                 goto err_setup_rx;
4072
4073         igb_power_up_link(adapter);
4074
4075         /* before we allocate an interrupt, we must be ready to handle it.
4076          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4077          * as soon as we call pci_request_irq, so we have to setup our
4078          * clean_rx handler before we do so.
4079          */
4080         igb_configure(adapter);
4081
4082         err = igb_request_irq(adapter);
4083         if (err)
4084                 goto err_req_irq;
4085
4086         /* Notify the stack of the actual queue counts. */
4087         err = netif_set_real_num_tx_queues(adapter->netdev,
4088                                            adapter->num_tx_queues);
4089         if (err)
4090                 goto err_set_queues;
4091
4092         err = netif_set_real_num_rx_queues(adapter->netdev,
4093                                            adapter->num_rx_queues);
4094         if (err)
4095                 goto err_set_queues;
4096
4097         /* From here on the code is the same as igb_up() */
4098         clear_bit(__IGB_DOWN, &adapter->state);
4099
4100         for (i = 0; i < adapter->num_q_vectors; i++)
4101                 napi_enable(&(adapter->q_vector[i]->napi));
4102
4103         /* Clear any pending interrupts. */
4104         rd32(E1000_TSICR);
4105         rd32(E1000_ICR);
4106
4107         igb_irq_enable(adapter);
4108
4109         /* notify VFs that reset has been completed */
4110         if (adapter->vfs_allocated_count) {
4111                 u32 reg_data = rd32(E1000_CTRL_EXT);
4112
4113                 reg_data |= E1000_CTRL_EXT_PFRSTD;
4114                 wr32(E1000_CTRL_EXT, reg_data);
4115         }
4116
4117         netif_tx_start_all_queues(netdev);
4118
4119         if (!resuming)
4120                 pm_runtime_put(&pdev->dev);
4121
4122         /* start the watchdog. */
4123         hw->mac.get_link_status = 1;
4124         schedule_work(&adapter->watchdog_task);
4125
4126         return 0;
4127
4128 err_set_queues:
4129         igb_free_irq(adapter);
4130 err_req_irq:
4131         igb_release_hw_control(adapter);
4132         igb_power_down_link(adapter);
4133         igb_free_all_rx_resources(adapter);
4134 err_setup_rx:
4135         igb_free_all_tx_resources(adapter);
4136 err_setup_tx:
4137         igb_reset(adapter);
4138         if (!resuming)
4139                 pm_runtime_put(&pdev->dev);
4140
4141         return err;
4142 }
4143
4144 int igb_open(struct net_device *netdev)
4145 {
4146         return __igb_open(netdev, false);
4147 }
4148
4149 /**
4150  *  __igb_close - Disables a network interface
4151  *  @netdev: network interface device structure
4152  *  @suspending: indicates we are in a suspend call
4153  *
4154  *  Returns 0, this is not allowed to fail
4155  *
4156  *  The close entry point is called when an interface is de-activated
4157  *  by the OS.  The hardware is still under the driver's control, but
4158  *  needs to be disabled.  A global MAC reset is issued to stop the
4159  *  hardware, and all transmit and receive resources are freed.
4160  **/
4161 static int __igb_close(struct net_device *netdev, bool suspending)
4162 {
4163         struct igb_adapter *adapter = netdev_priv(netdev);
4164         struct pci_dev *pdev = adapter->pdev;
4165
4166         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4167
4168         if (!suspending)
4169                 pm_runtime_get_sync(&pdev->dev);
4170
4171         igb_down(adapter);
4172         igb_free_irq(adapter);
4173
4174         igb_free_all_tx_resources(adapter);
4175         igb_free_all_rx_resources(adapter);
4176
4177         if (!suspending)
4178                 pm_runtime_put_sync(&pdev->dev);
4179         return 0;
4180 }
4181
4182 int igb_close(struct net_device *netdev)
4183 {
4184         if (netif_device_present(netdev) || netdev->dismantle)
4185                 return __igb_close(netdev, false);
4186         return 0;
4187 }
4188
4189 /**
4190  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4191  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4192  *
4193  *  Return 0 on success, negative on failure
4194  **/
4195 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4196 {
4197         struct device *dev = tx_ring->dev;
4198         int size;
4199
4200         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4201
4202         tx_ring->tx_buffer_info = vmalloc(size);
4203         if (!tx_ring->tx_buffer_info)
4204                 goto err;
4205
4206         /* round up to nearest 4K */
4207         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4208         tx_ring->size = ALIGN(tx_ring->size, 4096);
4209
4210         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4211                                            &tx_ring->dma, GFP_KERNEL);
4212         if (!tx_ring->desc)
4213                 goto err;
4214
4215         tx_ring->next_to_use = 0;
4216         tx_ring->next_to_clean = 0;
4217
4218         return 0;
4219
4220 err:
4221         vfree(tx_ring->tx_buffer_info);
4222         tx_ring->tx_buffer_info = NULL;
4223         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4224         return -ENOMEM;
4225 }
4226
4227 /**
4228  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4229  *                               (Descriptors) for all queues
4230  *  @adapter: board private structure
4231  *
4232  *  Return 0 on success, negative on failure
4233  **/
4234 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4235 {
4236         struct pci_dev *pdev = adapter->pdev;
4237         int i, err = 0;
4238
4239         for (i = 0; i < adapter->num_tx_queues; i++) {
4240                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4241                 if (err) {
4242                         dev_err(&pdev->dev,
4243                                 "Allocation for Tx Queue %u failed\n", i);
4244                         for (i--; i >= 0; i--)
4245                                 igb_free_tx_resources(adapter->tx_ring[i]);
4246                         break;
4247                 }
4248         }
4249
4250         return err;
4251 }
4252
4253 /**
4254  *  igb_setup_tctl - configure the transmit control registers
4255  *  @adapter: Board private structure
4256  **/
4257 void igb_setup_tctl(struct igb_adapter *adapter)
4258 {
4259         struct e1000_hw *hw = &adapter->hw;
4260         u32 tctl;
4261
4262         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4263         wr32(E1000_TXDCTL(0), 0);
4264
4265         /* Program the Transmit Control Register */
4266         tctl = rd32(E1000_TCTL);
4267         tctl &= ~E1000_TCTL_CT;
4268         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4269                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4270
4271         igb_config_collision_dist(hw);
4272
4273         /* Enable transmits */
4274         tctl |= E1000_TCTL_EN;
4275
4276         wr32(E1000_TCTL, tctl);
4277 }
4278
4279 /**
4280  *  igb_configure_tx_ring - Configure transmit ring after Reset
4281  *  @adapter: board private structure
4282  *  @ring: tx ring to configure
4283  *
4284  *  Configure a transmit ring after a reset.
4285  **/
4286 void igb_configure_tx_ring(struct igb_adapter *adapter,
4287                            struct igb_ring *ring)
4288 {
4289         struct e1000_hw *hw = &adapter->hw;
4290         u32 txdctl = 0;
4291         u64 tdba = ring->dma;
4292         int reg_idx = ring->reg_idx;
4293
4294         wr32(E1000_TDLEN(reg_idx),
4295              ring->count * sizeof(union e1000_adv_tx_desc));
4296         wr32(E1000_TDBAL(reg_idx),
4297              tdba & 0x00000000ffffffffULL);
4298         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4299
4300         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4301         wr32(E1000_TDH(reg_idx), 0);
4302         writel(0, ring->tail);
4303
4304         txdctl |= IGB_TX_PTHRESH;
4305         txdctl |= IGB_TX_HTHRESH << 8;
4306         txdctl |= IGB_TX_WTHRESH << 16;
4307
4308         /* reinitialize tx_buffer_info */
4309         memset(ring->tx_buffer_info, 0,
4310                sizeof(struct igb_tx_buffer) * ring->count);
4311
4312         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4313         wr32(E1000_TXDCTL(reg_idx), txdctl);
4314 }
4315
4316 /**
4317  *  igb_configure_tx - Configure transmit Unit after Reset
4318  *  @adapter: board private structure
4319  *
4320  *  Configure the Tx unit of the MAC after a reset.
4321  **/
4322 static void igb_configure_tx(struct igb_adapter *adapter)
4323 {
4324         struct e1000_hw *hw = &adapter->hw;
4325         int i;
4326
4327         /* disable the queues */
4328         for (i = 0; i < adapter->num_tx_queues; i++)
4329                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4330
4331         wrfl();
4332         usleep_range(10000, 20000);
4333
4334         for (i = 0; i < adapter->num_tx_queues; i++)
4335                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4336 }
4337
4338 /**
4339  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4340  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4341  *
4342  *  Returns 0 on success, negative on failure
4343  **/
4344 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4345 {
4346         struct igb_adapter *adapter = netdev_priv(rx_ring->netdev);
4347         struct device *dev = rx_ring->dev;
4348         int size;
4349
4350         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4351
4352         rx_ring->rx_buffer_info = vmalloc(size);
4353         if (!rx_ring->rx_buffer_info)
4354                 goto err;
4355
4356         /* Round up to nearest 4K */
4357         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4358         rx_ring->size = ALIGN(rx_ring->size, 4096);
4359
4360         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4361                                            &rx_ring->dma, GFP_KERNEL);
4362         if (!rx_ring->desc)
4363                 goto err;
4364
4365         rx_ring->next_to_alloc = 0;
4366         rx_ring->next_to_clean = 0;
4367         rx_ring->next_to_use = 0;
4368
4369         rx_ring->xdp_prog = adapter->xdp_prog;
4370
4371         /* XDP RX-queue info */
4372         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
4373                              rx_ring->queue_index, 0) < 0)
4374                 goto err;
4375
4376         return 0;
4377
4378 err:
4379         vfree(rx_ring->rx_buffer_info);
4380         rx_ring->rx_buffer_info = NULL;
4381         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4382         return -ENOMEM;
4383 }
4384
4385 /**
4386  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4387  *                               (Descriptors) for all queues
4388  *  @adapter: board private structure
4389  *
4390  *  Return 0 on success, negative on failure
4391  **/
4392 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4393 {
4394         struct pci_dev *pdev = adapter->pdev;
4395         int i, err = 0;
4396
4397         for (i = 0; i < adapter->num_rx_queues; i++) {
4398                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4399                 if (err) {
4400                         dev_err(&pdev->dev,
4401                                 "Allocation for Rx Queue %u failed\n", i);
4402                         for (i--; i >= 0; i--)
4403                                 igb_free_rx_resources(adapter->rx_ring[i]);
4404                         break;
4405                 }
4406         }
4407
4408         return err;
4409 }
4410
4411 /**
4412  *  igb_setup_mrqc - configure the multiple receive queue control registers
4413  *  @adapter: Board private structure
4414  **/
4415 static void igb_setup_mrqc(struct igb_adapter *adapter)
4416 {
4417         struct e1000_hw *hw = &adapter->hw;
4418         u32 mrqc, rxcsum;
4419         u32 j, num_rx_queues;
4420         u32 rss_key[10];
4421
4422         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4423         for (j = 0; j < 10; j++)
4424                 wr32(E1000_RSSRK(j), rss_key[j]);
4425
4426         num_rx_queues = adapter->rss_queues;
4427
4428         switch (hw->mac.type) {
4429         case e1000_82576:
4430                 /* 82576 supports 2 RSS queues for SR-IOV */
4431                 if (adapter->vfs_allocated_count)
4432                         num_rx_queues = 2;
4433                 break;
4434         default:
4435                 break;
4436         }
4437
4438         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4439                 for (j = 0; j < IGB_RETA_SIZE; j++)
4440                         adapter->rss_indir_tbl[j] =
4441                         (j * num_rx_queues) / IGB_RETA_SIZE;
4442                 adapter->rss_indir_tbl_init = num_rx_queues;
4443         }
4444         igb_write_rss_indir_tbl(adapter);
4445
4446         /* Disable raw packet checksumming so that RSS hash is placed in
4447          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4448          * offloads as they are enabled by default
4449          */
4450         rxcsum = rd32(E1000_RXCSUM);
4451         rxcsum |= E1000_RXCSUM_PCSD;
4452
4453         if (adapter->hw.mac.type >= e1000_82576)
4454                 /* Enable Receive Checksum Offload for SCTP */
4455                 rxcsum |= E1000_RXCSUM_CRCOFL;
4456
4457         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4458         wr32(E1000_RXCSUM, rxcsum);
4459
4460         /* Generate RSS hash based on packet types, TCP/UDP
4461          * port numbers and/or IPv4/v6 src and dst addresses
4462          */
4463         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4464                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4465                E1000_MRQC_RSS_FIELD_IPV6 |
4466                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4467                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4468
4469         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4470                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4471         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4472                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4473
4474         /* If VMDq is enabled then we set the appropriate mode for that, else
4475          * we default to RSS so that an RSS hash is calculated per packet even
4476          * if we are only using one queue
4477          */
4478         if (adapter->vfs_allocated_count) {
4479                 if (hw->mac.type > e1000_82575) {
4480                         /* Set the default pool for the PF's first queue */
4481                         u32 vtctl = rd32(E1000_VT_CTL);
4482
4483                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4484                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4485                         vtctl |= adapter->vfs_allocated_count <<
4486                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4487                         wr32(E1000_VT_CTL, vtctl);
4488                 }
4489                 if (adapter->rss_queues > 1)
4490                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4491                 else
4492                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4493         } else {
4494                 mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4495         }
4496         igb_vmm_control(adapter);
4497
4498         wr32(E1000_MRQC, mrqc);
4499 }
4500
4501 /**
4502  *  igb_setup_rctl - configure the receive control registers
4503  *  @adapter: Board private structure
4504  **/
4505 void igb_setup_rctl(struct igb_adapter *adapter)
4506 {
4507         struct e1000_hw *hw = &adapter->hw;
4508         u32 rctl;
4509
4510         rctl = rd32(E1000_RCTL);
4511
4512         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4513         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4514
4515         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4516                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4517
4518         /* enable stripping of CRC. It's unlikely this will break BMC
4519          * redirection as it did with e1000. Newer features require
4520          * that the HW strips the CRC.
4521          */
4522         rctl |= E1000_RCTL_SECRC;
4523
4524         /* disable store bad packets and clear size bits. */
4525         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4526
4527         /* enable LPE to allow for reception of jumbo frames */
4528         rctl |= E1000_RCTL_LPE;
4529
4530         /* disable queue 0 to prevent tail write w/o re-config */
4531         wr32(E1000_RXDCTL(0), 0);
4532
4533         /* Attention!!!  For SR-IOV PF driver operations you must enable
4534          * queue drop for all VF and PF queues to prevent head of line blocking
4535          * if an un-trusted VF does not provide descriptors to hardware.
4536          */
4537         if (adapter->vfs_allocated_count) {
4538                 /* set all queue drop enable bits */
4539                 wr32(E1000_QDE, ALL_QUEUES);
4540         }
4541
4542         /* This is useful for sniffing bad packets. */
4543         if (adapter->netdev->features & NETIF_F_RXALL) {
4544                 /* UPE and MPE will be handled by normal PROMISC logic
4545                  * in e1000e_set_rx_mode
4546                  */
4547                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4548                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4549                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4550
4551                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4552                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4553                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4554                  * and that breaks VLANs.
4555                  */
4556         }
4557
4558         wr32(E1000_RCTL, rctl);
4559 }
4560
4561 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4562                                    int vfn)
4563 {
4564         struct e1000_hw *hw = &adapter->hw;
4565         u32 vmolr;
4566
4567         if (size > MAX_JUMBO_FRAME_SIZE)
4568                 size = MAX_JUMBO_FRAME_SIZE;
4569
4570         vmolr = rd32(E1000_VMOLR(vfn));
4571         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4572         vmolr |= size | E1000_VMOLR_LPE;
4573         wr32(E1000_VMOLR(vfn), vmolr);
4574
4575         return 0;
4576 }
4577
4578 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4579                                          int vfn, bool enable)
4580 {
4581         struct e1000_hw *hw = &adapter->hw;
4582         u32 val, reg;
4583
4584         if (hw->mac.type < e1000_82576)
4585                 return;
4586
4587         if (hw->mac.type == e1000_i350)
4588                 reg = E1000_DVMOLR(vfn);
4589         else
4590                 reg = E1000_VMOLR(vfn);
4591
4592         val = rd32(reg);
4593         if (enable)
4594                 val |= E1000_VMOLR_STRVLAN;
4595         else
4596                 val &= ~(E1000_VMOLR_STRVLAN);
4597         wr32(reg, val);
4598 }
4599
4600 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4601                                  int vfn, bool aupe)
4602 {
4603         struct e1000_hw *hw = &adapter->hw;
4604         u32 vmolr;
4605
4606         /* This register exists only on 82576 and newer so if we are older then
4607          * we should exit and do nothing
4608          */
4609         if (hw->mac.type < e1000_82576)
4610                 return;
4611
4612         vmolr = rd32(E1000_VMOLR(vfn));
4613         if (aupe)
4614                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4615         else
4616                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4617
4618         /* clear all bits that might not be set */
4619         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4620
4621         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4622                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4623         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4624          * multicast packets
4625          */
4626         if (vfn <= adapter->vfs_allocated_count)
4627                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4628
4629         wr32(E1000_VMOLR(vfn), vmolr);
4630 }
4631
4632 /**
4633  *  igb_setup_srrctl - configure the split and replication receive control
4634  *                     registers
4635  *  @adapter: Board private structure
4636  *  @ring: receive ring to be configured
4637  **/
4638 void igb_setup_srrctl(struct igb_adapter *adapter, struct igb_ring *ring)
4639 {
4640         struct e1000_hw *hw = &adapter->hw;
4641         int reg_idx = ring->reg_idx;
4642         u32 srrctl = 0;
4643
4644         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4645         if (ring_uses_large_buffer(ring))
4646                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4647         else
4648                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4649         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4650         if (hw->mac.type >= e1000_82580)
4651                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4652         /* Only set Drop Enable if VFs allocated, or we are supporting multiple
4653          * queues and rx flow control is disabled
4654          */
4655         if (adapter->vfs_allocated_count ||
4656             (!(hw->fc.current_mode & e1000_fc_rx_pause) &&
4657              adapter->num_rx_queues > 1))
4658                 srrctl |= E1000_SRRCTL_DROP_EN;
4659
4660         wr32(E1000_SRRCTL(reg_idx), srrctl);
4661 }
4662
4663 /**
4664  *  igb_configure_rx_ring - Configure a receive ring after Reset
4665  *  @adapter: board private structure
4666  *  @ring: receive ring to be configured
4667  *
4668  *  Configure the Rx unit of the MAC after a reset.
4669  **/
4670 void igb_configure_rx_ring(struct igb_adapter *adapter,
4671                            struct igb_ring *ring)
4672 {
4673         struct e1000_hw *hw = &adapter->hw;
4674         union e1000_adv_rx_desc *rx_desc;
4675         u64 rdba = ring->dma;
4676         int reg_idx = ring->reg_idx;
4677         u32 rxdctl = 0;
4678
4679         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4680         WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4681                                            MEM_TYPE_PAGE_SHARED, NULL));
4682
4683         /* disable the queue */
4684         wr32(E1000_RXDCTL(reg_idx), 0);
4685
4686         /* Set DMA base address registers */
4687         wr32(E1000_RDBAL(reg_idx),
4688              rdba & 0x00000000ffffffffULL);
4689         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4690         wr32(E1000_RDLEN(reg_idx),
4691              ring->count * sizeof(union e1000_adv_rx_desc));
4692
4693         /* initialize head and tail */
4694         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4695         wr32(E1000_RDH(reg_idx), 0);
4696         writel(0, ring->tail);
4697
4698         /* set descriptor configuration */
4699         igb_setup_srrctl(adapter, ring);
4700
4701         /* set filtering for VMDQ pools */
4702         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4703
4704         rxdctl |= IGB_RX_PTHRESH;
4705         rxdctl |= IGB_RX_HTHRESH << 8;
4706         rxdctl |= IGB_RX_WTHRESH << 16;
4707
4708         /* initialize rx_buffer_info */
4709         memset(ring->rx_buffer_info, 0,
4710                sizeof(struct igb_rx_buffer) * ring->count);
4711
4712         /* initialize Rx descriptor 0 */
4713         rx_desc = IGB_RX_DESC(ring, 0);
4714         rx_desc->wb.upper.length = 0;
4715
4716         /* enable receive descriptor fetching */
4717         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4718         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4719 }
4720
4721 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4722                                   struct igb_ring *rx_ring)
4723 {
4724         /* set build_skb and buffer size flags */
4725         clear_ring_build_skb_enabled(rx_ring);
4726         clear_ring_uses_large_buffer(rx_ring);
4727
4728         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4729                 return;
4730
4731         set_ring_build_skb_enabled(rx_ring);
4732
4733 #if (PAGE_SIZE < 8192)
4734         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4735                 return;
4736
4737         set_ring_uses_large_buffer(rx_ring);
4738 #endif
4739 }
4740
4741 /**
4742  *  igb_configure_rx - Configure receive Unit after Reset
4743  *  @adapter: board private structure
4744  *
4745  *  Configure the Rx unit of the MAC after a reset.
4746  **/
4747 static void igb_configure_rx(struct igb_adapter *adapter)
4748 {
4749         int i;
4750
4751         /* set the correct pool for the PF default MAC address in entry 0 */
4752         igb_set_default_mac_filter(adapter);
4753
4754         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4755          * the Base and Length of the Rx Descriptor Ring
4756          */
4757         for (i = 0; i < adapter->num_rx_queues; i++) {
4758                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4759
4760                 igb_set_rx_buffer_len(adapter, rx_ring);
4761                 igb_configure_rx_ring(adapter, rx_ring);
4762         }
4763 }
4764
4765 /**
4766  *  igb_free_tx_resources - Free Tx Resources per Queue
4767  *  @tx_ring: Tx descriptor ring for a specific queue
4768  *
4769  *  Free all transmit software resources
4770  **/
4771 void igb_free_tx_resources(struct igb_ring *tx_ring)
4772 {
4773         igb_clean_tx_ring(tx_ring);
4774
4775         vfree(tx_ring->tx_buffer_info);
4776         tx_ring->tx_buffer_info = NULL;
4777
4778         /* if not set, then don't free */
4779         if (!tx_ring->desc)
4780                 return;
4781
4782         dma_free_coherent(tx_ring->dev, tx_ring->size,
4783                           tx_ring->desc, tx_ring->dma);
4784
4785         tx_ring->desc = NULL;
4786 }
4787
4788 /**
4789  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4790  *  @adapter: board private structure
4791  *
4792  *  Free all transmit software resources
4793  **/
4794 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4795 {
4796         int i;
4797
4798         for (i = 0; i < adapter->num_tx_queues; i++)
4799                 if (adapter->tx_ring[i])
4800                         igb_free_tx_resources(adapter->tx_ring[i]);
4801 }
4802
4803 /**
4804  *  igb_clean_tx_ring - Free Tx Buffers
4805  *  @tx_ring: ring to be cleaned
4806  **/
4807 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4808 {
4809         u16 i = tx_ring->next_to_clean;
4810         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4811
4812         while (i != tx_ring->next_to_use) {
4813                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4814
4815                 /* Free all the Tx ring sk_buffs */
4816                 dev_kfree_skb_any(tx_buffer->skb);
4817
4818                 /* unmap skb header data */
4819                 dma_unmap_single(tx_ring->dev,
4820                                  dma_unmap_addr(tx_buffer, dma),
4821                                  dma_unmap_len(tx_buffer, len),
4822                                  DMA_TO_DEVICE);
4823
4824                 /* check for eop_desc to determine the end of the packet */
4825                 eop_desc = tx_buffer->next_to_watch;
4826                 tx_desc = IGB_TX_DESC(tx_ring, i);
4827
4828                 /* unmap remaining buffers */
4829                 while (tx_desc != eop_desc) {
4830                         tx_buffer++;
4831                         tx_desc++;
4832                         i++;
4833                         if (unlikely(i == tx_ring->count)) {
4834                                 i = 0;
4835                                 tx_buffer = tx_ring->tx_buffer_info;
4836                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4837                         }
4838
4839                         /* unmap any remaining paged data */
4840                         if (dma_unmap_len(tx_buffer, len))
4841                                 dma_unmap_page(tx_ring->dev,
4842                                                dma_unmap_addr(tx_buffer, dma),
4843                                                dma_unmap_len(tx_buffer, len),
4844                                                DMA_TO_DEVICE);
4845                 }
4846
4847                 tx_buffer->next_to_watch = NULL;
4848
4849                 /* move us one more past the eop_desc for start of next pkt */
4850                 tx_buffer++;
4851                 i++;
4852                 if (unlikely(i == tx_ring->count)) {
4853                         i = 0;
4854                         tx_buffer = tx_ring->tx_buffer_info;
4855                 }
4856         }
4857
4858         /* reset BQL for queue */
4859         netdev_tx_reset_queue(txring_txq(tx_ring));
4860
4861         /* reset next_to_use and next_to_clean */
4862         tx_ring->next_to_use = 0;
4863         tx_ring->next_to_clean = 0;
4864 }
4865
4866 /**
4867  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4868  *  @adapter: board private structure
4869  **/
4870 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4871 {
4872         int i;
4873
4874         for (i = 0; i < adapter->num_tx_queues; i++)
4875                 if (adapter->tx_ring[i])
4876                         igb_clean_tx_ring(adapter->tx_ring[i]);
4877 }
4878
4879 /**
4880  *  igb_free_rx_resources - Free Rx Resources
4881  *  @rx_ring: ring to clean the resources from
4882  *
4883  *  Free all receive software resources
4884  **/
4885 void igb_free_rx_resources(struct igb_ring *rx_ring)
4886 {
4887         igb_clean_rx_ring(rx_ring);
4888
4889         rx_ring->xdp_prog = NULL;
4890         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4891         vfree(rx_ring->rx_buffer_info);
4892         rx_ring->rx_buffer_info = NULL;
4893
4894         /* if not set, then don't free */
4895         if (!rx_ring->desc)
4896                 return;
4897
4898         dma_free_coherent(rx_ring->dev, rx_ring->size,
4899                           rx_ring->desc, rx_ring->dma);
4900
4901         rx_ring->desc = NULL;
4902 }
4903
4904 /**
4905  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4906  *  @adapter: board private structure
4907  *
4908  *  Free all receive software resources
4909  **/
4910 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4911 {
4912         int i;
4913
4914         for (i = 0; i < adapter->num_rx_queues; i++)
4915                 if (adapter->rx_ring[i])
4916                         igb_free_rx_resources(adapter->rx_ring[i]);
4917 }
4918
4919 /**
4920  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4921  *  @rx_ring: ring to free buffers from
4922  **/
4923 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4924 {
4925         u16 i = rx_ring->next_to_clean;
4926
4927         dev_kfree_skb(rx_ring->skb);
4928         rx_ring->skb = NULL;
4929
4930         /* Free all the Rx ring sk_buffs */
4931         while (i != rx_ring->next_to_alloc) {
4932                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4933
4934                 /* Invalidate cache lines that may have been written to by
4935                  * device so that we avoid corrupting memory.
4936                  */
4937                 dma_sync_single_range_for_cpu(rx_ring->dev,
4938                                               buffer_info->dma,
4939                                               buffer_info->page_offset,
4940                                               igb_rx_bufsz(rx_ring),
4941                                               DMA_FROM_DEVICE);
4942
4943                 /* free resources associated with mapping */
4944                 dma_unmap_page_attrs(rx_ring->dev,
4945                                      buffer_info->dma,
4946                                      igb_rx_pg_size(rx_ring),
4947                                      DMA_FROM_DEVICE,
4948                                      IGB_RX_DMA_ATTR);
4949                 __page_frag_cache_drain(buffer_info->page,
4950                                         buffer_info->pagecnt_bias);
4951
4952                 i++;
4953                 if (i == rx_ring->count)
4954                         i = 0;
4955         }
4956
4957         rx_ring->next_to_alloc = 0;
4958         rx_ring->next_to_clean = 0;
4959         rx_ring->next_to_use = 0;
4960 }
4961
4962 /**
4963  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4964  *  @adapter: board private structure
4965  **/
4966 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4967 {
4968         int i;
4969
4970         for (i = 0; i < adapter->num_rx_queues; i++)
4971                 if (adapter->rx_ring[i])
4972                         igb_clean_rx_ring(adapter->rx_ring[i]);
4973 }
4974
4975 /**
4976  *  igb_set_mac - Change the Ethernet Address of the NIC
4977  *  @netdev: network interface device structure
4978  *  @p: pointer to an address structure
4979  *
4980  *  Returns 0 on success, negative on failure
4981  **/
4982 static int igb_set_mac(struct net_device *netdev, void *p)
4983 {
4984         struct igb_adapter *adapter = netdev_priv(netdev);
4985         struct e1000_hw *hw = &adapter->hw;
4986         struct sockaddr *addr = p;
4987
4988         if (!is_valid_ether_addr(addr->sa_data))
4989                 return -EADDRNOTAVAIL;
4990
4991         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4992         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4993
4994         /* set the correct pool for the new PF MAC address in entry 0 */
4995         igb_set_default_mac_filter(adapter);
4996
4997         return 0;
4998 }
4999
5000 /**
5001  *  igb_write_mc_addr_list - write multicast addresses to MTA
5002  *  @netdev: network interface device structure
5003  *
5004  *  Writes multicast address list to the MTA hash table.
5005  *  Returns: -ENOMEM on failure
5006  *           0 on no addresses written
5007  *           X on writing X addresses to MTA
5008  **/
5009 static int igb_write_mc_addr_list(struct net_device *netdev)
5010 {
5011         struct igb_adapter *adapter = netdev_priv(netdev);
5012         struct e1000_hw *hw = &adapter->hw;
5013         struct netdev_hw_addr *ha;
5014         u8  *mta_list;
5015         int i;
5016
5017         if (netdev_mc_empty(netdev)) {
5018                 /* nothing to program, so clear mc list */
5019                 igb_update_mc_addr_list(hw, NULL, 0);
5020                 igb_restore_vf_multicasts(adapter);
5021                 return 0;
5022         }
5023
5024         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
5025         if (!mta_list)
5026                 return -ENOMEM;
5027
5028         /* The shared function expects a packed array of only addresses. */
5029         i = 0;
5030         netdev_for_each_mc_addr(ha, netdev)
5031                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
5032
5033         igb_update_mc_addr_list(hw, mta_list, i);
5034         kfree(mta_list);
5035
5036         return netdev_mc_count(netdev);
5037 }
5038
5039 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
5040 {
5041         struct e1000_hw *hw = &adapter->hw;
5042         u32 i, pf_id;
5043
5044         switch (hw->mac.type) {
5045         case e1000_i210:
5046         case e1000_i211:
5047         case e1000_i350:
5048                 /* VLAN filtering needed for VLAN prio filter */
5049                 if (adapter->netdev->features & NETIF_F_NTUPLE)
5050                         break;
5051                 fallthrough;
5052         case e1000_82576:
5053         case e1000_82580:
5054         case e1000_i354:
5055                 /* VLAN filtering needed for pool filtering */
5056                 if (adapter->vfs_allocated_count)
5057                         break;
5058                 fallthrough;
5059         default:
5060                 return 1;
5061         }
5062
5063         /* We are already in VLAN promisc, nothing to do */
5064         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
5065                 return 0;
5066
5067         if (!adapter->vfs_allocated_count)
5068                 goto set_vfta;
5069
5070         /* Add PF to all active pools */
5071         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5072
5073         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5074                 u32 vlvf = rd32(E1000_VLVF(i));
5075
5076                 vlvf |= BIT(pf_id);
5077                 wr32(E1000_VLVF(i), vlvf);
5078         }
5079
5080 set_vfta:
5081         /* Set all bits in the VLAN filter table array */
5082         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
5083                 hw->mac.ops.write_vfta(hw, i, ~0U);
5084
5085         /* Set flag so we don't redo unnecessary work */
5086         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
5087
5088         return 0;
5089 }
5090
5091 #define VFTA_BLOCK_SIZE 8
5092 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
5093 {
5094         struct e1000_hw *hw = &adapter->hw;
5095         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
5096         u32 vid_start = vfta_offset * 32;
5097         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
5098         u32 i, vid, word, bits, pf_id;
5099
5100         /* guarantee that we don't scrub out management VLAN */
5101         vid = adapter->mng_vlan_id;
5102         if (vid >= vid_start && vid < vid_end)
5103                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5104
5105         if (!adapter->vfs_allocated_count)
5106                 goto set_vfta;
5107
5108         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5109
5110         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5111                 u32 vlvf = rd32(E1000_VLVF(i));
5112
5113                 /* pull VLAN ID from VLVF */
5114                 vid = vlvf & VLAN_VID_MASK;
5115
5116                 /* only concern ourselves with a certain range */
5117                 if (vid < vid_start || vid >= vid_end)
5118                         continue;
5119
5120                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
5121                         /* record VLAN ID in VFTA */
5122                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5123
5124                         /* if PF is part of this then continue */
5125                         if (test_bit(vid, adapter->active_vlans))
5126                                 continue;
5127                 }
5128
5129                 /* remove PF from the pool */
5130                 bits = ~BIT(pf_id);
5131                 bits &= rd32(E1000_VLVF(i));
5132                 wr32(E1000_VLVF(i), bits);
5133         }
5134
5135 set_vfta:
5136         /* extract values from active_vlans and write back to VFTA */
5137         for (i = VFTA_BLOCK_SIZE; i--;) {
5138                 vid = (vfta_offset + i) * 32;
5139                 word = vid / BITS_PER_LONG;
5140                 bits = vid % BITS_PER_LONG;
5141
5142                 vfta[i] |= adapter->active_vlans[word] >> bits;
5143
5144                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
5145         }
5146 }
5147
5148 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
5149 {
5150         u32 i;
5151
5152         /* We are not in VLAN promisc, nothing to do */
5153         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
5154                 return;
5155
5156         /* Set flag so we don't redo unnecessary work */
5157         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
5158
5159         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
5160                 igb_scrub_vfta(adapter, i);
5161 }
5162
5163 /**
5164  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
5165  *  @netdev: network interface device structure
5166  *
5167  *  The set_rx_mode entry point is called whenever the unicast or multicast
5168  *  address lists or the network interface flags are updated.  This routine is
5169  *  responsible for configuring the hardware for proper unicast, multicast,
5170  *  promiscuous mode, and all-multi behavior.
5171  **/
5172 static void igb_set_rx_mode(struct net_device *netdev)
5173 {
5174         struct igb_adapter *adapter = netdev_priv(netdev);
5175         struct e1000_hw *hw = &adapter->hw;
5176         unsigned int vfn = adapter->vfs_allocated_count;
5177         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5178         int count;
5179
5180         /* Check for Promiscuous and All Multicast modes */
5181         if (netdev->flags & IFF_PROMISC) {
5182                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5183                 vmolr |= E1000_VMOLR_MPME;
5184
5185                 /* enable use of UTA filter to force packets to default pool */
5186                 if (hw->mac.type == e1000_82576)
5187                         vmolr |= E1000_VMOLR_ROPE;
5188         } else {
5189                 if (netdev->flags & IFF_ALLMULTI) {
5190                         rctl |= E1000_RCTL_MPE;
5191                         vmolr |= E1000_VMOLR_MPME;
5192                 } else {
5193                         /* Write addresses to the MTA, if the attempt fails
5194                          * then we should just turn on promiscuous mode so
5195                          * that we can at least receive multicast traffic
5196                          */
5197                         count = igb_write_mc_addr_list(netdev);
5198                         if (count < 0) {
5199                                 rctl |= E1000_RCTL_MPE;
5200                                 vmolr |= E1000_VMOLR_MPME;
5201                         } else if (count) {
5202                                 vmolr |= E1000_VMOLR_ROMPE;
5203                         }
5204                 }
5205         }
5206
5207         /* Write addresses to available RAR registers, if there is not
5208          * sufficient space to store all the addresses then enable
5209          * unicast promiscuous mode
5210          */
5211         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5212                 rctl |= E1000_RCTL_UPE;
5213                 vmolr |= E1000_VMOLR_ROPE;
5214         }
5215
5216         /* enable VLAN filtering by default */
5217         rctl |= E1000_RCTL_VFE;
5218
5219         /* disable VLAN filtering for modes that require it */
5220         if ((netdev->flags & IFF_PROMISC) ||
5221             (netdev->features & NETIF_F_RXALL)) {
5222                 /* if we fail to set all rules then just clear VFE */
5223                 if (igb_vlan_promisc_enable(adapter))
5224                         rctl &= ~E1000_RCTL_VFE;
5225         } else {
5226                 igb_vlan_promisc_disable(adapter);
5227         }
5228
5229         /* update state of unicast, multicast, and VLAN filtering modes */
5230         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5231                                      E1000_RCTL_VFE);
5232         wr32(E1000_RCTL, rctl);
5233
5234 #if (PAGE_SIZE < 8192)
5235         if (!adapter->vfs_allocated_count) {
5236                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5237                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5238         }
5239 #endif
5240         wr32(E1000_RLPML, rlpml);
5241
5242         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5243          * the VMOLR to enable the appropriate modes.  Without this workaround
5244          * we will have issues with VLAN tag stripping not being done for frames
5245          * that are only arriving because we are the default pool
5246          */
5247         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5248                 return;
5249
5250         /* set UTA to appropriate mode */
5251         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5252
5253         vmolr |= rd32(E1000_VMOLR(vfn)) &
5254                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5255
5256         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5257         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5258 #if (PAGE_SIZE < 8192)
5259         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5260                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5261         else
5262 #endif
5263                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5264         vmolr |= E1000_VMOLR_LPE;
5265
5266         wr32(E1000_VMOLR(vfn), vmolr);
5267
5268         igb_restore_vf_multicasts(adapter);
5269 }
5270
5271 static void igb_check_wvbr(struct igb_adapter *adapter)
5272 {
5273         struct e1000_hw *hw = &adapter->hw;
5274         u32 wvbr = 0;
5275
5276         switch (hw->mac.type) {
5277         case e1000_82576:
5278         case e1000_i350:
5279                 wvbr = rd32(E1000_WVBR);
5280                 if (!wvbr)
5281                         return;
5282                 break;
5283         default:
5284                 break;
5285         }
5286
5287         adapter->wvbr |= wvbr;
5288 }
5289
5290 #define IGB_STAGGERED_QUEUE_OFFSET 8
5291
5292 static void igb_spoof_check(struct igb_adapter *adapter)
5293 {
5294         int j;
5295
5296         if (!adapter->wvbr)
5297                 return;
5298
5299         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5300                 if (adapter->wvbr & BIT(j) ||
5301                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5302                         dev_warn(&adapter->pdev->dev,
5303                                 "Spoof event(s) detected on VF %d\n", j);
5304                         adapter->wvbr &=
5305                                 ~(BIT(j) |
5306                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5307                 }
5308         }
5309 }
5310
5311 /* Need to wait a few seconds after link up to get diagnostic information from
5312  * the phy
5313  */
5314 static void igb_update_phy_info(struct timer_list *t)
5315 {
5316         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5317         igb_get_phy_info(&adapter->hw);
5318 }
5319
5320 /**
5321  *  igb_has_link - check shared code for link and determine up/down
5322  *  @adapter: pointer to driver private info
5323  **/
5324 bool igb_has_link(struct igb_adapter *adapter)
5325 {
5326         struct e1000_hw *hw = &adapter->hw;
5327         bool link_active = false;
5328
5329         /* get_link_status is set on LSC (link status) interrupt or
5330          * rx sequence error interrupt.  get_link_status will stay
5331          * false until the e1000_check_for_link establishes link
5332          * for copper adapters ONLY
5333          */
5334         switch (hw->phy.media_type) {
5335         case e1000_media_type_copper:
5336                 if (!hw->mac.get_link_status)
5337                         return true;
5338                 fallthrough;
5339         case e1000_media_type_internal_serdes:
5340                 hw->mac.ops.check_for_link(hw);
5341                 link_active = !hw->mac.get_link_status;
5342                 break;
5343         default:
5344         case e1000_media_type_unknown:
5345                 break;
5346         }
5347
5348         if (((hw->mac.type == e1000_i210) ||
5349              (hw->mac.type == e1000_i211)) &&
5350              (hw->phy.id == I210_I_PHY_ID)) {
5351                 if (!netif_carrier_ok(adapter->netdev)) {
5352                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5353                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5354                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5355                         adapter->link_check_timeout = jiffies;
5356                 }
5357         }
5358
5359         return link_active;
5360 }
5361
5362 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5363 {
5364         bool ret = false;
5365         u32 ctrl_ext, thstat;
5366
5367         /* check for thermal sensor event on i350 copper only */
5368         if (hw->mac.type == e1000_i350) {
5369                 thstat = rd32(E1000_THSTAT);
5370                 ctrl_ext = rd32(E1000_CTRL_EXT);
5371
5372                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5373                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5374                         ret = !!(thstat & event);
5375         }
5376
5377         return ret;
5378 }
5379
5380 /**
5381  *  igb_check_lvmmc - check for malformed packets received
5382  *  and indicated in LVMMC register
5383  *  @adapter: pointer to adapter
5384  **/
5385 static void igb_check_lvmmc(struct igb_adapter *adapter)
5386 {
5387         struct e1000_hw *hw = &adapter->hw;
5388         u32 lvmmc;
5389
5390         lvmmc = rd32(E1000_LVMMC);
5391         if (lvmmc) {
5392                 if (unlikely(net_ratelimit())) {
5393                         netdev_warn(adapter->netdev,
5394                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5395                                     lvmmc);
5396                 }
5397         }
5398 }
5399
5400 /**
5401  *  igb_watchdog - Timer Call-back
5402  *  @t: pointer to timer_list containing our private info pointer
5403  **/
5404 static void igb_watchdog(struct timer_list *t)
5405 {
5406         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5407         /* Do the rest outside of interrupt context */
5408         schedule_work(&adapter->watchdog_task);
5409 }
5410
5411 static void igb_watchdog_task(struct work_struct *work)
5412 {
5413         struct igb_adapter *adapter = container_of(work,
5414                                                    struct igb_adapter,
5415                                                    watchdog_task);
5416         struct e1000_hw *hw = &adapter->hw;
5417         struct e1000_phy_info *phy = &hw->phy;
5418         struct net_device *netdev = adapter->netdev;
5419         u32 link;
5420         int i;
5421         u32 connsw;
5422         u16 phy_data, retry_count = 20;
5423
5424         link = igb_has_link(adapter);
5425
5426         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5427                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5428                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5429                 else
5430                         link = false;
5431         }
5432
5433         /* Force link down if we have fiber to swap to */
5434         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5435                 if (hw->phy.media_type == e1000_media_type_copper) {
5436                         connsw = rd32(E1000_CONNSW);
5437                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5438                                 link = 0;
5439                 }
5440         }
5441         if (link) {
5442                 /* Perform a reset if the media type changed. */
5443                 if (hw->dev_spec._82575.media_changed) {
5444                         hw->dev_spec._82575.media_changed = false;
5445                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5446                         igb_reset(adapter);
5447                 }
5448                 /* Cancel scheduled suspend requests. */
5449                 pm_runtime_resume(netdev->dev.parent);
5450
5451                 if (!netif_carrier_ok(netdev)) {
5452                         u32 ctrl;
5453
5454                         hw->mac.ops.get_speed_and_duplex(hw,
5455                                                          &adapter->link_speed,
5456                                                          &adapter->link_duplex);
5457
5458                         ctrl = rd32(E1000_CTRL);
5459                         /* Links status message must follow this format */
5460                         netdev_info(netdev,
5461                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5462                                netdev->name,
5463                                adapter->link_speed,
5464                                adapter->link_duplex == FULL_DUPLEX ?
5465                                "Full" : "Half",
5466                                (ctrl & E1000_CTRL_TFCE) &&
5467                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5468                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5469                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5470
5471                         /* disable EEE if enabled */
5472                         if ((adapter->flags & IGB_FLAG_EEE) &&
5473                                 (adapter->link_duplex == HALF_DUPLEX)) {
5474                                 dev_info(&adapter->pdev->dev,
5475                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5476                                 adapter->hw.dev_spec._82575.eee_disable = true;
5477                                 adapter->flags &= ~IGB_FLAG_EEE;
5478                         }
5479
5480                         /* check if SmartSpeed worked */
5481                         igb_check_downshift(hw);
5482                         if (phy->speed_downgraded)
5483                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5484
5485                         /* check for thermal sensor event */
5486                         if (igb_thermal_sensor_event(hw,
5487                             E1000_THSTAT_LINK_THROTTLE))
5488                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5489
5490                         /* adjust timeout factor according to speed/duplex */
5491                         adapter->tx_timeout_factor = 1;
5492                         switch (adapter->link_speed) {
5493                         case SPEED_10:
5494                                 adapter->tx_timeout_factor = 14;
5495                                 break;
5496                         case SPEED_100:
5497                                 /* maybe add some timeout factor ? */
5498                                 break;
5499                         }
5500
5501                         if (adapter->link_speed != SPEED_1000)
5502                                 goto no_wait;
5503
5504                         /* wait for Remote receiver status OK */
5505 retry_read_status:
5506                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5507                                               &phy_data)) {
5508                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5509                                     retry_count) {
5510                                         msleep(100);
5511                                         retry_count--;
5512                                         goto retry_read_status;
5513                                 } else if (!retry_count) {
5514                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5515                                 }
5516                         } else {
5517                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5518                         }
5519 no_wait:
5520                         netif_carrier_on(netdev);
5521
5522                         igb_ping_all_vfs(adapter);
5523                         igb_check_vf_rate_limit(adapter);
5524
5525                         /* link state has changed, schedule phy info update */
5526                         if (!test_bit(__IGB_DOWN, &adapter->state))
5527                                 mod_timer(&adapter->phy_info_timer,
5528                                           round_jiffies(jiffies + 2 * HZ));
5529                 }
5530         } else {
5531                 if (netif_carrier_ok(netdev)) {
5532                         adapter->link_speed = 0;
5533                         adapter->link_duplex = 0;
5534
5535                         /* check for thermal sensor event */
5536                         if (igb_thermal_sensor_event(hw,
5537                             E1000_THSTAT_PWR_DOWN)) {
5538                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5539                         }
5540
5541                         /* Links status message must follow this format */
5542                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5543                                netdev->name);
5544                         netif_carrier_off(netdev);
5545
5546                         igb_ping_all_vfs(adapter);
5547
5548                         /* link state has changed, schedule phy info update */
5549                         if (!test_bit(__IGB_DOWN, &adapter->state))
5550                                 mod_timer(&adapter->phy_info_timer,
5551                                           round_jiffies(jiffies + 2 * HZ));
5552
5553                         /* link is down, time to check for alternate media */
5554                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5555                                 igb_check_swap_media(adapter);
5556                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5557                                         schedule_work(&adapter->reset_task);
5558                                         /* return immediately */
5559                                         return;
5560                                 }
5561                         }
5562                         pm_schedule_suspend(netdev->dev.parent,
5563                                             MSEC_PER_SEC * 5);
5564
5565                 /* also check for alternate media here */
5566                 } else if (!netif_carrier_ok(netdev) &&
5567                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5568                         igb_check_swap_media(adapter);
5569                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5570                                 schedule_work(&adapter->reset_task);
5571                                 /* return immediately */
5572                                 return;
5573                         }
5574                 }
5575         }
5576
5577         spin_lock(&adapter->stats64_lock);
5578         igb_update_stats(adapter);
5579         spin_unlock(&adapter->stats64_lock);
5580
5581         for (i = 0; i < adapter->num_tx_queues; i++) {
5582                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5583                 if (!netif_carrier_ok(netdev)) {
5584                         /* We've lost link, so the controller stops DMA,
5585                          * but we've got queued Tx work that's never going
5586                          * to get done, so reset controller to flush Tx.
5587                          * (Do the reset outside of interrupt context).
5588                          */
5589                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5590                                 adapter->tx_timeout_count++;
5591                                 schedule_work(&adapter->reset_task);
5592                                 /* return immediately since reset is imminent */
5593                                 return;
5594                         }
5595                 }
5596
5597                 /* Force detection of hung controller every watchdog period */
5598                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5599         }
5600
5601         /* Cause software interrupt to ensure Rx ring is cleaned */
5602         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5603                 u32 eics = 0;
5604
5605                 for (i = 0; i < adapter->num_q_vectors; i++)
5606                         eics |= adapter->q_vector[i]->eims_value;
5607                 wr32(E1000_EICS, eics);
5608         } else {
5609                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5610         }
5611
5612         igb_spoof_check(adapter);
5613         igb_ptp_rx_hang(adapter);
5614         igb_ptp_tx_hang(adapter);
5615
5616         /* Check LVMMC register on i350/i354 only */
5617         if ((adapter->hw.mac.type == e1000_i350) ||
5618             (adapter->hw.mac.type == e1000_i354))
5619                 igb_check_lvmmc(adapter);
5620
5621         /* Reset the timer */
5622         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5623                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5624                         mod_timer(&adapter->watchdog_timer,
5625                                   round_jiffies(jiffies +  HZ));
5626                 else
5627                         mod_timer(&adapter->watchdog_timer,
5628                                   round_jiffies(jiffies + 2 * HZ));
5629         }
5630 }
5631
5632 enum latency_range {
5633         lowest_latency = 0,
5634         low_latency = 1,
5635         bulk_latency = 2,
5636         latency_invalid = 255
5637 };
5638
5639 /**
5640  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5641  *  @q_vector: pointer to q_vector
5642  *
5643  *  Stores a new ITR value based on strictly on packet size.  This
5644  *  algorithm is less sophisticated than that used in igb_update_itr,
5645  *  due to the difficulty of synchronizing statistics across multiple
5646  *  receive rings.  The divisors and thresholds used by this function
5647  *  were determined based on theoretical maximum wire speed and testing
5648  *  data, in order to minimize response time while increasing bulk
5649  *  throughput.
5650  *  This functionality is controlled by ethtool's coalescing settings.
5651  *  NOTE:  This function is called only when operating in a multiqueue
5652  *         receive environment.
5653  **/
5654 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5655 {
5656         int new_val = q_vector->itr_val;
5657         int avg_wire_size = 0;
5658         struct igb_adapter *adapter = q_vector->adapter;
5659         unsigned int packets;
5660
5661         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5662          * ints/sec - ITR timer value of 120 ticks.
5663          */
5664         if (adapter->link_speed != SPEED_1000) {
5665                 new_val = IGB_4K_ITR;
5666                 goto set_itr_val;
5667         }
5668
5669         packets = q_vector->rx.total_packets;
5670         if (packets)
5671                 avg_wire_size = q_vector->rx.total_bytes / packets;
5672
5673         packets = q_vector->tx.total_packets;
5674         if (packets)
5675                 avg_wire_size = max_t(u32, avg_wire_size,
5676                                       q_vector->tx.total_bytes / packets);
5677
5678         /* if avg_wire_size isn't set no work was done */
5679         if (!avg_wire_size)
5680                 goto clear_counts;
5681
5682         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5683         avg_wire_size += 24;
5684
5685         /* Don't starve jumbo frames */
5686         avg_wire_size = min(avg_wire_size, 3000);
5687
5688         /* Give a little boost to mid-size frames */
5689         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5690                 new_val = avg_wire_size / 3;
5691         else
5692                 new_val = avg_wire_size / 2;
5693
5694         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5695         if (new_val < IGB_20K_ITR &&
5696             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5697              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5698                 new_val = IGB_20K_ITR;
5699
5700 set_itr_val:
5701         if (new_val != q_vector->itr_val) {
5702                 q_vector->itr_val = new_val;
5703                 q_vector->set_itr = 1;
5704         }
5705 clear_counts:
5706         q_vector->rx.total_bytes = 0;
5707         q_vector->rx.total_packets = 0;
5708         q_vector->tx.total_bytes = 0;
5709         q_vector->tx.total_packets = 0;
5710 }
5711
5712 /**
5713  *  igb_update_itr - update the dynamic ITR value based on statistics
5714  *  @q_vector: pointer to q_vector
5715  *  @ring_container: ring info to update the itr for
5716  *
5717  *  Stores a new ITR value based on packets and byte
5718  *  counts during the last interrupt.  The advantage of per interrupt
5719  *  computation is faster updates and more accurate ITR for the current
5720  *  traffic pattern.  Constants in this function were computed
5721  *  based on theoretical maximum wire speed and thresholds were set based
5722  *  on testing data as well as attempting to minimize response time
5723  *  while increasing bulk throughput.
5724  *  This functionality is controlled by ethtool's coalescing settings.
5725  *  NOTE:  These calculations are only valid when operating in a single-
5726  *         queue environment.
5727  **/
5728 static void igb_update_itr(struct igb_q_vector *q_vector,
5729                            struct igb_ring_container *ring_container)
5730 {
5731         unsigned int packets = ring_container->total_packets;
5732         unsigned int bytes = ring_container->total_bytes;
5733         u8 itrval = ring_container->itr;
5734
5735         /* no packets, exit with status unchanged */
5736         if (packets == 0)
5737                 return;
5738
5739         switch (itrval) {
5740         case lowest_latency:
5741                 /* handle TSO and jumbo frames */
5742                 if (bytes/packets > 8000)
5743                         itrval = bulk_latency;
5744                 else if ((packets < 5) && (bytes > 512))
5745                         itrval = low_latency;
5746                 break;
5747         case low_latency:  /* 50 usec aka 20000 ints/s */
5748                 if (bytes > 10000) {
5749                         /* this if handles the TSO accounting */
5750                         if (bytes/packets > 8000)
5751                                 itrval = bulk_latency;
5752                         else if ((packets < 10) || ((bytes/packets) > 1200))
5753                                 itrval = bulk_latency;
5754                         else if ((packets > 35))
5755                                 itrval = lowest_latency;
5756                 } else if (bytes/packets > 2000) {
5757                         itrval = bulk_latency;
5758                 } else if (packets <= 2 && bytes < 512) {
5759                         itrval = lowest_latency;
5760                 }
5761                 break;
5762         case bulk_latency: /* 250 usec aka 4000 ints/s */
5763                 if (bytes > 25000) {
5764                         if (packets > 35)
5765                                 itrval = low_latency;
5766                 } else if (bytes < 1500) {
5767                         itrval = low_latency;
5768                 }
5769                 break;
5770         }
5771
5772         /* clear work counters since we have the values we need */
5773         ring_container->total_bytes = 0;
5774         ring_container->total_packets = 0;
5775
5776         /* write updated itr to ring container */
5777         ring_container->itr = itrval;
5778 }
5779
5780 static void igb_set_itr(struct igb_q_vector *q_vector)
5781 {
5782         struct igb_adapter *adapter = q_vector->adapter;
5783         u32 new_itr = q_vector->itr_val;
5784         u8 current_itr = 0;
5785
5786         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5787         if (adapter->link_speed != SPEED_1000) {
5788                 current_itr = 0;
5789                 new_itr = IGB_4K_ITR;
5790                 goto set_itr_now;
5791         }
5792
5793         igb_update_itr(q_vector, &q_vector->tx);
5794         igb_update_itr(q_vector, &q_vector->rx);
5795
5796         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5797
5798         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5799         if (current_itr == lowest_latency &&
5800             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5801              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5802                 current_itr = low_latency;
5803
5804         switch (current_itr) {
5805         /* counts and packets in update_itr are dependent on these numbers */
5806         case lowest_latency:
5807                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5808                 break;
5809         case low_latency:
5810                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5811                 break;
5812         case bulk_latency:
5813                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5814                 break;
5815         default:
5816                 break;
5817         }
5818
5819 set_itr_now:
5820         if (new_itr != q_vector->itr_val) {
5821                 /* this attempts to bias the interrupt rate towards Bulk
5822                  * by adding intermediate steps when interrupt rate is
5823                  * increasing
5824                  */
5825                 new_itr = new_itr > q_vector->itr_val ?
5826                           max((new_itr * q_vector->itr_val) /
5827                           (new_itr + (q_vector->itr_val >> 2)),
5828                           new_itr) : new_itr;
5829                 /* Don't write the value here; it resets the adapter's
5830                  * internal timer, and causes us to delay far longer than
5831                  * we should between interrupts.  Instead, we write the ITR
5832                  * value at the beginning of the next interrupt so the timing
5833                  * ends up being correct.
5834                  */
5835                 q_vector->itr_val = new_itr;
5836                 q_vector->set_itr = 1;
5837         }
5838 }
5839
5840 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5841                             struct igb_tx_buffer *first,
5842                             u32 vlan_macip_lens, u32 type_tucmd,
5843                             u32 mss_l4len_idx)
5844 {
5845         struct e1000_adv_tx_context_desc *context_desc;
5846         u16 i = tx_ring->next_to_use;
5847         struct timespec64 ts;
5848
5849         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5850
5851         i++;
5852         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5853
5854         /* set bits to identify this as an advanced context descriptor */
5855         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5856
5857         /* For 82575, context index must be unique per ring. */
5858         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5859                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5860
5861         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5862         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5863         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5864
5865         /* We assume there is always a valid tx time available. Invalid times
5866          * should have been handled by the upper layers.
5867          */
5868         if (tx_ring->launchtime_enable) {
5869                 ts = ktime_to_timespec64(first->skb->tstamp);
5870                 skb_txtime_consumed(first->skb);
5871                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5872         } else {
5873                 context_desc->seqnum_seed = 0;
5874         }
5875 }
5876
5877 static int igb_tso(struct igb_ring *tx_ring,
5878                    struct igb_tx_buffer *first,
5879                    u8 *hdr_len)
5880 {
5881         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5882         struct sk_buff *skb = first->skb;
5883         union {
5884                 struct iphdr *v4;
5885                 struct ipv6hdr *v6;
5886                 unsigned char *hdr;
5887         } ip;
5888         union {
5889                 struct tcphdr *tcp;
5890                 struct udphdr *udp;
5891                 unsigned char *hdr;
5892         } l4;
5893         u32 paylen, l4_offset;
5894         int err;
5895
5896         if (skb->ip_summed != CHECKSUM_PARTIAL)
5897                 return 0;
5898
5899         if (!skb_is_gso(skb))
5900                 return 0;
5901
5902         err = skb_cow_head(skb, 0);
5903         if (err < 0)
5904                 return err;
5905
5906         ip.hdr = skb_network_header(skb);
5907         l4.hdr = skb_checksum_start(skb);
5908
5909         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5910         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
5911                       E1000_ADVTXD_TUCMD_L4T_UDP : E1000_ADVTXD_TUCMD_L4T_TCP;
5912
5913         /* initialize outer IP header fields */
5914         if (ip.v4->version == 4) {
5915                 unsigned char *csum_start = skb_checksum_start(skb);
5916                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5917
5918                 /* IP header will have to cancel out any data that
5919                  * is not a part of the outer IP header
5920                  */
5921                 ip.v4->check = csum_fold(csum_partial(trans_start,
5922                                                       csum_start - trans_start,
5923                                                       0));
5924                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5925
5926                 ip.v4->tot_len = 0;
5927                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5928                                    IGB_TX_FLAGS_CSUM |
5929                                    IGB_TX_FLAGS_IPV4;
5930         } else {
5931                 ip.v6->payload_len = 0;
5932                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5933                                    IGB_TX_FLAGS_CSUM;
5934         }
5935
5936         /* determine offset of inner transport header */
5937         l4_offset = l4.hdr - skb->data;
5938
5939         /* remove payload length from inner checksum */
5940         paylen = skb->len - l4_offset;
5941         if (type_tucmd & E1000_ADVTXD_TUCMD_L4T_TCP) {
5942                 /* compute length of segmentation header */
5943                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5944                 csum_replace_by_diff(&l4.tcp->check,
5945                         (__force __wsum)htonl(paylen));
5946         } else {
5947                 /* compute length of segmentation header */
5948                 *hdr_len = sizeof(*l4.udp) + l4_offset;
5949                 csum_replace_by_diff(&l4.udp->check,
5950                                      (__force __wsum)htonl(paylen));
5951         }
5952
5953         /* update gso size and bytecount with header size */
5954         first->gso_segs = skb_shinfo(skb)->gso_segs;
5955         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5956
5957         /* MSS L4LEN IDX */
5958         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5959         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5960
5961         /* VLAN MACLEN IPLEN */
5962         vlan_macip_lens = l4.hdr - ip.hdr;
5963         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5964         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5965
5966         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
5967                         type_tucmd, mss_l4len_idx);
5968
5969         return 1;
5970 }
5971
5972 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5973 {
5974         struct sk_buff *skb = first->skb;
5975         u32 vlan_macip_lens = 0;
5976         u32 type_tucmd = 0;
5977
5978         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5979 csum_failed:
5980                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
5981                     !tx_ring->launchtime_enable)
5982                         return;
5983                 goto no_csum;
5984         }
5985
5986         switch (skb->csum_offset) {
5987         case offsetof(struct tcphdr, check):
5988                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5989                 fallthrough;
5990         case offsetof(struct udphdr, check):
5991                 break;
5992         case offsetof(struct sctphdr, checksum):
5993                 /* validate that this is actually an SCTP request */
5994                 if (skb_csum_is_sctp(skb)) {
5995                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5996                         break;
5997                 }
5998                 fallthrough;
5999         default:
6000                 skb_checksum_help(skb);
6001                 goto csum_failed;
6002         }
6003
6004         /* update TX checksum flag */
6005         first->tx_flags |= IGB_TX_FLAGS_CSUM;
6006         vlan_macip_lens = skb_checksum_start_offset(skb) -
6007                           skb_network_offset(skb);
6008 no_csum:
6009         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
6010         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6011
6012         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
6013 }
6014
6015 #define IGB_SET_FLAG(_input, _flag, _result) \
6016         ((_flag <= _result) ? \
6017          ((u32)(_input & _flag) * (_result / _flag)) : \
6018          ((u32)(_input & _flag) / (_flag / _result)))
6019
6020 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6021 {
6022         /* set type for advanced descriptor with frame checksum insertion */
6023         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
6024                        E1000_ADVTXD_DCMD_DEXT |
6025                        E1000_ADVTXD_DCMD_IFCS;
6026
6027         /* set HW vlan bit if vlan is present */
6028         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
6029                                  (E1000_ADVTXD_DCMD_VLE));
6030
6031         /* set segmentation bits for TSO */
6032         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
6033                                  (E1000_ADVTXD_DCMD_TSE));
6034
6035         /* set timestamp bit if present */
6036         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
6037                                  (E1000_ADVTXD_MAC_TSTAMP));
6038
6039         /* insert frame checksum */
6040         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
6041
6042         return cmd_type;
6043 }
6044
6045 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
6046                                  union e1000_adv_tx_desc *tx_desc,
6047                                  u32 tx_flags, unsigned int paylen)
6048 {
6049         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
6050
6051         /* 82575 requires a unique index per ring */
6052         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6053                 olinfo_status |= tx_ring->reg_idx << 4;
6054
6055         /* insert L4 checksum */
6056         olinfo_status |= IGB_SET_FLAG(tx_flags,
6057                                       IGB_TX_FLAGS_CSUM,
6058                                       (E1000_TXD_POPTS_TXSM << 8));
6059
6060         /* insert IPv4 checksum */
6061         olinfo_status |= IGB_SET_FLAG(tx_flags,
6062                                       IGB_TX_FLAGS_IPV4,
6063                                       (E1000_TXD_POPTS_IXSM << 8));
6064
6065         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6066 }
6067
6068 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6069 {
6070         struct net_device *netdev = tx_ring->netdev;
6071
6072         netif_stop_subqueue(netdev, tx_ring->queue_index);
6073
6074         /* Herbert's original patch had:
6075          *  smp_mb__after_netif_stop_queue();
6076          * but since that doesn't exist yet, just open code it.
6077          */
6078         smp_mb();
6079
6080         /* We need to check again in a case another CPU has just
6081          * made room available.
6082          */
6083         if (igb_desc_unused(tx_ring) < size)
6084                 return -EBUSY;
6085
6086         /* A reprieve! */
6087         netif_wake_subqueue(netdev, tx_ring->queue_index);
6088
6089         u64_stats_update_begin(&tx_ring->tx_syncp2);
6090         tx_ring->tx_stats.restart_queue2++;
6091         u64_stats_update_end(&tx_ring->tx_syncp2);
6092
6093         return 0;
6094 }
6095
6096 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6097 {
6098         if (igb_desc_unused(tx_ring) >= size)
6099                 return 0;
6100         return __igb_maybe_stop_tx(tx_ring, size);
6101 }
6102
6103 static int igb_tx_map(struct igb_ring *tx_ring,
6104                       struct igb_tx_buffer *first,
6105                       const u8 hdr_len)
6106 {
6107         struct sk_buff *skb = first->skb;
6108         struct igb_tx_buffer *tx_buffer;
6109         union e1000_adv_tx_desc *tx_desc;
6110         skb_frag_t *frag;
6111         dma_addr_t dma;
6112         unsigned int data_len, size;
6113         u32 tx_flags = first->tx_flags;
6114         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
6115         u16 i = tx_ring->next_to_use;
6116
6117         tx_desc = IGB_TX_DESC(tx_ring, i);
6118
6119         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
6120
6121         size = skb_headlen(skb);
6122         data_len = skb->data_len;
6123
6124         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6125
6126         tx_buffer = first;
6127
6128         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6129                 if (dma_mapping_error(tx_ring->dev, dma))
6130                         goto dma_error;
6131
6132                 /* record length, and DMA address */
6133                 dma_unmap_len_set(tx_buffer, len, size);
6134                 dma_unmap_addr_set(tx_buffer, dma, dma);
6135
6136                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6137
6138                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
6139                         tx_desc->read.cmd_type_len =
6140                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
6141
6142                         i++;
6143                         tx_desc++;
6144                         if (i == tx_ring->count) {
6145                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6146                                 i = 0;
6147                         }
6148                         tx_desc->read.olinfo_status = 0;
6149
6150                         dma += IGB_MAX_DATA_PER_TXD;
6151                         size -= IGB_MAX_DATA_PER_TXD;
6152
6153                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6154                 }
6155
6156                 if (likely(!data_len))
6157                         break;
6158
6159                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6160
6161                 i++;
6162                 tx_desc++;
6163                 if (i == tx_ring->count) {
6164                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6165                         i = 0;
6166                 }
6167                 tx_desc->read.olinfo_status = 0;
6168
6169                 size = skb_frag_size(frag);
6170                 data_len -= size;
6171
6172                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6173                                        size, DMA_TO_DEVICE);
6174
6175                 tx_buffer = &tx_ring->tx_buffer_info[i];
6176         }
6177
6178         /* write last descriptor with RS and EOP bits */
6179         cmd_type |= size | IGB_TXD_DCMD;
6180         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6181
6182         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6183
6184         /* set the timestamp */
6185         first->time_stamp = jiffies;
6186
6187         skb_tx_timestamp(skb);
6188
6189         /* Force memory writes to complete before letting h/w know there
6190          * are new descriptors to fetch.  (Only applicable for weak-ordered
6191          * memory model archs, such as IA-64).
6192          *
6193          * We also need this memory barrier to make certain all of the
6194          * status bits have been updated before next_to_watch is written.
6195          */
6196         dma_wmb();
6197
6198         /* set next_to_watch value indicating a packet is present */
6199         first->next_to_watch = tx_desc;
6200
6201         i++;
6202         if (i == tx_ring->count)
6203                 i = 0;
6204
6205         tx_ring->next_to_use = i;
6206
6207         /* Make sure there is space in the ring for the next send. */
6208         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6209
6210         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
6211                 writel(i, tx_ring->tail);
6212         }
6213         return 0;
6214
6215 dma_error:
6216         dev_err(tx_ring->dev, "TX DMA map failed\n");
6217         tx_buffer = &tx_ring->tx_buffer_info[i];
6218
6219         /* clear dma mappings for failed tx_buffer_info map */
6220         while (tx_buffer != first) {
6221                 if (dma_unmap_len(tx_buffer, len))
6222                         dma_unmap_page(tx_ring->dev,
6223                                        dma_unmap_addr(tx_buffer, dma),
6224                                        dma_unmap_len(tx_buffer, len),
6225                                        DMA_TO_DEVICE);
6226                 dma_unmap_len_set(tx_buffer, len, 0);
6227
6228                 if (i-- == 0)
6229                         i += tx_ring->count;
6230                 tx_buffer = &tx_ring->tx_buffer_info[i];
6231         }
6232
6233         if (dma_unmap_len(tx_buffer, len))
6234                 dma_unmap_single(tx_ring->dev,
6235                                  dma_unmap_addr(tx_buffer, dma),
6236                                  dma_unmap_len(tx_buffer, len),
6237                                  DMA_TO_DEVICE);
6238         dma_unmap_len_set(tx_buffer, len, 0);
6239
6240         dev_kfree_skb_any(tx_buffer->skb);
6241         tx_buffer->skb = NULL;
6242
6243         tx_ring->next_to_use = i;
6244
6245         return -1;
6246 }
6247
6248 int igb_xmit_xdp_ring(struct igb_adapter *adapter,
6249                       struct igb_ring *tx_ring,
6250                       struct xdp_frame *xdpf)
6251 {
6252         union e1000_adv_tx_desc *tx_desc;
6253         u32 len, cmd_type, olinfo_status;
6254         struct igb_tx_buffer *tx_buffer;
6255         dma_addr_t dma;
6256         u16 i;
6257
6258         len = xdpf->len;
6259
6260         if (unlikely(!igb_desc_unused(tx_ring)))
6261                 return IGB_XDP_CONSUMED;
6262
6263         dma = dma_map_single(tx_ring->dev, xdpf->data, len, DMA_TO_DEVICE);
6264         if (dma_mapping_error(tx_ring->dev, dma))
6265                 return IGB_XDP_CONSUMED;
6266
6267         /* record the location of the first descriptor for this packet */
6268         tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6269         tx_buffer->bytecount = len;
6270         tx_buffer->gso_segs = 1;
6271         tx_buffer->protocol = 0;
6272
6273         i = tx_ring->next_to_use;
6274         tx_desc = IGB_TX_DESC(tx_ring, i);
6275
6276         dma_unmap_len_set(tx_buffer, len, len);
6277         dma_unmap_addr_set(tx_buffer, dma, dma);
6278         tx_buffer->type = IGB_TYPE_XDP;
6279         tx_buffer->xdpf = xdpf;
6280
6281         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6282
6283         /* put descriptor type bits */
6284         cmd_type = E1000_ADVTXD_DTYP_DATA |
6285                    E1000_ADVTXD_DCMD_DEXT |
6286                    E1000_ADVTXD_DCMD_IFCS;
6287         cmd_type |= len | IGB_TXD_DCMD;
6288         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6289
6290         olinfo_status = len << E1000_ADVTXD_PAYLEN_SHIFT;
6291         /* 82575 requires a unique index per ring */
6292         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6293                 olinfo_status |= tx_ring->reg_idx << 4;
6294
6295         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6296
6297         netdev_tx_sent_queue(txring_txq(tx_ring), tx_buffer->bytecount);
6298
6299         /* set the timestamp */
6300         tx_buffer->time_stamp = jiffies;
6301
6302         /* Avoid any potential race with xdp_xmit and cleanup */
6303         smp_wmb();
6304
6305         /* set next_to_watch value indicating a packet is present */
6306         i++;
6307         if (i == tx_ring->count)
6308                 i = 0;
6309
6310         tx_buffer->next_to_watch = tx_desc;
6311         tx_ring->next_to_use = i;
6312
6313         /* Make sure there is space in the ring for the next send. */
6314         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6315
6316         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
6317                 writel(i, tx_ring->tail);
6318
6319         return IGB_XDP_TX;
6320 }
6321
6322 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6323                                 struct igb_ring *tx_ring)
6324 {
6325         struct igb_tx_buffer *first;
6326         int tso;
6327         u32 tx_flags = 0;
6328         unsigned short f;
6329         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6330         __be16 protocol = vlan_get_protocol(skb);
6331         u8 hdr_len = 0;
6332
6333         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6334          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6335          *       + 2 desc gap to keep tail from touching head,
6336          *       + 1 desc for context descriptor,
6337          * otherwise try next time
6338          */
6339         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6340                 count += TXD_USE_COUNT(skb_frag_size(
6341                                                 &skb_shinfo(skb)->frags[f]));
6342
6343         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6344                 /* this is a hard error */
6345                 return NETDEV_TX_BUSY;
6346         }
6347
6348         /* record the location of the first descriptor for this packet */
6349         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6350         first->type = IGB_TYPE_SKB;
6351         first->skb = skb;
6352         first->bytecount = skb->len;
6353         first->gso_segs = 1;
6354
6355         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6356                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6357
6358                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6359                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6360                                            &adapter->state)) {
6361                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6362                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6363
6364                         adapter->ptp_tx_skb = skb_get(skb);
6365                         adapter->ptp_tx_start = jiffies;
6366                         if (adapter->hw.mac.type == e1000_82576)
6367                                 schedule_work(&adapter->ptp_tx_work);
6368                 } else {
6369                         adapter->tx_hwtstamp_skipped++;
6370                 }
6371         }
6372
6373         if (skb_vlan_tag_present(skb)) {
6374                 tx_flags |= IGB_TX_FLAGS_VLAN;
6375                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6376         }
6377
6378         /* record initial flags and protocol */
6379         first->tx_flags = tx_flags;
6380         first->protocol = protocol;
6381
6382         tso = igb_tso(tx_ring, first, &hdr_len);
6383         if (tso < 0)
6384                 goto out_drop;
6385         else if (!tso)
6386                 igb_tx_csum(tx_ring, first);
6387
6388         if (igb_tx_map(tx_ring, first, hdr_len))
6389                 goto cleanup_tx_tstamp;
6390
6391         return NETDEV_TX_OK;
6392
6393 out_drop:
6394         dev_kfree_skb_any(first->skb);
6395         first->skb = NULL;
6396 cleanup_tx_tstamp:
6397         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6398                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6399
6400                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6401                 adapter->ptp_tx_skb = NULL;
6402                 if (adapter->hw.mac.type == e1000_82576)
6403                         cancel_work_sync(&adapter->ptp_tx_work);
6404                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6405         }
6406
6407         return NETDEV_TX_OK;
6408 }
6409
6410 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6411                                                     struct sk_buff *skb)
6412 {
6413         unsigned int r_idx = skb->queue_mapping;
6414
6415         if (r_idx >= adapter->num_tx_queues)
6416                 r_idx = r_idx % adapter->num_tx_queues;
6417
6418         return adapter->tx_ring[r_idx];
6419 }
6420
6421 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6422                                   struct net_device *netdev)
6423 {
6424         struct igb_adapter *adapter = netdev_priv(netdev);
6425
6426         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6427          * in order to meet this minimum size requirement.
6428          */
6429         if (skb_put_padto(skb, 17))
6430                 return NETDEV_TX_OK;
6431
6432         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6433 }
6434
6435 /**
6436  *  igb_tx_timeout - Respond to a Tx Hang
6437  *  @netdev: network interface device structure
6438  *  @txqueue: number of the Tx queue that hung (unused)
6439  **/
6440 static void igb_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6441 {
6442         struct igb_adapter *adapter = netdev_priv(netdev);
6443         struct e1000_hw *hw = &adapter->hw;
6444
6445         /* Do the reset outside of interrupt context */
6446         adapter->tx_timeout_count++;
6447
6448         if (hw->mac.type >= e1000_82580)
6449                 hw->dev_spec._82575.global_device_reset = true;
6450
6451         schedule_work(&adapter->reset_task);
6452         wr32(E1000_EICS,
6453              (adapter->eims_enable_mask & ~adapter->eims_other));
6454 }
6455
6456 static void igb_reset_task(struct work_struct *work)
6457 {
6458         struct igb_adapter *adapter;
6459         adapter = container_of(work, struct igb_adapter, reset_task);
6460
6461         rtnl_lock();
6462         /* If we're already down or resetting, just bail */
6463         if (test_bit(__IGB_DOWN, &adapter->state) ||
6464             test_bit(__IGB_RESETTING, &adapter->state)) {
6465                 rtnl_unlock();
6466                 return;
6467         }
6468
6469         igb_dump(adapter);
6470         netdev_err(adapter->netdev, "Reset adapter\n");
6471         igb_reinit_locked(adapter);
6472         rtnl_unlock();
6473 }
6474
6475 /**
6476  *  igb_get_stats64 - Get System Network Statistics
6477  *  @netdev: network interface device structure
6478  *  @stats: rtnl_link_stats64 pointer
6479  **/
6480 static void igb_get_stats64(struct net_device *netdev,
6481                             struct rtnl_link_stats64 *stats)
6482 {
6483         struct igb_adapter *adapter = netdev_priv(netdev);
6484
6485         spin_lock(&adapter->stats64_lock);
6486         igb_update_stats(adapter);
6487         memcpy(stats, &adapter->stats64, sizeof(*stats));
6488         spin_unlock(&adapter->stats64_lock);
6489 }
6490
6491 /**
6492  *  igb_change_mtu - Change the Maximum Transfer Unit
6493  *  @netdev: network interface device structure
6494  *  @new_mtu: new value for maximum frame size
6495  *
6496  *  Returns 0 on success, negative on failure
6497  **/
6498 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6499 {
6500         struct igb_adapter *adapter = netdev_priv(netdev);
6501         int max_frame = new_mtu + IGB_ETH_PKT_HDR_PAD;
6502
6503         if (adapter->xdp_prog) {
6504                 int i;
6505
6506                 for (i = 0; i < adapter->num_rx_queues; i++) {
6507                         struct igb_ring *ring = adapter->rx_ring[i];
6508
6509                         if (max_frame > igb_rx_bufsz(ring)) {
6510                                 netdev_warn(adapter->netdev,
6511                                             "Requested MTU size is not supported with XDP. Max frame size is %d\n",
6512                                             max_frame);
6513                                 return -EINVAL;
6514                         }
6515                 }
6516         }
6517
6518         /* adjust max frame to be at least the size of a standard frame */
6519         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6520                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6521
6522         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6523                 usleep_range(1000, 2000);
6524
6525         /* igb_down has a dependency on max_frame_size */
6526         adapter->max_frame_size = max_frame;
6527
6528         if (netif_running(netdev))
6529                 igb_down(adapter);
6530
6531         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6532                    netdev->mtu, new_mtu);
6533         netdev->mtu = new_mtu;
6534
6535         if (netif_running(netdev))
6536                 igb_up(adapter);
6537         else
6538                 igb_reset(adapter);
6539
6540         clear_bit(__IGB_RESETTING, &adapter->state);
6541
6542         return 0;
6543 }
6544
6545 /**
6546  *  igb_update_stats - Update the board statistics counters
6547  *  @adapter: board private structure
6548  **/
6549 void igb_update_stats(struct igb_adapter *adapter)
6550 {
6551         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6552         struct e1000_hw *hw = &adapter->hw;
6553         struct pci_dev *pdev = adapter->pdev;
6554         u32 reg, mpc;
6555         int i;
6556         u64 bytes, packets;
6557         unsigned int start;
6558         u64 _bytes, _packets;
6559
6560         /* Prevent stats update while adapter is being reset, or if the pci
6561          * connection is down.
6562          */
6563         if (adapter->link_speed == 0)
6564                 return;
6565         if (pci_channel_offline(pdev))
6566                 return;
6567
6568         bytes = 0;
6569         packets = 0;
6570
6571         rcu_read_lock();
6572         for (i = 0; i < adapter->num_rx_queues; i++) {
6573                 struct igb_ring *ring = adapter->rx_ring[i];
6574                 u32 rqdpc = rd32(E1000_RQDPC(i));
6575                 if (hw->mac.type >= e1000_i210)
6576                         wr32(E1000_RQDPC(i), 0);
6577
6578                 if (rqdpc) {
6579                         ring->rx_stats.drops += rqdpc;
6580                         net_stats->rx_fifo_errors += rqdpc;
6581                 }
6582
6583                 do {
6584                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
6585                         _bytes = ring->rx_stats.bytes;
6586                         _packets = ring->rx_stats.packets;
6587                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
6588                 bytes += _bytes;
6589                 packets += _packets;
6590         }
6591
6592         net_stats->rx_bytes = bytes;
6593         net_stats->rx_packets = packets;
6594
6595         bytes = 0;
6596         packets = 0;
6597         for (i = 0; i < adapter->num_tx_queues; i++) {
6598                 struct igb_ring *ring = adapter->tx_ring[i];
6599                 do {
6600                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
6601                         _bytes = ring->tx_stats.bytes;
6602                         _packets = ring->tx_stats.packets;
6603                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
6604                 bytes += _bytes;
6605                 packets += _packets;
6606         }
6607         net_stats->tx_bytes = bytes;
6608         net_stats->tx_packets = packets;
6609         rcu_read_unlock();
6610
6611         /* read stats registers */
6612         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6613         adapter->stats.gprc += rd32(E1000_GPRC);
6614         adapter->stats.gorc += rd32(E1000_GORCL);
6615         rd32(E1000_GORCH); /* clear GORCL */
6616         adapter->stats.bprc += rd32(E1000_BPRC);
6617         adapter->stats.mprc += rd32(E1000_MPRC);
6618         adapter->stats.roc += rd32(E1000_ROC);
6619
6620         adapter->stats.prc64 += rd32(E1000_PRC64);
6621         adapter->stats.prc127 += rd32(E1000_PRC127);
6622         adapter->stats.prc255 += rd32(E1000_PRC255);
6623         adapter->stats.prc511 += rd32(E1000_PRC511);
6624         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6625         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6626         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6627         adapter->stats.sec += rd32(E1000_SEC);
6628
6629         mpc = rd32(E1000_MPC);
6630         adapter->stats.mpc += mpc;
6631         net_stats->rx_fifo_errors += mpc;
6632         adapter->stats.scc += rd32(E1000_SCC);
6633         adapter->stats.ecol += rd32(E1000_ECOL);
6634         adapter->stats.mcc += rd32(E1000_MCC);
6635         adapter->stats.latecol += rd32(E1000_LATECOL);
6636         adapter->stats.dc += rd32(E1000_DC);
6637         adapter->stats.rlec += rd32(E1000_RLEC);
6638         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6639         adapter->stats.xontxc += rd32(E1000_XONTXC);
6640         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6641         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6642         adapter->stats.fcruc += rd32(E1000_FCRUC);
6643         adapter->stats.gptc += rd32(E1000_GPTC);
6644         adapter->stats.gotc += rd32(E1000_GOTCL);
6645         rd32(E1000_GOTCH); /* clear GOTCL */
6646         adapter->stats.rnbc += rd32(E1000_RNBC);
6647         adapter->stats.ruc += rd32(E1000_RUC);
6648         adapter->stats.rfc += rd32(E1000_RFC);
6649         adapter->stats.rjc += rd32(E1000_RJC);
6650         adapter->stats.tor += rd32(E1000_TORH);
6651         adapter->stats.tot += rd32(E1000_TOTH);
6652         adapter->stats.tpr += rd32(E1000_TPR);
6653
6654         adapter->stats.ptc64 += rd32(E1000_PTC64);
6655         adapter->stats.ptc127 += rd32(E1000_PTC127);
6656         adapter->stats.ptc255 += rd32(E1000_PTC255);
6657         adapter->stats.ptc511 += rd32(E1000_PTC511);
6658         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6659         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6660
6661         adapter->stats.mptc += rd32(E1000_MPTC);
6662         adapter->stats.bptc += rd32(E1000_BPTC);
6663
6664         adapter->stats.tpt += rd32(E1000_TPT);
6665         adapter->stats.colc += rd32(E1000_COLC);
6666
6667         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6668         /* read internal phy specific stats */
6669         reg = rd32(E1000_CTRL_EXT);
6670         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6671                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6672
6673                 /* this stat has invalid values on i210/i211 */
6674                 if ((hw->mac.type != e1000_i210) &&
6675                     (hw->mac.type != e1000_i211))
6676                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6677         }
6678
6679         adapter->stats.tsctc += rd32(E1000_TSCTC);
6680         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6681
6682         adapter->stats.iac += rd32(E1000_IAC);
6683         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6684         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6685         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6686         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6687         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6688         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6689         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6690         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6691
6692         /* Fill out the OS statistics structure */
6693         net_stats->multicast = adapter->stats.mprc;
6694         net_stats->collisions = adapter->stats.colc;
6695
6696         /* Rx Errors */
6697
6698         /* RLEC on some newer hardware can be incorrect so build
6699          * our own version based on RUC and ROC
6700          */
6701         net_stats->rx_errors = adapter->stats.rxerrc +
6702                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6703                 adapter->stats.ruc + adapter->stats.roc +
6704                 adapter->stats.cexterr;
6705         net_stats->rx_length_errors = adapter->stats.ruc +
6706                                       adapter->stats.roc;
6707         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6708         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6709         net_stats->rx_missed_errors = adapter->stats.mpc;
6710
6711         /* Tx Errors */
6712         net_stats->tx_errors = adapter->stats.ecol +
6713                                adapter->stats.latecol;
6714         net_stats->tx_aborted_errors = adapter->stats.ecol;
6715         net_stats->tx_window_errors = adapter->stats.latecol;
6716         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6717
6718         /* Tx Dropped needs to be maintained elsewhere */
6719
6720         /* Management Stats */
6721         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6722         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6723         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6724
6725         /* OS2BMC Stats */
6726         reg = rd32(E1000_MANC);
6727         if (reg & E1000_MANC_EN_BMC2OS) {
6728                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6729                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6730                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6731                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6732         }
6733 }
6734
6735 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6736 {
6737         struct e1000_hw *hw = &adapter->hw;
6738         struct ptp_clock_event event;
6739         struct timespec64 ts;
6740         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
6741
6742         if (tsicr & TSINTR_SYS_WRAP) {
6743                 event.type = PTP_CLOCK_PPS;
6744                 if (adapter->ptp_caps.pps)
6745                         ptp_clock_event(adapter->ptp_clock, &event);
6746                 ack |= TSINTR_SYS_WRAP;
6747         }
6748
6749         if (tsicr & E1000_TSICR_TXTS) {
6750                 /* retrieve hardware timestamp */
6751                 schedule_work(&adapter->ptp_tx_work);
6752                 ack |= E1000_TSICR_TXTS;
6753         }
6754
6755         if (tsicr & TSINTR_TT0) {
6756                 spin_lock(&adapter->tmreg_lock);
6757                 ts = timespec64_add(adapter->perout[0].start,
6758                                     adapter->perout[0].period);
6759                 /* u32 conversion of tv_sec is safe until y2106 */
6760                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
6761                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
6762                 tsauxc = rd32(E1000_TSAUXC);
6763                 tsauxc |= TSAUXC_EN_TT0;
6764                 wr32(E1000_TSAUXC, tsauxc);
6765                 adapter->perout[0].start = ts;
6766                 spin_unlock(&adapter->tmreg_lock);
6767                 ack |= TSINTR_TT0;
6768         }
6769
6770         if (tsicr & TSINTR_TT1) {
6771                 spin_lock(&adapter->tmreg_lock);
6772                 ts = timespec64_add(adapter->perout[1].start,
6773                                     adapter->perout[1].period);
6774                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
6775                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
6776                 tsauxc = rd32(E1000_TSAUXC);
6777                 tsauxc |= TSAUXC_EN_TT1;
6778                 wr32(E1000_TSAUXC, tsauxc);
6779                 adapter->perout[1].start = ts;
6780                 spin_unlock(&adapter->tmreg_lock);
6781                 ack |= TSINTR_TT1;
6782         }
6783
6784         if (tsicr & TSINTR_AUTT0) {
6785                 nsec = rd32(E1000_AUXSTMPL0);
6786                 sec  = rd32(E1000_AUXSTMPH0);
6787                 event.type = PTP_CLOCK_EXTTS;
6788                 event.index = 0;
6789                 event.timestamp = sec * 1000000000ULL + nsec;
6790                 ptp_clock_event(adapter->ptp_clock, &event);
6791                 ack |= TSINTR_AUTT0;
6792         }
6793
6794         if (tsicr & TSINTR_AUTT1) {
6795                 nsec = rd32(E1000_AUXSTMPL1);
6796                 sec  = rd32(E1000_AUXSTMPH1);
6797                 event.type = PTP_CLOCK_EXTTS;
6798                 event.index = 1;
6799                 event.timestamp = sec * 1000000000ULL + nsec;
6800                 ptp_clock_event(adapter->ptp_clock, &event);
6801                 ack |= TSINTR_AUTT1;
6802         }
6803
6804         /* acknowledge the interrupts */
6805         wr32(E1000_TSICR, ack);
6806 }
6807
6808 static irqreturn_t igb_msix_other(int irq, void *data)
6809 {
6810         struct igb_adapter *adapter = data;
6811         struct e1000_hw *hw = &adapter->hw;
6812         u32 icr = rd32(E1000_ICR);
6813         /* reading ICR causes bit 31 of EICR to be cleared */
6814
6815         if (icr & E1000_ICR_DRSTA)
6816                 schedule_work(&adapter->reset_task);
6817
6818         if (icr & E1000_ICR_DOUTSYNC) {
6819                 /* HW is reporting DMA is out of sync */
6820                 adapter->stats.doosync++;
6821                 /* The DMA Out of Sync is also indication of a spoof event
6822                  * in IOV mode. Check the Wrong VM Behavior register to
6823                  * see if it is really a spoof event.
6824                  */
6825                 igb_check_wvbr(adapter);
6826         }
6827
6828         /* Check for a mailbox event */
6829         if (icr & E1000_ICR_VMMB)
6830                 igb_msg_task(adapter);
6831
6832         if (icr & E1000_ICR_LSC) {
6833                 hw->mac.get_link_status = 1;
6834                 /* guard against interrupt when we're going down */
6835                 if (!test_bit(__IGB_DOWN, &adapter->state))
6836                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6837         }
6838
6839         if (icr & E1000_ICR_TS)
6840                 igb_tsync_interrupt(adapter);
6841
6842         wr32(E1000_EIMS, adapter->eims_other);
6843
6844         return IRQ_HANDLED;
6845 }
6846
6847 static void igb_write_itr(struct igb_q_vector *q_vector)
6848 {
6849         struct igb_adapter *adapter = q_vector->adapter;
6850         u32 itr_val = q_vector->itr_val & 0x7FFC;
6851
6852         if (!q_vector->set_itr)
6853                 return;
6854
6855         if (!itr_val)
6856                 itr_val = 0x4;
6857
6858         if (adapter->hw.mac.type == e1000_82575)
6859                 itr_val |= itr_val << 16;
6860         else
6861                 itr_val |= E1000_EITR_CNT_IGNR;
6862
6863         writel(itr_val, q_vector->itr_register);
6864         q_vector->set_itr = 0;
6865 }
6866
6867 static irqreturn_t igb_msix_ring(int irq, void *data)
6868 {
6869         struct igb_q_vector *q_vector = data;
6870
6871         /* Write the ITR value calculated from the previous interrupt. */
6872         igb_write_itr(q_vector);
6873
6874         napi_schedule(&q_vector->napi);
6875
6876         return IRQ_HANDLED;
6877 }
6878
6879 #ifdef CONFIG_IGB_DCA
6880 static void igb_update_tx_dca(struct igb_adapter *adapter,
6881                               struct igb_ring *tx_ring,
6882                               int cpu)
6883 {
6884         struct e1000_hw *hw = &adapter->hw;
6885         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6886
6887         if (hw->mac.type != e1000_82575)
6888                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
6889
6890         /* We can enable relaxed ordering for reads, but not writes when
6891          * DCA is enabled.  This is due to a known issue in some chipsets
6892          * which will cause the DCA tag to be cleared.
6893          */
6894         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6895                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6896                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6897
6898         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6899 }
6900
6901 static void igb_update_rx_dca(struct igb_adapter *adapter,
6902                               struct igb_ring *rx_ring,
6903                               int cpu)
6904 {
6905         struct e1000_hw *hw = &adapter->hw;
6906         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6907
6908         if (hw->mac.type != e1000_82575)
6909                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
6910
6911         /* We can enable relaxed ordering for reads, but not writes when
6912          * DCA is enabled.  This is due to a known issue in some chipsets
6913          * which will cause the DCA tag to be cleared.
6914          */
6915         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6916                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6917
6918         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6919 }
6920
6921 static void igb_update_dca(struct igb_q_vector *q_vector)
6922 {
6923         struct igb_adapter *adapter = q_vector->adapter;
6924         int cpu = get_cpu();
6925
6926         if (q_vector->cpu == cpu)
6927                 goto out_no_update;
6928
6929         if (q_vector->tx.ring)
6930                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6931
6932         if (q_vector->rx.ring)
6933                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6934
6935         q_vector->cpu = cpu;
6936 out_no_update:
6937         put_cpu();
6938 }
6939
6940 static void igb_setup_dca(struct igb_adapter *adapter)
6941 {
6942         struct e1000_hw *hw = &adapter->hw;
6943         int i;
6944
6945         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6946                 return;
6947
6948         /* Always use CB2 mode, difference is masked in the CB driver. */
6949         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6950
6951         for (i = 0; i < adapter->num_q_vectors; i++) {
6952                 adapter->q_vector[i]->cpu = -1;
6953                 igb_update_dca(adapter->q_vector[i]);
6954         }
6955 }
6956
6957 static int __igb_notify_dca(struct device *dev, void *data)
6958 {
6959         struct net_device *netdev = dev_get_drvdata(dev);
6960         struct igb_adapter *adapter = netdev_priv(netdev);
6961         struct pci_dev *pdev = adapter->pdev;
6962         struct e1000_hw *hw = &adapter->hw;
6963         unsigned long event = *(unsigned long *)data;
6964
6965         switch (event) {
6966         case DCA_PROVIDER_ADD:
6967                 /* if already enabled, don't do it again */
6968                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6969                         break;
6970                 if (dca_add_requester(dev) == 0) {
6971                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6972                         dev_info(&pdev->dev, "DCA enabled\n");
6973                         igb_setup_dca(adapter);
6974                         break;
6975                 }
6976                 fallthrough; /* since DCA is disabled. */
6977         case DCA_PROVIDER_REMOVE:
6978                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6979                         /* without this a class_device is left
6980                          * hanging around in the sysfs model
6981                          */
6982                         dca_remove_requester(dev);
6983                         dev_info(&pdev->dev, "DCA disabled\n");
6984                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6985                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
6986                 }
6987                 break;
6988         }
6989
6990         return 0;
6991 }
6992
6993 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6994                           void *p)
6995 {
6996         int ret_val;
6997
6998         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6999                                          __igb_notify_dca);
7000
7001         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7002 }
7003 #endif /* CONFIG_IGB_DCA */
7004
7005 #ifdef CONFIG_PCI_IOV
7006 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
7007 {
7008         unsigned char mac_addr[ETH_ALEN];
7009
7010         eth_zero_addr(mac_addr);
7011         igb_set_vf_mac(adapter, vf, mac_addr);
7012
7013         /* By default spoof check is enabled for all VFs */
7014         adapter->vf_data[vf].spoofchk_enabled = true;
7015
7016         /* By default VFs are not trusted */
7017         adapter->vf_data[vf].trusted = false;
7018
7019         return 0;
7020 }
7021
7022 #endif
7023 static void igb_ping_all_vfs(struct igb_adapter *adapter)
7024 {
7025         struct e1000_hw *hw = &adapter->hw;
7026         u32 ping;
7027         int i;
7028
7029         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
7030                 ping = E1000_PF_CONTROL_MSG;
7031                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
7032                         ping |= E1000_VT_MSGTYPE_CTS;
7033                 igb_write_mbx(hw, &ping, 1, i);
7034         }
7035 }
7036
7037 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7038 {
7039         struct e1000_hw *hw = &adapter->hw;
7040         u32 vmolr = rd32(E1000_VMOLR(vf));
7041         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7042
7043         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
7044                             IGB_VF_FLAG_MULTI_PROMISC);
7045         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7046
7047         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
7048                 vmolr |= E1000_VMOLR_MPME;
7049                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
7050                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
7051         } else {
7052                 /* if we have hashes and we are clearing a multicast promisc
7053                  * flag we need to write the hashes to the MTA as this step
7054                  * was previously skipped
7055                  */
7056                 if (vf_data->num_vf_mc_hashes > 30) {
7057                         vmolr |= E1000_VMOLR_MPME;
7058                 } else if (vf_data->num_vf_mc_hashes) {
7059                         int j;
7060
7061                         vmolr |= E1000_VMOLR_ROMPE;
7062                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7063                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7064                 }
7065         }
7066
7067         wr32(E1000_VMOLR(vf), vmolr);
7068
7069         /* there are flags left unprocessed, likely not supported */
7070         if (*msgbuf & E1000_VT_MSGINFO_MASK)
7071                 return -EINVAL;
7072
7073         return 0;
7074 }
7075
7076 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
7077                                   u32 *msgbuf, u32 vf)
7078 {
7079         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7080         u16 *hash_list = (u16 *)&msgbuf[1];
7081         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7082         int i;
7083
7084         /* salt away the number of multicast addresses assigned
7085          * to this VF for later use to restore when the PF multi cast
7086          * list changes
7087          */
7088         vf_data->num_vf_mc_hashes = n;
7089
7090         /* only up to 30 hash values supported */
7091         if (n > 30)
7092                 n = 30;
7093
7094         /* store the hashes for later use */
7095         for (i = 0; i < n; i++)
7096                 vf_data->vf_mc_hashes[i] = hash_list[i];
7097
7098         /* Flush and reset the mta with the new values */
7099         igb_set_rx_mode(adapter->netdev);
7100
7101         return 0;
7102 }
7103
7104 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
7105 {
7106         struct e1000_hw *hw = &adapter->hw;
7107         struct vf_data_storage *vf_data;
7108         int i, j;
7109
7110         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7111                 u32 vmolr = rd32(E1000_VMOLR(i));
7112
7113                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7114
7115                 vf_data = &adapter->vf_data[i];
7116
7117                 if ((vf_data->num_vf_mc_hashes > 30) ||
7118                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
7119                         vmolr |= E1000_VMOLR_MPME;
7120                 } else if (vf_data->num_vf_mc_hashes) {
7121                         vmolr |= E1000_VMOLR_ROMPE;
7122                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7123                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7124                 }
7125                 wr32(E1000_VMOLR(i), vmolr);
7126         }
7127 }
7128
7129 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
7130 {
7131         struct e1000_hw *hw = &adapter->hw;
7132         u32 pool_mask, vlvf_mask, i;
7133
7134         /* create mask for VF and other pools */
7135         pool_mask = E1000_VLVF_POOLSEL_MASK;
7136         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
7137
7138         /* drop PF from pool bits */
7139         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
7140                              adapter->vfs_allocated_count);
7141
7142         /* Find the vlan filter for this id */
7143         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
7144                 u32 vlvf = rd32(E1000_VLVF(i));
7145                 u32 vfta_mask, vid, vfta;
7146
7147                 /* remove the vf from the pool */
7148                 if (!(vlvf & vlvf_mask))
7149                         continue;
7150
7151                 /* clear out bit from VLVF */
7152                 vlvf ^= vlvf_mask;
7153
7154                 /* if other pools are present, just remove ourselves */
7155                 if (vlvf & pool_mask)
7156                         goto update_vlvfb;
7157
7158                 /* if PF is present, leave VFTA */
7159                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
7160                         goto update_vlvf;
7161
7162                 vid = vlvf & E1000_VLVF_VLANID_MASK;
7163                 vfta_mask = BIT(vid % 32);
7164
7165                 /* clear bit from VFTA */
7166                 vfta = adapter->shadow_vfta[vid / 32];
7167                 if (vfta & vfta_mask)
7168                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
7169 update_vlvf:
7170                 /* clear pool selection enable */
7171                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7172                         vlvf &= E1000_VLVF_POOLSEL_MASK;
7173                 else
7174                         vlvf = 0;
7175 update_vlvfb:
7176                 /* clear pool bits */
7177                 wr32(E1000_VLVF(i), vlvf);
7178         }
7179 }
7180
7181 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
7182 {
7183         u32 vlvf;
7184         int idx;
7185
7186         /* short cut the special case */
7187         if (vlan == 0)
7188                 return 0;
7189
7190         /* Search for the VLAN id in the VLVF entries */
7191         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
7192                 vlvf = rd32(E1000_VLVF(idx));
7193                 if ((vlvf & VLAN_VID_MASK) == vlan)
7194                         break;
7195         }
7196
7197         return idx;
7198 }
7199
7200 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
7201 {
7202         struct e1000_hw *hw = &adapter->hw;
7203         u32 bits, pf_id;
7204         int idx;
7205
7206         idx = igb_find_vlvf_entry(hw, vid);
7207         if (!idx)
7208                 return;
7209
7210         /* See if any other pools are set for this VLAN filter
7211          * entry other than the PF.
7212          */
7213         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
7214         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
7215         bits &= rd32(E1000_VLVF(idx));
7216
7217         /* Disable the filter so this falls into the default pool. */
7218         if (!bits) {
7219                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7220                         wr32(E1000_VLVF(idx), BIT(pf_id));
7221                 else
7222                         wr32(E1000_VLVF(idx), 0);
7223         }
7224 }
7225
7226 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
7227                            bool add, u32 vf)
7228 {
7229         int pf_id = adapter->vfs_allocated_count;
7230         struct e1000_hw *hw = &adapter->hw;
7231         int err;
7232
7233         /* If VLAN overlaps with one the PF is currently monitoring make
7234          * sure that we are able to allocate a VLVF entry.  This may be
7235          * redundant but it guarantees PF will maintain visibility to
7236          * the VLAN.
7237          */
7238         if (add && test_bit(vid, adapter->active_vlans)) {
7239                 err = igb_vfta_set(hw, vid, pf_id, true, false);
7240                 if (err)
7241                         return err;
7242         }
7243
7244         err = igb_vfta_set(hw, vid, vf, add, false);
7245
7246         if (add && !err)
7247                 return err;
7248
7249         /* If we failed to add the VF VLAN or we are removing the VF VLAN
7250          * we may need to drop the PF pool bit in order to allow us to free
7251          * up the VLVF resources.
7252          */
7253         if (test_bit(vid, adapter->active_vlans) ||
7254             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
7255                 igb_update_pf_vlvf(adapter, vid);
7256
7257         return err;
7258 }
7259
7260 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7261 {
7262         struct e1000_hw *hw = &adapter->hw;
7263
7264         if (vid)
7265                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7266         else
7267                 wr32(E1000_VMVIR(vf), 0);
7268 }
7269
7270 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7271                                 u16 vlan, u8 qos)
7272 {
7273         int err;
7274
7275         err = igb_set_vf_vlan(adapter, vlan, true, vf);
7276         if (err)
7277                 return err;
7278
7279         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7280         igb_set_vmolr(adapter, vf, !vlan);
7281
7282         /* revoke access to previous VLAN */
7283         if (vlan != adapter->vf_data[vf].pf_vlan)
7284                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7285                                 false, vf);
7286
7287         adapter->vf_data[vf].pf_vlan = vlan;
7288         adapter->vf_data[vf].pf_qos = qos;
7289         igb_set_vf_vlan_strip(adapter, vf, true);
7290         dev_info(&adapter->pdev->dev,
7291                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7292         if (test_bit(__IGB_DOWN, &adapter->state)) {
7293                 dev_warn(&adapter->pdev->dev,
7294                          "The VF VLAN has been set, but the PF device is not up.\n");
7295                 dev_warn(&adapter->pdev->dev,
7296                          "Bring the PF device up before attempting to use the VF device.\n");
7297         }
7298
7299         return err;
7300 }
7301
7302 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7303 {
7304         /* Restore tagless access via VLAN 0 */
7305         igb_set_vf_vlan(adapter, 0, true, vf);
7306
7307         igb_set_vmvir(adapter, 0, vf);
7308         igb_set_vmolr(adapter, vf, true);
7309
7310         /* Remove any PF assigned VLAN */
7311         if (adapter->vf_data[vf].pf_vlan)
7312                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7313                                 false, vf);
7314
7315         adapter->vf_data[vf].pf_vlan = 0;
7316         adapter->vf_data[vf].pf_qos = 0;
7317         igb_set_vf_vlan_strip(adapter, vf, false);
7318
7319         return 0;
7320 }
7321
7322 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7323                                u16 vlan, u8 qos, __be16 vlan_proto)
7324 {
7325         struct igb_adapter *adapter = netdev_priv(netdev);
7326
7327         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7328                 return -EINVAL;
7329
7330         if (vlan_proto != htons(ETH_P_8021Q))
7331                 return -EPROTONOSUPPORT;
7332
7333         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7334                                igb_disable_port_vlan(adapter, vf);
7335 }
7336
7337 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7338 {
7339         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7340         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7341         int ret;
7342
7343         if (adapter->vf_data[vf].pf_vlan)
7344                 return -1;
7345
7346         /* VLAN 0 is a special case, don't allow it to be removed */
7347         if (!vid && !add)
7348                 return 0;
7349
7350         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7351         if (!ret)
7352                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7353         return ret;
7354 }
7355
7356 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7357 {
7358         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7359
7360         /* clear flags - except flag that indicates PF has set the MAC */
7361         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7362         vf_data->last_nack = jiffies;
7363
7364         /* reset vlans for device */
7365         igb_clear_vf_vfta(adapter, vf);
7366         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7367         igb_set_vmvir(adapter, vf_data->pf_vlan |
7368                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7369         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7370         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7371
7372         /* reset multicast table array for vf */
7373         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7374
7375         /* Flush and reset the mta with the new values */
7376         igb_set_rx_mode(adapter->netdev);
7377 }
7378
7379 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7380 {
7381         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7382
7383         /* clear mac address as we were hotplug removed/added */
7384         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7385                 eth_zero_addr(vf_mac);
7386
7387         /* process remaining reset events */
7388         igb_vf_reset(adapter, vf);
7389 }
7390
7391 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7392 {
7393         struct e1000_hw *hw = &adapter->hw;
7394         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7395         u32 reg, msgbuf[3];
7396         u8 *addr = (u8 *)(&msgbuf[1]);
7397
7398         /* process all the same items cleared in a function level reset */
7399         igb_vf_reset(adapter, vf);
7400
7401         /* set vf mac address */
7402         igb_set_vf_mac(adapter, vf, vf_mac);
7403
7404         /* enable transmit and receive for vf */
7405         reg = rd32(E1000_VFTE);
7406         wr32(E1000_VFTE, reg | BIT(vf));
7407         reg = rd32(E1000_VFRE);
7408         wr32(E1000_VFRE, reg | BIT(vf));
7409
7410         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7411
7412         /* reply to reset with ack and vf mac address */
7413         if (!is_zero_ether_addr(vf_mac)) {
7414                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7415                 memcpy(addr, vf_mac, ETH_ALEN);
7416         } else {
7417                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7418         }
7419         igb_write_mbx(hw, msgbuf, 3, vf);
7420 }
7421
7422 static void igb_flush_mac_table(struct igb_adapter *adapter)
7423 {
7424         struct e1000_hw *hw = &adapter->hw;
7425         int i;
7426
7427         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7428                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7429                 eth_zero_addr(adapter->mac_table[i].addr);
7430                 adapter->mac_table[i].queue = 0;
7431                 igb_rar_set_index(adapter, i);
7432         }
7433 }
7434
7435 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7436 {
7437         struct e1000_hw *hw = &adapter->hw;
7438         /* do not count rar entries reserved for VFs MAC addresses */
7439         int rar_entries = hw->mac.rar_entry_count -
7440                           adapter->vfs_allocated_count;
7441         int i, count = 0;
7442
7443         for (i = 0; i < rar_entries; i++) {
7444                 /* do not count default entries */
7445                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7446                         continue;
7447
7448                 /* do not count "in use" entries for different queues */
7449                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7450                     (adapter->mac_table[i].queue != queue))
7451                         continue;
7452
7453                 count++;
7454         }
7455
7456         return count;
7457 }
7458
7459 /* Set default MAC address for the PF in the first RAR entry */
7460 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7461 {
7462         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7463
7464         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7465         mac_table->queue = adapter->vfs_allocated_count;
7466         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7467
7468         igb_rar_set_index(adapter, 0);
7469 }
7470
7471 /* If the filter to be added and an already existing filter express
7472  * the same address and address type, it should be possible to only
7473  * override the other configurations, for example the queue to steer
7474  * traffic.
7475  */
7476 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7477                                       const u8 *addr, const u8 flags)
7478 {
7479         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7480                 return true;
7481
7482         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7483             (flags & IGB_MAC_STATE_SRC_ADDR))
7484                 return false;
7485
7486         if (!ether_addr_equal(addr, entry->addr))
7487                 return false;
7488
7489         return true;
7490 }
7491
7492 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7493  * 'flags' is used to indicate what kind of match is made, match is by
7494  * default for the destination address, if matching by source address
7495  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7496  */
7497 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7498                                     const u8 *addr, const u8 queue,
7499                                     const u8 flags)
7500 {
7501         struct e1000_hw *hw = &adapter->hw;
7502         int rar_entries = hw->mac.rar_entry_count -
7503                           adapter->vfs_allocated_count;
7504         int i;
7505
7506         if (is_zero_ether_addr(addr))
7507                 return -EINVAL;
7508
7509         /* Search for the first empty entry in the MAC table.
7510          * Do not touch entries at the end of the table reserved for the VF MAC
7511          * addresses.
7512          */
7513         for (i = 0; i < rar_entries; i++) {
7514                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7515                                                addr, flags))
7516                         continue;
7517
7518                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7519                 adapter->mac_table[i].queue = queue;
7520                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7521
7522                 igb_rar_set_index(adapter, i);
7523                 return i;
7524         }
7525
7526         return -ENOSPC;
7527 }
7528
7529 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7530                               const u8 queue)
7531 {
7532         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7533 }
7534
7535 /* Remove a MAC filter for 'addr' directing matching traffic to
7536  * 'queue', 'flags' is used to indicate what kind of match need to be
7537  * removed, match is by default for the destination address, if
7538  * matching by source address is to be removed the flag
7539  * IGB_MAC_STATE_SRC_ADDR can be used.
7540  */
7541 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7542                                     const u8 *addr, const u8 queue,
7543                                     const u8 flags)
7544 {
7545         struct e1000_hw *hw = &adapter->hw;
7546         int rar_entries = hw->mac.rar_entry_count -
7547                           adapter->vfs_allocated_count;
7548         int i;
7549
7550         if (is_zero_ether_addr(addr))
7551                 return -EINVAL;
7552
7553         /* Search for matching entry in the MAC table based on given address
7554          * and queue. Do not touch entries at the end of the table reserved
7555          * for the VF MAC addresses.
7556          */
7557         for (i = 0; i < rar_entries; i++) {
7558                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7559                         continue;
7560                 if ((adapter->mac_table[i].state & flags) != flags)
7561                         continue;
7562                 if (adapter->mac_table[i].queue != queue)
7563                         continue;
7564                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7565                         continue;
7566
7567                 /* When a filter for the default address is "deleted",
7568                  * we return it to its initial configuration
7569                  */
7570                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7571                         adapter->mac_table[i].state =
7572                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7573                         adapter->mac_table[i].queue =
7574                                 adapter->vfs_allocated_count;
7575                 } else {
7576                         adapter->mac_table[i].state = 0;
7577                         adapter->mac_table[i].queue = 0;
7578                         eth_zero_addr(adapter->mac_table[i].addr);
7579                 }
7580
7581                 igb_rar_set_index(adapter, i);
7582                 return 0;
7583         }
7584
7585         return -ENOENT;
7586 }
7587
7588 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7589                               const u8 queue)
7590 {
7591         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7592 }
7593
7594 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7595                                 const u8 *addr, u8 queue, u8 flags)
7596 {
7597         struct e1000_hw *hw = &adapter->hw;
7598
7599         /* In theory, this should be supported on 82575 as well, but
7600          * that part wasn't easily accessible during development.
7601          */
7602         if (hw->mac.type != e1000_i210)
7603                 return -EOPNOTSUPP;
7604
7605         return igb_add_mac_filter_flags(adapter, addr, queue,
7606                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7607 }
7608
7609 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7610                                 const u8 *addr, u8 queue, u8 flags)
7611 {
7612         return igb_del_mac_filter_flags(adapter, addr, queue,
7613                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7614 }
7615
7616 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7617 {
7618         struct igb_adapter *adapter = netdev_priv(netdev);
7619         int ret;
7620
7621         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7622
7623         return min_t(int, ret, 0);
7624 }
7625
7626 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7627 {
7628         struct igb_adapter *adapter = netdev_priv(netdev);
7629
7630         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7631
7632         return 0;
7633 }
7634
7635 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7636                                  const u32 info, const u8 *addr)
7637 {
7638         struct pci_dev *pdev = adapter->pdev;
7639         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7640         struct list_head *pos;
7641         struct vf_mac_filter *entry = NULL;
7642         int ret = 0;
7643
7644         switch (info) {
7645         case E1000_VF_MAC_FILTER_CLR:
7646                 /* remove all unicast MAC filters related to the current VF */
7647                 list_for_each(pos, &adapter->vf_macs.l) {
7648                         entry = list_entry(pos, struct vf_mac_filter, l);
7649                         if (entry->vf == vf) {
7650                                 entry->vf = -1;
7651                                 entry->free = true;
7652                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7653                         }
7654                 }
7655                 break;
7656         case E1000_VF_MAC_FILTER_ADD:
7657                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7658                     !vf_data->trusted) {
7659                         dev_warn(&pdev->dev,
7660                                  "VF %d requested MAC filter but is administratively denied\n",
7661                                  vf);
7662                         return -EINVAL;
7663                 }
7664                 if (!is_valid_ether_addr(addr)) {
7665                         dev_warn(&pdev->dev,
7666                                  "VF %d attempted to set invalid MAC filter\n",
7667                                  vf);
7668                         return -EINVAL;
7669                 }
7670
7671                 /* try to find empty slot in the list */
7672                 list_for_each(pos, &adapter->vf_macs.l) {
7673                         entry = list_entry(pos, struct vf_mac_filter, l);
7674                         if (entry->free)
7675                                 break;
7676                 }
7677
7678                 if (entry && entry->free) {
7679                         entry->free = false;
7680                         entry->vf = vf;
7681                         ether_addr_copy(entry->vf_mac, addr);
7682
7683                         ret = igb_add_mac_filter(adapter, addr, vf);
7684                         ret = min_t(int, ret, 0);
7685                 } else {
7686                         ret = -ENOSPC;
7687                 }
7688
7689                 if (ret == -ENOSPC)
7690                         dev_warn(&pdev->dev,
7691                                  "VF %d has requested MAC filter but there is no space for it\n",
7692                                  vf);
7693                 break;
7694         default:
7695                 ret = -EINVAL;
7696                 break;
7697         }
7698
7699         return ret;
7700 }
7701
7702 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7703 {
7704         struct pci_dev *pdev = adapter->pdev;
7705         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7706         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7707
7708         /* The VF MAC Address is stored in a packed array of bytes
7709          * starting at the second 32 bit word of the msg array
7710          */
7711         unsigned char *addr = (unsigned char *)&msg[1];
7712         int ret = 0;
7713
7714         if (!info) {
7715                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7716                     !vf_data->trusted) {
7717                         dev_warn(&pdev->dev,
7718                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7719                                  vf);
7720                         return -EINVAL;
7721                 }
7722
7723                 if (!is_valid_ether_addr(addr)) {
7724                         dev_warn(&pdev->dev,
7725                                  "VF %d attempted to set invalid MAC\n",
7726                                  vf);
7727                         return -EINVAL;
7728                 }
7729
7730                 ret = igb_set_vf_mac(adapter, vf, addr);
7731         } else {
7732                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7733         }
7734
7735         return ret;
7736 }
7737
7738 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7739 {
7740         struct e1000_hw *hw = &adapter->hw;
7741         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7742         u32 msg = E1000_VT_MSGTYPE_NACK;
7743
7744         /* if device isn't clear to send it shouldn't be reading either */
7745         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7746             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7747                 igb_write_mbx(hw, &msg, 1, vf);
7748                 vf_data->last_nack = jiffies;
7749         }
7750 }
7751
7752 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7753 {
7754         struct pci_dev *pdev = adapter->pdev;
7755         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7756         struct e1000_hw *hw = &adapter->hw;
7757         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7758         s32 retval;
7759
7760         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7761
7762         if (retval) {
7763                 /* if receive failed revoke VF CTS stats and restart init */
7764                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7765                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7766                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7767                         goto unlock;
7768                 goto out;
7769         }
7770
7771         /* this is a message we already processed, do nothing */
7772         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7773                 goto unlock;
7774
7775         /* until the vf completes a reset it should not be
7776          * allowed to start any configuration.
7777          */
7778         if (msgbuf[0] == E1000_VF_RESET) {
7779                 /* unlocks mailbox */
7780                 igb_vf_reset_msg(adapter, vf);
7781                 return;
7782         }
7783
7784         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7785                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7786                         goto unlock;
7787                 retval = -1;
7788                 goto out;
7789         }
7790
7791         switch ((msgbuf[0] & 0xFFFF)) {
7792         case E1000_VF_SET_MAC_ADDR:
7793                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7794                 break;
7795         case E1000_VF_SET_PROMISC:
7796                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7797                 break;
7798         case E1000_VF_SET_MULTICAST:
7799                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7800                 break;
7801         case E1000_VF_SET_LPE:
7802                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7803                 break;
7804         case E1000_VF_SET_VLAN:
7805                 retval = -1;
7806                 if (vf_data->pf_vlan)
7807                         dev_warn(&pdev->dev,
7808                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7809                                  vf);
7810                 else
7811                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7812                 break;
7813         default:
7814                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7815                 retval = -1;
7816                 break;
7817         }
7818
7819         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7820 out:
7821         /* notify the VF of the results of what it sent us */
7822         if (retval)
7823                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7824         else
7825                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7826
7827         /* unlocks mailbox */
7828         igb_write_mbx(hw, msgbuf, 1, vf);
7829         return;
7830
7831 unlock:
7832         igb_unlock_mbx(hw, vf);
7833 }
7834
7835 static void igb_msg_task(struct igb_adapter *adapter)
7836 {
7837         struct e1000_hw *hw = &adapter->hw;
7838         u32 vf;
7839
7840         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7841                 /* process any reset requests */
7842                 if (!igb_check_for_rst(hw, vf))
7843                         igb_vf_reset_event(adapter, vf);
7844
7845                 /* process any messages pending */
7846                 if (!igb_check_for_msg(hw, vf))
7847                         igb_rcv_msg_from_vf(adapter, vf);
7848
7849                 /* process any acks */
7850                 if (!igb_check_for_ack(hw, vf))
7851                         igb_rcv_ack_from_vf(adapter, vf);
7852         }
7853 }
7854
7855 /**
7856  *  igb_set_uta - Set unicast filter table address
7857  *  @adapter: board private structure
7858  *  @set: boolean indicating if we are setting or clearing bits
7859  *
7860  *  The unicast table address is a register array of 32-bit registers.
7861  *  The table is meant to be used in a way similar to how the MTA is used
7862  *  however due to certain limitations in the hardware it is necessary to
7863  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
7864  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
7865  **/
7866 static void igb_set_uta(struct igb_adapter *adapter, bool set)
7867 {
7868         struct e1000_hw *hw = &adapter->hw;
7869         u32 uta = set ? ~0 : 0;
7870         int i;
7871
7872         /* we only need to do this if VMDq is enabled */
7873         if (!adapter->vfs_allocated_count)
7874                 return;
7875
7876         for (i = hw->mac.uta_reg_count; i--;)
7877                 array_wr32(E1000_UTA, i, uta);
7878 }
7879
7880 /**
7881  *  igb_intr_msi - Interrupt Handler
7882  *  @irq: interrupt number
7883  *  @data: pointer to a network interface device structure
7884  **/
7885 static irqreturn_t igb_intr_msi(int irq, void *data)
7886 {
7887         struct igb_adapter *adapter = data;
7888         struct igb_q_vector *q_vector = adapter->q_vector[0];
7889         struct e1000_hw *hw = &adapter->hw;
7890         /* read ICR disables interrupts using IAM */
7891         u32 icr = rd32(E1000_ICR);
7892
7893         igb_write_itr(q_vector);
7894
7895         if (icr & E1000_ICR_DRSTA)
7896                 schedule_work(&adapter->reset_task);
7897
7898         if (icr & E1000_ICR_DOUTSYNC) {
7899                 /* HW is reporting DMA is out of sync */
7900                 adapter->stats.doosync++;
7901         }
7902
7903         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7904                 hw->mac.get_link_status = 1;
7905                 if (!test_bit(__IGB_DOWN, &adapter->state))
7906                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7907         }
7908
7909         if (icr & E1000_ICR_TS)
7910                 igb_tsync_interrupt(adapter);
7911
7912         napi_schedule(&q_vector->napi);
7913
7914         return IRQ_HANDLED;
7915 }
7916
7917 /**
7918  *  igb_intr - Legacy Interrupt Handler
7919  *  @irq: interrupt number
7920  *  @data: pointer to a network interface device structure
7921  **/
7922 static irqreturn_t igb_intr(int irq, void *data)
7923 {
7924         struct igb_adapter *adapter = data;
7925         struct igb_q_vector *q_vector = adapter->q_vector[0];
7926         struct e1000_hw *hw = &adapter->hw;
7927         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
7928          * need for the IMC write
7929          */
7930         u32 icr = rd32(E1000_ICR);
7931
7932         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
7933          * not set, then the adapter didn't send an interrupt
7934          */
7935         if (!(icr & E1000_ICR_INT_ASSERTED))
7936                 return IRQ_NONE;
7937
7938         igb_write_itr(q_vector);
7939
7940         if (icr & E1000_ICR_DRSTA)
7941                 schedule_work(&adapter->reset_task);
7942
7943         if (icr & E1000_ICR_DOUTSYNC) {
7944                 /* HW is reporting DMA is out of sync */
7945                 adapter->stats.doosync++;
7946         }
7947
7948         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7949                 hw->mac.get_link_status = 1;
7950                 /* guard against interrupt when we're going down */
7951                 if (!test_bit(__IGB_DOWN, &adapter->state))
7952                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7953         }
7954
7955         if (icr & E1000_ICR_TS)
7956                 igb_tsync_interrupt(adapter);
7957
7958         napi_schedule(&q_vector->napi);
7959
7960         return IRQ_HANDLED;
7961 }
7962
7963 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
7964 {
7965         struct igb_adapter *adapter = q_vector->adapter;
7966         struct e1000_hw *hw = &adapter->hw;
7967
7968         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
7969             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
7970                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
7971                         igb_set_itr(q_vector);
7972                 else
7973                         igb_update_ring_itr(q_vector);
7974         }
7975
7976         if (!test_bit(__IGB_DOWN, &adapter->state)) {
7977                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7978                         wr32(E1000_EIMS, q_vector->eims_value);
7979                 else
7980                         igb_irq_enable(adapter);
7981         }
7982 }
7983
7984 /**
7985  *  igb_poll - NAPI Rx polling callback
7986  *  @napi: napi polling structure
7987  *  @budget: count of how many packets we should handle
7988  **/
7989 static int igb_poll(struct napi_struct *napi, int budget)
7990 {
7991         struct igb_q_vector *q_vector = container_of(napi,
7992                                                      struct igb_q_vector,
7993                                                      napi);
7994         bool clean_complete = true;
7995         int work_done = 0;
7996
7997 #ifdef CONFIG_IGB_DCA
7998         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
7999                 igb_update_dca(q_vector);
8000 #endif
8001         if (q_vector->tx.ring)
8002                 clean_complete = igb_clean_tx_irq(q_vector, budget);
8003
8004         if (q_vector->rx.ring) {
8005                 int cleaned = igb_clean_rx_irq(q_vector, budget);
8006
8007                 work_done += cleaned;
8008                 if (cleaned >= budget)
8009                         clean_complete = false;
8010         }
8011
8012         /* If all work not completed, return budget and keep polling */
8013         if (!clean_complete)
8014                 return budget;
8015
8016         /* Exit the polling mode, but don't re-enable interrupts if stack might
8017          * poll us due to busy-polling
8018          */
8019         if (likely(napi_complete_done(napi, work_done)))
8020                 igb_ring_irq_enable(q_vector);
8021
8022         return min(work_done, budget - 1);
8023 }
8024
8025 /**
8026  *  igb_clean_tx_irq - Reclaim resources after transmit completes
8027  *  @q_vector: pointer to q_vector containing needed info
8028  *  @napi_budget: Used to determine if we are in netpoll
8029  *
8030  *  returns true if ring is completely cleaned
8031  **/
8032 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
8033 {
8034         struct igb_adapter *adapter = q_vector->adapter;
8035         struct igb_ring *tx_ring = q_vector->tx.ring;
8036         struct igb_tx_buffer *tx_buffer;
8037         union e1000_adv_tx_desc *tx_desc;
8038         unsigned int total_bytes = 0, total_packets = 0;
8039         unsigned int budget = q_vector->tx.work_limit;
8040         unsigned int i = tx_ring->next_to_clean;
8041
8042         if (test_bit(__IGB_DOWN, &adapter->state))
8043                 return true;
8044
8045         tx_buffer = &tx_ring->tx_buffer_info[i];
8046         tx_desc = IGB_TX_DESC(tx_ring, i);
8047         i -= tx_ring->count;
8048
8049         do {
8050                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
8051
8052                 /* if next_to_watch is not set then there is no work pending */
8053                 if (!eop_desc)
8054                         break;
8055
8056                 /* prevent any other reads prior to eop_desc */
8057                 smp_rmb();
8058
8059                 /* if DD is not set pending work has not been completed */
8060                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
8061                         break;
8062
8063                 /* clear next_to_watch to prevent false hangs */
8064                 tx_buffer->next_to_watch = NULL;
8065
8066                 /* update the statistics for this packet */
8067                 total_bytes += tx_buffer->bytecount;
8068                 total_packets += tx_buffer->gso_segs;
8069
8070                 /* free the skb */
8071                 if (tx_buffer->type == IGB_TYPE_SKB)
8072                         napi_consume_skb(tx_buffer->skb, napi_budget);
8073                 else
8074                         xdp_return_frame(tx_buffer->xdpf);
8075
8076                 /* unmap skb header data */
8077                 dma_unmap_single(tx_ring->dev,
8078                                  dma_unmap_addr(tx_buffer, dma),
8079                                  dma_unmap_len(tx_buffer, len),
8080                                  DMA_TO_DEVICE);
8081
8082                 /* clear tx_buffer data */
8083                 dma_unmap_len_set(tx_buffer, len, 0);
8084
8085                 /* clear last DMA location and unmap remaining buffers */
8086                 while (tx_desc != eop_desc) {
8087                         tx_buffer++;
8088                         tx_desc++;
8089                         i++;
8090                         if (unlikely(!i)) {
8091                                 i -= tx_ring->count;
8092                                 tx_buffer = tx_ring->tx_buffer_info;
8093                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
8094                         }
8095
8096                         /* unmap any remaining paged data */
8097                         if (dma_unmap_len(tx_buffer, len)) {
8098                                 dma_unmap_page(tx_ring->dev,
8099                                                dma_unmap_addr(tx_buffer, dma),
8100                                                dma_unmap_len(tx_buffer, len),
8101                                                DMA_TO_DEVICE);
8102                                 dma_unmap_len_set(tx_buffer, len, 0);
8103                         }
8104                 }
8105
8106                 /* move us one more past the eop_desc for start of next pkt */
8107                 tx_buffer++;
8108                 tx_desc++;
8109                 i++;
8110                 if (unlikely(!i)) {
8111                         i -= tx_ring->count;
8112                         tx_buffer = tx_ring->tx_buffer_info;
8113                         tx_desc = IGB_TX_DESC(tx_ring, 0);
8114                 }
8115
8116                 /* issue prefetch for next Tx descriptor */
8117                 prefetch(tx_desc);
8118
8119                 /* update budget accounting */
8120                 budget--;
8121         } while (likely(budget));
8122
8123         netdev_tx_completed_queue(txring_txq(tx_ring),
8124                                   total_packets, total_bytes);
8125         i += tx_ring->count;
8126         tx_ring->next_to_clean = i;
8127         u64_stats_update_begin(&tx_ring->tx_syncp);
8128         tx_ring->tx_stats.bytes += total_bytes;
8129         tx_ring->tx_stats.packets += total_packets;
8130         u64_stats_update_end(&tx_ring->tx_syncp);
8131         q_vector->tx.total_bytes += total_bytes;
8132         q_vector->tx.total_packets += total_packets;
8133
8134         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
8135                 struct e1000_hw *hw = &adapter->hw;
8136
8137                 /* Detect a transmit hang in hardware, this serializes the
8138                  * check with the clearing of time_stamp and movement of i
8139                  */
8140                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
8141                 if (tx_buffer->next_to_watch &&
8142                     time_after(jiffies, tx_buffer->time_stamp +
8143                                (adapter->tx_timeout_factor * HZ)) &&
8144                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
8145
8146                         /* detected Tx unit hang */
8147                         dev_err(tx_ring->dev,
8148                                 "Detected Tx Unit Hang\n"
8149                                 "  Tx Queue             <%d>\n"
8150                                 "  TDH                  <%x>\n"
8151                                 "  TDT                  <%x>\n"
8152                                 "  next_to_use          <%x>\n"
8153                                 "  next_to_clean        <%x>\n"
8154                                 "buffer_info[next_to_clean]\n"
8155                                 "  time_stamp           <%lx>\n"
8156                                 "  next_to_watch        <%p>\n"
8157                                 "  jiffies              <%lx>\n"
8158                                 "  desc.status          <%x>\n",
8159                                 tx_ring->queue_index,
8160                                 rd32(E1000_TDH(tx_ring->reg_idx)),
8161                                 readl(tx_ring->tail),
8162                                 tx_ring->next_to_use,
8163                                 tx_ring->next_to_clean,
8164                                 tx_buffer->time_stamp,
8165                                 tx_buffer->next_to_watch,
8166                                 jiffies,
8167                                 tx_buffer->next_to_watch->wb.status);
8168                         netif_stop_subqueue(tx_ring->netdev,
8169                                             tx_ring->queue_index);
8170
8171                         /* we are about to reset, no point in enabling stuff */
8172                         return true;
8173                 }
8174         }
8175
8176 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
8177         if (unlikely(total_packets &&
8178             netif_carrier_ok(tx_ring->netdev) &&
8179             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
8180                 /* Make sure that anybody stopping the queue after this
8181                  * sees the new next_to_clean.
8182                  */
8183                 smp_mb();
8184                 if (__netif_subqueue_stopped(tx_ring->netdev,
8185                                              tx_ring->queue_index) &&
8186                     !(test_bit(__IGB_DOWN, &adapter->state))) {
8187                         netif_wake_subqueue(tx_ring->netdev,
8188                                             tx_ring->queue_index);
8189
8190                         u64_stats_update_begin(&tx_ring->tx_syncp);
8191                         tx_ring->tx_stats.restart_queue++;
8192                         u64_stats_update_end(&tx_ring->tx_syncp);
8193                 }
8194         }
8195
8196         return !!budget;
8197 }
8198
8199 /**
8200  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
8201  *  @rx_ring: rx descriptor ring to store buffers on
8202  *  @old_buff: donor buffer to have page reused
8203  *
8204  *  Synchronizes page for reuse by the adapter
8205  **/
8206 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
8207                               struct igb_rx_buffer *old_buff)
8208 {
8209         struct igb_rx_buffer *new_buff;
8210         u16 nta = rx_ring->next_to_alloc;
8211
8212         new_buff = &rx_ring->rx_buffer_info[nta];
8213
8214         /* update, and store next to alloc */
8215         nta++;
8216         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
8217
8218         /* Transfer page from old buffer to new buffer.
8219          * Move each member individually to avoid possible store
8220          * forwarding stalls.
8221          */
8222         new_buff->dma           = old_buff->dma;
8223         new_buff->page          = old_buff->page;
8224         new_buff->page_offset   = old_buff->page_offset;
8225         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
8226 }
8227
8228 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
8229                                   int rx_buf_pgcnt)
8230 {
8231         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
8232         struct page *page = rx_buffer->page;
8233
8234         /* avoid re-using remote and pfmemalloc pages */
8235         if (!dev_page_is_reusable(page))
8236                 return false;
8237
8238 #if (PAGE_SIZE < 8192)
8239         /* if we are only owner of page we can reuse it */
8240         if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
8241                 return false;
8242 #else
8243 #define IGB_LAST_OFFSET \
8244         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
8245
8246         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
8247                 return false;
8248 #endif
8249
8250         /* If we have drained the page fragment pool we need to update
8251          * the pagecnt_bias and page count so that we fully restock the
8252          * number of references the driver holds.
8253          */
8254         if (unlikely(pagecnt_bias == 1)) {
8255                 page_ref_add(page, USHRT_MAX - 1);
8256                 rx_buffer->pagecnt_bias = USHRT_MAX;
8257         }
8258
8259         return true;
8260 }
8261
8262 /**
8263  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8264  *  @rx_ring: rx descriptor ring to transact packets on
8265  *  @rx_buffer: buffer containing page to add
8266  *  @skb: sk_buff to place the data into
8267  *  @size: size of buffer to be added
8268  *
8269  *  This function will add the data contained in rx_buffer->page to the skb.
8270  **/
8271 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8272                             struct igb_rx_buffer *rx_buffer,
8273                             struct sk_buff *skb,
8274                             unsigned int size)
8275 {
8276 #if (PAGE_SIZE < 8192)
8277         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8278 #else
8279         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8280                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8281                                 SKB_DATA_ALIGN(size);
8282 #endif
8283         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8284                         rx_buffer->page_offset, size, truesize);
8285 #if (PAGE_SIZE < 8192)
8286         rx_buffer->page_offset ^= truesize;
8287 #else
8288         rx_buffer->page_offset += truesize;
8289 #endif
8290 }
8291
8292 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8293                                          struct igb_rx_buffer *rx_buffer,
8294                                          struct xdp_buff *xdp,
8295                                          ktime_t timestamp)
8296 {
8297 #if (PAGE_SIZE < 8192)
8298         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8299 #else
8300         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
8301                                                xdp->data_hard_start);
8302 #endif
8303         unsigned int size = xdp->data_end - xdp->data;
8304         unsigned int headlen;
8305         struct sk_buff *skb;
8306
8307         /* prefetch first cache line of first page */
8308         net_prefetch(xdp->data);
8309
8310         /* allocate a skb to store the frags */
8311         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8312         if (unlikely(!skb))
8313                 return NULL;
8314
8315         if (timestamp)
8316                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8317
8318         /* Determine available headroom for copy */
8319         headlen = size;
8320         if (headlen > IGB_RX_HDR_LEN)
8321                 headlen = eth_get_headlen(skb->dev, xdp->data, IGB_RX_HDR_LEN);
8322
8323         /* align pull length to size of long to optimize memcpy performance */
8324         memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen, sizeof(long)));
8325
8326         /* update all of the pointers */
8327         size -= headlen;
8328         if (size) {
8329                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8330                                 (xdp->data + headlen) - page_address(rx_buffer->page),
8331                                 size, truesize);
8332 #if (PAGE_SIZE < 8192)
8333                 rx_buffer->page_offset ^= truesize;
8334 #else
8335                 rx_buffer->page_offset += truesize;
8336 #endif
8337         } else {
8338                 rx_buffer->pagecnt_bias++;
8339         }
8340
8341         return skb;
8342 }
8343
8344 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8345                                      struct igb_rx_buffer *rx_buffer,
8346                                      struct xdp_buff *xdp,
8347                                      ktime_t timestamp)
8348 {
8349 #if (PAGE_SIZE < 8192)
8350         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8351 #else
8352         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8353                                 SKB_DATA_ALIGN(xdp->data_end -
8354                                                xdp->data_hard_start);
8355 #endif
8356         unsigned int metasize = xdp->data - xdp->data_meta;
8357         struct sk_buff *skb;
8358
8359         /* prefetch first cache line of first page */
8360         net_prefetch(xdp->data_meta);
8361
8362         /* build an skb around the page buffer */
8363         skb = build_skb(xdp->data_hard_start, truesize);
8364         if (unlikely(!skb))
8365                 return NULL;
8366
8367         /* update pointers within the skb to store the data */
8368         skb_reserve(skb, xdp->data - xdp->data_hard_start);
8369         __skb_put(skb, xdp->data_end - xdp->data);
8370
8371         if (metasize)
8372                 skb_metadata_set(skb, metasize);
8373
8374         if (timestamp)
8375                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8376
8377         /* update buffer offset */
8378 #if (PAGE_SIZE < 8192)
8379         rx_buffer->page_offset ^= truesize;
8380 #else
8381         rx_buffer->page_offset += truesize;
8382 #endif
8383
8384         return skb;
8385 }
8386
8387 static struct sk_buff *igb_run_xdp(struct igb_adapter *adapter,
8388                                    struct igb_ring *rx_ring,
8389                                    struct xdp_buff *xdp)
8390 {
8391         int err, result = IGB_XDP_PASS;
8392         struct bpf_prog *xdp_prog;
8393         u32 act;
8394
8395         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
8396
8397         if (!xdp_prog)
8398                 goto xdp_out;
8399
8400         prefetchw(xdp->data_hard_start); /* xdp_frame write */
8401
8402         act = bpf_prog_run_xdp(xdp_prog, xdp);
8403         switch (act) {
8404         case XDP_PASS:
8405                 break;
8406         case XDP_TX:
8407                 result = igb_xdp_xmit_back(adapter, xdp);
8408                 if (result == IGB_XDP_CONSUMED)
8409                         goto out_failure;
8410                 break;
8411         case XDP_REDIRECT:
8412                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
8413                 if (err)
8414                         goto out_failure;
8415                 result = IGB_XDP_REDIR;
8416                 break;
8417         default:
8418                 bpf_warn_invalid_xdp_action(act);
8419                 fallthrough;
8420         case XDP_ABORTED:
8421 out_failure:
8422                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
8423                 fallthrough;
8424         case XDP_DROP:
8425                 result = IGB_XDP_CONSUMED;
8426                 break;
8427         }
8428 xdp_out:
8429         return ERR_PTR(-result);
8430 }
8431
8432 static unsigned int igb_rx_frame_truesize(struct igb_ring *rx_ring,
8433                                           unsigned int size)
8434 {
8435         unsigned int truesize;
8436
8437 #if (PAGE_SIZE < 8192)
8438         truesize = igb_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
8439 #else
8440         truesize = ring_uses_build_skb(rx_ring) ?
8441                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) +
8442                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
8443                 SKB_DATA_ALIGN(size);
8444 #endif
8445         return truesize;
8446 }
8447
8448 static void igb_rx_buffer_flip(struct igb_ring *rx_ring,
8449                                struct igb_rx_buffer *rx_buffer,
8450                                unsigned int size)
8451 {
8452         unsigned int truesize = igb_rx_frame_truesize(rx_ring, size);
8453 #if (PAGE_SIZE < 8192)
8454         rx_buffer->page_offset ^= truesize;
8455 #else
8456         rx_buffer->page_offset += truesize;
8457 #endif
8458 }
8459
8460 static inline void igb_rx_checksum(struct igb_ring *ring,
8461                                    union e1000_adv_rx_desc *rx_desc,
8462                                    struct sk_buff *skb)
8463 {
8464         skb_checksum_none_assert(skb);
8465
8466         /* Ignore Checksum bit is set */
8467         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8468                 return;
8469
8470         /* Rx checksum disabled via ethtool */
8471         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8472                 return;
8473
8474         /* TCP/UDP checksum error bit is set */
8475         if (igb_test_staterr(rx_desc,
8476                              E1000_RXDEXT_STATERR_TCPE |
8477                              E1000_RXDEXT_STATERR_IPE)) {
8478                 /* work around errata with sctp packets where the TCPE aka
8479                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8480                  * packets, (aka let the stack check the crc32c)
8481                  */
8482                 if (!((skb->len == 60) &&
8483                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8484                         u64_stats_update_begin(&ring->rx_syncp);
8485                         ring->rx_stats.csum_err++;
8486                         u64_stats_update_end(&ring->rx_syncp);
8487                 }
8488                 /* let the stack verify checksum errors */
8489                 return;
8490         }
8491         /* It must be a TCP or UDP packet with a valid checksum */
8492         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8493                                       E1000_RXD_STAT_UDPCS))
8494                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8495
8496         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8497                 le32_to_cpu(rx_desc->wb.upper.status_error));
8498 }
8499
8500 static inline void igb_rx_hash(struct igb_ring *ring,
8501                                union e1000_adv_rx_desc *rx_desc,
8502                                struct sk_buff *skb)
8503 {
8504         if (ring->netdev->features & NETIF_F_RXHASH)
8505                 skb_set_hash(skb,
8506                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8507                              PKT_HASH_TYPE_L3);
8508 }
8509
8510 /**
8511  *  igb_is_non_eop - process handling of non-EOP buffers
8512  *  @rx_ring: Rx ring being processed
8513  *  @rx_desc: Rx descriptor for current buffer
8514  *
8515  *  This function updates next to clean.  If the buffer is an EOP buffer
8516  *  this function exits returning false, otherwise it will place the
8517  *  sk_buff in the next buffer to be chained and return true indicating
8518  *  that this is in fact a non-EOP buffer.
8519  **/
8520 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8521                            union e1000_adv_rx_desc *rx_desc)
8522 {
8523         u32 ntc = rx_ring->next_to_clean + 1;
8524
8525         /* fetch, update, and store next to clean */
8526         ntc = (ntc < rx_ring->count) ? ntc : 0;
8527         rx_ring->next_to_clean = ntc;
8528
8529         prefetch(IGB_RX_DESC(rx_ring, ntc));
8530
8531         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8532                 return false;
8533
8534         return true;
8535 }
8536
8537 /**
8538  *  igb_cleanup_headers - Correct corrupted or empty headers
8539  *  @rx_ring: rx descriptor ring packet is being transacted on
8540  *  @rx_desc: pointer to the EOP Rx descriptor
8541  *  @skb: pointer to current skb being fixed
8542  *
8543  *  Address the case where we are pulling data in on pages only
8544  *  and as such no data is present in the skb header.
8545  *
8546  *  In addition if skb is not at least 60 bytes we need to pad it so that
8547  *  it is large enough to qualify as a valid Ethernet frame.
8548  *
8549  *  Returns true if an error was encountered and skb was freed.
8550  **/
8551 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8552                                 union e1000_adv_rx_desc *rx_desc,
8553                                 struct sk_buff *skb)
8554 {
8555         /* XDP packets use error pointer so abort at this point */
8556         if (IS_ERR(skb))
8557                 return true;
8558
8559         if (unlikely((igb_test_staterr(rx_desc,
8560                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8561                 struct net_device *netdev = rx_ring->netdev;
8562                 if (!(netdev->features & NETIF_F_RXALL)) {
8563                         dev_kfree_skb_any(skb);
8564                         return true;
8565                 }
8566         }
8567
8568         /* if eth_skb_pad returns an error the skb was freed */
8569         if (eth_skb_pad(skb))
8570                 return true;
8571
8572         return false;
8573 }
8574
8575 /**
8576  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8577  *  @rx_ring: rx descriptor ring packet is being transacted on
8578  *  @rx_desc: pointer to the EOP Rx descriptor
8579  *  @skb: pointer to current skb being populated
8580  *
8581  *  This function checks the ring, descriptor, and packet information in
8582  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8583  *  other fields within the skb.
8584  **/
8585 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8586                                    union e1000_adv_rx_desc *rx_desc,
8587                                    struct sk_buff *skb)
8588 {
8589         struct net_device *dev = rx_ring->netdev;
8590
8591         igb_rx_hash(rx_ring, rx_desc, skb);
8592
8593         igb_rx_checksum(rx_ring, rx_desc, skb);
8594
8595         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8596             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8597                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8598
8599         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8600             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8601                 u16 vid;
8602
8603                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8604                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8605                         vid = be16_to_cpu((__force __be16)rx_desc->wb.upper.vlan);
8606                 else
8607                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8608
8609                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8610         }
8611
8612         skb_record_rx_queue(skb, rx_ring->queue_index);
8613
8614         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8615 }
8616
8617 static unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8618 {
8619         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8620 }
8621
8622 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8623                                                const unsigned int size, int *rx_buf_pgcnt)
8624 {
8625         struct igb_rx_buffer *rx_buffer;
8626
8627         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8628         *rx_buf_pgcnt =
8629 #if (PAGE_SIZE < 8192)
8630                 page_count(rx_buffer->page);
8631 #else
8632                 0;
8633 #endif
8634         prefetchw(rx_buffer->page);
8635
8636         /* we are reusing so sync this buffer for CPU use */
8637         dma_sync_single_range_for_cpu(rx_ring->dev,
8638                                       rx_buffer->dma,
8639                                       rx_buffer->page_offset,
8640                                       size,
8641                                       DMA_FROM_DEVICE);
8642
8643         rx_buffer->pagecnt_bias--;
8644
8645         return rx_buffer;
8646 }
8647
8648 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8649                               struct igb_rx_buffer *rx_buffer, int rx_buf_pgcnt)
8650 {
8651         if (igb_can_reuse_rx_page(rx_buffer, rx_buf_pgcnt)) {
8652                 /* hand second half of page back to the ring */
8653                 igb_reuse_rx_page(rx_ring, rx_buffer);
8654         } else {
8655                 /* We are not reusing the buffer so unmap it and free
8656                  * any references we are holding to it
8657                  */
8658                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8659                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8660                                      IGB_RX_DMA_ATTR);
8661                 __page_frag_cache_drain(rx_buffer->page,
8662                                         rx_buffer->pagecnt_bias);
8663         }
8664
8665         /* clear contents of rx_buffer */
8666         rx_buffer->page = NULL;
8667 }
8668
8669 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8670 {
8671         struct igb_adapter *adapter = q_vector->adapter;
8672         struct igb_ring *rx_ring = q_vector->rx.ring;
8673         struct sk_buff *skb = rx_ring->skb;
8674         unsigned int total_bytes = 0, total_packets = 0;
8675         u16 cleaned_count = igb_desc_unused(rx_ring);
8676         unsigned int xdp_xmit = 0;
8677         struct xdp_buff xdp;
8678         u32 frame_sz = 0;
8679         int rx_buf_pgcnt;
8680
8681         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
8682 #if (PAGE_SIZE < 8192)
8683         frame_sz = igb_rx_frame_truesize(rx_ring, 0);
8684 #endif
8685         xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
8686
8687         while (likely(total_packets < budget)) {
8688                 union e1000_adv_rx_desc *rx_desc;
8689                 struct igb_rx_buffer *rx_buffer;
8690                 ktime_t timestamp = 0;
8691                 int pkt_offset = 0;
8692                 unsigned int size;
8693                 void *pktbuf;
8694
8695                 /* return some buffers to hardware, one at a time is too slow */
8696                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8697                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8698                         cleaned_count = 0;
8699                 }
8700
8701                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8702                 size = le16_to_cpu(rx_desc->wb.upper.length);
8703                 if (!size)
8704                         break;
8705
8706                 /* This memory barrier is needed to keep us from reading
8707                  * any other fields out of the rx_desc until we know the
8708                  * descriptor has been written back
8709                  */
8710                 dma_rmb();
8711
8712                 rx_buffer = igb_get_rx_buffer(rx_ring, size, &rx_buf_pgcnt);
8713                 pktbuf = page_address(rx_buffer->page) + rx_buffer->page_offset;
8714
8715                 /* pull rx packet timestamp if available and valid */
8716                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8717                         int ts_hdr_len;
8718
8719                         ts_hdr_len = igb_ptp_rx_pktstamp(rx_ring->q_vector,
8720                                                          pktbuf, &timestamp);
8721
8722                         pkt_offset += ts_hdr_len;
8723                         size -= ts_hdr_len;
8724                 }
8725
8726                 /* retrieve a buffer from the ring */
8727                 if (!skb) {
8728                         unsigned char *hard_start = pktbuf - igb_rx_offset(rx_ring);
8729                         unsigned int offset = pkt_offset + igb_rx_offset(rx_ring);
8730
8731                         xdp_prepare_buff(&xdp, hard_start, offset, size, true);
8732 #if (PAGE_SIZE > 4096)
8733                         /* At larger PAGE_SIZE, frame_sz depend on len size */
8734                         xdp.frame_sz = igb_rx_frame_truesize(rx_ring, size);
8735 #endif
8736                         skb = igb_run_xdp(adapter, rx_ring, &xdp);
8737                 }
8738
8739                 if (IS_ERR(skb)) {
8740                         unsigned int xdp_res = -PTR_ERR(skb);
8741
8742                         if (xdp_res & (IGB_XDP_TX | IGB_XDP_REDIR)) {
8743                                 xdp_xmit |= xdp_res;
8744                                 igb_rx_buffer_flip(rx_ring, rx_buffer, size);
8745                         } else {
8746                                 rx_buffer->pagecnt_bias++;
8747                         }
8748                         total_packets++;
8749                         total_bytes += size;
8750                 } else if (skb)
8751                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8752                 else if (ring_uses_build_skb(rx_ring))
8753                         skb = igb_build_skb(rx_ring, rx_buffer, &xdp,
8754                                             timestamp);
8755                 else
8756                         skb = igb_construct_skb(rx_ring, rx_buffer,
8757                                                 &xdp, timestamp);
8758
8759                 /* exit if we failed to retrieve a buffer */
8760                 if (!skb) {
8761                         rx_ring->rx_stats.alloc_failed++;
8762                         rx_buffer->pagecnt_bias++;
8763                         break;
8764                 }
8765
8766                 igb_put_rx_buffer(rx_ring, rx_buffer, rx_buf_pgcnt);
8767                 cleaned_count++;
8768
8769                 /* fetch next buffer in frame if non-eop */
8770                 if (igb_is_non_eop(rx_ring, rx_desc))
8771                         continue;
8772
8773                 /* verify the packet layout is correct */
8774                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8775                         skb = NULL;
8776                         continue;
8777                 }
8778
8779                 /* probably a little skewed due to removing CRC */
8780                 total_bytes += skb->len;
8781
8782                 /* populate checksum, timestamp, VLAN, and protocol */
8783                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8784
8785                 napi_gro_receive(&q_vector->napi, skb);
8786
8787                 /* reset skb pointer */
8788                 skb = NULL;
8789
8790                 /* update budget accounting */
8791                 total_packets++;
8792         }
8793
8794         /* place incomplete frames back on ring for completion */
8795         rx_ring->skb = skb;
8796
8797         if (xdp_xmit & IGB_XDP_REDIR)
8798                 xdp_do_flush();
8799
8800         if (xdp_xmit & IGB_XDP_TX) {
8801                 struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);
8802
8803                 igb_xdp_ring_update_tail(tx_ring);
8804         }
8805
8806         u64_stats_update_begin(&rx_ring->rx_syncp);
8807         rx_ring->rx_stats.packets += total_packets;
8808         rx_ring->rx_stats.bytes += total_bytes;
8809         u64_stats_update_end(&rx_ring->rx_syncp);
8810         q_vector->rx.total_packets += total_packets;
8811         q_vector->rx.total_bytes += total_bytes;
8812
8813         if (cleaned_count)
8814                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8815
8816         return total_packets;
8817 }
8818
8819 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8820                                   struct igb_rx_buffer *bi)
8821 {
8822         struct page *page = bi->page;
8823         dma_addr_t dma;
8824
8825         /* since we are recycling buffers we should seldom need to alloc */
8826         if (likely(page))
8827                 return true;
8828
8829         /* alloc new page for storage */
8830         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
8831         if (unlikely(!page)) {
8832                 rx_ring->rx_stats.alloc_failed++;
8833                 return false;
8834         }
8835
8836         /* map page for use */
8837         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
8838                                  igb_rx_pg_size(rx_ring),
8839                                  DMA_FROM_DEVICE,
8840                                  IGB_RX_DMA_ATTR);
8841
8842         /* if mapping failed free memory back to system since
8843          * there isn't much point in holding memory we can't use
8844          */
8845         if (dma_mapping_error(rx_ring->dev, dma)) {
8846                 __free_pages(page, igb_rx_pg_order(rx_ring));
8847
8848                 rx_ring->rx_stats.alloc_failed++;
8849                 return false;
8850         }
8851
8852         bi->dma = dma;
8853         bi->page = page;
8854         bi->page_offset = igb_rx_offset(rx_ring);
8855         page_ref_add(page, USHRT_MAX - 1);
8856         bi->pagecnt_bias = USHRT_MAX;
8857
8858         return true;
8859 }
8860
8861 /**
8862  *  igb_alloc_rx_buffers - Replace used receive buffers
8863  *  @rx_ring: rx descriptor ring to allocate new receive buffers
8864  *  @cleaned_count: count of buffers to allocate
8865  **/
8866 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8867 {
8868         union e1000_adv_rx_desc *rx_desc;
8869         struct igb_rx_buffer *bi;
8870         u16 i = rx_ring->next_to_use;
8871         u16 bufsz;
8872
8873         /* nothing to do */
8874         if (!cleaned_count)
8875                 return;
8876
8877         rx_desc = IGB_RX_DESC(rx_ring, i);
8878         bi = &rx_ring->rx_buffer_info[i];
8879         i -= rx_ring->count;
8880
8881         bufsz = igb_rx_bufsz(rx_ring);
8882
8883         do {
8884                 if (!igb_alloc_mapped_page(rx_ring, bi))
8885                         break;
8886
8887                 /* sync the buffer for use by the device */
8888                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
8889                                                  bi->page_offset, bufsz,
8890                                                  DMA_FROM_DEVICE);
8891
8892                 /* Refresh the desc even if buffer_addrs didn't change
8893                  * because each write-back erases this info.
8894                  */
8895                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8896
8897                 rx_desc++;
8898                 bi++;
8899                 i++;
8900                 if (unlikely(!i)) {
8901                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8902                         bi = rx_ring->rx_buffer_info;
8903                         i -= rx_ring->count;
8904                 }
8905
8906                 /* clear the length for the next_to_use descriptor */
8907                 rx_desc->wb.upper.length = 0;
8908
8909                 cleaned_count--;
8910         } while (cleaned_count);
8911
8912         i += rx_ring->count;
8913
8914         if (rx_ring->next_to_use != i) {
8915                 /* record the next descriptor to use */
8916                 rx_ring->next_to_use = i;
8917
8918                 /* update next to alloc since we have filled the ring */
8919                 rx_ring->next_to_alloc = i;
8920
8921                 /* Force memory writes to complete before letting h/w
8922                  * know there are new descriptors to fetch.  (Only
8923                  * applicable for weak-ordered memory model archs,
8924                  * such as IA-64).
8925                  */
8926                 dma_wmb();
8927                 writel(i, rx_ring->tail);
8928         }
8929 }
8930
8931 /**
8932  * igb_mii_ioctl -
8933  * @netdev: pointer to netdev struct
8934  * @ifr: interface structure
8935  * @cmd: ioctl command to execute
8936  **/
8937 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8938 {
8939         struct igb_adapter *adapter = netdev_priv(netdev);
8940         struct mii_ioctl_data *data = if_mii(ifr);
8941
8942         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8943                 return -EOPNOTSUPP;
8944
8945         switch (cmd) {
8946         case SIOCGMIIPHY:
8947                 data->phy_id = adapter->hw.phy.addr;
8948                 break;
8949         case SIOCGMIIREG:
8950                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8951                                      &data->val_out))
8952                         return -EIO;
8953                 break;
8954         case SIOCSMIIREG:
8955         default:
8956                 return -EOPNOTSUPP;
8957         }
8958         return 0;
8959 }
8960
8961 /**
8962  * igb_ioctl -
8963  * @netdev: pointer to netdev struct
8964  * @ifr: interface structure
8965  * @cmd: ioctl command to execute
8966  **/
8967 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8968 {
8969         switch (cmd) {
8970         case SIOCGMIIPHY:
8971         case SIOCGMIIREG:
8972         case SIOCSMIIREG:
8973                 return igb_mii_ioctl(netdev, ifr, cmd);
8974         case SIOCGHWTSTAMP:
8975                 return igb_ptp_get_ts_config(netdev, ifr);
8976         case SIOCSHWTSTAMP:
8977                 return igb_ptp_set_ts_config(netdev, ifr);
8978         default:
8979                 return -EOPNOTSUPP;
8980         }
8981 }
8982
8983 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8984 {
8985         struct igb_adapter *adapter = hw->back;
8986
8987         pci_read_config_word(adapter->pdev, reg, value);
8988 }
8989
8990 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8991 {
8992         struct igb_adapter *adapter = hw->back;
8993
8994         pci_write_config_word(adapter->pdev, reg, *value);
8995 }
8996
8997 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8998 {
8999         struct igb_adapter *adapter = hw->back;
9000
9001         if (pcie_capability_read_word(adapter->pdev, reg, value))
9002                 return -E1000_ERR_CONFIG;
9003
9004         return 0;
9005 }
9006
9007 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9008 {
9009         struct igb_adapter *adapter = hw->back;
9010
9011         if (pcie_capability_write_word(adapter->pdev, reg, *value))
9012                 return -E1000_ERR_CONFIG;
9013
9014         return 0;
9015 }
9016
9017 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
9018 {
9019         struct igb_adapter *adapter = netdev_priv(netdev);
9020         struct e1000_hw *hw = &adapter->hw;
9021         u32 ctrl, rctl;
9022         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
9023
9024         if (enable) {
9025                 /* enable VLAN tag insert/strip */
9026                 ctrl = rd32(E1000_CTRL);
9027                 ctrl |= E1000_CTRL_VME;
9028                 wr32(E1000_CTRL, ctrl);
9029
9030                 /* Disable CFI check */
9031                 rctl = rd32(E1000_RCTL);
9032                 rctl &= ~E1000_RCTL_CFIEN;
9033                 wr32(E1000_RCTL, rctl);
9034         } else {
9035                 /* disable VLAN tag insert/strip */
9036                 ctrl = rd32(E1000_CTRL);
9037                 ctrl &= ~E1000_CTRL_VME;
9038                 wr32(E1000_CTRL, ctrl);
9039         }
9040
9041         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
9042 }
9043
9044 static int igb_vlan_rx_add_vid(struct net_device *netdev,
9045                                __be16 proto, u16 vid)
9046 {
9047         struct igb_adapter *adapter = netdev_priv(netdev);
9048         struct e1000_hw *hw = &adapter->hw;
9049         int pf_id = adapter->vfs_allocated_count;
9050
9051         /* add the filter since PF can receive vlans w/o entry in vlvf */
9052         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9053                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
9054
9055         set_bit(vid, adapter->active_vlans);
9056
9057         return 0;
9058 }
9059
9060 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
9061                                 __be16 proto, u16 vid)
9062 {
9063         struct igb_adapter *adapter = netdev_priv(netdev);
9064         int pf_id = adapter->vfs_allocated_count;
9065         struct e1000_hw *hw = &adapter->hw;
9066
9067         /* remove VID from filter table */
9068         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9069                 igb_vfta_set(hw, vid, pf_id, false, true);
9070
9071         clear_bit(vid, adapter->active_vlans);
9072
9073         return 0;
9074 }
9075
9076 static void igb_restore_vlan(struct igb_adapter *adapter)
9077 {
9078         u16 vid = 1;
9079
9080         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
9081         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
9082
9083         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
9084                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
9085 }
9086
9087 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
9088 {
9089         struct pci_dev *pdev = adapter->pdev;
9090         struct e1000_mac_info *mac = &adapter->hw.mac;
9091
9092         mac->autoneg = 0;
9093
9094         /* Make sure dplx is at most 1 bit and lsb of speed is not set
9095          * for the switch() below to work
9096          */
9097         if ((spd & 1) || (dplx & ~1))
9098                 goto err_inval;
9099
9100         /* Fiber NIC's only allow 1000 gbps Full duplex
9101          * and 100Mbps Full duplex for 100baseFx sfp
9102          */
9103         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
9104                 switch (spd + dplx) {
9105                 case SPEED_10 + DUPLEX_HALF:
9106                 case SPEED_10 + DUPLEX_FULL:
9107                 case SPEED_100 + DUPLEX_HALF:
9108                         goto err_inval;
9109                 default:
9110                         break;
9111                 }
9112         }
9113
9114         switch (spd + dplx) {
9115         case SPEED_10 + DUPLEX_HALF:
9116                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
9117                 break;
9118         case SPEED_10 + DUPLEX_FULL:
9119                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
9120                 break;
9121         case SPEED_100 + DUPLEX_HALF:
9122                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
9123                 break;
9124         case SPEED_100 + DUPLEX_FULL:
9125                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
9126                 break;
9127         case SPEED_1000 + DUPLEX_FULL:
9128                 mac->autoneg = 1;
9129                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
9130                 break;
9131         case SPEED_1000 + DUPLEX_HALF: /* not supported */
9132         default:
9133                 goto err_inval;
9134         }
9135
9136         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
9137         adapter->hw.phy.mdix = AUTO_ALL_MODES;
9138
9139         return 0;
9140
9141 err_inval:
9142         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
9143         return -EINVAL;
9144 }
9145
9146 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
9147                           bool runtime)
9148 {
9149         struct net_device *netdev = pci_get_drvdata(pdev);
9150         struct igb_adapter *adapter = netdev_priv(netdev);
9151         struct e1000_hw *hw = &adapter->hw;
9152         u32 ctrl, rctl, status;
9153         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
9154         bool wake;
9155
9156         rtnl_lock();
9157         netif_device_detach(netdev);
9158
9159         if (netif_running(netdev))
9160                 __igb_close(netdev, true);
9161
9162         igb_ptp_suspend(adapter);
9163
9164         igb_clear_interrupt_scheme(adapter);
9165         rtnl_unlock();
9166
9167         status = rd32(E1000_STATUS);
9168         if (status & E1000_STATUS_LU)
9169                 wufc &= ~E1000_WUFC_LNKC;
9170
9171         if (wufc) {
9172                 igb_setup_rctl(adapter);
9173                 igb_set_rx_mode(netdev);
9174
9175                 /* turn on all-multi mode if wake on multicast is enabled */
9176                 if (wufc & E1000_WUFC_MC) {
9177                         rctl = rd32(E1000_RCTL);
9178                         rctl |= E1000_RCTL_MPE;
9179                         wr32(E1000_RCTL, rctl);
9180                 }
9181
9182                 ctrl = rd32(E1000_CTRL);
9183                 ctrl |= E1000_CTRL_ADVD3WUC;
9184                 wr32(E1000_CTRL, ctrl);
9185
9186                 /* Allow time for pending master requests to run */
9187                 igb_disable_pcie_master(hw);
9188
9189                 wr32(E1000_WUC, E1000_WUC_PME_EN);
9190                 wr32(E1000_WUFC, wufc);
9191         } else {
9192                 wr32(E1000_WUC, 0);
9193                 wr32(E1000_WUFC, 0);
9194         }
9195
9196         wake = wufc || adapter->en_mng_pt;
9197         if (!wake)
9198                 igb_power_down_link(adapter);
9199         else
9200                 igb_power_up_link(adapter);
9201
9202         if (enable_wake)
9203                 *enable_wake = wake;
9204
9205         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
9206          * would have already happened in close and is redundant.
9207          */
9208         igb_release_hw_control(adapter);
9209
9210         pci_disable_device(pdev);
9211
9212         return 0;
9213 }
9214
9215 static void igb_deliver_wake_packet(struct net_device *netdev)
9216 {
9217         struct igb_adapter *adapter = netdev_priv(netdev);
9218         struct e1000_hw *hw = &adapter->hw;
9219         struct sk_buff *skb;
9220         u32 wupl;
9221
9222         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
9223
9224         /* WUPM stores only the first 128 bytes of the wake packet.
9225          * Read the packet only if we have the whole thing.
9226          */
9227         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
9228                 return;
9229
9230         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
9231         if (!skb)
9232                 return;
9233
9234         skb_put(skb, wupl);
9235
9236         /* Ensure reads are 32-bit aligned */
9237         wupl = roundup(wupl, 4);
9238
9239         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
9240
9241         skb->protocol = eth_type_trans(skb, netdev);
9242         netif_rx(skb);
9243 }
9244
9245 static int __maybe_unused igb_suspend(struct device *dev)
9246 {
9247         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
9248 }
9249
9250 static int __maybe_unused igb_resume(struct device *dev)
9251 {
9252         struct pci_dev *pdev = to_pci_dev(dev);
9253         struct net_device *netdev = pci_get_drvdata(pdev);
9254         struct igb_adapter *adapter = netdev_priv(netdev);
9255         struct e1000_hw *hw = &adapter->hw;
9256         u32 err, val;
9257
9258         pci_set_power_state(pdev, PCI_D0);
9259         pci_restore_state(pdev);
9260         pci_save_state(pdev);
9261
9262         if (!pci_device_is_present(pdev))
9263                 return -ENODEV;
9264         err = pci_enable_device_mem(pdev);
9265         if (err) {
9266                 dev_err(&pdev->dev,
9267                         "igb: Cannot enable PCI device from suspend\n");
9268                 return err;
9269         }
9270         pci_set_master(pdev);
9271
9272         pci_enable_wake(pdev, PCI_D3hot, 0);
9273         pci_enable_wake(pdev, PCI_D3cold, 0);
9274
9275         if (igb_init_interrupt_scheme(adapter, true)) {
9276                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9277                 return -ENOMEM;
9278         }
9279
9280         igb_reset(adapter);
9281
9282         /* let the f/w know that the h/w is now under the control of the
9283          * driver.
9284          */
9285         igb_get_hw_control(adapter);
9286
9287         val = rd32(E1000_WUS);
9288         if (val & WAKE_PKT_WUS)
9289                 igb_deliver_wake_packet(netdev);
9290
9291         wr32(E1000_WUS, ~0);
9292
9293         rtnl_lock();
9294         if (!err && netif_running(netdev))
9295                 err = __igb_open(netdev, true);
9296
9297         if (!err)
9298                 netif_device_attach(netdev);
9299         rtnl_unlock();
9300
9301         return err;
9302 }
9303
9304 static int __maybe_unused igb_runtime_idle(struct device *dev)
9305 {
9306         struct net_device *netdev = dev_get_drvdata(dev);
9307         struct igb_adapter *adapter = netdev_priv(netdev);
9308
9309         if (!igb_has_link(adapter))
9310                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9311
9312         return -EBUSY;
9313 }
9314
9315 static int __maybe_unused igb_runtime_suspend(struct device *dev)
9316 {
9317         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
9318 }
9319
9320 static int __maybe_unused igb_runtime_resume(struct device *dev)
9321 {
9322         return igb_resume(dev);
9323 }
9324
9325 static void igb_shutdown(struct pci_dev *pdev)
9326 {
9327         bool wake;
9328
9329         __igb_shutdown(pdev, &wake, 0);
9330
9331         if (system_state == SYSTEM_POWER_OFF) {
9332                 pci_wake_from_d3(pdev, wake);
9333                 pci_set_power_state(pdev, PCI_D3hot);
9334         }
9335 }
9336
9337 #ifdef CONFIG_PCI_IOV
9338 static int igb_sriov_reinit(struct pci_dev *dev)
9339 {
9340         struct net_device *netdev = pci_get_drvdata(dev);
9341         struct igb_adapter *adapter = netdev_priv(netdev);
9342         struct pci_dev *pdev = adapter->pdev;
9343
9344         rtnl_lock();
9345
9346         if (netif_running(netdev))
9347                 igb_close(netdev);
9348         else
9349                 igb_reset(adapter);
9350
9351         igb_clear_interrupt_scheme(adapter);
9352
9353         igb_init_queue_configuration(adapter);
9354
9355         if (igb_init_interrupt_scheme(adapter, true)) {
9356                 rtnl_unlock();
9357                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9358                 return -ENOMEM;
9359         }
9360
9361         if (netif_running(netdev))
9362                 igb_open(netdev);
9363
9364         rtnl_unlock();
9365
9366         return 0;
9367 }
9368
9369 static int igb_pci_disable_sriov(struct pci_dev *dev)
9370 {
9371         int err = igb_disable_sriov(dev);
9372
9373         if (!err)
9374                 err = igb_sriov_reinit(dev);
9375
9376         return err;
9377 }
9378
9379 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
9380 {
9381         int err = igb_enable_sriov(dev, num_vfs);
9382
9383         if (err)
9384                 goto out;
9385
9386         err = igb_sriov_reinit(dev);
9387         if (!err)
9388                 return num_vfs;
9389
9390 out:
9391         return err;
9392 }
9393
9394 #endif
9395 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9396 {
9397 #ifdef CONFIG_PCI_IOV
9398         if (num_vfs == 0)
9399                 return igb_pci_disable_sriov(dev);
9400         else
9401                 return igb_pci_enable_sriov(dev, num_vfs);
9402 #endif
9403         return 0;
9404 }
9405
9406 /**
9407  *  igb_io_error_detected - called when PCI error is detected
9408  *  @pdev: Pointer to PCI device
9409  *  @state: The current pci connection state
9410  *
9411  *  This function is called after a PCI bus error affecting
9412  *  this device has been detected.
9413  **/
9414 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9415                                               pci_channel_state_t state)
9416 {
9417         struct net_device *netdev = pci_get_drvdata(pdev);
9418         struct igb_adapter *adapter = netdev_priv(netdev);
9419
9420         netif_device_detach(netdev);
9421
9422         if (state == pci_channel_io_perm_failure)
9423                 return PCI_ERS_RESULT_DISCONNECT;
9424
9425         if (netif_running(netdev))
9426                 igb_down(adapter);
9427         pci_disable_device(pdev);
9428
9429         /* Request a slot slot reset. */
9430         return PCI_ERS_RESULT_NEED_RESET;
9431 }
9432
9433 /**
9434  *  igb_io_slot_reset - called after the pci bus has been reset.
9435  *  @pdev: Pointer to PCI device
9436  *
9437  *  Restart the card from scratch, as if from a cold-boot. Implementation
9438  *  resembles the first-half of the igb_resume routine.
9439  **/
9440 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9441 {
9442         struct net_device *netdev = pci_get_drvdata(pdev);
9443         struct igb_adapter *adapter = netdev_priv(netdev);
9444         struct e1000_hw *hw = &adapter->hw;
9445         pci_ers_result_t result;
9446
9447         if (pci_enable_device_mem(pdev)) {
9448                 dev_err(&pdev->dev,
9449                         "Cannot re-enable PCI device after reset.\n");
9450                 result = PCI_ERS_RESULT_DISCONNECT;
9451         } else {
9452                 pci_set_master(pdev);
9453                 pci_restore_state(pdev);
9454                 pci_save_state(pdev);
9455
9456                 pci_enable_wake(pdev, PCI_D3hot, 0);
9457                 pci_enable_wake(pdev, PCI_D3cold, 0);
9458
9459                 /* In case of PCI error, adapter lose its HW address
9460                  * so we should re-assign it here.
9461                  */
9462                 hw->hw_addr = adapter->io_addr;
9463
9464                 igb_reset(adapter);
9465                 wr32(E1000_WUS, ~0);
9466                 result = PCI_ERS_RESULT_RECOVERED;
9467         }
9468
9469         return result;
9470 }
9471
9472 /**
9473  *  igb_io_resume - called when traffic can start flowing again.
9474  *  @pdev: Pointer to PCI device
9475  *
9476  *  This callback is called when the error recovery driver tells us that
9477  *  its OK to resume normal operation. Implementation resembles the
9478  *  second-half of the igb_resume routine.
9479  */
9480 static void igb_io_resume(struct pci_dev *pdev)
9481 {
9482         struct net_device *netdev = pci_get_drvdata(pdev);
9483         struct igb_adapter *adapter = netdev_priv(netdev);
9484
9485         if (netif_running(netdev)) {
9486                 if (igb_up(adapter)) {
9487                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9488                         return;
9489                 }
9490         }
9491
9492         netif_device_attach(netdev);
9493
9494         /* let the f/w know that the h/w is now under the control of the
9495          * driver.
9496          */
9497         igb_get_hw_control(adapter);
9498 }
9499
9500 /**
9501  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9502  *  @adapter: Pointer to adapter structure
9503  *  @index: Index of the RAR entry which need to be synced with MAC table
9504  **/
9505 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9506 {
9507         struct e1000_hw *hw = &adapter->hw;
9508         u32 rar_low, rar_high;
9509         u8 *addr = adapter->mac_table[index].addr;
9510
9511         /* HW expects these to be in network order when they are plugged
9512          * into the registers which are little endian.  In order to guarantee
9513          * that ordering we need to do an leXX_to_cpup here in order to be
9514          * ready for the byteswap that occurs with writel
9515          */
9516         rar_low = le32_to_cpup((__le32 *)(addr));
9517         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9518
9519         /* Indicate to hardware the Address is Valid. */
9520         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9521                 if (is_valid_ether_addr(addr))
9522                         rar_high |= E1000_RAH_AV;
9523
9524                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9525                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9526
9527                 switch (hw->mac.type) {
9528                 case e1000_82575:
9529                 case e1000_i210:
9530                         if (adapter->mac_table[index].state &
9531                             IGB_MAC_STATE_QUEUE_STEERING)
9532                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9533
9534                         rar_high |= E1000_RAH_POOL_1 *
9535                                     adapter->mac_table[index].queue;
9536                         break;
9537                 default:
9538                         rar_high |= E1000_RAH_POOL_1 <<
9539                                     adapter->mac_table[index].queue;
9540                         break;
9541                 }
9542         }
9543
9544         wr32(E1000_RAL(index), rar_low);
9545         wrfl();
9546         wr32(E1000_RAH(index), rar_high);
9547         wrfl();
9548 }
9549
9550 static int igb_set_vf_mac(struct igb_adapter *adapter,
9551                           int vf, unsigned char *mac_addr)
9552 {
9553         struct e1000_hw *hw = &adapter->hw;
9554         /* VF MAC addresses start at end of receive addresses and moves
9555          * towards the first, as a result a collision should not be possible
9556          */
9557         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9558         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9559
9560         ether_addr_copy(vf_mac_addr, mac_addr);
9561         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9562         adapter->mac_table[rar_entry].queue = vf;
9563         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9564         igb_rar_set_index(adapter, rar_entry);
9565
9566         return 0;
9567 }
9568
9569 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9570 {
9571         struct igb_adapter *adapter = netdev_priv(netdev);
9572
9573         if (vf >= adapter->vfs_allocated_count)
9574                 return -EINVAL;
9575
9576         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9577          * flag and allows to overwrite the MAC via VF netdev.  This
9578          * is necessary to allow libvirt a way to restore the original
9579          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9580          * down a VM.
9581          */
9582         if (is_zero_ether_addr(mac)) {
9583                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9584                 dev_info(&adapter->pdev->dev,
9585                          "remove administratively set MAC on VF %d\n",
9586                          vf);
9587         } else if (is_valid_ether_addr(mac)) {
9588                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9589                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9590                          mac, vf);
9591                 dev_info(&adapter->pdev->dev,
9592                          "Reload the VF driver to make this change effective.");
9593                 /* Generate additional warning if PF is down */
9594                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9595                         dev_warn(&adapter->pdev->dev,
9596                                  "The VF MAC address has been set, but the PF device is not up.\n");
9597                         dev_warn(&adapter->pdev->dev,
9598                                  "Bring the PF device up before attempting to use the VF device.\n");
9599                 }
9600         } else {
9601                 return -EINVAL;
9602         }
9603         return igb_set_vf_mac(adapter, vf, mac);
9604 }
9605
9606 static int igb_link_mbps(int internal_link_speed)
9607 {
9608         switch (internal_link_speed) {
9609         case SPEED_100:
9610                 return 100;
9611         case SPEED_1000:
9612                 return 1000;
9613         default:
9614                 return 0;
9615         }
9616 }
9617
9618 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9619                                   int link_speed)
9620 {
9621         int rf_dec, rf_int;
9622         u32 bcnrc_val;
9623
9624         if (tx_rate != 0) {
9625                 /* Calculate the rate factor values to set */
9626                 rf_int = link_speed / tx_rate;
9627                 rf_dec = (link_speed - (rf_int * tx_rate));
9628                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9629                          tx_rate;
9630
9631                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9632                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9633                               E1000_RTTBCNRC_RF_INT_MASK);
9634                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9635         } else {
9636                 bcnrc_val = 0;
9637         }
9638
9639         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9640         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9641          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9642          */
9643         wr32(E1000_RTTBCNRM, 0x14);
9644         wr32(E1000_RTTBCNRC, bcnrc_val);
9645 }
9646
9647 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9648 {
9649         int actual_link_speed, i;
9650         bool reset_rate = false;
9651
9652         /* VF TX rate limit was not set or not supported */
9653         if ((adapter->vf_rate_link_speed == 0) ||
9654             (adapter->hw.mac.type != e1000_82576))
9655                 return;
9656
9657         actual_link_speed = igb_link_mbps(adapter->link_speed);
9658         if (actual_link_speed != adapter->vf_rate_link_speed) {
9659                 reset_rate = true;
9660                 adapter->vf_rate_link_speed = 0;
9661                 dev_info(&adapter->pdev->dev,
9662                          "Link speed has been changed. VF Transmit rate is disabled\n");
9663         }
9664
9665         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9666                 if (reset_rate)
9667                         adapter->vf_data[i].tx_rate = 0;
9668
9669                 igb_set_vf_rate_limit(&adapter->hw, i,
9670                                       adapter->vf_data[i].tx_rate,
9671                                       actual_link_speed);
9672         }
9673 }
9674
9675 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9676                              int min_tx_rate, int max_tx_rate)
9677 {
9678         struct igb_adapter *adapter = netdev_priv(netdev);
9679         struct e1000_hw *hw = &adapter->hw;
9680         int actual_link_speed;
9681
9682         if (hw->mac.type != e1000_82576)
9683                 return -EOPNOTSUPP;
9684
9685         if (min_tx_rate)
9686                 return -EINVAL;
9687
9688         actual_link_speed = igb_link_mbps(adapter->link_speed);
9689         if ((vf >= adapter->vfs_allocated_count) ||
9690             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9691             (max_tx_rate < 0) ||
9692             (max_tx_rate > actual_link_speed))
9693                 return -EINVAL;
9694
9695         adapter->vf_rate_link_speed = actual_link_speed;
9696         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9697         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9698
9699         return 0;
9700 }
9701
9702 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9703                                    bool setting)
9704 {
9705         struct igb_adapter *adapter = netdev_priv(netdev);
9706         struct e1000_hw *hw = &adapter->hw;
9707         u32 reg_val, reg_offset;
9708
9709         if (!adapter->vfs_allocated_count)
9710                 return -EOPNOTSUPP;
9711
9712         if (vf >= adapter->vfs_allocated_count)
9713                 return -EINVAL;
9714
9715         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9716         reg_val = rd32(reg_offset);
9717         if (setting)
9718                 reg_val |= (BIT(vf) |
9719                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9720         else
9721                 reg_val &= ~(BIT(vf) |
9722                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9723         wr32(reg_offset, reg_val);
9724
9725         adapter->vf_data[vf].spoofchk_enabled = setting;
9726         return 0;
9727 }
9728
9729 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9730 {
9731         struct igb_adapter *adapter = netdev_priv(netdev);
9732
9733         if (vf >= adapter->vfs_allocated_count)
9734                 return -EINVAL;
9735         if (adapter->vf_data[vf].trusted == setting)
9736                 return 0;
9737
9738         adapter->vf_data[vf].trusted = setting;
9739
9740         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9741                  vf, setting ? "" : "not ");
9742         return 0;
9743 }
9744
9745 static int igb_ndo_get_vf_config(struct net_device *netdev,
9746                                  int vf, struct ifla_vf_info *ivi)
9747 {
9748         struct igb_adapter *adapter = netdev_priv(netdev);
9749         if (vf >= adapter->vfs_allocated_count)
9750                 return -EINVAL;
9751         ivi->vf = vf;
9752         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9753         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9754         ivi->min_tx_rate = 0;
9755         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9756         ivi->qos = adapter->vf_data[vf].pf_qos;
9757         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9758         ivi->trusted = adapter->vf_data[vf].trusted;
9759         return 0;
9760 }
9761
9762 static void igb_vmm_control(struct igb_adapter *adapter)
9763 {
9764         struct e1000_hw *hw = &adapter->hw;
9765         u32 reg;
9766
9767         switch (hw->mac.type) {
9768         case e1000_82575:
9769         case e1000_i210:
9770         case e1000_i211:
9771         case e1000_i354:
9772         default:
9773                 /* replication is not supported for 82575 */
9774                 return;
9775         case e1000_82576:
9776                 /* notify HW that the MAC is adding vlan tags */
9777                 reg = rd32(E1000_DTXCTL);
9778                 reg |= E1000_DTXCTL_VLAN_ADDED;
9779                 wr32(E1000_DTXCTL, reg);
9780                 fallthrough;
9781         case e1000_82580:
9782                 /* enable replication vlan tag stripping */
9783                 reg = rd32(E1000_RPLOLR);
9784                 reg |= E1000_RPLOLR_STRVLAN;
9785                 wr32(E1000_RPLOLR, reg);
9786                 fallthrough;
9787         case e1000_i350:
9788                 /* none of the above registers are supported by i350 */
9789                 break;
9790         }
9791
9792         if (adapter->vfs_allocated_count) {
9793                 igb_vmdq_set_loopback_pf(hw, true);
9794                 igb_vmdq_set_replication_pf(hw, true);
9795                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9796                                               adapter->vfs_allocated_count);
9797         } else {
9798                 igb_vmdq_set_loopback_pf(hw, false);
9799                 igb_vmdq_set_replication_pf(hw, false);
9800         }
9801 }
9802
9803 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9804 {
9805         struct e1000_hw *hw = &adapter->hw;
9806         u32 dmac_thr;
9807         u16 hwm;
9808
9809         if (hw->mac.type > e1000_82580) {
9810                 if (adapter->flags & IGB_FLAG_DMAC) {
9811                         u32 reg;
9812
9813                         /* force threshold to 0. */
9814                         wr32(E1000_DMCTXTH, 0);
9815
9816                         /* DMA Coalescing high water mark needs to be greater
9817                          * than the Rx threshold. Set hwm to PBA - max frame
9818                          * size in 16B units, capping it at PBA - 6KB.
9819                          */
9820                         hwm = 64 * (pba - 6);
9821                         reg = rd32(E1000_FCRTC);
9822                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9823                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9824                                 & E1000_FCRTC_RTH_COAL_MASK);
9825                         wr32(E1000_FCRTC, reg);
9826
9827                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9828                          * frame size, capping it at PBA - 10KB.
9829                          */
9830                         dmac_thr = pba - 10;
9831                         reg = rd32(E1000_DMACR);
9832                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9833                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9834                                 & E1000_DMACR_DMACTHR_MASK);
9835
9836                         /* transition to L0x or L1 if available..*/
9837                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9838
9839                         /* watchdog timer= +-1000 usec in 32usec intervals */
9840                         reg |= (1000 >> 5);
9841
9842                         /* Disable BMC-to-OS Watchdog Enable */
9843                         if (hw->mac.type != e1000_i354)
9844                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9845
9846                         wr32(E1000_DMACR, reg);
9847
9848                         /* no lower threshold to disable
9849                          * coalescing(smart fifb)-UTRESH=0
9850                          */
9851                         wr32(E1000_DMCRTRH, 0);
9852
9853                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9854
9855                         wr32(E1000_DMCTLX, reg);
9856
9857                         /* free space in tx packet buffer to wake from
9858                          * DMA coal
9859                          */
9860                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9861                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9862
9863                         /* make low power state decision controlled
9864                          * by DMA coal
9865                          */
9866                         reg = rd32(E1000_PCIEMISC);
9867                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9868                         wr32(E1000_PCIEMISC, reg);
9869                 } /* endif adapter->dmac is not disabled */
9870         } else if (hw->mac.type == e1000_82580) {
9871                 u32 reg = rd32(E1000_PCIEMISC);
9872
9873                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
9874                 wr32(E1000_DMACR, 0);
9875         }
9876 }
9877
9878 /**
9879  *  igb_read_i2c_byte - Reads 8 bit word over I2C
9880  *  @hw: pointer to hardware structure
9881  *  @byte_offset: byte offset to read
9882  *  @dev_addr: device address
9883  *  @data: value read
9884  *
9885  *  Performs byte read operation over I2C interface at
9886  *  a specified device address.
9887  **/
9888 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9889                       u8 dev_addr, u8 *data)
9890 {
9891         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9892         struct i2c_client *this_client = adapter->i2c_client;
9893         s32 status;
9894         u16 swfw_mask = 0;
9895
9896         if (!this_client)
9897                 return E1000_ERR_I2C;
9898
9899         swfw_mask = E1000_SWFW_PHY0_SM;
9900
9901         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9902                 return E1000_ERR_SWFW_SYNC;
9903
9904         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9905         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9906
9907         if (status < 0)
9908                 return E1000_ERR_I2C;
9909         else {
9910                 *data = status;
9911                 return 0;
9912         }
9913 }
9914
9915 /**
9916  *  igb_write_i2c_byte - Writes 8 bit word over I2C
9917  *  @hw: pointer to hardware structure
9918  *  @byte_offset: byte offset to write
9919  *  @dev_addr: device address
9920  *  @data: value to write
9921  *
9922  *  Performs byte write operation over I2C interface at
9923  *  a specified device address.
9924  **/
9925 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9926                        u8 dev_addr, u8 data)
9927 {
9928         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9929         struct i2c_client *this_client = adapter->i2c_client;
9930         s32 status;
9931         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9932
9933         if (!this_client)
9934                 return E1000_ERR_I2C;
9935
9936         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9937                 return E1000_ERR_SWFW_SYNC;
9938         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9939         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9940
9941         if (status)
9942                 return E1000_ERR_I2C;
9943         else
9944                 return 0;
9945
9946 }
9947
9948 int igb_reinit_queues(struct igb_adapter *adapter)
9949 {
9950         struct net_device *netdev = adapter->netdev;
9951         struct pci_dev *pdev = adapter->pdev;
9952         int err = 0;
9953
9954         if (netif_running(netdev))
9955                 igb_close(netdev);
9956
9957         igb_reset_interrupt_capability(adapter);
9958
9959         if (igb_init_interrupt_scheme(adapter, true)) {
9960                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9961                 return -ENOMEM;
9962         }
9963
9964         if (netif_running(netdev))
9965                 err = igb_open(netdev);
9966
9967         return err;
9968 }
9969
9970 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
9971 {
9972         struct igb_nfc_filter *rule;
9973
9974         spin_lock(&adapter->nfc_lock);
9975
9976         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9977                 igb_erase_filter(adapter, rule);
9978
9979         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
9980                 igb_erase_filter(adapter, rule);
9981
9982         spin_unlock(&adapter->nfc_lock);
9983 }
9984
9985 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
9986 {
9987         struct igb_nfc_filter *rule;
9988
9989         spin_lock(&adapter->nfc_lock);
9990
9991         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9992                 igb_add_filter(adapter, rule);
9993
9994         spin_unlock(&adapter->nfc_lock);
9995 }
9996 /* igb_main.c */