1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 2
42 #define DRV_VERSION_BUILD 9
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
141 mem->va = kzalloc(size, GFP_KERNEL);
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156 /* it's ok to kfree a NULL pointer */
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
171 * Returns the base item index of the lump, or negative for error
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 pile->search_hint = i + j;
213 /* not enough, so skip over it and continue looking */
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
227 * Returns the count of items in the lump
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231 int valid_id = (id | I40E_PILE_VALID_BIT);
235 if (!pile || index >= pile->num_entries)
239 i < pile->num_entries && pile->list[i] == valid_id;
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
255 * If not already scheduled, this puts the task into the work queue
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
274 void i40e_tx_timeout(struct net_device *netdev)
276 static void i40e_tx_timeout(struct net_device *netdev)
279 struct i40e_netdev_priv *np = netdev_priv(netdev);
280 struct i40e_vsi *vsi = np->vsi;
281 struct i40e_pf *pf = vsi->back;
283 pf->tx_timeout_count++;
285 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
286 pf->tx_timeout_recovery_level = 1;
287 pf->tx_timeout_last_recovery = jiffies;
288 netdev_info(netdev, "tx_timeout recovery level %d\n",
289 pf->tx_timeout_recovery_level);
291 switch (pf->tx_timeout_recovery_level) {
293 /* disable and re-enable queues for the VSI */
294 if (in_interrupt()) {
295 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
296 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
298 i40e_vsi_reinit_locked(vsi);
302 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
305 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
308 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
311 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
312 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
313 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
316 i40e_service_event_schedule(pf);
317 pf->tx_timeout_recovery_level++;
321 * i40e_release_rx_desc - Store the new tail and head values
322 * @rx_ring: ring to bump
323 * @val: new head index
325 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
327 rx_ring->next_to_use = val;
329 /* Force memory writes to complete before letting h/w
330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
335 writel(val, rx_ring->tail);
339 * i40e_get_vsi_stats_struct - Get System Network Statistics
340 * @vsi: the VSI we care about
342 * Returns the address of the device statistics structure.
343 * The statistics are actually updated from the service task.
345 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
347 return &vsi->net_stats;
351 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
352 * @netdev: network interface device structure
354 * Returns the address of the device statistics structure.
355 * The statistics are actually updated from the service task.
358 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
359 struct net_device *netdev,
360 struct rtnl_link_stats64 *stats)
362 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
363 struct net_device *netdev,
364 struct rtnl_link_stats64 *stats)
367 struct i40e_netdev_priv *np = netdev_priv(netdev);
368 struct i40e_ring *tx_ring, *rx_ring;
369 struct i40e_vsi *vsi = np->vsi;
370 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
373 if (test_bit(__I40E_DOWN, &vsi->state))
380 for (i = 0; i < vsi->num_queue_pairs; i++) {
384 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
389 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
390 packets = tx_ring->stats.packets;
391 bytes = tx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
394 stats->tx_packets += packets;
395 stats->tx_bytes += bytes;
396 rx_ring = &tx_ring[1];
399 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
400 packets = rx_ring->stats.packets;
401 bytes = rx_ring->stats.bytes;
402 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
404 stats->rx_packets += packets;
405 stats->rx_bytes += bytes;
409 /* following stats updated by i40e_watchdog_subtask() */
410 stats->multicast = vsi_stats->multicast;
411 stats->tx_errors = vsi_stats->tx_errors;
412 stats->tx_dropped = vsi_stats->tx_dropped;
413 stats->rx_errors = vsi_stats->rx_errors;
414 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
415 stats->rx_length_errors = vsi_stats->rx_length_errors;
421 * i40e_vsi_reset_stats - Resets all stats of the given vsi
422 * @vsi: the VSI to have its stats reset
424 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
426 struct rtnl_link_stats64 *ns;
432 ns = i40e_get_vsi_stats_struct(vsi);
433 memset(ns, 0, sizeof(*ns));
434 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
435 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
436 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
437 if (vsi->rx_rings && vsi->rx_rings[0]) {
438 for (i = 0; i < vsi->num_queue_pairs; i++) {
439 memset(&vsi->rx_rings[i]->stats, 0 ,
440 sizeof(vsi->rx_rings[i]->stats));
441 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
442 sizeof(vsi->rx_rings[i]->rx_stats));
443 memset(&vsi->tx_rings[i]->stats, 0 ,
444 sizeof(vsi->tx_rings[i]->stats));
445 memset(&vsi->tx_rings[i]->tx_stats, 0,
446 sizeof(vsi->tx_rings[i]->tx_stats));
449 vsi->stat_offsets_loaded = false;
453 * i40e_pf_reset_stats - Reset all of the stats for the given pf
454 * @pf: the PF to be reset
456 void i40e_pf_reset_stats(struct i40e_pf *pf)
460 memset(&pf->stats, 0, sizeof(pf->stats));
461 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
462 pf->stat_offsets_loaded = false;
464 for (i = 0; i < I40E_MAX_VEB; i++) {
466 memset(&pf->veb[i]->stats, 0,
467 sizeof(pf->veb[i]->stats));
468 memset(&pf->veb[i]->stats_offsets, 0,
469 sizeof(pf->veb[i]->stats_offsets));
470 pf->veb[i]->stat_offsets_loaded = false;
476 * i40e_stat_update48 - read and update a 48 bit stat from the chip
477 * @hw: ptr to the hardware info
478 * @hireg: the high 32 bit reg to read
479 * @loreg: the low 32 bit reg to read
480 * @offset_loaded: has the initial offset been loaded yet
481 * @offset: ptr to current offset value
482 * @stat: ptr to the stat
484 * Since the device stats are not reset at PFReset, they likely will not
485 * be zeroed when the driver starts. We'll save the first values read
486 * and use them as offsets to be subtracted from the raw values in order
487 * to report stats that count from zero. In the process, we also manage
488 * the potential roll-over.
490 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
491 bool offset_loaded, u64 *offset, u64 *stat)
495 if (hw->device_id == I40E_DEV_ID_QEMU) {
496 new_data = rd32(hw, loreg);
497 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
499 new_data = rd64(hw, loreg);
503 if (likely(new_data >= *offset))
504 *stat = new_data - *offset;
506 *stat = (new_data + ((u64)1 << 48)) - *offset;
507 *stat &= 0xFFFFFFFFFFFFULL;
511 * i40e_stat_update32 - read and update a 32 bit stat from the chip
512 * @hw: ptr to the hardware info
513 * @reg: the hw reg to read
514 * @offset_loaded: has the initial offset been loaded yet
515 * @offset: ptr to current offset value
516 * @stat: ptr to the stat
518 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
519 bool offset_loaded, u64 *offset, u64 *stat)
523 new_data = rd32(hw, reg);
526 if (likely(new_data >= *offset))
527 *stat = (u32)(new_data - *offset);
529 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
533 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
534 * @vsi: the VSI to be updated
536 void i40e_update_eth_stats(struct i40e_vsi *vsi)
538 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
539 struct i40e_pf *pf = vsi->back;
540 struct i40e_hw *hw = &pf->hw;
541 struct i40e_eth_stats *oes;
542 struct i40e_eth_stats *es; /* device's eth stats */
544 es = &vsi->eth_stats;
545 oes = &vsi->eth_stats_offsets;
547 /* Gather up the stats that the hw collects */
548 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
549 vsi->stat_offsets_loaded,
550 &oes->tx_errors, &es->tx_errors);
551 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_discards, &es->rx_discards);
554 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
555 vsi->stat_offsets_loaded,
556 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
557 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
558 vsi->stat_offsets_loaded,
559 &oes->tx_errors, &es->tx_errors);
561 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
562 I40E_GLV_GORCL(stat_idx),
563 vsi->stat_offsets_loaded,
564 &oes->rx_bytes, &es->rx_bytes);
565 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
566 I40E_GLV_UPRCL(stat_idx),
567 vsi->stat_offsets_loaded,
568 &oes->rx_unicast, &es->rx_unicast);
569 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
570 I40E_GLV_MPRCL(stat_idx),
571 vsi->stat_offsets_loaded,
572 &oes->rx_multicast, &es->rx_multicast);
573 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
574 I40E_GLV_BPRCL(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_broadcast, &es->rx_broadcast);
578 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
579 I40E_GLV_GOTCL(stat_idx),
580 vsi->stat_offsets_loaded,
581 &oes->tx_bytes, &es->tx_bytes);
582 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
583 I40E_GLV_UPTCL(stat_idx),
584 vsi->stat_offsets_loaded,
585 &oes->tx_unicast, &es->tx_unicast);
586 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
587 I40E_GLV_MPTCL(stat_idx),
588 vsi->stat_offsets_loaded,
589 &oes->tx_multicast, &es->tx_multicast);
590 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
591 I40E_GLV_BPTCL(stat_idx),
592 vsi->stat_offsets_loaded,
593 &oes->tx_broadcast, &es->tx_broadcast);
594 vsi->stat_offsets_loaded = true;
598 * i40e_update_veb_stats - Update Switch component statistics
599 * @veb: the VEB being updated
601 static void i40e_update_veb_stats(struct i40e_veb *veb)
603 struct i40e_pf *pf = veb->pf;
604 struct i40e_hw *hw = &pf->hw;
605 struct i40e_eth_stats *oes;
606 struct i40e_eth_stats *es; /* device's eth stats */
609 idx = veb->stats_idx;
611 oes = &veb->stats_offsets;
613 /* Gather up the stats that the hw collects */
614 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_discards, &es->tx_discards);
617 if (hw->revision_id > 0)
618 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
619 veb->stat_offsets_loaded,
620 &oes->rx_unknown_protocol,
621 &es->rx_unknown_protocol);
622 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
623 veb->stat_offsets_loaded,
624 &oes->rx_bytes, &es->rx_bytes);
625 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
626 veb->stat_offsets_loaded,
627 &oes->rx_unicast, &es->rx_unicast);
628 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
629 veb->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
632 veb->stat_offsets_loaded,
633 &oes->rx_broadcast, &es->rx_broadcast);
635 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
636 veb->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
639 veb->stat_offsets_loaded,
640 &oes->tx_unicast, &es->tx_unicast);
641 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
642 veb->stat_offsets_loaded,
643 &oes->tx_multicast, &es->tx_multicast);
644 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
645 veb->stat_offsets_loaded,
646 &oes->tx_broadcast, &es->tx_broadcast);
647 veb->stat_offsets_loaded = true;
652 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
653 * @vsi: the VSI that is capable of doing FCoE
655 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
657 struct i40e_pf *pf = vsi->back;
658 struct i40e_hw *hw = &pf->hw;
659 struct i40e_fcoe_stats *ofs;
660 struct i40e_fcoe_stats *fs; /* device's eth stats */
663 if (vsi->type != I40E_VSI_FCOE)
666 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
667 fs = &vsi->fcoe_stats;
668 ofs = &vsi->fcoe_stats_offsets;
670 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
671 vsi->fcoe_stat_offsets_loaded,
672 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
673 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
674 vsi->fcoe_stat_offsets_loaded,
675 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
676 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
677 vsi->fcoe_stat_offsets_loaded,
678 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
679 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
680 vsi->fcoe_stat_offsets_loaded,
681 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
682 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
683 vsi->fcoe_stat_offsets_loaded,
684 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
685 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
686 vsi->fcoe_stat_offsets_loaded,
687 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
688 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
689 vsi->fcoe_stat_offsets_loaded,
690 &ofs->fcoe_last_error, &fs->fcoe_last_error);
691 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
692 vsi->fcoe_stat_offsets_loaded,
693 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
695 vsi->fcoe_stat_offsets_loaded = true;
700 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
701 * @pf: the corresponding PF
703 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
705 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
707 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
708 struct i40e_hw_port_stats *nsd = &pf->stats;
709 struct i40e_hw *hw = &pf->hw;
713 if ((hw->fc.current_mode != I40E_FC_FULL) &&
714 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
717 xoff = nsd->link_xoff_rx;
718 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
719 pf->stat_offsets_loaded,
720 &osd->link_xoff_rx, &nsd->link_xoff_rx);
722 /* No new LFC xoff rx */
723 if (!(nsd->link_xoff_rx - xoff))
726 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
727 for (v = 0; v < pf->num_alloc_vsi; v++) {
728 struct i40e_vsi *vsi = pf->vsi[v];
730 if (!vsi || !vsi->tx_rings[0])
733 for (i = 0; i < vsi->num_queue_pairs; i++) {
734 struct i40e_ring *ring = vsi->tx_rings[i];
735 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
741 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
742 * @pf: the corresponding PF
744 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
746 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
748 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
749 struct i40e_hw_port_stats *nsd = &pf->stats;
750 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
751 struct i40e_dcbx_config *dcb_cfg;
752 struct i40e_hw *hw = &pf->hw;
756 dcb_cfg = &hw->local_dcbx_config;
758 /* See if DCB enabled with PFC TC */
759 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
760 !(dcb_cfg->pfc.pfcenable)) {
761 i40e_update_link_xoff_rx(pf);
765 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
766 u64 prio_xoff = nsd->priority_xoff_rx[i];
767 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
768 pf->stat_offsets_loaded,
769 &osd->priority_xoff_rx[i],
770 &nsd->priority_xoff_rx[i]);
772 /* No new PFC xoff rx */
773 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
775 /* Get the TC for given priority */
776 tc = dcb_cfg->etscfg.prioritytable[i];
780 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
781 for (v = 0; v < pf->num_alloc_vsi; v++) {
782 struct i40e_vsi *vsi = pf->vsi[v];
784 if (!vsi || !vsi->tx_rings[0])
787 for (i = 0; i < vsi->num_queue_pairs; i++) {
788 struct i40e_ring *ring = vsi->tx_rings[i];
792 clear_bit(__I40E_HANG_CHECK_ARMED,
799 * i40e_update_vsi_stats - Update the vsi statistics counters.
800 * @vsi: the VSI to be updated
802 * There are a few instances where we store the same stat in a
803 * couple of different structs. This is partly because we have
804 * the netdev stats that need to be filled out, which is slightly
805 * different from the "eth_stats" defined by the chip and used in
806 * VF communications. We sort it out here.
808 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
810 struct i40e_pf *pf = vsi->back;
811 struct rtnl_link_stats64 *ons;
812 struct rtnl_link_stats64 *ns; /* netdev stats */
813 struct i40e_eth_stats *oes;
814 struct i40e_eth_stats *es; /* device's eth stats */
815 u32 tx_restart, tx_busy;
824 if (test_bit(__I40E_DOWN, &vsi->state) ||
825 test_bit(__I40E_CONFIG_BUSY, &pf->state))
828 ns = i40e_get_vsi_stats_struct(vsi);
829 ons = &vsi->net_stats_offsets;
830 es = &vsi->eth_stats;
831 oes = &vsi->eth_stats_offsets;
833 /* Gather up the netdev and vsi stats that the driver collects
834 * on the fly during packet processing
838 tx_restart = tx_busy = 0;
842 for (q = 0; q < vsi->num_queue_pairs; q++) {
844 p = ACCESS_ONCE(vsi->tx_rings[q]);
847 start = u64_stats_fetch_begin_irq(&p->syncp);
848 packets = p->stats.packets;
849 bytes = p->stats.bytes;
850 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
853 tx_restart += p->tx_stats.restart_queue;
854 tx_busy += p->tx_stats.tx_busy;
856 /* Rx queue is part of the same block as Tx queue */
859 start = u64_stats_fetch_begin_irq(&p->syncp);
860 packets = p->stats.packets;
861 bytes = p->stats.bytes;
862 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
865 rx_buf += p->rx_stats.alloc_buff_failed;
866 rx_page += p->rx_stats.alloc_page_failed;
869 vsi->tx_restart = tx_restart;
870 vsi->tx_busy = tx_busy;
871 vsi->rx_page_failed = rx_page;
872 vsi->rx_buf_failed = rx_buf;
874 ns->rx_packets = rx_p;
876 ns->tx_packets = tx_p;
879 /* update netdev stats from eth stats */
880 i40e_update_eth_stats(vsi);
881 ons->tx_errors = oes->tx_errors;
882 ns->tx_errors = es->tx_errors;
883 ons->multicast = oes->rx_multicast;
884 ns->multicast = es->rx_multicast;
885 ons->rx_dropped = oes->rx_discards;
886 ns->rx_dropped = es->rx_discards;
887 ons->tx_dropped = oes->tx_discards;
888 ns->tx_dropped = es->tx_discards;
890 /* pull in a couple PF stats if this is the main vsi */
891 if (vsi == pf->vsi[pf->lan_vsi]) {
892 ns->rx_crc_errors = pf->stats.crc_errors;
893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
894 ns->rx_length_errors = pf->stats.rx_length_errors;
899 * i40e_update_pf_stats - Update the pf statistics counters.
900 * @pf: the PF to be updated
902 static void i40e_update_pf_stats(struct i40e_pf *pf)
904 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
905 struct i40e_hw_port_stats *nsd = &pf->stats;
906 struct i40e_hw *hw = &pf->hw;
910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
911 I40E_GLPRT_GORCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
915 I40E_GLPRT_GOTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_discards,
921 &nsd->eth.rx_discards);
922 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
923 I40E_GLPRT_UPRCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_unicast,
926 &nsd->eth.rx_unicast);
927 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
928 I40E_GLPRT_MPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_multicast,
931 &nsd->eth.rx_multicast);
932 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
933 I40E_GLPRT_BPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_broadcast,
936 &nsd->eth.rx_broadcast);
937 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
938 I40E_GLPRT_UPTCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.tx_unicast,
941 &nsd->eth.tx_unicast);
942 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
943 I40E_GLPRT_MPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_multicast,
946 &nsd->eth.tx_multicast);
947 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
948 I40E_GLPRT_BPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_broadcast,
951 &nsd->eth.tx_broadcast);
953 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_dropped_link_down,
956 &nsd->tx_dropped_link_down);
958 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->crc_errors, &nsd->crc_errors);
962 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->illegal_bytes, &nsd->illegal_bytes);
966 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->mac_local_faults,
969 &nsd->mac_local_faults);
970 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->mac_remote_faults,
973 &nsd->mac_remote_faults);
975 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->rx_length_errors,
978 &nsd->rx_length_errors);
980 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->link_xon_rx, &nsd->link_xon_rx);
983 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->link_xon_tx, &nsd->link_xon_tx);
986 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
987 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->link_xoff_tx, &nsd->link_xoff_tx);
991 for (i = 0; i < 8; i++) {
992 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
993 pf->stat_offsets_loaded,
994 &osd->priority_xon_rx[i],
995 &nsd->priority_xon_rx[i]);
996 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
997 pf->stat_offsets_loaded,
998 &osd->priority_xon_tx[i],
999 &nsd->priority_xon_tx[i]);
1000 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1001 pf->stat_offsets_loaded,
1002 &osd->priority_xoff_tx[i],
1003 &nsd->priority_xoff_tx[i]);
1004 i40e_stat_update32(hw,
1005 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1006 pf->stat_offsets_loaded,
1007 &osd->priority_xon_2_xoff[i],
1008 &nsd->priority_xon_2_xoff[i]);
1011 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1012 I40E_GLPRT_PRC64L(hw->port),
1013 pf->stat_offsets_loaded,
1014 &osd->rx_size_64, &nsd->rx_size_64);
1015 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1016 I40E_GLPRT_PRC127L(hw->port),
1017 pf->stat_offsets_loaded,
1018 &osd->rx_size_127, &nsd->rx_size_127);
1019 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1020 I40E_GLPRT_PRC255L(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->rx_size_255, &nsd->rx_size_255);
1023 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1024 I40E_GLPRT_PRC511L(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->rx_size_511, &nsd->rx_size_511);
1027 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1028 I40E_GLPRT_PRC1023L(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->rx_size_1023, &nsd->rx_size_1023);
1031 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1032 I40E_GLPRT_PRC1522L(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->rx_size_1522, &nsd->rx_size_1522);
1035 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1036 I40E_GLPRT_PRC9522L(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->rx_size_big, &nsd->rx_size_big);
1040 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1041 I40E_GLPRT_PTC64L(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->tx_size_64, &nsd->tx_size_64);
1044 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1045 I40E_GLPRT_PTC127L(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->tx_size_127, &nsd->tx_size_127);
1048 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1049 I40E_GLPRT_PTC255L(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->tx_size_255, &nsd->tx_size_255);
1052 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1053 I40E_GLPRT_PTC511L(hw->port),
1054 pf->stat_offsets_loaded,
1055 &osd->tx_size_511, &nsd->tx_size_511);
1056 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1057 I40E_GLPRT_PTC1023L(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->tx_size_1023, &nsd->tx_size_1023);
1060 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1061 I40E_GLPRT_PTC1522L(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->tx_size_1522, &nsd->tx_size_1522);
1064 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1065 I40E_GLPRT_PTC9522L(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->tx_size_big, &nsd->tx_size_big);
1069 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->rx_undersize, &nsd->rx_undersize);
1072 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->rx_fragments, &nsd->rx_fragments);
1075 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->rx_oversize, &nsd->rx_oversize);
1078 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_jabber, &nsd->rx_jabber);
1083 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1084 pf->stat_offsets_loaded,
1085 &osd->fd_atr_match, &nsd->fd_atr_match);
1086 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1087 pf->stat_offsets_loaded,
1088 &osd->fd_sb_match, &nsd->fd_sb_match);
1090 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1091 nsd->tx_lpi_status =
1092 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1093 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1094 nsd->rx_lpi_status =
1095 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1096 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1097 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1098 pf->stat_offsets_loaded,
1099 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1100 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1101 pf->stat_offsets_loaded,
1102 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1104 pf->stat_offsets_loaded = true;
1108 * i40e_update_stats - Update the various statistics counters.
1109 * @vsi: the VSI to be updated
1111 * Update the various stats for this VSI and its related entities.
1113 void i40e_update_stats(struct i40e_vsi *vsi)
1115 struct i40e_pf *pf = vsi->back;
1117 if (vsi == pf->vsi[pf->lan_vsi])
1118 i40e_update_pf_stats(pf);
1120 i40e_update_vsi_stats(vsi);
1122 i40e_update_fcoe_stats(vsi);
1127 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1128 * @vsi: the VSI to be searched
1129 * @macaddr: the MAC address
1131 * @is_vf: make sure its a vf filter, else doesn't matter
1132 * @is_netdev: make sure its a netdev filter, else doesn't matter
1134 * Returns ptr to the filter object or NULL
1136 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1137 u8 *macaddr, s16 vlan,
1138 bool is_vf, bool is_netdev)
1140 struct i40e_mac_filter *f;
1142 if (!vsi || !macaddr)
1145 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1146 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1147 (vlan == f->vlan) &&
1148 (!is_vf || f->is_vf) &&
1149 (!is_netdev || f->is_netdev))
1156 * i40e_find_mac - Find a mac addr in the macvlan filters list
1157 * @vsi: the VSI to be searched
1158 * @macaddr: the MAC address we are searching for
1159 * @is_vf: make sure its a vf filter, else doesn't matter
1160 * @is_netdev: make sure its a netdev filter, else doesn't matter
1162 * Returns the first filter with the provided MAC address or NULL if
1163 * MAC address was not found
1165 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1166 bool is_vf, bool is_netdev)
1168 struct i40e_mac_filter *f;
1170 if (!vsi || !macaddr)
1173 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1174 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1175 (!is_vf || f->is_vf) &&
1176 (!is_netdev || f->is_netdev))
1183 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1184 * @vsi: the VSI to be searched
1186 * Returns true if VSI is in vlan mode or false otherwise
1188 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1190 struct i40e_mac_filter *f;
1192 /* Only -1 for all the filters denotes not in vlan mode
1193 * so we have to go through all the list in order to make sure
1195 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1204 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1205 * @vsi: the VSI to be searched
1206 * @macaddr: the mac address to be filtered
1207 * @is_vf: true if it is a vf
1208 * @is_netdev: true if it is a netdev
1210 * Goes through all the macvlan filters and adds a
1211 * macvlan filter for each unique vlan that already exists
1213 * Returns first filter found on success, else NULL
1215 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1216 bool is_vf, bool is_netdev)
1218 struct i40e_mac_filter *f;
1220 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1221 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1222 is_vf, is_netdev)) {
1223 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1229 return list_first_entry_or_null(&vsi->mac_filter_list,
1230 struct i40e_mac_filter, list);
1234 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1235 * @vsi: the PF Main VSI - inappropriate for any other VSI
1236 * @macaddr: the MAC address
1238 * Some older firmware configurations set up a default promiscuous VLAN
1239 * filter that needs to be removed.
1241 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1243 struct i40e_aqc_remove_macvlan_element_data element;
1244 struct i40e_pf *pf = vsi->back;
1247 /* Only appropriate for the PF main VSI */
1248 if (vsi->type != I40E_VSI_MAIN)
1251 memset(&element, 0, sizeof(element));
1252 ether_addr_copy(element.mac_addr, macaddr);
1253 element.vlan_tag = 0;
1254 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1255 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1256 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1264 * i40e_add_filter - Add a mac/vlan filter to the VSI
1265 * @vsi: the VSI to be searched
1266 * @macaddr: the MAC address
1268 * @is_vf: make sure its a vf filter, else doesn't matter
1269 * @is_netdev: make sure its a netdev filter, else doesn't matter
1271 * Returns ptr to the filter object or NULL when no memory available.
1273 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1274 u8 *macaddr, s16 vlan,
1275 bool is_vf, bool is_netdev)
1277 struct i40e_mac_filter *f;
1279 if (!vsi || !macaddr)
1282 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1284 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1286 goto add_filter_out;
1288 ether_addr_copy(f->macaddr, macaddr);
1292 INIT_LIST_HEAD(&f->list);
1293 list_add(&f->list, &vsi->mac_filter_list);
1296 /* increment counter and add a new flag if needed */
1302 } else if (is_netdev) {
1303 if (!f->is_netdev) {
1304 f->is_netdev = true;
1311 /* changed tells sync_filters_subtask to
1312 * push the filter down to the firmware
1315 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1316 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1324 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1325 * @vsi: the VSI to be searched
1326 * @macaddr: the MAC address
1328 * @is_vf: make sure it's a vf filter, else doesn't matter
1329 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1331 void i40e_del_filter(struct i40e_vsi *vsi,
1332 u8 *macaddr, s16 vlan,
1333 bool is_vf, bool is_netdev)
1335 struct i40e_mac_filter *f;
1337 if (!vsi || !macaddr)
1340 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1341 if (!f || f->counter == 0)
1349 } else if (is_netdev) {
1351 f->is_netdev = false;
1355 /* make sure we don't remove a filter in use by vf or netdev */
1357 min_f += (f->is_vf ? 1 : 0);
1358 min_f += (f->is_netdev ? 1 : 0);
1360 if (f->counter > min_f)
1364 /* counter == 0 tells sync_filters_subtask to
1365 * remove the filter from the firmware's list
1367 if (f->counter == 0) {
1369 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1370 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1375 * i40e_set_mac - NDO callback to set mac address
1376 * @netdev: network interface device structure
1377 * @p: pointer to an address structure
1379 * Returns 0 on success, negative on failure
1382 int i40e_set_mac(struct net_device *netdev, void *p)
1384 static int i40e_set_mac(struct net_device *netdev, void *p)
1387 struct i40e_netdev_priv *np = netdev_priv(netdev);
1388 struct i40e_vsi *vsi = np->vsi;
1389 struct i40e_pf *pf = vsi->back;
1390 struct i40e_hw *hw = &pf->hw;
1391 struct sockaddr *addr = p;
1392 struct i40e_mac_filter *f;
1394 if (!is_valid_ether_addr(addr->sa_data))
1395 return -EADDRNOTAVAIL;
1397 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1398 netdev_info(netdev, "already using mac address %pM\n",
1403 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1404 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1405 return -EADDRNOTAVAIL;
1407 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1408 netdev_info(netdev, "returning to hw mac address %pM\n",
1411 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1413 if (vsi->type == I40E_VSI_MAIN) {
1415 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1416 I40E_AQC_WRITE_TYPE_LAA_WOL,
1417 addr->sa_data, NULL);
1420 "Addr change for Main VSI failed: %d\n",
1422 return -EADDRNOTAVAIL;
1426 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1427 struct i40e_aqc_remove_macvlan_element_data element;
1429 memset(&element, 0, sizeof(element));
1430 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1431 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1432 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1434 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1438 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1439 struct i40e_aqc_add_macvlan_element_data element;
1441 memset(&element, 0, sizeof(element));
1442 ether_addr_copy(element.mac_addr, hw->mac.addr);
1443 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1444 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1446 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1452 i40e_sync_vsi_filters(vsi);
1453 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1459 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1460 * @vsi: the VSI being setup
1461 * @ctxt: VSI context structure
1462 * @enabled_tc: Enabled TCs bitmap
1463 * @is_add: True if called before Add VSI
1465 * Setup VSI queue mapping for enabled traffic classes.
1468 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1469 struct i40e_vsi_context *ctxt,
1473 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1474 struct i40e_vsi_context *ctxt,
1479 struct i40e_pf *pf = vsi->back;
1489 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1492 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1493 /* Find numtc from enabled TC bitmap */
1494 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1495 if (enabled_tc & (1 << i)) /* TC is enabled */
1499 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1503 /* At least TC0 is enabled in case of non-DCB case */
1507 vsi->tc_config.numtc = numtc;
1508 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1509 /* Number of queues per enabled TC */
1510 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1511 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1513 /* Setup queue offset/count for all TCs for given VSI */
1514 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1515 /* See if the given TC is enabled for the given VSI */
1516 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1519 switch (vsi->type) {
1521 qcount = min_t(int, pf->rss_size, num_tc_qps);
1525 qcount = num_tc_qps;
1529 case I40E_VSI_SRIOV:
1530 case I40E_VSI_VMDQ2:
1532 qcount = num_tc_qps;
1536 vsi->tc_config.tc_info[i].qoffset = offset;
1537 vsi->tc_config.tc_info[i].qcount = qcount;
1539 /* find the power-of-2 of the number of queue pairs */
1542 while (num_qps && ((1 << pow) < qcount)) {
1547 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1549 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1550 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1554 /* TC is not enabled so set the offset to
1555 * default queue and allocate one queue
1558 vsi->tc_config.tc_info[i].qoffset = 0;
1559 vsi->tc_config.tc_info[i].qcount = 1;
1560 vsi->tc_config.tc_info[i].netdev_tc = 0;
1564 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1567 /* Set actual Tx/Rx queue pairs */
1568 vsi->num_queue_pairs = offset;
1570 /* Scheduler section valid can only be set for ADD VSI */
1572 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1574 ctxt->info.up_enable_bits = enabled_tc;
1576 if (vsi->type == I40E_VSI_SRIOV) {
1577 ctxt->info.mapping_flags |=
1578 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1579 for (i = 0; i < vsi->num_queue_pairs; i++)
1580 ctxt->info.queue_mapping[i] =
1581 cpu_to_le16(vsi->base_queue + i);
1583 ctxt->info.mapping_flags |=
1584 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1585 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1587 ctxt->info.valid_sections |= cpu_to_le16(sections);
1591 * i40e_set_rx_mode - NDO callback to set the netdev filters
1592 * @netdev: network interface device structure
1595 void i40e_set_rx_mode(struct net_device *netdev)
1597 static void i40e_set_rx_mode(struct net_device *netdev)
1600 struct i40e_netdev_priv *np = netdev_priv(netdev);
1601 struct i40e_mac_filter *f, *ftmp;
1602 struct i40e_vsi *vsi = np->vsi;
1603 struct netdev_hw_addr *uca;
1604 struct netdev_hw_addr *mca;
1605 struct netdev_hw_addr *ha;
1607 /* add addr if not already in the filter list */
1608 netdev_for_each_uc_addr(uca, netdev) {
1609 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1610 if (i40e_is_vsi_in_vlan(vsi))
1611 i40e_put_mac_in_vlan(vsi, uca->addr,
1614 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1619 netdev_for_each_mc_addr(mca, netdev) {
1620 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1621 if (i40e_is_vsi_in_vlan(vsi))
1622 i40e_put_mac_in_vlan(vsi, mca->addr,
1625 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1630 /* remove filter if not in netdev list */
1631 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1637 if (is_multicast_ether_addr(f->macaddr)) {
1638 netdev_for_each_mc_addr(mca, netdev) {
1639 if (ether_addr_equal(mca->addr, f->macaddr)) {
1645 netdev_for_each_uc_addr(uca, netdev) {
1646 if (ether_addr_equal(uca->addr, f->macaddr)) {
1652 for_each_dev_addr(netdev, ha) {
1653 if (ether_addr_equal(ha->addr, f->macaddr)) {
1661 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1664 /* check for other flag changes */
1665 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1666 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1667 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1672 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1673 * @vsi: ptr to the VSI
1675 * Push any outstanding VSI filter changes through the AdminQ.
1677 * Returns 0 or error value
1679 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1681 struct i40e_mac_filter *f, *ftmp;
1682 bool promisc_forced_on = false;
1683 bool add_happened = false;
1684 int filter_list_len = 0;
1685 u32 changed_flags = 0;
1686 i40e_status aq_ret = 0;
1692 /* empty array typed pointers, kcalloc later */
1693 struct i40e_aqc_add_macvlan_element_data *add_list;
1694 struct i40e_aqc_remove_macvlan_element_data *del_list;
1696 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1697 usleep_range(1000, 2000);
1701 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1702 vsi->current_netdev_flags = vsi->netdev->flags;
1705 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1706 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1708 filter_list_len = pf->hw.aq.asq_buf_size /
1709 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1710 del_list = kcalloc(filter_list_len,
1711 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1716 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1720 if (f->counter != 0)
1725 /* add to delete list */
1726 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1727 del_list[num_del].vlan_tag =
1728 cpu_to_le16((u16)(f->vlan ==
1729 I40E_VLAN_ANY ? 0 : f->vlan));
1731 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1732 del_list[num_del].flags = cmd_flags;
1735 /* unlink from filter list */
1739 /* flush a full buffer */
1740 if (num_del == filter_list_len) {
1741 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1742 vsi->seid, del_list, num_del,
1745 memset(del_list, 0, sizeof(*del_list));
1748 pf->hw.aq.asq_last_status !=
1750 dev_info(&pf->pdev->dev,
1751 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1753 pf->hw.aq.asq_last_status);
1757 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1758 del_list, num_del, NULL);
1762 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1763 dev_info(&pf->pdev->dev,
1764 "ignoring delete macvlan error, err %d, aq_err %d\n",
1765 aq_ret, pf->hw.aq.asq_last_status);
1771 /* do all the adds now */
1772 filter_list_len = pf->hw.aq.asq_buf_size /
1773 sizeof(struct i40e_aqc_add_macvlan_element_data),
1774 add_list = kcalloc(filter_list_len,
1775 sizeof(struct i40e_aqc_add_macvlan_element_data),
1780 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1784 if (f->counter == 0)
1787 add_happened = true;
1790 /* add to add array */
1791 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1792 add_list[num_add].vlan_tag =
1794 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1795 add_list[num_add].queue_number = 0;
1797 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1798 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1801 /* flush a full buffer */
1802 if (num_add == filter_list_len) {
1803 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1810 memset(add_list, 0, sizeof(*add_list));
1814 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1815 add_list, num_add, NULL);
1821 if (add_happened && aq_ret &&
1822 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) {
1823 dev_info(&pf->pdev->dev,
1824 "add filter failed, err %d, aq_err %d\n",
1825 aq_ret, pf->hw.aq.asq_last_status);
1826 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1827 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1829 promisc_forced_on = true;
1830 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1832 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1837 /* check for changes in promiscuous modes */
1838 if (changed_flags & IFF_ALLMULTI) {
1839 bool cur_multipromisc;
1840 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1841 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1846 dev_info(&pf->pdev->dev,
1847 "set multi promisc failed, err %d, aq_err %d\n",
1848 aq_ret, pf->hw.aq.asq_last_status);
1850 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1852 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1853 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1855 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1859 dev_info(&pf->pdev->dev,
1860 "set uni promisc failed, err %d, aq_err %d\n",
1861 aq_ret, pf->hw.aq.asq_last_status);
1862 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1866 dev_info(&pf->pdev->dev,
1867 "set brdcast promisc failed, err %d, aq_err %d\n",
1868 aq_ret, pf->hw.aq.asq_last_status);
1871 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1876 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1877 * @pf: board private structure
1879 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1883 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1885 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1887 for (v = 0; v < pf->num_alloc_vsi; v++) {
1889 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1890 i40e_sync_vsi_filters(pf->vsi[v]);
1895 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1896 * @netdev: network interface device structure
1897 * @new_mtu: new value for maximum frame size
1899 * Returns 0 on success, negative on failure
1901 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1903 struct i40e_netdev_priv *np = netdev_priv(netdev);
1904 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1905 struct i40e_vsi *vsi = np->vsi;
1907 /* MTU < 68 is an error and causes problems on some kernels */
1908 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1911 netdev_info(netdev, "changing MTU from %d to %d\n",
1912 netdev->mtu, new_mtu);
1913 netdev->mtu = new_mtu;
1914 if (netif_running(netdev))
1915 i40e_vsi_reinit_locked(vsi);
1921 * i40e_ioctl - Access the hwtstamp interface
1922 * @netdev: network interface device structure
1923 * @ifr: interface request data
1924 * @cmd: ioctl command
1926 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1928 struct i40e_netdev_priv *np = netdev_priv(netdev);
1929 struct i40e_pf *pf = np->vsi->back;
1933 return i40e_ptp_get_ts_config(pf, ifr);
1935 return i40e_ptp_set_ts_config(pf, ifr);
1942 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1943 * @vsi: the vsi being adjusted
1945 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1947 struct i40e_vsi_context ctxt;
1950 if ((vsi->info.valid_sections &
1951 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1952 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1953 return; /* already enabled */
1955 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1956 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1957 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1959 ctxt.seid = vsi->seid;
1960 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1961 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1963 dev_info(&vsi->back->pdev->dev,
1964 "%s: update vsi failed, aq_err=%d\n",
1965 __func__, vsi->back->hw.aq.asq_last_status);
1970 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1971 * @vsi: the vsi being adjusted
1973 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1975 struct i40e_vsi_context ctxt;
1978 if ((vsi->info.valid_sections &
1979 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1980 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1981 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1982 return; /* already disabled */
1984 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1985 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1986 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1988 ctxt.seid = vsi->seid;
1989 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1990 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1992 dev_info(&vsi->back->pdev->dev,
1993 "%s: update vsi failed, aq_err=%d\n",
1994 __func__, vsi->back->hw.aq.asq_last_status);
1999 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2000 * @netdev: network interface to be adjusted
2001 * @features: netdev features to test if VLAN offload is enabled or not
2003 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2005 struct i40e_netdev_priv *np = netdev_priv(netdev);
2006 struct i40e_vsi *vsi = np->vsi;
2008 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2009 i40e_vlan_stripping_enable(vsi);
2011 i40e_vlan_stripping_disable(vsi);
2015 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2016 * @vsi: the vsi being configured
2017 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2019 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2021 struct i40e_mac_filter *f, *add_f;
2022 bool is_netdev, is_vf;
2024 is_vf = (vsi->type == I40E_VSI_SRIOV);
2025 is_netdev = !!(vsi->netdev);
2028 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2031 dev_info(&vsi->back->pdev->dev,
2032 "Could not add vlan filter %d for %pM\n",
2033 vid, vsi->netdev->dev_addr);
2038 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2039 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2041 dev_info(&vsi->back->pdev->dev,
2042 "Could not add vlan filter %d for %pM\n",
2048 /* Now if we add a vlan tag, make sure to check if it is the first
2049 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2050 * with 0, so we now accept untagged and specified tagged traffic
2051 * (and not any taged and untagged)
2054 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2056 is_vf, is_netdev)) {
2057 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2058 I40E_VLAN_ANY, is_vf, is_netdev);
2059 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2062 dev_info(&vsi->back->pdev->dev,
2063 "Could not add filter 0 for %pM\n",
2064 vsi->netdev->dev_addr);
2070 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2071 if (vid > 0 && !vsi->info.pvid) {
2072 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2073 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2074 is_vf, is_netdev)) {
2075 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2077 add_f = i40e_add_filter(vsi, f->macaddr,
2078 0, is_vf, is_netdev);
2080 dev_info(&vsi->back->pdev->dev,
2081 "Could not add filter 0 for %pM\n",
2089 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2090 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2093 return i40e_sync_vsi_filters(vsi);
2097 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2098 * @vsi: the vsi being configured
2099 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2101 * Return: 0 on success or negative otherwise
2103 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2105 struct net_device *netdev = vsi->netdev;
2106 struct i40e_mac_filter *f, *add_f;
2107 bool is_vf, is_netdev;
2108 int filter_count = 0;
2110 is_vf = (vsi->type == I40E_VSI_SRIOV);
2111 is_netdev = !!(netdev);
2114 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2116 list_for_each_entry(f, &vsi->mac_filter_list, list)
2117 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2119 /* go through all the filters for this VSI and if there is only
2120 * vid == 0 it means there are no other filters, so vid 0 must
2121 * be replaced with -1. This signifies that we should from now
2122 * on accept any traffic (with any tag present, or untagged)
2124 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2127 ether_addr_equal(netdev->dev_addr, f->macaddr))
2135 if (!filter_count && is_netdev) {
2136 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2137 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2140 dev_info(&vsi->back->pdev->dev,
2141 "Could not add filter %d for %pM\n",
2142 I40E_VLAN_ANY, netdev->dev_addr);
2147 if (!filter_count) {
2148 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2149 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2150 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2153 dev_info(&vsi->back->pdev->dev,
2154 "Could not add filter %d for %pM\n",
2155 I40E_VLAN_ANY, f->macaddr);
2161 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2162 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2165 return i40e_sync_vsi_filters(vsi);
2169 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2170 * @netdev: network interface to be adjusted
2171 * @vid: vlan id to be added
2173 * net_device_ops implementation for adding vlan ids
2176 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2177 __always_unused __be16 proto, u16 vid)
2179 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2180 __always_unused __be16 proto, u16 vid)
2183 struct i40e_netdev_priv *np = netdev_priv(netdev);
2184 struct i40e_vsi *vsi = np->vsi;
2190 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2192 /* If the network stack called us with vid = 0 then
2193 * it is asking to receive priority tagged packets with
2194 * vlan id 0. Our HW receives them by default when configured
2195 * to receive untagged packets so there is no need to add an
2196 * extra filter for vlan 0 tagged packets.
2199 ret = i40e_vsi_add_vlan(vsi, vid);
2201 if (!ret && (vid < VLAN_N_VID))
2202 set_bit(vid, vsi->active_vlans);
2208 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2209 * @netdev: network interface to be adjusted
2210 * @vid: vlan id to be removed
2212 * net_device_ops implementation for removing vlan ids
2215 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2216 __always_unused __be16 proto, u16 vid)
2218 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2219 __always_unused __be16 proto, u16 vid)
2222 struct i40e_netdev_priv *np = netdev_priv(netdev);
2223 struct i40e_vsi *vsi = np->vsi;
2225 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2227 /* return code is ignored as there is nothing a user
2228 * can do about failure to remove and a log message was
2229 * already printed from the other function
2231 i40e_vsi_kill_vlan(vsi, vid);
2233 clear_bit(vid, vsi->active_vlans);
2239 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2240 * @vsi: the vsi being brought back up
2242 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2249 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2251 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2252 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2257 * i40e_vsi_add_pvid - Add pvid for the VSI
2258 * @vsi: the vsi being adjusted
2259 * @vid: the vlan id to set as a PVID
2261 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2263 struct i40e_vsi_context ctxt;
2266 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2267 vsi->info.pvid = cpu_to_le16(vid);
2268 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2269 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2270 I40E_AQ_VSI_PVLAN_EMOD_STR;
2272 ctxt.seid = vsi->seid;
2273 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2274 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2276 dev_info(&vsi->back->pdev->dev,
2277 "%s: update vsi failed, aq_err=%d\n",
2278 __func__, vsi->back->hw.aq.asq_last_status);
2286 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2287 * @vsi: the vsi being adjusted
2289 * Just use the vlan_rx_register() service to put it back to normal
2291 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2293 i40e_vlan_stripping_disable(vsi);
2299 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2300 * @vsi: ptr to the VSI
2302 * If this function returns with an error, then it's possible one or
2303 * more of the rings is populated (while the rest are not). It is the
2304 * callers duty to clean those orphaned rings.
2306 * Return 0 on success, negative on failure
2308 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2312 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2313 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2319 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2320 * @vsi: ptr to the VSI
2322 * Free VSI's transmit software resources
2324 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2331 for (i = 0; i < vsi->num_queue_pairs; i++)
2332 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2333 i40e_free_tx_resources(vsi->tx_rings[i]);
2337 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2338 * @vsi: ptr to the VSI
2340 * If this function returns with an error, then it's possible one or
2341 * more of the rings is populated (while the rest are not). It is the
2342 * callers duty to clean those orphaned rings.
2344 * Return 0 on success, negative on failure
2346 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2350 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2351 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2353 i40e_fcoe_setup_ddp_resources(vsi);
2359 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2360 * @vsi: ptr to the VSI
2362 * Free all receive software resources
2364 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2371 for (i = 0; i < vsi->num_queue_pairs; i++)
2372 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2373 i40e_free_rx_resources(vsi->rx_rings[i]);
2375 i40e_fcoe_free_ddp_resources(vsi);
2380 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2381 * @ring: The Tx ring to configure
2383 * This enables/disables XPS for a given Tx descriptor ring
2384 * based on the TCs enabled for the VSI that ring belongs to.
2386 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2388 struct i40e_vsi *vsi = ring->vsi;
2391 if (ring->q_vector && ring->netdev) {
2392 /* Single TC mode enable XPS */
2393 if (vsi->tc_config.numtc <= 1 &&
2394 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) {
2395 netif_set_xps_queue(ring->netdev,
2396 &ring->q_vector->affinity_mask,
2398 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2399 /* Disable XPS to allow selection based on TC */
2400 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2401 netif_set_xps_queue(ring->netdev, mask,
2403 free_cpumask_var(mask);
2409 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2410 * @ring: The Tx ring to configure
2412 * Configure the Tx descriptor ring in the HMC context.
2414 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2416 struct i40e_vsi *vsi = ring->vsi;
2417 u16 pf_q = vsi->base_queue + ring->queue_index;
2418 struct i40e_hw *hw = &vsi->back->hw;
2419 struct i40e_hmc_obj_txq tx_ctx;
2420 i40e_status err = 0;
2423 /* some ATR related tx ring init */
2424 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2425 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2426 ring->atr_count = 0;
2428 ring->atr_sample_rate = 0;
2432 i40e_config_xps_tx_ring(ring);
2434 /* clear the context structure first */
2435 memset(&tx_ctx, 0, sizeof(tx_ctx));
2437 tx_ctx.new_context = 1;
2438 tx_ctx.base = (ring->dma / 128);
2439 tx_ctx.qlen = ring->count;
2440 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2441 I40E_FLAG_FD_ATR_ENABLED));
2443 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2445 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2446 /* FDIR VSI tx ring can still use RS bit and writebacks */
2447 if (vsi->type != I40E_VSI_FDIR)
2448 tx_ctx.head_wb_ena = 1;
2449 tx_ctx.head_wb_addr = ring->dma +
2450 (ring->count * sizeof(struct i40e_tx_desc));
2452 /* As part of VSI creation/update, FW allocates certain
2453 * Tx arbitration queue sets for each TC enabled for
2454 * the VSI. The FW returns the handles to these queue
2455 * sets as part of the response buffer to Add VSI,
2456 * Update VSI, etc. AQ commands. It is expected that
2457 * these queue set handles be associated with the Tx
2458 * queues by the driver as part of the TX queue context
2459 * initialization. This has to be done regardless of
2460 * DCB as by default everything is mapped to TC0.
2462 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2463 tx_ctx.rdylist_act = 0;
2465 /* clear the context in the HMC */
2466 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2468 dev_info(&vsi->back->pdev->dev,
2469 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2470 ring->queue_index, pf_q, err);
2474 /* set the context in the HMC */
2475 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2477 dev_info(&vsi->back->pdev->dev,
2478 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2479 ring->queue_index, pf_q, err);
2483 /* Now associate this queue with this PCI function */
2484 if (vsi->type == I40E_VSI_VMDQ2) {
2485 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2486 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2487 I40E_QTX_CTL_VFVM_INDX_MASK;
2489 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2492 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2493 I40E_QTX_CTL_PF_INDX_MASK);
2494 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2497 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2499 /* cache tail off for easier writes later */
2500 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2506 * i40e_configure_rx_ring - Configure a receive ring context
2507 * @ring: The Rx ring to configure
2509 * Configure the Rx descriptor ring in the HMC context.
2511 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2513 struct i40e_vsi *vsi = ring->vsi;
2514 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2515 u16 pf_q = vsi->base_queue + ring->queue_index;
2516 struct i40e_hw *hw = &vsi->back->hw;
2517 struct i40e_hmc_obj_rxq rx_ctx;
2518 i40e_status err = 0;
2522 /* clear the context structure first */
2523 memset(&rx_ctx, 0, sizeof(rx_ctx));
2525 ring->rx_buf_len = vsi->rx_buf_len;
2526 ring->rx_hdr_len = vsi->rx_hdr_len;
2528 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2529 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2531 rx_ctx.base = (ring->dma / 128);
2532 rx_ctx.qlen = ring->count;
2534 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2535 set_ring_16byte_desc_enabled(ring);
2541 rx_ctx.dtype = vsi->dtype;
2543 set_ring_ps_enabled(ring);
2544 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2546 I40E_RX_SPLIT_TCP_UDP |
2549 rx_ctx.hsplit_0 = 0;
2552 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2553 (chain_len * ring->rx_buf_len));
2554 if (hw->revision_id == 0)
2555 rx_ctx.lrxqthresh = 0;
2557 rx_ctx.lrxqthresh = 2;
2558 rx_ctx.crcstrip = 1;
2562 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2564 /* set the prefena field to 1 because the manual says to */
2567 /* clear the context in the HMC */
2568 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2570 dev_info(&vsi->back->pdev->dev,
2571 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2572 ring->queue_index, pf_q, err);
2576 /* set the context in the HMC */
2577 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2579 dev_info(&vsi->back->pdev->dev,
2580 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2581 ring->queue_index, pf_q, err);
2585 /* cache tail for quicker writes, and clear the reg before use */
2586 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2587 writel(0, ring->tail);
2589 if (ring_is_ps_enabled(ring)) {
2590 i40e_alloc_rx_headers(ring);
2591 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2593 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2600 * i40e_vsi_configure_tx - Configure the VSI for Tx
2601 * @vsi: VSI structure describing this set of rings and resources
2603 * Configure the Tx VSI for operation.
2605 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2610 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2611 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2617 * i40e_vsi_configure_rx - Configure the VSI for Rx
2618 * @vsi: the VSI being configured
2620 * Configure the Rx VSI for operation.
2622 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2627 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2628 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2629 + ETH_FCS_LEN + VLAN_HLEN;
2631 vsi->max_frame = I40E_RXBUFFER_2048;
2633 /* figure out correct receive buffer length */
2634 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2635 I40E_FLAG_RX_PS_ENABLED)) {
2636 case I40E_FLAG_RX_1BUF_ENABLED:
2637 vsi->rx_hdr_len = 0;
2638 vsi->rx_buf_len = vsi->max_frame;
2639 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2641 case I40E_FLAG_RX_PS_ENABLED:
2642 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2643 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2644 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2647 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2648 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2649 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2654 /* setup rx buffer for FCoE */
2655 if ((vsi->type == I40E_VSI_FCOE) &&
2656 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2657 vsi->rx_hdr_len = 0;
2658 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2659 vsi->max_frame = I40E_RXBUFFER_3072;
2660 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2663 #endif /* I40E_FCOE */
2664 /* round up for the chip's needs */
2665 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2666 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2667 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2668 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2670 /* set up individual rings */
2671 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2672 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2678 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2679 * @vsi: ptr to the VSI
2681 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2683 struct i40e_ring *tx_ring, *rx_ring;
2684 u16 qoffset, qcount;
2687 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2690 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2691 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2694 qoffset = vsi->tc_config.tc_info[n].qoffset;
2695 qcount = vsi->tc_config.tc_info[n].qcount;
2696 for (i = qoffset; i < (qoffset + qcount); i++) {
2697 rx_ring = vsi->rx_rings[i];
2698 tx_ring = vsi->tx_rings[i];
2699 rx_ring->dcb_tc = n;
2700 tx_ring->dcb_tc = n;
2706 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2707 * @vsi: ptr to the VSI
2709 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2712 i40e_set_rx_mode(vsi->netdev);
2716 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2717 * @vsi: Pointer to the targeted VSI
2719 * This function replays the hlist on the hw where all the SB Flow Director
2720 * filters were saved.
2722 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2724 struct i40e_fdir_filter *filter;
2725 struct i40e_pf *pf = vsi->back;
2726 struct hlist_node *node;
2728 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2731 hlist_for_each_entry_safe(filter, node,
2732 &pf->fdir_filter_list, fdir_node) {
2733 i40e_add_del_fdir(vsi, filter, true);
2738 * i40e_vsi_configure - Set up the VSI for action
2739 * @vsi: the VSI being configured
2741 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2745 i40e_set_vsi_rx_mode(vsi);
2746 i40e_restore_vlan(vsi);
2747 i40e_vsi_config_dcb_rings(vsi);
2748 err = i40e_vsi_configure_tx(vsi);
2750 err = i40e_vsi_configure_rx(vsi);
2756 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2757 * @vsi: the VSI being configured
2759 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2761 struct i40e_pf *pf = vsi->back;
2762 struct i40e_q_vector *q_vector;
2763 struct i40e_hw *hw = &pf->hw;
2769 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2770 * and PFINT_LNKLSTn registers, e.g.:
2771 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2773 qp = vsi->base_queue;
2774 vector = vsi->base_vector;
2775 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2776 q_vector = vsi->q_vectors[i];
2777 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2778 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2779 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2781 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2782 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2783 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2786 /* Linked list for the queuepairs assigned to this vector */
2787 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2788 for (q = 0; q < q_vector->num_ringpairs; q++) {
2789 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2790 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2791 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2792 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2794 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2796 wr32(hw, I40E_QINT_RQCTL(qp), val);
2798 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2799 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2800 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2801 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2803 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2805 /* Terminate the linked list */
2806 if (q == (q_vector->num_ringpairs - 1))
2807 val |= (I40E_QUEUE_END_OF_LIST
2808 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2810 wr32(hw, I40E_QINT_TQCTL(qp), val);
2819 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2820 * @hw: ptr to the hardware info
2822 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2824 struct i40e_hw *hw = &pf->hw;
2827 /* clear things first */
2828 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2829 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2831 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2832 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2833 I40E_PFINT_ICR0_ENA_GRST_MASK |
2834 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2835 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2836 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2837 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2838 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2840 if (pf->flags & I40E_FLAG_PTP)
2841 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2843 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2845 /* SW_ITR_IDX = 0, but don't change INTENA */
2846 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2847 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2849 /* OTHER_ITR_IDX = 0 */
2850 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2854 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2855 * @vsi: the VSI being configured
2857 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2859 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2860 struct i40e_pf *pf = vsi->back;
2861 struct i40e_hw *hw = &pf->hw;
2864 /* set the ITR configuration */
2865 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2866 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2867 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2868 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2869 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2870 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2872 i40e_enable_misc_int_causes(pf);
2874 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2875 wr32(hw, I40E_PFINT_LNKLST0, 0);
2877 /* Associate the queue pair to the vector and enable the queue int */
2878 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2879 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2880 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2882 wr32(hw, I40E_QINT_RQCTL(0), val);
2884 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2885 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2886 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2888 wr32(hw, I40E_QINT_TQCTL(0), val);
2893 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2894 * @pf: board private structure
2896 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2898 struct i40e_hw *hw = &pf->hw;
2900 wr32(hw, I40E_PFINT_DYN_CTL0,
2901 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2906 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2907 * @pf: board private structure
2909 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2911 struct i40e_hw *hw = &pf->hw;
2914 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2915 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2916 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2918 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2923 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2924 * @vsi: pointer to a vsi
2925 * @vector: enable a particular Hw Interrupt vector
2927 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2929 struct i40e_pf *pf = vsi->back;
2930 struct i40e_hw *hw = &pf->hw;
2933 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2934 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2935 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2936 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2937 /* skip the flush */
2941 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2942 * @vsi: pointer to a vsi
2943 * @vector: disable a particular Hw Interrupt vector
2945 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2947 struct i40e_pf *pf = vsi->back;
2948 struct i40e_hw *hw = &pf->hw;
2951 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2952 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2957 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2958 * @irq: interrupt number
2959 * @data: pointer to a q_vector
2961 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2963 struct i40e_q_vector *q_vector = data;
2965 if (!q_vector->tx.ring && !q_vector->rx.ring)
2968 napi_schedule(&q_vector->napi);
2974 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2975 * @vsi: the VSI being configured
2976 * @basename: name for the vector
2978 * Allocates MSI-X vectors and requests interrupts from the kernel.
2980 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2982 int q_vectors = vsi->num_q_vectors;
2983 struct i40e_pf *pf = vsi->back;
2984 int base = vsi->base_vector;
2989 for (vector = 0; vector < q_vectors; vector++) {
2990 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2992 if (q_vector->tx.ring && q_vector->rx.ring) {
2993 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2994 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2996 } else if (q_vector->rx.ring) {
2997 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2998 "%s-%s-%d", basename, "rx", rx_int_idx++);
2999 } else if (q_vector->tx.ring) {
3000 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3001 "%s-%s-%d", basename, "tx", tx_int_idx++);
3003 /* skip this unused q_vector */
3006 err = request_irq(pf->msix_entries[base + vector].vector,
3012 dev_info(&pf->pdev->dev,
3013 "%s: request_irq failed, error: %d\n",
3015 goto free_queue_irqs;
3017 /* assign the mask for this irq */
3018 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3019 &q_vector->affinity_mask);
3022 vsi->irqs_ready = true;
3028 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3030 free_irq(pf->msix_entries[base + vector].vector,
3031 &(vsi->q_vectors[vector]));
3037 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3038 * @vsi: the VSI being un-configured
3040 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3042 struct i40e_pf *pf = vsi->back;
3043 struct i40e_hw *hw = &pf->hw;
3044 int base = vsi->base_vector;
3047 for (i = 0; i < vsi->num_queue_pairs; i++) {
3048 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3049 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3052 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3053 for (i = vsi->base_vector;
3054 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3055 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3058 for (i = 0; i < vsi->num_q_vectors; i++)
3059 synchronize_irq(pf->msix_entries[i + base].vector);
3061 /* Legacy and MSI mode - this stops all interrupt handling */
3062 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3063 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3065 synchronize_irq(pf->pdev->irq);
3070 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3071 * @vsi: the VSI being configured
3073 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3075 struct i40e_pf *pf = vsi->back;
3078 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3079 for (i = vsi->base_vector;
3080 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3081 i40e_irq_dynamic_enable(vsi, i);
3083 i40e_irq_dynamic_enable_icr0(pf);
3086 i40e_flush(&pf->hw);
3091 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3092 * @pf: board private structure
3094 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3097 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3098 i40e_flush(&pf->hw);
3102 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3103 * @irq: interrupt number
3104 * @data: pointer to a q_vector
3106 * This is the handler used for all MSI/Legacy interrupts, and deals
3107 * with both queue and non-queue interrupts. This is also used in
3108 * MSIX mode to handle the non-queue interrupts.
3110 static irqreturn_t i40e_intr(int irq, void *data)
3112 struct i40e_pf *pf = (struct i40e_pf *)data;
3113 struct i40e_hw *hw = &pf->hw;
3114 irqreturn_t ret = IRQ_NONE;
3115 u32 icr0, icr0_remaining;
3118 icr0 = rd32(hw, I40E_PFINT_ICR0);
3119 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3121 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3122 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3125 /* if interrupt but no bits showing, must be SWINT */
3126 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3127 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3130 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3131 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3133 /* temporarily disable queue cause for NAPI processing */
3134 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3135 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3136 wr32(hw, I40E_QINT_RQCTL(0), qval);
3138 qval = rd32(hw, I40E_QINT_TQCTL(0));
3139 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3140 wr32(hw, I40E_QINT_TQCTL(0), qval);
3142 if (!test_bit(__I40E_DOWN, &pf->state))
3143 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3146 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3147 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3148 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3151 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3152 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3153 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3156 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3157 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3158 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3161 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3162 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3163 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3164 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3165 val = rd32(hw, I40E_GLGEN_RSTAT);
3166 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3167 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3168 if (val == I40E_RESET_CORER) {
3170 } else if (val == I40E_RESET_GLOBR) {
3172 } else if (val == I40E_RESET_EMPR) {
3174 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3178 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3179 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3180 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3183 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3184 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3186 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3187 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3188 i40e_ptp_tx_hwtstamp(pf);
3192 /* If a critical error is pending we have no choice but to reset the
3194 * Report and mask out any remaining unexpected interrupts.
3196 icr0_remaining = icr0 & ena_mask;
3197 if (icr0_remaining) {
3198 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3200 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3201 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3202 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3203 dev_info(&pf->pdev->dev, "device will be reset\n");
3204 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3205 i40e_service_event_schedule(pf);
3207 ena_mask &= ~icr0_remaining;
3212 /* re-enable interrupt causes */
3213 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3214 if (!test_bit(__I40E_DOWN, &pf->state)) {
3215 i40e_service_event_schedule(pf);
3216 i40e_irq_dynamic_enable_icr0(pf);
3223 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3224 * @tx_ring: tx ring to clean
3225 * @budget: how many cleans we're allowed
3227 * Returns true if there's any budget left (e.g. the clean is finished)
3229 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3231 struct i40e_vsi *vsi = tx_ring->vsi;
3232 u16 i = tx_ring->next_to_clean;
3233 struct i40e_tx_buffer *tx_buf;
3234 struct i40e_tx_desc *tx_desc;
3236 tx_buf = &tx_ring->tx_bi[i];
3237 tx_desc = I40E_TX_DESC(tx_ring, i);
3238 i -= tx_ring->count;
3241 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3243 /* if next_to_watch is not set then there is no work pending */
3247 /* prevent any other reads prior to eop_desc */
3248 read_barrier_depends();
3250 /* if the descriptor isn't done, no work yet to do */
3251 if (!(eop_desc->cmd_type_offset_bsz &
3252 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3255 /* clear next_to_watch to prevent false hangs */
3256 tx_buf->next_to_watch = NULL;
3258 tx_desc->buffer_addr = 0;
3259 tx_desc->cmd_type_offset_bsz = 0;
3260 /* move past filter desc */
3265 i -= tx_ring->count;
3266 tx_buf = tx_ring->tx_bi;
3267 tx_desc = I40E_TX_DESC(tx_ring, 0);
3269 /* unmap skb header data */
3270 dma_unmap_single(tx_ring->dev,
3271 dma_unmap_addr(tx_buf, dma),
3272 dma_unmap_len(tx_buf, len),
3274 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3275 kfree(tx_buf->raw_buf);
3277 tx_buf->raw_buf = NULL;
3278 tx_buf->tx_flags = 0;
3279 tx_buf->next_to_watch = NULL;
3280 dma_unmap_len_set(tx_buf, len, 0);
3281 tx_desc->buffer_addr = 0;
3282 tx_desc->cmd_type_offset_bsz = 0;
3284 /* move us past the eop_desc for start of next FD desc */
3289 i -= tx_ring->count;
3290 tx_buf = tx_ring->tx_bi;
3291 tx_desc = I40E_TX_DESC(tx_ring, 0);
3294 /* update budget accounting */
3296 } while (likely(budget));
3298 i += tx_ring->count;
3299 tx_ring->next_to_clean = i;
3301 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3302 i40e_irq_dynamic_enable(vsi,
3303 tx_ring->q_vector->v_idx + vsi->base_vector);
3309 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3310 * @irq: interrupt number
3311 * @data: pointer to a q_vector
3313 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3315 struct i40e_q_vector *q_vector = data;
3316 struct i40e_vsi *vsi;
3318 if (!q_vector->tx.ring)
3321 vsi = q_vector->tx.ring->vsi;
3322 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3328 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3329 * @vsi: the VSI being configured
3330 * @v_idx: vector index
3331 * @qp_idx: queue pair index
3333 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3335 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3336 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3337 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3339 tx_ring->q_vector = q_vector;
3340 tx_ring->next = q_vector->tx.ring;
3341 q_vector->tx.ring = tx_ring;
3342 q_vector->tx.count++;
3344 rx_ring->q_vector = q_vector;
3345 rx_ring->next = q_vector->rx.ring;
3346 q_vector->rx.ring = rx_ring;
3347 q_vector->rx.count++;
3351 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3352 * @vsi: the VSI being configured
3354 * This function maps descriptor rings to the queue-specific vectors
3355 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3356 * one vector per queue pair, but on a constrained vector budget, we
3357 * group the queue pairs as "efficiently" as possible.
3359 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3361 int qp_remaining = vsi->num_queue_pairs;
3362 int q_vectors = vsi->num_q_vectors;
3367 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3368 * group them so there are multiple queues per vector.
3369 * It is also important to go through all the vectors available to be
3370 * sure that if we don't use all the vectors, that the remaining vectors
3371 * are cleared. This is especially important when decreasing the
3372 * number of queues in use.
3374 for (; v_start < q_vectors; v_start++) {
3375 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3377 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3379 q_vector->num_ringpairs = num_ringpairs;
3381 q_vector->rx.count = 0;
3382 q_vector->tx.count = 0;
3383 q_vector->rx.ring = NULL;
3384 q_vector->tx.ring = NULL;
3386 while (num_ringpairs--) {
3387 map_vector_to_qp(vsi, v_start, qp_idx);
3395 * i40e_vsi_request_irq - Request IRQ from the OS
3396 * @vsi: the VSI being configured
3397 * @basename: name for the vector
3399 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3401 struct i40e_pf *pf = vsi->back;
3404 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3405 err = i40e_vsi_request_irq_msix(vsi, basename);
3406 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3407 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3410 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3414 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3419 #ifdef CONFIG_NET_POLL_CONTROLLER
3421 * i40e_netpoll - A Polling 'interrupt'handler
3422 * @netdev: network interface device structure
3424 * This is used by netconsole to send skbs without having to re-enable
3425 * interrupts. It's not called while the normal interrupt routine is executing.
3428 void i40e_netpoll(struct net_device *netdev)
3430 static void i40e_netpoll(struct net_device *netdev)
3433 struct i40e_netdev_priv *np = netdev_priv(netdev);
3434 struct i40e_vsi *vsi = np->vsi;
3435 struct i40e_pf *pf = vsi->back;
3438 /* if interface is down do nothing */
3439 if (test_bit(__I40E_DOWN, &vsi->state))
3442 pf->flags |= I40E_FLAG_IN_NETPOLL;
3443 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3444 for (i = 0; i < vsi->num_q_vectors; i++)
3445 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3447 i40e_intr(pf->pdev->irq, netdev);
3449 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3454 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3455 * @pf: the PF being configured
3456 * @pf_q: the PF queue
3457 * @enable: enable or disable state of the queue
3459 * This routine will wait for the given Tx queue of the PF to reach the
3460 * enabled or disabled state.
3461 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3462 * multiple retries; else will return 0 in case of success.
3464 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3469 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3470 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3471 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3474 usleep_range(10, 20);
3476 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3483 * i40e_vsi_control_tx - Start or stop a VSI's rings
3484 * @vsi: the VSI being configured
3485 * @enable: start or stop the rings
3487 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3489 struct i40e_pf *pf = vsi->back;
3490 struct i40e_hw *hw = &pf->hw;
3491 int i, j, pf_q, ret = 0;
3494 pf_q = vsi->base_queue;
3495 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3497 /* warn the TX unit of coming changes */
3498 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3500 usleep_range(10, 20);
3502 for (j = 0; j < 50; j++) {
3503 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3504 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3505 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3507 usleep_range(1000, 2000);
3509 /* Skip if the queue is already in the requested state */
3510 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3513 /* turn on/off the queue */
3515 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3516 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3518 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3521 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3522 /* No waiting for the Tx queue to disable */
3523 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3526 /* wait for the change to finish */
3527 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3529 dev_info(&pf->pdev->dev,
3530 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3531 __func__, vsi->seid, pf_q,
3532 (enable ? "en" : "dis"));
3537 if (hw->revision_id == 0)
3543 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3544 * @pf: the PF being configured
3545 * @pf_q: the PF queue
3546 * @enable: enable or disable state of the queue
3548 * This routine will wait for the given Rx queue of the PF to reach the
3549 * enabled or disabled state.
3550 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3551 * multiple retries; else will return 0 in case of success.
3553 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3558 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3559 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3560 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3563 usleep_range(10, 20);
3565 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3572 * i40e_vsi_control_rx - Start or stop a VSI's rings
3573 * @vsi: the VSI being configured
3574 * @enable: start or stop the rings
3576 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3578 struct i40e_pf *pf = vsi->back;
3579 struct i40e_hw *hw = &pf->hw;
3580 int i, j, pf_q, ret = 0;
3583 pf_q = vsi->base_queue;
3584 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3585 for (j = 0; j < 50; j++) {
3586 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3587 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3588 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3590 usleep_range(1000, 2000);
3593 /* Skip if the queue is already in the requested state */
3594 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3597 /* turn on/off the queue */
3599 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3601 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3602 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3604 /* wait for the change to finish */
3605 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3607 dev_info(&pf->pdev->dev,
3608 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3609 __func__, vsi->seid, pf_q,
3610 (enable ? "en" : "dis"));
3619 * i40e_vsi_control_rings - Start or stop a VSI's rings
3620 * @vsi: the VSI being configured
3621 * @enable: start or stop the rings
3623 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3627 /* do rx first for enable and last for disable */
3629 ret = i40e_vsi_control_rx(vsi, request);
3632 ret = i40e_vsi_control_tx(vsi, request);
3634 /* Ignore return value, we need to shutdown whatever we can */
3635 i40e_vsi_control_tx(vsi, request);
3636 i40e_vsi_control_rx(vsi, request);
3643 * i40e_vsi_free_irq - Free the irq association with the OS
3644 * @vsi: the VSI being configured
3646 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3648 struct i40e_pf *pf = vsi->back;
3649 struct i40e_hw *hw = &pf->hw;
3650 int base = vsi->base_vector;
3654 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3655 if (!vsi->q_vectors)
3658 if (!vsi->irqs_ready)
3661 vsi->irqs_ready = false;
3662 for (i = 0; i < vsi->num_q_vectors; i++) {
3663 u16 vector = i + base;
3665 /* free only the irqs that were actually requested */
3666 if (!vsi->q_vectors[i] ||
3667 !vsi->q_vectors[i]->num_ringpairs)
3670 /* clear the affinity_mask in the IRQ descriptor */
3671 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3673 free_irq(pf->msix_entries[vector].vector,
3676 /* Tear down the interrupt queue link list
3678 * We know that they come in pairs and always
3679 * the Rx first, then the Tx. To clear the
3680 * link list, stick the EOL value into the
3681 * next_q field of the registers.
3683 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3684 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3685 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3686 val |= I40E_QUEUE_END_OF_LIST
3687 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3688 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3690 while (qp != I40E_QUEUE_END_OF_LIST) {
3693 val = rd32(hw, I40E_QINT_RQCTL(qp));
3695 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3696 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3697 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3698 I40E_QINT_RQCTL_INTEVENT_MASK);
3700 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3701 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3703 wr32(hw, I40E_QINT_RQCTL(qp), val);
3705 val = rd32(hw, I40E_QINT_TQCTL(qp));
3707 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3708 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3710 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3711 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3712 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3713 I40E_QINT_TQCTL_INTEVENT_MASK);
3715 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3716 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3718 wr32(hw, I40E_QINT_TQCTL(qp), val);
3723 free_irq(pf->pdev->irq, pf);
3725 val = rd32(hw, I40E_PFINT_LNKLST0);
3726 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3727 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3728 val |= I40E_QUEUE_END_OF_LIST
3729 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3730 wr32(hw, I40E_PFINT_LNKLST0, val);
3732 val = rd32(hw, I40E_QINT_RQCTL(qp));
3733 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3734 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3735 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3736 I40E_QINT_RQCTL_INTEVENT_MASK);
3738 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3739 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3741 wr32(hw, I40E_QINT_RQCTL(qp), val);
3743 val = rd32(hw, I40E_QINT_TQCTL(qp));
3745 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3746 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3747 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3748 I40E_QINT_TQCTL_INTEVENT_MASK);
3750 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3751 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3753 wr32(hw, I40E_QINT_TQCTL(qp), val);
3758 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3759 * @vsi: the VSI being configured
3760 * @v_idx: Index of vector to be freed
3762 * This function frees the memory allocated to the q_vector. In addition if
3763 * NAPI is enabled it will delete any references to the NAPI struct prior
3764 * to freeing the q_vector.
3766 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3768 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3769 struct i40e_ring *ring;
3774 /* disassociate q_vector from rings */
3775 i40e_for_each_ring(ring, q_vector->tx)
3776 ring->q_vector = NULL;
3778 i40e_for_each_ring(ring, q_vector->rx)
3779 ring->q_vector = NULL;
3781 /* only VSI w/ an associated netdev is set up w/ NAPI */
3783 netif_napi_del(&q_vector->napi);
3785 vsi->q_vectors[v_idx] = NULL;
3787 kfree_rcu(q_vector, rcu);
3791 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3792 * @vsi: the VSI being un-configured
3794 * This frees the memory allocated to the q_vectors and
3795 * deletes references to the NAPI struct.
3797 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3801 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3802 i40e_free_q_vector(vsi, v_idx);
3806 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3807 * @pf: board private structure
3809 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3811 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3812 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3813 pci_disable_msix(pf->pdev);
3814 kfree(pf->msix_entries);
3815 pf->msix_entries = NULL;
3816 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3817 pci_disable_msi(pf->pdev);
3819 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3823 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3824 * @pf: board private structure
3826 * We go through and clear interrupt specific resources and reset the structure
3827 * to pre-load conditions
3829 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3833 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3834 for (i = 0; i < pf->num_alloc_vsi; i++)
3836 i40e_vsi_free_q_vectors(pf->vsi[i]);
3837 i40e_reset_interrupt_capability(pf);
3841 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3842 * @vsi: the VSI being configured
3844 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3851 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3852 napi_enable(&vsi->q_vectors[q_idx]->napi);
3856 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3857 * @vsi: the VSI being configured
3859 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3866 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3867 napi_disable(&vsi->q_vectors[q_idx]->napi);
3871 * i40e_vsi_close - Shut down a VSI
3872 * @vsi: the vsi to be quelled
3874 static void i40e_vsi_close(struct i40e_vsi *vsi)
3876 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3878 i40e_vsi_free_irq(vsi);
3879 i40e_vsi_free_tx_resources(vsi);
3880 i40e_vsi_free_rx_resources(vsi);
3884 * i40e_quiesce_vsi - Pause a given VSI
3885 * @vsi: the VSI being paused
3887 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3889 if (test_bit(__I40E_DOWN, &vsi->state))
3892 /* No need to disable FCoE VSI when Tx suspended */
3893 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
3894 vsi->type == I40E_VSI_FCOE) {
3895 dev_dbg(&vsi->back->pdev->dev,
3896 "%s: VSI seid %d skipping FCoE VSI disable\n",
3897 __func__, vsi->seid);
3901 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3902 if (vsi->netdev && netif_running(vsi->netdev)) {
3903 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3905 i40e_vsi_close(vsi);
3910 * i40e_unquiesce_vsi - Resume a given VSI
3911 * @vsi: the VSI being resumed
3913 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3915 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3918 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3919 if (vsi->netdev && netif_running(vsi->netdev))
3920 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3922 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3926 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3929 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3933 for (v = 0; v < pf->num_alloc_vsi; v++) {
3935 i40e_quiesce_vsi(pf->vsi[v]);
3940 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3943 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3947 for (v = 0; v < pf->num_alloc_vsi; v++) {
3949 i40e_unquiesce_vsi(pf->vsi[v]);
3953 #ifdef CONFIG_I40E_DCB
3955 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
3956 * @vsi: the VSI being configured
3958 * This function waits for the given VSI's Tx queues to be disabled.
3960 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
3962 struct i40e_pf *pf = vsi->back;
3965 pf_q = vsi->base_queue;
3966 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3967 /* Check and wait for the disable status of the queue */
3968 ret = i40e_pf_txq_wait(pf, pf_q, false);
3970 dev_info(&pf->pdev->dev,
3971 "%s: VSI seid %d Tx ring %d disable timeout\n",
3972 __func__, vsi->seid, pf_q);
3981 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
3984 * This function waits for the Tx queues to be in disabled state for all the
3985 * VSIs that are managed by this PF.
3987 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
3991 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3992 /* No need to wait for FCoE VSI queues */
3993 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
3994 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4005 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4006 * @pf: pointer to pf
4008 * Get TC map for ISCSI PF type that will include iSCSI TC
4011 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4013 struct i40e_dcb_app_priority_table app;
4014 struct i40e_hw *hw = &pf->hw;
4015 u8 enabled_tc = 1; /* TC0 is always enabled */
4017 /* Get the iSCSI APP TLV */
4018 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4020 for (i = 0; i < dcbcfg->numapps; i++) {
4021 app = dcbcfg->app[i];
4022 if (app.selector == I40E_APP_SEL_TCPIP &&
4023 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4024 tc = dcbcfg->etscfg.prioritytable[app.priority];
4025 enabled_tc |= (1 << tc);
4034 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4035 * @dcbcfg: the corresponding DCBx configuration structure
4037 * Return the number of TCs from given DCBx configuration
4039 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4044 /* Scan the ETS Config Priority Table to find
4045 * traffic class enabled for a given priority
4046 * and use the traffic class index to get the
4047 * number of traffic classes enabled
4049 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4050 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4051 num_tc = dcbcfg->etscfg.prioritytable[i];
4054 /* Traffic class index starts from zero so
4055 * increment to return the actual count
4061 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4062 * @dcbcfg: the corresponding DCBx configuration structure
4064 * Query the current DCB configuration and return the number of
4065 * traffic classes enabled from the given DCBX config
4067 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4069 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4073 for (i = 0; i < num_tc; i++)
4074 enabled_tc |= 1 << i;
4080 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4081 * @pf: PF being queried
4083 * Return number of traffic classes enabled for the given PF
4085 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4087 struct i40e_hw *hw = &pf->hw;
4090 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4092 /* If DCB is not enabled then always in single TC */
4093 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4096 /* SFP mode will be enabled for all TCs on port */
4097 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4098 return i40e_dcb_get_num_tc(dcbcfg);
4100 /* MFP mode return count of enabled TCs for this PF */
4101 if (pf->hw.func_caps.iscsi)
4102 enabled_tc = i40e_get_iscsi_tc_map(pf);
4104 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4106 /* At least have TC0 */
4107 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4108 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4109 if (enabled_tc & (1 << i))
4116 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4117 * @pf: PF being queried
4119 * Return a bitmap for first enabled traffic class for this PF.
4121 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4123 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4127 return 0x1; /* TC0 */
4129 /* Find the first enabled TC */
4130 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4131 if (enabled_tc & (1 << i))
4139 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4140 * @pf: PF being queried
4142 * Return a bitmap for enabled traffic classes for this PF.
4144 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4146 /* If DCB is not enabled for this PF then just return default TC */
4147 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4148 return i40e_pf_get_default_tc(pf);
4150 /* SFP mode we want PF to be enabled for all TCs */
4151 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4152 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4154 /* MPF enabled and iSCSI PF type */
4155 if (pf->hw.func_caps.iscsi)
4156 return i40e_get_iscsi_tc_map(pf);
4158 return pf->hw.func_caps.enabled_tcmap;
4162 * i40e_vsi_get_bw_info - Query VSI BW Information
4163 * @vsi: the VSI being queried
4165 * Returns 0 on success, negative value on failure
4167 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4169 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4170 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4171 struct i40e_pf *pf = vsi->back;
4172 struct i40e_hw *hw = &pf->hw;
4177 /* Get the VSI level BW configuration */
4178 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4180 dev_info(&pf->pdev->dev,
4181 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
4182 aq_ret, pf->hw.aq.asq_last_status);
4186 /* Get the VSI level BW configuration per TC */
4187 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4190 dev_info(&pf->pdev->dev,
4191 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
4192 aq_ret, pf->hw.aq.asq_last_status);
4196 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4197 dev_info(&pf->pdev->dev,
4198 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4199 bw_config.tc_valid_bits,
4200 bw_ets_config.tc_valid_bits);
4201 /* Still continuing */
4204 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4205 vsi->bw_max_quanta = bw_config.max_bw;
4206 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4207 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4208 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4209 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4210 vsi->bw_ets_limit_credits[i] =
4211 le16_to_cpu(bw_ets_config.credits[i]);
4212 /* 3 bits out of 4 for each TC */
4213 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4220 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4221 * @vsi: the VSI being configured
4222 * @enabled_tc: TC bitmap
4223 * @bw_credits: BW shared credits per TC
4225 * Returns 0 on success, negative value on failure
4227 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4230 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4234 bw_data.tc_valid_bits = enabled_tc;
4235 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4236 bw_data.tc_bw_credits[i] = bw_share[i];
4238 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4241 dev_info(&vsi->back->pdev->dev,
4242 "AQ command Config VSI BW allocation per TC failed = %d\n",
4243 vsi->back->hw.aq.asq_last_status);
4247 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4248 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4254 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4255 * @vsi: the VSI being configured
4256 * @enabled_tc: TC map to be enabled
4259 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4261 struct net_device *netdev = vsi->netdev;
4262 struct i40e_pf *pf = vsi->back;
4263 struct i40e_hw *hw = &pf->hw;
4266 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4272 netdev_reset_tc(netdev);
4276 /* Set up actual enabled TCs on the VSI */
4277 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4280 /* set per TC queues for the VSI */
4281 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4282 /* Only set TC queues for enabled tcs
4284 * e.g. For a VSI that has TC0 and TC3 enabled the
4285 * enabled_tc bitmap would be 0x00001001; the driver
4286 * will set the numtc for netdev as 2 that will be
4287 * referenced by the netdev layer as TC 0 and 1.
4289 if (vsi->tc_config.enabled_tc & (1 << i))
4290 netdev_set_tc_queue(netdev,
4291 vsi->tc_config.tc_info[i].netdev_tc,
4292 vsi->tc_config.tc_info[i].qcount,
4293 vsi->tc_config.tc_info[i].qoffset);
4296 /* Assign UP2TC map for the VSI */
4297 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4298 /* Get the actual TC# for the UP */
4299 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4300 /* Get the mapped netdev TC# for the UP */
4301 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4302 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4307 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4308 * @vsi: the VSI being configured
4309 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4311 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4312 struct i40e_vsi_context *ctxt)
4314 /* copy just the sections touched not the entire info
4315 * since not all sections are valid as returned by
4318 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4319 memcpy(&vsi->info.queue_mapping,
4320 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4321 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4322 sizeof(vsi->info.tc_mapping));
4326 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4327 * @vsi: VSI to be configured
4328 * @enabled_tc: TC bitmap
4330 * This configures a particular VSI for TCs that are mapped to the
4331 * given TC bitmap. It uses default bandwidth share for TCs across
4332 * VSIs to configure TC for a particular VSI.
4335 * It is expected that the VSI queues have been quisced before calling
4338 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4340 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4341 struct i40e_vsi_context ctxt;
4345 /* Check if enabled_tc is same as existing or new TCs */
4346 if (vsi->tc_config.enabled_tc == enabled_tc)
4349 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4350 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4351 if (enabled_tc & (1 << i))
4355 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4357 dev_info(&vsi->back->pdev->dev,
4358 "Failed configuring TC map %d for VSI %d\n",
4359 enabled_tc, vsi->seid);
4363 /* Update Queue Pairs Mapping for currently enabled UPs */
4364 ctxt.seid = vsi->seid;
4365 ctxt.pf_num = vsi->back->hw.pf_id;
4367 ctxt.uplink_seid = vsi->uplink_seid;
4368 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4369 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4371 /* Update the VSI after updating the VSI queue-mapping information */
4372 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4374 dev_info(&vsi->back->pdev->dev,
4375 "update vsi failed, aq_err=%d\n",
4376 vsi->back->hw.aq.asq_last_status);
4379 /* update the local VSI info with updated queue map */
4380 i40e_vsi_update_queue_map(vsi, &ctxt);
4381 vsi->info.valid_sections = 0;
4383 /* Update current VSI BW information */
4384 ret = i40e_vsi_get_bw_info(vsi);
4386 dev_info(&vsi->back->pdev->dev,
4387 "Failed updating vsi bw info, aq_err=%d\n",
4388 vsi->back->hw.aq.asq_last_status);
4392 /* Update the netdev TC setup */
4393 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4399 * i40e_veb_config_tc - Configure TCs for given VEB
4401 * @enabled_tc: TC bitmap
4403 * Configures given TC bitmap for VEB (switching) element
4405 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4407 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4408 struct i40e_pf *pf = veb->pf;
4412 /* No TCs or already enabled TCs just return */
4413 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4416 bw_data.tc_valid_bits = enabled_tc;
4417 /* bw_data.absolute_credits is not set (relative) */
4419 /* Enable ETS TCs with equal BW Share for now */
4420 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4421 if (enabled_tc & (1 << i))
4422 bw_data.tc_bw_share_credits[i] = 1;
4425 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4428 dev_info(&pf->pdev->dev,
4429 "veb bw config failed, aq_err=%d\n",
4430 pf->hw.aq.asq_last_status);
4434 /* Update the BW information */
4435 ret = i40e_veb_get_bw_info(veb);
4437 dev_info(&pf->pdev->dev,
4438 "Failed getting veb bw config, aq_err=%d\n",
4439 pf->hw.aq.asq_last_status);
4446 #ifdef CONFIG_I40E_DCB
4448 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4451 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4452 * the caller would've quiesce all the VSIs before calling
4455 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4461 /* Enable the TCs available on PF to all VEBs */
4462 tc_map = i40e_pf_get_tc_map(pf);
4463 for (v = 0; v < I40E_MAX_VEB; v++) {
4466 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4468 dev_info(&pf->pdev->dev,
4469 "Failed configuring TC for VEB seid=%d\n",
4471 /* Will try to configure as many components */
4475 /* Update each VSI */
4476 for (v = 0; v < pf->num_alloc_vsi; v++) {
4480 /* - Enable all TCs for the LAN VSI
4482 * - For FCoE VSI only enable the TC configured
4483 * as per the APP TLV
4485 * - For all others keep them at TC0 for now
4487 if (v == pf->lan_vsi)
4488 tc_map = i40e_pf_get_tc_map(pf);
4490 tc_map = i40e_pf_get_default_tc(pf);
4492 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4493 tc_map = i40e_get_fcoe_tc_map(pf);
4494 #endif /* #ifdef I40E_FCOE */
4496 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4498 dev_info(&pf->pdev->dev,
4499 "Failed configuring TC for VSI seid=%d\n",
4501 /* Will try to configure as many components */
4503 /* Re-configure VSI vectors based on updated TC map */
4504 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4505 if (pf->vsi[v]->netdev)
4506 i40e_dcbnl_set_all(pf->vsi[v]);
4512 * i40e_resume_port_tx - Resume port Tx
4515 * Resume a port's Tx and issue a PF reset in case of failure to
4518 static int i40e_resume_port_tx(struct i40e_pf *pf)
4520 struct i40e_hw *hw = &pf->hw;
4523 ret = i40e_aq_resume_port_tx(hw, NULL);
4525 dev_info(&pf->pdev->dev,
4526 "AQ command Resume Port Tx failed = %d\n",
4527 pf->hw.aq.asq_last_status);
4528 /* Schedule PF reset to recover */
4529 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4530 i40e_service_event_schedule(pf);
4537 * i40e_init_pf_dcb - Initialize DCB configuration
4538 * @pf: PF being configured
4540 * Query the current DCB configuration and cache it
4541 * in the hardware structure
4543 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4545 struct i40e_hw *hw = &pf->hw;
4548 /* Get the initial DCB configuration */
4549 err = i40e_init_dcb(hw);
4551 /* Device/Function is not DCBX capable */
4552 if ((!hw->func_caps.dcb) ||
4553 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4554 dev_info(&pf->pdev->dev,
4555 "DCBX offload is not supported or is disabled for this PF.\n");
4557 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4561 /* When status is not DISABLED then DCBX in FW */
4562 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4563 DCB_CAP_DCBX_VER_IEEE;
4565 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4566 /* Enable DCB tagging only when more than one TC */
4567 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4568 pf->flags |= I40E_FLAG_DCB_ENABLED;
4569 dev_dbg(&pf->pdev->dev,
4570 "DCBX offload is supported for this PF.\n");
4573 dev_info(&pf->pdev->dev,
4574 "AQ Querying DCB configuration failed: aq_err %d\n",
4575 pf->hw.aq.asq_last_status);
4581 #endif /* CONFIG_I40E_DCB */
4582 #define SPEED_SIZE 14
4585 * i40e_print_link_message - print link up or down
4586 * @vsi: the VSI for which link needs a message
4588 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4590 char speed[SPEED_SIZE] = "Unknown";
4591 char fc[FC_SIZE] = "RX/TX";
4594 netdev_info(vsi->netdev, "NIC Link is Down\n");
4598 /* Warn user if link speed on NPAR enabled partition is not at
4601 if (vsi->back->hw.func_caps.npar_enable &&
4602 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4603 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4604 netdev_warn(vsi->netdev,
4605 "The partition detected link speed that is less than 10Gbps\n");
4607 switch (vsi->back->hw.phy.link_info.link_speed) {
4608 case I40E_LINK_SPEED_40GB:
4609 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4611 case I40E_LINK_SPEED_10GB:
4612 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4614 case I40E_LINK_SPEED_1GB:
4615 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4617 case I40E_LINK_SPEED_100MB:
4618 strncpy(speed, "100 Mbps", SPEED_SIZE);
4624 switch (vsi->back->hw.fc.current_mode) {
4626 strlcpy(fc, "RX/TX", FC_SIZE);
4628 case I40E_FC_TX_PAUSE:
4629 strlcpy(fc, "TX", FC_SIZE);
4631 case I40E_FC_RX_PAUSE:
4632 strlcpy(fc, "RX", FC_SIZE);
4635 strlcpy(fc, "None", FC_SIZE);
4639 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4644 * i40e_up_complete - Finish the last steps of bringing up a connection
4645 * @vsi: the VSI being configured
4647 static int i40e_up_complete(struct i40e_vsi *vsi)
4649 struct i40e_pf *pf = vsi->back;
4652 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4653 i40e_vsi_configure_msix(vsi);
4655 i40e_configure_msi_and_legacy(vsi);
4658 err = i40e_vsi_control_rings(vsi, true);
4662 clear_bit(__I40E_DOWN, &vsi->state);
4663 i40e_napi_enable_all(vsi);
4664 i40e_vsi_enable_irq(vsi);
4666 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4668 i40e_print_link_message(vsi, true);
4669 netif_tx_start_all_queues(vsi->netdev);
4670 netif_carrier_on(vsi->netdev);
4671 } else if (vsi->netdev) {
4672 i40e_print_link_message(vsi, false);
4673 /* need to check for qualified module here*/
4674 if ((pf->hw.phy.link_info.link_info &
4675 I40E_AQ_MEDIA_AVAILABLE) &&
4676 (!(pf->hw.phy.link_info.an_info &
4677 I40E_AQ_QUALIFIED_MODULE)))
4678 netdev_err(vsi->netdev,
4679 "the driver failed to link because an unqualified module was detected.");
4682 /* replay FDIR SB filters */
4683 if (vsi->type == I40E_VSI_FDIR) {
4684 /* reset fd counters */
4685 pf->fd_add_err = pf->fd_atr_cnt = 0;
4686 if (pf->fd_tcp_rule > 0) {
4687 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4688 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4689 pf->fd_tcp_rule = 0;
4691 i40e_fdir_filter_restore(vsi);
4693 i40e_service_event_schedule(pf);
4699 * i40e_vsi_reinit_locked - Reset the VSI
4700 * @vsi: the VSI being configured
4702 * Rebuild the ring structs after some configuration
4703 * has changed, e.g. MTU size.
4705 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4707 struct i40e_pf *pf = vsi->back;
4709 WARN_ON(in_interrupt());
4710 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4711 usleep_range(1000, 2000);
4714 /* Give a VF some time to respond to the reset. The
4715 * two second wait is based upon the watchdog cycle in
4718 if (vsi->type == I40E_VSI_SRIOV)
4721 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4725 * i40e_up - Bring the connection back up after being down
4726 * @vsi: the VSI being configured
4728 int i40e_up(struct i40e_vsi *vsi)
4732 err = i40e_vsi_configure(vsi);
4734 err = i40e_up_complete(vsi);
4740 * i40e_down - Shutdown the connection processing
4741 * @vsi: the VSI being stopped
4743 void i40e_down(struct i40e_vsi *vsi)
4747 /* It is assumed that the caller of this function
4748 * sets the vsi->state __I40E_DOWN bit.
4751 netif_carrier_off(vsi->netdev);
4752 netif_tx_disable(vsi->netdev);
4754 i40e_vsi_disable_irq(vsi);
4755 i40e_vsi_control_rings(vsi, false);
4756 i40e_napi_disable_all(vsi);
4758 for (i = 0; i < vsi->num_queue_pairs; i++) {
4759 i40e_clean_tx_ring(vsi->tx_rings[i]);
4760 i40e_clean_rx_ring(vsi->rx_rings[i]);
4765 * i40e_setup_tc - configure multiple traffic classes
4766 * @netdev: net device to configure
4767 * @tc: number of traffic classes to enable
4770 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4772 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4775 struct i40e_netdev_priv *np = netdev_priv(netdev);
4776 struct i40e_vsi *vsi = np->vsi;
4777 struct i40e_pf *pf = vsi->back;
4782 /* Check if DCB enabled to continue */
4783 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4784 netdev_info(netdev, "DCB is not enabled for adapter\n");
4788 /* Check if MFP enabled */
4789 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4790 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4794 /* Check whether tc count is within enabled limit */
4795 if (tc > i40e_pf_get_num_tc(pf)) {
4796 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4800 /* Generate TC map for number of tc requested */
4801 for (i = 0; i < tc; i++)
4802 enabled_tc |= (1 << i);
4804 /* Requesting same TC configuration as already enabled */
4805 if (enabled_tc == vsi->tc_config.enabled_tc)
4808 /* Quiesce VSI queues */
4809 i40e_quiesce_vsi(vsi);
4811 /* Configure VSI for enabled TCs */
4812 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4814 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4820 i40e_unquiesce_vsi(vsi);
4827 * i40e_open - Called when a network interface is made active
4828 * @netdev: network interface device structure
4830 * The open entry point is called when a network interface is made
4831 * active by the system (IFF_UP). At this point all resources needed
4832 * for transmit and receive operations are allocated, the interrupt
4833 * handler is registered with the OS, the netdev watchdog subtask is
4834 * enabled, and the stack is notified that the interface is ready.
4836 * Returns 0 on success, negative value on failure
4838 int i40e_open(struct net_device *netdev)
4840 struct i40e_netdev_priv *np = netdev_priv(netdev);
4841 struct i40e_vsi *vsi = np->vsi;
4842 struct i40e_pf *pf = vsi->back;
4845 /* disallow open during test or if eeprom is broken */
4846 if (test_bit(__I40E_TESTING, &pf->state) ||
4847 test_bit(__I40E_BAD_EEPROM, &pf->state))
4850 netif_carrier_off(netdev);
4852 err = i40e_vsi_open(vsi);
4856 /* configure global TSO hardware offload settings */
4857 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4858 TCP_FLAG_FIN) >> 16);
4859 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4861 TCP_FLAG_CWR) >> 16);
4862 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4864 #ifdef CONFIG_I40E_VXLAN
4865 vxlan_get_rx_port(netdev);
4873 * @vsi: the VSI to open
4875 * Finish initialization of the VSI.
4877 * Returns 0 on success, negative value on failure
4879 int i40e_vsi_open(struct i40e_vsi *vsi)
4881 struct i40e_pf *pf = vsi->back;
4882 char int_name[I40E_INT_NAME_STR_LEN];
4885 /* allocate descriptors */
4886 err = i40e_vsi_setup_tx_resources(vsi);
4889 err = i40e_vsi_setup_rx_resources(vsi);
4893 err = i40e_vsi_configure(vsi);
4898 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4899 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4900 err = i40e_vsi_request_irq(vsi, int_name);
4904 /* Notify the stack of the actual queue counts. */
4905 err = netif_set_real_num_tx_queues(vsi->netdev,
4906 vsi->num_queue_pairs);
4908 goto err_set_queues;
4910 err = netif_set_real_num_rx_queues(vsi->netdev,
4911 vsi->num_queue_pairs);
4913 goto err_set_queues;
4915 } else if (vsi->type == I40E_VSI_FDIR) {
4916 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
4917 dev_driver_string(&pf->pdev->dev),
4918 dev_name(&pf->pdev->dev));
4919 err = i40e_vsi_request_irq(vsi, int_name);
4926 err = i40e_up_complete(vsi);
4928 goto err_up_complete;
4935 i40e_vsi_free_irq(vsi);
4937 i40e_vsi_free_rx_resources(vsi);
4939 i40e_vsi_free_tx_resources(vsi);
4940 if (vsi == pf->vsi[pf->lan_vsi])
4941 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4947 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4948 * @pf: Pointer to pf
4950 * This function destroys the hlist where all the Flow Director
4951 * filters were saved.
4953 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4955 struct i40e_fdir_filter *filter;
4956 struct hlist_node *node2;
4958 hlist_for_each_entry_safe(filter, node2,
4959 &pf->fdir_filter_list, fdir_node) {
4960 hlist_del(&filter->fdir_node);
4963 pf->fdir_pf_active_filters = 0;
4967 * i40e_close - Disables a network interface
4968 * @netdev: network interface device structure
4970 * The close entry point is called when an interface is de-activated
4971 * by the OS. The hardware is still under the driver's control, but
4972 * this netdev interface is disabled.
4974 * Returns 0, this is not allowed to fail
4977 int i40e_close(struct net_device *netdev)
4979 static int i40e_close(struct net_device *netdev)
4982 struct i40e_netdev_priv *np = netdev_priv(netdev);
4983 struct i40e_vsi *vsi = np->vsi;
4985 i40e_vsi_close(vsi);
4991 * i40e_do_reset - Start a PF or Core Reset sequence
4992 * @pf: board private structure
4993 * @reset_flags: which reset is requested
4995 * The essential difference in resets is that the PF Reset
4996 * doesn't clear the packet buffers, doesn't reset the PE
4997 * firmware, and doesn't bother the other PFs on the chip.
4999 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5003 WARN_ON(in_interrupt());
5005 if (i40e_check_asq_alive(&pf->hw))
5006 i40e_vc_notify_reset(pf);
5008 /* do the biggest reset indicated */
5009 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
5011 /* Request a Global Reset
5013 * This will start the chip's countdown to the actual full
5014 * chip reset event, and a warning interrupt to be sent
5015 * to all PFs, including the requestor. Our handler
5016 * for the warning interrupt will deal with the shutdown
5017 * and recovery of the switch setup.
5019 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5020 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5021 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5022 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5024 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
5026 /* Request a Core Reset
5028 * Same as Global Reset, except does *not* include the MAC/PHY
5030 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5031 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5032 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5033 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5034 i40e_flush(&pf->hw);
5036 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
5038 /* Request a PF Reset
5040 * Resets only the PF-specific registers
5042 * This goes directly to the tear-down and rebuild of
5043 * the switch, since we need to do all the recovery as
5044 * for the Core Reset.
5046 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5047 i40e_handle_reset_warning(pf);
5049 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
5052 /* Find the VSI(s) that requested a re-init */
5053 dev_info(&pf->pdev->dev,
5054 "VSI reinit requested\n");
5055 for (v = 0; v < pf->num_alloc_vsi; v++) {
5056 struct i40e_vsi *vsi = pf->vsi[v];
5058 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5059 i40e_vsi_reinit_locked(pf->vsi[v]);
5060 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5064 /* no further action needed, so return now */
5066 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
5069 /* Find the VSI(s) that needs to be brought down */
5070 dev_info(&pf->pdev->dev, "VSI down requested\n");
5071 for (v = 0; v < pf->num_alloc_vsi; v++) {
5072 struct i40e_vsi *vsi = pf->vsi[v];
5074 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5075 set_bit(__I40E_DOWN, &vsi->state);
5077 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5081 /* no further action needed, so return now */
5084 dev_info(&pf->pdev->dev,
5085 "bad reset request 0x%08x\n", reset_flags);
5090 #ifdef CONFIG_I40E_DCB
5092 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5093 * @pf: board private structure
5094 * @old_cfg: current DCB config
5095 * @new_cfg: new DCB config
5097 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5098 struct i40e_dcbx_config *old_cfg,
5099 struct i40e_dcbx_config *new_cfg)
5101 bool need_reconfig = false;
5103 /* Check if ETS configuration has changed */
5104 if (memcmp(&new_cfg->etscfg,
5106 sizeof(new_cfg->etscfg))) {
5107 /* If Priority Table has changed reconfig is needed */
5108 if (memcmp(&new_cfg->etscfg.prioritytable,
5109 &old_cfg->etscfg.prioritytable,
5110 sizeof(new_cfg->etscfg.prioritytable))) {
5111 need_reconfig = true;
5112 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5115 if (memcmp(&new_cfg->etscfg.tcbwtable,
5116 &old_cfg->etscfg.tcbwtable,
5117 sizeof(new_cfg->etscfg.tcbwtable)))
5118 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5120 if (memcmp(&new_cfg->etscfg.tsatable,
5121 &old_cfg->etscfg.tsatable,
5122 sizeof(new_cfg->etscfg.tsatable)))
5123 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5126 /* Check if PFC configuration has changed */
5127 if (memcmp(&new_cfg->pfc,
5129 sizeof(new_cfg->pfc))) {
5130 need_reconfig = true;
5131 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5134 /* Check if APP Table has changed */
5135 if (memcmp(&new_cfg->app,
5137 sizeof(new_cfg->app))) {
5138 need_reconfig = true;
5139 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5142 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5144 return need_reconfig;
5148 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5149 * @pf: board private structure
5150 * @e: event info posted on ARQ
5152 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5153 struct i40e_arq_event_info *e)
5155 struct i40e_aqc_lldp_get_mib *mib =
5156 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5157 struct i40e_hw *hw = &pf->hw;
5158 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
5159 struct i40e_dcbx_config tmp_dcbx_cfg;
5160 bool need_reconfig = false;
5164 /* Not DCB capable or capability disabled */
5165 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5168 /* Ignore if event is not for Nearest Bridge */
5169 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5170 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5171 dev_dbg(&pf->pdev->dev,
5172 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5173 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5176 /* Check MIB Type and return if event for Remote MIB update */
5177 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5178 dev_dbg(&pf->pdev->dev,
5179 "%s: LLDP event mib type %s\n", __func__,
5180 type ? "remote" : "local");
5181 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5182 /* Update the remote cached instance and return */
5183 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5184 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5185 &hw->remote_dcbx_config);
5189 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
5190 /* Store the old configuration */
5191 tmp_dcbx_cfg = *dcbx_cfg;
5193 /* Get updated DCBX data from firmware */
5194 ret = i40e_get_dcb_config(&pf->hw);
5196 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n");
5200 /* No change detected in DCBX configs */
5201 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
5202 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5206 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, dcbx_cfg);
5208 i40e_dcbnl_flush_apps(pf, dcbx_cfg);
5213 /* Enable DCB tagging only when more than one TC */
5214 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1)
5215 pf->flags |= I40E_FLAG_DCB_ENABLED;
5217 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5219 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5220 /* Reconfiguration needed quiesce all VSIs */
5221 i40e_pf_quiesce_all_vsi(pf);
5223 /* Changes in configuration update VEB/VSI */
5224 i40e_dcb_reconfigure(pf);
5226 ret = i40e_resume_port_tx(pf);
5228 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5229 /* In case of error no point in resuming VSIs */
5233 /* Wait for the PF's Tx queues to be disabled */
5234 ret = i40e_pf_wait_txq_disabled(pf);
5236 i40e_pf_unquiesce_all_vsi(pf);
5240 #endif /* CONFIG_I40E_DCB */
5243 * i40e_do_reset_safe - Protected reset path for userland calls.
5244 * @pf: board private structure
5245 * @reset_flags: which reset is requested
5248 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5251 i40e_do_reset(pf, reset_flags);
5256 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5257 * @pf: board private structure
5258 * @e: event info posted on ARQ
5260 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5263 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5264 struct i40e_arq_event_info *e)
5266 struct i40e_aqc_lan_overflow *data =
5267 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5268 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5269 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5270 struct i40e_hw *hw = &pf->hw;
5274 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5277 /* Queue belongs to VF, find the VF and issue VF reset */
5278 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5279 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5280 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5281 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5282 vf_id -= hw->func_caps.vf_base_id;
5283 vf = &pf->vf[vf_id];
5284 i40e_vc_notify_vf_reset(vf);
5285 /* Allow VF to process pending reset notification */
5287 i40e_reset_vf(vf, false);
5292 * i40e_service_event_complete - Finish up the service event
5293 * @pf: board private structure
5295 static void i40e_service_event_complete(struct i40e_pf *pf)
5297 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5299 /* flush memory to make sure state is correct before next watchog */
5300 smp_mb__before_atomic();
5301 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5305 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5306 * @pf: board private structure
5308 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5312 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5313 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5318 * i40e_get_current_fd_count - Get the count of total FD filters programmed
5319 * @pf: board private structure
5321 int i40e_get_current_fd_count(struct i40e_pf *pf)
5324 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5325 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5326 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5327 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5332 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5333 * @pf: board private structure
5335 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5337 u32 fcnt_prog, fcnt_avail;
5339 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5342 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5345 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
5346 fcnt_avail = pf->fdir_pf_filter_count;
5347 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5348 (pf->fd_add_err == 0) ||
5349 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5350 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5351 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5352 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5353 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5356 /* Wait for some more space to be available to turn on ATR */
5357 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5358 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5359 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5360 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5361 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5366 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5368 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5369 * @pf: board private structure
5371 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5373 int flush_wait_retry = 50;
5376 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5379 if (time_after(jiffies, pf->fd_flush_timestamp +
5380 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5381 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5382 pf->fd_flush_timestamp = jiffies;
5383 pf->auto_disable_flags |= I40E_FLAG_FD_SB_ENABLED;
5384 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5385 /* flush all filters */
5386 wr32(&pf->hw, I40E_PFQF_CTL_1,
5387 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5388 i40e_flush(&pf->hw);
5392 /* Check FD flush status every 5-6msec */
5393 usleep_range(5000, 6000);
5394 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5395 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5397 } while (flush_wait_retry--);
5398 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5399 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5401 /* replay sideband filters */
5402 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5404 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5405 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5406 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5407 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5408 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5414 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5415 * @pf: board private structure
5417 int i40e_get_current_atr_cnt(struct i40e_pf *pf)
5419 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5422 /* We can see up to 256 filter programming desc in transit if the filters are
5423 * being applied really fast; before we see the first
5424 * filter miss error on Rx queue 0. Accumulating enough error messages before
5425 * reacting will make sure we don't cause flush too often.
5427 #define I40E_MAX_FD_PROGRAM_ERROR 256
5430 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5431 * @pf: board private structure
5433 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5436 /* if interface is down do nothing */
5437 if (test_bit(__I40E_DOWN, &pf->state))
5440 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5443 if ((pf->fd_add_err >= I40E_MAX_FD_PROGRAM_ERROR) &&
5444 (i40e_get_current_atr_cnt(pf) >= pf->fd_atr_cnt) &&
5445 (i40e_get_current_atr_cnt(pf) > pf->fdir_pf_filter_count))
5446 i40e_fdir_flush_and_replay(pf);
5448 i40e_fdir_check_and_reenable(pf);
5453 * i40e_vsi_link_event - notify VSI of a link event
5454 * @vsi: vsi to be notified
5455 * @link_up: link up or down
5457 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5459 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5462 switch (vsi->type) {
5467 if (!vsi->netdev || !vsi->netdev_registered)
5471 netif_carrier_on(vsi->netdev);
5472 netif_tx_wake_all_queues(vsi->netdev);
5474 netif_carrier_off(vsi->netdev);
5475 netif_tx_stop_all_queues(vsi->netdev);
5479 case I40E_VSI_SRIOV:
5480 case I40E_VSI_VMDQ2:
5482 case I40E_VSI_MIRROR:
5484 /* there is no notification for other VSIs */
5490 * i40e_veb_link_event - notify elements on the veb of a link event
5491 * @veb: veb to be notified
5492 * @link_up: link up or down
5494 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5499 if (!veb || !veb->pf)
5503 /* depth first... */
5504 for (i = 0; i < I40E_MAX_VEB; i++)
5505 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5506 i40e_veb_link_event(pf->veb[i], link_up);
5508 /* ... now the local VSIs */
5509 for (i = 0; i < pf->num_alloc_vsi; i++)
5510 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5511 i40e_vsi_link_event(pf->vsi[i], link_up);
5515 * i40e_link_event - Update netif_carrier status
5516 * @pf: board private structure
5518 static void i40e_link_event(struct i40e_pf *pf)
5520 bool new_link, old_link;
5521 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5522 u8 new_link_speed, old_link_speed;
5524 /* set this to force the get_link_status call to refresh state */
5525 pf->hw.phy.get_link_info = true;
5527 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5528 new_link = i40e_get_link_status(&pf->hw);
5529 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5530 new_link_speed = pf->hw.phy.link_info.link_speed;
5532 if (new_link == old_link &&
5533 new_link_speed == old_link_speed &&
5534 (test_bit(__I40E_DOWN, &vsi->state) ||
5535 new_link == netif_carrier_ok(vsi->netdev)))
5538 if (!test_bit(__I40E_DOWN, &vsi->state))
5539 i40e_print_link_message(vsi, new_link);
5541 /* Notify the base of the switch tree connected to
5542 * the link. Floating VEBs are not notified.
5544 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5545 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5547 i40e_vsi_link_event(vsi, new_link);
5550 i40e_vc_notify_link_state(pf);
5552 if (pf->flags & I40E_FLAG_PTP)
5553 i40e_ptp_set_increment(pf);
5557 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5558 * @pf: board private structure
5560 * Set the per-queue flags to request a check for stuck queues in the irq
5561 * clean functions, then force interrupts to be sure the irq clean is called.
5563 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5567 /* If we're down or resetting, just bail */
5568 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5571 /* for each VSI/netdev
5573 * set the check flag
5575 * force an interrupt
5577 for (v = 0; v < pf->num_alloc_vsi; v++) {
5578 struct i40e_vsi *vsi = pf->vsi[v];
5582 test_bit(__I40E_DOWN, &vsi->state) ||
5583 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5586 for (i = 0; i < vsi->num_queue_pairs; i++) {
5587 set_check_for_tx_hang(vsi->tx_rings[i]);
5588 if (test_bit(__I40E_HANG_CHECK_ARMED,
5589 &vsi->tx_rings[i]->state))
5594 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5595 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5596 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5597 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
5598 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
5599 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
5600 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
5602 u16 vec = vsi->base_vector - 1;
5603 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5604 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
5605 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK |
5606 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
5607 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK);
5608 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5609 wr32(&vsi->back->hw,
5610 I40E_PFINT_DYN_CTLN(vec), val);
5612 i40e_flush(&vsi->back->hw);
5618 * i40e_watchdog_subtask - periodic checks not using event driven response
5619 * @pf: board private structure
5621 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5625 /* if interface is down do nothing */
5626 if (test_bit(__I40E_DOWN, &pf->state) ||
5627 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5630 /* make sure we don't do these things too often */
5631 if (time_before(jiffies, (pf->service_timer_previous +
5632 pf->service_timer_period)))
5634 pf->service_timer_previous = jiffies;
5636 i40e_check_hang_subtask(pf);
5637 i40e_link_event(pf);
5639 /* Update the stats for active netdevs so the network stack
5640 * can look at updated numbers whenever it cares to
5642 for (i = 0; i < pf->num_alloc_vsi; i++)
5643 if (pf->vsi[i] && pf->vsi[i]->netdev)
5644 i40e_update_stats(pf->vsi[i]);
5646 /* Update the stats for the active switching components */
5647 for (i = 0; i < I40E_MAX_VEB; i++)
5649 i40e_update_veb_stats(pf->veb[i]);
5651 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5655 * i40e_reset_subtask - Set up for resetting the device and driver
5656 * @pf: board private structure
5658 static void i40e_reset_subtask(struct i40e_pf *pf)
5660 u32 reset_flags = 0;
5663 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5664 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5665 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5667 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5668 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5669 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5671 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5672 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5673 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5675 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5676 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5677 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5679 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5680 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5681 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5684 /* If there's a recovery already waiting, it takes
5685 * precedence before starting a new reset sequence.
5687 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5688 i40e_handle_reset_warning(pf);
5692 /* If we're already down or resetting, just bail */
5694 !test_bit(__I40E_DOWN, &pf->state) &&
5695 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5696 i40e_do_reset(pf, reset_flags);
5703 * i40e_handle_link_event - Handle link event
5704 * @pf: board private structure
5705 * @e: event info posted on ARQ
5707 static void i40e_handle_link_event(struct i40e_pf *pf,
5708 struct i40e_arq_event_info *e)
5710 struct i40e_hw *hw = &pf->hw;
5711 struct i40e_aqc_get_link_status *status =
5712 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5713 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5715 /* save off old link status information */
5716 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5717 sizeof(pf->hw.phy.link_info_old));
5719 /* Do a new status request to re-enable LSE reporting
5720 * and load new status information into the hw struct
5721 * This completely ignores any state information
5722 * in the ARQ event info, instead choosing to always
5723 * issue the AQ update link status command.
5725 i40e_link_event(pf);
5727 /* check for unqualified module, if link is down */
5728 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5729 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5730 (!(status->link_info & I40E_AQ_LINK_UP)))
5731 dev_err(&pf->pdev->dev,
5732 "The driver failed to link because an unqualified module was detected.\n");
5736 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5737 * @pf: board private structure
5739 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5741 struct i40e_arq_event_info event;
5742 struct i40e_hw *hw = &pf->hw;
5749 /* Do not run clean AQ when PF reset fails */
5750 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5753 /* check for error indications */
5754 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5756 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5757 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5758 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5760 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5761 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5762 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5764 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5765 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5766 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5769 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5771 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5773 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5774 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5775 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5777 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5778 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5779 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5781 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5782 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5783 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5786 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5788 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5789 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5794 ret = i40e_clean_arq_element(hw, &event, &pending);
5795 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5798 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5802 opcode = le16_to_cpu(event.desc.opcode);
5805 case i40e_aqc_opc_get_link_status:
5806 i40e_handle_link_event(pf, &event);
5808 case i40e_aqc_opc_send_msg_to_pf:
5809 ret = i40e_vc_process_vf_msg(pf,
5810 le16_to_cpu(event.desc.retval),
5811 le32_to_cpu(event.desc.cookie_high),
5812 le32_to_cpu(event.desc.cookie_low),
5816 case i40e_aqc_opc_lldp_update_mib:
5817 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5818 #ifdef CONFIG_I40E_DCB
5820 ret = i40e_handle_lldp_event(pf, &event);
5822 #endif /* CONFIG_I40E_DCB */
5824 case i40e_aqc_opc_event_lan_overflow:
5825 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5826 i40e_handle_lan_overflow_event(pf, &event);
5828 case i40e_aqc_opc_send_msg_to_peer:
5829 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5832 dev_info(&pf->pdev->dev,
5833 "ARQ Error: Unknown event 0x%04x received\n",
5837 } while (pending && (i++ < pf->adminq_work_limit));
5839 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5840 /* re-enable Admin queue interrupt cause */
5841 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5842 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5843 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5846 kfree(event.msg_buf);
5850 * i40e_verify_eeprom - make sure eeprom is good to use
5851 * @pf: board private structure
5853 static void i40e_verify_eeprom(struct i40e_pf *pf)
5857 err = i40e_diag_eeprom_test(&pf->hw);
5859 /* retry in case of garbage read */
5860 err = i40e_diag_eeprom_test(&pf->hw);
5862 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5864 set_bit(__I40E_BAD_EEPROM, &pf->state);
5868 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5869 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5870 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5875 * i40e_config_bridge_mode - Configure the HW bridge mode
5876 * @veb: pointer to the bridge instance
5878 * Configure the loop back mode for the LAN VSI that is downlink to the
5879 * specified HW bridge instance. It is expected this function is called
5880 * when a new HW bridge is instantiated.
5882 static void i40e_config_bridge_mode(struct i40e_veb *veb)
5884 struct i40e_pf *pf = veb->pf;
5886 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
5887 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
5888 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
5889 i40e_disable_pf_switch_lb(pf);
5891 i40e_enable_pf_switch_lb(pf);
5895 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5896 * @veb: pointer to the VEB instance
5898 * This is a recursive function that first builds the attached VSIs then
5899 * recurses in to build the next layer of VEB. We track the connections
5900 * through our own index numbers because the seid's from the HW could
5901 * change across the reset.
5903 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5905 struct i40e_vsi *ctl_vsi = NULL;
5906 struct i40e_pf *pf = veb->pf;
5910 /* build VSI that owns this VEB, temporarily attached to base VEB */
5911 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5913 pf->vsi[v]->veb_idx == veb->idx &&
5914 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5915 ctl_vsi = pf->vsi[v];
5920 dev_info(&pf->pdev->dev,
5921 "missing owner VSI for veb_idx %d\n", veb->idx);
5923 goto end_reconstitute;
5925 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5926 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5927 ret = i40e_add_vsi(ctl_vsi);
5929 dev_info(&pf->pdev->dev,
5930 "rebuild of owner VSI failed: %d\n", ret);
5931 goto end_reconstitute;
5933 i40e_vsi_reset_stats(ctl_vsi);
5935 /* create the VEB in the switch and move the VSI onto the VEB */
5936 ret = i40e_add_veb(veb, ctl_vsi);
5938 goto end_reconstitute;
5940 i40e_config_bridge_mode(veb);
5942 /* create the remaining VSIs attached to this VEB */
5943 for (v = 0; v < pf->num_alloc_vsi; v++) {
5944 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5947 if (pf->vsi[v]->veb_idx == veb->idx) {
5948 struct i40e_vsi *vsi = pf->vsi[v];
5949 vsi->uplink_seid = veb->seid;
5950 ret = i40e_add_vsi(vsi);
5952 dev_info(&pf->pdev->dev,
5953 "rebuild of vsi_idx %d failed: %d\n",
5955 goto end_reconstitute;
5957 i40e_vsi_reset_stats(vsi);
5961 /* create any VEBs attached to this VEB - RECURSION */
5962 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5963 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5964 pf->veb[veb_idx]->uplink_seid = veb->seid;
5965 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5976 * i40e_get_capabilities - get info about the HW
5977 * @pf: the PF struct
5979 static int i40e_get_capabilities(struct i40e_pf *pf)
5981 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5986 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5988 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5992 /* this loads the data into the hw struct for us */
5993 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5995 i40e_aqc_opc_list_func_capabilities,
5997 /* data loaded, buffer no longer needed */
6000 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6001 /* retry with a larger buffer */
6002 buf_len = data_size;
6003 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6004 dev_info(&pf->pdev->dev,
6005 "capability discovery failed: aq=%d\n",
6006 pf->hw.aq.asq_last_status);
6011 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6012 (pf->hw.aq.fw_maj_ver < 2)) {
6013 pf->hw.func_caps.num_msix_vectors++;
6014 pf->hw.func_caps.num_msix_vectors_vf++;
6017 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6018 dev_info(&pf->pdev->dev,
6019 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6020 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6021 pf->hw.func_caps.num_msix_vectors,
6022 pf->hw.func_caps.num_msix_vectors_vf,
6023 pf->hw.func_caps.fd_filters_guaranteed,
6024 pf->hw.func_caps.fd_filters_best_effort,
6025 pf->hw.func_caps.num_tx_qp,
6026 pf->hw.func_caps.num_vsis);
6028 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6029 + pf->hw.func_caps.num_vfs)
6030 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6031 dev_info(&pf->pdev->dev,
6032 "got num_vsis %d, setting num_vsis to %d\n",
6033 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6034 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6040 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6043 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6044 * @pf: board private structure
6046 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6048 struct i40e_vsi *vsi;
6051 /* quick workaround for an NVM issue that leaves a critical register
6054 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6055 static const u32 hkey[] = {
6056 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6057 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6058 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6061 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6062 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6065 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6068 /* find existing VSI and see if it needs configuring */
6070 for (i = 0; i < pf->num_alloc_vsi; i++) {
6071 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6077 /* create a new VSI if none exists */
6079 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6080 pf->vsi[pf->lan_vsi]->seid, 0);
6082 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6083 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6088 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6092 * i40e_fdir_teardown - release the Flow Director resources
6093 * @pf: board private structure
6095 static void i40e_fdir_teardown(struct i40e_pf *pf)
6099 i40e_fdir_filter_exit(pf);
6100 for (i = 0; i < pf->num_alloc_vsi; i++) {
6101 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6102 i40e_vsi_release(pf->vsi[i]);
6109 * i40e_prep_for_reset - prep for the core to reset
6110 * @pf: board private structure
6112 * Close up the VFs and other things in prep for pf Reset.
6114 static void i40e_prep_for_reset(struct i40e_pf *pf)
6116 struct i40e_hw *hw = &pf->hw;
6117 i40e_status ret = 0;
6120 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6121 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6124 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6126 /* quiesce the VSIs and their queues that are not already DOWN */
6127 i40e_pf_quiesce_all_vsi(pf);
6129 for (v = 0; v < pf->num_alloc_vsi; v++) {
6131 pf->vsi[v]->seid = 0;
6134 i40e_shutdown_adminq(&pf->hw);
6136 /* call shutdown HMC */
6137 if (hw->hmc.hmc_obj) {
6138 ret = i40e_shutdown_lan_hmc(hw);
6140 dev_warn(&pf->pdev->dev,
6141 "shutdown_lan_hmc failed: %d\n", ret);
6146 * i40e_send_version - update firmware with driver version
6149 static void i40e_send_version(struct i40e_pf *pf)
6151 struct i40e_driver_version dv;
6153 dv.major_version = DRV_VERSION_MAJOR;
6154 dv.minor_version = DRV_VERSION_MINOR;
6155 dv.build_version = DRV_VERSION_BUILD;
6156 dv.subbuild_version = 0;
6157 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6158 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6162 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6163 * @pf: board private structure
6164 * @reinit: if the Main VSI needs to re-initialized.
6166 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6168 struct i40e_hw *hw = &pf->hw;
6169 u8 set_fc_aq_fail = 0;
6173 /* Now we wait for GRST to settle out.
6174 * We don't have to delete the VEBs or VSIs from the hw switch
6175 * because the reset will make them disappear.
6177 ret = i40e_pf_reset(hw);
6179 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6180 set_bit(__I40E_RESET_FAILED, &pf->state);
6181 goto clear_recovery;
6185 if (test_bit(__I40E_DOWN, &pf->state))
6186 goto clear_recovery;
6187 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6189 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6190 ret = i40e_init_adminq(&pf->hw);
6192 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
6193 goto clear_recovery;
6196 /* re-verify the eeprom if we just had an EMP reset */
6197 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6198 i40e_verify_eeprom(pf);
6200 i40e_clear_pxe_mode(hw);
6201 ret = i40e_get_capabilities(pf);
6203 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
6205 goto end_core_reset;
6208 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6209 hw->func_caps.num_rx_qp,
6210 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6212 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6213 goto end_core_reset;
6215 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6217 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6218 goto end_core_reset;
6221 #ifdef CONFIG_I40E_DCB
6222 ret = i40e_init_pf_dcb(pf);
6224 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6225 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6226 /* Continue without DCB enabled */
6228 #endif /* CONFIG_I40E_DCB */
6230 ret = i40e_init_pf_fcoe(pf);
6232 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6235 /* do basic switch setup */
6236 ret = i40e_setup_pf_switch(pf, reinit);
6238 goto end_core_reset;
6240 /* driver is only interested in link up/down and module qualification
6241 * reports from firmware
6243 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6244 I40E_AQ_EVENT_LINK_UPDOWN |
6245 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6247 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret);
6249 /* make sure our flow control settings are restored */
6250 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6252 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret);
6254 /* Rebuild the VSIs and VEBs that existed before reset.
6255 * They are still in our local switch element arrays, so only
6256 * need to rebuild the switch model in the HW.
6258 * If there were VEBs but the reconstitution failed, we'll try
6259 * try to recover minimal use by getting the basic PF VSI working.
6261 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6262 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6263 /* find the one VEB connected to the MAC, and find orphans */
6264 for (v = 0; v < I40E_MAX_VEB; v++) {
6268 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6269 pf->veb[v]->uplink_seid == 0) {
6270 ret = i40e_reconstitute_veb(pf->veb[v]);
6275 /* If Main VEB failed, we're in deep doodoo,
6276 * so give up rebuilding the switch and set up
6277 * for minimal rebuild of PF VSI.
6278 * If orphan failed, we'll report the error
6279 * but try to keep going.
6281 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6282 dev_info(&pf->pdev->dev,
6283 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6285 pf->vsi[pf->lan_vsi]->uplink_seid
6288 } else if (pf->veb[v]->uplink_seid == 0) {
6289 dev_info(&pf->pdev->dev,
6290 "rebuild of orphan VEB failed: %d\n",
6297 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6298 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6299 /* no VEB, so rebuild only the Main VSI */
6300 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6302 dev_info(&pf->pdev->dev,
6303 "rebuild of Main VSI failed: %d\n", ret);
6304 goto end_core_reset;
6309 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6311 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
6312 pf->hw.aq.asq_last_status);
6315 /* reinit the misc interrupt */
6316 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6317 ret = i40e_setup_misc_vector(pf);
6319 /* restart the VSIs that were rebuilt and running before the reset */
6320 i40e_pf_unquiesce_all_vsi(pf);
6322 if (pf->num_alloc_vfs) {
6323 for (v = 0; v < pf->num_alloc_vfs; v++)
6324 i40e_reset_vf(&pf->vf[v], true);
6327 /* tell the firmware that we're starting */
6328 i40e_send_version(pf);
6331 clear_bit(__I40E_RESET_FAILED, &pf->state);
6333 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6337 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
6338 * @pf: board private structure
6340 * Close up the VFs and other things in prep for a Core Reset,
6341 * then get ready to rebuild the world.
6343 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6345 i40e_prep_for_reset(pf);
6346 i40e_reset_and_rebuild(pf, false);
6350 * i40e_handle_mdd_event
6351 * @pf: pointer to the pf structure
6353 * Called from the MDD irq handler to identify possibly malicious vfs
6355 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6357 struct i40e_hw *hw = &pf->hw;
6358 bool mdd_detected = false;
6359 bool pf_mdd_detected = false;
6364 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6367 /* find what triggered the MDD event */
6368 reg = rd32(hw, I40E_GL_MDET_TX);
6369 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6370 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6371 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6372 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6373 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6374 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6375 I40E_GL_MDET_TX_EVENT_SHIFT;
6376 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6377 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6378 pf->hw.func_caps.base_queue;
6379 if (netif_msg_tx_err(pf))
6380 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
6381 event, queue, pf_num, vf_num);
6382 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6383 mdd_detected = true;
6385 reg = rd32(hw, I40E_GL_MDET_RX);
6386 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6387 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6388 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6389 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6390 I40E_GL_MDET_RX_EVENT_SHIFT;
6391 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6392 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6393 pf->hw.func_caps.base_queue;
6394 if (netif_msg_rx_err(pf))
6395 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6396 event, queue, func);
6397 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6398 mdd_detected = true;
6402 reg = rd32(hw, I40E_PF_MDET_TX);
6403 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6404 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6405 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6406 pf_mdd_detected = true;
6408 reg = rd32(hw, I40E_PF_MDET_RX);
6409 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6410 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6411 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6412 pf_mdd_detected = true;
6414 /* Queue belongs to the PF, initiate a reset */
6415 if (pf_mdd_detected) {
6416 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6417 i40e_service_event_schedule(pf);
6421 /* see if one of the VFs needs its hand slapped */
6422 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6424 reg = rd32(hw, I40E_VP_MDET_TX(i));
6425 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6426 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6427 vf->num_mdd_events++;
6428 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6432 reg = rd32(hw, I40E_VP_MDET_RX(i));
6433 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6434 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6435 vf->num_mdd_events++;
6436 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6440 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6441 dev_info(&pf->pdev->dev,
6442 "Too many MDD events on VF %d, disabled\n", i);
6443 dev_info(&pf->pdev->dev,
6444 "Use PF Control I/F to re-enable the VF\n");
6445 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6449 /* re-enable mdd interrupt cause */
6450 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6451 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6452 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6453 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6457 #ifdef CONFIG_I40E_VXLAN
6459 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6460 * @pf: board private structure
6462 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6464 struct i40e_hw *hw = &pf->hw;
6470 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6473 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6475 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6476 if (pf->pending_vxlan_bitmap & (1 << i)) {
6477 pf->pending_vxlan_bitmap &= ~(1 << i);
6478 port = pf->vxlan_ports[i];
6480 i40e_aq_add_udp_tunnel(hw, ntohs(port),
6481 I40E_AQC_TUNNEL_TYPE_VXLAN,
6482 &filter_index, NULL)
6483 : i40e_aq_del_udp_tunnel(hw, i, NULL);
6486 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
6487 port ? "adding" : "deleting",
6488 ntohs(port), port ? i : i);
6490 pf->vxlan_ports[i] = 0;
6492 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
6493 port ? "Added" : "Deleted",
6494 ntohs(port), port ? i : filter_index);
6502 * i40e_service_task - Run the driver's async subtasks
6503 * @work: pointer to work_struct containing our data
6505 static void i40e_service_task(struct work_struct *work)
6507 struct i40e_pf *pf = container_of(work,
6510 unsigned long start_time = jiffies;
6512 /* don't bother with service tasks if a reset is in progress */
6513 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6514 i40e_service_event_complete(pf);
6518 i40e_reset_subtask(pf);
6519 i40e_handle_mdd_event(pf);
6520 i40e_vc_process_vflr_event(pf);
6521 i40e_watchdog_subtask(pf);
6522 i40e_fdir_reinit_subtask(pf);
6523 i40e_sync_filters_subtask(pf);
6524 #ifdef CONFIG_I40E_VXLAN
6525 i40e_sync_vxlan_filters_subtask(pf);
6527 i40e_clean_adminq_subtask(pf);
6529 i40e_service_event_complete(pf);
6531 /* If the tasks have taken longer than one timer cycle or there
6532 * is more work to be done, reschedule the service task now
6533 * rather than wait for the timer to tick again.
6535 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6536 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6537 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6538 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6539 i40e_service_event_schedule(pf);
6543 * i40e_service_timer - timer callback
6544 * @data: pointer to PF struct
6546 static void i40e_service_timer(unsigned long data)
6548 struct i40e_pf *pf = (struct i40e_pf *)data;
6550 mod_timer(&pf->service_timer,
6551 round_jiffies(jiffies + pf->service_timer_period));
6552 i40e_service_event_schedule(pf);
6556 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6557 * @vsi: the VSI being configured
6559 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6561 struct i40e_pf *pf = vsi->back;
6563 switch (vsi->type) {
6565 vsi->alloc_queue_pairs = pf->num_lan_qps;
6566 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6567 I40E_REQ_DESCRIPTOR_MULTIPLE);
6568 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6569 vsi->num_q_vectors = pf->num_lan_msix;
6571 vsi->num_q_vectors = 1;
6576 vsi->alloc_queue_pairs = 1;
6577 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6578 I40E_REQ_DESCRIPTOR_MULTIPLE);
6579 vsi->num_q_vectors = 1;
6582 case I40E_VSI_VMDQ2:
6583 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6584 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6585 I40E_REQ_DESCRIPTOR_MULTIPLE);
6586 vsi->num_q_vectors = pf->num_vmdq_msix;
6589 case I40E_VSI_SRIOV:
6590 vsi->alloc_queue_pairs = pf->num_vf_qps;
6591 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6592 I40E_REQ_DESCRIPTOR_MULTIPLE);
6597 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6598 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6599 I40E_REQ_DESCRIPTOR_MULTIPLE);
6600 vsi->num_q_vectors = pf->num_fcoe_msix;
6603 #endif /* I40E_FCOE */
6613 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6614 * @type: VSI pointer
6615 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6617 * On error: returns error code (negative)
6618 * On success: returns 0
6620 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6625 /* allocate memory for both Tx and Rx ring pointers */
6626 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6627 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6630 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6632 if (alloc_qvectors) {
6633 /* allocate memory for q_vector pointers */
6634 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6635 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6636 if (!vsi->q_vectors) {
6644 kfree(vsi->tx_rings);
6649 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6650 * @pf: board private structure
6651 * @type: type of VSI
6653 * On error: returns error code (negative)
6654 * On success: returns vsi index in PF (positive)
6656 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6659 struct i40e_vsi *vsi;
6663 /* Need to protect the allocation of the VSIs at the PF level */
6664 mutex_lock(&pf->switch_mutex);
6666 /* VSI list may be fragmented if VSI creation/destruction has
6667 * been happening. We can afford to do a quick scan to look
6668 * for any free VSIs in the list.
6670 * find next empty vsi slot, looping back around if necessary
6673 while (i < pf->num_alloc_vsi && pf->vsi[i])
6675 if (i >= pf->num_alloc_vsi) {
6677 while (i < pf->next_vsi && pf->vsi[i])
6681 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6682 vsi_idx = i; /* Found one! */
6685 goto unlock_pf; /* out of VSI slots! */
6689 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6696 set_bit(__I40E_DOWN, &vsi->state);
6699 vsi->rx_itr_setting = pf->rx_itr_default;
6700 vsi->tx_itr_setting = pf->tx_itr_default;
6701 vsi->netdev_registered = false;
6702 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6703 INIT_LIST_HEAD(&vsi->mac_filter_list);
6704 vsi->irqs_ready = false;
6706 ret = i40e_set_num_rings_in_vsi(vsi);
6710 ret = i40e_vsi_alloc_arrays(vsi, true);
6714 /* Setup default MSIX irq handler for VSI */
6715 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6717 pf->vsi[vsi_idx] = vsi;
6722 pf->next_vsi = i - 1;
6725 mutex_unlock(&pf->switch_mutex);
6730 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6731 * @type: VSI pointer
6732 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6734 * On error: returns error code (negative)
6735 * On success: returns 0
6737 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6739 /* free the ring and vector containers */
6740 if (free_qvectors) {
6741 kfree(vsi->q_vectors);
6742 vsi->q_vectors = NULL;
6744 kfree(vsi->tx_rings);
6745 vsi->tx_rings = NULL;
6746 vsi->rx_rings = NULL;
6750 * i40e_vsi_clear - Deallocate the VSI provided
6751 * @vsi: the VSI being un-configured
6753 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6764 mutex_lock(&pf->switch_mutex);
6765 if (!pf->vsi[vsi->idx]) {
6766 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6767 vsi->idx, vsi->idx, vsi, vsi->type);
6771 if (pf->vsi[vsi->idx] != vsi) {
6772 dev_err(&pf->pdev->dev,
6773 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6774 pf->vsi[vsi->idx]->idx,
6776 pf->vsi[vsi->idx]->type,
6777 vsi->idx, vsi, vsi->type);
6781 /* updates the pf for this cleared vsi */
6782 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6783 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6785 i40e_vsi_free_arrays(vsi, true);
6787 pf->vsi[vsi->idx] = NULL;
6788 if (vsi->idx < pf->next_vsi)
6789 pf->next_vsi = vsi->idx;
6792 mutex_unlock(&pf->switch_mutex);
6800 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6801 * @vsi: the VSI being cleaned
6803 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6807 if (vsi->tx_rings && vsi->tx_rings[0]) {
6808 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6809 kfree_rcu(vsi->tx_rings[i], rcu);
6810 vsi->tx_rings[i] = NULL;
6811 vsi->rx_rings[i] = NULL;
6817 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6818 * @vsi: the VSI being configured
6820 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6822 struct i40e_ring *tx_ring, *rx_ring;
6823 struct i40e_pf *pf = vsi->back;
6826 /* Set basic values in the rings to be used later during open() */
6827 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6828 /* allocate space for both Tx and Rx in one shot */
6829 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6833 tx_ring->queue_index = i;
6834 tx_ring->reg_idx = vsi->base_queue + i;
6835 tx_ring->ring_active = false;
6837 tx_ring->netdev = vsi->netdev;
6838 tx_ring->dev = &pf->pdev->dev;
6839 tx_ring->count = vsi->num_desc;
6841 tx_ring->dcb_tc = 0;
6842 vsi->tx_rings[i] = tx_ring;
6844 rx_ring = &tx_ring[1];
6845 rx_ring->queue_index = i;
6846 rx_ring->reg_idx = vsi->base_queue + i;
6847 rx_ring->ring_active = false;
6849 rx_ring->netdev = vsi->netdev;
6850 rx_ring->dev = &pf->pdev->dev;
6851 rx_ring->count = vsi->num_desc;
6853 rx_ring->dcb_tc = 0;
6854 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6855 set_ring_16byte_desc_enabled(rx_ring);
6857 clear_ring_16byte_desc_enabled(rx_ring);
6858 vsi->rx_rings[i] = rx_ring;
6864 i40e_vsi_clear_rings(vsi);
6869 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6870 * @pf: board private structure
6871 * @vectors: the number of MSI-X vectors to request
6873 * Returns the number of vectors reserved, or error
6875 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6877 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6878 I40E_MIN_MSIX, vectors);
6880 dev_info(&pf->pdev->dev,
6881 "MSI-X vector reservation failed: %d\n", vectors);
6889 * i40e_init_msix - Setup the MSIX capability
6890 * @pf: board private structure
6892 * Work with the OS to set up the MSIX vectors needed.
6894 * Returns 0 on success, negative on failure
6896 static int i40e_init_msix(struct i40e_pf *pf)
6898 i40e_status err = 0;
6899 struct i40e_hw *hw = &pf->hw;
6904 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6907 /* The number of vectors we'll request will be comprised of:
6908 * - Add 1 for "other" cause for Admin Queue events, etc.
6909 * - The number of LAN queue pairs
6910 * - Queues being used for RSS.
6911 * We don't need as many as max_rss_size vectors.
6912 * use rss_size instead in the calculation since that
6913 * is governed by number of cpus in the system.
6914 * - assumes symmetric Tx/Rx pairing
6915 * - The number of VMDq pairs
6917 * - The number of FCOE qps.
6919 * Once we count this up, try the request.
6921 * If we can't get what we want, we'll simplify to nearly nothing
6922 * and try again. If that still fails, we punt.
6924 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6925 pf->num_vmdq_msix = pf->num_vmdq_qps;
6927 other_vecs += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6928 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6931 /* Scale down if necessary, and the rings will share vectors */
6932 pf->num_lan_msix = min_t(int, pf->num_lan_msix,
6933 (hw->func_caps.num_msix_vectors - other_vecs));
6934 v_budget = pf->num_lan_msix + other_vecs;
6937 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6938 pf->num_fcoe_msix = pf->num_fcoe_qps;
6939 v_budget += pf->num_fcoe_msix;
6943 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6945 if (!pf->msix_entries)
6948 for (i = 0; i < v_budget; i++)
6949 pf->msix_entries[i].entry = i;
6950 vec = i40e_reserve_msix_vectors(pf, v_budget);
6952 if (vec != v_budget) {
6953 /* If we have limited resources, we will start with no vectors
6954 * for the special features and then allocate vectors to some
6955 * of these features based on the policy and at the end disable
6956 * the features that did not get any vectors.
6959 pf->num_fcoe_qps = 0;
6960 pf->num_fcoe_msix = 0;
6962 pf->num_vmdq_msix = 0;
6965 if (vec < I40E_MIN_MSIX) {
6966 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6967 kfree(pf->msix_entries);
6968 pf->msix_entries = NULL;
6971 } else if (vec == I40E_MIN_MSIX) {
6972 /* Adjust for minimal MSIX use */
6973 pf->num_vmdq_vsis = 0;
6974 pf->num_vmdq_qps = 0;
6975 pf->num_lan_qps = 1;
6976 pf->num_lan_msix = 1;
6978 } else if (vec != v_budget) {
6979 /* reserve the misc vector */
6982 /* Scale vector usage down */
6983 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6984 pf->num_vmdq_vsis = 1;
6986 /* partition out the remaining vectors */
6989 pf->num_lan_msix = 1;
6993 /* give one vector to FCoE */
6994 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6995 pf->num_lan_msix = 1;
6996 pf->num_fcoe_msix = 1;
6999 pf->num_lan_msix = 2;
7004 /* give one vector to FCoE */
7005 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7006 pf->num_fcoe_msix = 1;
7010 pf->num_lan_msix = min_t(int, (vec / 2),
7012 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
7013 I40E_DEFAULT_NUM_VMDQ_VSI);
7018 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7019 (pf->num_vmdq_msix == 0)) {
7020 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7021 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7025 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7026 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7027 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7034 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7035 * @vsi: the VSI being configured
7036 * @v_idx: index of the vector in the vsi struct
7038 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7040 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7042 struct i40e_q_vector *q_vector;
7044 /* allocate q_vector */
7045 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7049 q_vector->vsi = vsi;
7050 q_vector->v_idx = v_idx;
7051 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7053 netif_napi_add(vsi->netdev, &q_vector->napi,
7054 i40e_napi_poll, NAPI_POLL_WEIGHT);
7056 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7057 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7059 /* tie q_vector and vsi together */
7060 vsi->q_vectors[v_idx] = q_vector;
7066 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7067 * @vsi: the VSI being configured
7069 * We allocate one q_vector per queue interrupt. If allocation fails we
7072 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7074 struct i40e_pf *pf = vsi->back;
7075 int v_idx, num_q_vectors;
7078 /* if not MSIX, give the one vector only to the LAN VSI */
7079 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7080 num_q_vectors = vsi->num_q_vectors;
7081 else if (vsi == pf->vsi[pf->lan_vsi])
7086 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7087 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7096 i40e_free_q_vector(vsi, v_idx);
7102 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7103 * @pf: board private structure to initialize
7105 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
7109 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7110 err = i40e_init_msix(pf);
7112 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7114 I40E_FLAG_FCOE_ENABLED |
7116 I40E_FLAG_RSS_ENABLED |
7117 I40E_FLAG_DCB_CAPABLE |
7118 I40E_FLAG_SRIOV_ENABLED |
7119 I40E_FLAG_FD_SB_ENABLED |
7120 I40E_FLAG_FD_ATR_ENABLED |
7121 I40E_FLAG_VMDQ_ENABLED);
7123 /* rework the queue expectations without MSIX */
7124 i40e_determine_queue_usage(pf);
7128 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7129 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7130 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7131 err = pci_enable_msi(pf->pdev);
7133 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
7134 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7138 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7139 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7141 /* track first vector for misc interrupts */
7142 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
7146 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7147 * @pf: board private structure
7149 * This sets up the handler for MSIX 0, which is used to manage the
7150 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7151 * when in MSI or Legacy interrupt mode.
7153 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7155 struct i40e_hw *hw = &pf->hw;
7158 /* Only request the irq if this is the first time through, and
7159 * not when we're rebuilding after a Reset
7161 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7162 err = request_irq(pf->msix_entries[0].vector,
7163 i40e_intr, 0, pf->int_name, pf);
7165 dev_info(&pf->pdev->dev,
7166 "request_irq for %s failed: %d\n",
7172 i40e_enable_misc_int_causes(pf);
7174 /* associate no queues to the misc vector */
7175 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7176 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7180 i40e_irq_dynamic_enable_icr0(pf);
7186 * i40e_config_rss - Prepare for RSS if used
7187 * @pf: board private structure
7189 static int i40e_config_rss(struct i40e_pf *pf)
7191 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1];
7192 struct i40e_hw *hw = &pf->hw;
7198 netdev_rss_key_fill(rss_key, sizeof(rss_key));
7199 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7200 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]);
7202 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7203 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7204 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7205 hena |= I40E_DEFAULT_RSS_HENA;
7206 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7207 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7209 /* Check capability and Set table size and register per hw expectation*/
7210 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7211 if (hw->func_caps.rss_table_size == 512) {
7212 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7213 pf->rss_table_size = 512;
7215 pf->rss_table_size = 128;
7216 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7218 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7220 /* Populate the LUT with max no. of queues in round robin fashion */
7221 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
7223 /* The assumption is that lan qp count will be the highest
7224 * qp count for any PF VSI that needs RSS.
7225 * If multiple VSIs need RSS support, all the qp counts
7226 * for those VSIs should be a power of 2 for RSS to work.
7227 * If LAN VSI is the only consumer for RSS then this requirement
7230 if (j == pf->rss_size)
7232 /* lut = 4-byte sliding window of 4 lut entries */
7233 lut = (lut << 8) | (j &
7234 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
7235 /* On i = 3, we have 4 entries in lut; write to the register */
7237 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
7245 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7246 * @pf: board private structure
7247 * @queue_count: the requested queue count for rss.
7249 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7250 * count which may be different from the requested queue count.
7252 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7254 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7257 queue_count = min_t(int, queue_count, pf->rss_size_max);
7259 if (queue_count != pf->rss_size) {
7260 i40e_prep_for_reset(pf);
7262 pf->rss_size = queue_count;
7264 i40e_reset_and_rebuild(pf, true);
7265 i40e_config_rss(pf);
7267 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7268 return pf->rss_size;
7272 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7273 * @pf: board private structure
7275 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7278 bool min_valid, max_valid;
7281 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7282 &min_valid, &max_valid);
7286 pf->npar_min_bw = min_bw;
7288 pf->npar_max_bw = max_bw;
7295 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7296 * @pf: board private structure
7298 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7300 struct i40e_aqc_configure_partition_bw_data bw_data;
7303 /* Set the valid bit for this pf */
7304 bw_data.pf_valid_bits = cpu_to_le16(1 << pf->hw.pf_id);
7305 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7306 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7308 /* Set the new bandwidths */
7309 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7315 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7316 * @pf: board private structure
7318 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7320 /* Commit temporary BW setting to permanent NVM image */
7321 enum i40e_admin_queue_err last_aq_status;
7325 if (pf->hw.partition_id != 1) {
7326 dev_info(&pf->pdev->dev,
7327 "Commit BW only works on partition 1! This is partition %d",
7328 pf->hw.partition_id);
7329 ret = I40E_NOT_SUPPORTED;
7333 /* Acquire NVM for read access */
7334 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7335 last_aq_status = pf->hw.aq.asq_last_status;
7337 dev_info(&pf->pdev->dev,
7338 "Cannot acquire NVM for read access, err %d: aq_err %d\n",
7339 ret, last_aq_status);
7343 /* Read word 0x10 of NVM - SW compatibility word 1 */
7344 ret = i40e_aq_read_nvm(&pf->hw,
7345 I40E_SR_NVM_CONTROL_WORD,
7346 0x10, sizeof(nvm_word), &nvm_word,
7348 /* Save off last admin queue command status before releasing
7351 last_aq_status = pf->hw.aq.asq_last_status;
7352 i40e_release_nvm(&pf->hw);
7354 dev_info(&pf->pdev->dev, "NVM read error, err %d aq_err %d\n",
7355 ret, last_aq_status);
7359 /* Wait a bit for NVM release to complete */
7362 /* Acquire NVM for write access */
7363 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7364 last_aq_status = pf->hw.aq.asq_last_status;
7366 dev_info(&pf->pdev->dev,
7367 "Cannot acquire NVM for write access, err %d: aq_err %d\n",
7368 ret, last_aq_status);
7371 /* Write it back out unchanged to initiate update NVM,
7372 * which will force a write of the shadow (alt) RAM to
7373 * the NVM - thus storing the bandwidth values permanently.
7375 ret = i40e_aq_update_nvm(&pf->hw,
7376 I40E_SR_NVM_CONTROL_WORD,
7377 0x10, sizeof(nvm_word),
7378 &nvm_word, true, NULL);
7379 /* Save off last admin queue command status before releasing
7382 last_aq_status = pf->hw.aq.asq_last_status;
7383 i40e_release_nvm(&pf->hw);
7385 dev_info(&pf->pdev->dev,
7386 "BW settings NOT SAVED, err %d aq_err %d\n",
7387 ret, last_aq_status);
7394 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7395 * @pf: board private structure to initialize
7397 * i40e_sw_init initializes the Adapter private data structure.
7398 * Fields are initialized based on PCI device information and
7399 * OS network device settings (MTU size).
7401 static int i40e_sw_init(struct i40e_pf *pf)
7406 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7407 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7408 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7409 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7410 if (I40E_DEBUG_USER & debug)
7411 pf->hw.debug_mask = debug;
7412 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7413 I40E_DEFAULT_MSG_ENABLE);
7416 /* Set default capability flags */
7417 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7418 I40E_FLAG_MSI_ENABLED |
7419 I40E_FLAG_MSIX_ENABLED;
7421 if (iommu_present(&pci_bus_type))
7422 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7424 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7426 /* Set default ITR */
7427 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7428 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7430 /* Depending on PF configurations, it is possible that the RSS
7431 * maximum might end up larger than the available queues
7433 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
7435 pf->rss_size_max = min_t(int, pf->rss_size_max,
7436 pf->hw.func_caps.num_tx_qp);
7437 if (pf->hw.func_caps.rss) {
7438 pf->flags |= I40E_FLAG_RSS_ENABLED;
7439 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7442 /* MFP mode enabled */
7443 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
7444 pf->flags |= I40E_FLAG_MFP_ENABLED;
7445 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7446 if (i40e_get_npar_bw_setting(pf))
7447 dev_warn(&pf->pdev->dev,
7448 "Could not get NPAR bw settings\n");
7450 dev_info(&pf->pdev->dev,
7451 "Min BW = %8.8x, Max BW = %8.8x\n",
7452 pf->npar_min_bw, pf->npar_max_bw);
7455 /* FW/NVM is not yet fixed in this regard */
7456 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7457 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7458 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7459 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7460 /* Setup a counter for fd_atr per pf */
7461 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
7462 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7463 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7464 /* Setup a counter for fd_sb per pf */
7465 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
7467 dev_info(&pf->pdev->dev,
7468 "Flow Director Sideband mode Disabled in MFP mode\n");
7470 pf->fdir_pf_filter_count =
7471 pf->hw.func_caps.fd_filters_guaranteed;
7472 pf->hw.fdir_shared_filter_count =
7473 pf->hw.func_caps.fd_filters_best_effort;
7476 if (pf->hw.func_caps.vmdq) {
7477 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7478 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7479 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
7483 err = i40e_init_pf_fcoe(pf);
7485 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7487 #endif /* I40E_FCOE */
7488 #ifdef CONFIG_PCI_IOV
7489 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7490 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7491 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7492 pf->num_req_vfs = min_t(int,
7493 pf->hw.func_caps.num_vfs,
7496 #endif /* CONFIG_PCI_IOV */
7497 pf->eeprom_version = 0xDEAD;
7498 pf->lan_veb = I40E_NO_VEB;
7499 pf->lan_vsi = I40E_NO_VSI;
7501 /* set up queue assignment tracking */
7502 size = sizeof(struct i40e_lump_tracking)
7503 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7504 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7509 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7510 pf->qp_pile->search_hint = 0;
7512 /* set up vector assignment tracking */
7513 size = sizeof(struct i40e_lump_tracking)
7514 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
7515 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7516 if (!pf->irq_pile) {
7521 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
7522 pf->irq_pile->search_hint = 0;
7524 pf->tx_timeout_recovery_level = 1;
7526 mutex_init(&pf->switch_mutex);
7533 * i40e_set_ntuple - set the ntuple feature flag and take action
7534 * @pf: board private structure to initialize
7535 * @features: the feature set that the stack is suggesting
7537 * returns a bool to indicate if reset needs to happen
7539 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7541 bool need_reset = false;
7543 /* Check if Flow Director n-tuple support was enabled or disabled. If
7544 * the state changed, we need to reset.
7546 if (features & NETIF_F_NTUPLE) {
7547 /* Enable filters and mark for reset */
7548 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7550 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7552 /* turn off filters, mark for reset and clear SW filter list */
7553 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7555 i40e_fdir_filter_exit(pf);
7557 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7558 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7559 /* reset fd counters */
7560 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7561 pf->fdir_pf_active_filters = 0;
7562 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7563 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7564 /* if ATR was auto disabled it can be re-enabled. */
7565 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7566 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7567 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7573 * i40e_set_features - set the netdev feature flags
7574 * @netdev: ptr to the netdev being adjusted
7575 * @features: the feature set that the stack is suggesting
7577 static int i40e_set_features(struct net_device *netdev,
7578 netdev_features_t features)
7580 struct i40e_netdev_priv *np = netdev_priv(netdev);
7581 struct i40e_vsi *vsi = np->vsi;
7582 struct i40e_pf *pf = vsi->back;
7585 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7586 i40e_vlan_stripping_enable(vsi);
7588 i40e_vlan_stripping_disable(vsi);
7590 need_reset = i40e_set_ntuple(pf, features);
7593 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7598 #ifdef CONFIG_I40E_VXLAN
7600 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7601 * @pf: board private structure
7602 * @port: The UDP port to look up
7604 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7606 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7610 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7611 if (pf->vxlan_ports[i] == port)
7619 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
7620 * @netdev: This physical port's netdev
7621 * @sa_family: Socket Family that VXLAN is notifying us about
7622 * @port: New UDP port number that VXLAN started listening to
7624 static void i40e_add_vxlan_port(struct net_device *netdev,
7625 sa_family_t sa_family, __be16 port)
7627 struct i40e_netdev_priv *np = netdev_priv(netdev);
7628 struct i40e_vsi *vsi = np->vsi;
7629 struct i40e_pf *pf = vsi->back;
7633 if (sa_family == AF_INET6)
7636 idx = i40e_get_vxlan_port_idx(pf, port);
7638 /* Check if port already exists */
7639 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7640 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
7644 /* Now check if there is space to add the new port */
7645 next_idx = i40e_get_vxlan_port_idx(pf, 0);
7647 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7648 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
7653 /* New port: add it and mark its index in the bitmap */
7654 pf->vxlan_ports[next_idx] = port;
7655 pf->pending_vxlan_bitmap |= (1 << next_idx);
7657 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7661 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
7662 * @netdev: This physical port's netdev
7663 * @sa_family: Socket Family that VXLAN is notifying us about
7664 * @port: UDP port number that VXLAN stopped listening to
7666 static void i40e_del_vxlan_port(struct net_device *netdev,
7667 sa_family_t sa_family, __be16 port)
7669 struct i40e_netdev_priv *np = netdev_priv(netdev);
7670 struct i40e_vsi *vsi = np->vsi;
7671 struct i40e_pf *pf = vsi->back;
7674 if (sa_family == AF_INET6)
7677 idx = i40e_get_vxlan_port_idx(pf, port);
7679 /* Check if port already exists */
7680 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7681 /* if port exists, set it to 0 (mark for deletion)
7682 * and make it pending
7684 pf->vxlan_ports[idx] = 0;
7686 pf->pending_vxlan_bitmap |= (1 << idx);
7688 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7690 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7696 static int i40e_get_phys_port_id(struct net_device *netdev,
7697 struct netdev_phys_item_id *ppid)
7699 struct i40e_netdev_priv *np = netdev_priv(netdev);
7700 struct i40e_pf *pf = np->vsi->back;
7701 struct i40e_hw *hw = &pf->hw;
7703 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
7706 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
7707 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
7713 * i40e_ndo_fdb_add - add an entry to the hardware database
7714 * @ndm: the input from the stack
7715 * @tb: pointer to array of nladdr (unused)
7716 * @dev: the net device pointer
7717 * @addr: the MAC address entry being added
7718 * @flags: instructions from stack about fdb operation
7720 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7721 struct net_device *dev,
7722 const unsigned char *addr, u16 vid,
7725 struct i40e_netdev_priv *np = netdev_priv(dev);
7726 struct i40e_pf *pf = np->vsi->back;
7729 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7733 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
7737 /* Hardware does not support aging addresses so if a
7738 * ndm_state is given only allow permanent addresses
7740 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7741 netdev_info(dev, "FDB only supports static addresses\n");
7745 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7746 err = dev_uc_add_excl(dev, addr);
7747 else if (is_multicast_ether_addr(addr))
7748 err = dev_mc_add_excl(dev, addr);
7752 /* Only return duplicate errors if NLM_F_EXCL is set */
7753 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7759 #ifdef HAVE_BRIDGE_ATTRIBS
7761 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
7762 * @dev: the netdev being configured
7763 * @nlh: RTNL message
7765 * Inserts a new hardware bridge if not already created and
7766 * enables the bridging mode requested (VEB or VEPA). If the
7767 * hardware bridge has already been inserted and the request
7768 * is to change the mode then that requires a PF reset to
7769 * allow rebuild of the components with required hardware
7770 * bridge mode enabled.
7772 static int i40e_ndo_bridge_setlink(struct net_device *dev,
7773 struct nlmsghdr *nlh)
7775 struct i40e_netdev_priv *np = netdev_priv(dev);
7776 struct i40e_vsi *vsi = np->vsi;
7777 struct i40e_pf *pf = vsi->back;
7778 struct i40e_veb *veb = NULL;
7779 struct nlattr *attr, *br_spec;
7782 /* Only for PF VSI for now */
7783 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
7786 /* Find the HW bridge for PF VSI */
7787 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7788 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7792 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7794 nla_for_each_nested(attr, br_spec, rem) {
7797 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7800 mode = nla_get_u16(attr);
7801 if ((mode != BRIDGE_MODE_VEPA) &&
7802 (mode != BRIDGE_MODE_VEB))
7805 /* Insert a new HW bridge */
7807 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7808 vsi->tc_config.enabled_tc);
7810 veb->bridge_mode = mode;
7811 i40e_config_bridge_mode(veb);
7813 /* No Bridge HW offload available */
7817 } else if (mode != veb->bridge_mode) {
7818 /* Existing HW bridge but different mode needs reset */
7819 veb->bridge_mode = mode;
7820 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7829 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
7832 * @seq: RTNL message seq #
7833 * @dev: the netdev being configured
7834 * @filter_mask: unused
7836 * Return the mode in which the hardware bridge is operating in
7839 #ifdef HAVE_BRIDGE_FILTER
7840 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7841 struct net_device *dev,
7842 u32 __always_unused filter_mask)
7844 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7845 struct net_device *dev)
7846 #endif /* HAVE_BRIDGE_FILTER */
7848 struct i40e_netdev_priv *np = netdev_priv(dev);
7849 struct i40e_vsi *vsi = np->vsi;
7850 struct i40e_pf *pf = vsi->back;
7851 struct i40e_veb *veb = NULL;
7854 /* Only for PF VSI for now */
7855 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
7858 /* Find the HW bridge for the PF VSI */
7859 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7860 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7867 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode);
7869 #endif /* HAVE_BRIDGE_ATTRIBS */
7871 const struct net_device_ops i40e_netdev_ops = {
7872 .ndo_open = i40e_open,
7873 .ndo_stop = i40e_close,
7874 .ndo_start_xmit = i40e_lan_xmit_frame,
7875 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7876 .ndo_set_rx_mode = i40e_set_rx_mode,
7877 .ndo_validate_addr = eth_validate_addr,
7878 .ndo_set_mac_address = i40e_set_mac,
7879 .ndo_change_mtu = i40e_change_mtu,
7880 .ndo_do_ioctl = i40e_ioctl,
7881 .ndo_tx_timeout = i40e_tx_timeout,
7882 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7883 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7884 #ifdef CONFIG_NET_POLL_CONTROLLER
7885 .ndo_poll_controller = i40e_netpoll,
7887 .ndo_setup_tc = i40e_setup_tc,
7889 .ndo_fcoe_enable = i40e_fcoe_enable,
7890 .ndo_fcoe_disable = i40e_fcoe_disable,
7892 .ndo_set_features = i40e_set_features,
7893 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7894 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7895 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7896 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7897 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7898 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
7899 #ifdef CONFIG_I40E_VXLAN
7900 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7901 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7903 .ndo_get_phys_port_id = i40e_get_phys_port_id,
7904 .ndo_fdb_add = i40e_ndo_fdb_add,
7905 #ifdef HAVE_BRIDGE_ATTRIBS
7906 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
7907 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
7908 #endif /* HAVE_BRIDGE_ATTRIBS */
7912 * i40e_config_netdev - Setup the netdev flags
7913 * @vsi: the VSI being configured
7915 * Returns 0 on success, negative value on failure
7917 static int i40e_config_netdev(struct i40e_vsi *vsi)
7919 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7920 struct i40e_pf *pf = vsi->back;
7921 struct i40e_hw *hw = &pf->hw;
7922 struct i40e_netdev_priv *np;
7923 struct net_device *netdev;
7924 u8 mac_addr[ETH_ALEN];
7927 etherdev_size = sizeof(struct i40e_netdev_priv);
7928 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7932 vsi->netdev = netdev;
7933 np = netdev_priv(netdev);
7936 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7937 NETIF_F_GSO_UDP_TUNNEL |
7940 netdev->features = NETIF_F_SG |
7944 NETIF_F_GSO_UDP_TUNNEL |
7945 NETIF_F_HW_VLAN_CTAG_TX |
7946 NETIF_F_HW_VLAN_CTAG_RX |
7947 NETIF_F_HW_VLAN_CTAG_FILTER |
7956 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7957 netdev->features |= NETIF_F_NTUPLE;
7959 /* copy netdev features into list of user selectable features */
7960 netdev->hw_features |= netdev->features;
7962 if (vsi->type == I40E_VSI_MAIN) {
7963 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7964 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7965 /* The following steps are necessary to prevent reception
7966 * of tagged packets - some older NVM configurations load a
7967 * default a MAC-VLAN filter that accepts any tagged packet
7968 * which must be replaced by a normal filter.
7970 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
7971 i40e_add_filter(vsi, mac_addr,
7972 I40E_VLAN_ANY, false, true);
7974 /* relate the VSI_VMDQ name to the VSI_MAIN name */
7975 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
7976 pf->vsi[pf->lan_vsi]->netdev->name);
7977 random_ether_addr(mac_addr);
7978 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
7980 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
7982 ether_addr_copy(netdev->dev_addr, mac_addr);
7983 ether_addr_copy(netdev->perm_addr, mac_addr);
7984 /* vlan gets same features (except vlan offload)
7985 * after any tweaks for specific VSI types
7987 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
7988 NETIF_F_HW_VLAN_CTAG_RX |
7989 NETIF_F_HW_VLAN_CTAG_FILTER);
7990 netdev->priv_flags |= IFF_UNICAST_FLT;
7991 netdev->priv_flags |= IFF_SUPP_NOFCS;
7992 /* Setup netdev TC information */
7993 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
7995 netdev->netdev_ops = &i40e_netdev_ops;
7996 netdev->watchdog_timeo = 5 * HZ;
7997 i40e_set_ethtool_ops(netdev);
7999 i40e_fcoe_config_netdev(netdev, vsi);
8006 * i40e_vsi_delete - Delete a VSI from the switch
8007 * @vsi: the VSI being removed
8009 * Returns 0 on success, negative value on failure
8011 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8013 /* remove default VSI is not allowed */
8014 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8017 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8021 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8022 * @vsi: the VSI being queried
8024 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8026 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8028 struct i40e_veb *veb;
8029 struct i40e_pf *pf = vsi->back;
8031 /* Uplink is not a bridge so default to VEB */
8032 if (vsi->veb_idx == I40E_NO_VEB)
8035 veb = pf->veb[vsi->veb_idx];
8036 /* Uplink is a bridge in VEPA mode */
8037 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8040 /* Uplink is a bridge in VEB mode */
8045 * i40e_add_vsi - Add a VSI to the switch
8046 * @vsi: the VSI being configured
8048 * This initializes a VSI context depending on the VSI type to be added and
8049 * passes it down to the add_vsi aq command.
8051 static int i40e_add_vsi(struct i40e_vsi *vsi)
8054 struct i40e_mac_filter *f, *ftmp;
8055 struct i40e_pf *pf = vsi->back;
8056 struct i40e_hw *hw = &pf->hw;
8057 struct i40e_vsi_context ctxt;
8058 u8 enabled_tc = 0x1; /* TC0 enabled */
8061 memset(&ctxt, 0, sizeof(ctxt));
8062 switch (vsi->type) {
8064 /* The PF's main VSI is already setup as part of the
8065 * device initialization, so we'll not bother with
8066 * the add_vsi call, but we will retrieve the current
8069 ctxt.seid = pf->main_vsi_seid;
8070 ctxt.pf_num = pf->hw.pf_id;
8072 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8073 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8075 dev_info(&pf->pdev->dev,
8076 "couldn't get pf vsi config, err %d, aq_err %d\n",
8077 ret, pf->hw.aq.asq_last_status);
8080 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
8081 vsi->info.valid_sections = 0;
8083 vsi->seid = ctxt.seid;
8084 vsi->id = ctxt.vsi_number;
8086 enabled_tc = i40e_pf_get_tc_map(pf);
8088 /* MFP mode setup queue map and update VSI */
8089 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8090 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8091 memset(&ctxt, 0, sizeof(ctxt));
8092 ctxt.seid = pf->main_vsi_seid;
8093 ctxt.pf_num = pf->hw.pf_id;
8095 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8096 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8098 dev_info(&pf->pdev->dev,
8099 "update vsi failed, aq_err=%d\n",
8100 pf->hw.aq.asq_last_status);
8104 /* update the local VSI info queue map */
8105 i40e_vsi_update_queue_map(vsi, &ctxt);
8106 vsi->info.valid_sections = 0;
8108 /* Default/Main VSI is only enabled for TC0
8109 * reconfigure it to enable all TCs that are
8110 * available on the port in SFP mode.
8111 * For MFP case the iSCSI PF would use this
8112 * flow to enable LAN+iSCSI TC.
8114 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8116 dev_info(&pf->pdev->dev,
8117 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
8119 pf->hw.aq.asq_last_status);
8126 ctxt.pf_num = hw->pf_id;
8128 ctxt.uplink_seid = vsi->uplink_seid;
8129 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8130 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8131 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8132 ctxt.info.valid_sections |=
8133 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8134 ctxt.info.switch_id =
8135 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8137 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8140 case I40E_VSI_VMDQ2:
8141 ctxt.pf_num = hw->pf_id;
8143 ctxt.uplink_seid = vsi->uplink_seid;
8144 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8145 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8147 /* This VSI is connected to VEB so the switch_id
8148 * should be set to zero by default.
8150 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8151 ctxt.info.valid_sections |=
8152 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8153 ctxt.info.switch_id =
8154 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8157 /* Setup the VSI tx/rx queue map for TC0 only for now */
8158 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8161 case I40E_VSI_SRIOV:
8162 ctxt.pf_num = hw->pf_id;
8163 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8164 ctxt.uplink_seid = vsi->uplink_seid;
8165 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8166 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8168 /* This VSI is connected to VEB so the switch_id
8169 * should be set to zero by default.
8171 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8172 ctxt.info.valid_sections |=
8173 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8174 ctxt.info.switch_id =
8175 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8178 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8179 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8180 if (pf->vf[vsi->vf_id].spoofchk) {
8181 ctxt.info.valid_sections |=
8182 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8183 ctxt.info.sec_flags |=
8184 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8185 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8187 /* Setup the VSI tx/rx queue map for TC0 only for now */
8188 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8193 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8195 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8200 #endif /* I40E_FCOE */
8205 if (vsi->type != I40E_VSI_MAIN) {
8206 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8208 dev_info(&vsi->back->pdev->dev,
8209 "add vsi failed, aq_err=%d\n",
8210 vsi->back->hw.aq.asq_last_status);
8214 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
8215 vsi->info.valid_sections = 0;
8216 vsi->seid = ctxt.seid;
8217 vsi->id = ctxt.vsi_number;
8220 /* If macvlan filters already exist, force them to get loaded */
8221 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8225 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8226 struct i40e_aqc_remove_macvlan_element_data element;
8228 memset(&element, 0, sizeof(element));
8229 ether_addr_copy(element.mac_addr, f->macaddr);
8230 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8231 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8234 /* some older FW has a different default */
8236 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8237 i40e_aq_remove_macvlan(hw, vsi->seid,
8241 i40e_aq_mac_address_write(hw,
8242 I40E_AQC_WRITE_TYPE_LAA_WOL,
8247 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8248 pf->flags |= I40E_FLAG_FILTER_SYNC;
8251 /* Update VSI BW information */
8252 ret = i40e_vsi_get_bw_info(vsi);
8254 dev_info(&pf->pdev->dev,
8255 "couldn't get vsi bw info, err %d, aq_err %d\n",
8256 ret, pf->hw.aq.asq_last_status);
8257 /* VSI is already added so not tearing that up */
8266 * i40e_vsi_release - Delete a VSI and free its resources
8267 * @vsi: the VSI being removed
8269 * Returns 0 on success or < 0 on error
8271 int i40e_vsi_release(struct i40e_vsi *vsi)
8273 struct i40e_mac_filter *f, *ftmp;
8274 struct i40e_veb *veb = NULL;
8281 /* release of a VEB-owner or last VSI is not allowed */
8282 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8283 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8284 vsi->seid, vsi->uplink_seid);
8287 if (vsi == pf->vsi[pf->lan_vsi] &&
8288 !test_bit(__I40E_DOWN, &pf->state)) {
8289 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8293 uplink_seid = vsi->uplink_seid;
8294 if (vsi->type != I40E_VSI_SRIOV) {
8295 if (vsi->netdev_registered) {
8296 vsi->netdev_registered = false;
8298 /* results in a call to i40e_close() */
8299 unregister_netdev(vsi->netdev);
8302 i40e_vsi_close(vsi);
8304 i40e_vsi_disable_irq(vsi);
8307 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8308 i40e_del_filter(vsi, f->macaddr, f->vlan,
8309 f->is_vf, f->is_netdev);
8310 i40e_sync_vsi_filters(vsi);
8312 i40e_vsi_delete(vsi);
8313 i40e_vsi_free_q_vectors(vsi);
8315 free_netdev(vsi->netdev);
8318 i40e_vsi_clear_rings(vsi);
8319 i40e_vsi_clear(vsi);
8321 /* If this was the last thing on the VEB, except for the
8322 * controlling VSI, remove the VEB, which puts the controlling
8323 * VSI onto the next level down in the switch.
8325 * Well, okay, there's one more exception here: don't remove
8326 * the orphan VEBs yet. We'll wait for an explicit remove request
8327 * from up the network stack.
8329 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8331 pf->vsi[i]->uplink_seid == uplink_seid &&
8332 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8333 n++; /* count the VSIs */
8336 for (i = 0; i < I40E_MAX_VEB; i++) {
8339 if (pf->veb[i]->uplink_seid == uplink_seid)
8340 n++; /* count the VEBs */
8341 if (pf->veb[i]->seid == uplink_seid)
8344 if (n == 0 && veb && veb->uplink_seid != 0)
8345 i40e_veb_release(veb);
8351 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8352 * @vsi: ptr to the VSI
8354 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8355 * corresponding SW VSI structure and initializes num_queue_pairs for the
8356 * newly allocated VSI.
8358 * Returns 0 on success or negative on failure
8360 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8363 struct i40e_pf *pf = vsi->back;
8365 if (vsi->q_vectors[0]) {
8366 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8371 if (vsi->base_vector) {
8372 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8373 vsi->seid, vsi->base_vector);
8377 ret = i40e_vsi_alloc_q_vectors(vsi);
8379 dev_info(&pf->pdev->dev,
8380 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8381 vsi->num_q_vectors, vsi->seid, ret);
8382 vsi->num_q_vectors = 0;
8383 goto vector_setup_out;
8386 if (vsi->num_q_vectors)
8387 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8388 vsi->num_q_vectors, vsi->idx);
8389 if (vsi->base_vector < 0) {
8390 dev_info(&pf->pdev->dev,
8391 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8392 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8393 i40e_vsi_free_q_vectors(vsi);
8395 goto vector_setup_out;
8403 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8404 * @vsi: pointer to the vsi.
8406 * This re-allocates a vsi's queue resources.
8408 * Returns pointer to the successfully allocated and configured VSI sw struct
8409 * on success, otherwise returns NULL on failure.
8411 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8413 struct i40e_pf *pf = vsi->back;
8417 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8418 i40e_vsi_clear_rings(vsi);
8420 i40e_vsi_free_arrays(vsi, false);
8421 i40e_set_num_rings_in_vsi(vsi);
8422 ret = i40e_vsi_alloc_arrays(vsi, false);
8426 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8428 dev_info(&pf->pdev->dev,
8429 "failed to get tracking for %d queues for VSI %d err=%d\n",
8430 vsi->alloc_queue_pairs, vsi->seid, ret);
8433 vsi->base_queue = ret;
8435 /* Update the FW view of the VSI. Force a reset of TC and queue
8436 * layout configurations.
8438 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8439 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8440 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8441 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8443 /* assign it some queues */
8444 ret = i40e_alloc_rings(vsi);
8448 /* map all of the rings to the q_vectors */
8449 i40e_vsi_map_rings_to_vectors(vsi);
8453 i40e_vsi_free_q_vectors(vsi);
8454 if (vsi->netdev_registered) {
8455 vsi->netdev_registered = false;
8456 unregister_netdev(vsi->netdev);
8457 free_netdev(vsi->netdev);
8460 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8462 i40e_vsi_clear(vsi);
8467 * i40e_vsi_setup - Set up a VSI by a given type
8468 * @pf: board private structure
8470 * @uplink_seid: the switch element to link to
8471 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8473 * This allocates the sw VSI structure and its queue resources, then add a VSI
8474 * to the identified VEB.
8476 * Returns pointer to the successfully allocated and configure VSI sw struct on
8477 * success, otherwise returns NULL on failure.
8479 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8480 u16 uplink_seid, u32 param1)
8482 struct i40e_vsi *vsi = NULL;
8483 struct i40e_veb *veb = NULL;
8487 /* The requested uplink_seid must be either
8488 * - the PF's port seid
8489 * no VEB is needed because this is the PF
8490 * or this is a Flow Director special case VSI
8491 * - seid of an existing VEB
8492 * - seid of a VSI that owns an existing VEB
8493 * - seid of a VSI that doesn't own a VEB
8494 * a new VEB is created and the VSI becomes the owner
8495 * - seid of the PF VSI, which is what creates the first VEB
8496 * this is a special case of the previous
8498 * Find which uplink_seid we were given and create a new VEB if needed
8500 for (i = 0; i < I40E_MAX_VEB; i++) {
8501 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8507 if (!veb && uplink_seid != pf->mac_seid) {
8509 for (i = 0; i < pf->num_alloc_vsi; i++) {
8510 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8516 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8521 if (vsi->uplink_seid == pf->mac_seid)
8522 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8523 vsi->tc_config.enabled_tc);
8524 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8525 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8526 vsi->tc_config.enabled_tc);
8528 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
8529 dev_info(&vsi->back->pdev->dev,
8530 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
8534 i40e_config_bridge_mode(veb);
8536 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8537 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8541 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8545 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8546 uplink_seid = veb->seid;
8549 /* get vsi sw struct */
8550 v_idx = i40e_vsi_mem_alloc(pf, type);
8553 vsi = pf->vsi[v_idx];
8557 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8559 if (type == I40E_VSI_MAIN)
8560 pf->lan_vsi = v_idx;
8561 else if (type == I40E_VSI_SRIOV)
8562 vsi->vf_id = param1;
8563 /* assign it some queues */
8564 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8567 dev_info(&pf->pdev->dev,
8568 "failed to get tracking for %d queues for VSI %d err=%d\n",
8569 vsi->alloc_queue_pairs, vsi->seid, ret);
8572 vsi->base_queue = ret;
8574 /* get a VSI from the hardware */
8575 vsi->uplink_seid = uplink_seid;
8576 ret = i40e_add_vsi(vsi);
8580 switch (vsi->type) {
8581 /* setup the netdev if needed */
8583 case I40E_VSI_VMDQ2:
8585 ret = i40e_config_netdev(vsi);
8588 ret = register_netdev(vsi->netdev);
8591 vsi->netdev_registered = true;
8592 netif_carrier_off(vsi->netdev);
8593 #ifdef CONFIG_I40E_DCB
8594 /* Setup DCB netlink interface */
8595 i40e_dcbnl_setup(vsi);
8596 #endif /* CONFIG_I40E_DCB */
8600 /* set up vectors and rings if needed */
8601 ret = i40e_vsi_setup_vectors(vsi);
8605 ret = i40e_alloc_rings(vsi);
8609 /* map all of the rings to the q_vectors */
8610 i40e_vsi_map_rings_to_vectors(vsi);
8612 i40e_vsi_reset_stats(vsi);
8616 /* no netdev or rings for the other VSI types */
8623 i40e_vsi_free_q_vectors(vsi);
8625 if (vsi->netdev_registered) {
8626 vsi->netdev_registered = false;
8627 unregister_netdev(vsi->netdev);
8628 free_netdev(vsi->netdev);
8632 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8634 i40e_vsi_clear(vsi);
8640 * i40e_veb_get_bw_info - Query VEB BW information
8641 * @veb: the veb to query
8643 * Query the Tx scheduler BW configuration data for given VEB
8645 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
8647 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
8648 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
8649 struct i40e_pf *pf = veb->pf;
8650 struct i40e_hw *hw = &pf->hw;
8655 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
8658 dev_info(&pf->pdev->dev,
8659 "query veb bw config failed, aq_err=%d\n",
8660 hw->aq.asq_last_status);
8664 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
8667 dev_info(&pf->pdev->dev,
8668 "query veb bw ets config failed, aq_err=%d\n",
8669 hw->aq.asq_last_status);
8673 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
8674 veb->bw_max_quanta = ets_data.tc_bw_max;
8675 veb->is_abs_credits = bw_data.absolute_credits_enable;
8676 veb->enabled_tc = ets_data.tc_valid_bits;
8677 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
8678 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
8679 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
8680 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
8681 veb->bw_tc_limit_credits[i] =
8682 le16_to_cpu(bw_data.tc_bw_limits[i]);
8683 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
8691 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
8692 * @pf: board private structure
8694 * On error: returns error code (negative)
8695 * On success: returns vsi index in PF (positive)
8697 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
8700 struct i40e_veb *veb;
8703 /* Need to protect the allocation of switch elements at the PF level */
8704 mutex_lock(&pf->switch_mutex);
8706 /* VEB list may be fragmented if VEB creation/destruction has
8707 * been happening. We can afford to do a quick scan to look
8708 * for any free slots in the list.
8710 * find next empty veb slot, looping back around if necessary
8713 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
8715 if (i >= I40E_MAX_VEB) {
8717 goto err_alloc_veb; /* out of VEB slots! */
8720 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
8727 veb->enabled_tc = 1;
8732 mutex_unlock(&pf->switch_mutex);
8737 * i40e_switch_branch_release - Delete a branch of the switch tree
8738 * @branch: where to start deleting
8740 * This uses recursion to find the tips of the branch to be
8741 * removed, deleting until we get back to and can delete this VEB.
8743 static void i40e_switch_branch_release(struct i40e_veb *branch)
8745 struct i40e_pf *pf = branch->pf;
8746 u16 branch_seid = branch->seid;
8747 u16 veb_idx = branch->idx;
8750 /* release any VEBs on this VEB - RECURSION */
8751 for (i = 0; i < I40E_MAX_VEB; i++) {
8754 if (pf->veb[i]->uplink_seid == branch->seid)
8755 i40e_switch_branch_release(pf->veb[i]);
8758 /* Release the VSIs on this VEB, but not the owner VSI.
8760 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
8761 * the VEB itself, so don't use (*branch) after this loop.
8763 for (i = 0; i < pf->num_alloc_vsi; i++) {
8766 if (pf->vsi[i]->uplink_seid == branch_seid &&
8767 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8768 i40e_vsi_release(pf->vsi[i]);
8772 /* There's one corner case where the VEB might not have been
8773 * removed, so double check it here and remove it if needed.
8774 * This case happens if the veb was created from the debugfs
8775 * commands and no VSIs were added to it.
8777 if (pf->veb[veb_idx])
8778 i40e_veb_release(pf->veb[veb_idx]);
8782 * i40e_veb_clear - remove veb struct
8783 * @veb: the veb to remove
8785 static void i40e_veb_clear(struct i40e_veb *veb)
8791 struct i40e_pf *pf = veb->pf;
8793 mutex_lock(&pf->switch_mutex);
8794 if (pf->veb[veb->idx] == veb)
8795 pf->veb[veb->idx] = NULL;
8796 mutex_unlock(&pf->switch_mutex);
8803 * i40e_veb_release - Delete a VEB and free its resources
8804 * @veb: the VEB being removed
8806 void i40e_veb_release(struct i40e_veb *veb)
8808 struct i40e_vsi *vsi = NULL;
8814 /* find the remaining VSI and check for extras */
8815 for (i = 0; i < pf->num_alloc_vsi; i++) {
8816 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
8822 dev_info(&pf->pdev->dev,
8823 "can't remove VEB %d with %d VSIs left\n",
8828 /* move the remaining VSI to uplink veb */
8829 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
8830 if (veb->uplink_seid) {
8831 vsi->uplink_seid = veb->uplink_seid;
8832 if (veb->uplink_seid == pf->mac_seid)
8833 vsi->veb_idx = I40E_NO_VEB;
8835 vsi->veb_idx = veb->veb_idx;
8838 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8839 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
8842 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
8843 i40e_veb_clear(veb);
8847 * i40e_add_veb - create the VEB in the switch
8848 * @veb: the VEB to be instantiated
8849 * @vsi: the controlling VSI
8851 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
8853 bool is_default = false;
8854 bool is_cloud = false;
8857 /* get a VEB from the hardware */
8858 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8859 veb->enabled_tc, is_default,
8860 is_cloud, &veb->seid, NULL);
8862 dev_info(&veb->pf->pdev->dev,
8863 "couldn't add VEB, err %d, aq_err %d\n",
8864 ret, veb->pf->hw.aq.asq_last_status);
8868 /* get statistics counter */
8869 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8870 &veb->stats_idx, NULL, NULL, NULL);
8872 dev_info(&veb->pf->pdev->dev,
8873 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8874 ret, veb->pf->hw.aq.asq_last_status);
8877 ret = i40e_veb_get_bw_info(veb);
8879 dev_info(&veb->pf->pdev->dev,
8880 "couldn't get VEB bw info, err %d, aq_err %d\n",
8881 ret, veb->pf->hw.aq.asq_last_status);
8882 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8886 vsi->uplink_seid = veb->seid;
8887 vsi->veb_idx = veb->idx;
8888 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8894 * i40e_veb_setup - Set up a VEB
8895 * @pf: board private structure
8896 * @flags: VEB setup flags
8897 * @uplink_seid: the switch element to link to
8898 * @vsi_seid: the initial VSI seid
8899 * @enabled_tc: Enabled TC bit-map
8901 * This allocates the sw VEB structure and links it into the switch
8902 * It is possible and legal for this to be a duplicate of an already
8903 * existing VEB. It is also possible for both uplink and vsi seids
8904 * to be zero, in order to create a floating VEB.
8906 * Returns pointer to the successfully allocated VEB sw struct on
8907 * success, otherwise returns NULL on failure.
8909 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8910 u16 uplink_seid, u16 vsi_seid,
8913 struct i40e_veb *veb, *uplink_veb = NULL;
8914 int vsi_idx, veb_idx;
8917 /* if one seid is 0, the other must be 0 to create a floating relay */
8918 if ((uplink_seid == 0 || vsi_seid == 0) &&
8919 (uplink_seid + vsi_seid != 0)) {
8920 dev_info(&pf->pdev->dev,
8921 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8922 uplink_seid, vsi_seid);
8926 /* make sure there is such a vsi and uplink */
8927 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8928 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8930 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8931 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8936 if (uplink_seid && uplink_seid != pf->mac_seid) {
8937 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8938 if (pf->veb[veb_idx] &&
8939 pf->veb[veb_idx]->seid == uplink_seid) {
8940 uplink_veb = pf->veb[veb_idx];
8945 dev_info(&pf->pdev->dev,
8946 "uplink seid %d not found\n", uplink_seid);
8951 /* get veb sw struct */
8952 veb_idx = i40e_veb_mem_alloc(pf);
8955 veb = pf->veb[veb_idx];
8957 veb->uplink_seid = uplink_seid;
8958 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8959 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8961 /* create the VEB in the switch */
8962 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8965 if (vsi_idx == pf->lan_vsi)
8966 pf->lan_veb = veb->idx;
8971 i40e_veb_clear(veb);
8977 * i40e_setup_pf_switch_element - set pf vars based on switch type
8978 * @pf: board private structure
8979 * @ele: element we are building info from
8980 * @num_reported: total number of elements
8981 * @printconfig: should we print the contents
8983 * helper function to assist in extracting a few useful SEID values.
8985 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
8986 struct i40e_aqc_switch_config_element_resp *ele,
8987 u16 num_reported, bool printconfig)
8989 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
8990 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
8991 u8 element_type = ele->element_type;
8992 u16 seid = le16_to_cpu(ele->seid);
8995 dev_info(&pf->pdev->dev,
8996 "type=%d seid=%d uplink=%d downlink=%d\n",
8997 element_type, seid, uplink_seid, downlink_seid);
8999 switch (element_type) {
9000 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9001 pf->mac_seid = seid;
9003 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9005 if (uplink_seid != pf->mac_seid)
9007 if (pf->lan_veb == I40E_NO_VEB) {
9010 /* find existing or else empty VEB */
9011 for (v = 0; v < I40E_MAX_VEB; v++) {
9012 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9017 if (pf->lan_veb == I40E_NO_VEB) {
9018 v = i40e_veb_mem_alloc(pf);
9025 pf->veb[pf->lan_veb]->seid = seid;
9026 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9027 pf->veb[pf->lan_veb]->pf = pf;
9028 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9030 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9031 if (num_reported != 1)
9033 /* This is immediately after a reset so we can assume this is
9036 pf->mac_seid = uplink_seid;
9037 pf->pf_seid = downlink_seid;
9038 pf->main_vsi_seid = seid;
9040 dev_info(&pf->pdev->dev,
9041 "pf_seid=%d main_vsi_seid=%d\n",
9042 pf->pf_seid, pf->main_vsi_seid);
9044 case I40E_SWITCH_ELEMENT_TYPE_PF:
9045 case I40E_SWITCH_ELEMENT_TYPE_VF:
9046 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9047 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9048 case I40E_SWITCH_ELEMENT_TYPE_PE:
9049 case I40E_SWITCH_ELEMENT_TYPE_PA:
9050 /* ignore these for now */
9053 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9054 element_type, seid);
9060 * i40e_fetch_switch_configuration - Get switch config from firmware
9061 * @pf: board private structure
9062 * @printconfig: should we print the contents
9064 * Get the current switch configuration from the device and
9065 * extract a few useful SEID values.
9067 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9069 struct i40e_aqc_get_switch_config_resp *sw_config;
9075 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9079 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9081 u16 num_reported, num_total;
9083 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9087 dev_info(&pf->pdev->dev,
9088 "get switch config failed %d aq_err=%x\n",
9089 ret, pf->hw.aq.asq_last_status);
9094 num_reported = le16_to_cpu(sw_config->header.num_reported);
9095 num_total = le16_to_cpu(sw_config->header.num_total);
9098 dev_info(&pf->pdev->dev,
9099 "header: %d reported %d total\n",
9100 num_reported, num_total);
9102 for (i = 0; i < num_reported; i++) {
9103 struct i40e_aqc_switch_config_element_resp *ele =
9104 &sw_config->element[i];
9106 i40e_setup_pf_switch_element(pf, ele, num_reported,
9109 } while (next_seid != 0);
9116 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9117 * @pf: board private structure
9118 * @reinit: if the Main VSI needs to re-initialized.
9120 * Returns 0 on success, negative value on failure
9122 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9126 /* find out what's out there already */
9127 ret = i40e_fetch_switch_configuration(pf, false);
9129 dev_info(&pf->pdev->dev,
9130 "couldn't fetch switch config, err %d, aq_err %d\n",
9131 ret, pf->hw.aq.asq_last_status);
9134 i40e_pf_reset_stats(pf);
9136 /* first time setup */
9137 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9138 struct i40e_vsi *vsi = NULL;
9141 /* Set up the PF VSI associated with the PF's main VSI
9142 * that is already in the HW switch
9144 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9145 uplink_seid = pf->veb[pf->lan_veb]->seid;
9147 uplink_seid = pf->mac_seid;
9148 if (pf->lan_vsi == I40E_NO_VSI)
9149 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9151 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9153 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9154 i40e_fdir_teardown(pf);
9158 /* force a reset of TC and queue layout configurations */
9159 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9160 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9161 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9162 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9164 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9166 i40e_fdir_sb_setup(pf);
9168 /* Setup static PF queue filter control settings */
9169 ret = i40e_setup_pf_filter_control(pf);
9171 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9173 /* Failure here should not stop continuing other steps */
9176 /* enable RSS in the HW, even for only one queue, as the stack can use
9179 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9180 i40e_config_rss(pf);
9182 /* fill in link information and enable LSE reporting */
9183 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9184 i40e_link_event(pf);
9186 /* Initialize user-specific link properties */
9187 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9188 I40E_AQ_AN_COMPLETED) ? true : false);
9190 /* fill in link information and enable LSE reporting */
9191 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9192 i40e_link_event(pf);
9194 /* Initialize user-specific link properties */
9195 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9196 I40E_AQ_AN_COMPLETED) ? true : false);
9204 * i40e_determine_queue_usage - Work out queue distribution
9205 * @pf: board private structure
9207 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9211 pf->num_lan_qps = 0;
9213 pf->num_fcoe_qps = 0;
9216 /* Find the max queues to be put into basic use. We'll always be
9217 * using TC0, whether or not DCB is running, and TC0 will get the
9220 queues_left = pf->hw.func_caps.num_tx_qp;
9222 if ((queues_left == 1) ||
9223 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9224 /* one qp for PF, no queues for anything else */
9226 pf->rss_size = pf->num_lan_qps = 1;
9228 /* make sure all the fancies are disabled */
9229 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9231 I40E_FLAG_FCOE_ENABLED |
9233 I40E_FLAG_FD_SB_ENABLED |
9234 I40E_FLAG_FD_ATR_ENABLED |
9235 I40E_FLAG_DCB_CAPABLE |
9236 I40E_FLAG_SRIOV_ENABLED |
9237 I40E_FLAG_VMDQ_ENABLED);
9238 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9239 I40E_FLAG_FD_SB_ENABLED |
9240 I40E_FLAG_FD_ATR_ENABLED |
9241 I40E_FLAG_DCB_CAPABLE))) {
9243 pf->rss_size = pf->num_lan_qps = 1;
9244 queues_left -= pf->num_lan_qps;
9246 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9248 I40E_FLAG_FCOE_ENABLED |
9250 I40E_FLAG_FD_SB_ENABLED |
9251 I40E_FLAG_FD_ATR_ENABLED |
9252 I40E_FLAG_DCB_ENABLED |
9253 I40E_FLAG_VMDQ_ENABLED);
9255 /* Not enough queues for all TCs */
9256 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9257 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9258 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9259 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9261 pf->num_lan_qps = pf->rss_size_max;
9262 queues_left -= pf->num_lan_qps;
9266 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9267 if (I40E_DEFAULT_FCOE <= queues_left) {
9268 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9269 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9270 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9272 pf->num_fcoe_qps = 0;
9273 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9274 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9277 queues_left -= pf->num_fcoe_qps;
9281 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9282 if (queues_left > 1) {
9283 queues_left -= 1; /* save 1 queue for FD */
9285 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9286 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9290 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9291 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9292 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9293 (queues_left / pf->num_vf_qps));
9294 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9297 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9298 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9299 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9300 (queues_left / pf->num_vmdq_qps));
9301 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9304 pf->queues_left = queues_left;
9306 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9311 * i40e_setup_pf_filter_control - Setup PF static filter control
9312 * @pf: PF to be setup
9314 * i40e_setup_pf_filter_control sets up a pf's initial filter control
9315 * settings. If PE/FCoE are enabled then it will also set the per PF
9316 * based filter sizes required for them. It also enables Flow director,
9317 * ethertype and macvlan type filter settings for the pf.
9319 * Returns 0 on success, negative on failure
9321 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9323 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9325 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9327 /* Flow Director is enabled */
9328 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9329 settings->enable_fdir = true;
9331 /* Ethtype and MACVLAN filters enabled for PF */
9332 settings->enable_ethtype = true;
9333 settings->enable_macvlan = true;
9335 if (i40e_set_filter_control(&pf->hw, settings))
9341 #define INFO_STRING_LEN 255
9342 static void i40e_print_features(struct i40e_pf *pf)
9344 struct i40e_hw *hw = &pf->hw;
9347 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9349 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9355 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9356 #ifdef CONFIG_PCI_IOV
9357 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9359 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9360 pf->hw.func_caps.num_vsis,
9361 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9362 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9364 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9365 buf += sprintf(buf, "RSS ");
9366 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9367 buf += sprintf(buf, "FD_ATR ");
9368 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9369 buf += sprintf(buf, "FD_SB ");
9370 buf += sprintf(buf, "NTUPLE ");
9372 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9373 buf += sprintf(buf, "DCB ");
9374 if (pf->flags & I40E_FLAG_PTP)
9375 buf += sprintf(buf, "PTP ");
9377 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9378 buf += sprintf(buf, "FCOE ");
9381 BUG_ON(buf > (string + INFO_STRING_LEN));
9382 dev_info(&pf->pdev->dev, "%s\n", string);
9387 * i40e_probe - Device initialization routine
9388 * @pdev: PCI device information struct
9389 * @ent: entry in i40e_pci_tbl
9391 * i40e_probe initializes a pf identified by a pci_dev structure.
9392 * The OS initialization, configuring of the pf private structure,
9393 * and a hardware reset occur.
9395 * Returns 0 on success, negative on failure
9397 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9399 struct i40e_aq_get_phy_abilities_resp abilities;
9402 static u16 pfs_found;
9408 err = pci_enable_device_mem(pdev);
9412 /* set up for high or low dma */
9413 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9415 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9418 "DMA configuration failed: 0x%x\n", err);
9423 /* set up pci connections */
9424 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9425 IORESOURCE_MEM), i40e_driver_name);
9427 dev_info(&pdev->dev,
9428 "pci_request_selected_regions failed %d\n", err);
9432 pci_enable_pcie_error_reporting(pdev);
9433 pci_set_master(pdev);
9435 /* Now that we have a PCI connection, we need to do the
9436 * low level device setup. This is primarily setting up
9437 * the Admin Queue structures and then querying for the
9438 * device's current profile information.
9440 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9447 set_bit(__I40E_DOWN, &pf->state);
9451 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9452 pci_resource_len(pdev, 0));
9455 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9456 (unsigned int)pci_resource_start(pdev, 0),
9457 (unsigned int)pci_resource_len(pdev, 0), err);
9460 hw->vendor_id = pdev->vendor;
9461 hw->device_id = pdev->device;
9462 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9463 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9464 hw->subsystem_device_id = pdev->subsystem_device;
9465 hw->bus.device = PCI_SLOT(pdev->devfn);
9466 hw->bus.func = PCI_FUNC(pdev->devfn);
9467 pf->instance = pfs_found;
9470 pf->msg_enable = pf->hw.debug_mask;
9471 pf->msg_enable = debug;
9474 /* do a special CORER for clearing PXE mode once at init */
9475 if (hw->revision_id == 0 &&
9476 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9477 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9482 i40e_clear_pxe_mode(hw);
9485 /* Reset here to make sure all is clean and to define PF 'n' */
9487 err = i40e_pf_reset(hw);
9489 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9494 hw->aq.num_arq_entries = I40E_AQ_LEN;
9495 hw->aq.num_asq_entries = I40E_AQ_LEN;
9496 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9497 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9498 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9500 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
9502 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
9504 err = i40e_init_shared_code(hw);
9506 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
9510 /* set up a default setting for link flow control */
9511 pf->hw.fc.requested_mode = I40E_FC_NONE;
9513 err = i40e_init_adminq(hw);
9514 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9516 dev_info(&pdev->dev,
9517 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9521 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9522 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9523 dev_info(&pdev->dev,
9524 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9525 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9526 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9527 dev_info(&pdev->dev,
9528 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9531 i40e_verify_eeprom(pf);
9533 /* Rev 0 hardware was never productized */
9534 if (hw->revision_id < 1)
9535 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9537 i40e_clear_pxe_mode(hw);
9538 err = i40e_get_capabilities(pf);
9540 goto err_adminq_setup;
9542 err = i40e_sw_init(pf);
9544 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9548 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9549 hw->func_caps.num_rx_qp,
9550 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9552 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9553 goto err_init_lan_hmc;
9556 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9558 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9560 goto err_configure_lan_hmc;
9563 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
9564 * Ignore error return codes because if it was already disabled via
9565 * hardware settings this will fail
9567 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
9568 (pf->hw.aq.fw_maj_ver < 4)) {
9569 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
9570 i40e_aq_stop_lldp(hw, true, NULL);
9573 i40e_get_mac_addr(hw, hw->mac.addr);
9574 if (!is_valid_ether_addr(hw->mac.addr)) {
9575 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
9579 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
9580 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
9581 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
9582 if (is_valid_ether_addr(hw->mac.port_addr))
9583 pf->flags |= I40E_FLAG_PORT_ID_VALID;
9585 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
9587 dev_info(&pdev->dev,
9588 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
9589 if (!is_valid_ether_addr(hw->mac.san_addr)) {
9590 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
9592 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
9594 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
9595 #endif /* I40E_FCOE */
9597 pci_set_drvdata(pdev, pf);
9598 pci_save_state(pdev);
9599 #ifdef CONFIG_I40E_DCB
9600 err = i40e_init_pf_dcb(pf);
9602 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
9603 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9604 /* Continue without DCB enabled */
9606 #endif /* CONFIG_I40E_DCB */
9608 /* set up periodic task facility */
9609 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
9610 pf->service_timer_period = HZ;
9612 INIT_WORK(&pf->service_task, i40e_service_task);
9613 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
9614 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
9615 pf->link_check_timeout = jiffies;
9617 /* WoL defaults to disabled */
9619 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
9621 /* set up the main switch operations */
9622 i40e_determine_queue_usage(pf);
9623 i40e_init_interrupt_scheme(pf);
9625 /* The number of VSIs reported by the FW is the minimum guaranteed
9626 * to us; HW supports far more and we share the remaining pool with
9627 * the other PFs. We allocate space for more than the guarantee with
9628 * the understanding that we might not get them all later.
9630 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
9631 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
9633 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
9635 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
9636 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
9637 pf->vsi = kzalloc(len, GFP_KERNEL);
9640 goto err_switch_setup;
9643 err = i40e_setup_pf_switch(pf, false);
9645 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
9648 /* if FDIR VSI was set up, start it now */
9649 for (i = 0; i < pf->num_alloc_vsi; i++) {
9650 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
9651 i40e_vsi_open(pf->vsi[i]);
9656 /* driver is only interested in link up/down and module qualification
9657 * reports from firmware
9659 err = i40e_aq_set_phy_int_mask(&pf->hw,
9660 I40E_AQ_EVENT_LINK_UPDOWN |
9661 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
9663 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err);
9666 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9668 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
9669 pf->hw.aq.asq_last_status);
9672 /* The main driver is (mostly) up and happy. We need to set this state
9673 * before setting up the misc vector or we get a race and the vector
9674 * ends up disabled forever.
9676 clear_bit(__I40E_DOWN, &pf->state);
9678 /* In case of MSIX we are going to setup the misc vector right here
9679 * to handle admin queue events etc. In case of legacy and MSI
9680 * the misc functionality and queue processing is combined in
9681 * the same vector and that gets setup at open.
9683 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9684 err = i40e_setup_misc_vector(pf);
9686 dev_info(&pdev->dev,
9687 "setup of misc vector failed: %d\n", err);
9692 #ifdef CONFIG_PCI_IOV
9693 /* prep for VF support */
9694 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9695 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9696 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9699 /* disable link interrupts for VFs */
9700 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
9701 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
9702 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
9705 if (pci_num_vf(pdev)) {
9706 dev_info(&pdev->dev,
9707 "Active VFs found, allocating resources.\n");
9708 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
9710 dev_info(&pdev->dev,
9711 "Error %d allocating resources for existing VFs\n",
9715 #endif /* CONFIG_PCI_IOV */
9719 i40e_dbg_pf_init(pf);
9721 /* tell the firmware that we're starting */
9722 i40e_send_version(pf);
9724 /* since everything's happy, start the service_task timer */
9725 mod_timer(&pf->service_timer,
9726 round_jiffies(jiffies + pf->service_timer_period));
9729 /* create FCoE interface */
9730 i40e_fcoe_vsi_setup(pf);
9733 /* Get the negotiated link width and speed from PCI config space */
9734 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
9736 i40e_set_pci_config_data(hw, link_status);
9738 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
9739 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
9740 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
9741 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
9743 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
9744 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
9745 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
9746 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
9749 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
9750 hw->bus.speed < i40e_bus_speed_8000) {
9751 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
9752 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
9755 /* get the requested speeds from the fw */
9756 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
9758 dev_info(&pf->pdev->dev, "get phy abilities failed, aq_err %d, advertised speed settings may not be correct\n",
9760 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
9762 /* print a string summarizing features */
9763 i40e_print_features(pf);
9767 /* Unwind what we've done if something failed in the setup */
9769 set_bit(__I40E_DOWN, &pf->state);
9770 i40e_clear_interrupt_scheme(pf);
9773 i40e_reset_interrupt_capability(pf);
9774 del_timer_sync(&pf->service_timer);
9776 err_configure_lan_hmc:
9777 (void)i40e_shutdown_lan_hmc(hw);
9780 kfree(pf->irq_pile);
9783 (void)i40e_shutdown_adminq(hw);
9785 iounmap(hw->hw_addr);
9789 pci_disable_pcie_error_reporting(pdev);
9790 pci_release_selected_regions(pdev,
9791 pci_select_bars(pdev, IORESOURCE_MEM));
9794 pci_disable_device(pdev);
9799 * i40e_remove - Device removal routine
9800 * @pdev: PCI device information struct
9802 * i40e_remove is called by the PCI subsystem to alert the driver
9803 * that is should release a PCI device. This could be caused by a
9804 * Hot-Plug event, or because the driver is going to be removed from
9807 static void i40e_remove(struct pci_dev *pdev)
9809 struct i40e_pf *pf = pci_get_drvdata(pdev);
9810 i40e_status ret_code;
9813 i40e_dbg_pf_exit(pf);
9817 /* no more scheduling of any task */
9818 set_bit(__I40E_DOWN, &pf->state);
9819 del_timer_sync(&pf->service_timer);
9820 cancel_work_sync(&pf->service_task);
9822 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
9824 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
9827 i40e_fdir_teardown(pf);
9829 /* If there is a switch structure or any orphans, remove them.
9830 * This will leave only the PF's VSI remaining.
9832 for (i = 0; i < I40E_MAX_VEB; i++) {
9836 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
9837 pf->veb[i]->uplink_seid == 0)
9838 i40e_switch_branch_release(pf->veb[i]);
9841 /* Now we can shutdown the PF's VSI, just before we kill
9844 if (pf->vsi[pf->lan_vsi])
9845 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
9847 i40e_stop_misc_vector(pf);
9848 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9849 synchronize_irq(pf->msix_entries[0].vector);
9850 free_irq(pf->msix_entries[0].vector, pf);
9853 /* shutdown and destroy the HMC */
9854 if (pf->hw.hmc.hmc_obj) {
9855 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
9857 dev_warn(&pdev->dev,
9858 "Failed to destroy the HMC resources: %d\n",
9862 /* shutdown the adminq */
9863 ret_code = i40e_shutdown_adminq(&pf->hw);
9865 dev_warn(&pdev->dev,
9866 "Failed to destroy the Admin Queue resources: %d\n",
9869 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
9870 i40e_clear_interrupt_scheme(pf);
9871 for (i = 0; i < pf->num_alloc_vsi; i++) {
9873 i40e_vsi_clear_rings(pf->vsi[i]);
9874 i40e_vsi_clear(pf->vsi[i]);
9879 for (i = 0; i < I40E_MAX_VEB; i++) {
9885 kfree(pf->irq_pile);
9888 iounmap(pf->hw.hw_addr);
9890 pci_release_selected_regions(pdev,
9891 pci_select_bars(pdev, IORESOURCE_MEM));
9893 pci_disable_pcie_error_reporting(pdev);
9894 pci_disable_device(pdev);
9898 * i40e_pci_error_detected - warning that something funky happened in PCI land
9899 * @pdev: PCI device information struct
9901 * Called to warn that something happened and the error handling steps
9902 * are in progress. Allows the driver to quiesce things, be ready for
9905 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9906 enum pci_channel_state error)
9908 struct i40e_pf *pf = pci_get_drvdata(pdev);
9910 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9912 /* shutdown all operations */
9913 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9915 i40e_prep_for_reset(pf);
9919 /* Request a slot reset */
9920 return PCI_ERS_RESULT_NEED_RESET;
9924 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9925 * @pdev: PCI device information struct
9927 * Called to find if the driver can work with the device now that
9928 * the pci slot has been reset. If a basic connection seems good
9929 * (registers are readable and have sane content) then return a
9930 * happy little PCI_ERS_RESULT_xxx.
9932 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9934 struct i40e_pf *pf = pci_get_drvdata(pdev);
9935 pci_ers_result_t result;
9939 dev_info(&pdev->dev, "%s\n", __func__);
9940 if (pci_enable_device_mem(pdev)) {
9941 dev_info(&pdev->dev,
9942 "Cannot re-enable PCI device after reset.\n");
9943 result = PCI_ERS_RESULT_DISCONNECT;
9945 pci_set_master(pdev);
9946 pci_restore_state(pdev);
9947 pci_save_state(pdev);
9948 pci_wake_from_d3(pdev, false);
9950 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9952 result = PCI_ERS_RESULT_RECOVERED;
9954 result = PCI_ERS_RESULT_DISCONNECT;
9957 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9959 dev_info(&pdev->dev,
9960 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9962 /* non-fatal, continue */
9969 * i40e_pci_error_resume - restart operations after PCI error recovery
9970 * @pdev: PCI device information struct
9972 * Called to allow the driver to bring things back up after PCI error
9973 * and/or reset recovery has finished.
9975 static void i40e_pci_error_resume(struct pci_dev *pdev)
9977 struct i40e_pf *pf = pci_get_drvdata(pdev);
9979 dev_info(&pdev->dev, "%s\n", __func__);
9980 if (test_bit(__I40E_SUSPENDED, &pf->state))
9984 i40e_handle_reset_warning(pf);
9989 * i40e_shutdown - PCI callback for shutting down
9990 * @pdev: PCI device information struct
9992 static void i40e_shutdown(struct pci_dev *pdev)
9994 struct i40e_pf *pf = pci_get_drvdata(pdev);
9995 struct i40e_hw *hw = &pf->hw;
9997 set_bit(__I40E_SUSPENDED, &pf->state);
9998 set_bit(__I40E_DOWN, &pf->state);
10000 i40e_prep_for_reset(pf);
10003 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10004 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10006 if (system_state == SYSTEM_POWER_OFF) {
10007 pci_wake_from_d3(pdev, pf->wol_en);
10008 pci_set_power_state(pdev, PCI_D3hot);
10014 * i40e_suspend - PCI callback for moving to D3
10015 * @pdev: PCI device information struct
10017 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10019 struct i40e_pf *pf = pci_get_drvdata(pdev);
10020 struct i40e_hw *hw = &pf->hw;
10022 set_bit(__I40E_SUSPENDED, &pf->state);
10023 set_bit(__I40E_DOWN, &pf->state);
10024 del_timer_sync(&pf->service_timer);
10025 cancel_work_sync(&pf->service_task);
10027 i40e_prep_for_reset(pf);
10030 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10031 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10033 pci_wake_from_d3(pdev, pf->wol_en);
10034 pci_set_power_state(pdev, PCI_D3hot);
10040 * i40e_resume - PCI callback for waking up from D3
10041 * @pdev: PCI device information struct
10043 static int i40e_resume(struct pci_dev *pdev)
10045 struct i40e_pf *pf = pci_get_drvdata(pdev);
10048 pci_set_power_state(pdev, PCI_D0);
10049 pci_restore_state(pdev);
10050 /* pci_restore_state() clears dev->state_saves, so
10051 * call pci_save_state() again to restore it.
10053 pci_save_state(pdev);
10055 err = pci_enable_device_mem(pdev);
10057 dev_err(&pdev->dev,
10058 "%s: Cannot enable PCI device from suspend\n",
10062 pci_set_master(pdev);
10064 /* no wakeup events while running */
10065 pci_wake_from_d3(pdev, false);
10067 /* handling the reset will rebuild the device state */
10068 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10069 clear_bit(__I40E_DOWN, &pf->state);
10071 i40e_reset_and_rebuild(pf, false);
10079 static const struct pci_error_handlers i40e_err_handler = {
10080 .error_detected = i40e_pci_error_detected,
10081 .slot_reset = i40e_pci_error_slot_reset,
10082 .resume = i40e_pci_error_resume,
10085 static struct pci_driver i40e_driver = {
10086 .name = i40e_driver_name,
10087 .id_table = i40e_pci_tbl,
10088 .probe = i40e_probe,
10089 .remove = i40e_remove,
10091 .suspend = i40e_suspend,
10092 .resume = i40e_resume,
10094 .shutdown = i40e_shutdown,
10095 .err_handler = &i40e_err_handler,
10096 .sriov_configure = i40e_pci_sriov_configure,
10100 * i40e_init_module - Driver registration routine
10102 * i40e_init_module is the first routine called when the driver is
10103 * loaded. All it does is register with the PCI subsystem.
10105 static int __init i40e_init_module(void)
10107 pr_info("%s: %s - version %s\n", i40e_driver_name,
10108 i40e_driver_string, i40e_driver_version_str);
10109 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10111 #if IS_ENABLED(CONFIG_I40E_CONFIGFS_FS)
10112 i40e_configfs_init();
10113 #endif /* CONFIG_I40E_CONFIGFS_FS */
10115 return pci_register_driver(&i40e_driver);
10117 module_init(i40e_init_module);
10120 * i40e_exit_module - Driver exit cleanup routine
10122 * i40e_exit_module is called just before the driver is removed
10125 static void __exit i40e_exit_module(void)
10127 pci_unregister_driver(&i40e_driver);
10129 #if IS_ENABLED(CONFIG_I40E_CONFIGFS_FS)
10130 i40e_configfs_exit();
10131 #endif /* CONFIG_I40E_CONFIGFS_FS */
10133 module_exit(i40e_exit_module);